2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
30 * FreeBSD pcm driver for ATI IXP 150/200/250/300 AC97 controllers
33 * * 16bit playback / recording
34 * * 32bit native playback - yay!
35 * * 32bit native recording (seems broken on few hardwares)
39 * * Support for more than 2 channels.
41 * * 32bit native recording seems broken on few hardwares, most
42 * probably because of incomplete VRA/DRA cleanup.
47 * Shaharil @ SCAN Associates whom relentlessly providing me the
48 * mind blowing Acer Ferrari 4002 WLMi with this ATI IXP hardware.
50 * Reinoud Zandijk <reinoud@NetBSD.org> (auixp), which this driver is
51 * largely based upon although large part of it has been reworked. His
52 * driver is the primary reference and pretty much well documented.
54 * Takashi Iwai (ALSA snd-atiixp), for register definitions and some
55 * random ninja hackery.
58 #ifdef HAVE_KERNEL_OPTION_HEADERS
62 #include <dev/sound/pcm/sound.h>
63 #include <dev/sound/pcm/ac97.h>
65 #include <dev/pci/pcireg.h>
66 #include <dev/pci/pcivar.h>
67 #include <sys/sysctl.h>
68 #include <sys/endian.h>
70 #include <dev/sound/pci/atiixp.h>
72 SND_DECLARE_FILE("$FreeBSD$");
74 #define ATI_IXP_DMA_RETRY_MAX 100
76 #define ATI_IXP_BUFSZ_MIN 4096
77 #define ATI_IXP_BUFSZ_MAX 65536
78 #define ATI_IXP_BUFSZ_DEFAULT 16384
80 #define ATI_IXP_BLK_MIN 32
81 #define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1))
83 #define ATI_IXP_CHN_RUNNING 0x00000001
84 #define ATI_IXP_CHN_SUSPEND 0x00000002
86 struct atiixp_dma_op {
87 volatile uint32_t addr;
88 volatile uint16_t status;
89 volatile uint16_t size;
90 volatile uint32_t next;
95 struct atiixp_chinfo {
96 struct snd_dbuf *buffer;
97 struct pcm_channel *channel;
98 struct atiixp_info *parent;
99 struct atiixp_dma_op *sgd_table;
101 uint32_t enable_bit, flush_bit, linkptr_bit, dt_cur_bit;
102 uint32_t blksz, blkcnt;
103 uint32_t ptr, prevptr;
113 bus_space_handle_t sh;
114 bus_dma_tag_t parent_dmat;
115 bus_dma_tag_t sgd_dmat;
116 bus_dmamap_t sgd_dmamap;
119 struct resource *reg, *irq;
120 int regtype, regid, irqid;
122 struct ac97_info *codec;
124 struct atiixp_chinfo pch;
125 struct atiixp_chinfo rch;
126 struct atiixp_dma_op *sgd_table;
127 struct intr_config_hook delayed_attach;
130 uint32_t codec_not_ready_bits, codec_idx, codec_found;
132 int registered_channels;
135 struct callout poll_timer;
136 int poll_ticks, polling;
139 #define atiixp_rd(_sc, _reg) \
140 bus_space_read_4((_sc)->st, (_sc)->sh, _reg)
141 #define atiixp_wr(_sc, _reg, _val) \
142 bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val)
144 #define atiixp_lock(_sc) snd_mtxlock((_sc)->lock)
145 #define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock)
146 #define atiixp_assert(_sc) snd_mtxassert((_sc)->lock)
148 static uint32_t atiixp_fmt_32bit[] = {
149 SND_FORMAT(AFMT_S16_LE, 2, 0),
150 SND_FORMAT(AFMT_S32_LE, 2, 0),
154 static uint32_t atiixp_fmt[] = {
155 SND_FORMAT(AFMT_S16_LE, 2, 0),
159 static struct pcmchan_caps atiixp_caps_32bit = {
165 static struct pcmchan_caps atiixp_caps = {
171 static const struct {
176 { ATI_VENDOR_ID, ATI_IXP_200_ID, "ATI IXP 200" },
177 { ATI_VENDOR_ID, ATI_IXP_300_ID, "ATI IXP 300" },
178 { ATI_VENDOR_ID, ATI_IXP_400_ID, "ATI IXP 400" },
179 { ATI_VENDOR_ID, ATI_IXP_SB600_ID, "ATI IXP SB600" },
182 static void atiixp_enable_interrupts(struct atiixp_info *);
183 static void atiixp_disable_interrupts(struct atiixp_info *);
184 static void atiixp_reset_aclink(struct atiixp_info *);
185 static void atiixp_flush_dma(struct atiixp_chinfo *);
186 static void atiixp_enable_dma(struct atiixp_chinfo *);
187 static void atiixp_disable_dma(struct atiixp_chinfo *);
189 static int atiixp_waitready_codec(struct atiixp_info *);
190 static int atiixp_rdcd(kobj_t, void *, int);
191 static int atiixp_wrcd(kobj_t, void *, int, uint32_t);
193 static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *,
194 struct pcm_channel *, int);
195 static int atiixp_chan_setformat(kobj_t, void *, uint32_t);
196 static uint32_t atiixp_chan_setspeed(kobj_t, void *, uint32_t);
197 static int atiixp_chan_setfragments(kobj_t, void *, uint32_t, uint32_t);
198 static uint32_t atiixp_chan_setblocksize(kobj_t, void *, uint32_t);
199 static void atiixp_buildsgdt(struct atiixp_chinfo *);
200 static int atiixp_chan_trigger(kobj_t, void *, int);
201 static __inline uint32_t atiixp_dmapos(struct atiixp_chinfo *);
202 static uint32_t atiixp_chan_getptr(kobj_t, void *);
203 static struct pcmchan_caps *atiixp_chan_getcaps(kobj_t, void *);
205 static void atiixp_intr(void *);
206 static void atiixp_dma_cb(void *, bus_dma_segment_t *, int, int);
207 static void atiixp_chip_pre_init(struct atiixp_info *);
208 static void atiixp_chip_post_init(void *);
209 static void atiixp_release_resource(struct atiixp_info *);
210 static int atiixp_pci_probe(device_t);
211 static int atiixp_pci_attach(device_t);
212 static int atiixp_pci_detach(device_t);
213 static int atiixp_pci_suspend(device_t);
214 static int atiixp_pci_resume(device_t);
217 * ATI IXP helper functions
220 atiixp_enable_interrupts(struct atiixp_info *sc)
224 /* clear all pending */
225 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff);
227 /* enable all relevant interrupt sources we can handle */
228 value = atiixp_rd(sc, ATI_REG_IER);
230 value |= ATI_REG_IER_IO_STATUS_EN;
233 * Disable / ignore internal xrun/spdf interrupt flags
234 * since it doesn't interest us (for now).
237 value &= ~(ATI_REG_IER_IN_XRUN_EN | ATI_REG_IER_OUT_XRUN_EN |
238 ATI_REG_IER_SPDF_XRUN_EN | ATI_REG_IER_SPDF_STATUS_EN);
240 value |= ATI_REG_IER_IN_XRUN_EN;
241 value |= ATI_REG_IER_OUT_XRUN_EN;
243 value |= ATI_REG_IER_SPDF_XRUN_EN;
244 value |= ATI_REG_IER_SPDF_STATUS_EN;
247 atiixp_wr(sc, ATI_REG_IER, value);
251 atiixp_disable_interrupts(struct atiixp_info *sc)
253 /* disable all interrupt sources */
254 atiixp_wr(sc, ATI_REG_IER, 0);
256 /* clear all pending */
257 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff);
261 atiixp_reset_aclink(struct atiixp_info *sc)
263 uint32_t value, timeout;
265 /* if power is down, power it up */
266 value = atiixp_rd(sc, ATI_REG_CMD);
267 if (value & ATI_REG_CMD_POWERDOWN) {
268 /* explicitly enable power */
269 value &= ~ATI_REG_CMD_POWERDOWN;
270 atiixp_wr(sc, ATI_REG_CMD, value);
272 /* have to wait at least 10 usec for it to initialise */
276 /* perform a soft reset */
277 value = atiixp_rd(sc, ATI_REG_CMD);
278 value |= ATI_REG_CMD_AC_SOFT_RESET;
279 atiixp_wr(sc, ATI_REG_CMD, value);
281 /* need to read the CMD reg and wait aprox. 10 usec to init */
282 value = atiixp_rd(sc, ATI_REG_CMD);
285 /* clear soft reset flag again */
286 value = atiixp_rd(sc, ATI_REG_CMD);
287 value &= ~ATI_REG_CMD_AC_SOFT_RESET;
288 atiixp_wr(sc, ATI_REG_CMD, value);
290 /* check if the ac-link is working; reset device otherwise */
292 value = atiixp_rd(sc, ATI_REG_CMD);
293 while (!(value & ATI_REG_CMD_ACLINK_ACTIVE) && --timeout) {
295 device_printf(sc->dev, "not up; resetting aclink hardware\n");
298 /* dip aclink reset but keep the acsync */
299 value &= ~ATI_REG_CMD_AC_RESET;
300 value |= ATI_REG_CMD_AC_SYNC;
301 atiixp_wr(sc, ATI_REG_CMD, value);
303 /* need to read CMD again and wait again (clocking in issue?) */
304 value = atiixp_rd(sc, ATI_REG_CMD);
307 /* assert aclink reset again */
308 value = atiixp_rd(sc, ATI_REG_CMD);
309 value |= ATI_REG_CMD_AC_RESET;
310 atiixp_wr(sc, ATI_REG_CMD, value);
312 /* check if its active now */
313 value = atiixp_rd(sc, ATI_REG_CMD);
317 device_printf(sc->dev, "giving up aclink reset\n");
320 device_printf(sc->dev, "aclink hardware reset successful\n");
323 /* assert reset and sync for safety */
324 value = atiixp_rd(sc, ATI_REG_CMD);
325 value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET;
326 atiixp_wr(sc, ATI_REG_CMD, value);
330 atiixp_flush_dma(struct atiixp_chinfo *ch)
332 atiixp_wr(ch->parent, ATI_REG_FIFO_FLUSH, ch->flush_bit);
336 atiixp_enable_dma(struct atiixp_chinfo *ch)
340 value = atiixp_rd(ch->parent, ATI_REG_CMD);
341 if (!(value & ch->enable_bit)) {
342 value |= ch->enable_bit;
343 atiixp_wr(ch->parent, ATI_REG_CMD, value);
348 atiixp_disable_dma(struct atiixp_chinfo *ch)
352 value = atiixp_rd(ch->parent, ATI_REG_CMD);
353 if (value & ch->enable_bit) {
354 value &= ~ch->enable_bit;
355 atiixp_wr(ch->parent, ATI_REG_CMD, value);
363 atiixp_waitready_codec(struct atiixp_info *sc)
368 if ((atiixp_rd(sc, ATI_REG_PHYS_OUT_ADDR) &
369 ATI_REG_PHYS_OUT_ADDR_EN) == 0)
378 atiixp_rdcd(kobj_t obj, void *devinfo, int reg)
380 struct atiixp_info *sc = devinfo;
384 if (atiixp_waitready_codec(sc))
387 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
388 ATI_REG_PHYS_OUT_ADDR_EN | ATI_REG_PHYS_OUT_RW | sc->codec_idx;
390 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data);
392 if (atiixp_waitready_codec(sc))
397 data = atiixp_rd(sc, ATI_REG_PHYS_IN_ADDR);
398 if (data & ATI_REG_PHYS_IN_READ_FLAG)
399 return (data >> ATI_REG_PHYS_IN_DATA_SHIFT);
404 device_printf(sc->dev, "codec read timeout! (reg 0x%x)\n", reg);
410 atiixp_wrcd(kobj_t obj, void *devinfo, int reg, uint32_t data)
412 struct atiixp_info *sc = devinfo;
414 if (atiixp_waitready_codec(sc))
417 data = (data << ATI_REG_PHYS_OUT_DATA_SHIFT) |
418 (((uint32_t)reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
419 ATI_REG_PHYS_OUT_ADDR_EN | sc->codec_idx;
421 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data);
426 static kobj_method_t atiixp_ac97_methods[] = {
427 KOBJMETHOD(ac97_read, atiixp_rdcd),
428 KOBJMETHOD(ac97_write, atiixp_wrcd),
431 AC97_DECLARE(atiixp_ac97);
434 * Playback / Record channel interface
437 atiixp_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
438 struct pcm_channel *c, int dir)
440 struct atiixp_info *sc = devinfo;
441 struct atiixp_chinfo *ch;
446 if (dir == PCMDIR_PLAY) {
448 ch->linkptr_bit = ATI_REG_OUT_DMA_LINKPTR;
449 ch->enable_bit = ATI_REG_CMD_OUT_DMA_EN | ATI_REG_CMD_SEND_EN;
450 ch->flush_bit = ATI_REG_FIFO_OUT_FLUSH;
451 ch->dt_cur_bit = ATI_REG_OUT_DMA_DT_CUR;
452 /* Native 32bit playback working properly */
456 ch->linkptr_bit = ATI_REG_IN_DMA_LINKPTR;
457 ch->enable_bit = ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_RECEIVE_EN;
458 ch->flush_bit = ATI_REG_FIFO_IN_FLUSH;
459 ch->dt_cur_bit = ATI_REG_IN_DMA_DT_CUR;
460 /* XXX Native 32bit recording appear to be broken */
468 ch->blkcnt = sc->blkcnt;
469 ch->blksz = sc->bufsz / ch->blkcnt;
473 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) == -1)
477 num = sc->registered_channels++;
478 ch->sgd_table = &sc->sgd_table[num * ATI_IXP_DMA_CHSEGS_MAX];
479 ch->sgd_addr = sc->sgd_addr + (num * ATI_IXP_DMA_CHSEGS_MAX *
480 sizeof(struct atiixp_dma_op));
481 atiixp_disable_dma(ch);
488 atiixp_chan_setformat(kobj_t obj, void *data, uint32_t format)
490 struct atiixp_chinfo *ch = data;
491 struct atiixp_info *sc = ch->parent;
495 if (ch->dir == PCMDIR_REC) {
496 value = atiixp_rd(sc, ATI_REG_CMD);
497 value &= ~ATI_REG_CMD_INTERLEAVE_IN;
498 if ((format & AFMT_32BIT) == 0)
499 value |= ATI_REG_CMD_INTERLEAVE_IN;
500 atiixp_wr(sc, ATI_REG_CMD, value);
502 value = atiixp_rd(sc, ATI_REG_OUT_DMA_SLOT);
503 value &= ~ATI_REG_OUT_DMA_SLOT_MASK;
504 /* We do not have support for more than 2 channels, _yet_. */
505 value |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
506 ATI_REG_OUT_DMA_SLOT_BIT(4);
507 value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
508 atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value);
509 value = atiixp_rd(sc, ATI_REG_CMD);
510 value &= ~ATI_REG_CMD_INTERLEAVE_OUT;
511 if ((format & AFMT_32BIT) == 0)
512 value |= ATI_REG_CMD_INTERLEAVE_OUT;
513 atiixp_wr(sc, ATI_REG_CMD, value);
514 value = atiixp_rd(sc, ATI_REG_6CH_REORDER);
515 value &= ~ATI_REG_6CH_REORDER_EN;
516 atiixp_wr(sc, ATI_REG_6CH_REORDER, value);
525 atiixp_chan_setspeed(kobj_t obj, void *data, uint32_t spd)
527 /* XXX We're supposed to do VRA/DRA processing right here */
528 return (ATI_IXP_BASE_RATE);
532 atiixp_chan_setfragments(kobj_t obj, void *data,
533 uint32_t blksz, uint32_t blkcnt)
535 struct atiixp_chinfo *ch = data;
536 struct atiixp_info *sc = ch->parent;
538 blksz &= ATI_IXP_BLK_ALIGN;
540 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ATI_IXP_DMA_CHSEGS_MIN))
541 blksz = sndbuf_getmaxsize(ch->buffer) / ATI_IXP_DMA_CHSEGS_MIN;
542 if (blksz < ATI_IXP_BLK_MIN)
543 blksz = ATI_IXP_BLK_MIN;
544 if (blkcnt > ATI_IXP_DMA_CHSEGS_MAX)
545 blkcnt = ATI_IXP_DMA_CHSEGS_MAX;
546 if (blkcnt < ATI_IXP_DMA_CHSEGS_MIN)
547 blkcnt = ATI_IXP_DMA_CHSEGS_MIN;
549 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) {
550 if ((blkcnt >> 1) >= ATI_IXP_DMA_CHSEGS_MIN)
552 else if ((blksz >> 1) >= ATI_IXP_BLK_MIN)
558 if ((sndbuf_getblksz(ch->buffer) != blksz ||
559 sndbuf_getblkcnt(ch->buffer) != blkcnt) &&
560 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
561 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
562 __func__, blksz, blkcnt);
564 ch->blksz = sndbuf_getblksz(ch->buffer);
565 ch->blkcnt = sndbuf_getblkcnt(ch->buffer);
571 atiixp_chan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
573 struct atiixp_chinfo *ch = data;
574 struct atiixp_info *sc = ch->parent;
576 atiixp_chan_setfragments(obj, data, blksz, sc->blkcnt);
582 atiixp_buildsgdt(struct atiixp_chinfo *ch)
584 struct atiixp_info *sc = ch->parent;
585 uint32_t addr, blksz, blkcnt;
588 addr = sndbuf_getbufaddr(ch->buffer);
590 if (sc->polling != 0) {
591 blksz = ch->blksz * ch->blkcnt;
598 for (i = 0; i < blkcnt; i++) {
599 ch->sgd_table[i].addr = htole32(addr + (i * blksz));
600 ch->sgd_table[i].status = htole16(0);
601 ch->sgd_table[i].size = htole16(blksz >> 2);
602 ch->sgd_table[i].next = htole32((uint32_t)ch->sgd_addr +
603 (((i + 1) % blkcnt) * sizeof(struct atiixp_dma_op)));
607 static __inline uint32_t
608 atiixp_dmapos(struct atiixp_chinfo *ch)
610 struct atiixp_info *sc = ch->parent;
611 uint32_t reg, addr, sz, retry;
612 volatile uint32_t ptr;
614 reg = ch->dt_cur_bit;
615 addr = sndbuf_getbufaddr(ch->buffer);
616 sz = ch->blkcnt * ch->blksz;
617 retry = ATI_IXP_DMA_RETRY_MAX;
620 ptr = atiixp_rd(sc, reg);
627 if ((ptr & ~(ch->blksz - 1)) != ch->ptr) {
630 delta = (sz + ptr - ch->prevptr) % sz;
631 #ifndef ATI_IXP_DEBUG_VERBOSE
632 if (delta < ch->blksz)
634 device_printf(sc->dev,
635 "PCMDIR_%s: incoherent DMA "
638 "[delta=%u != blksz=%u] "
640 (ch->dir == PCMDIR_PLAY) ?
645 (delta < ch->blksz) ?
646 "OVERLAPPED!" : "Ok");
647 ch->ptr = ptr & ~(ch->blksz - 1);
656 device_printf(sc->dev, "PCMDIR_%s: invalid DMA pointer ptr=%u\n",
657 (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ptr);
663 atiixp_poll_channel(struct atiixp_chinfo *ch)
666 volatile uint32_t ptr;
668 if (!(ch->flags & ATI_IXP_CHN_RUNNING))
671 sz = ch->blksz * ch->blkcnt;
672 ptr = atiixp_dmapos(ch);
675 ptr &= ~(ch->blksz - 1);
676 delta = (sz + ptr - ch->prevptr) % sz;
678 if (delta < ch->blksz)
686 #define atiixp_chan_active(sc) (((sc)->pch.flags | (sc)->rch.flags) & \
690 atiixp_poll_callback(void *arg)
692 struct atiixp_info *sc = arg;
693 uint32_t trigger = 0;
699 if (sc->polling == 0 || atiixp_chan_active(sc) == 0) {
704 trigger |= (atiixp_poll_channel(&sc->pch) != 0) ? 1 : 0;
705 trigger |= (atiixp_poll_channel(&sc->rch) != 0) ? 2 : 0;
708 callout_reset(&sc->poll_timer, 1/*sc->poll_ticks*/,
709 atiixp_poll_callback, sc);
714 chn_intr(sc->pch.channel);
716 chn_intr(sc->rch.channel);
720 atiixp_chan_trigger(kobj_t obj, void *data, int go)
722 struct atiixp_chinfo *ch = data;
723 struct atiixp_info *sc = ch->parent;
727 if (!PCMTRIG_COMMON(go))
734 atiixp_flush_dma(ch);
735 atiixp_buildsgdt(ch);
736 atiixp_wr(sc, ch->linkptr_bit, 0);
737 atiixp_enable_dma(ch);
738 atiixp_wr(sc, ch->linkptr_bit,
739 (uint32_t)ch->sgd_addr | ATI_REG_LINKPTR_EN);
740 if (sc->polling != 0) {
743 pollticks = ((uint64_t)hz * ch->blksz) /
744 ((uint64_t)sndbuf_getalign(ch->buffer) *
745 sndbuf_getspd(ch->buffer));
751 if (atiixp_chan_active(sc) == 0 ||
752 pollticks < sc->poll_ticks) {
754 if (atiixp_chan_active(sc) == 0)
755 device_printf(sc->dev,
756 "%s: pollticks=%d\n",
757 __func__, pollticks);
759 device_printf(sc->dev,
760 "%s: pollticks %d -> %d\n",
761 __func__, sc->poll_ticks,
764 sc->poll_ticks = pollticks;
765 callout_reset(&sc->poll_timer, 1,
766 atiixp_poll_callback, sc);
769 ch->flags |= ATI_IXP_CHN_RUNNING;
773 atiixp_disable_dma(ch);
774 atiixp_flush_dma(ch);
775 ch->flags &= ~ATI_IXP_CHN_RUNNING;
776 if (sc->polling != 0) {
777 if (atiixp_chan_active(sc) == 0) {
778 callout_stop(&sc->poll_timer);
781 if (sc->pch.flags & ATI_IXP_CHN_RUNNING)
785 pollticks = ((uint64_t)hz * ch->blksz) /
786 ((uint64_t)sndbuf_getalign(ch->buffer) *
787 sndbuf_getspd(ch->buffer));
793 if (pollticks > sc->poll_ticks) {
795 device_printf(sc->dev,
796 "%s: pollticks %d -> %d\n",
797 __func__, sc->poll_ticks,
799 sc->poll_ticks = pollticks;
800 callout_reset(&sc->poll_timer,
801 1, atiixp_poll_callback,
813 /* Update bus busy status */
814 value = atiixp_rd(sc, ATI_REG_IER);
815 if (atiixp_rd(sc, ATI_REG_CMD) & (ATI_REG_CMD_SEND_EN |
816 ATI_REG_CMD_RECEIVE_EN | ATI_REG_CMD_SPDF_OUT_EN))
817 value |= ATI_REG_IER_SET_BUS_BUSY;
819 value &= ~ATI_REG_IER_SET_BUS_BUSY;
820 atiixp_wr(sc, ATI_REG_IER, value);
828 atiixp_chan_getptr(kobj_t obj, void *data)
830 struct atiixp_chinfo *ch = data;
831 struct atiixp_info *sc = ch->parent;
835 if (sc->polling != 0)
838 ptr = atiixp_dmapos(ch);
844 static struct pcmchan_caps *
845 atiixp_chan_getcaps(kobj_t obj, void *data)
847 struct atiixp_chinfo *ch = data;
850 return (&atiixp_caps_32bit);
851 return (&atiixp_caps);
854 static kobj_method_t atiixp_chan_methods[] = {
855 KOBJMETHOD(channel_init, atiixp_chan_init),
856 KOBJMETHOD(channel_setformat, atiixp_chan_setformat),
857 KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed),
858 KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize),
859 KOBJMETHOD(channel_setfragments, atiixp_chan_setfragments),
860 KOBJMETHOD(channel_trigger, atiixp_chan_trigger),
861 KOBJMETHOD(channel_getptr, atiixp_chan_getptr),
862 KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps),
865 CHANNEL_DECLARE(atiixp_chan);
868 * PCI driver interface
873 struct atiixp_info *sc = p;
874 uint32_t status, enable, detected_codecs;
875 uint32_t trigger = 0;
878 if (sc->polling != 0) {
882 status = atiixp_rd(sc, ATI_REG_ISR);
889 if ((status & ATI_REG_ISR_OUT_STATUS) &&
890 (sc->pch.flags & ATI_IXP_CHN_RUNNING))
892 if ((status & ATI_REG_ISR_IN_STATUS) &&
893 (sc->rch.flags & ATI_IXP_CHN_RUNNING))
897 if (status & ATI_REG_ISR_IN_XRUN) {
898 device_printf(sc->dev,
899 "Recieve IN XRUN interrupt\n");
901 if (status & ATI_REG_ISR_OUT_XRUN) {
902 device_printf(sc->dev,
903 "Recieve OUT XRUN interrupt\n");
907 if (status & CODEC_CHECK_BITS) {
908 /* mark missing codecs as not ready */
909 detected_codecs = status & CODEC_CHECK_BITS;
910 sc->codec_not_ready_bits |= detected_codecs;
912 /* disable detected interrupt sources */
913 enable = atiixp_rd(sc, ATI_REG_IER);
914 enable &= ~detected_codecs;
915 atiixp_wr(sc, ATI_REG_IER, enable);
920 atiixp_wr(sc, ATI_REG_ISR, status);
924 chn_intr(sc->pch.channel);
926 chn_intr(sc->rch.channel);
930 atiixp_dma_cb(void *p, bus_dma_segment_t *bds, int a, int b)
932 struct atiixp_info *sc = (struct atiixp_info *)p;
933 sc->sgd_addr = bds->ds_addr;
937 atiixp_chip_pre_init(struct atiixp_info *sc)
943 /* disable interrupts */
944 atiixp_disable_interrupts(sc);
946 /* clear all DMA enables (preserving rest of settings) */
947 value = atiixp_rd(sc, ATI_REG_CMD);
948 value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN |
949 ATI_REG_CMD_SPDF_OUT_EN );
950 atiixp_wr(sc, ATI_REG_CMD, value);
953 atiixp_reset_aclink(sc);
955 sc->codec_not_ready_bits = 0;
957 /* enable all codecs to interrupt as well as the new frame interrupt */
958 atiixp_wr(sc, ATI_REG_IER, CODEC_CHECK_BITS);
964 sysctl_atiixp_polling(SYSCTL_HANDLER_ARGS)
966 struct atiixp_info *sc;
970 dev = oidp->oid_arg1;
971 sc = pcm_getdevinfo(dev);
977 err = sysctl_handle_int(oidp, &val, 0, req);
979 if (err || req->newptr == NULL)
981 if (val < 0 || val > 1)
985 if (val != sc->polling) {
986 if (atiixp_chan_active(sc) != 0)
989 atiixp_enable_interrupts(sc);
993 atiixp_disable_interrupts(sc);
1004 atiixp_chip_post_init(void *arg)
1006 struct atiixp_info *sc = (struct atiixp_info *)arg;
1008 int i, timeout, found, polling;
1009 char status[SND_STATUSLEN];
1013 if (sc->delayed_attach.ich_func) {
1014 config_intrhook_disestablish(&sc->delayed_attach);
1015 sc->delayed_attach.ich_func = NULL;
1018 polling = sc->polling;
1022 if (sc->codec_not_ready_bits == 0) {
1023 /* wait for the interrupts to happen */
1025 msleep(sc, sc->lock, PWAIT, "ixpslp", max(hz / 10, 1));
1026 if (sc->codec_not_ready_bits != 0)
1028 } while (--timeout);
1031 sc->polling = polling;
1032 atiixp_disable_interrupts(sc);
1034 if (sc->codec_not_ready_bits == 0 && timeout == 0) {
1035 device_printf(sc->dev,
1036 "WARNING: timeout during codec detection; "
1037 "codecs might be present but haven't interrupted\n");
1045 * ATI IXP can have upto 3 codecs, but single codec should be
1048 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) {
1049 /* codec 0 present */
1055 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) {
1056 /* codec 1 present */
1060 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) {
1061 /* codec 2 present */
1070 /* create/init mixer */
1071 sc->codec = AC97_CREATE(sc->dev, sc, atiixp_ac97);
1072 if (sc->codec == NULL)
1075 subdev = (pci_get_subdevice(sc->dev) << 16) |
1076 pci_get_subvendor(sc->dev);
1078 case 0x11831043: /* ASUS A6R */
1079 case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */
1080 ac97_setflags(sc->codec, ac97_getflags(sc->codec) |
1087 mixer_init(sc->dev, ac97_getmixerclass(), sc->codec);
1089 if (pcm_register(sc->dev, sc, ATI_IXP_NPCHAN, ATI_IXP_NRCHAN))
1092 for (i = 0; i < ATI_IXP_NPCHAN; i++)
1093 pcm_addchan(sc->dev, PCMDIR_PLAY, &atiixp_chan_class, sc);
1094 for (i = 0; i < ATI_IXP_NRCHAN; i++)
1095 pcm_addchan(sc->dev, PCMDIR_REC, &atiixp_chan_class, sc);
1097 SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
1098 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
1099 "polling", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc->dev,
1100 sizeof(sc->dev), sysctl_atiixp_polling, "I", "Enable polling mode");
1102 snprintf(status, SND_STATUSLEN, "at memory 0x%jx irq %jd %s",
1103 rman_get_start(sc->reg), rman_get_start(sc->irq),
1104 PCM_KLDSTRING(snd_atiixp));
1106 pcm_setstatus(sc->dev, status);
1109 if (sc->polling == 0)
1110 atiixp_enable_interrupts(sc);
1116 atiixp_release_resource(sc);
1120 atiixp_release_resource(struct atiixp_info *sc)
1124 if (sc->registered_channels != 0) {
1127 callout_stop(&sc->poll_timer);
1129 callout_drain(&sc->poll_timer);
1132 ac97_destroy(sc->codec);
1136 bus_teardown_intr(sc->dev, sc->irq, sc->ih);
1140 bus_release_resource(sc->dev, sc->regtype, sc->regid, sc->reg);
1144 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irqid, sc->irq);
1147 if (sc->parent_dmat) {
1148 bus_dma_tag_destroy(sc->parent_dmat);
1149 sc->parent_dmat = NULL;
1152 bus_dmamap_unload(sc->sgd_dmat, sc->sgd_dmamap);
1155 if (sc->sgd_table) {
1156 bus_dmamem_free(sc->sgd_dmat, sc->sgd_table, sc->sgd_dmamap);
1157 sc->sgd_table = NULL;
1160 bus_dma_tag_destroy(sc->sgd_dmat);
1161 sc->sgd_dmat = NULL;
1164 snd_mtxfree(sc->lock);
1171 atiixp_pci_probe(device_t dev)
1174 uint16_t devid, vendor;
1176 vendor = pci_get_vendor(dev);
1177 devid = pci_get_device(dev);
1178 for (i = 0; i < sizeof(atiixp_hw) / sizeof(atiixp_hw[0]); i++) {
1179 if (vendor == atiixp_hw[i].vendor &&
1180 devid == atiixp_hw[i].devid) {
1181 device_set_desc(dev, atiixp_hw[i].desc);
1182 return (BUS_PROBE_DEFAULT);
1190 atiixp_pci_attach(device_t dev)
1192 struct atiixp_info *sc;
1195 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
1196 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_atiixp softc");
1199 callout_init(&sc->poll_timer, 1);
1202 if (resource_int_value(device_get_name(sc->dev),
1203 device_get_unit(sc->dev), "polling", &i) == 0 && i != 0)
1208 pci_enable_busmaster(dev);
1210 sc->regid = PCIR_BAR(0);
1211 sc->regtype = SYS_RES_MEMORY;
1212 sc->reg = bus_alloc_resource_any(dev, sc->regtype,
1213 &sc->regid, RF_ACTIVE);
1216 device_printf(dev, "unable to allocate register space\n");
1220 sc->st = rman_get_bustag(sc->reg);
1221 sc->sh = rman_get_bushandle(sc->reg);
1223 sc->bufsz = pcm_getbuffersize(dev, ATI_IXP_BUFSZ_MIN,
1224 ATI_IXP_BUFSZ_DEFAULT, ATI_IXP_BUFSZ_MAX);
1227 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
1228 RF_ACTIVE | RF_SHAREABLE);
1229 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE,
1230 atiixp_intr, sc, &sc->ih)) {
1231 device_printf(dev, "unable to map interrupt\n");
1236 * Let the user choose the best DMA segments.
1238 if (resource_int_value(device_get_name(dev),
1239 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1240 i &= ATI_IXP_BLK_ALIGN;
1241 if (i < ATI_IXP_BLK_MIN)
1242 i = ATI_IXP_BLK_MIN;
1243 sc->blkcnt = sc->bufsz / i;
1245 while (sc->blkcnt >> i)
1247 sc->blkcnt = 1 << (i - 1);
1248 if (sc->blkcnt < ATI_IXP_DMA_CHSEGS_MIN)
1249 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MIN;
1250 else if (sc->blkcnt > ATI_IXP_DMA_CHSEGS_MAX)
1251 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MAX;
1254 sc->blkcnt = ATI_IXP_DMA_CHSEGS;
1257 * DMA tag for scatter-gather buffers and link pointers
1259 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
1261 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1262 /*highaddr*/BUS_SPACE_MAXADDR,
1263 /*filter*/NULL, /*filterarg*/NULL,
1264 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1265 /*flags*/0, /*lockfunc*/NULL,
1266 /*lockarg*/NULL, &sc->parent_dmat) != 0) {
1267 device_printf(dev, "unable to create dma tag\n");
1271 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
1273 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1274 /*highaddr*/BUS_SPACE_MAXADDR,
1275 /*filter*/NULL, /*filterarg*/NULL,
1276 /*maxsize*/ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS *
1277 sizeof(struct atiixp_dma_op),
1278 /*nsegments*/1, /*maxsegz*/0x3ffff,
1279 /*flags*/0, /*lockfunc*/NULL,
1280 /*lockarg*/NULL, &sc->sgd_dmat) != 0) {
1281 device_printf(dev, "unable to create dma tag\n");
1285 if (bus_dmamem_alloc(sc->sgd_dmat, (void **)&sc->sgd_table,
1286 BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1)
1289 if (bus_dmamap_load(sc->sgd_dmat, sc->sgd_dmamap, sc->sgd_table,
1290 ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS *
1291 sizeof(struct atiixp_dma_op), atiixp_dma_cb, sc, 0))
1294 atiixp_chip_pre_init(sc);
1296 sc->delayed_attach.ich_func = atiixp_chip_post_init;
1297 sc->delayed_attach.ich_arg = sc;
1299 config_intrhook_establish(&sc->delayed_attach) != 0) {
1300 sc->delayed_attach.ich_func = NULL;
1301 atiixp_chip_post_init(sc);
1307 atiixp_release_resource(sc);
1312 atiixp_pci_detach(device_t dev)
1315 struct atiixp_info *sc;
1317 sc = pcm_getdevinfo(dev);
1319 if (sc->codec != NULL) {
1320 r = pcm_unregister(dev);
1325 if (sc->st != 0 && sc->sh != 0)
1326 atiixp_disable_interrupts(sc);
1327 atiixp_release_resource(sc);
1333 atiixp_pci_suspend(device_t dev)
1335 struct atiixp_info *sc = pcm_getdevinfo(dev);
1338 /* quickly disable interrupts and save channels active state */
1340 atiixp_disable_interrupts(sc);
1343 /* stop everything */
1344 if (sc->pch.flags & ATI_IXP_CHN_RUNNING) {
1345 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_STOP);
1346 sc->pch.flags |= ATI_IXP_CHN_SUSPEND;
1348 if (sc->rch.flags & ATI_IXP_CHN_RUNNING) {
1349 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_STOP);
1350 sc->rch.flags |= ATI_IXP_CHN_SUSPEND;
1353 /* power down aclink and pci bus */
1355 value = atiixp_rd(sc, ATI_REG_CMD);
1356 value |= ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET;
1357 atiixp_wr(sc, ATI_REG_CMD, ATI_REG_CMD_POWERDOWN);
1364 atiixp_pci_resume(device_t dev)
1366 struct atiixp_info *sc = pcm_getdevinfo(dev);
1369 /* reset / power up aclink */
1370 atiixp_reset_aclink(sc);
1373 if (mixer_reinit(dev) == -1) {
1374 device_printf(dev, "unable to reinitialize the mixer\n");
1379 * Resume channel activities. Reset channel format regardless
1380 * of its previous state.
1382 if (sc->pch.channel != NULL) {
1383 if (sc->pch.fmt != 0)
1384 atiixp_chan_setformat(NULL, &sc->pch, sc->pch.fmt);
1385 if (sc->pch.flags & ATI_IXP_CHN_SUSPEND) {
1386 sc->pch.flags &= ~ATI_IXP_CHN_SUSPEND;
1387 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_START);
1390 if (sc->rch.channel != NULL) {
1391 if (sc->rch.fmt != 0)
1392 atiixp_chan_setformat(NULL, &sc->rch, sc->rch.fmt);
1393 if (sc->rch.flags & ATI_IXP_CHN_SUSPEND) {
1394 sc->rch.flags &= ~ATI_IXP_CHN_SUSPEND;
1395 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_START);
1399 /* enable interrupts */
1401 if (sc->polling == 0)
1402 atiixp_enable_interrupts(sc);
1408 static device_method_t atiixp_methods[] = {
1409 DEVMETHOD(device_probe, atiixp_pci_probe),
1410 DEVMETHOD(device_attach, atiixp_pci_attach),
1411 DEVMETHOD(device_detach, atiixp_pci_detach),
1412 DEVMETHOD(device_suspend, atiixp_pci_suspend),
1413 DEVMETHOD(device_resume, atiixp_pci_resume),
1417 static driver_t atiixp_driver = {
1423 DRIVER_MODULE(snd_atiixp, pci, atiixp_driver, pcm_devclass, 0, 0);
1424 MODULE_DEPEND(snd_atiixp, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1425 MODULE_VERSION(snd_atiixp, 1);