2 * Copyright (c) 1999 Seigo Tanimura
5 * Portions of this source are based on cwcealdr.cpp and dhwiface.cpp in
6 * cwcealdr1.zip, the sample sources by Crystal Semiconductor.
7 * Copyright (c) 1996-1998 Crystal Semiconductor Corp.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/soundcard.h>
32 #include <dev/sound/pcm/sound.h>
33 #include <dev/sound/pcm/ac97.h>
34 #include <dev/sound/chip.h>
35 #include <dev/sound/pci/csareg.h>
36 #include <dev/sound/pci/csavar.h>
38 #include <dev/pci/pcireg.h>
39 #include <dev/pci/pcivar.h>
41 SND_DECLARE_FILE("$FreeBSD$");
43 /* Buffer size on dma transfer. Fixed for CS416x. */
44 #define CS461x_BUFFSIZE (4 * 1024)
46 #define GOF_PER_SEC 200
48 /* device private data */
52 struct csa_info *parent;
53 struct pcm_channel *channel;
54 struct snd_dbuf *buffer;
61 csa_res res; /* resource */
62 void *ih; /* Interrupt cookie */
63 bus_dma_tag_t parent_dmat; /* DMA tag */
64 struct csa_bridgeinfo *binfo; /* The state of the parent. */
65 struct csa_card *card;
68 /* Contents of board's registers */
72 struct csa_chinfo pch, rch;
73 u_int32_t ac97[CS461x_AC97_NUMBER_RESTORE_REGS];
74 u_int32_t ac97_powerdown;
75 u_int32_t ac97_general_purpose;
78 /* -------------------------------------------------------------------- */
81 static int csa_init(struct csa_info *);
82 static void csa_intr(void *);
83 static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate);
84 static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate);
85 static void csa_startplaydma(struct csa_info *csa);
86 static void csa_startcapturedma(struct csa_info *csa);
87 static void csa_stopplaydma(struct csa_info *csa);
88 static void csa_stopcapturedma(struct csa_info *csa);
89 static int csa_startdsp(csa_res *resp);
90 static int csa_stopdsp(csa_res *resp);
91 static int csa_allocres(struct csa_info *scp, device_t dev);
92 static void csa_releaseres(struct csa_info *scp, device_t dev);
93 static void csa_ac97_suspend(struct csa_info *csa);
94 static void csa_ac97_resume(struct csa_info *csa);
96 static u_int32_t csa_playfmt[] = {
98 AFMT_STEREO | AFMT_U8,
100 AFMT_STEREO | AFMT_S8,
102 AFMT_STEREO | AFMT_S16_LE,
104 AFMT_STEREO | AFMT_S16_BE,
107 static struct pcmchan_caps csa_playcaps = {8000, 48000, csa_playfmt, 0};
109 static u_int32_t csa_recfmt[] = {
111 AFMT_STEREO | AFMT_S16_LE,
114 static struct pcmchan_caps csa_reccaps = {11025, 48000, csa_recfmt, 0};
116 /* -------------------------------------------------------------------- */
119 csa_active(struct csa_info *csa, int run)
126 if ((csa->active > 1) || (csa->active < -1))
128 if (csa->card->active)
129 return (csa->card->active(!(csa->active && old)));
134 /* -------------------------------------------------------------------- */
138 csa_rdcd(kobj_t obj, void *devinfo, int regno)
141 struct csa_info *csa = (struct csa_info *)devinfo;
144 if (csa_readcodec(&csa->res, regno + BA0_AC97_RESET, &data))
152 csa_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
154 struct csa_info *csa = (struct csa_info *)devinfo;
157 csa_writecodec(&csa->res, regno + BA0_AC97_RESET, data);
163 static kobj_method_t csa_ac97_methods[] = {
164 KOBJMETHOD(ac97_read, csa_rdcd),
165 KOBJMETHOD(ac97_write, csa_wrcd),
168 AC97_DECLARE(csa_ac97);
171 csa_setplaysamplerate(csa_res *resp, u_long ulInRate)
173 u_long ulTemp1, ulTemp2;
175 u_long ulCorrectionPerGOF, ulCorrectionPerSec;
181 * Compute the values used to drive the actual sample rate conversion.
182 * The following formulas are being computed, using inline assembly
183 * since we need to use 64 bit arithmetic to compute the values:
185 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out)
186 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) /
188 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
189 * GOF_PER_SEC * ulCorrectionPerGOF
193 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
194 * ulCorrectionPerGOF:ulCorrectionPerSec =
195 * dividend:remainder(ulOther / GOF_PER_SEC)
197 ulTemp1 = ulInRate << 16;
198 ulPhiIncr = ulTemp1 / ulOutRate;
199 ulTemp1 -= ulPhiIncr * ulOutRate;
202 ulTemp2 = ulTemp1 / ulOutRate;
203 ulPhiIncr += ulTemp2;
204 ulTemp1 -= ulTemp2 * ulOutRate;
205 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC;
206 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC;
207 ulCorrectionPerSec = ulTemp1;
210 * Fill in the SampleRateConverter control block.
212 csa_writemem(resp, BA1_PSRC, ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF));
213 csa_writemem(resp, BA1_PPI, ulPhiIncr);
217 csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate)
219 u_long ulPhiIncr, ulCoeffIncr, ulTemp1, ulTemp2;
220 u_long ulCorrectionPerGOF, ulCorrectionPerSec, ulInitialDelay;
221 u_long dwFrameGroupLength, dwCnt;
227 * We can only decimate by up to a factor of 1/9th the hardware rate.
228 * Return an error if an attempt is made to stray outside that limit.
230 if((ulOutRate * 9) < ulInRate)
234 * We can not capture at at rate greater than the Input Rate (48000).
235 * Return an error if an attempt is made to stray outside that limit.
237 if(ulOutRate > ulInRate)
241 * Compute the values used to drive the actual sample rate conversion.
242 * The following formulas are being computed, using inline assembly
243 * since we need to use 64 bit arithmetic to compute the values:
245 * ulCoeffIncr = -floor((Fs,out * 2^23) / Fs,in)
246 * ulPhiIncr = floor((Fs,in * 2^26) / Fs,out)
247 * ulCorrectionPerGOF = floor((Fs,in * 2^26 - Fs,out * ulPhiIncr) /
249 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
250 * GOF_PER_SEC * ulCorrectionPerGOF
251 * ulInitialDelay = ceil((24 * Fs,in) / Fs,out)
255 * ulCoeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in))
256 * ulPhiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out)
257 * ulCorrectionPerGOF:ulCorrectionPerSec =
258 * dividend:remainder(ulOther / GOF_PER_SEC)
259 * ulInitialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out)
261 ulTemp1 = ulOutRate << 16;
262 ulCoeffIncr = ulTemp1 / ulInRate;
263 ulTemp1 -= ulCoeffIncr * ulInRate;
266 ulCoeffIncr += ulTemp1 / ulInRate;
267 ulCoeffIncr ^= 0xFFFFFFFF;
269 ulTemp1 = ulInRate << 16;
270 ulPhiIncr = ulTemp1 / ulOutRate;
271 ulTemp1 -= ulPhiIncr * ulOutRate;
274 ulTemp2 = ulTemp1 / ulOutRate;
275 ulPhiIncr += ulTemp2;
276 ulTemp1 -= ulTemp2 * ulOutRate;
277 ulCorrectionPerGOF = ulTemp1 / GOF_PER_SEC;
278 ulTemp1 -= ulCorrectionPerGOF * GOF_PER_SEC;
279 ulCorrectionPerSec = ulTemp1;
280 ulInitialDelay = ((ulInRate * 24) + ulOutRate - 1) / ulOutRate;
283 * Fill in the VariDecimate control block.
285 csa_writemem(resp, BA1_CSRC,
286 ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF));
287 csa_writemem(resp, BA1_CCI, ulCoeffIncr);
288 csa_writemem(resp, BA1_CD,
289 (((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | 0x80);
290 csa_writemem(resp, BA1_CPI, ulPhiIncr);
293 * Figure out the frame group length for the write back task. Basically,
294 * this is just the factors of 24000 (2^6*3*5^3) that are not present in
295 * the output sample rate.
297 dwFrameGroupLength = 1;
298 for(dwCnt = 2; dwCnt <= 64; dwCnt *= 2)
300 if(((ulOutRate / dwCnt) * dwCnt) !=
303 dwFrameGroupLength *= 2;
306 if(((ulOutRate / 3) * 3) !=
309 dwFrameGroupLength *= 3;
311 for(dwCnt = 5; dwCnt <= 125; dwCnt *= 5)
313 if(((ulOutRate / dwCnt) * dwCnt) !=
316 dwFrameGroupLength *= 5;
321 * Fill in the WriteBack control block.
323 csa_writemem(resp, BA1_CFG1, dwFrameGroupLength);
324 csa_writemem(resp, BA1_CFG2, (0x00800000 | dwFrameGroupLength));
325 csa_writemem(resp, BA1_CCST, 0x0000FFFF);
326 csa_writemem(resp, BA1_CSPB, ((65536 * ulOutRate) / 24000));
327 csa_writemem(resp, (BA1_CSPB + 4), 0x0000FFFF);
331 csa_startplaydma(struct csa_info *csa)
338 ul = csa_readmem(resp, BA1_PCTL);
340 csa_writemem(resp, BA1_PCTL, ul | csa->pctl);
341 csa_writemem(resp, BA1_PVOL, 0x80008000);
347 csa_startcapturedma(struct csa_info *csa)
354 ul = csa_readmem(resp, BA1_CCTL);
356 csa_writemem(resp, BA1_CCTL, ul | csa->cctl);
357 csa_writemem(resp, BA1_CVOL, 0x80008000);
363 csa_stopplaydma(struct csa_info *csa)
370 ul = csa_readmem(resp, BA1_PCTL);
371 csa->pctl = ul & 0xffff0000;
372 csa_writemem(resp, BA1_PCTL, ul & 0x0000ffff);
373 csa_writemem(resp, BA1_PVOL, 0xffffffff);
377 * The bitwise pointer of the serial FIFO in the DSP
378 * seems to make an error upon starting or stopping the
379 * DSP. Clear the FIFO and correct the pointer if we
383 csa_clearserialfifos(resp);
384 csa_writeio(resp, BA0_SERBSP, 0);
390 csa_stopcapturedma(struct csa_info *csa)
397 ul = csa_readmem(resp, BA1_CCTL);
398 csa->cctl = ul & 0x0000ffff;
399 csa_writemem(resp, BA1_CCTL, ul & 0xffff0000);
400 csa_writemem(resp, BA1_CVOL, 0xffffffff);
404 * The bitwise pointer of the serial FIFO in the DSP
405 * seems to make an error upon starting or stopping the
406 * DSP. Clear the FIFO and correct the pointer if we
410 csa_clearserialfifos(resp);
411 csa_writeio(resp, BA0_SERBSP, 0);
417 csa_startdsp(csa_res *resp)
423 * Set the frame timer to reflect the number of cycles per frame.
425 csa_writemem(resp, BA1_FRMT, 0xadf);
428 * Turn on the run, run at frame, and DMA enable bits in the local copy of
429 * the SP control register.
431 csa_writemem(resp, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
434 * Wait until the run at frame bit resets itself in the SP control
438 for (i = 0 ; i < 25 ; i++) {
440 * Wait a little bit, so we don't issue PCI reads too frequently.
444 * Fetch the current value of the SP status register.
446 ul = csa_readmem(resp, BA1_SPCR);
449 * If the run at frame bit has reset, then stop waiting.
451 if((ul & SPCR_RUNFR) == 0)
455 * If the run at frame bit never reset, then return an error.
457 if((ul & SPCR_RUNFR) != 0)
464 csa_stopdsp(csa_res *resp)
467 * Turn off the run, run at frame, and DMA enable bits in
468 * the local copy of the SP control register.
470 csa_writemem(resp, BA1_SPCR, 0);
476 csa_setupchan(struct csa_chinfo *ch)
478 struct csa_info *csa = ch->parent;
479 csa_res *resp = &csa->res;
482 if (ch->dir == PCMDIR_PLAY) {
484 csa_writemem(resp, BA1_PBA, sndbuf_getbufaddr(ch->buffer));
487 csa->pfie = csa_readmem(resp, BA1_PFIE) & ~0x0000f03f;
488 if (!(ch->fmt & AFMT_SIGNED))
490 if (ch->fmt & AFMT_BIGENDIAN)
492 if (!(ch->fmt & AFMT_STEREO))
494 if (ch->fmt & AFMT_8BIT)
496 csa_writemem(resp, BA1_PFIE, csa->pfie);
499 if (ch->fmt & AFMT_16BIT)
501 if (ch->fmt & AFMT_STEREO)
505 pdtc = csa_readmem(resp, BA1_PDTC) & ~0x000001ff;
507 csa_writemem(resp, BA1_PDTC, pdtc);
510 csa_setplaysamplerate(resp, ch->spd);
511 } else if (ch->dir == PCMDIR_REC) {
513 csa_writemem(resp, BA1_CBA, sndbuf_getbufaddr(ch->buffer));
516 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
519 csa_setcapturesamplerate(resp, ch->spd);
524 /* -------------------------------------------------------------------- */
525 /* channel interface */
528 csachan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
530 struct csa_info *csa = devinfo;
531 struct csa_chinfo *ch = (dir == PCMDIR_PLAY)? &csa->pch : &csa->rch;
537 if (sndbuf_alloc(ch->buffer, csa->parent_dmat, 0, CS461x_BUFFSIZE) != 0)
543 csachan_setformat(kobj_t obj, void *data, u_int32_t format)
545 struct csa_chinfo *ch = data;
552 csachan_setspeed(kobj_t obj, void *data, u_int32_t speed)
554 struct csa_chinfo *ch = data;
557 return ch->spd; /* XXX calc real speed */
561 csachan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
563 return CS461x_BUFFSIZE / 2;
567 csachan_trigger(kobj_t obj, void *data, int go)
569 struct csa_chinfo *ch = data;
570 struct csa_info *csa = ch->parent;
572 if (!PCMTRIG_COMMON(go))
575 if (go == PCMTRIG_START) {
578 if (ch->dir == PCMDIR_PLAY)
579 csa_startplaydma(csa);
581 csa_startcapturedma(csa);
583 if (ch->dir == PCMDIR_PLAY)
584 csa_stopplaydma(csa);
586 csa_stopcapturedma(csa);
593 csachan_getptr(kobj_t obj, void *data)
595 struct csa_chinfo *ch = data;
596 struct csa_info *csa = ch->parent;
602 if (ch->dir == PCMDIR_PLAY) {
603 ptr = csa_readmem(resp, BA1_PBA) - sndbuf_getbufaddr(ch->buffer);
604 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0)
607 ptr = csa_readmem(resp, BA1_CBA) - sndbuf_getbufaddr(ch->buffer);
608 if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0)
615 static struct pcmchan_caps *
616 csachan_getcaps(kobj_t obj, void *data)
618 struct csa_chinfo *ch = data;
619 return (ch->dir == PCMDIR_PLAY)? &csa_playcaps : &csa_reccaps;
622 static kobj_method_t csachan_methods[] = {
623 KOBJMETHOD(channel_init, csachan_init),
624 KOBJMETHOD(channel_setformat, csachan_setformat),
625 KOBJMETHOD(channel_setspeed, csachan_setspeed),
626 KOBJMETHOD(channel_setblocksize, csachan_setblocksize),
627 KOBJMETHOD(channel_trigger, csachan_trigger),
628 KOBJMETHOD(channel_getptr, csachan_getptr),
629 KOBJMETHOD(channel_getcaps, csachan_getcaps),
632 CHANNEL_DECLARE(csachan);
634 /* -------------------------------------------------------------------- */
635 /* The interrupt handler */
639 struct csa_info *csa = p;
641 if ((csa->binfo->hisr & HISR_VC0) != 0)
642 chn_intr(csa->pch.channel);
643 if ((csa->binfo->hisr & HISR_VC1) != 0)
644 chn_intr(csa->rch.channel);
647 /* -------------------------------------------------------------------- */
650 * Probe and attach the card
654 csa_init(struct csa_info *csa)
661 csa_stopplaydma(csa);
662 csa_stopcapturedma(csa);
664 if (csa_startdsp(resp))
667 /* Crank up the power on the DAC and ADC. */
668 csa_setplaysamplerate(resp, 8000);
669 csa_setcapturesamplerate(resp, 8000);
671 csa_writeio(resp, BA0_EGPIODR, EGPIODR_GPOE0);
672 csa_writeio(resp, BA0_EGPIOPTR, EGPIOPTR_GPPT0);
673 /* Power up amplifier */
674 csa_writeio(resp, BA0_EGPIODR, csa_readio(resp, BA0_EGPIODR) |
676 csa_writeio(resp, BA0_EGPIOPTR, csa_readio(resp, BA0_EGPIOPTR) |
682 /* Allocates resources. */
684 csa_allocres(struct csa_info *csa, device_t dev)
689 if (resp->io == NULL) {
690 resp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
691 &resp->io_rid, RF_ACTIVE);
692 if (resp->io == NULL)
695 if (resp->mem == NULL) {
696 resp->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
697 &resp->mem_rid, RF_ACTIVE);
698 if (resp->mem == NULL)
701 if (resp->irq == NULL) {
702 resp->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
703 &resp->irq_rid, RF_ACTIVE | RF_SHAREABLE);
704 if (resp->irq == NULL)
707 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev),
708 /*alignment*/CS461x_BUFFSIZE,
709 /*boundary*/CS461x_BUFFSIZE,
710 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
711 /*highaddr*/BUS_SPACE_MAXADDR,
712 /*filter*/NULL, /*filterarg*/NULL,
713 /*maxsize*/CS461x_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff,
714 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
715 /*lockarg*/&Giant, &csa->parent_dmat) != 0)
721 /* Releases resources. */
723 csa_releaseres(struct csa_info *csa, device_t dev)
727 KASSERT(csa != NULL, ("called with bogus resource structure"));
730 if (resp->irq != NULL) {
732 bus_teardown_intr(dev, resp->irq, csa->ih);
733 bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, resp->irq);
736 if (resp->io != NULL) {
737 bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, resp->io);
740 if (resp->mem != NULL) {
741 bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, resp->mem);
744 if (csa->parent_dmat != NULL) {
745 bus_dma_tag_destroy(csa->parent_dmat);
746 csa->parent_dmat = NULL;
753 pcmcsa_probe(device_t dev)
756 struct sndcard_func *func;
758 /* The parent device has already been probed. */
760 func = device_get_ivars(dev);
761 if (func == NULL || func->func != SCF_PCM)
764 s = "CS461x PCM Audio";
766 device_set_desc(dev, s);
771 pcmcsa_attach(device_t dev)
773 struct csa_info *csa;
776 char status[SND_STATUSLEN];
777 struct ac97_info *codec;
778 struct sndcard_func *func;
780 csa = malloc(sizeof(*csa), M_DEVBUF, M_NOWAIT | M_ZERO);
783 unit = device_get_unit(dev);
784 func = device_get_ivars(dev);
785 csa->binfo = func->varinfo;
787 * Fake the status of DMA so that the initial value of
788 * PCTL and CCTL can be stored into csa->pctl and csa->cctl,
791 csa->pch.dma = csa->rch.dma = 1;
793 csa->card = csa->binfo->card;
795 /* Allocate the resources. */
797 resp->io_rid = PCIR_BAR(0);
798 resp->mem_rid = PCIR_BAR(1);
800 if (csa_allocres(csa, dev)) {
801 csa_releaseres(csa, dev);
807 csa_releaseres(csa, dev);
810 codec = AC97_CREATE(dev, csa, csa_ac97);
812 csa_releaseres(csa, dev);
815 if (csa->card->inv_eapd)
816 ac97_setflags(codec, AC97_F_EAPD_INV);
817 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) {
819 csa_releaseres(csa, dev);
823 snprintf(status, SND_STATUSLEN, "at irq %ld %s",
824 rman_get_start(resp->irq),PCM_KLDSTRING(snd_csa));
826 /* Enable interrupt. */
827 if (snd_setup_intr(dev, resp->irq, 0, csa_intr, csa, &csa->ih)) {
829 csa_releaseres(csa, dev);
832 csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f);
833 csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
836 if (pcm_register(dev, csa, 1, 1)) {
838 csa_releaseres(csa, dev);
841 pcm_addchan(dev, PCMDIR_REC, &csachan_class, csa);
842 pcm_addchan(dev, PCMDIR_PLAY, &csachan_class, csa);
843 pcm_setstatus(dev, status);
849 pcmcsa_detach(device_t dev)
852 struct csa_info *csa;
854 r = pcm_unregister(dev);
858 csa = pcm_getdevinfo(dev);
859 csa_releaseres(csa, dev);
865 csa_ac97_suspend(struct csa_info *csa)
870 for (count = 0x2, i=0;
871 (count <= CS461x_AC97_HIGHESTREGTORESTORE) &&
872 (i < CS461x_AC97_NUMBER_RESTORE_REGS);
874 csa_readcodec(&csa->res, BA0_AC97_RESET + count, &csa->ac97[i]);
876 /* mute the outputs */
877 csa_writecodec(&csa->res, BA0_AC97_MASTER_VOLUME, 0x8000);
878 csa_writecodec(&csa->res, BA0_AC97_HEADPHONE_VOLUME, 0x8000);
879 csa_writecodec(&csa->res, BA0_AC97_MASTER_VOLUME_MONO, 0x8000);
880 csa_writecodec(&csa->res, BA0_AC97_PCM_OUT_VOLUME, 0x8000);
881 /* save the registers that cause pops */
882 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &csa->ac97_powerdown);
883 csa_readcodec(&csa->res, BA0_AC97_GENERAL_PURPOSE,
884 &csa->ac97_general_purpose);
887 * And power down everything on the AC97 codec. Well, for now,
888 * only power down the DAC/ADC and MIXER VREFON components.
889 * trouble with removing VREF.
893 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &tmp);
894 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN,
895 tmp | CS_AC97_POWER_CONTROL_MIXVON);
897 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &tmp);
898 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN,
899 tmp | CS_AC97_POWER_CONTROL_ADC);
901 csa_readcodec(&csa->res, BA0_AC97_POWERDOWN, &tmp);
902 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN,
903 tmp | CS_AC97_POWER_CONTROL_DAC);
907 csa_ac97_resume(struct csa_info *csa)
912 * First, we restore the state of the general purpose register. This
913 * contains the mic select (mic1 or mic2) and if we restore this after
914 * we restore the mic volume/boost state and mic2 was selected at
915 * suspend time, we will end up with a brief period of time where mic1
916 * is selected with the volume/boost settings for mic2, causing
917 * acoustic feedback. So we restore the general purpose register
918 * first, thereby getting the correct mic selected before we restore
919 * the mic volume/boost.
921 csa_writecodec(&csa->res, BA0_AC97_GENERAL_PURPOSE,
922 csa->ac97_general_purpose);
924 * Now, while the outputs are still muted, restore the state of power
927 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN, csa->ac97_powerdown);
929 * Restore just the first set of registers, from register number
930 * 0x02 to the register number that ulHighestRegToRestore specifies.
932 for (count = 0x2, i=0;
933 (count <= CS461x_AC97_HIGHESTREGTORESTORE) &&
934 (i < CS461x_AC97_NUMBER_RESTORE_REGS);
936 csa_writecodec(&csa->res, BA0_AC97_RESET + count, csa->ac97[i]);
940 pcmcsa_suspend(device_t dev)
942 struct csa_info *csa;
945 csa = pcm_getdevinfo(dev);
950 /* playback interrupt disable */
951 csa_writemem(resp, BA1_PFIE,
952 (csa_readmem(resp, BA1_PFIE) & ~0x0000f03f) | 0x00000010);
953 /* capture interrupt disable */
954 csa_writemem(resp, BA1_CIE,
955 (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000011);
956 csa_stopplaydma(csa);
957 csa_stopcapturedma(csa);
959 csa_ac97_suspend(csa);
965 * Power down the DAC and ADC. For now leave the other areas on.
967 csa_writecodec(&csa->res, BA0_AC97_POWERDOWN, 0x300);
969 * Power down the PLL.
971 csa_writemem(resp, BA0_CLKCR1, 0);
973 * Turn off the Processor by turning off the software clock
974 * enable flag in the clock control register.
976 csa_writemem(resp, BA0_CLKCR1,
977 csa_readmem(resp, BA0_CLKCR1) & ~CLKCR1_SWCE);
985 pcmcsa_resume(device_t dev)
987 struct csa_info *csa;
990 csa = pcm_getdevinfo(dev);
995 /* cs_hardware_init */
996 csa_stopplaydma(csa);
997 csa_stopcapturedma(csa);
998 csa_ac97_resume(csa);
999 if (csa_startdsp(resp))
1001 /* Enable interrupts on the part. */
1002 if ((csa_readio(resp, BA0_HISR) & HISR_INTENA) == 0)
1003 csa_writeio(resp, BA0_HICR, HICR_IEV | HICR_CHGM);
1004 /* playback interrupt enable */
1005 csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f);
1006 /* capture interrupt enable */
1007 csa_writemem(resp, BA1_CIE,
1008 (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001);
1009 /* cs_restart_part */
1010 csa_setupchan(&csa->pch);
1011 csa_startplaydma(csa);
1012 csa_setupchan(&csa->rch);
1013 csa_startcapturedma(csa);
1015 csa_active(csa, -1);
1020 static device_method_t pcmcsa_methods[] = {
1021 /* Device interface */
1022 DEVMETHOD(device_probe , pcmcsa_probe ),
1023 DEVMETHOD(device_attach, pcmcsa_attach),
1024 DEVMETHOD(device_detach, pcmcsa_detach),
1025 DEVMETHOD(device_suspend, pcmcsa_suspend),
1026 DEVMETHOD(device_resume, pcmcsa_resume),
1031 static driver_t pcmcsa_driver = {
1037 DRIVER_MODULE(snd_csapcm, csa, pcmcsa_driver, pcm_devclass, 0, 0);
1038 MODULE_DEPEND(snd_csapcm, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1039 MODULE_DEPEND(snd_csapcm, snd_csa, 1, 1, 1);
1040 MODULE_VERSION(snd_csapcm, 1);