2 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
3 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
31 #include <sys/types.h>
33 #include <machine/bus.h>
35 #include <sys/systm.h>
37 #include <sys/queue.h>
39 #include <sys/mutex.h>
40 #include <sys/sysctl.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcivar.h>
46 #include <machine/clock.h> /* for DELAY */
48 #ifdef HAVE_KERNEL_OPTION_HEADERS
52 #include <dev/sound/chip.h>
53 #include <dev/sound/pcm/sound.h>
54 #include <dev/sound/pcm/ac97.h>
56 #include <dev/sound/pci/emuxkireg.h>
57 #include <dev/sound/pci/emu10kx.h>
62 #define HAS_AC97 0x0004
64 #define IS_EMU10K1 0x0008
65 #define IS_EMU10K2 0x0010
66 #define IS_CA0102 0x0020
67 #define IS_CA0108 0x0040
68 #define IS_UNKNOWN 0x0080
70 #define BROKEN_DIGITAL 0x0100
71 #define DIGITAL_ONLY 0x0200
73 #define IS_CARDBUS 0x0400
76 #define MODE_DIGITAL 2
77 #define SPDIF_MODE_PCM 1
78 #define SPDIF_MODE_AC3 2
97 #define GPR(i) (sc->gpr_base+(i))
98 #define INP(i) (sc->input_base+(i))
99 #define OUTP(i) (sc->output_base+(i))
101 #define FX2(i) (sc->efxc_base+(i))
102 #define DSP_CONST(i) (sc->dsp_zero+(i))
104 #define COND_NORMALIZED DSP_CONST(0x1)
105 #define COND_BORROW DSP_CONST(0x2)
106 #define COND_MINUS DSP_CONST(0x3)
107 #define COND_LESS_ZERO DSP_CONST(0x4)
108 #define COND_EQ_ZERO DSP_CONST(0x5)
109 #define COND_SATURATION DSP_CONST(0x6)
110 #define COND_NEQ_ZERO DSP_CONST(0x8)
112 #define DSP_ACCUM DSP_CONST(0x16)
113 #define DSP_CCR DSP_CONST(0x17)
116 #define IN_AC97_L 0x00
117 #define IN_AC97_R 0x01
118 #define IN_AC97 IN_AC97_L
119 #define IN_SPDIF_CD_L 0x02
120 #define IN_SPDIF_CD_R 0x03
121 #define IN_SPDIF_CD IN_SPDIF_CD_L
122 #define IN_ZOOM_L 0x04
123 #define IN_ZOOM_R 0x05
124 #define IN_ZOOM IN_ZOOM_L
125 #define IN_TOSLINK_L 0x06
126 #define IN_TOSLINK_R 0x07
127 #define IN_TOSLINK IN_TOSLINK_L
128 #define IN_LINE1_L 0x08
129 #define IN_LINE1_R 0x09
130 #define IN_LINE1 IN_LINE1_L
131 #define IN_COAX_SPDIF_L 0x0a
132 #define IN_COAX_SPDIF_R 0x0b
133 #define IN_COAX_SPDIF IN_COAX_SPDIF_L
134 #define IN_LINE2_L 0x0c
135 #define IN_LINE2_R 0x0d
136 #define IN_LINE2 IN_LINE2_L
141 #define OUT_AC97_L 0x00
142 #define OUT_AC97_R 0x01
143 #define OUT_AC97 OUT_AC97_L
144 #define OUT_A_FRONT OUT_AC97
145 #define OUT_TOSLINK_L 0x02
146 #define OUT_TOSLINK_R 0x03
147 #define OUT_TOSLINK OUT_TOSLINK_L
148 #define OUT_D_CENTER 0x04
149 #define OUT_D_SUB 0x05
150 #define OUT_HEADPHONE_L 0x06
151 #define OUT_HEADPHONE_R 0x07
152 #define OUT_HEADPHONE OUT_HEADPHONE_L
153 #define OUT_REAR_L 0x08
154 #define OUT_REAR_R 0x09
155 #define OUT_REAR OUT_REAR_L
156 #define OUT_ADC_REC_L 0x0a
157 #define OUT_ADC_REC_R 0x0b
158 #define OUT_ADC_REC OUT_ADC_REC_L
159 #define OUT_MIC_CAP 0x0c
161 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */
162 #define OUT_A_CENTER 0x11
163 #define OUT_A_SUB 0x12
166 #define A_IN_AC97_L 0x00
167 #define A_IN_AC97_R 0x01
168 #define A_IN_AC97 A_IN_AC97_L
169 #define A_IN_SPDIF_CD_L 0x02
170 #define A_IN_SPDIF_CD_R 0x03
171 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L
172 #define A_IN_O_SPDIF_L 0x04
173 #define A_IN_O_SPDIF_R 0x05
174 #define A_IN_O_SPDIF A_IN_O_SPDIF_L
175 #define A_IN_LINE2_L 0x08
176 #define A_IN_LINE2_R 0x09
177 #define A_IN_LINE2 A_IN_LINE2_L
178 #define A_IN_R_SPDIF_L 0x0a
179 #define A_IN_R_SPDIF_R 0x0b
180 #define A_IN_R_SPDIF A_IN_R_SPDIF_L
181 #define A_IN_AUX2_L 0x0c
182 #define A_IN_AUX2_R 0x0d
183 #define A_IN_AUX2 A_IN_AUX2_L
186 #define A_OUT_D_FRONT_L 0x00
187 #define A_OUT_D_FRONT_R 0x01
188 #define A_OUT_D_FRONT A_OUT_D_FRONT_L
189 #define A_OUT_D_CENTER 0x02
190 #define A_OUT_D_SUB 0x03
191 #define A_OUT_D_SIDE_L 0x04
192 #define A_OUT_D_SIDE_R 0x05
193 #define A_OUT_D_SIDE A_OUT_D_SIDE_L
194 #define A_OUT_D_REAR_L 0x06
195 #define A_OUT_D_REAR_R 0x07
196 #define A_OUT_D_REAR A_OUT_D_REAR_L
198 /* on Audigy Platinum only */
199 #define A_OUT_HPHONE_L 0x04
200 #define A_OUT_HPHONE_R 0x05
201 #define A_OUT_HPHONE A_OUT_HPHONE_L
203 #define A_OUT_A_FRONT_L 0x08
204 #define A_OUT_A_FRONT_R 0x09
205 #define A_OUT_A_FRONT A_OUT_A_FRONT_L
206 #define A_OUT_A_CENTER 0x0a
207 #define A_OUT_A_SUB 0x0b
208 #define A_OUT_A_SIDE_L 0x0c
209 #define A_OUT_A_SIDE_R 0x0d
210 #define A_OUT_A_SIDE A_OUT_A_SIDE_L
211 #define A_OUT_A_REAR_L 0x0e
212 #define A_OUT_A_REAR_R 0x0f
213 #define A_OUT_A_REAR A_OUT_A_REAR_L
214 #define A_OUT_AC97_L 0x10
215 #define A_OUT_AC97_R 0x11
216 #define A_OUT_AC97 A_OUT_AC97_L
217 #define A_OUT_ADC_REC_L 0x16
218 #define A_OUT_ADC_REC_R 0x17
219 #define A_OUT_ADC_REC A_OUT_ADC_REC_L
221 #define EMU_DATA2 0x24
222 #define EMU_IPR2 0x28
223 #define EMU_INTE2 0x2c
224 #define EMU_IPR3 0x38
225 #define EMU_INTE3 0x3c
227 #define EMU_A2_SRCSel 0x60
228 #define EMU_A2_SRCMULTI_ENABLE 0x6e
230 #define EMU_A_I2S_CAPTURE_96000 0x00000400
232 #define EMU_A2_MIXER_I2S_ENABLE 0x7B
233 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A
245 #define NUM_CACHES 10
247 #define CDSPDIFMUTE 0
251 #define EMU_MAX_GPR 512
252 #define EMU_MAX_IRQ_CONSUMERS 32
256 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1;
263 struct emu_voice *slave;
271 SLIST_ENTRY(emu_memblk) link;
275 uint32_t pte_start, pte_size;
279 uint8_t bmap[EMU_MAXPAGES / 8];
282 bus_addr_t silent_page_addr;
283 bus_addr_t ptb_pages_addr;
285 struct emu_sc_info *card;
286 SLIST_HEAD(, emu_memblk) blocks;
291 struct emu_sc_info *card;
293 signed int allocmap[EMU_MAX_GPR];
299 struct emu_intr_handler {
303 uint32_t(*irq_func) (void *softc, uint32_t irq);
308 struct mtx rw; /* Hardware exclusive access lock */
310 /* Hardware and subdevices */
312 device_t pcm[RT_COUNT];
318 bus_space_handle_t sh;
320 struct cdev *cdev; /* /dev/emu10k character device */
321 struct mtx emu10kx_lock;
323 struct sbuf emu10kx_sbuf;
328 struct resource *reg;
329 struct resource *irq;
333 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS];
335 /* Card HW configuration */
336 unsigned int mode; /* analog / digital */
337 unsigned int mchannel_fx;
338 unsigned int dsp_zero;
339 unsigned int code_base;
340 unsigned int code_size;
341 unsigned int gpr_base;
342 unsigned int num_gprs;
343 unsigned int input_base;
344 unsigned int output_base;
345 unsigned int efxc_base;
346 unsigned int opcode_shift;
347 unsigned int high_operand_shift;
348 unsigned int address_mask;
349 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1,
350 has_ac97:1, has_51:1, has_71:1,
352 broken_digital:1, is_cardbus:1;
354 signed int mch_disabled, mch_rec, dbg_level;
355 signed int num_inputs;
356 unsigned int num_outputs;
357 unsigned int num_fxbuses;
358 unsigned int routing_code_start;
359 unsigned int routing_code_end;
362 struct emu_voice voice[NUM_G]; /* Hardware voices */
363 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */
364 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */
367 struct emu_mem mem; /* memory */
370 int mixer_gpr[NUM_MIXERS];
371 int mixer_volcache[NUM_MIXERS];
372 int cache_gpr[NUM_CACHES];
374 int mute_gpr[NUM_MUTE];
375 struct sysctl_ctx_list *ctx;
376 struct sysctl_oid *root;
379 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error);
380 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr);
381 static void emu_free(struct emu_mem *mem, void *dmabuf);
382 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner);
383 static int emu_memfree(struct emu_mem *mem, void *membuf);
384 static int emu_memstart(struct emu_mem *mem, void *membuf);
387 static int emu10kx_dev_init(struct emu_sc_info *sc);
388 static int emu10kx_dev_uninit(struct emu_sc_info *sc);
389 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s);
391 static void emumix_set_mode(struct emu_sc_info *sc, int mode);
392 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode);
393 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol);
394 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
395 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS);
397 static int emu_rm_init(struct emu_sc_info *sc);
398 static int emu_rm_uninit(struct emu_sc_info *sc);
399 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count);
401 static unsigned int emu_getcard(device_t dev);
402 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size);
403 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size);
404 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data);
406 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable);
408 static void emu_intr(void *p);
409 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data);
410 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc);
411 static void emu_initefx(struct emu_sc_info *sc);
413 static int emu_cardbus_init(struct emu_sc_info *sc);
414 static int emu_init(struct emu_sc_info *sc);
415 static int emu_uninit(struct emu_sc_info *sc);
417 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result);
418 static int emu_write_ivar(device_t bus __unused, device_t dev __unused,
419 int ivar_index, uintptr_t value __unused);
421 static int emu_pci_probe(device_t dev);
422 static int emu_pci_attach(device_t dev);
423 static int emu_pci_detach(device_t dev);
424 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused);
426 #ifdef SND_EMU10KX_DEBUG
428 #define EMU_MTX_DEBUG() do { \
429 if (mtx_owned(&sc->rw)) { \
430 printf("RW owned in %s line %d for %s\n", __func__, \
431 __LINE__ , device_get_nameunit(sc->dev)); \
432 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \
433 printf("rw lock: value %x thread %x\n", \
434 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \
435 (uintptr_t)curthread); \
436 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\
437 db_show_mtx(&sc->rw); \
441 #define EMU_MTX_DEBUG() do { \
445 #define EMU_RWLOCK() do { \
447 mtx_lock(&(sc->rw)); \
450 #define EMU_RWUNLOCK() do { \
451 mtx_unlock(&(sc->rw)); \
455 /* Supported cards */
466 static struct emu_hwinfo emu_cards[] = {
467 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0},
468 /* 0x0020..0x002f 4.0 EMU10K1 cards */
469 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
470 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1},
471 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1},
473 /* (range unknown) 5.1 EMU10K1 cards */
474 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
476 /* 0x80??..0x805? 4.0 EMU10K1 cards */
477 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
478 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1},
479 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
480 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1},
481 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
482 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
483 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1},
484 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
485 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
486 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
488 /* 0x8061..0x???? 5.1 EMU10K1 cards */
489 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
490 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1},
491 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
492 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
493 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
494 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1},
496 /* Generic SB Live! */
497 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1},
499 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */
501 /* 0x0051..0x0051 5.1 CA0100-IAF cards */
502 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2},
503 /* ES is CA0100-IDF chip that don't work in digital mode */
504 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL},
505 /* 0x0053..0x005C 5.1 CA0101-NAF cards */
506 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
507 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
509 /* 0x1002..0x1009 5.1 CA0102-IAT cards */
510 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102},
511 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102},
512 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102},
514 /* 0x2001..0x2003 7.1 CA0102-ICT cards */
515 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
516 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
517 /* XXX No reports about 0x2003 & 0x2004 cards */
518 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
519 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
520 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
522 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */
523 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102},
525 /* Generic Audigy or Audigy 2 */
526 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2},
528 /* We don't support CA0103-DAT (Audigy LS) cards */
529 /* There is NO CA0104-xxx cards */
530 /* There is NO CA0105-xxx cards */
531 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */
532 /* There is NO CA0107-xxx cards */
534 /* 0x1000..0x1001 7.1 CA0108-IAT cards */
535 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY},
536 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
537 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
539 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS},
541 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108},
543 /* Unsupported cards */
545 static struct emu_hwinfo emu_bad_cards[] = {
546 /* APS cards should be possible to support */
547 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0},
548 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0},
549 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0},
550 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */
551 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0},
552 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0},
553 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0},
557 * Get best known information about device.
560 emu_getcard(device_t dev)
565 unsigned int thiscard;
568 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2);
569 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2);
571 n_cards = sizeof(emu_cards) / sizeof(struct emu_hwinfo);
573 for (i = 1; i < n_cards; i++) {
574 if (device == emu_cards[i].device) {
575 if (subdevice == emu_cards[i].subdevice) {
579 if (0x0000 == emu_cards[i].subdevice) {
582 * don't break, we can get more specific card
589 n_cards = sizeof(emu_bad_cards) / sizeof(struct emu_hwinfo);
590 for (i = 0; i < n_cards; i++) {
591 if (device == emu_bad_cards[i].device) {
592 if (subdevice == emu_bad_cards[i].subdevice) {
596 if (0x0000 == emu_bad_cards[i].subdevice) {
598 break; /* we avoid all this cards */
607 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers.
608 * Some of them are used directly, some of them provide pointer / data pairs.
611 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
614 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
617 return (bus_space_read_1(sc->st, sc->sh, regno));
619 return (bus_space_read_2(sc->st, sc->sh, regno));
621 return (bus_space_read_4(sc->st, sc->sh, regno));
627 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
630 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
633 bus_space_write_1(sc->st, sc->sh, regno, data);
636 bus_space_write_2(sc->st, sc->sh, regno, data);
639 bus_space_write_4(sc->st, sc->sh, regno, data);
644 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
645 * via (channel, register) pair. Some registers are channel-specific,
649 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
651 uint32_t ptr, val, mask, size, offset;
653 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
656 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
657 val = emu_rd_nolock(sc, EMU_DATA, 4);
661 * XXX Some register numbers has data size and offset encoded in
662 * it to get only part of 32bit register. This use is not described
663 * in register name, be careful!
665 if (reg & 0xff000000) {
666 size = (reg >> 24) & 0x3f;
667 offset = (reg >> 16) & 0x1f;
668 mask = ((1 << size) - 1) << offset;
676 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
678 uint32_t ptr, mask, size, offset;
680 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
683 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
685 * XXX Another kind of magic encoding in register number. This can
686 * give you side effect - it will read previous data from register
687 * and change only required bits.
689 if (reg & 0xff000000) {
690 size = (reg >> 24) & 0x3f;
691 offset = (reg >> 16) & 0x1f;
692 mask = ((1 << size) - 1) << offset;
695 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
697 emu_wr_nolock(sc, EMU_DATA, data, 4);
701 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
702 * via (channel, register) pair. Some registers are channel-specific,
703 * some not. This interface is supported by CA0102 and CA0108 chips only.
706 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
710 /* XXX separate lock? */
712 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
713 val = emu_rd_nolock(sc, EMU_DATA2, 4);
721 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
725 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
726 emu_wr_nolock(sc, EMU_DATA2, data, 4);
730 * XXX CardBus interface. Not tested on any real hardware.
733 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
738 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems
739 * to be some reg/value accessible kind of config register on CardBus
740 * CA0108, with value(?) in top 16 bit, address(?) in low 16
743 val = emu_rd_nolock(sc, 0x38, 4);
744 emu_wr_nolock(sc, 0x38, data, 4);
745 val = emu_rd_nolock(sc, 0x38, 4);
750 * Direct hardware register access
751 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
754 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
756 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
757 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
759 emu_wr_nolock(sc, regno, data, size);
763 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
767 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
768 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
770 rd = emu_rd_nolock(sc, regno, size);
775 * Enabling IR MIDI messages is another kind of black magic. It just
776 * has to be made this way. It really do it.
779 emu_enable_ir(struct emu_sc_info *sc)
783 if (sc->is_emu10k2 || sc->is_ca0102) {
784 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
785 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
787 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
789 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
791 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
792 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
795 if (sc->is_emu10k1) {
796 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
797 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
799 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
801 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
802 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
809 * emu_timer_ - HW timer management
812 emu_timer_create(struct emu_sc_info *sc)
819 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
820 if (sc->timer[i] == 0) {
821 sc->timer[i] = -1; /* disable it */
823 mtx_unlock(&sc->lock);
826 mtx_unlock(&sc->lock);
832 emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
839 RANGE(delay, 16, 1024);
840 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
843 sc->timer[timer] = delay;
844 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
845 if (sc->timerinterval > sc->timer[i])
846 sc->timerinterval = sc->timer[i];
849 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
850 mtx_unlock(&sc->lock);
856 emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
865 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
869 if ((go == 1) && (sc->timer[timer] < 0))
870 sc->timer[timer] = -sc->timer[timer];
871 if ((go == 0) && (sc->timer[timer] > 0))
872 sc->timer[timer] = -sc->timer[timer];
875 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
876 if (sc->timerinterval > sc->timer[i])
877 sc->timerinterval = sc->timer[i];
878 if (sc->timer[i] > 0)
882 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
885 x = emu_rd(sc, EMU_INTE, 4);
886 x |= EMU_INTE_INTERTIMERENB;
887 emu_wr(sc, EMU_INTE, x, 4);
889 x = emu_rd(sc, EMU_INTE, 4);
890 x &= ~EMU_INTE_INTERTIMERENB;
891 emu_wr(sc, EMU_INTE, x, 4);
893 mtx_unlock(&sc->lock);
898 emu_timer_clear(struct emu_sc_info *sc, int timer)
903 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
905 emu_timer_enable(sc, timer, 0);
908 if (sc->timer[timer] != 0)
909 sc->timer[timer] = 0;
910 mtx_unlock(&sc->lock);
916 * emu_intr_ - HW interrupt handler management
919 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc)
925 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
926 if (sc->ihandler[i].inte_mask == 0) {
927 sc->ihandler[i].inte_mask = inte_mask;
928 sc->ihandler[i].intr_mask = intr_mask;
929 sc->ihandler[i].softc = isc;
930 sc->ihandler[i].irq_func = func;
931 x = emu_rd(sc, EMU_INTE, 4);
933 emu_wr(sc, EMU_INTE, x, 4);
934 mtx_unlock(&sc->lock);
935 if (sc->dbg_level > 1)
936 device_printf(sc->dev, "ihandle %d registered\n", i);
940 mtx_unlock(&sc->lock);
941 if (sc->dbg_level > 1)
942 device_printf(sc->dev, "ihandle not registered\n");
948 emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
955 if (sc->ihandler[hnumber].inte_mask == 0) {
956 mtx_unlock(&sc->lock);
960 x = emu_rd(sc, EMU_INTE, 4);
961 x &= ~sc->ihandler[hnumber].inte_mask;
963 sc->ihandler[hnumber].inte_mask = 0;
964 sc->ihandler[hnumber].intr_mask = 0;
965 sc->ihandler[hnumber].softc = NULL;
966 sc->ihandler[hnumber].irq_func = NULL;
968 /* other interrupt handlers may use this EMU_INTE value */
969 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
970 if (sc->ihandler[i].inte_mask != 0)
971 x |= sc->ihandler[i].inte_mask;
973 emu_wr(sc, EMU_INTE, x, 4);
975 mtx_unlock(&sc->lock);
982 struct emu_sc_info *sc = (struct emu_sc_info *)p;
987 stat = emu_rd(sc, EMU_IPR, 4);
991 emu_wr(sc, EMU_IPR, stat, 4);
992 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
993 if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
994 (((void *)sc->ihandler[i].irq_func) != NULL)) {
995 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc,
996 (sc->ihandler[i].intr_mask) & stat);
999 if (sc->dbg_level > 1)
1001 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack));
1005 if ((sc->is_ca0102) || (sc->is_ca0108))
1007 stat = emu_rd(sc, EMU_IPR2, 4);
1011 emu_wr(sc, EMU_IPR2, stat, 4);
1012 if (sc->dbg_level > 1)
1013 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
1015 break; /* to avoid infinite loop. should be removed
1016 * after completion of P16V interface. */
1021 stat = emu_rd(sc, EMU_IPR3, 4);
1025 emu_wr(sc, EMU_IPR3, stat, 4);
1026 if (sc->dbg_level > 1)
1027 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
1029 break; /* to avoid infinite loop. should be removed
1030 * after completion of S/PDIF interface */
1036 * Get data from private emu10kx structure for PCM buffer allocation.
1037 * Used by PCM code only.
1040 emu_gettag(struct emu_sc_info *sc)
1042 return (sc->mem.dmat);
1046 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error)
1048 bus_addr_t *phys = (bus_addr_t *) arg;
1050 *phys = error ? 0 : (bus_addr_t) segs->ds_addr;
1053 printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n",
1054 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1060 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr)
1067 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, &map))) {
1068 if (mem->card->dbg_level > 2)
1069 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error);
1072 if ((error = bus_dmamap_load(mem->dmat, map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) {
1073 if (mem->card->dbg_level > 2)
1074 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error);
1081 emu_free(struct emu_mem *mem, void *dmabuf)
1083 bus_dmamem_free(mem->dmat, dmabuf, NULL);
1087 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner)
1089 uint32_t blksz, start, idx, ofs, tmp, found;
1090 struct emu_memblk *blk;
1093 blksz = sz / EMUPAGESIZE;
1094 if (sz > (blksz * EMUPAGESIZE))
1096 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) {
1097 if (mem->card->dbg_level > 2)
1098 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n");
1101 /* find a free block in the bitmap */
1104 while (!found && start + blksz < EMU_MAXPAGES) {
1106 for (idx = start; idx < start + blksz; idx++)
1107 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1113 if (mem->card->dbg_level > 2)
1114 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n");
1117 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1119 if (mem->card->dbg_level > 2)
1120 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n");
1123 bzero(blk, sizeof(*blk));
1124 membuf = emu_malloc(mem, sz, &blk->buf_addr);
1125 *addr = blk->buf_addr;
1126 if (membuf == NULL) {
1127 if (mem->card->dbg_level > 2)
1128 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n");
1129 free(blk, M_DEVBUF);
1133 blk->pte_start = start;
1134 blk->pte_size = blksz;
1135 strncpy(blk->owner, owner, 15);
1136 blk->owner[15] = '\0';
1138 for (idx = start; idx < start + blksz; idx++) {
1139 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1140 tmp = (uint32_t) (blk->buf_addr + ofs);
1141 mem->ptb_pages[idx] = (tmp << 1) | idx;
1144 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1149 emu_memfree(struct emu_mem *mem, void *membuf)
1152 struct emu_memblk *blk, *i;
1155 SLIST_FOREACH(i, &mem->blocks, link) {
1156 if (i->buf == membuf)
1161 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1162 emu_free(mem, membuf);
1163 tmp = (uint32_t) (mem->silent_page_addr) << 1;
1164 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1165 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1166 mem->ptb_pages[idx] = tmp | idx;
1168 free(blk, M_DEVBUF);
1173 emu_memstart(struct emu_mem *mem, void *membuf)
1175 struct emu_memblk *blk, *i;
1178 SLIST_FOREACH(i, &mem->blocks, link) {
1179 if (i->buf == membuf)
1184 return (blk->pte_start);
1189 emu_rate_to_pitch(uint32_t rate)
1191 static uint32_t logMagTable[128] = {
1192 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
1193 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
1194 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
1195 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
1196 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
1197 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
1198 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
1199 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
1200 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
1201 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
1202 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
1203 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
1204 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
1205 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
1206 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
1207 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
1209 static char logSlopeTable[128] = {
1210 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
1211 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
1212 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
1213 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
1214 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
1215 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
1216 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
1217 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
1218 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
1219 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
1220 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
1221 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
1222 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
1223 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
1224 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
1225 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
1231 rate *= 11185; /* Scale 48000 to 0x20002380 */
1232 for (i = 31; i > 0; i--) {
1233 if (rate & 0x80000000) { /* Detect leading "1" */
1234 return (((uint32_t) (i - 15) << 20) +
1235 logMagTable[0x7f & (rate >> 24)] +
1236 (0x7f & (rate >> 17)) *
1237 logSlopeTable[0x7f & (rate >> 24)]);
1246 emu_rate_to_linearpitch(uint32_t rate)
1248 rate = (rate << 8) / 375;
1249 return ((rate >> 1) + (rate & 1));
1253 emu_valloc(struct emu_sc_info *sc)
1255 struct emu_voice *v;
1259 mtx_lock(&sc->lock);
1260 for (i = 0; i < NUM_G && sc->voice[i].busy; i++);
1265 mtx_unlock(&sc->lock);
1270 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
1274 mtx_lock(&sc->lock);
1275 for (i = 0; i < NUM_G; i++) {
1276 if (v == &sc->voice[i] && sc->voice[i].busy) {
1279 * XXX What we should do with mono channels?
1280 * See -pcm.c emupchan_init for other side of
1283 if (v->slave != NULL)
1284 r = emu_memfree(&sc->mem, v->vbuf);
1287 mtx_unlock(&sc->lock);
1291 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s,
1292 uint32_t sz, struct snd_dbuf *b)
1295 bus_addr_t tmp_addr;
1297 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit");
1299 if(sc->dbg_level > 2)
1300 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n");
1304 sndbuf_setup(b, vbuf, sz);
1305 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE;
1307 if(sc->dbg_level > 2)
1308 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n");
1309 emu_memfree(&sc->mem, vbuf);
1312 m->end = m->start + sz;
1323 s->start = m->start;
1339 emu_vsetup(struct emu_voice *v, int fmt, int spd)
1342 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0;
1343 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0;
1344 if (v->slave != NULL) {
1345 v->slave->b16 = v->b16;
1346 v->slave->stereo = v->stereo;
1351 if (v->slave != NULL)
1352 v->slave->speed = v->speed;
1357 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v)
1361 for (i = 0; i < 8; i++) {
1362 v->routing[i] = rt->routing_left[i];
1363 v->amounts[i] = rt->amounts_left[i];
1365 if ((v->stereo) && (v->ismaster == 0))
1366 for (i = 0; i < 8; i++) {
1367 v->routing[i] = rt->routing_right[i];
1368 v->amounts[i] = rt->amounts_right[i];
1371 if ((v->stereo) && (v->slave != NULL))
1372 emu_vroute(sc, rt, v->slave);
1376 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
1379 uint32_t start, val, silent_page;
1381 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
1383 v->sa = v->start >> s;
1384 v->ea = v->end >> s;
1388 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
1390 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
1392 val = v->stereo ? 28 : 30;
1393 val *= v->b16 ? 1 : 2;
1394 start = v->sa + val;
1396 if (sc->is_emu10k1) {
1397 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
1398 (v->routing[2] << 8) |
1399 (v->routing[1] << 4) |
1400 (v->routing[0] << 0)) << 16);
1402 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
1403 (v->routing[2] << 16) |
1404 (v->routing[1] << 8) |
1405 (v->routing[0] << 0));
1406 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
1407 (v->routing[6] << 16) |
1408 (v->routing[5] << 8) |
1409 (v->routing[4] << 0));
1410 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
1411 (v->amounts[6] << 26) |
1412 (v->amounts[5] << 8) |
1413 (v->amounts[4] << 0));
1415 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
1416 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
1417 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
1419 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
1420 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
1421 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
1423 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
1424 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
1425 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
1427 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
1428 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
1429 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
1430 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
1431 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
1432 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
1433 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
1434 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
1435 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
1436 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
1438 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
1439 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
1441 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
1442 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
1443 if ((v->stereo) && (v->slave != NULL))
1444 emu_vwrite(sc, v->slave);
1448 emu_vstop(struct emu_sc_info *sc, char channel, int enable)
1452 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
1455 reg |= channel << 16;
1456 emu_wrptr(sc, 0, reg, enable);
1460 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
1462 uint32_t pitch_target, initial_pitch;
1463 uint32_t cra, cs, ccis;
1468 cs = v->stereo ? 4 : 2;
1469 ccis = v->stereo ? 28 : 30;
1470 ccis *= v->b16 ? 1 : 2;
1471 sample = v->b16 ? 0x00000000 : 0x80808080;
1472 for (i = 0; i < cs; i++)
1473 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
1474 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
1475 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
1476 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
1478 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
1479 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
1480 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
1481 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
1482 emu_vstop(sc, v->vnum, 0);
1484 pitch_target = emu_rate_to_linearpitch(v->speed);
1485 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
1486 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
1487 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
1488 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
1490 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
1491 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
1492 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
1493 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
1494 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
1495 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
1496 emu_vstop(sc, v->vnum, 1);
1498 if ((v->stereo) && (v->slave != NULL))
1499 emu_vtrigger(sc, v->slave, go);
1503 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
1507 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
1508 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
1509 return (ptr & ~0x0000001f);
1515 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
1517 emu_wrptr(sc, 0, sc->code_base + pc, data);
1522 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc)
1524 if ((*pc) + 1 > sc->code_size) {
1525 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc));
1528 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y);
1529 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w);
1534 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
1536 struct emu_sc_info *sc;
1544 new_vol = emumix_get_volume(sc, mixer_id);
1545 err = sysctl_handle_int(oidp, &new_vol, 0, req);
1547 if (err || req->newptr == NULL)
1549 if (new_vol < 0 || new_vol > 100)
1551 emumix_set_volume(sc, mixer_id, new_vol);
1557 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
1560 char sysctl_name[32];
1562 volgpr = emu_rm_gpr_alloc(sc->rm, 1);
1563 emumix_set_fxvol(sc, volgpr, defvolume);
1565 * Mixer controls with NULL mix_name are handled
1566 * by AC97 emulation code or PCM mixer.
1568 if (mix_name != NULL) {
1570 * Temporary sysctls should start with underscore,
1571 * see freebsd-current mailing list, emu10kx driver
1572 * discussion around 2006-05-24.
1574 snprintf(sysctl_name, 32, "_%s", mix_name);
1575 SYSCTL_ADD_PROC(sc->ctx,
1576 SYSCTL_CHILDREN(sc->root),
1577 OID_AUTO, sysctl_name,
1578 CTLTYPE_INT | CTLFLAG_RW, sc, mix_id,
1579 sysctl_emu_mixer_control, "I", "");
1586 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS)
1588 struct emu_sc_info *sc;
1594 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0;
1595 err = sysctl_handle_int(oidp, &new_val, 0, req);
1597 if (err || req->newptr == NULL)
1599 if (new_val < 0 || new_val > 1)
1604 emumix_set_mode(sc, MODE_ANALOG);
1607 emumix_set_mode(sc, MODE_DIGITAL);
1614 emu_digitalswitch(struct emu_sc_info *sc)
1616 /* XXX temporary? */
1617 SYSCTL_ADD_PROC(sc->ctx,
1618 SYSCTL_CHILDREN(sc->root),
1619 OID_AUTO, "_digital",
1620 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1621 sysctl_emu_digitalswitch_control, "I", "Enable digital output");
1627 * Allocate cache GPRs that will hold mixed output channels
1628 * and clear it on every DSP run.
1630 #define EFX_CACHE(CACHE_IDX) do { \
1631 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
1632 emu_addefxop(sc, ACC3, \
1633 GPR(sc->cache_gpr[CACHE_IDX]), \
1640 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */
1641 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \
1642 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \
1643 sc->mixer_volcache[IN_GPR_IDX] = DEF; \
1644 emu_addefxop(sc, MACS, \
1645 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1646 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1648 GPR(sc->mixer_gpr[IN_GPR_IDX]), \
1652 /* allocate GPR, OUT = IN * VOL */
1653 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \
1654 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \
1655 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \
1656 emu_addefxop(sc, MACS, \
1659 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1660 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1664 /* like EFX_OUTPUT, but don't allocate mixer gpr */
1665 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \
1666 emu_addefxop(sc, MACS, \
1669 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1670 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1674 /* skip next OPCOUNT instructions if FLAG != 0 */
1675 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \
1676 emu_addefxop(sc, MACS, \
1678 GPR(sc->mute_gpr[FLAG_GPR]), \
1682 emu_addefxop(sc, SKIP, \
1690 #define EFX_COPY(TO, FROM) do { \
1691 emu_addefxop(sc, ACC3, \
1701 emu_initefx(struct emu_sc_info *sc)
1707 if (sc->is_emu10k1) {
1708 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
1710 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
1713 /* code size is in instructions */
1715 for (i = 0; i < sc->code_size; i++) {
1716 if (sc->is_emu10k1) {
1717 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc);
1719 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc);
1723 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */
1724 for (i = 0; i < NUM_MUTE; i++) {
1725 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1);
1726 emumix_set_gpr(sc, sc->mute_gpr[i], 1);
1728 emu_digitalswitch(sc);
1733 * DSP code below is not good, because:
1734 * 1. It can be written smaller, if it can use DSP accumulator register
1735 * instead of cache_gpr[].
1736 * 2. It can be more careful when volume is 100%, because in DSP
1737 * x*0x7fffffff may not be equal to x !
1741 for (i = 0; i < 16 ; i++) {
1742 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc);
1746 if (sc->is_emu10k1) {
1747 EFX_CACHE(C_FRONT_L);
1748 EFX_CACHE(C_FRONT_R);
1752 /* fx0 to front/record, 100%/muted by default */
1753 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1754 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1755 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1756 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1758 /* in0, from AC97 codec output */
1759 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0);
1760 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0);
1761 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1762 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1764 /* in1, from CD S/PDIF */
1765 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */
1766 EFX_SKIP(4, CDSPDIFMUTE);
1767 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1768 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1769 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1770 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1772 if (sc->dbg_level > 0) {
1773 /* in2, ZoomVide (???) */
1774 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1775 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1776 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0);
1777 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0);
1781 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0);
1782 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0);
1783 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0);
1784 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0);
1786 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1787 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1788 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0);
1789 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0);
1791 /* in5, on-card S/PDIF */
1792 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1793 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1794 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1795 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1797 /* in6, Line2 on Live!Drive */
1798 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1799 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
1800 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0);
1801 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0);
1803 if (sc->dbg_level > 0) {
1805 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
1806 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
1807 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
1808 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
1811 /* analog and digital */
1812 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100);
1813 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100);
1815 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L);
1816 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R);
1818 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L);
1819 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R);
1821 /* rec output to "ADC" */
1822 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100);
1823 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100);
1825 if (!(sc->mch_disabled)) {
1827 * Additional channel volume is controlled by mixer in
1828 * emu_dspmixer_set() in -pcm.c
1831 /* fx2/3 (pcm1) to rear */
1832 EFX_CACHE(C_REAR_L);
1833 EFX_CACHE(C_REAR_R);
1834 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
1835 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
1837 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100);
1838 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100);
1840 /* fx4 (pcm2) to center */
1841 EFX_CACHE(C_CENTER);
1842 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
1843 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1845 /* XXX in digital mode (default) this should be muted because
1846 this output is shared with digital out */
1847 EFX_SKIP(1, ANALOGMUTE);
1848 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1850 /* fx5 (pcm3) to sub */
1852 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
1853 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1855 /* XXX in digital mode (default) this should be muted because
1856 this output is shared with digital out */
1857 EFX_SKIP(1, ANALOGMUTE);
1858 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1862 /* SND_EMU10KX_MULTICHANNEL_DISABLED */
1863 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */
1864 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */
1867 /* XXX 5.1 does not work */
1870 /* (fx0+fx1)/2 to center */
1871 EFX_CACHE(C_CENTER);
1872 emu_addefxop(sc, MACS,
1873 GPR(sc->cache_gpr[C_CENTER]),
1874 GPR(sc->cache_gpr[C_CENTER]),
1875 DSP_CONST(0xd), /* = 1/2 */
1876 GPR(sc->cache_gpr[C_FRONT_L]),
1878 emu_addefxop(sc, MACS,
1879 GPR(sc->cache_gpr[C_CENTER]),
1880 GPR(sc->cache_gpr[C_CENTER]),
1881 DSP_CONST(0xd), /* = 1/2 */
1882 GPR(sc->cache_gpr[C_FRONT_R]),
1884 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1886 /* XXX in digital mode (default) this should be muted because
1887 this output is shared with digital out */
1888 EFX_SKIP(1, ANALOGMUTE);
1889 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1891 /* (fx0+fx1)/2 to sub */
1893 emu_addefxop(sc, MACS,
1894 GPR(sc->cache_gpr[C_CENTER]),
1895 GPR(sc->cache_gpr[C_CENTER]),
1896 DSP_CONST(0xd), /* = 1/2 */
1897 GPR(sc->cache_gpr[C_FRONT_L]),
1899 emu_addefxop(sc, MACS,
1900 GPR(sc->cache_gpr[C_CENTER]),
1901 GPR(sc->cache_gpr[C_CENTER]),
1902 DSP_CONST(0xd), /* = 1/2 */
1903 GPR(sc->cache_gpr[C_FRONT_R]),
1905 /* XXX add lowpass filter here */
1907 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1909 /* XXX in digital mode (default) this should be muted because
1910 this output is shared with digital out */
1911 EFX_SKIP(1, ANALOGMUTE);
1912 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1915 } /* !mch_disabled */
1918 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots
1919 * are used as outputs and already filled with data
1922 * XXX On Live! cards stream does not begin at zero offset.
1923 * It can be HW, driver or sound buffering problem.
1924 * Use sync substream (offset 0x3E) to let userland find
1929 * Substream map (in byte offsets, each substream is 2 bytes):
1930 * 0x00..0x1E - outputs
1931 * 0x20..0x3E - FX, inputs and sync stream
1934 /* First 2 channels (offset 0x20,0x22) are empty */
1935 for(i = (sc->has_51 ? 2 : 0); i < 2; i++)
1936 EFX_COPY(FX2(i), DSP_CONST(0));
1938 /* PCM Playback monitoring, offset 0x24..0x2A */
1939 for(i = 0; i < 4; i++)
1940 EFX_COPY(FX2(i+2), FX(i));
1942 /* Copy of some inputs, offset 0x2C..0x3C */
1943 for(i = 0; i < 9; i++)
1944 EFX_COPY(FX2(i+8), INP(i));
1946 /* sync data (0xc0de, offset 0x3E) */
1947 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
1948 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
1950 EFX_COPY(FX2(15), GPR(sc->dummy_gpr));
1952 } else /* emu10k2 and later */ {
1953 EFX_CACHE(C_FRONT_L);
1954 EFX_CACHE(C_FRONT_R);
1958 /* fx0 to front/record, 100%/muted by default */
1960 * FRONT_[L|R] is controlled by AC97 emulation in
1961 * emu_ac97_[read|write]_emulation in -pcm.c
1963 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1964 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1965 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1966 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1968 /* in0, from AC97 codec output */
1969 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100);
1970 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100);
1971 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1972 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1974 /* in1, from CD S/PDIF */
1975 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1976 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1977 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1978 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1980 /* in2, optical & coax S/PDIF on AudigyDrive*/
1981 /* XXX Should be muted when GPRSCS valid stream == 0 */
1982 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1983 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1984 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0);
1985 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0);
1987 if (sc->dbg_level > 0) {
1989 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0);
1990 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0);
1991 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0);
1992 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0);
1995 /* in4, LineIn 2 on AudigyDrive */
1996 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1997 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1998 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0);
1999 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0);
2001 /* in5, on-card S/PDIF */
2002 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
2003 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
2004 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
2005 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
2007 /* in6, AUX2 on AudigyDrive */
2008 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
2009 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
2010 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0);
2011 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0);
2013 if (sc->dbg_level > 0) {
2015 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
2016 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
2017 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
2018 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
2021 /* front output to headphones and alog and digital *front */
2022 /* volume controlled by AC97 emulation */
2023 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100);
2024 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100);
2025 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L);
2026 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R);
2027 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L);
2028 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R);
2030 /* rec output to "ADC" */
2031 /* volume controlled by AC97 emulation */
2032 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100);
2033 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100);
2035 if (!(sc->mch_disabled)) {
2037 * Additional channel volume is controlled by mixer in
2038 * emu_dspmixer_set() in -pcm.c
2041 /* fx2/3 (pcm1) to rear */
2042 EFX_CACHE(C_REAR_L);
2043 EFX_CACHE(C_REAR_R);
2044 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
2045 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
2047 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100);
2048 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100);
2049 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L);
2050 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R);
2052 /* fx4 (pcm2) to center */
2053 EFX_CACHE(C_CENTER);
2054 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
2055 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2058 * XXX in digital mode (default) this should be muted
2059 * because this output is shared with digital out
2061 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2063 /* fx5 (pcm3) to sub */
2065 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
2066 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2069 * XXX in digital mode (default) this should be muted
2070 * because this output is shared with digital out
2072 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2075 /* XXX this will broke headphones on AudigyDrive */
2076 /* fx6/7 (pcm4) to side */
2077 EFX_CACHE(C_SIDE_L);
2078 EFX_CACHE(C_SIDE_R);
2079 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100);
2080 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100);
2081 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100);
2082 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100);
2083 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L);
2084 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R);
2086 } else { /* mch_disabled */
2087 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L);
2088 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R);
2090 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L);
2091 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R);
2094 /* (fx0+fx1)/2 to center */
2095 EFX_CACHE(C_CENTER);
2096 emu_addefxop(sc, MACS,
2097 GPR(sc->cache_gpr[C_CENTER]),
2098 GPR(sc->cache_gpr[C_CENTER]),
2099 DSP_CONST(0xd), /* = 1/2 */
2100 GPR(sc->cache_gpr[C_FRONT_L]),
2102 emu_addefxop(sc, MACS,
2103 GPR(sc->cache_gpr[C_CENTER]),
2104 GPR(sc->cache_gpr[C_CENTER]),
2105 DSP_CONST(0xd), /* = 1/2 */
2106 GPR(sc->cache_gpr[C_FRONT_R]),
2108 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2110 /* XXX in digital mode (default) this should be muted because
2111 this output is shared with digital out */
2112 EFX_SKIP(1, ANALOGMUTE);
2113 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2115 /* (fx0+fx1)/2 to sub */
2117 emu_addefxop(sc, MACS,
2118 GPR(sc->cache_gpr[C_SUB]),
2119 GPR(sc->cache_gpr[C_SUB]),
2120 DSP_CONST(0xd), /* = 1/2 */
2121 GPR(sc->cache_gpr[C_FRONT_L]),
2123 emu_addefxop(sc, MACS,
2124 GPR(sc->cache_gpr[C_SUB]),
2125 GPR(sc->cache_gpr[C_SUB]),
2126 DSP_CONST(0xd), /* = 1/2 */
2127 GPR(sc->cache_gpr[C_FRONT_R]),
2129 /* XXX add lowpass filter here */
2131 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2133 /* XXX in digital mode (default) this should be muted because
2134 this output is shared with digital out */
2135 EFX_SKIP(1, ANALOGMUTE);
2136 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2138 } /* mch_disabled */
2140 /* MCH RECORDING, high 32 slots */
2143 * Stream map (in byte offsets):
2144 * 0x00..0x3E - outputs
2145 * 0x40..0x7E - FX, inputs
2146 * each substream is 2 bytes.
2149 * XXX Audigy 2 Value cards (and, possibly,
2150 * Audigy 4) write some unknown data in place of
2151 * some outputs (offsets 0x20..0x3F) and one
2152 * input (offset 0x7E).
2155 /* PCM Playback monitoring, offsets 0x40..0x5E */
2156 for(i = 0; i < 16; i++)
2157 EFX_COPY(FX2(i), FX(i));
2159 /* Copy of all inputs, offsets 0x60..0x7E */
2160 for(i = 0; i < 16; i++)
2161 EFX_COPY(FX2(i+16), INP(i));
2163 /* XXX Audigy seems to work correct and does not need this */
2164 /* sync data (0xc0de), offset 0x7E */
2165 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
2166 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
2167 EFX_COPY(FX2(31), GPR(sc->dummy_gpr));
2172 sc->routing_code_end = pc;
2175 if (sc->is_emu10k1) {
2176 emu_wrptr(sc, 0, EMU_DBG, 0);
2178 emu_wrptr(sc, 0, EMU_A_DBG, 0);
2183 static d_open_t emu10kx_open;
2184 static d_close_t emu10kx_close;
2185 static d_read_t emu10kx_read;
2187 static struct cdevsw emu10kx_cdevsw = {
2188 .d_open = emu10kx_open,
2189 .d_close = emu10kx_close,
2190 .d_read = emu10kx_read,
2191 .d_name = "emu10kx",
2192 .d_version = D_VERSION,
2197 emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2200 struct emu_sc_info *sc;
2202 sc = i_dev->si_drv1;
2203 mtx_lock(&sc->emu10kx_lock);
2204 if (sc->emu10kx_isopen) {
2205 mtx_unlock(&sc->emu10kx_lock);
2208 sc->emu10kx_isopen = 1;
2209 mtx_unlock(&sc->emu10kx_lock);
2210 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) {
2214 sc->emu10kx_bufptr = 0;
2215 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM;
2218 mtx_lock(&sc->emu10kx_lock);
2219 sc->emu10kx_isopen = 0;
2220 mtx_unlock(&sc->emu10kx_lock);
2226 emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
2228 struct emu_sc_info *sc;
2230 sc = i_dev->si_drv1;
2232 mtx_lock(&sc->emu10kx_lock);
2233 if (!(sc->emu10kx_isopen)) {
2234 mtx_unlock(&sc->emu10kx_lock);
2237 sbuf_delete(&sc->emu10kx_sbuf);
2238 sc->emu10kx_isopen = 0;
2239 mtx_unlock(&sc->emu10kx_lock);
2245 emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused)
2248 struct emu_sc_info *sc;
2250 sc = i_dev->si_drv1;
2251 mtx_lock(&sc->emu10kx_lock);
2252 if (!(sc->emu10kx_isopen)) {
2253 mtx_unlock(&sc->emu10kx_lock);
2256 mtx_unlock(&sc->emu10kx_lock);
2258 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr);
2259 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0;
2260 sc->emu10kx_bufptr += l;
2266 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
2270 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n");
2271 sbuf_printf(s, "\nHardware resource usage:\n");
2272 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs);
2273 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size);
2274 sbuf_printf(s, "Card supports");
2276 sbuf_printf(s, " AC97 codec");
2278 sbuf_printf(s, " NO AC97 codec");
2282 sbuf_printf(s, " and 7.1 output");
2284 sbuf_printf(s, " and 5.1 output");
2287 sbuf_printf(s, ", SBLive! DSP code");
2289 sbuf_printf(s, ", Audigy DSP code");
2291 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks");
2293 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks");
2294 sbuf_printf(s, "\n");
2295 if (sc->broken_digital)
2296 sbuf_printf(s, "Digital mode unsupported\n");
2297 sbuf_printf(s, "\nInstalled devices:\n");
2298 for (i = 0; i < RT_COUNT; i++)
2299 if (sc->pcm[i] != NULL)
2300 if (device_is_attached(sc->pcm[i])) {
2301 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i]));
2303 if (sc->midi[0] != NULL)
2304 if (device_is_attached(sc->midi[0])) {
2305 sbuf_printf(s, "EMU10Kx MIDI Interface\n");
2306 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0]));
2308 if (sc->midi[1] != NULL)
2309 if (device_is_attached(sc->midi[1])) {
2310 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1]));
2312 if (sc->midi[0] != NULL)
2313 if (device_is_attached(sc->midi[0])) {
2314 sbuf_printf(s, "\tIR reciever MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled");
2316 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital");
2319 return (sbuf_len(s));
2324 emu10kx_dev_init(struct emu_sc_info *sc)
2328 mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0);
2329 unit = device_get_unit(sc->dev);
2331 sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit);
2332 if (sc->cdev != NULL) {
2333 sc->cdev->si_drv1 = sc;
2340 emu10kx_dev_uninit(struct emu_sc_info *sc)
2342 mtx_lock(&sc->emu10kx_lock);
2343 if (sc->emu10kx_isopen) {
2344 mtx_unlock(&sc->emu10kx_lock);
2348 destroy_dev(sc->cdev);
2351 mtx_destroy(&sc->emu10kx_lock);
2355 /* resource manager */
2357 emu_rm_init(struct emu_sc_info *sc)
2363 rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO);
2369 maxcount = sc->num_gprs;
2371 mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF);
2372 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR);
2373 for (i = 0; i < rm->num_gprs; i++)
2374 rm->allocmap[i] = 0;
2375 /* pre-allocate gpr[0] */
2376 rm->allocmap[0] = 1;
2377 rm->last_free_gpr = 1;
2383 emu_rm_uninit(struct emu_sc_info *sc)
2387 if (sc->dbg_level > 1) {
2388 mtx_lock(&(sc->rm->gpr_lock));
2389 for (i = 1; i < sc->rm->last_free_gpr; i++)
2390 if (sc->rm->allocmap[i] > 0)
2391 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i);
2392 mtx_unlock(&(sc->rm->gpr_lock));
2395 mtx_destroy(&(sc->rm->gpr_lock));
2396 free(sc->rm, M_DEVBUF);
2401 emu_rm_gpr_alloc(struct emu_rm *rm, int count)
2406 allocated_gpr = rm->num_gprs;
2407 /* try fast way first */
2408 mtx_lock(&(rm->gpr_lock));
2409 if (rm->last_free_gpr + count <= rm->num_gprs) {
2410 allocated_gpr = rm->last_free_gpr;
2411 rm->last_free_gpr += count;
2412 rm->allocmap[allocated_gpr] = count;
2413 for (i = 1; i < count; i++)
2414 rm->allocmap[allocated_gpr + i] = -(count - i);
2418 allocated_gpr = rm->num_gprs;
2419 while (i < rm->last_free_gpr - count) {
2420 if (rm->allocmap[i] > 0) {
2421 i += rm->allocmap[i];
2424 for (j = 1; j < count; j++) {
2425 if (rm->allocmap[i + j] != 0)
2426 allocated_gpr = rm->num_gprs;
2428 if (allocated_gpr == i)
2432 if (allocated_gpr + count < rm->last_free_gpr) {
2433 rm->allocmap[allocated_gpr] = count;
2434 for (i = 1; i < count; i++)
2435 rm->allocmap[allocated_gpr + i] = -(count - i);
2439 if (allocated_gpr == rm->num_gprs)
2440 allocated_gpr = (-1);
2441 if (allocated_gpr >= 0)
2442 rm->num_used += count;
2443 mtx_unlock(&(rm->gpr_lock));
2444 return (allocated_gpr);
2449 emumix_set_mode(struct emu_sc_info *sc, int mode)
2464 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
2468 hcfg |= EMU_HCFG_JOYENABLE;
2471 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
2473 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
2476 if (mode == MODE_DIGITAL) {
2477 if (sc->broken_digital) {
2478 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
2480 a_iocfg |= EMU_A_IOCFG_GPOUT1;
2481 hcfg |= EMU_HCFG_GPOUT0;
2484 if (mode == MODE_ANALOG)
2485 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2488 a_iocfg |= 0x80; /* XXX */
2490 if ((sc->is_ca0102) || (sc->is_ca0108))
2492 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
2493 * on diffrerent cards.
2494 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
2495 * "disable analog outs" on Audigy (emu10k2)
2497 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
2500 a_iocfg |= 0x20; /* XXX */
2502 /* Mute analog center & subwoofer before mode change */
2503 if (mode == MODE_DIGITAL)
2504 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
2506 emu_wr(sc, EMU_HCFG, hcfg, 4);
2508 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2509 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2511 emu_wr(sc, EMU_A_IOCFG, tmp, 2);
2514 /* Unmute if we have changed mode to analog. */
2516 if (mode == MODE_ANALOG)
2517 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0);
2523 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
2528 case SPDIF_MODE_PCM:
2530 case SPDIF_MODE_AC3:
2531 device_printf(sc->dev, "AC3 mode does not work and disabled\n");
2537 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
2538 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
2539 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
2540 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
2542 mode = SPDIF_MODE_PCM;
2544 emu_wrptr(sc, 0, EMU_SPCS0, spcs);
2545 emu_wrptr(sc, 0, EMU_SPCS1, spcs);
2546 emu_wrptr(sc, 0, EMU_SPCS2, spcs);
2549 #define L2L_POINTS 10
2551 static int l2l_df[L2L_POINTS] = {
2552 0x572C5CA, /* 100..90 */
2553 0x3211625, /* 90..80 */
2554 0x1CC1A76, /* 80..70 */
2555 0x108428F, /* 70..60 */
2556 0x097C70A, /* 60..50 */
2557 0x0572C5C, /* 50..40 */
2558 0x0321162, /* 40..30 */
2559 0x01CC1A7, /* 30..20 */
2560 0x0108428, /* 20..10 */
2561 0x016493D /* 10..0 */
2564 static int l2l_f[L2L_POINTS] = {
2565 0x4984461A, /* 90 */
2566 0x2A3968A7, /* 80 */
2567 0x18406003, /* 70 */
2568 0x0DEDC66D, /* 60 */
2569 0x07FFFFFF, /* 50 */
2570 0x04984461, /* 40 */
2571 0x02A3968A, /* 30 */
2572 0x01840600, /* 20 */
2573 0x00DEDC66, /* 10 */
2594 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS);
2595 lin = log_t % (L2L_POINTS);
2596 lin_t = l2l_df[idx] * lin + l2l_f[idx];
2602 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
2606 emumix_set_gpr(sc, gpr, vol);
2610 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
2612 if (sc->dbg_level > 1)
2614 device_printf(sc->dev, "Zero gpr write access\n");
2621 emu_wrptr(sc, 0, GPR(gpr), val);
2625 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
2628 RANGE(volume, 0, 100);
2629 if (mixer_idx < NUM_MIXERS) {
2630 sc->mixer_volcache[mixer_idx] = volume;
2631 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume);
2636 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
2638 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0))
2639 return (sc->mixer_volcache[mixer_idx]);
2643 /* Init CardBus part */
2645 emu_cardbus_init(struct emu_sc_info *sc)
2649 * XXX May not need this if we have EMU_IPR3 handler.
2650 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
2651 * Looks much like "(data << 16) | register".
2653 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
2654 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001);
2655 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f);
2656 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f);
2658 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f);
2663 /* Probe and attach the card */
2665 emu_init(struct emu_sc_info *sc)
2673 /* disable audio and lock cache */
2674 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2676 /* reset recording buffers */
2677 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2678 emu_wrptr(sc, 0, EMU_MICBA, 0);
2679 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2680 emu_wrptr(sc, 0, EMU_FXBA, 0);
2681 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2682 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2684 /* disable channel interrupt */
2685 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
2686 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2687 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2688 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2689 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2691 /* disable P16V and S/PDIF interrupts */
2692 if ((sc->is_ca0102) || (sc->is_ca0108))
2693 emu_wr(sc, EMU_INTE2, 0, 4);
2696 emu_wr(sc, EMU_INTE3, 0, 4);
2698 /* init phys inputs and outputs */
2701 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
2703 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
2706 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
2708 if (sc->is_emu10k2) /* XXX for later cards? */
2709 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if
2710 * we write 1 here? */
2712 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
2713 /* alignment */ 2, /* boundary */ 0,
2714 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */
2715 /* highaddr */ BUS_SPACE_MAXADDR,
2716 /* filter */ NULL, /* filterarg */ NULL,
2717 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff,
2718 /* flags */ 0, /* lockfunc */ busdma_lock_mutex,
2719 /* lockarg */ &Giant, &(sc->mem.dmat)) != 0) {
2720 device_printf(sc->dev, "unable to create dma tag\n");
2721 bus_dma_tag_destroy(sc->mem.dmat);
2726 SLIST_INIT(&sc->mem.blocks);
2727 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr);
2728 if (sc->mem.ptb_pages == NULL)
2731 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr);
2732 if (sc->mem.silent_page == NULL) {
2733 emu_free(&sc->mem, sc->mem.ptb_pages);
2736 /* Clear page with silence & setup all pointers to this page */
2737 bzero(sc->mem.silent_page, EMUPAGESIZE);
2738 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1;
2739 for (i = 0; i < EMU_MAXPAGES; i++)
2740 sc->mem.ptb_pages[i] = tmp | i;
2742 for (ch = 0; ch < NUM_G; ch++) {
2743 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
2744 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
2746 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
2747 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */
2748 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */
2750 /* init envelope engine */
2751 for (ch = 0; ch < NUM_G; ch++) {
2752 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2753 emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
2754 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
2755 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
2756 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2757 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2758 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
2760 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
2761 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
2762 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
2763 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
2764 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
2765 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
2767 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
2768 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
2769 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
2770 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
2771 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
2772 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */
2773 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */
2774 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
2776 /*** these are last so OFF prevents writing ***/
2777 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
2778 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
2779 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
2780 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
2781 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
2783 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2784 emu_wrptr(sc, ch, 0x4c, 0x0);
2785 emu_wrptr(sc, ch, 0x4d, 0x0);
2786 emu_wrptr(sc, ch, 0x4e, 0x0);
2787 emu_wrptr(sc, ch, 0x4f, 0x0);
2788 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f);
2789 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
2790 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0);
2794 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2796 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2797 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000);
2800 * CAxxxx cards needs additional setup:
2801 * 1. Set I2S capture sample rate to 96000
2802 * 2. Disable P16v / P17v proceesing
2803 * 3. Allow EMU10K DSP inputs
2805 if ((sc->is_ca0102) || (sc->is_ca0108)) {
2807 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE);
2808 spdif_sr &= 0xfffff1ff;
2809 spdif_sr |= EMU_A_I2S_CAPTURE_96000;
2810 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr);
2812 /* Disable P16v processing */
2813 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14);
2815 /* Setup P16v/P17v sound routing */
2817 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00);
2819 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000);
2820 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000);
2822 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2823 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2);
2828 def_mode = MODE_ANALOG;
2829 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2830 def_mode = MODE_DIGITAL;
2831 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) {
2832 device_printf(sc->dev, "Audigy card initialized in analog mode.\n");
2833 def_mode = MODE_ANALOG;
2835 emumix_set_mode(sc, def_mode);
2838 tmp = emu_rd(sc, EMU_HCFG, 4);
2839 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp);
2840 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
2841 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
2842 (tmp & 0x40000000 ? "[0x40] " : ""),
2843 (tmp & 0x20000000 ? "[0x20] " : ""),
2844 (tmp & 0x10000000 ? "[0x10] " : ""),
2845 (tmp & 0x08000000 ? "[0x08] " : ""),
2846 (tmp & 0x04000000 ? "[0x04] " : ""),
2847 (tmp & 0x02000000 ? "[0x02] " : ""),
2848 (tmp & 0x01000000 ? "[0x01]" : " "));
2849 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n",
2850 (tmp & 0x00800000 ? "[0x80] " : ""),
2851 (tmp & 0x00400000 ? "[0x40] " : ""),
2852 (tmp & 0x00200000 ? "[Legacy INT] " : ""),
2853 (tmp & 0x00100000 ? "[0x10] " : ""),
2854 (tmp & 0x00080000 ? "[0x08] " : ""),
2855 (tmp & 0x00040000 ? "[Codec4] " : ""),
2856 (tmp & 0x00020000 ? "[Codec2] " : ""),
2857 (tmp & 0x00010000 ? "[I2S Codec]" : " "));
2858 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n",
2859 (tmp & 0x00008000 ? "[0x80] " : ""),
2860 (tmp & 0x00004000 ? "[GPINPUT0] " : ""),
2861 (tmp & 0x00002000 ? "[GPINPUT1] " : ""),
2862 (tmp & 0x00001000 ? "[GPOUT0] " : ""),
2863 (tmp & 0x00000800 ? "[GPOUT1] " : ""),
2864 (tmp & 0x00000400 ? "[GPOUT2] " : ""),
2865 (tmp & 0x00000200 ? "[Joystick] " : ""),
2866 (tmp & 0x00000100 ? "[0x01]" : " "));
2867 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n",
2868 (tmp & 0x00000080 ? "[0x80] " : ""),
2869 (tmp & 0x00000040 ? "[0x40] " : ""),
2870 (tmp & 0x00000020 ? "[0x20] " : ""),
2871 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""),
2872 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""),
2873 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""),
2874 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""),
2875 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
2877 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2878 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2879 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp);
2880 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )");
2881 printf(" : %s%s%s%s%s%s%s%s\n",
2882 (tmp & 0x8000 ? "[Rear Speakers] " : ""),
2883 (tmp & 0x4000 ? "[Front Speakers] " : ""),
2884 (tmp & 0x2000 ? "[0x20] " : ""),
2885 (tmp & 0x1000 ? "[0x10] " : ""),
2886 (tmp & 0x0800 ? "[0x08] " : ""),
2887 (tmp & 0x0400 ? "[0x04] " : ""),
2888 (tmp & 0x0200 ? "[0x02] " : ""),
2889 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " "));
2890 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )");
2891 printf(" : %s%s%s%s%s%s%s%s\n",
2892 (tmp & 0x0080 ? "[0x80] " : ""),
2893 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""),
2894 (tmp & 0x0020 ? "[0x20] " : ""),
2895 (tmp & 0x0010 ? "[0x10] " : ""),
2896 (tmp & 0x0008 ? "[0x08] " : ""),
2897 (tmp & 0x0004 ? "[GPOUT0] " : ""),
2898 (tmp & 0x0002 ? "[GPOUT1] " : ""),
2899 (tmp & 0x0001 ? "[GPOUT2]" : " "));
2900 } /* is_emu10k2 or ca* */
2906 emu_uninit(struct emu_sc_info *sc)
2909 struct emu_memblk *blk;
2911 emu_wr(sc, EMU_INTE, 0, 4);
2912 for (ch = 0; ch < NUM_G; ch++)
2913 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2914 for (ch = 0; ch < NUM_G; ch++) {
2915 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
2916 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
2917 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2918 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2921 /* disable audio and lock cache */
2922 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2924 emu_wrptr(sc, 0, EMU_PTB, 0);
2925 /* reset recording buffers */
2926 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2927 emu_wrptr(sc, 0, EMU_MICBA, 0);
2928 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2929 emu_wrptr(sc, 0, EMU_FXBA, 0);
2930 emu_wrptr(sc, 0, EMU_FXWC, 0);
2931 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2932 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2933 emu_wrptr(sc, 0, EMU_TCB, 0);
2934 emu_wrptr(sc, 0, EMU_TCBS, 0);
2936 /* disable channel interrupt */
2937 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2938 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2939 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2940 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2942 if (!SLIST_EMPTY(&sc->mem.blocks))
2943 device_printf(sc->dev, "warning: memblock list not empty\n");
2945 SLIST_FOREACH(blk, &sc->mem.blocks, link)
2947 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner);
2949 emu_free(&sc->mem, sc->mem.ptb_pages);
2950 emu_free(&sc->mem, sc->mem.silent_page);
2956 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result)
2958 struct sndcard_func *func = device_get_ivars(dev);
2959 struct emu_sc_info *sc = device_get_softc(bus);
2966 switch (ivar_index) {
2968 *result = func->func;
2971 if (func->varinfo == NULL)
2973 *result = ((struct emu_pcminfo *)func->varinfo)->route;
2975 case EMU_VAR_ISEMU10K1:
2976 *result = sc->is_emu10k1;
2978 case EMU_VAR_MCH_DISABLED:
2979 *result = sc->mch_disabled;
2981 case EMU_VAR_MCH_REC:
2982 *result = sc->mch_rec;
2992 emu_write_ivar(device_t bus __unused, device_t dev __unused,
2993 int ivar_index, uintptr_t value __unused)
2996 switch (ivar_index) {
3006 emu_pci_probe(device_t dev)
3009 unsigned int thiscard = 0;
3012 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2);
3013 if (vendor != 0x1102)
3014 return (ENXIO); /* Not Creative */
3016 thiscard = emu_getcard(dev);
3020 s = sbuf_new(NULL, NULL, 4096, 0);
3023 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode);
3026 device_set_desc_copy(dev, sbuf_data(s));
3030 return (BUS_PROBE_DEFAULT);
3035 emu_pci_attach(device_t dev)
3037 struct sndcard_func *func;
3038 struct emu_sc_info *sc;
3039 struct emu_pcminfo *pcminfo;
3041 struct emu_midiinfo *midiinfo;
3049 sc = device_get_softc(dev);
3050 unit = device_get_unit(dev);
3052 /* Get configuration */
3054 sc->ctx = device_get_sysctl_ctx(dev);
3055 if (sc->ctx == NULL)
3057 sc->root = device_get_sysctl_tree(dev);
3058 if (sc->root == NULL)
3061 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled)))
3062 RANGE(sc->mch_disabled, 0, 1);
3063 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3064 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3065 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting");
3067 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec)))
3068 RANGE(sc->mch_rec, 0, 1);
3069 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3070 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3071 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting");
3073 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level)))
3074 RANGE(sc->mch_rec, 0, 2);
3075 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3076 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3077 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level");
3079 /* Fill in the softc. */
3080 mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF);
3081 mtx_init(&sc->rw, device_get_nameunit(dev), "exclusive io", MTX_DEF);
3083 sc->type = pci_get_devid(dev);
3084 sc->rev = pci_get_revid(dev);
3089 sc->broken_digital = 0;
3096 device_flags = emu_cards[emu_getcard(dev)].flags;
3097 if (device_flags & HAS_51)
3099 if (device_flags & HAS_71) {
3103 if (device_flags & IS_EMU10K1)
3105 if (device_flags & IS_EMU10K2)
3107 if (device_flags & IS_CA0102)
3109 if (device_flags & IS_CA0108)
3111 if ((sc->is_emu10k2) && (sc->rev == 4)) {
3113 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */
3115 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1))
3116 if (device_flags & IS_CARDBUS)
3119 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) {
3120 device_printf(sc->dev, "Unable to detect HW chipset\n");
3123 if (device_flags & BROKEN_DIGITAL)
3124 sc->broken_digital = 1;
3125 if (device_flags & HAS_AC97)
3128 sc->opcode_shift = 0;
3129 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
3130 sc->opcode_shift = 24;
3131 sc->high_operand_shift = 12;
3134 /* sc->fx_base = 0x0 */
3135 sc->input_base = 0x40;
3136 /* sc->p16vinput_base = 0x50; */
3137 sc->output_base = 0x60;
3138 sc->efxc_base = 0x80;
3139 /* sc->output32h_base = 0xa0; */
3140 /* sc->output32l_base = 0xb0; */
3141 sc->dsp_zero = 0xc0;
3142 /* 0xe0...0x100 are unknown */
3143 /* sc->tram_base = 0x200 */
3144 /* sc->tram_addr_base = 0x300 */
3145 sc->gpr_base = EMU_A_FXGPREGBASE;
3146 sc->num_gprs = 0x200;
3147 sc->code_base = EMU_A_MICROCODEBASE;
3148 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words,
3149 * 1024 instructions */
3151 sc->mchannel_fx = 8;
3152 sc->num_fxbuses = 16;
3154 sc->num_outputs = 16;
3155 sc->address_mask = EMU_A_PTR_ADDR_MASK;
3157 if (sc->is_emu10k1) {
3158 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */
3159 sc->opcode_shift = 20;
3160 sc->high_operand_shift = 10;
3161 sc->code_base = EMU_MICROCODEBASE;
3162 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words,
3163 * 512 instructions */
3164 sc->gpr_base = EMU_FXGPREGBASE;
3165 sc->num_gprs = 0x100;
3166 sc->input_base = 0x10;
3167 sc->output_base = 0x20;
3169 * XXX 5.1 Analog outputs are inside efxc address space!
3170 * They use output+0x11/+0x12 (=efxc+1/+2).
3171 * Don't use this efx registers for recording on SB Live! 5.1!
3173 sc->efxc_base = 0x30;
3174 sc->dsp_zero = 0x40;
3175 sc->mchannel_fx = 0;
3176 sc->num_fxbuses = 8;
3178 sc->num_outputs = 16;
3179 sc->address_mask = EMU_PTR_ADDR_MASK;
3181 if (sc->opcode_shift == 0)
3184 pci_enable_busmaster(dev);
3187 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
3188 if (sc->reg == NULL) {
3189 device_printf(dev, "unable to map register space\n");
3192 sc->st = rman_get_bustag(sc->reg);
3193 sc->sh = rman_get_bushandle(sc->reg);
3195 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
3196 sc->timer[i] = 0; /* disable it */
3199 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE);
3200 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
3201 #if __FreeBSD_version >= 700031
3204 emu_intr, sc, &sc->ih)) {
3205 device_printf(dev, "unable to map interrupt\n");
3208 if (emu_rm_init(sc) != 0) {
3209 device_printf(dev, "unable to create resource manager\n");
3213 if (emu_cardbus_init(sc) != 0) {
3214 device_printf(dev, "unable to initialize CardBus interface\n");
3217 if (emu_init(sc) != 0) {
3218 device_printf(dev, "unable to initialize the card\n");
3221 if (emu10kx_dev_init(sc) != 0) {
3222 device_printf(dev, "unable to create control device\n");
3225 snprintf(status, 255, "rev %d at io 0x%lx irq %ld", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq));
3228 for (i = 0; i < NUM_G; i++) {
3229 sc->voice[i].vnum = i;
3230 sc->voice[i].slave = NULL;
3231 sc->voice[i].busy = 0;
3232 sc->voice[i].ismaster = 0;
3233 sc->voice[i].running = 0;
3234 sc->voice[i].b16 = 0;
3235 sc->voice[i].stereo = 0;
3236 sc->voice[i].speed = 0;
3237 sc->voice[i].start = 0;
3238 sc->voice[i].end = 0;
3242 for (i = 0; i < RT_COUNT; i++)
3246 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3251 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3252 if (pcminfo == NULL) {
3257 pcminfo->route = RT_FRONT;
3259 func->func = SCF_PCM;
3260 func->varinfo = pcminfo;
3261 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1);
3262 device_set_ivars(sc->pcm[RT_FRONT], func);
3264 if (!(sc->mch_disabled)) {
3266 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3271 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3272 if (pcminfo == NULL) {
3277 pcminfo->route = RT_REAR;
3279 func->func = SCF_PCM;
3280 func->varinfo = pcminfo;
3281 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1);
3282 device_set_ivars(sc->pcm[RT_REAR], func);
3285 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3290 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3291 if (pcminfo == NULL) {
3296 pcminfo->route = RT_CENTER;
3298 func->func = SCF_PCM;
3299 func->varinfo = pcminfo;
3300 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1);
3301 device_set_ivars(sc->pcm[RT_CENTER], func);
3303 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3308 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3309 if (pcminfo == NULL) {
3314 pcminfo->route = RT_SUB;
3316 func->func = SCF_PCM;
3317 func->varinfo = pcminfo;
3318 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1);
3319 device_set_ivars(sc->pcm[RT_SUB], func);
3323 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3328 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3329 if (pcminfo == NULL) {
3334 pcminfo->route = RT_SIDE;
3336 func->func = SCF_PCM;
3337 func->varinfo = pcminfo;
3338 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1);
3339 device_set_ivars(sc->pcm[RT_SIDE], func);
3341 } /* mch_disabled */
3344 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3349 pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3350 if (pcminfo == NULL) {
3355 pcminfo->route = RT_MCHRECORD;
3357 func->func = SCF_PCM;
3358 func->varinfo = pcminfo;
3359 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1);
3360 device_set_ivars(sc->pcm[RT_MCHRECORD], func);
3363 for (i = 0; i < 2; i++)
3366 /* MIDI has some memory mangament and (possible) locking problems */
3368 /* Midi Interface 1: Live!, Audigy, Audigy 2 */
3369 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) {
3370 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3375 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3376 if (midiinfo == NULL) {
3380 midiinfo->card = sc;
3381 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3382 midiinfo->port = EMU_A_MUDATA1;
3383 midiinfo->portnr = 1;
3385 if (sc->is_emu10k1) {
3386 midiinfo->port = MUDATA;
3387 midiinfo->portnr = 1;
3389 func->func = SCF_MIDI;
3390 func->varinfo = midiinfo;
3391 sc->midi[0] = device_add_child(dev, "midi", -1);
3392 device_set_ivars(sc->midi[0], func);
3394 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */
3395 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3396 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
3401 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
3402 if (midiinfo == NULL) {
3406 midiinfo->card = sc;
3408 midiinfo->port = EMU_A_MUDATA2;
3409 midiinfo->portnr = 2;
3411 func->func = SCF_MIDI;
3412 func->varinfo = midiinfo;
3413 sc->midi[1] = device_add_child(dev, "midi", -1);
3414 device_set_ivars(sc->midi[1], func);
3417 return (bus_generic_attach(dev));
3420 /* XXX can we just call emu_pci_detach here? */
3422 emu10kx_dev_uninit(sc);
3426 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3428 bus_teardown_intr(dev, sc->irq, sc->ih);
3430 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3431 mtx_destroy(&sc->rw);
3432 mtx_destroy(&sc->lock);
3437 emu_pci_detach(device_t dev)
3439 struct emu_sc_info *sc;
3440 struct sndcard_func *func;
3442 device_t *childlist;
3445 sc = device_get_softc(dev);
3447 for (i = 0; i < RT_COUNT; i++) {
3448 if (sc->pcm[i] != NULL) {
3449 func = device_get_ivars(sc->pcm[i]);
3450 if (func != NULL && func->func == SCF_PCM) {
3451 device_set_ivars(sc->pcm[i], NULL);
3452 free(func->varinfo, M_DEVBUF);
3453 free(func, M_DEVBUF);
3455 r = device_delete_child(dev, sc->pcm[i]);
3460 if (sc->midi[0] != NULL) {
3461 func = device_get_ivars(sc->midi[0]);
3462 if (func != NULL && func->func == SCF_MIDI) {
3463 device_set_ivars(sc->midi[0], NULL);
3464 free(func->varinfo, M_DEVBUF);
3465 free(func, M_DEVBUF);
3467 r = device_delete_child(dev, sc->midi[0]);
3471 if (sc->midi[1] != NULL) {
3472 func = device_get_ivars(sc->midi[1]);
3473 if (func != NULL && func->func == SCF_MIDI) {
3474 device_set_ivars(sc->midi[1], NULL);
3475 free(func->varinfo, M_DEVBUF);
3476 free(func, M_DEVBUF);
3478 r = device_delete_child(dev, sc->midi[1]);
3482 if (device_get_children(dev, &childlist, &devcount) == 0)
3483 for (i = 0; i < devcount - 1; i++) {
3484 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i]));
3485 func = device_get_ivars(childlist[i]);
3486 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) {
3487 device_set_ivars(childlist[i], NULL);
3488 free(func->varinfo, M_DEVBUF);
3489 free(func, M_DEVBUF);
3491 device_delete_child(dev, childlist[i]);
3493 if (childlist != NULL)
3494 free(childlist, M_TEMP);
3496 r = emu10kx_dev_uninit(sc);
3505 bus_dma_tag_destroy(sc->mem.dmat);
3508 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3509 bus_teardown_intr(dev, sc->irq, sc->ih);
3510 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3511 mtx_destroy(&sc->rw);
3512 mtx_destroy(&sc->lock);
3514 return (bus_generic_detach(dev));
3516 /* add suspend, resume */
3517 static device_method_t emu_methods[] = {
3518 /* Device interface */
3519 DEVMETHOD(device_probe, emu_pci_probe),
3520 DEVMETHOD(device_attach, emu_pci_attach),
3521 DEVMETHOD(device_detach, emu_pci_detach),
3523 DEVMETHOD(bus_read_ivar, emu_read_ivar),
3524 DEVMETHOD(bus_write_ivar, emu_write_ivar),
3530 static driver_t emu_driver = {
3533 sizeof(struct emu_sc_info),
3540 emu_modevent(module_t mod __unused, int cmd, void *data __unused)
3546 break; /* Success */
3551 /* XXX Should we check state of pcm & midi subdevices here? */
3553 break; /* Success */
3564 static devclass_t emu_devclass;
3566 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL);
3567 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);