sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27
  28 /*
  29  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  30  * that this driver still in its early stage, and possible of rewrite are
  31  * pretty much guaranteed. There are supposedly several distinct parent/child
  32  * busses to make this "perfect", but as for now and for the sake of
  33  * simplicity, everything is gobble up within single source.
  34  *
  35  * List of subsys:
  36  *     1) HDA Controller support
  37  *     2) HDA Codecs support, which may include
  38  *        - HDA
  39  *        - Modem
  40  *        - HDMI
  41  *     3) Widget parser - the real magic of why this driver works on so
  42  *        many hardwares with minimal vendor specific quirk. The original
  43  *        parser was written using Ruby and can be found at
  44  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  45  *        ruby parser take the verbose dmesg dump as its input. Refer to
  46  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  47  *        interesting documents, especially UAA (Universal Audio Architecture).
  48  *     4) Possible vendor specific support.
  49  *        (snd_hda_intel, snd_hda_ati, etc..)
  50  *
  51  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  52  * Compaq V3000 with Conexant HDA.
  53  *
  54  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  55  *    *                                                                 *
  56  *    *        This driver is a collaborative effort made by:           *
  57  *    *                                                                 *
  58  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  59  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  60  *    *               Wesley Morgan <morganw@chemikals.org>             *
  61  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  62  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  63  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  64  *    *                                                                 *
  65  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  66  *    *                                                                 *
  67  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  68  */
  69
  70 #include <dev/sound/pcm/sound.h>
  71 #include <dev/pci/pcireg.h>
  72 #include <dev/pci/pcivar.h>
  73
  74 #include <sys/ctype.h>
  75 #include <sys/taskqueue.h>
  76
  77 #include <dev/sound/pci/hda/hdac_private.h>
  78 #include <dev/sound/pci/hda/hdac_reg.h>
  79 #include <dev/sound/pci/hda/hda_reg.h>
  80 #include <dev/sound/pci/hda/hdac.h>
  81
  82 #include "mixer_if.h"
  83
  84 #define HDA_DRV_TEST_REV        "20080420_0052"
  85 #define HDA_WIDGET_PARSER_REV   1
  86
  87 SND_DECLARE_FILE("$FreeBSD$");
  88
  89 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  90         if (bootverbose != 0 || snd_verbose > 3) {      \
  91                 stmt                                    \
  92         }                                               \
  93 } while(0)
  94
  95 #if 1
  96 #undef HDAC_INTR_EXTRA
  97 #define HDAC_INTR_EXTRA         1
  98 #endif
  99
 100 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 101 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 102 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 103 #define hdac_lockowned(sc)      mtx_owned((sc)->lock)
 104
 105 #undef HDAC_MSI_ENABLED
 106 #if __FreeBSD_version >= 700026 ||                                      \
 107     (__FreeBSD_version < 700000 && __FreeBSD_version >= 602106)
 108 #define HDAC_MSI_ENABLED        1
 109 #endif
 110
 111 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 112 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 113                                 (fl) == 0xffffffff || \
 114                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 115                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 116                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 117                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 118 #define HDA_MATCH_ALL           0xffffffff
 119 #define HDAC_INVALID            0xffffffff
 120
 121 /* Default controller / jack sense poll: 250ms */
 122 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 123
 124 /*
 125  * Make room for possible 4096 playback/record channels, in 100 years to come.
 126  */
 127 #define HDAC_TRIGGER_NONE       0x00000000
 128 #define HDAC_TRIGGER_PLAY       0x00000fff
 129 #define HDAC_TRIGGER_REC        0x00fff000
 130 #define HDAC_TRIGGER_UNSOL      0x80000000
 131
 132 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 133                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 134
 135 /* Controller models */
 136
 137 /* Intel */
 138 #define INTEL_VENDORID          0x8086
 139 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 140 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 141 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 142 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 143 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 144 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 145
 146 /* Nvidia */
 147 #define NVIDIA_VENDORID         0x10de
 148 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 149 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 150 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 151 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 152 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 153 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 154 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 155 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 156 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 157
 158 /* ATI */
 159 #define ATI_VENDORID            0x1002
 160 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 161 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 162 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 163
 164 /* VIA */
 165 #define VIA_VENDORID            0x1106
 166 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 167 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 168
 169 /* SiS */
 170 #define SIS_VENDORID            0x1039
 171 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 172 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 173
 174 /* OEM/subvendors */
 175
 176 /* Intel */
 177 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 178
 179 /* HP/Compaq */
 180 #define HP_VENDORID             0x103c
 181 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 182 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 183 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 184 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 185 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 186 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 187 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 188 #define HP_DC7700S_SUBVENDOR    HDA_MODEL_CONSTRUCT(HP, 0x2801)
 189 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 190 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 191 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 192 #define HP_NX6325_SUBVENDORX    0x103c30b0
 193
 194 /* Dell */
 195 #define DELL_VENDORID           0x1028
 196 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 197 #define DELL_V1500_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x0228)
 198 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 199 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 200 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 201 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 202
 203 /* Clevo */
 204 #define CLEVO_VENDORID          0x1558
 205 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 206 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 207
 208 /* Acer */
 209 #define ACER_VENDORID           0x1025
 210 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 211 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 212 #define ACER_A4710_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x012f)
 213 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 214 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 215
 216 /* Asus */
 217 #define ASUS_VENDORID           0x1043
 218 #define ASUS_A8X_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 219 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 220 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 221 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 222 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 223 #define ASUS_G2K_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1339)
 224 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 225 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 226 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 227 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 228 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 229 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 230 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 231 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 232 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 233 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 234
 235 /* IBM / Lenovo */
 236 #define IBM_VENDORID            0x1014
 237 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 238 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 239
 240 /* Lenovo */
 241 #define LENOVO_VENDORID         0x17aa
 242 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 243 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 244 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 245
 246 /* Samsung */
 247 #define SAMSUNG_VENDORID        0x144d
 248 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 249 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 250
 251 /* Medion ? */
 252 #define MEDION_VENDORID                 0x161f
 253 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 254 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 255
 256 /* Apple Computer Inc. */
 257 #define APPLE_VENDORID          0x106b
 258 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 259
 260 /*
 261  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 262  * instead of their own, which is beyond my comprehension
 263  * (see HDA_CODEC_STAC9221 below).
 264  */
 265 #define APPLE_INTEL_MAC         0x76808384
 266
 267 /* LG Electronics */
 268 #define LG_VENDORID             0x1854
 269 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 270 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 271
 272 /* Fujitsu Siemens */
 273 #define FS_VENDORID             0x1734
 274 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 275 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 276 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 277
 278 /* Fujitsu Limited */
 279 #define FL_VENDORID             0x10cf
 280 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 281 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 282
 283 /* Toshiba */
 284 #define TOSHIBA_VENDORID        0x1179
 285 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 286 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 287 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 288
 289 /* Micro-Star International (MSI) */
 290 #define MSI_VENDORID            0x1462
 291 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 292 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 293 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 294
 295 /* Giga-Byte Technology */
 296 #define GB_VENDORID             0x1458
 297 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 298 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 299
 300 /* Uniwill ? */
 301 #define UNIWILL_VENDORID        0x1584
 302 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 303 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 304
 305
 306 /* Misc constants.. */
 307 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 308 #define HDA_AMP_MUTE_NONE       (0)
 309 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 310 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 311 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 312
 313 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 314 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 315
 316 #define HDA_DAC_PATH    (1 << 0)
 317 #define HDA_ADC_PATH    (1 << 1)
 318 #define HDA_ADC_RECSEL  (1 << 2)
 319
 320 #define HDA_DAC_LOCKED  (1 << 3)
 321 #define HDA_ADC_LOCKED  (1 << 4)
 322
 323 #define HDA_CTL_OUT     (1 << 0)
 324 #define HDA_CTL_IN      (1 << 1)
 325 #define HDA_CTL_BOTH    (HDA_CTL_IN | HDA_CTL_OUT)
 326
 327 #define HDA_GPIO_MAX            8
 328 /* 0 - 7 = GPIO , 8 = Flush */
 329 #define HDA_QUIRK_GPIO0         (1 << 0)
 330 #define HDA_QUIRK_GPIO1         (1 << 1)
 331 #define HDA_QUIRK_GPIO2         (1 << 2)
 332 #define HDA_QUIRK_GPIO3         (1 << 3)
 333 #define HDA_QUIRK_GPIO4         (1 << 4)
 334 #define HDA_QUIRK_GPIO5         (1 << 5)
 335 #define HDA_QUIRK_GPIO6         (1 << 6)
 336 #define HDA_QUIRK_GPIO7         (1 << 7)
 337 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 338
 339 /* 9 - 25 = anything else */
 340 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 341 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 342 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 343 #define HDA_QUIRK_EAPDINV       (1 << 12)
 344 #define HDA_QUIRK_DMAPOS        (1 << 13)
 345
 346 /* 26 - 31 = vrefs */
 347 #define HDA_QUIRK_IVREF50       (1 << 26)
 348 #define HDA_QUIRK_IVREF80       (1 << 27)
 349 #define HDA_QUIRK_IVREF100      (1 << 28)
 350 #define HDA_QUIRK_OVREF50       (1 << 29)
 351 #define HDA_QUIRK_OVREF80       (1 << 30)
 352 #define HDA_QUIRK_OVREF100      (1 << 31)
 353
 354 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 355                                                         HDA_QUIRK_IVREF100)
 356 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 357                                                         HDA_QUIRK_OVREF100)
 358 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 359
 360 #define SOUND_MASK_SKIP         (1 << 30)
 361 #define SOUND_MASK_DISABLE      (1 << 31)
 362
 363 #if __FreeBSD_version < 600000
 364 #define taskqueue_drain(...)
 365 #endif
 366
 367 static const struct {
 368         char *key;
 369         uint32_t value;
 370 } hdac_quirks_tab[] = {
 371         { "gpio0", HDA_QUIRK_GPIO0 },
 372         { "gpio1", HDA_QUIRK_GPIO1 },
 373         { "gpio2", HDA_QUIRK_GPIO2 },
 374         { "gpio3", HDA_QUIRK_GPIO3 },
 375         { "gpio4", HDA_QUIRK_GPIO4 },
 376         { "gpio5", HDA_QUIRK_GPIO5 },
 377         { "gpio6", HDA_QUIRK_GPIO6 },
 378         { "gpio7", HDA_QUIRK_GPIO7 },
 379         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 380         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 381         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 382         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 383         { "eapdinv", HDA_QUIRK_EAPDINV },
 384         { "dmapos", HDA_QUIRK_DMAPOS },
 385         { "ivref50", HDA_QUIRK_IVREF50 },
 386         { "ivref80", HDA_QUIRK_IVREF80 },
 387         { "ivref100", HDA_QUIRK_IVREF100 },
 388         { "ovref50", HDA_QUIRK_OVREF50 },
 389         { "ovref80", HDA_QUIRK_OVREF80 },
 390         { "ovref100", HDA_QUIRK_OVREF100 },
 391         { "ivref", HDA_QUIRK_IVREF },
 392         { "ovref", HDA_QUIRK_OVREF },
 393         { "vref", HDA_QUIRK_VREF },
 394 };
 395 #define HDAC_QUIRKS_TAB_LEN     \
 396                 (sizeof(hdac_quirks_tab) / sizeof(hdac_quirks_tab[0]))
 397
 398 #define HDA_BDL_MIN     2
 399 #define HDA_BDL_MAX     256
 400 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 401
 402 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 403 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 404
 405 #define HDA_BUFSZ_MIN           4096
 406 #define HDA_BUFSZ_MAX           65536
 407 #define HDA_BUFSZ_DEFAULT       16384
 408
 409 #define HDA_PARSE_MAXDEPTH      10
 410
 411 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 412 #define HDAC_UNSOLTAG_EVENT_TEST        0x01
 413
 414 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 415
 416 enum {
 417         HDA_PARSE_MIXER,
 418         HDA_PARSE_DIRECT
 419 };
 420
 421 /* Default */
 422 static uint32_t hdac_fmt[] = {
 423         AFMT_STEREO | AFMT_S16_LE,
 424         0
 425 };
 426
 427 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 428
 429 static const struct {
 430         uint32_t        model;
 431         char            *desc;
 432 } hdac_devices[] = {
 433         { HDA_INTEL_82801F,  "Intel 82801F" },
 434         { HDA_INTEL_63XXESB, "Intel 631x/632xESB" },
 435         { HDA_INTEL_82801G,  "Intel 82801G" },
 436         { HDA_INTEL_82801H,  "Intel 82801H" },
 437         { HDA_INTEL_82801I,  "Intel 82801I" },
 438         { HDA_NVIDIA_MCP51,  "NVidia MCP51" },
 439         { HDA_NVIDIA_MCP55,  "NVidia MCP55" },
 440         { HDA_NVIDIA_MCP61_1, "NVidia MCP61" },
 441         { HDA_NVIDIA_MCP61_2, "NVidia MCP61" },
 442         { HDA_NVIDIA_MCP65_1, "NVidia MCP65" },
 443         { HDA_NVIDIA_MCP65_2, "NVidia MCP65" },
 444         { HDA_NVIDIA_MCP67_1, "NVidia MCP67" },
 445         { HDA_NVIDIA_MCP67_2, "NVidia MCP67" },
 446         { HDA_ATI_SB450,     "ATI SB450"    },
 447         { HDA_ATI_SB600,     "ATI SB600"    },
 448         { HDA_VIA_VT82XX,    "VIA VT8251/8237A" },
 449         { HDA_SIS_966,       "SiS 966" },
 450         /* Unknown */
 451         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 452         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 453         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 454         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 455         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 456 };
 457 #define HDAC_DEVICES_LEN (sizeof(hdac_devices) / sizeof(hdac_devices[0]))
 458
 459 static const struct {
 460         uint16_t vendor;
 461         uint8_t reg;
 462         uint8_t mask;
 463         uint8_t enable;
 464 } hdac_pcie_snoop[] = {
 465         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 466         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 467         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 468 };
 469 #define HDAC_PCIESNOOP_LEN      \
 470                         (sizeof(hdac_pcie_snoop) / sizeof(hdac_pcie_snoop[0]))
 471
 472 static const struct {
 473         uint32_t        rate;
 474         int             valid;
 475         uint16_t        base;
 476         uint16_t        mul;
 477         uint16_t        div;
 478 } hda_rate_tab[] = {
 479         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 480         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 481         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 482         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 483         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 484         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 485         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 486         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 487         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 488         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 489         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 490         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 491         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 492         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 493         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 494         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 495         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 496         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 497         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 498         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 499         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 500         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 501         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 502         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 503         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 504         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 505         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 506         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 507         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 508         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 509         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 510         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 511         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 512         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 513         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 514 };
 515 #define HDA_RATE_TAB_LEN (sizeof(hda_rate_tab) / sizeof(hda_rate_tab[0]))
 516
 517 /* All codecs you can eat... */
 518 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 519                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 520
 521 /* Realtek */
 522 #define REALTEK_VENDORID        0x10ec
 523 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 524 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 525 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 526 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 527 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 528 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 529 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 530 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 531 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 532 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 533 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 534 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 535
 536 /* Analog Devices */
 537 #define ANALOGDEVICES_VENDORID  0x11d4
 538 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 539 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 540 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 541 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 542 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 543 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 544 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 545
 546 /* CMedia */
 547 #define CMEDIA_VENDORID         0x434d
 548 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 549 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 550
 551 /* Sigmatel */
 552 #define SIGMATEL_VENDORID       0x8384
 553 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 554 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 555 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 556 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 557 #define HDA_CODEC_STAC9227      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 558 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 559 #define HDA_CODEC_STAC9205      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a0)
 560 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 561
 562 /*
 563  * Conexant
 564  *
 565  * Ok, the truth is, I don't have any idea at all whether
 566  * it is "Venice" or "Waikiki" or other unnamed CXyadayada. The only
 567  * place that tell me it is "Venice" is from its Windows driver INF.
 568  *
 569  *  Venice - CX?????
 570  * Waikiki - CX20551-22
 571  */
 572 #define CONEXANT_VENDORID       0x14f1
 573 #define HDA_CODEC_CXVENICE      HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 574 #define HDA_CODEC_CXWAIKIKI     HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 575 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 576
 577 /* VIA */
 578 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 579 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 580 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 581 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 582 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 583 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 584 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 585 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 586 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 587 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 588 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 589 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 590 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 591
 592
 593 /* Codecs */
 594 static const struct {
 595         uint32_t id;
 596         char *name;
 597 } hdac_codecs[] = {
 598         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 599         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 600         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 601         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 602         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 603         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 604         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 605         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 606         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 607         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 608         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 609         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 610         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 611         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 612         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 613         { HDA_CODEC_AD1988,    "Analog Devices AD1988" },
 614         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 615         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 616         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 617         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 618         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 619         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 620         { HDA_CODEC_STAC9227,  "Sigmatel STAC9227" },
 621         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 622         { HDA_CODEC_STAC9205,  "Sigmatel STAC9205" },
 623         { HDA_CODEC_CXVENICE,  "Conexant Venice" },
 624         { HDA_CODEC_CXWAIKIKI, "Conexant Waikiki" },
 625         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 626         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 627         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 628         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 629         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 630         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 631         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 632         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 633         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 634         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 635         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 636         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 637         /* Unknown codec */
 638         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 639         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 640         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 641         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 642         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 643         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 644 };
 645 #define HDAC_CODECS_LEN (sizeof(hdac_codecs) / sizeof(hdac_codecs[0]))
 646
 647 enum {
 648         HDAC_HP_SWITCH_CTL,
 649         HDAC_HP_SWITCH_CTRL,
 650         HDAC_HP_SWITCH_DEBUG
 651 };
 652
 653 static const struct {
 654         uint32_t model;
 655         uint32_t id;
 656         int type;
 657         int inverted;
 658         int polling;
 659         int execsense;
 660         nid_t hpnid;
 661         nid_t spkrnid[8];
 662         nid_t eapdnid;
 663 } hdac_hp_switch[] = {
 664         /* Specific OEM models */
 665         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 666             0, 0, -1, 17, { 16, -1 }, 16 },
 667         /* { HP_XW4300_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 668             0, 0, -1, 21, { 16, 17, -1 }, -1 } */
 669         /* { HP_3010_SUBVENDOR,  HDA_CODEC_ALC260, HDAC_HP_SWITCH_DEBUG,
 670             0, 1, 0, 16, { 15, 18, 19, 20, 21, -1 }, -1 }, */
 671         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 672             0, 0, -1, 6, { 5, -1 }, 5 },
 673         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 674             0, 0, -1, 6, { 5, -1 }, 5 },
 675         { HP_NX6325_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 676             0, 0, -1, 6, { 5, -1 }, 5 },
 677         /* { HP_DC7700_SUBVENDOR, HDA_CODEC_ALC262, HDAC_HP_SWITCH_CTL,
 678             0, 0, -1, 21, { 22, 27, -1 }, -1 }, */
 679         { TOSHIBA_U200_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 680             0, 0, -1, 6, { 5, -1 }, -1 },
 681         { TOSHIBA_A135_SUBVENDOR, HDA_CODEC_ALC861VD, HDAC_HP_SWITCH_CTL,
 682             0, 0, -1, 27, { 20, -1 }, -1 },
 683         { DELL_D820_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 684             0, 0, -1, 13, { 14, -1 }, -1 },
 685         { DELL_I1300_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 686             0, 0, -1, 13, { 14, -1 }, -1 },
 687         { DELL_OPLX745_SUBVENDOR, HDA_CODEC_AD1983, HDAC_HP_SWITCH_CTL,
 688             0, 0, -1, 6, { 5, 7, -1 }, -1 },
 689         { DELL_V1500_SUBVENDOR, HDA_CODEC_STAC9205, HDAC_HP_SWITCH_CTRL,
 690             0, 0, -1, 10, { 13, -1 }, -1 },
 691         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885, HDAC_HP_SWITCH_CTL,
 692             0, 0, -1, 21, { 20, 22, -1 }, -1 },
 693         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDAC_HP_SWITCH_CTRL,
 694             0, 0, -1, 10, { 13, -1 }, -1 },
 695         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 696             1, 0, -1, 26, { 27, -1 }, -1 },
 697         /* { LENOVO_TCA55_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 698             0, 0, -1, 26, { 27, 28, 29, 30, -1 }, -1 }, */
 699         { LG_LW20_SUBVENDOR, HDA_CODEC_ALC880, HDAC_HP_SWITCH_CTL,
 700             0, 0, -1, 27, { 20, -1 }, -1 },
 701         { ACER_A5050_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 702             0, 0, -1, 20, { 21, -1 }, -1 },
 703         { ACER_3681WXM_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 704             0, 0, -1, 20, { 21, -1 }, -1 },
 705         { ACER_A4520_SUBVENDOR, HDA_CODEC_ALC268, HDAC_HP_SWITCH_CTL,
 706             0, 0, -1, 20, { 21, -1 }, -1 },
 707         { ACER_A4710_SUBVENDOR, HDA_CODEC_ALC268, HDAC_HP_SWITCH_CTL,
 708             0, 0, -1, 20, { 21, -1 }, -1 },
 709         { UNIWILL_9080_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 710             0, 0, -1, 20, { 21, -1 }, -1 },
 711         { MSI_MS1034_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 712             0, 0, -1, 20, { 27, -1 }, -1 },
 713         { MSI_MS034A_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 714             0, 0, -1, 20, { 27, -1 }, -1 },
 715         { FS_SI1848_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 716             0, 0, -1, 20, { 21, -1 }, -1 },
 717         { FL_S7020D_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 718             0, 0, -1, 20, { 16, -1 }, -1 },
 719         /*
 720          * All models that at least come from the same vendor with
 721          * simmilar codec.
 722          */
 723         { HP_ALL_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 724             0, 0, -1, 17, { 16, -1 }, 16 },
 725         { HP_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 726             0, 0, -1, 6, { 5, -1 }, 5 },
 727         { TOSHIBA_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 728             0, 0, -1, 6, { 5, -1 }, -1 },
 729         { DELL_ALL_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 730             0, 0, -1, 13, { 14, -1 }, -1 },
 731 #if 0
 732         { LENOVO_ALL_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 733             1, 0, -1, 26, { 27, -1 }, -1 },
 734         { ACER_ALL_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 735             0, 0, -1, 20, { 21, -1 }, -1 },
 736 #endif
 737 };
 738 #define HDAC_HP_SWITCH_LEN      \
 739                 (sizeof(hdac_hp_switch) / sizeof(hdac_hp_switch[0]))
 740
 741 static const struct {
 742         uint32_t model;
 743         uint32_t id;
 744         nid_t eapdnid;
 745         int hp_switch;
 746 } hdac_eapd_switch[] = {
 747         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, 16, 1 },
 748         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 749         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 750 };
 751 #define HDAC_EAPD_SWITCH_LEN    \
 752                 (sizeof(hdac_eapd_switch) / sizeof(hdac_eapd_switch[0]))
 753
 754 /****************************************************************************
 755  * Function prototypes
 756  ****************************************************************************/
 757 static void     hdac_intr_handler(void *);
 758 static int      hdac_reset(struct hdac_softc *);
 759 static int      hdac_get_capabilities(struct hdac_softc *);
 760 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
 761 static int      hdac_dma_alloc(struct hdac_softc *,
 762                                         struct hdac_dma *, bus_size_t);
 763 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
 764 static int      hdac_mem_alloc(struct hdac_softc *);
 765 static void     hdac_mem_free(struct hdac_softc *);
 766 static int      hdac_irq_alloc(struct hdac_softc *);
 767 static void     hdac_irq_free(struct hdac_softc *);
 768 static void     hdac_corb_init(struct hdac_softc *);
 769 static void     hdac_rirb_init(struct hdac_softc *);
 770 static void     hdac_corb_start(struct hdac_softc *);
 771 static void     hdac_rirb_start(struct hdac_softc *);
 772 static void     hdac_scan_codecs(struct hdac_softc *, int);
 773 static int      hdac_probe_codec(struct hdac_codec *);
 774 static struct   hdac_devinfo *hdac_probe_function(struct hdac_codec *, nid_t);
 775 static void     hdac_add_child(struct hdac_softc *, struct hdac_devinfo *);
 776
 777 static void     hdac_attach2(void *);
 778
 779 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
 780                                                         uint32_t, int);
 781 static void     hdac_command_send_internal(struct hdac_softc *,
 782                                         struct hdac_command_list *, int);
 783
 784 static int      hdac_probe(device_t);
 785 static int      hdac_attach(device_t);
 786 static int      hdac_detach(device_t);
 787 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
 788 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
 789                                                 uint32_t, int, int);
 790 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
 791                                                         nid_t, int, int);
 792 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
 793                                 nid_t, nid_t, int, int, int, int, int, int);
 794 static int      hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *);
 795 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
 796
 797 static int      hdac_rirb_flush(struct hdac_softc *sc);
 798 static int      hdac_unsolq_flush(struct hdac_softc *sc);
 799
 800 #define hdac_command(a1, a2, a3)        \
 801                 hdac_command_sendone_internal(a1, a2, a3)
 802
 803 #define hdac_codec_id(d)                                                \
 804                 ((uint32_t)((d == NULL) ? 0x00000000 :                  \
 805                 ((((uint32_t)(d)->vendor_id & 0x0000ffff) << 16) |      \
 806                 ((uint32_t)(d)->device_id & 0x0000ffff))))
 807
 808 static char *
 809 hdac_codec_name(struct hdac_devinfo *devinfo)
 810 {
 811         uint32_t id;
 812         int i;
 813
 814         id = hdac_codec_id(devinfo);
 815
 816         for (i = 0; i < HDAC_CODECS_LEN; i++) {
 817                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
 818                         return (hdac_codecs[i].name);
 819         }
 820
 821         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
 822 }
 823
 824 static char *
 825 hdac_audio_ctl_ossmixer_mask2name(uint32_t devmask)
 826 {
 827         static char *ossname[] = SOUND_DEVICE_NAMES;
 828         static char *unknown = "???";
 829         int i;
 830
 831         for (i = SOUND_MIXER_NRDEVICES - 1; i >= 0; i--) {
 832                 if (devmask & (1 << i))
 833                         return (ossname[i]);
 834         }
 835         return (unknown);
 836 }
 837
 838 static void
 839 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
 840 {
 841         static char *ossname[] = SOUND_DEVICE_NAMES;
 842         int i, first = 1;
 843
 844         bzero(buf, len);
 845         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
 846                 if (mask & (1 << i)) {
 847                         if (first == 0)
 848                                 strlcat(buf, ", ", len);
 849                         strlcat(buf, ossname[i], len);
 850                         first = 0;
 851                 }
 852         }
 853 }
 854
 855 static struct hdac_audio_ctl *
 856 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
 857 {
 858         if (devinfo == NULL ||
 859             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
 860             index == NULL || devinfo->function.audio.ctl == NULL ||
 861             devinfo->function.audio.ctlcnt < 1 ||
 862             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
 863                 return (NULL);
 864         return (&devinfo->function.audio.ctl[(*index)++]);
 865 }
 866
 867 static struct hdac_audio_ctl *
 868 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid,
 869                                                 int index, int cnt)
 870 {
 871         struct hdac_audio_ctl *ctl, *retctl = NULL;
 872         int i, at, atindex, found = 0;
 873
 874         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
 875                 return (NULL);
 876
 877         at = cnt;
 878         if (at == 0)
 879                 at = 1;
 880         else if (at < 0)
 881                 at = -1;
 882         atindex = index;
 883         if (atindex < 0)
 884                 atindex = -1;
 885
 886         i = 0;
 887         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
 888                 if (ctl->enable == 0 || ctl->widget == NULL)
 889                         continue;
 890                 if (!(ctl->widget->nid == nid && (atindex == -1 ||
 891                     ctl->index == atindex)))
 892                         continue;
 893                 found++;
 894                 if (found == cnt)
 895                         return (ctl);
 896                 retctl = ctl;
 897         }
 898
 899         return ((at == -1) ? retctl : NULL);
 900 }
 901
 902 static void
 903 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
 904 {
 905         struct hdac_softc *sc;
 906         struct hdac_widget *w;
 907         struct hdac_audio_ctl *ctl;
 908         uint32_t val, id, res;
 909         int i = 0, j, timeout, forcemute;
 910         nid_t cad;
 911
 912         if (devinfo == NULL || devinfo->codec == NULL ||
 913             devinfo->codec->sc == NULL)
 914                 return;
 915
 916         sc = devinfo->codec->sc;
 917         cad = devinfo->codec->cad;
 918         id = hdac_codec_id(devinfo);
 919         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
 920                 if (HDA_DEV_MATCH(hdac_hp_switch[i].model,
 921                     sc->pci_subvendor) &&
 922                     hdac_hp_switch[i].id == id)
 923                         break;
 924         }
 925
 926         if (i >= HDAC_HP_SWITCH_LEN)
 927                 return;
 928
 929         forcemute = 0;
 930         if (hdac_hp_switch[i].eapdnid != -1) {
 931                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].eapdnid);
 932                 if (w != NULL && w->param.eapdbtl != HDAC_INVALID)
 933                         forcemute = (w->param.eapdbtl &
 934                             HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD) ? 0 : 1;
 935         }
 936
 937         if (hdac_hp_switch[i].execsense != -1)
 938                 hdac_command(sc,
 939                     HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
 940                     hdac_hp_switch[i].execsense), cad);
 941
 942         timeout = 10000;
 943         do {
 944                 res = hdac_command(sc,
 945                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid),
 946                     cad);
 947                 if (hdac_hp_switch[i].execsense == -1 || res != 0x7fffffff)
 948                         break;
 949                 DELAY(10);
 950         } while (--timeout != 0);
 951
 952         HDA_BOOTVERBOSE(
 953                 device_printf(sc->dev,
 954                     "HDA_DEBUG: Pin sense: nid=%d timeout=%d res=0x%08x\n",
 955                     hdac_hp_switch[i].hpnid, timeout, res);
 956         );
 957
 958         res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
 959         res ^= hdac_hp_switch[i].inverted;
 960
 961         switch (hdac_hp_switch[i].type) {
 962         case HDAC_HP_SWITCH_CTL:
 963                 ctl = hdac_audio_ctl_amp_get(devinfo,
 964                     hdac_hp_switch[i].hpnid, 0, 1);
 965                 if (ctl != NULL) {
 966                         val = (res != 0 && forcemute == 0) ?
 967                             HDA_AMP_MUTE_NONE : HDA_AMP_MUTE_ALL;
 968                         if (val != ctl->muted) {
 969                                 ctl->muted = val;
 970                                 hdac_audio_ctl_amp_set(ctl,
 971                                     HDA_AMP_MUTE_DEFAULT, ctl->left,
 972                                     ctl->right);
 973                         }
 974                 }
 975                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
 976                         ctl = hdac_audio_ctl_amp_get(devinfo,
 977                             hdac_hp_switch[i].spkrnid[j], 0, 1);
 978                         if (ctl == NULL)
 979                                 continue;
 980                         val = (res != 0 || forcemute == 1) ?
 981                             HDA_AMP_MUTE_ALL : HDA_AMP_MUTE_NONE;
 982                         if (val == ctl->muted)
 983                                 continue;
 984                         ctl->muted = val;
 985                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
 986                             ctl->left, ctl->right);
 987                 }
 988                 break;
 989         case HDAC_HP_SWITCH_CTRL:
 990                 if (res != 0) {
 991                         /* HP in */
 992                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
 993                         if (w != NULL && w->type ==
 994                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
 995                                 if (forcemute == 0)
 996                                         val = w->wclass.pin.ctrl |
 997                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 998                                 else
 999                                         val = w->wclass.pin.ctrl &
1000                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1001                                 if (val != w->wclass.pin.ctrl) {
1002                                         w->wclass.pin.ctrl = val;
1003                                         hdac_command(sc,
1004                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1005                                             w->nid, w->wclass.pin.ctrl), cad);
1006                                 }
1007                         }
1008                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1009                                 w = hdac_widget_get(devinfo,
1010                                     hdac_hp_switch[i].spkrnid[j]);
1011                                 if (w == NULL || w->type !=
1012                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1013                                         continue;
1014                                 val = w->wclass.pin.ctrl &
1015                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1016                                 if (val == w->wclass.pin.ctrl)
1017                                         continue;
1018                                 w->wclass.pin.ctrl = val;
1019                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1020                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1021                         }
1022                 } else {
1023                         /* HP out */
1024                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
1025                         if (w != NULL && w->type ==
1026                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1027                                 val = w->wclass.pin.ctrl &
1028                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1029                                 if (val != w->wclass.pin.ctrl) {
1030                                         w->wclass.pin.ctrl = val;
1031                                         hdac_command(sc,
1032                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1033                                             w->nid, w->wclass.pin.ctrl), cad);
1034                                 }
1035                         }
1036                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1037                                 w = hdac_widget_get(devinfo,
1038                                     hdac_hp_switch[i].spkrnid[j]);
1039                                 if (w == NULL || w->type !=
1040                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1041                                         continue;
1042                                 if (forcemute == 0)
1043                                         val = w->wclass.pin.ctrl |
1044                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1045                                 else
1046                                         val = w->wclass.pin.ctrl &
1047                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1048                                 if (val == w->wclass.pin.ctrl)
1049                                         continue;
1050                                 w->wclass.pin.ctrl = val;
1051                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1052                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1053                         }
1054                 }
1055                 break;
1056         case HDAC_HP_SWITCH_DEBUG:
1057                 if (hdac_hp_switch[i].execsense != -1)
1058                         hdac_command(sc,
1059                             HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
1060                             hdac_hp_switch[i].execsense), cad);
1061                 res = hdac_command(sc,
1062                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid), cad);
1063                 device_printf(sc->dev,
1064                     "[ 0] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1065                     hdac_hp_switch[i].hpnid, res);
1066                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1067                         w = hdac_widget_get(devinfo,
1068                             hdac_hp_switch[i].spkrnid[j]);
1069                         if (w == NULL || w->type !=
1070                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1071                                 continue;
1072                         if (hdac_hp_switch[i].execsense != -1)
1073                                 hdac_command(sc,
1074                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid,
1075                                     hdac_hp_switch[i].execsense), cad);
1076                         res = hdac_command(sc,
1077                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
1078                         device_printf(sc->dev,
1079                             "[%2d] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1080                             j + 1, w->nid, res);
1081                 }
1082                 break;
1083         default:
1084                 break;
1085         }
1086 }
1087
1088 static void
1089 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1090 {
1091         struct hdac_softc *sc;
1092         struct hdac_devinfo *devinfo = NULL;
1093         device_t *devlist = NULL;
1094         int devcount, i;
1095
1096         if (codec == NULL || codec->sc == NULL)
1097                 return;
1098
1099         sc = codec->sc;
1100
1101         HDA_BOOTVERBOSE(
1102                 device_printf(sc->dev, "HDA_DEBUG: Unsol Tag: 0x%08x\n", tag);
1103         );
1104
1105         device_get_children(sc->dev, &devlist, &devcount);
1106         for (i = 0; devlist != NULL && i < devcount; i++) {
1107                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
1108                 if (devinfo != NULL && devinfo->node_type ==
1109                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
1110                     devinfo->codec != NULL &&
1111                     devinfo->codec->cad == codec->cad) {
1112                         break;
1113                 } else
1114                         devinfo = NULL;
1115         }
1116         if (devlist != NULL)
1117                 free(devlist, M_TEMP);
1118
1119         if (devinfo == NULL)
1120                 return;
1121
1122         switch (tag) {
1123         case HDAC_UNSOLTAG_EVENT_HP:
1124                 hdac_hp_switch_handler(devinfo);
1125                 break;
1126         case HDAC_UNSOLTAG_EVENT_TEST:
1127                 device_printf(sc->dev, "Unsol Test!\n");
1128                 break;
1129         default:
1130                 break;
1131         }
1132 }
1133
1134 static int
1135 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1136 {
1137         /* XXX to be removed */
1138 #ifdef HDAC_INTR_EXTRA
1139         uint32_t res;
1140 #endif
1141
1142         if (!(ch->flags & HDAC_CHN_RUNNING))
1143                 return (0);
1144
1145         /* XXX to be removed */
1146 #ifdef HDAC_INTR_EXTRA
1147         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1148 #endif
1149
1150         /* XXX to be removed */
1151 #ifdef HDAC_INTR_EXTRA
1152         HDA_BOOTVERBOSE(
1153                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1154                         device_printf(sc->dev,
1155                             "PCMDIR_%s intr triggered beyond stream boundary:"
1156                             "%08x\n",
1157                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1158         );
1159 #endif
1160
1161         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1162             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1163
1164         /* XXX to be removed */
1165 #ifdef HDAC_INTR_EXTRA
1166         if (res & HDAC_SDSTS_BCIS) {
1167 #endif
1168                 return (1);
1169         /* XXX to be removed */
1170 #ifdef HDAC_INTR_EXTRA
1171         }
1172 #endif
1173
1174         return (0);
1175 }
1176
1177 /****************************************************************************
1178  * void hdac_intr_handler(void *)
1179  *
1180  * Interrupt handler. Processes interrupts received from the hdac.
1181  ****************************************************************************/
1182 static void
1183 hdac_intr_handler(void *context)
1184 {
1185         struct hdac_softc *sc;
1186         uint32_t intsts;
1187         uint8_t rirbsts;
1188         struct hdac_rirb *rirb_base;
1189         uint32_t trigger;
1190
1191         sc = (struct hdac_softc *)context;
1192
1193         hdac_lock(sc);
1194         if (sc->polling != 0) {
1195                 hdac_unlock(sc);
1196                 return;
1197         }
1198
1199         /* Do we have anything to do? */
1200         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1201         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1202                 hdac_unlock(sc);
1203                 return;
1204         }
1205
1206         trigger = 0;
1207
1208         /* Was this a controller interrupt? */
1209         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1210                 rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
1211                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1212                 /* Get as many responses that we can */
1213                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1214                         HDAC_WRITE_1(&sc->mem,
1215                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1216                         if (hdac_rirb_flush(sc) != 0)
1217                                 trigger |= HDAC_TRIGGER_UNSOL;
1218                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1219                 }
1220                 /* XXX to be removed */
1221                 /* Clear interrupt and exit */
1222 #ifdef HDAC_INTR_EXTRA
1223                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1224 #endif
1225         }
1226
1227         if (intsts & HDAC_INTSTS_SIS_MASK) {
1228                 if ((intsts & (1 << sc->num_iss)) &&
1229                     hdac_stream_intr(sc, &sc->play) != 0)
1230                         trigger |= HDAC_TRIGGER_PLAY;
1231                 if ((intsts & (1 << 0)) &&
1232                     hdac_stream_intr(sc, &sc->rec) != 0)
1233                         trigger |= HDAC_TRIGGER_REC;
1234                 /* XXX to be removed */
1235 #ifdef HDAC_INTR_EXTRA
1236                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1237                     HDAC_INTSTS_SIS_MASK);
1238 #endif
1239         }
1240
1241         hdac_unlock(sc);
1242
1243         if (trigger & HDAC_TRIGGER_PLAY)
1244                 chn_intr(sc->play.c);
1245         if (trigger & HDAC_TRIGGER_REC)
1246                 chn_intr(sc->rec.c);
1247         if (trigger & HDAC_TRIGGER_UNSOL)
1248                 taskqueue_enqueue(taskqueue_thread, &sc->unsolq_task);
1249 }
1250
1251 /****************************************************************************
1252  * int hdac_reset(hdac_softc *)
1253  *
1254  * Reset the hdac to a quiescent and known state.
1255  ****************************************************************************/
1256 static int
1257 hdac_reset(struct hdac_softc *sc)
1258 {
1259         uint32_t gctl;
1260         int count, i;
1261
1262         /*
1263          * Stop all Streams DMA engine
1264          */
1265         for (i = 0; i < sc->num_iss; i++)
1266                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1267         for (i = 0; i < sc->num_oss; i++)
1268                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1269         for (i = 0; i < sc->num_bss; i++)
1270                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1271
1272         /*
1273          * Stop Control DMA engines.
1274          */
1275         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1276         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1277
1278         /*
1279          * Reset DMA position buffer.
1280          */
1281         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1282         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1283
1284         /*
1285          * Reset the controller. The reset must remain asserted for
1286          * a minimum of 100us.
1287          */
1288         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1289         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1290         count = 10000;
1291         do {
1292                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1293                 if (!(gctl & HDAC_GCTL_CRST))
1294                         break;
1295                 DELAY(10);
1296         } while (--count);
1297         if (gctl & HDAC_GCTL_CRST) {
1298                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1299                 return (ENXIO);
1300         }
1301         DELAY(100);
1302         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1303         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1304         count = 10000;
1305         do {
1306                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1307                 if (gctl & HDAC_GCTL_CRST)
1308                         break;
1309                 DELAY(10);
1310         } while (--count);
1311         if (!(gctl & HDAC_GCTL_CRST)) {
1312                 device_printf(sc->dev, "Device stuck in reset\n");
1313                 return (ENXIO);
1314         }
1315
1316         /*
1317          * Wait for codecs to finish their own reset sequence. The delay here
1318          * should be of 250us but for some reasons, on it's not enough on my
1319          * computer. Let's use twice as much as necessary to make sure that
1320          * it's reset properly.
1321          */
1322         DELAY(1000);
1323
1324         return (0);
1325 }
1326
1327
1328 /****************************************************************************
1329  * int hdac_get_capabilities(struct hdac_softc *);
1330  *
1331  * Retreive the general capabilities of the hdac;
1332  *      Number of Input Streams
1333  *      Number of Output Streams
1334  *      Number of bidirectional Streams
1335  *      64bit ready
1336  *      CORB and RIRB sizes
1337  ****************************************************************************/
1338 static int
1339 hdac_get_capabilities(struct hdac_softc *sc)
1340 {
1341         uint16_t gcap;
1342         uint8_t corbsize, rirbsize;
1343
1344         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1345         sc->num_iss = HDAC_GCAP_ISS(gcap);
1346         sc->num_oss = HDAC_GCAP_OSS(gcap);
1347         sc->num_bss = HDAC_GCAP_BSS(gcap);
1348
1349         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1350
1351         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1352         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1353             HDAC_CORBSIZE_CORBSZCAP_256)
1354                 sc->corb_size = 256;
1355         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1356             HDAC_CORBSIZE_CORBSZCAP_16)
1357                 sc->corb_size = 16;
1358         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1359             HDAC_CORBSIZE_CORBSZCAP_2)
1360                 sc->corb_size = 2;
1361         else {
1362                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1363                     __func__, corbsize);
1364                 return (ENXIO);
1365         }
1366
1367         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1368         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1369             HDAC_RIRBSIZE_RIRBSZCAP_256)
1370                 sc->rirb_size = 256;
1371         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1372             HDAC_RIRBSIZE_RIRBSZCAP_16)
1373                 sc->rirb_size = 16;
1374         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1375             HDAC_RIRBSIZE_RIRBSZCAP_2)
1376                 sc->rirb_size = 2;
1377         else {
1378                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1379                     __func__, rirbsize);
1380                 return (ENXIO);
1381         }
1382
1383         return (0);
1384 }
1385
1386
1387 /****************************************************************************
1388  * void hdac_dma_cb
1389  *
1390  * This function is called by bus_dmamap_load when the mapping has been
1391  * established. We just record the physical address of the mapping into
1392  * the struct hdac_dma passed in.
1393  ****************************************************************************/
1394 static void
1395 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1396 {
1397         struct hdac_dma *dma;
1398
1399         if (error == 0) {
1400                 dma = (struct hdac_dma *)callback_arg;
1401                 dma->dma_paddr = segs[0].ds_addr;
1402         }
1403 }
1404
1405
1406 /****************************************************************************
1407  * int hdac_dma_alloc
1408  *
1409  * This function allocate and setup a dma region (struct hdac_dma).
1410  * It must be freed by a corresponding hdac_dma_free.
1411  ****************************************************************************/
1412 static int
1413 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1414 {
1415         bus_size_t roundsz;
1416         int result;
1417         int lowaddr;
1418
1419         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1420         lowaddr = (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1421             BUS_SPACE_MAXADDR_32BIT;
1422         bzero(dma, sizeof(*dma));
1423
1424         /*
1425          * Create a DMA tag
1426          */
1427         result = bus_dma_tag_create(NULL,       /* parent */
1428             HDAC_DMA_ALIGNMENT,                 /* alignment */
1429             0,                                  /* boundary */
1430             lowaddr,                            /* lowaddr */
1431             BUS_SPACE_MAXADDR,                  /* highaddr */
1432             NULL,                               /* filtfunc */
1433             NULL,                               /* fistfuncarg */
1434             roundsz,                            /* maxsize */
1435             1,                                  /* nsegments */
1436             roundsz,                            /* maxsegsz */
1437             0,                                  /* flags */
1438             NULL,                               /* lockfunc */
1439             NULL,                               /* lockfuncarg */
1440             &dma->dma_tag);                     /* dmat */
1441         if (result != 0) {
1442                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1443                     __func__, result);
1444                 goto hdac_dma_alloc_fail;
1445         }
1446
1447         /*
1448          * Allocate DMA memory
1449          */
1450         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1451             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1452             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1453             &dma->dma_map);
1454         if (result != 0) {
1455                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1456                     __func__, result);
1457                 goto hdac_dma_alloc_fail;
1458         }
1459
1460         dma->dma_size = roundsz;
1461
1462         /*
1463          * Map the memory
1464          */
1465         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1466             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1467         if (result != 0 || dma->dma_paddr == 0) {
1468                 if (result == 0)
1469                         result = ENOMEM;
1470                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1471                     __func__, result);
1472                 goto hdac_dma_alloc_fail;
1473         }
1474
1475         HDA_BOOTVERBOSE(
1476                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1477                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1478         );
1479
1480         return (0);
1481
1482 hdac_dma_alloc_fail:
1483         hdac_dma_free(sc, dma);
1484
1485         return (result);
1486 }
1487
1488
1489 /****************************************************************************
1490  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1491  *
1492  * Free a struct dhac_dma that has been previously allocated via the
1493  * hdac_dma_alloc function.
1494  ****************************************************************************/
1495 static void
1496 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1497 {
1498         if (dma->dma_map != NULL) {
1499 #if 0
1500                 /* Flush caches */
1501                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1502                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1503 #endif
1504                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1505         }
1506         if (dma->dma_vaddr != NULL) {
1507                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1508                 dma->dma_vaddr = NULL;
1509         }
1510         dma->dma_map = NULL;
1511         if (dma->dma_tag != NULL) {
1512                 bus_dma_tag_destroy(dma->dma_tag);
1513                 dma->dma_tag = NULL;
1514         }
1515         dma->dma_size = 0;
1516 }
1517
1518 /****************************************************************************
1519  * int hdac_mem_alloc(struct hdac_softc *)
1520  *
1521  * Allocate all the bus resources necessary to speak with the physical
1522  * controller.
1523  ****************************************************************************/
1524 static int
1525 hdac_mem_alloc(struct hdac_softc *sc)
1526 {
1527         struct hdac_mem *mem;
1528
1529         mem = &sc->mem;
1530         mem->mem_rid = PCIR_BAR(0);
1531         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1532             &mem->mem_rid, RF_ACTIVE);
1533         if (mem->mem_res == NULL) {
1534                 device_printf(sc->dev,
1535                     "%s: Unable to allocate memory resource\n", __func__);
1536                 return (ENOMEM);
1537         }
1538         mem->mem_tag = rman_get_bustag(mem->mem_res);
1539         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1540
1541         return (0);
1542 }
1543
1544 /****************************************************************************
1545  * void hdac_mem_free(struct hdac_softc *)
1546  *
1547  * Free up resources previously allocated by hdac_mem_alloc.
1548  ****************************************************************************/
1549 static void
1550 hdac_mem_free(struct hdac_softc *sc)
1551 {
1552         struct hdac_mem *mem;
1553
1554         mem = &sc->mem;
1555         if (mem->mem_res != NULL)
1556                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1557                     mem->mem_res);
1558         mem->mem_res = NULL;
1559 }
1560
1561 /****************************************************************************
1562  * int hdac_irq_alloc(struct hdac_softc *)
1563  *
1564  * Allocate and setup the resources necessary for interrupt handling.
1565  ****************************************************************************/
1566 static int
1567 hdac_irq_alloc(struct hdac_softc *sc)
1568 {
1569         struct hdac_irq *irq;
1570         int result;
1571
1572         irq = &sc->irq;
1573         irq->irq_rid = 0x0;
1574
1575 #ifdef HDAC_MSI_ENABLED
1576         if ((sc->flags & HDAC_F_MSI) &&
1577             (result = pci_msi_count(sc->dev)) == 1 &&
1578             pci_alloc_msi(sc->dev, &result) == 0)
1579                 irq->irq_rid = 0x1;
1580         else
1581 #endif
1582                 sc->flags &= ~HDAC_F_MSI;
1583
1584         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1585             &irq->irq_rid, RF_SHAREABLE | RF_ACTIVE);
1586         if (irq->irq_res == NULL) {
1587                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1588                     __func__);
1589                 goto hdac_irq_alloc_fail;
1590         }
1591         result = snd_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE,
1592             hdac_intr_handler, sc, &irq->irq_handle);
1593         if (result != 0) {
1594                 device_printf(sc->dev,
1595                     "%s: Unable to setup interrupt handler (%x)\n",
1596                     __func__, result);
1597                 goto hdac_irq_alloc_fail;
1598         }
1599
1600         return (0);
1601
1602 hdac_irq_alloc_fail:
1603         hdac_irq_free(sc);
1604
1605         return (ENXIO);
1606 }
1607
1608 /****************************************************************************
1609  * void hdac_irq_free(struct hdac_softc *)
1610  *
1611  * Free up resources previously allocated by hdac_irq_alloc.
1612  ****************************************************************************/
1613 static void
1614 hdac_irq_free(struct hdac_softc *sc)
1615 {
1616         struct hdac_irq *irq;
1617
1618         irq = &sc->irq;
1619         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1620                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1621         if (irq->irq_res != NULL)
1622                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1623                     irq->irq_res);
1624 #ifdef HDAC_MSI_ENABLED
1625         if ((sc->flags & HDAC_F_MSI) && irq->irq_rid == 0x1)
1626                 pci_release_msi(sc->dev);
1627 #endif
1628         irq->irq_handle = NULL;
1629         irq->irq_res = NULL;
1630         irq->irq_rid = 0x0;
1631 }
1632
1633 /****************************************************************************
1634  * void hdac_corb_init(struct hdac_softc *)
1635  *
1636  * Initialize the corb registers for operations but do not start it up yet.
1637  * The CORB engine must not be running when this function is called.
1638  ****************************************************************************/
1639 static void
1640 hdac_corb_init(struct hdac_softc *sc)
1641 {
1642         uint8_t corbsize;
1643         uint64_t corbpaddr;
1644
1645         /* Setup the CORB size. */
1646         switch (sc->corb_size) {
1647         case 256:
1648                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1649                 break;
1650         case 16:
1651                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1652                 break;
1653         case 2:
1654                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1655                 break;
1656         default:
1657                 panic("%s: Invalid CORB size (%x)\n", __func__, sc->corb_size);
1658         }
1659         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1660
1661         /* Setup the CORB Address in the hdac */
1662         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1663         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1664         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1665
1666         /* Set the WP and RP */
1667         sc->corb_wp = 0;
1668         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1669         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1670         /*
1671          * The HDA specification indicates that the CORBRPRST bit will always
1672          * read as zero. Unfortunately, it seems that at least the 82801G
1673          * doesn't reset the bit to zero, which stalls the corb engine.
1674          * manually reset the bit to zero before continuing.
1675          */
1676         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1677
1678         /* Enable CORB error reporting */
1679 #if 0
1680         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1681 #endif
1682 }
1683
1684 /****************************************************************************
1685  * void hdac_rirb_init(struct hdac_softc *)
1686  *
1687  * Initialize the rirb registers for operations but do not start it up yet.
1688  * The RIRB engine must not be running when this function is called.
1689  ****************************************************************************/
1690 static void
1691 hdac_rirb_init(struct hdac_softc *sc)
1692 {
1693         uint8_t rirbsize;
1694         uint64_t rirbpaddr;
1695
1696         /* Setup the RIRB size. */
1697         switch (sc->rirb_size) {
1698         case 256:
1699                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1700                 break;
1701         case 16:
1702                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1703                 break;
1704         case 2:
1705                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1706                 break;
1707         default:
1708                 panic("%s: Invalid RIRB size (%x)\n", __func__, sc->rirb_size);
1709         }
1710         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1711
1712         /* Setup the RIRB Address in the hdac */
1713         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1714         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1715         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1716
1717         /* Setup the WP and RP */
1718         sc->rirb_rp = 0;
1719         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1720
1721         if (sc->polling == 0) {
1722                 /* Setup the interrupt threshold */
1723                 HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1724
1725                 /* Enable Overrun and response received reporting */
1726 #if 0
1727                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1728                     HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1729 #else
1730                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1731 #endif
1732         }
1733
1734 #if 0
1735         /*
1736          * Make sure that the Host CPU cache doesn't contain any dirty
1737          * cache lines that falls in the rirb. If I understood correctly, it
1738          * should be sufficient to do this only once as the rirb is purely
1739          * read-only from now on.
1740          */
1741         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1742             BUS_DMASYNC_PREREAD);
1743 #endif
1744 }
1745
1746 /****************************************************************************
1747  * void hdac_corb_start(hdac_softc *)
1748  *
1749  * Startup the corb DMA engine
1750  ****************************************************************************/
1751 static void
1752 hdac_corb_start(struct hdac_softc *sc)
1753 {
1754         uint32_t corbctl;
1755
1756         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1757         corbctl |= HDAC_CORBCTL_CORBRUN;
1758         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1759 }
1760
1761 /****************************************************************************
1762  * void hdac_rirb_start(hdac_softc *)
1763  *
1764  * Startup the rirb DMA engine
1765  ****************************************************************************/
1766 static void
1767 hdac_rirb_start(struct hdac_softc *sc)
1768 {
1769         uint32_t rirbctl;
1770
1771         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
1772         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
1773         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
1774 }
1775
1776
1777 /****************************************************************************
1778  * void hdac_scan_codecs(struct hdac_softc *, int)
1779  *
1780  * Scan the bus for available codecs, starting with num.
1781  ****************************************************************************/
1782 static void
1783 hdac_scan_codecs(struct hdac_softc *sc, int num)
1784 {
1785         struct hdac_codec *codec;
1786         int i;
1787         uint16_t statests;
1788
1789         if (num < 0)
1790                 num = 0;
1791         if (num >= HDAC_CODEC_MAX)
1792                 num = HDAC_CODEC_MAX - 1;
1793
1794         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
1795         for (i = num; i < HDAC_CODEC_MAX; i++) {
1796                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
1797                         /* We have found a codec. */
1798                         codec = (struct hdac_codec *)malloc(sizeof(*codec),
1799                             M_HDAC, M_ZERO | M_NOWAIT);
1800                         if (codec == NULL) {
1801                                 device_printf(sc->dev,
1802                                     "Unable to allocate memory for codec\n");
1803                                 continue;
1804                         }
1805                         codec->commands = NULL;
1806                         codec->responses_received = 0;
1807                         codec->verbs_sent = 0;
1808                         codec->sc = sc;
1809                         codec->cad = i;
1810                         sc->codecs[i] = codec;
1811                         if (hdac_probe_codec(codec) != 0)
1812                                 break;
1813                 }
1814         }
1815         /* All codecs have been probed, now try to attach drivers to them */
1816         /* bus_generic_attach(sc->dev); */
1817 }
1818
1819 /****************************************************************************
1820  * void hdac_probe_codec(struct hdac_softc *, int)
1821  *
1822  * Probe a the given codec_id for available function groups.
1823  ****************************************************************************/
1824 static int
1825 hdac_probe_codec(struct hdac_codec *codec)
1826 {
1827         struct hdac_softc *sc = codec->sc;
1828         struct hdac_devinfo *devinfo;
1829         uint32_t vendorid, revisionid, subnode;
1830         int startnode;
1831         int endnode;
1832         int i;
1833         nid_t cad = codec->cad;
1834
1835         HDA_BOOTVERBOSE(
1836                 device_printf(sc->dev, "HDA_DEBUG: Probing codec: %d\n", cad);
1837         );
1838         vendorid = hdac_command(sc,
1839             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
1840             cad);
1841         revisionid = hdac_command(sc,
1842             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
1843             cad);
1844         subnode = hdac_command(sc,
1845             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
1846             cad);
1847         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
1848         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
1849
1850         HDA_BOOTVERBOSE(
1851                 device_printf(sc->dev, "HDA_DEBUG: \tstartnode=%d endnode=%d\n",
1852                     startnode, endnode);
1853         );
1854         for (i = startnode; i < endnode; i++) {
1855                 devinfo = hdac_probe_function(codec, i);
1856                 if (devinfo != NULL) {
1857                         /* XXX Ignore other FG. */
1858                         devinfo->vendor_id =
1859                             HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
1860                         devinfo->device_id =
1861                             HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
1862                         devinfo->revision_id =
1863                             HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
1864                         devinfo->stepping_id =
1865                             HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
1866                         HDA_BOOTVERBOSE(
1867                                 device_printf(sc->dev,
1868                                     "HDA_DEBUG: \tFound AFG nid=%d "
1869                                     "[startnode=%d endnode=%d]\n",
1870                                     devinfo->nid, startnode, endnode);
1871                         );
1872                         return (1);
1873                 }
1874         }
1875
1876         HDA_BOOTVERBOSE(
1877                 device_printf(sc->dev, "HDA_DEBUG: \tAFG not found\n");
1878         );
1879         return (0);
1880 }
1881
1882 static struct hdac_devinfo *
1883 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
1884 {
1885         struct hdac_softc *sc = codec->sc;
1886         struct hdac_devinfo *devinfo;
1887         uint32_t fctgrptype;
1888         nid_t cad = codec->cad;
1889
1890         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
1891             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
1892
1893         /* XXX For now, ignore other FG. */
1894         if (fctgrptype != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
1895                 return (NULL);
1896
1897         devinfo = (struct hdac_devinfo *)malloc(sizeof(*devinfo), M_HDAC,
1898             M_NOWAIT | M_ZERO);
1899         if (devinfo == NULL) {
1900                 device_printf(sc->dev, "%s: Unable to allocate ivar\n",
1901                     __func__);
1902                 return (NULL);
1903         }
1904
1905         devinfo->nid = nid;
1906         devinfo->node_type = fctgrptype;
1907         devinfo->codec = codec;
1908
1909         hdac_add_child(sc, devinfo);
1910
1911         return (devinfo);
1912 }
1913
1914 static void
1915 hdac_add_child(struct hdac_softc *sc, struct hdac_devinfo *devinfo)
1916 {
1917         devinfo->dev = device_add_child(sc->dev, NULL, -1);
1918         device_set_ivars(devinfo->dev, (void *)devinfo);
1919         /* XXX - Print more information when booting verbose??? */
1920 }
1921
1922 static void
1923 hdac_widget_connection_parse(struct hdac_widget *w)
1924 {
1925         struct hdac_softc *sc = w->devinfo->codec->sc;
1926         uint32_t res;
1927         int i, j, max, ents, entnum;
1928         nid_t cad = w->devinfo->codec->cad;
1929         nid_t nid = w->nid;
1930         nid_t cnid, addcnid, prevcnid;
1931
1932         w->nconns = 0;
1933
1934         res = hdac_command(sc,
1935             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
1936
1937         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
1938
1939         if (ents < 1)
1940                 return;
1941
1942         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
1943         max = (sizeof(w->conns) / sizeof(w->conns[0])) - 1;
1944         prevcnid = 0;
1945
1946 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
1947 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
1948 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
1949 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
1950 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
1951
1952         for (i = 0; i < ents; i += entnum) {
1953                 res = hdac_command(sc,
1954                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
1955                 for (j = 0; j < entnum; j++) {
1956                         cnid = CONN_CNID(res, entnum, j);
1957                         if (cnid == 0) {
1958                                 if (w->nconns < ents)
1959                                         device_printf(sc->dev,
1960                                             "%s: nid=%d WARNING: zero cnid "
1961                                             "entnum=%d j=%d index=%d "
1962                                             "entries=%d found=%d res=0x%08x\n",
1963                                             __func__, nid, entnum, j, i,
1964                                             ents, w->nconns, res);
1965                                 else
1966                                         goto getconns_out;
1967                         }
1968                         if (cnid < w->devinfo->startnode ||
1969                             cnid >= w->devinfo->endnode) {
1970                                 HDA_BOOTVERBOSE(
1971                                         device_printf(sc->dev,
1972                                             "%s: GHOST: nid=%d j=%d "
1973                                             "entnum=%d index=%d res=0x%08x\n",
1974                                             __func__, nid, j, entnum, i, res);
1975                                 );
1976                         }
1977                         if (CONN_RANGE(res, entnum, j) == 0)
1978                                 addcnid = cnid;
1979                         else if (prevcnid == 0 || prevcnid >= cnid) {
1980                                 device_printf(sc->dev,
1981                                     "%s: WARNING: Invalid child range "
1982                                     "nid=%d index=%d j=%d entnum=%d "
1983                                     "prevcnid=%d cnid=%d res=0x%08x\n",
1984                                     __func__, nid, i, j, entnum, prevcnid,
1985                                     cnid, res);
1986                                 addcnid = cnid;
1987                         } else
1988                                 addcnid = prevcnid + 1;
1989                         while (addcnid <= cnid) {
1990                                 if (w->nconns > max) {
1991                                         device_printf(sc->dev,
1992                                             "%s: nid=%d: Adding %d: "
1993                                             "Max connection reached! max=%d\n",
1994                                             __func__, nid, addcnid, max + 1);
1995                                         goto getconns_out;
1996                                 }
1997                                 w->conns[w->nconns++] = addcnid++;
1998                         }
1999                         prevcnid = cnid;
2000                 }
2001         }
2002
2003 getconns_out:
2004         HDA_BOOTVERBOSE(
2005                 device_printf(sc->dev,
2006                     "HDA_DEBUG: %s: nid=%d entries=%d found=%d\n",
2007                     __func__, nid, ents, w->nconns);
2008         );
2009         return;
2010 }
2011
2012 static uint32_t
2013 hdac_widget_pin_getconfig(struct hdac_widget *w)
2014 {
2015         struct hdac_softc *sc;
2016         uint32_t config, orig, id;
2017         nid_t cad, nid;
2018
2019         sc = w->devinfo->codec->sc;
2020         cad = w->devinfo->codec->cad;
2021         nid = w->nid;
2022         id = hdac_codec_id(w->devinfo);
2023
2024         config = hdac_command(sc,
2025             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2026             cad);
2027         orig = config;
2028
2029         /*
2030          * XXX REWRITE!!!! Don't argue!
2031          */
2032         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2033                 switch (nid) {
2034                 case 26:
2035                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2036                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2037                         break;
2038                 case 27:
2039                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2040                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2041                         break;
2042                 default:
2043                         break;
2044                 }
2045         } else if (id == HDA_CODEC_ALC880 &&
2046             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2047             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2048                 /*
2049                  * Super broken BIOS
2050                  */
2051                 switch (nid) {
2052                 case 20:
2053                         break;
2054                 case 21:
2055                         break;
2056                 case 22:
2057                         break;
2058                 case 23:
2059                         break;
2060                 case 24:        /* MIC1 */
2061                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2062                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2063                         break;
2064                 case 25:        /* XXX MIC2 */
2065                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2066                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2067                         break;
2068                 case 26:        /* LINE1 */
2069                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2070                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2071                         break;
2072                 case 27:        /* XXX LINE2 */
2073                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2074                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2075                         break;
2076                 case 28:        /* CD */
2077                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2078                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2079                         break;
2080                 case 30:
2081                         break;
2082                 case 31:
2083                         break;
2084                 default:
2085                         break;
2086                 }
2087         } else if (id == HDA_CODEC_ALC883 &&
2088             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2089             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2090                 switch (nid) {
2091                 case 25:
2092                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2093                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2094                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2095                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2096                         break;
2097                 case 28:
2098                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2099                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2100                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2101                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2102                         break;
2103                 default:
2104                         break;
2105                 }
2106         } else if (id == HDA_CODEC_CXVENICE && sc->pci_subvendor ==
2107             HP_V3000_SUBVENDOR) {
2108                 switch (nid) {
2109                 case 18:
2110                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2111                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2112                         break;
2113                 case 20:
2114                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2115                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2116                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2117                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2118                         break;
2119                 case 21:
2120                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2121                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2122                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2123                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2124                         break;
2125                 default:
2126                         break;
2127                 }
2128         } else if (id == HDA_CODEC_CXWAIKIKI && sc->pci_subvendor ==
2129             HP_DV5000_SUBVENDOR) {
2130                 switch (nid) {
2131                 case 20:
2132                 case 21:
2133                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2134                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2135                         break;
2136                 default:
2137                         break;
2138                 }
2139         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2140             ASUS_W6F_SUBVENDOR) {
2141                 switch (nid) {
2142                 case 11:
2143                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2144                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2145                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2146                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2147                         break;
2148                 case 12:
2149                 case 14:
2150                 case 16:
2151                 case 31:
2152                 case 32:
2153                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2154                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2155                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2156                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2157                         break;
2158                 case 15:
2159                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2160                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2161                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2162                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2163                         break;
2164                 default:
2165                         break;
2166                 }
2167         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2168             UNIWILL_9075_SUBVENDOR) {
2169                 switch (nid) {
2170                 case 15:
2171                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2172                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2173                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2174                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2175                         break;
2176                 default:
2177                         break;
2178                 }
2179         } else if (id == HDA_CODEC_AD1986A &&
2180             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2181             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR)) {
2182                 switch (nid) {
2183                 case 28:        /* LINE */
2184                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2185                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2186                         break;
2187                 case 29:        /* MIC */
2188                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2189                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2190                         break;
2191                 default:
2192                         break;
2193                 }
2194         } else if (id == HDA_CODEC_ALC268 &&
2195             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor)) {
2196                 switch (nid) {
2197                 case 28:
2198                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2199                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2200                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2201                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2202                         break;
2203                 default:
2204                         break;
2205                 }
2206         }
2207
2208         HDA_BOOTVERBOSE(
2209                 if (config != orig)
2210                         device_printf(sc->dev,
2211                             "HDA_DEBUG: Pin config nid=%u 0x%08x -> 0x%08x\n",
2212                             nid, orig, config);
2213         );
2214
2215         return (config);
2216 }
2217
2218 static uint32_t
2219 hdac_widget_pin_getcaps(struct hdac_widget *w)
2220 {
2221         struct hdac_softc *sc;
2222         uint32_t caps, orig, id;
2223         nid_t cad, nid;
2224
2225         sc = w->devinfo->codec->sc;
2226         cad = w->devinfo->codec->cad;
2227         nid = w->nid;
2228         id = hdac_codec_id(w->devinfo);
2229
2230         caps = hdac_command(sc,
2231             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2232         orig = caps;
2233
2234         HDA_BOOTVERBOSE(
2235                 if (caps != orig)
2236                         device_printf(sc->dev,
2237                             "HDA_DEBUG: Pin caps nid=%u 0x%08x -> 0x%08x\n",
2238                             nid, orig, caps);
2239         );
2240
2241         return (caps);
2242 }
2243
2244 static void
2245 hdac_widget_pin_parse(struct hdac_widget *w)
2246 {
2247         struct hdac_softc *sc = w->devinfo->codec->sc;
2248         uint32_t config, pincap;
2249         char *devstr, *connstr;
2250         nid_t cad = w->devinfo->codec->cad;
2251         nid_t nid = w->nid;
2252
2253         config = hdac_widget_pin_getconfig(w);
2254         w->wclass.pin.config = config;
2255
2256         pincap = hdac_widget_pin_getcaps(w);
2257         w->wclass.pin.cap = pincap;
2258
2259         w->wclass.pin.ctrl = hdac_command(sc,
2260             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad) &
2261             ~(HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
2262             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
2263             HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
2264             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
2265
2266         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
2267                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
2268         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
2269                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
2270         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
2271                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
2272         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2273                 w->param.eapdbtl = hdac_command(sc,
2274                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2275                 w->param.eapdbtl &= 0x7;
2276                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2277         } else
2278                 w->param.eapdbtl = HDAC_INVALID;
2279
2280         switch (config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
2281         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
2282                 devstr = "line out";
2283                 break;
2284         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
2285                 devstr = "speaker";
2286                 break;
2287         case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
2288                 devstr = "headphones out";
2289                 break;
2290         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
2291                 devstr = "CD";
2292                 break;
2293         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
2294                 devstr = "SPDIF out";
2295                 break;
2296         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
2297                 devstr = "digital (other) out";
2298                 break;
2299         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE:
2300                 devstr = "modem, line side";
2301                 break;
2302         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET:
2303                 devstr = "modem, handset side";
2304                 break;
2305         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
2306                 devstr = "line in";
2307                 break;
2308         case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
2309                 devstr = "AUX";
2310                 break;
2311         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
2312                 devstr = "Mic in";
2313                 break;
2314         case HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY:
2315                 devstr = "telephony";
2316                 break;
2317         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
2318                 devstr = "SPDIF in";
2319                 break;
2320         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
2321                 devstr = "digital (other) in";
2322                 break;
2323         case HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER:
2324                 devstr = "other";
2325                 break;
2326         default:
2327                 devstr = "unknown";
2328                 break;
2329         }
2330
2331         switch (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) {
2332         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK:
2333                 connstr = "jack";
2334                 break;
2335         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE:
2336                 connstr = "none";
2337                 break;
2338         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED:
2339                 connstr = "fixed";
2340                 break;
2341         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH:
2342                 connstr = "jack / fixed";
2343                 break;
2344         default:
2345                 connstr = "unknown";
2346                 break;
2347         }
2348
2349         strlcat(w->name, ": ", sizeof(w->name));
2350         strlcat(w->name, devstr, sizeof(w->name));
2351         strlcat(w->name, " (", sizeof(w->name));
2352         strlcat(w->name, connstr, sizeof(w->name));
2353         strlcat(w->name, ")", sizeof(w->name));
2354 }
2355
2356 static void
2357 hdac_widget_parse(struct hdac_widget *w)
2358 {
2359         struct hdac_softc *sc = w->devinfo->codec->sc;
2360         uint32_t wcap, cap;
2361         char *typestr;
2362         nid_t cad = w->devinfo->codec->cad;
2363         nid_t nid = w->nid;
2364
2365         wcap = hdac_command(sc,
2366             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2367             cad);
2368         w->param.widget_cap = wcap;
2369         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2370
2371         switch (w->type) {
2372         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2373                 typestr = "audio output";
2374                 break;
2375         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2376                 typestr = "audio input";
2377                 break;
2378         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2379                 typestr = "audio mixer";
2380                 break;
2381         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2382                 typestr = "audio selector";
2383                 break;
2384         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2385                 typestr = "pin";
2386                 break;
2387         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2388                 typestr = "power widget";
2389                 break;
2390         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2391                 typestr = "volume widget";
2392                 break;
2393         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2394                 typestr = "beep widget";
2395                 break;
2396         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2397                 typestr = "vendor widget";
2398                 break;
2399         default:
2400                 typestr = "unknown type";
2401                 break;
2402         }
2403
2404         strlcpy(w->name, typestr, sizeof(w->name));
2405
2406         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(wcap)) {
2407                 hdac_command(sc,
2408                     HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0),
2409                     cad);
2410                 DELAY(1000);
2411         }
2412
2413         hdac_widget_connection_parse(w);
2414
2415         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2416                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2417                         w->param.outamp_cap =
2418                             hdac_command(sc,
2419                             HDA_CMD_GET_PARAMETER(cad, nid,
2420                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2421                 else
2422                         w->param.outamp_cap =
2423                             w->devinfo->function.audio.outamp_cap;
2424         } else
2425                 w->param.outamp_cap = 0;
2426
2427         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2428                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2429                         w->param.inamp_cap =
2430                             hdac_command(sc,
2431                             HDA_CMD_GET_PARAMETER(cad, nid,
2432                             HDA_PARAM_INPUT_AMP_CAP), cad);
2433                 else
2434                         w->param.inamp_cap =
2435                             w->devinfo->function.audio.inamp_cap;
2436         } else
2437                 w->param.inamp_cap = 0;
2438
2439         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2440             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2441                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2442                         cap = hdac_command(sc,
2443                             HDA_CMD_GET_PARAMETER(cad, nid,
2444                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2445                         w->param.supp_stream_formats = (cap != 0) ? cap :
2446                             w->devinfo->function.audio.supp_stream_formats;
2447                         cap = hdac_command(sc,
2448                             HDA_CMD_GET_PARAMETER(cad, nid,
2449                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2450                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2451                             w->devinfo->function.audio.supp_pcm_size_rate;
2452                 } else {
2453                         w->param.supp_stream_formats =
2454                             w->devinfo->function.audio.supp_stream_formats;
2455                         w->param.supp_pcm_size_rate =
2456                             w->devinfo->function.audio.supp_pcm_size_rate;
2457                 }
2458         } else {
2459                 w->param.supp_stream_formats = 0;
2460                 w->param.supp_pcm_size_rate = 0;
2461         }
2462
2463         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2464                 hdac_widget_pin_parse(w);
2465 }
2466
2467 static struct hdac_widget *
2468 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2469 {
2470         if (devinfo == NULL || devinfo->widget == NULL ||
2471                     nid < devinfo->startnode || nid >= devinfo->endnode)
2472                 return (NULL);
2473         return (&devinfo->widget[nid - devinfo->startnode]);
2474 }
2475
2476 static __inline int
2477 hda_poll_channel(struct hdac_chan *ch)
2478 {
2479         uint32_t sz, delta;
2480         volatile uint32_t ptr;
2481
2482         if (!(ch->flags & HDAC_CHN_RUNNING))
2483                 return (0);
2484
2485         sz = ch->blksz * ch->blkcnt;
2486         if (ch->dmapos != NULL)
2487                 ptr = *(ch->dmapos);
2488         else
2489                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2490                     ch->off + HDAC_SDLPIB);
2491         ch->ptr = ptr;
2492         ptr %= sz;
2493         ptr &= ~(ch->blksz - 1);
2494         delta = (sz + ptr - ch->prevptr) % sz;
2495
2496         if (delta < ch->blksz)
2497                 return (0);
2498
2499         ch->prevptr = ptr;
2500
2501         return (1);
2502 }
2503
2504 #define hda_chan_active(sc)     (((sc)->play.flags | (sc)->rec.flags) & \
2505                                  HDAC_CHN_RUNNING)
2506
2507 static void
2508 hda_poll_callback(void *arg)
2509 {
2510         struct hdac_softc *sc = arg;
2511         uint32_t trigger;
2512
2513         if (sc == NULL)
2514                 return;
2515
2516         hdac_lock(sc);
2517         if (sc->polling == 0 || hda_chan_active(sc) == 0) {
2518                 hdac_unlock(sc);
2519                 return;
2520         }
2521
2522         trigger = 0;
2523         trigger |= (hda_poll_channel(&sc->play) != 0) ? HDAC_TRIGGER_PLAY : 0;
2524         trigger |= (hda_poll_channel(&sc->rec)) != 0 ? HDAC_TRIGGER_REC : 0;
2525
2526         /* XXX */
2527         callout_reset(&sc->poll_hda, 1/*sc->poll_ticks*/,
2528             hda_poll_callback, sc);
2529
2530         hdac_unlock(sc);
2531
2532         if (trigger & HDAC_TRIGGER_PLAY)
2533                 chn_intr(sc->play.c);
2534         if (trigger & HDAC_TRIGGER_REC)
2535                 chn_intr(sc->rec.c);
2536 }
2537
2538 static int
2539 hdac_rirb_flush(struct hdac_softc *sc)
2540 {
2541         struct hdac_rirb *rirb_base, *rirb;
2542         struct hdac_codec *codec;
2543         struct hdac_command_list *commands;
2544         nid_t cad;
2545         uint32_t resp;
2546         uint8_t rirbwp;
2547         int ret;
2548
2549         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2550         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2551 #if 0
2552         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2553             BUS_DMASYNC_POSTREAD);
2554 #endif
2555
2556         ret = 0;
2557
2558         while (sc->rirb_rp != rirbwp) {
2559                 sc->rirb_rp++;
2560                 sc->rirb_rp %= sc->rirb_size;
2561                 rirb = &rirb_base[sc->rirb_rp];
2562                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2563                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2564                     sc->codecs[cad] == NULL)
2565                         continue;
2566                 resp = rirb->response;
2567                 codec = sc->codecs[cad];
2568                 commands = codec->commands;
2569                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2570                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2571                             ((resp >> 26) & 0xffff);
2572                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2573                 } else if (commands != NULL && commands->num_commands > 0 &&
2574                     codec->responses_received < commands->num_commands)
2575                         commands->responses[codec->responses_received++] =
2576                             resp;
2577                 ret++;
2578         }
2579
2580         return (ret);
2581 }
2582
2583 static int
2584 hdac_unsolq_flush(struct hdac_softc *sc)
2585 {
2586         nid_t cad;
2587         uint32_t tag;
2588         int ret = 0;
2589
2590         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2591                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2592                 while (sc->unsolq_rp != sc->unsolq_wp) {
2593                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2594                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2595                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2596                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2597                         ret++;
2598                 }
2599                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2600         }
2601
2602         return (ret);
2603 }
2604
2605 static void
2606 hdac_poll_callback(void *arg)
2607 {
2608         struct hdac_softc *sc = arg;
2609         if (sc == NULL)
2610                 return;
2611
2612         hdac_lock(sc);
2613         if (sc->polling == 0 || sc->poll_ival == 0) {
2614                 hdac_unlock(sc);
2615                 return;
2616         }
2617         if (hdac_rirb_flush(sc) != 0)
2618                 hdac_unsolq_flush(sc);
2619         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2620         hdac_unlock(sc);
2621 }
2622
2623 static void
2624 hdac_stream_stop(struct hdac_chan *ch)
2625 {
2626         struct hdac_softc *sc = ch->devinfo->codec->sc;
2627         uint32_t ctl;
2628
2629         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2630         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2631             HDAC_SDCTL_RUN);
2632         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2633
2634         ch->flags &= ~HDAC_CHN_RUNNING;
2635
2636         if (sc->polling != 0) {
2637                 int pollticks;
2638
2639                 if (hda_chan_active(sc) == 0) {
2640                         callout_stop(&sc->poll_hda);
2641                         sc->poll_ticks = 1;
2642                 } else {
2643                         if (sc->play.flags & HDAC_CHN_RUNNING)
2644                                 ch = &sc->play;
2645                         else
2646                                 ch = &sc->rec;
2647                         pollticks = ((uint64_t)hz * ch->blksz) /
2648                             ((uint64_t)sndbuf_getbps(ch->b) *
2649                             sndbuf_getspd(ch->b));
2650                         pollticks >>= 2;
2651                         if (pollticks > hz)
2652                                 pollticks = hz;
2653                         if (pollticks < 1) {
2654                                 HDA_BOOTVERBOSE(
2655                                         device_printf(sc->dev,
2656                                             "%s: pollticks=%d < 1 !\n",
2657                                             __func__, pollticks);
2658                                 );
2659                                 pollticks = 1;
2660                         }
2661                         if (pollticks > sc->poll_ticks) {
2662                                 HDA_BOOTVERBOSE(
2663                                         device_printf(sc->dev,
2664                                             "%s: pollticks %d -> %d\n",
2665                                             __func__, sc->poll_ticks,
2666                                             pollticks);
2667                                 );
2668                                 sc->poll_ticks = pollticks;
2669                                 callout_reset(&sc->poll_hda, 1,
2670                                     hda_poll_callback, sc);
2671                         }
2672                 }
2673         } else {
2674                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2675                 ctl &= ~(1 << (ch->off >> 5));
2676                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2677         }
2678 }
2679
2680 static void
2681 hdac_stream_start(struct hdac_chan *ch)
2682 {
2683         struct hdac_softc *sc = ch->devinfo->codec->sc;
2684         uint32_t ctl;
2685
2686         if (sc->polling != 0) {
2687                 int pollticks;
2688
2689                 pollticks = ((uint64_t)hz * ch->blksz) /
2690                     ((uint64_t)sndbuf_getbps(ch->b) * sndbuf_getspd(ch->b));
2691                 pollticks >>= 2;
2692                 if (pollticks > hz)
2693                         pollticks = hz;
2694                 if (pollticks < 1) {
2695                         HDA_BOOTVERBOSE(
2696                                 device_printf(sc->dev,
2697                                     "%s: pollticks=%d < 1 !\n",
2698                                     __func__, pollticks);
2699                         );
2700                         pollticks = 1;
2701                 }
2702                 if (hda_chan_active(sc) == 0 || pollticks < sc->poll_ticks) {
2703                         HDA_BOOTVERBOSE(
2704                                 if (hda_chan_active(sc) == 0) {
2705                                         device_printf(sc->dev,
2706                                             "%s: pollticks=%d\n",
2707                                             __func__, pollticks);
2708                                 } else {
2709                                         device_printf(sc->dev,
2710                                             "%s: pollticks %d -> %d\n",
2711                                             __func__, sc->poll_ticks,
2712                                             pollticks);
2713                                 }
2714                         );
2715                         sc->poll_ticks = pollticks;
2716                         callout_reset(&sc->poll_hda, 1, hda_poll_callback,
2717                             sc);
2718                 }
2719                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2720                 ctl |= HDAC_SDCTL_RUN;
2721         } else {
2722                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2723                 ctl |= 1 << (ch->off >> 5);
2724                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2725                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2726                 ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2727                     HDAC_SDCTL_RUN;
2728         }
2729         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2730
2731         ch->flags |= HDAC_CHN_RUNNING;
2732 }
2733
2734 static void
2735 hdac_stream_reset(struct hdac_chan *ch)
2736 {
2737         struct hdac_softc *sc = ch->devinfo->codec->sc;
2738         int timeout = 1000;
2739         int to = timeout;
2740         uint32_t ctl;
2741
2742         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2743         ctl |= HDAC_SDCTL_SRST;
2744         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2745         do {
2746                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2747                 if (ctl & HDAC_SDCTL_SRST)
2748                         break;
2749                 DELAY(10);
2750         } while (--to);
2751         if (!(ctl & HDAC_SDCTL_SRST)) {
2752                 device_printf(sc->dev, "timeout in reset\n");
2753         }
2754         ctl &= ~HDAC_SDCTL_SRST;
2755         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2756         to = timeout;
2757         do {
2758                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2759                 if (!(ctl & HDAC_SDCTL_SRST))
2760                         break;
2761                 DELAY(10);
2762         } while (--to);
2763         if (ctl & HDAC_SDCTL_SRST)
2764                 device_printf(sc->dev, "can't reset!\n");
2765 }
2766
2767 static void
2768 hdac_stream_setid(struct hdac_chan *ch)
2769 {
2770         struct hdac_softc *sc = ch->devinfo->codec->sc;
2771         uint32_t ctl;
2772
2773         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
2774         ctl &= ~HDAC_SDCTL2_STRM_MASK;
2775         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
2776         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
2777 }
2778
2779 static void
2780 hdac_bdl_setup(struct hdac_chan *ch)
2781 {
2782         struct hdac_softc *sc = ch->devinfo->codec->sc;
2783         struct hdac_bdle *bdle;
2784         uint64_t addr;
2785         uint32_t blksz, blkcnt;
2786         int i;
2787
2788         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
2789         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
2790
2791         if (sc->polling != 0) {
2792                 blksz = ch->blksz * ch->blkcnt;
2793                 blkcnt = 1;
2794         } else {
2795                 blksz = ch->blksz;
2796                 blkcnt = ch->blkcnt;
2797         }
2798
2799         for (i = 0; i < blkcnt; i++, bdle++) {
2800                 bdle->addrl = (uint32_t)addr;
2801                 bdle->addrh = (uint32_t)(addr >> 32);
2802                 bdle->len = blksz;
2803                 bdle->ioc = 1 ^ sc->polling;
2804                 addr += blksz;
2805         }
2806
2807         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
2808         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
2809         addr = ch->bdl_dma.dma_paddr;
2810         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
2811         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
2812         if (ch->dmapos != NULL &&
2813             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
2814                 addr = sc->pos_dma.dma_paddr;
2815                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
2816                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
2817                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
2818         }
2819 }
2820
2821 static int
2822 hdac_bdl_alloc(struct hdac_chan *ch)
2823 {
2824         struct hdac_softc *sc = ch->devinfo->codec->sc;
2825         int rc;
2826
2827         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
2828             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
2829         if (rc) {
2830                 device_printf(sc->dev, "can't alloc bdl\n");
2831                 return (rc);
2832         }
2833
2834         return (0);
2835 }
2836
2837 static void
2838 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
2839                                         int index, int lmute, int rmute,
2840                                         int left, int right, int dir)
2841 {
2842         uint16_t v = 0;
2843
2844         if (sc == NULL)
2845                 return;
2846
2847         if (left != right || lmute != rmute) {
2848                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
2849                     (lmute << 7) | left;
2850                 hdac_command(sc,
2851                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2852                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
2853                     (rmute << 7) | right;
2854         } else
2855                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
2856                     (lmute << 7) | left;
2857
2858         hdac_command(sc,
2859             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2860 }
2861
2862 static void
2863 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
2864                                                 int left, int right)
2865 {
2866         struct hdac_softc *sc;
2867         nid_t nid, cad;
2868         int lmute, rmute;
2869
2870         if (ctl == NULL || ctl->widget == NULL ||
2871             ctl->widget->devinfo == NULL ||
2872             ctl->widget->devinfo->codec == NULL ||
2873             ctl->widget->devinfo->codec->sc == NULL)
2874                 return;
2875
2876         sc = ctl->widget->devinfo->codec->sc;
2877         cad = ctl->widget->devinfo->codec->cad;
2878         nid = ctl->widget->nid;
2879
2880         if (mute == HDA_AMP_MUTE_DEFAULT) {
2881                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
2882                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
2883         } else {
2884                 lmute = HDA_AMP_LEFT_MUTED(mute);
2885                 rmute = HDA_AMP_RIGHT_MUTED(mute);
2886         }
2887
2888         if (ctl->dir & HDA_CTL_OUT)
2889                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2890                     lmute, rmute, left, right, 0);
2891         if (ctl->dir & HDA_CTL_IN)
2892                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2893                     lmute, rmute, left, right, 1);
2894         ctl->left = left;
2895         ctl->right = right;
2896 }
2897
2898 static void
2899 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
2900 {
2901         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
2902                 return;
2903         hdac_command(w->devinfo->codec->sc,
2904             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
2905             w->nid, index), w->devinfo->codec->cad);
2906         w->selconn = index;
2907 }
2908
2909
2910 /****************************************************************************
2911  * uint32_t hdac_command_sendone_internal
2912  *
2913  * Wrapper function that sends only one command to a given codec
2914  ****************************************************************************/
2915 static uint32_t
2916 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
2917 {
2918         struct hdac_command_list cl;
2919         uint32_t response = HDAC_INVALID;
2920
2921         if (!hdac_lockowned(sc))
2922                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
2923         cl.num_commands = 1;
2924         cl.verbs = &verb;
2925         cl.responses = &response;
2926
2927         hdac_command_send_internal(sc, &cl, cad);
2928
2929         return (response);
2930 }
2931
2932 /****************************************************************************
2933  * hdac_command_send_internal
2934  *
2935  * Send a command list to the codec via the corb. We queue as much verbs as
2936  * we can and msleep on the codec. When the interrupt get the responses
2937  * back from the rirb, it will wake us up so we can queue the remaining verbs
2938  * if any.
2939  ****************************************************************************/
2940 static void
2941 hdac_command_send_internal(struct hdac_softc *sc,
2942                         struct hdac_command_list *commands, nid_t cad)
2943 {
2944         struct hdac_codec *codec;
2945         int corbrp;
2946         uint32_t *corb;
2947         int timeout;
2948         int retry = 10;
2949         struct hdac_rirb *rirb_base;
2950
2951         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
2952             commands->num_commands < 1)
2953                 return;
2954
2955         codec = sc->codecs[cad];
2956         codec->commands = commands;
2957         codec->responses_received = 0;
2958         codec->verbs_sent = 0;
2959         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
2960         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2961
2962         do {
2963                 if (codec->verbs_sent != commands->num_commands) {
2964                         /* Queue as many verbs as possible */
2965                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
2966 #if 0
2967                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2968                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
2969 #endif
2970                         while (codec->verbs_sent != commands->num_commands &&
2971                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
2972                                 sc->corb_wp++;
2973                                 sc->corb_wp %= sc->corb_size;
2974                                 corb[sc->corb_wp] =
2975                                     commands->verbs[codec->verbs_sent++];
2976                         }
2977
2978                         /* Send the verbs to the codecs */
2979 #if 0
2980                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2981                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
2982 #endif
2983                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
2984                 }
2985
2986                 timeout = 1000;
2987                 while (hdac_rirb_flush(sc) == 0 && --timeout)
2988                         DELAY(10);
2989         } while ((codec->verbs_sent != commands->num_commands ||
2990             codec->responses_received != commands->num_commands) && --retry);
2991
2992         if (retry == 0)
2993                 device_printf(sc->dev,
2994                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
2995                     __func__, commands->num_commands, codec->verbs_sent,
2996                     codec->responses_received);
2997
2998         codec->commands = NULL;
2999         codec->responses_received = 0;
3000         codec->verbs_sent = 0;
3001
3002         hdac_unsolq_flush(sc);
3003 }
3004
3005
3006 /****************************************************************************
3007  * Device Methods
3008  ****************************************************************************/
3009
3010 /****************************************************************************
3011  * int hdac_probe(device_t)
3012  *
3013  * Probe for the presence of an hdac. If none is found, check for a generic
3014  * match using the subclass of the device.
3015  ****************************************************************************/
3016 static int
3017 hdac_probe(device_t dev)
3018 {
3019         int i, result;
3020         uint32_t model;
3021         uint16_t class, subclass;
3022         char desc[64];
3023
3024         model = (uint32_t)pci_get_device(dev) << 16;
3025         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
3026         class = pci_get_class(dev);
3027         subclass = pci_get_subclass(dev);
3028
3029         bzero(desc, sizeof(desc));
3030         result = ENXIO;
3031         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
3032                 if (hdac_devices[i].model == model) {
3033                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3034                         result = BUS_PROBE_DEFAULT;
3035                         break;
3036                 }
3037                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
3038                     class == PCIC_MULTIMEDIA &&
3039                     subclass == PCIS_MULTIMEDIA_HDA) {
3040                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3041                         result = BUS_PROBE_GENERIC;
3042                         break;
3043                 }
3044         }
3045         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
3046             subclass == PCIS_MULTIMEDIA_HDA) {
3047                 strlcpy(desc, "Generic", sizeof(desc));
3048                 result = BUS_PROBE_GENERIC;
3049         }
3050         if (result != ENXIO) {
3051                 strlcat(desc, " High Definition Audio Controller",
3052                     sizeof(desc));
3053                 device_set_desc_copy(dev, desc);
3054         }
3055
3056         return (result);
3057 }
3058
3059 static void *
3060 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3061                                         struct pcm_channel *c, int dir)
3062 {
3063         struct hdac_devinfo *devinfo = data;
3064         struct hdac_softc *sc = devinfo->codec->sc;
3065         struct hdac_chan *ch;
3066
3067         hdac_lock(sc);
3068         if (dir == PCMDIR_PLAY) {
3069                 ch = &sc->play;
3070                 ch->off = (sc->num_iss + devinfo->function.audio.playcnt) << 5;
3071                 devinfo->function.audio.playcnt++;
3072         } else {
3073                 ch = &sc->rec;
3074                 ch->off = devinfo->function.audio.reccnt << 5;
3075                 devinfo->function.audio.reccnt++;
3076         }
3077         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3078                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3079                 ch->pcmrates[0] = 48000;
3080                 ch->pcmrates[1] = 0;
3081         }
3082         if (sc->pos_dma.dma_vaddr != NULL)
3083                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3084                     (sc->streamcnt * 8));
3085         else
3086                 ch->dmapos = NULL;
3087         ch->sid = ++sc->streamcnt;
3088         ch->dir = dir;
3089         ch->b = b;
3090         ch->c = c;
3091         ch->devinfo = devinfo;
3092         ch->blksz = sc->chan_size / sc->chan_blkcnt;
3093         ch->blkcnt = sc->chan_blkcnt;
3094         hdac_unlock(sc);
3095
3096         if (hdac_bdl_alloc(ch) != 0) {
3097                 ch->blkcnt = 0;
3098                 return (NULL);
3099         }
3100
3101         if (sndbuf_alloc(ch->b, sc->chan_dmat,
3102             (sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0,
3103             sc->chan_size) != 0)
3104                 return (NULL);
3105
3106         return (ch);
3107 }
3108
3109 static int
3110 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3111 {
3112         struct hdac_chan *ch = data;
3113         int i;
3114
3115         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3116                 if (format == ch->caps.fmtlist[i]) {
3117                         ch->fmt = format;
3118                         return (0);
3119                 }
3120         }
3121
3122         return (EINVAL);
3123 }
3124
3125 static int
3126 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3127 {
3128         struct hdac_chan *ch = data;
3129         uint32_t spd = 0, threshold;
3130         int i;
3131
3132         for (i = 0; ch->pcmrates[i] != 0; i++) {
3133                 spd = ch->pcmrates[i];
3134                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3135                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3136                 if (speed < threshold)
3137                         break;
3138         }
3139
3140         if (spd == 0)   /* impossible */
3141                 ch->spd = 48000;
3142         else
3143                 ch->spd = spd;
3144
3145         return (ch->spd);
3146 }
3147
3148 static void
3149 hdac_stream_setup(struct hdac_chan *ch)
3150 {
3151         struct hdac_softc *sc = ch->devinfo->codec->sc;
3152         struct hdac_widget *w;
3153         int i, chn, totalchn;
3154         nid_t cad = ch->devinfo->codec->cad;
3155         uint16_t fmt;
3156
3157         fmt = 0;
3158         if (ch->fmt & AFMT_S16_LE)
3159                 fmt |= ch->bit16 << 4;
3160         else if (ch->fmt & AFMT_S32_LE)
3161                 fmt |= ch->bit32 << 4;
3162         else
3163                 fmt |= 1 << 4;
3164
3165         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3166                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3167                         fmt |= hda_rate_tab[i].base;
3168                         fmt |= hda_rate_tab[i].mul;
3169                         fmt |= hda_rate_tab[i].div;
3170                         break;
3171                 }
3172         }
3173
3174         if (ch->fmt & AFMT_STEREO) {
3175                 fmt |= 1;
3176                 totalchn = 2;
3177         } else
3178                 totalchn = 1;
3179
3180         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3181
3182         chn = 0;
3183         for (i = 0; ch->io[i] != -1; i++) {
3184                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3185                 if (w == NULL)
3186                         continue;
3187                 HDA_BOOTVERBOSE(
3188                         device_printf(sc->dev,
3189                             "HDA_DEBUG: PCMDIR_%s: Stream setup nid=%d "
3190                             "fmt=0x%08x\n",
3191                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3192                             ch->io[i], fmt);
3193                 );
3194                 hdac_command(sc,
3195                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3196                 if (ch->dir == PCMDIR_REC)
3197                         hdac_command(sc,
3198                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3199                             (chn < totalchn) ? ((ch->sid << 4) | chn) : 0),
3200                             cad);
3201                 else
3202                         hdac_command(sc,
3203                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3204                             ch->sid << 4), cad);
3205                 chn +=
3206                     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap) ?
3207                     2 : 1;
3208         }
3209 }
3210
3211 static int
3212 hdac_channel_setfragments(kobj_t obj, void *data,
3213                                         uint32_t blksz, uint32_t blkcnt)
3214 {
3215         struct hdac_chan *ch = data;
3216         struct hdac_softc *sc = ch->devinfo->codec->sc;
3217
3218         blksz &= HDA_BLK_ALIGN;
3219
3220         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3221                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3222         if (blksz < HDA_BLK_MIN)
3223                 blksz = HDA_BLK_MIN;
3224         if (blkcnt > HDA_BDL_MAX)
3225                 blkcnt = HDA_BDL_MAX;
3226         if (blkcnt < HDA_BDL_MIN)
3227                 blkcnt = HDA_BDL_MIN;
3228
3229         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3230                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3231                         blkcnt >>= 1;
3232                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3233                         blksz >>= 1;
3234                 else
3235                         break;
3236         }
3237
3238         if ((sndbuf_getblksz(ch->b) != blksz ||
3239             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3240             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3241                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3242                     __func__, blksz, blkcnt);
3243
3244         ch->blksz = sndbuf_getblksz(ch->b);
3245         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3246
3247         return (1);
3248 }
3249
3250 static int
3251 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3252 {
3253         struct hdac_chan *ch = data;
3254         struct hdac_softc *sc = ch->devinfo->codec->sc;
3255
3256         hdac_channel_setfragments(obj, data, blksz, sc->chan_blkcnt);
3257
3258         return (ch->blksz);
3259 }
3260
3261 static void
3262 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3263 {
3264         struct hdac_devinfo *devinfo = ch->devinfo;
3265         nid_t cad = devinfo->codec->cad;
3266         int i;
3267
3268         hdac_stream_stop(ch);
3269
3270         for (i = 0; ch->io[i] != -1; i++) {
3271                 hdac_command(sc,
3272                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3273                     0), cad);
3274         }
3275 }
3276
3277 static void
3278 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3279 {
3280         ch->ptr = 0;
3281         ch->prevptr = 0;
3282         hdac_stream_stop(ch);
3283         hdac_stream_reset(ch);
3284         hdac_bdl_setup(ch);
3285         hdac_stream_setid(ch);
3286         hdac_stream_setup(ch);
3287         hdac_stream_start(ch);
3288 }
3289
3290 static int
3291 hdac_channel_trigger(kobj_t obj, void *data, int go)
3292 {
3293         struct hdac_chan *ch = data;
3294         struct hdac_softc *sc = ch->devinfo->codec->sc;
3295
3296         if (!PCMTRIG_COMMON(go))
3297                 return (0);
3298
3299         hdac_lock(sc);
3300         switch (go) {
3301         case PCMTRIG_START:
3302                 hdac_channel_start(sc, ch);
3303                 break;
3304         case PCMTRIG_STOP:
3305         case PCMTRIG_ABORT:
3306                 hdac_channel_stop(sc, ch);
3307                 break;
3308         default:
3309                 break;
3310         }
3311         hdac_unlock(sc);
3312
3313         return (0);
3314 }
3315
3316 static int
3317 hdac_channel_getptr(kobj_t obj, void *data)
3318 {
3319         struct hdac_chan *ch = data;
3320         struct hdac_softc *sc = ch->devinfo->codec->sc;
3321         uint32_t ptr;
3322
3323         hdac_lock(sc);
3324         if (sc->polling != 0)
3325                 ptr = ch->ptr;
3326         else if (ch->dmapos != NULL)
3327                 ptr = *(ch->dmapos);
3328         else
3329                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3330         hdac_unlock(sc);
3331
3332         /*
3333          * Round to available space and force 128 bytes aligment.
3334          */
3335         ptr %= ch->blksz * ch->blkcnt;
3336         ptr &= HDA_BLK_ALIGN;
3337
3338         return (ptr);
3339 }
3340
3341 static struct pcmchan_caps *
3342 hdac_channel_getcaps(kobj_t obj, void *data)
3343 {
3344         return (&((struct hdac_chan *)data)->caps);
3345 }
3346
3347 static kobj_method_t hdac_channel_methods[] = {
3348         KOBJMETHOD(channel_init,                hdac_channel_init),
3349         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3350         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3351         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3352         KOBJMETHOD(channel_setfragments,        hdac_channel_setfragments),
3353         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3354         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3355         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3356         { 0, 0 }
3357 };
3358 CHANNEL_DECLARE(hdac_channel);
3359
3360 static void
3361 hdac_jack_poll_callback(void *arg)
3362 {
3363         struct hdac_devinfo *devinfo = arg;
3364         struct hdac_softc *sc;
3365
3366         if (devinfo == NULL || devinfo->codec == NULL ||
3367             devinfo->codec->sc == NULL)
3368                 return;
3369         sc = devinfo->codec->sc;
3370         hdac_lock(sc);
3371         if (sc->poll_ival == 0) {
3372                 hdac_unlock(sc);
3373                 return;
3374         }
3375         hdac_hp_switch_handler(devinfo);
3376         callout_reset(&sc->poll_jack, sc->poll_ival,
3377             hdac_jack_poll_callback, devinfo);
3378         hdac_unlock(sc);
3379 }
3380
3381 static int
3382 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3383 {
3384         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3385         struct hdac_softc *sc = devinfo->codec->sc;
3386         struct hdac_widget *w, *cw;
3387         struct hdac_audio_ctl *ctl;
3388         uint32_t mask, recmask, id;
3389         int i, j, softpcmvol;
3390         nid_t cad;
3391
3392         hdac_lock(sc);
3393
3394         mask = 0;
3395         recmask = 0;
3396
3397         id = hdac_codec_id(devinfo);
3398         cad = devinfo->codec->cad;
3399         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
3400                 if (!(HDA_DEV_MATCH(hdac_hp_switch[i].model,
3401                     sc->pci_subvendor) && hdac_hp_switch[i].id == id))
3402                         continue;
3403                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
3404                 if (w == NULL || w->enable == 0 || w->type !=
3405                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
3406                         continue;
3407                 if (hdac_hp_switch[i].polling != 0)
3408                         callout_reset(&sc->poll_jack, 1,
3409                             hdac_jack_poll_callback, devinfo);
3410                 else if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
3411                         hdac_command(sc,
3412                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
3413                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
3414                             HDAC_UNSOLTAG_EVENT_HP), cad);
3415                 else
3416                         continue;
3417                 hdac_hp_switch_handler(devinfo);
3418                 HDA_BOOTVERBOSE(
3419                         device_printf(sc->dev,
3420                             "HDA_DEBUG: Enabling headphone/speaker "
3421                             "audio routing switching:\n");
3422                         device_printf(sc->dev,
3423                             "HDA_DEBUG: \tindex=%d nid=%d "
3424                             "pci_subvendor=0x%08x "
3425                             "codec=0x%08x [%s]\n",
3426                             i, w->nid, sc->pci_subvendor, id,
3427                             (hdac_hp_switch[i].polling != 0) ? "POLL" :
3428                             "UNSOL");
3429                 );
3430                 break;
3431         }
3432         for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3433                 if (!(HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3434                     sc->pci_subvendor) &&
3435                     hdac_eapd_switch[i].id == id))
3436                         continue;
3437                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3438                 if (w == NULL || w->enable == 0)
3439                         break;
3440                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3441                     w->param.eapdbtl == HDAC_INVALID)
3442                         break;
3443                 mask |= SOUND_MASK_OGAIN;
3444                 break;
3445         }
3446
3447         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3448                 w = hdac_widget_get(devinfo, i);
3449                 if (w == NULL || w->enable == 0)
3450                         continue;
3451                 mask |= w->ctlflags;
3452                 if (!(w->pflags & HDA_ADC_RECSEL))
3453                         continue;
3454                 for (j = 0; j < w->nconns; j++) {
3455                         cw = hdac_widget_get(devinfo, w->conns[j]);
3456                         if (cw == NULL || cw->enable == 0)
3457                                 continue;
3458                         recmask |= cw->ctlflags;
3459                 }
3460         }
3461
3462         if (!(mask & SOUND_MASK_PCM)) {
3463                 softpcmvol = 1;
3464                 mask |= SOUND_MASK_PCM;
3465         } else
3466                 softpcmvol = (devinfo->function.audio.quirks &
3467                     HDA_QUIRK_SOFTPCMVOL) ? 1 : 0;
3468
3469         i = 0;
3470         ctl = NULL;
3471         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3472                 if (ctl->widget == NULL || ctl->enable == 0)
3473                         continue;
3474                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3475                         continue;
3476                 if (ctl->step > 0)
3477                         break;
3478         }
3479
3480         if (softpcmvol == 1 || ctl == NULL) {
3481                 pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL);
3482                 HDA_BOOTVERBOSE(
3483                         device_printf(sc->dev,
3484                             "HDA_DEBUG: %s Soft PCM volume\n",
3485                             (softpcmvol == 1) ?
3486                             "Forcing" : "Enabling");
3487                 );
3488                 i = 0;
3489                 /*
3490                  * XXX Temporary quirk for STAC9220, until the parser
3491                  *     become smarter.
3492                  */
3493                 if (id == HDA_CODEC_STAC9220) {
3494                         mask |= SOUND_MASK_VOLUME;
3495                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3496                             NULL) {
3497                                 if (ctl->widget == NULL || ctl->enable == 0)
3498                                         continue;
3499                                 if (ctl->widget->nid == 11 && ctl->index == 0) {
3500                                         ctl->ossmask = SOUND_MASK_VOLUME;
3501                                         ctl->ossval = 100 | (100 << 8);
3502                                 } else
3503                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3504                         }
3505                 } else if (id == HDA_CODEC_STAC9221) {
3506                         mask |= SOUND_MASK_VOLUME;
3507                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3508                             NULL) {
3509                                 if (ctl->widget == NULL)
3510                                         continue;
3511                                 if (ctl->widget->type ==
3512                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
3513                                     ctl->index == 0 && (ctl->widget->nid == 2 ||
3514                                     ctl->widget->enable != 0)) {
3515                                         ctl->enable = 1;
3516                                         ctl->ossmask = SOUND_MASK_VOLUME;
3517                                         ctl->ossval = 100 | (100 << 8);
3518                                 } else if (ctl->enable == 0)
3519                                         continue;
3520                                 else
3521                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3522                         }
3523                 } else {
3524                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3525                             SOUND_MASK_PCM);
3526                         if (!(mask & SOUND_MASK_VOLUME))
3527                                 mix_setrealdev(m, SOUND_MIXER_VOLUME,
3528                                     SOUND_MIXER_NONE);
3529                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3530                             NULL) {
3531                                 if (ctl->widget == NULL || ctl->enable == 0)
3532                                         continue;
3533                                 if (!HDA_FLAG_MATCH(ctl->ossmask,
3534                                     SOUND_MASK_VOLUME | SOUND_MASK_PCM))
3535                                         continue;
3536                                 if (!(ctl->mute == 1 && ctl->step == 0))
3537                                         ctl->enable = 0;
3538                         }
3539                 }
3540         }
3541
3542         recmask &= ~(SOUND_MASK_PCM | SOUND_MASK_RECLEV | SOUND_MASK_SPEAKER |
3543             SOUND_MASK_BASS | SOUND_MASK_TREBLE | SOUND_MASK_IGAIN |
3544             SOUND_MASK_OGAIN);
3545         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3546         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3547
3548         mix_setrecdevs(m, recmask);
3549         mix_setdevs(m, mask);
3550
3551         hdac_unlock(sc);
3552
3553         return (0);
3554 }
3555
3556 static int
3557 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3558                                         unsigned left, unsigned right)
3559 {
3560         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3561         struct hdac_softc *sc = devinfo->codec->sc;
3562         struct hdac_widget *w;
3563         struct hdac_audio_ctl *ctl;
3564         uint32_t id, mute;
3565         int lvol, rvol, mlvol, mrvol;
3566         int i = 0;
3567
3568         hdac_lock(sc);
3569         if (dev == SOUND_MIXER_OGAIN) {
3570                 uint32_t orig;
3571                 /*if (left != right || !(left == 0 || left == 1)) {
3572                         hdac_unlock(sc);
3573                         return (-1);
3574                 }*/
3575                 id = hdac_codec_id(devinfo);
3576                 for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3577                         if (HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3578                             sc->pci_subvendor) &&
3579                             hdac_eapd_switch[i].id == id)
3580                                 break;
3581                 }
3582                 if (i >= HDAC_EAPD_SWITCH_LEN) {
3583                         hdac_unlock(sc);
3584                         return (-1);
3585                 }
3586                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3587                 if (w == NULL ||
3588                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3589                     w->param.eapdbtl == HDAC_INVALID) {
3590                         hdac_unlock(sc);
3591                         return (-1);
3592                 }
3593                 orig = w->param.eapdbtl;
3594                 if (left == 0)
3595                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3596                 else
3597                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3598                 if (orig != w->param.eapdbtl) {
3599                         uint32_t val;
3600
3601                         if (hdac_eapd_switch[i].hp_switch != 0)
3602                                 hdac_hp_switch_handler(devinfo);
3603                         val = w->param.eapdbtl;
3604                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3605                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3606                         hdac_command(sc,
3607                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3608                             w->nid, val), devinfo->codec->cad);
3609                 }
3610                 hdac_unlock(sc);
3611                 return (left | (left << 8));
3612         }
3613         if (dev == SOUND_MIXER_VOLUME)
3614                 devinfo->function.audio.mvol = left | (right << 8);
3615
3616         mlvol = devinfo->function.audio.mvol & 0x7f;
3617         mrvol = (devinfo->function.audio.mvol >> 8) & 0x7f;
3618         lvol = 0;
3619         rvol = 0;
3620
3621         i = 0;
3622         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3623                 if (ctl->widget == NULL || ctl->enable == 0 ||
3624                     !(ctl->ossmask & (1 << dev)))
3625                         continue;
3626                 switch (dev) {
3627                 case SOUND_MIXER_VOLUME:
3628                         lvol = ((ctl->ossval & 0x7f) * left) / 100;
3629                         lvol = (lvol * ctl->step) / 100;
3630                         rvol = (((ctl->ossval >> 8) & 0x7f) * right) / 100;
3631                         rvol = (rvol * ctl->step) / 100;
3632                         break;
3633                 default:
3634                         if (ctl->ossmask & SOUND_MASK_VOLUME) {
3635                                 lvol = (left * mlvol) / 100;
3636                                 lvol = (lvol * ctl->step) / 100;
3637                                 rvol = (right * mrvol) / 100;
3638                                 rvol = (rvol * ctl->step) / 100;
3639                         } else {
3640                                 lvol = (left * ctl->step) / 100;
3641                                 rvol = (right * ctl->step) / 100;
3642                         }
3643                         ctl->ossval = left | (right << 8);
3644                         break;
3645                 }
3646                 mute = 0;
3647                 if (ctl->step < 1) {
3648                         mute |= (left == 0) ? HDA_AMP_MUTE_LEFT :
3649                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3650                         mute |= (right == 0) ? HDA_AMP_MUTE_RIGHT :
3651                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3652                 } else {
3653                         mute |= (lvol == 0) ? HDA_AMP_MUTE_LEFT :
3654                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3655                         mute |= (rvol == 0) ? HDA_AMP_MUTE_RIGHT :
3656                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3657                 }
3658                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3659         }
3660         hdac_unlock(sc);
3661
3662         return (left | (right << 8));
3663 }
3664
3665 static int
3666 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
3667 {
3668         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3669         struct hdac_widget *w, *cw;
3670         struct hdac_softc *sc = devinfo->codec->sc;
3671         uint32_t ret = src, target;
3672         int i, j;
3673
3674         target = 0;
3675         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3676                 if (src & (1 << i)) {
3677                         target = 1 << i;
3678                         break;
3679                 }
3680         }
3681
3682         hdac_lock(sc);
3683
3684         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3685                 w = hdac_widget_get(devinfo, i);
3686                 if (w == NULL || w->enable == 0)
3687                         continue;
3688                 if (!(w->pflags & HDA_ADC_RECSEL))
3689                         continue;
3690                 for (j = 0; j < w->nconns; j++) {
3691                         cw = hdac_widget_get(devinfo, w->conns[j]);
3692                         if (cw == NULL || cw->enable == 0)
3693                                 continue;
3694                         if ((target == SOUND_MASK_VOLUME &&
3695                             cw->type !=
3696                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
3697                             (target != SOUND_MASK_VOLUME &&
3698                             cw->type ==
3699                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER))
3700                                 continue;
3701                         if (cw->ctlflags & target) {
3702                                 if (!(w->pflags & HDA_ADC_LOCKED))
3703                                         hdac_widget_connection_select(w, j);
3704                                 ret = target;
3705                                 j += w->nconns;
3706                         }
3707                 }
3708         }
3709
3710         hdac_unlock(sc);
3711
3712         return (ret);
3713 }
3714
3715 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
3716         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
3717         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
3718         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
3719         { 0, 0 }
3720 };
3721 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
3722
3723 static void
3724 hdac_unsolq_task(void *context, int pending)
3725 {
3726         struct hdac_softc *sc;
3727
3728         sc = (struct hdac_softc *)context;
3729
3730         hdac_lock(sc);
3731         hdac_unsolq_flush(sc);
3732         hdac_unlock(sc);
3733 }
3734
3735 /****************************************************************************
3736  * int hdac_attach(device_t)
3737  *
3738  * Attach the device into the kernel. Interrupts usually won't be enabled
3739  * when this function is called. Setup everything that doesn't require
3740  * interrupts and defer probing of codecs until interrupts are enabled.
3741  ****************************************************************************/
3742 static int
3743 hdac_attach(device_t dev)
3744 {
3745         struct hdac_softc *sc;
3746         int result;
3747         int i;
3748         uint16_t vendor;
3749         uint8_t v;
3750
3751         sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
3752         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
3753         sc->dev = dev;
3754         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
3755         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
3756         vendor = pci_get_vendor(dev);
3757
3758         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
3759                 /* Screw nx6325 - subdevice/subvendor swapped */
3760                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
3761         }
3762
3763         callout_init(&sc->poll_hda, CALLOUT_MPSAFE);
3764         callout_init(&sc->poll_hdac, CALLOUT_MPSAFE);
3765         callout_init(&sc->poll_jack, CALLOUT_MPSAFE);
3766
3767         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
3768
3769         sc->poll_ticks = 1;
3770         sc->poll_ival = HDAC_POLL_INTERVAL;
3771         if (resource_int_value(device_get_name(dev),
3772             device_get_unit(dev), "polling", &i) == 0 && i != 0)
3773                 sc->polling = 1;
3774         else
3775                 sc->polling = 0;
3776
3777         sc->chan_size = pcm_getbuffersize(dev,
3778             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
3779
3780         if (resource_int_value(device_get_name(dev),
3781             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
3782                 i &= HDA_BLK_ALIGN;
3783                 if (i < HDA_BLK_MIN)
3784                         i = HDA_BLK_MIN;
3785                 sc->chan_blkcnt = sc->chan_size / i;
3786                 i = 0;
3787                 while (sc->chan_blkcnt >> i)
3788                         i++;
3789                 sc->chan_blkcnt = 1 << (i - 1);
3790                 if (sc->chan_blkcnt < HDA_BDL_MIN)
3791                         sc->chan_blkcnt = HDA_BDL_MIN;
3792                 else if (sc->chan_blkcnt > HDA_BDL_MAX)
3793                         sc->chan_blkcnt = HDA_BDL_MAX;
3794         } else
3795                 sc->chan_blkcnt = HDA_BDL_DEFAULT;
3796
3797         result = bus_dma_tag_create(NULL,       /* parent */
3798             HDAC_DMA_ALIGNMENT,                 /* alignment */
3799             0,                                  /* boundary */
3800             BUS_SPACE_MAXADDR_32BIT,            /* lowaddr */
3801             BUS_SPACE_MAXADDR,                  /* highaddr */
3802             NULL,                               /* filtfunc */
3803             NULL,                               /* fistfuncarg */
3804             sc->chan_size,                      /* maxsize */
3805             1,                                  /* nsegments */
3806             sc->chan_size,                      /* maxsegsz */
3807             0,                                  /* flags */
3808             NULL,                               /* lockfunc */
3809             NULL,                               /* lockfuncarg */
3810             &sc->chan_dmat);                    /* dmat */
3811         if (result != 0) {
3812                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
3813                      __func__, result);
3814                 snd_mtxfree(sc->lock);
3815                 free(sc, M_DEVBUF);
3816                 return (ENXIO);
3817         }
3818
3819
3820         sc->hdabus = NULL;
3821         for (i = 0; i < HDAC_CODEC_MAX; i++)
3822                 sc->codecs[i] = NULL;
3823
3824         pci_enable_busmaster(dev);
3825
3826         if (vendor == INTEL_VENDORID) {
3827                 /* TCSEL -> TC0 */
3828                 v = pci_read_config(dev, 0x44, 1);
3829                 pci_write_config(dev, 0x44, v & 0xf8, 1);
3830                 HDA_BOOTVERBOSE(
3831                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
3832                             pci_read_config(dev, 0x44, 1));
3833                 );
3834         }
3835
3836 #ifdef HDAC_MSI_ENABLED
3837         if (resource_int_value(device_get_name(dev),
3838             device_get_unit(dev), "msi", &i) == 0 && i != 0 &&
3839             pci_msi_count(dev) == 1)
3840                 sc->flags |= HDAC_F_MSI;
3841         else
3842 #endif
3843                 sc->flags &= ~HDAC_F_MSI;
3844
3845 #if defined(__i386__) || defined(__amd64__)
3846         sc->flags |= HDAC_F_DMA_NOCACHE;
3847
3848         if (resource_int_value(device_get_name(dev),
3849             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
3850 #else
3851         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3852 #endif
3853                 /*
3854                  * Try to enable PCIe snoop to avoid messing around with
3855                  * uncacheable DMA attribute. Since PCIe snoop register
3856                  * config is pretty much vendor specific, there are no
3857                  * general solutions on how to enable it, forcing us (even
3858                  * Microsoft) to enable uncacheable or write combined DMA
3859                  * by default.
3860                  *
3861                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
3862                  */
3863                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
3864                         if (hdac_pcie_snoop[i].vendor != vendor)
3865                                 continue;
3866                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3867                         if (hdac_pcie_snoop[i].reg == 0x00)
3868                                 break;
3869                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3870                         if ((v & hdac_pcie_snoop[i].enable) ==
3871                             hdac_pcie_snoop[i].enable)
3872                                 break;
3873                         v &= hdac_pcie_snoop[i].mask;
3874                         v |= hdac_pcie_snoop[i].enable;
3875                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
3876                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3877                         if ((v & hdac_pcie_snoop[i].enable) !=
3878                             hdac_pcie_snoop[i].enable) {
3879                                 HDA_BOOTVERBOSE(
3880                                         device_printf(dev,
3881                                             "WARNING: Failed to enable PCIe "
3882                                             "snoop!\n");
3883                                 );
3884 #if defined(__i386__) || defined(__amd64__)
3885                                 sc->flags |= HDAC_F_DMA_NOCACHE;
3886 #endif
3887                         }
3888                         break;
3889                 }
3890 #if defined(__i386__) || defined(__amd64__)
3891         }
3892 #endif
3893
3894         HDA_BOOTVERBOSE(
3895                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
3896                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
3897                     "Uncacheable" : "PCIe snoop", vendor);
3898         );
3899
3900         /* Allocate resources */
3901         result = hdac_mem_alloc(sc);
3902         if (result != 0)
3903                 goto hdac_attach_fail;
3904         result = hdac_irq_alloc(sc);
3905         if (result != 0)
3906                 goto hdac_attach_fail;
3907
3908         /* Get Capabilities */
3909         result = hdac_get_capabilities(sc);
3910         if (result != 0)
3911                 goto hdac_attach_fail;
3912
3913         /* Allocate CORB and RIRB dma memory */
3914         result = hdac_dma_alloc(sc, &sc->corb_dma,
3915             sc->corb_size * sizeof(uint32_t));
3916         if (result != 0)
3917                 goto hdac_attach_fail;
3918         result = hdac_dma_alloc(sc, &sc->rirb_dma,
3919             sc->rirb_size * sizeof(struct hdac_rirb));
3920         if (result != 0)
3921                 goto hdac_attach_fail;
3922
3923         /* Quiesce everything */
3924         hdac_reset(sc);
3925
3926         /* Initialize the CORB and RIRB */
3927         hdac_corb_init(sc);
3928         hdac_rirb_init(sc);
3929
3930         /* Defer remaining of initialization until interrupts are enabled */
3931         sc->intrhook.ich_func = hdac_attach2;
3932         sc->intrhook.ich_arg = (void *)sc;
3933         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
3934                 sc->intrhook.ich_func = NULL;
3935                 hdac_attach2((void *)sc);
3936         }
3937
3938         return (0);
3939
3940 hdac_attach_fail:
3941         hdac_irq_free(sc);
3942         hdac_dma_free(sc, &sc->rirb_dma);
3943         hdac_dma_free(sc, &sc->corb_dma);
3944         hdac_mem_free(sc);
3945         snd_mtxfree(sc->lock);
3946         free(sc, M_DEVBUF);
3947
3948         return (ENXIO);
3949 }
3950
3951 static void
3952 hdac_audio_parse(struct hdac_devinfo *devinfo)
3953 {
3954         struct hdac_softc *sc = devinfo->codec->sc;
3955         struct hdac_widget *w;
3956         uint32_t res;
3957         int i;
3958         nid_t cad, nid;
3959
3960         cad = devinfo->codec->cad;
3961         nid = devinfo->nid;
3962
3963         hdac_command(sc,
3964             HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0), cad);
3965
3966         DELAY(100);
3967
3968         res = hdac_command(sc,
3969             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
3970
3971         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
3972         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
3973         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
3974
3975         res = hdac_command(sc,
3976             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
3977         devinfo->function.audio.gpio = res;
3978
3979         HDA_BOOTVERBOSE(
3980                 device_printf(sc->dev, "       Vendor: 0x%08x\n",
3981                     devinfo->vendor_id);
3982                 device_printf(sc->dev, "       Device: 0x%08x\n",
3983                     devinfo->device_id);
3984                 device_printf(sc->dev, "     Revision: 0x%08x\n",
3985                     devinfo->revision_id);
3986                 device_printf(sc->dev, "     Stepping: 0x%08x\n",
3987                     devinfo->stepping_id);
3988                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
3989                     sc->pci_subvendor);
3990                 device_printf(sc->dev, "        Nodes: start=%d "
3991                     "endnode=%d total=%d\n",
3992                     devinfo->startnode, devinfo->endnode, devinfo->nodecnt);
3993                 device_printf(sc->dev, "    CORB size: %d\n", sc->corb_size);
3994                 device_printf(sc->dev, "    RIRB size: %d\n", sc->rirb_size);
3995                 device_printf(sc->dev, "      Streams: ISS=%d OSS=%d BSS=%d\n",
3996                     sc->num_iss, sc->num_oss, sc->num_bss);
3997                 device_printf(sc->dev, "         GPIO: 0x%08x\n",
3998                     devinfo->function.audio.gpio);
3999                 device_printf(sc->dev, "               NumGPIO=%d NumGPO=%d "
4000                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
4001                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
4002                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
4003                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
4004                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
4005                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
4006         );
4007
4008         res = hdac_command(sc,
4009             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
4010             cad);
4011         devinfo->function.audio.supp_stream_formats = res;
4012
4013         res = hdac_command(sc,
4014             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
4015             cad);
4016         devinfo->function.audio.supp_pcm_size_rate = res;
4017
4018         res = hdac_command(sc,
4019             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4020             cad);
4021         devinfo->function.audio.outamp_cap = res;
4022
4023         res = hdac_command(sc,
4024             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4025             cad);
4026         devinfo->function.audio.inamp_cap = res;
4027
4028         if (devinfo->nodecnt > 0)
4029                 devinfo->widget = (struct hdac_widget *)malloc(
4030                     sizeof(*(devinfo->widget)) * devinfo->nodecnt, M_HDAC,
4031                     M_NOWAIT | M_ZERO);
4032         else
4033                 devinfo->widget = NULL;
4034
4035         if (devinfo->widget == NULL) {
4036                 device_printf(sc->dev, "unable to allocate widgets!\n");
4037                 devinfo->endnode = devinfo->startnode;
4038                 devinfo->nodecnt = 0;
4039                 return;
4040         }
4041
4042         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4043                 w = hdac_widget_get(devinfo, i);
4044                 if (w == NULL)
4045                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4046                 else {
4047                         w->devinfo = devinfo;
4048                         w->nid = i;
4049                         w->enable = 1;
4050                         w->selconn = -1;
4051                         w->pflags = 0;
4052                         w->ctlflags = 0;
4053                         w->param.eapdbtl = HDAC_INVALID;
4054                         hdac_widget_parse(w);
4055                 }
4056         }
4057 }
4058
4059 static void
4060 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4061 {
4062         struct hdac_softc *sc = devinfo->codec->sc;
4063         struct hdac_audio_ctl *ctls;
4064         struct hdac_widget *w, *cw;
4065         int i, j, cnt, max, ocap, icap;
4066         int mute, offset, step, size;
4067
4068         /* XXX This is redundant */
4069         max = 0;
4070         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4071                 w = hdac_widget_get(devinfo, i);
4072                 if (w == NULL || w->enable == 0)
4073                         continue;
4074                 if (w->param.outamp_cap != 0)
4075                         max++;
4076                 if (w->param.inamp_cap != 0) {
4077                         switch (w->type) {
4078                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4079                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4080                                 for (j = 0; j < w->nconns; j++) {
4081                                         cw = hdac_widget_get(devinfo,
4082                                             w->conns[j]);
4083                                         if (cw == NULL || cw->enable == 0)
4084                                                 continue;
4085                                         max++;
4086                                 }
4087                                 break;
4088                         default:
4089                                 max++;
4090                                 break;
4091                         }
4092                 }
4093         }
4094
4095         devinfo->function.audio.ctlcnt = max;
4096
4097         if (max < 1)
4098                 return;
4099
4100         ctls = (struct hdac_audio_ctl *)malloc(
4101             sizeof(*ctls) * max, M_HDAC, M_ZERO | M_NOWAIT);
4102
4103         if (ctls == NULL) {
4104                 /* Blekh! */
4105                 device_printf(sc->dev, "unable to allocate ctls!\n");
4106                 devinfo->function.audio.ctlcnt = 0;
4107                 return;
4108         }
4109
4110         cnt = 0;
4111         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4112                 if (cnt >= max) {
4113                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4114                             __func__);
4115                         break;
4116                 }
4117                 w = hdac_widget_get(devinfo, i);
4118                 if (w == NULL || w->enable == 0)
4119                         continue;
4120                 ocap = w->param.outamp_cap;
4121                 icap = w->param.inamp_cap;
4122                 if (ocap != 0) {
4123                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4124                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4125                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4126                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4127                         /*if (offset > step) {
4128                                 HDA_BOOTVERBOSE(
4129                                         device_printf(sc->dev,
4130                                             "HDA_DEBUG: BUGGY outamp: nid=%d "
4131                                             "[offset=%d > step=%d]\n",
4132                                             w->nid, offset, step);
4133                                 );
4134                                 offset = step;
4135                         }*/
4136                         ctls[cnt].enable = 1;
4137                         ctls[cnt].widget = w;
4138                         ctls[cnt].mute = mute;
4139                         ctls[cnt].step = step;
4140                         ctls[cnt].size = size;
4141                         ctls[cnt].offset = offset;
4142                         ctls[cnt].left = offset;
4143                         ctls[cnt].right = offset;
4144                         ctls[cnt++].dir = HDA_CTL_OUT;
4145                 }
4146
4147                 if (icap != 0) {
4148                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4149                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4150                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4151                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4152                         /*if (offset > step) {
4153                                 HDA_BOOTVERBOSE(
4154                                         device_printf(sc->dev,
4155                                             "HDA_DEBUG: BUGGY inamp: nid=%d "
4156                                             "[offset=%d > step=%d]\n",
4157                                             w->nid, offset, step);
4158                                 );
4159                                 offset = step;
4160                         }*/
4161                         switch (w->type) {
4162                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4163                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4164                                 for (j = 0; j < w->nconns; j++) {
4165                                         if (cnt >= max) {
4166                                                 device_printf(sc->dev,
4167                                                     "%s: Ctl overflow!\n",
4168                                                     __func__);
4169                                                 break;
4170                                         }
4171                                         cw = hdac_widget_get(devinfo,
4172                                             w->conns[j]);
4173                                         if (cw == NULL || cw->enable == 0)
4174                                                 continue;
4175                                         ctls[cnt].enable = 1;
4176                                         ctls[cnt].widget = w;
4177                                         ctls[cnt].childwidget = cw;
4178                                         ctls[cnt].index = j;
4179                                         ctls[cnt].mute = mute;
4180                                         ctls[cnt].step = step;
4181                                         ctls[cnt].size = size;
4182                                         ctls[cnt].offset = offset;
4183                                         ctls[cnt].left = offset;
4184                                         ctls[cnt].right = offset;
4185                                         ctls[cnt++].dir = HDA_CTL_IN;
4186                                 }
4187                                 break;
4188                         default:
4189                                 if (cnt >= max) {
4190                                         device_printf(sc->dev,
4191                                             "%s: Ctl overflow!\n",
4192                                             __func__);
4193                                         break;
4194                                 }
4195                                 ctls[cnt].enable = 1;
4196                                 ctls[cnt].widget = w;
4197                                 ctls[cnt].mute = mute;
4198                                 ctls[cnt].step = step;
4199                                 ctls[cnt].size = size;
4200                                 ctls[cnt].offset = offset;
4201                                 ctls[cnt].left = offset;
4202                                 ctls[cnt].right = offset;
4203                                 ctls[cnt++].dir = HDA_CTL_IN;
4204                                 break;
4205                         }
4206                 }
4207         }
4208
4209         devinfo->function.audio.ctl = ctls;
4210 }
4211
4212 static const struct {
4213         uint32_t model;
4214         uint32_t id;
4215         uint32_t set, unset;
4216 } hdac_quirks[] = {
4217         /*
4218          * XXX Force stereo quirk. Monoural recording / playback
4219          *     on few codecs (especially ALC880) seems broken or
4220          *     perhaps unsupported.
4221          */
4222         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4223             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4224         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4225             HDA_QUIRK_GPIO0, 0 },
4226         { ASUS_G2K_SUBVENDOR, HDA_CODEC_ALC660,
4227             HDA_QUIRK_GPIO0, 0 },
4228         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4229             HDA_QUIRK_GPIO0, 0 },
4230         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4231             HDA_QUIRK_GPIO0, 0 },
4232         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4233             HDA_QUIRK_GPIO0, 0 },
4234         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4235             HDA_QUIRK_GPIO0, 0 },
4236         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4237             HDA_QUIRK_EAPDINV, 0 },
4238         { ASUS_A8X_SUBVENDOR, HDA_CODEC_AD1986A,
4239             HDA_QUIRK_EAPDINV, 0 },
4240         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4241             HDA_QUIRK_OVREF, 0 },
4242         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4243             HDA_QUIRK_OVREF, 0 },
4244         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4245             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4246         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4247             HDA_QUIRK_GPIO1, 0 },
4248         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4249             HDA_QUIRK_EAPDINV, 0 },
4250         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4251             HDA_QUIRK_EAPDINV, 0 },
4252         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4253             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4254         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4255             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4256         { DELL_V1500_SUBVENDOR, HDA_CODEC_STAC9205,
4257             HDA_QUIRK_GPIO0, 0 },
4258         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4259             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4260         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4261             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4262         { HDA_MATCH_ALL, HDA_CODEC_CXVENICE,
4263             0, HDA_QUIRK_FORCESTEREO },
4264         { HDA_MATCH_ALL, HDA_CODEC_STACXXXX,
4265             HDA_QUIRK_SOFTPCMVOL, 0 }
4266 };
4267 #define HDAC_QUIRKS_LEN (sizeof(hdac_quirks) / sizeof(hdac_quirks[0]))
4268
4269 static void
4270 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4271 {
4272         struct hdac_widget *w;
4273         struct hdac_audio_ctl *ctl;
4274         uint32_t id, subvendor;
4275         int i;
4276
4277         id = hdac_codec_id(devinfo);
4278         subvendor = devinfo->codec->sc->pci_subvendor;
4279
4280         /*
4281          * Quirks
4282          */
4283         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4284                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4285                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4286                         continue;
4287                 if (hdac_quirks[i].set != 0)
4288                         devinfo->function.audio.quirks |=
4289                             hdac_quirks[i].set;
4290                 if (hdac_quirks[i].unset != 0)
4291                         devinfo->function.audio.quirks &=
4292                             ~(hdac_quirks[i].unset);
4293         }
4294
4295         switch (id) {
4296         case HDA_CODEC_ALC260:
4297                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4298                         w = hdac_widget_get(devinfo, i);
4299                         if (w == NULL || w->enable == 0)
4300                                 continue;
4301                         if (w->type !=
4302                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4303                                 continue;
4304                         if (w->nid != 5)
4305                                 w->enable = 0;
4306                 }
4307                 if (subvendor == HP_XW4300_SUBVENDOR) {
4308                         ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4309                         if (ctl != NULL && ctl->widget != NULL) {
4310                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4311                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4312                         }
4313                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4314                         if (ctl != NULL && ctl->widget != NULL) {
4315                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4316                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4317                         }
4318                 } else if (subvendor == HP_3010_SUBVENDOR) {
4319                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4320                         if (ctl != NULL && ctl->widget != NULL) {
4321                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4322                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4323                         }
4324                         ctl = hdac_audio_ctl_amp_get(devinfo, 21, 0, 1);
4325                         if (ctl != NULL && ctl->widget != NULL) {
4326                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4327                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4328                         }
4329                 }
4330                 break;
4331         case HDA_CODEC_ALC262:
4332                 if (subvendor == HP_DC7700S_SUBVENDOR) {
4333                         ctl = hdac_audio_ctl_amp_get(devinfo, 21, 0, 1);
4334                         if (ctl != NULL && ctl->widget != NULL) {
4335                                 ctl->ossmask = SOUND_MASK_PHONEOUT;
4336                                 ctl->widget->ctlflags |= SOUND_MASK_PHONEOUT;
4337                         }
4338                         ctl = hdac_audio_ctl_amp_get(devinfo, 22, 0, 1);
4339                         if (ctl != NULL && ctl->widget != NULL) {
4340                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4341                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4342                         }
4343                 } else if (subvendor == HP_DC7700_SUBVENDOR) {
4344                         ctl = hdac_audio_ctl_amp_get(devinfo, 22, 0, 1);
4345                         if (ctl != NULL && ctl->widget != NULL) {
4346                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4347                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4348                         }
4349                         ctl = hdac_audio_ctl_amp_get(devinfo, 27, 0, 1);
4350                         if (ctl != NULL && ctl->widget != NULL) {
4351                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4352                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4353                         }
4354                 }
4355                 break;
4356         case HDA_CODEC_ALC268:
4357                 if (HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subvendor)) {
4358                         w = hdac_widget_get(devinfo, 29);
4359                         if (w != NULL) {
4360                                 w->enable = 1;
4361                                 w->type =
4362                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4363                                 w->param.widget_cap &=
4364                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4365                                 w->param.widget_cap |=
4366                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4367                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4368                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4369                         }
4370                 }
4371                 break;
4372         case HDA_CODEC_ALC861:
4373                 ctl = hdac_audio_ctl_amp_get(devinfo, 21, 2, 1);
4374                 if (ctl != NULL)
4375                         ctl->muted = HDA_AMP_MUTE_ALL;
4376                 break;
4377         case HDA_CODEC_ALC880:
4378                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4379                         w = hdac_widget_get(devinfo, i);
4380                         if (w == NULL || w->enable == 0)
4381                                 continue;
4382                         if (w->type ==
4383                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4384                             w->nid != 9 && w->nid != 29) {
4385                                         w->enable = 0;
4386                         } else if (w->type !=
4387                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET &&
4388                             w->nid == 29) {
4389                                 w->type =
4390                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4391                                 w->param.widget_cap &=
4392                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4393                                 w->param.widget_cap |=
4394                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4395                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4396                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4397                         }
4398                 }
4399                 break;
4400         case HDA_CODEC_ALC883:
4401                 /*
4402                  * nid: 24/25 = External (jack) or Internal (fixed) Mic.
4403                  *              Clear vref cap for jack connectivity.
4404                  */
4405                 w = hdac_widget_get(devinfo, 24);
4406                 if (w != NULL && w->enable != 0 && w->type ==
4407                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4408                     (w->wclass.pin.config &
4409                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4410                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4411                         w->wclass.pin.cap &= ~(
4412                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4413                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4414                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4415                 w = hdac_widget_get(devinfo, 25);
4416                 if (w != NULL && w->enable != 0 && w->type ==
4417                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4418                     (w->wclass.pin.config &
4419                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4420                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4421                         w->wclass.pin.cap &= ~(
4422                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4423                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4424                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4425                 /*
4426                  * nid: 26 = Line-in, leave it alone.
4427                  */
4428                 break;
4429         case HDA_CODEC_AD1981HD:
4430                 w = hdac_widget_get(devinfo, 11);
4431                 if (w != NULL && w->enable != 0 && w->nconns > 3)
4432                         w->selconn = 3;
4433                 if (subvendor == IBM_M52_SUBVENDOR) {
4434                         ctl = hdac_audio_ctl_amp_get(devinfo, 7, 0, 1);
4435                         if (ctl != NULL)
4436                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4437                 }
4438                 break;
4439         case HDA_CODEC_AD1986A:
4440                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4441                         w = hdac_widget_get(devinfo, i);
4442                         if (w == NULL || w->enable == 0)
4443                                 continue;
4444                         if (w->type !=
4445                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4446                                 continue;
4447                         if (w->nid != 3)
4448                                 w->enable = 0;
4449                 }
4450                 if (subvendor == ASUS_M2NPVMX_SUBVENDOR ||
4451                     subvendor == ASUS_A8NVMCSM_SUBVENDOR) {
4452                         /* nid 28 is mic, nid 29 is line-in */
4453                         w = hdac_widget_get(devinfo, 15);
4454                         if (w != NULL)
4455                                 w->selconn = 2;
4456                         w = hdac_widget_get(devinfo, 16);
4457                         if (w != NULL)
4458                                 w->selconn = 1;
4459                 } else if (subvendor == ASUS_A8X_SUBVENDOR) {
4460                         /*
4461                          * This is just plain ridiculous.. There
4462                          * are several A8 series that share the same
4463                          * pci id but works differently (EAPD).
4464                          */
4465                         w = hdac_widget_get(devinfo, 26);
4466                         if (w != NULL && w->type ==
4467                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4468                             (w->wclass.pin.config &
4469                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) !=
4470                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
4471                                 devinfo->function.audio.quirks &=
4472                                     ~HDA_QUIRK_EAPDINV;
4473                 }
4474                 break;
4475         case HDA_CODEC_AD1988:
4476         case HDA_CODEC_AD1988B:
4477                 /*w = hdac_widget_get(devinfo, 12);
4478                 if (w != NULL) {
4479                         w->selconn = 1;
4480                         w->pflags |= HDA_ADC_LOCKED;
4481                 }
4482                 w = hdac_widget_get(devinfo, 13);
4483                 if (w != NULL) {
4484                         w->selconn = 4;
4485                         w->pflags |= HDA_ADC_LOCKED;
4486                 }
4487                 w = hdac_widget_get(devinfo, 14);
4488                 if (w != NULL) {
4489                         w->selconn = 2;
4490                         w->pflags |= HDA_ADC_LOCKED;
4491                 }*/
4492                 ctl = hdac_audio_ctl_amp_get(devinfo, 57, 0, 1);
4493                 if (ctl != NULL) {
4494                         ctl->ossmask = SOUND_MASK_IGAIN;
4495                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4496                 }
4497                 ctl = hdac_audio_ctl_amp_get(devinfo, 58, 0, 1);
4498                 if (ctl != NULL) {
4499                         ctl->ossmask = SOUND_MASK_IGAIN;
4500                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4501                 }
4502                 ctl = hdac_audio_ctl_amp_get(devinfo, 60, 0, 1);
4503                 if (ctl != NULL) {
4504                         ctl->ossmask = SOUND_MASK_IGAIN;
4505                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4506                 }
4507                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 0, 1);
4508                 if (ctl != NULL) {
4509                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4510                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4511                 }
4512                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 4, 1);
4513                 if (ctl != NULL) {
4514                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4515                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4516                 }
4517                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 1, 1);
4518                 if (ctl != NULL) {
4519                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4520                         ctl->widget->ctlflags |= SOUND_MASK_LINE;
4521                 }
4522                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 7, 1);
4523                 if (ctl != NULL) {
4524                         ctl->ossmask = SOUND_MASK_SPEAKER | SOUND_MASK_VOLUME;
4525                         ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4526                 }
4527                 break;
4528         case HDA_CODEC_STAC9205:
4529                 if (subvendor == DELL_V1500_SUBVENDOR) {
4530                         w = hdac_widget_get(devinfo, 29);
4531                         if (w != NULL)
4532                                 w->selconn = 1;
4533                         w = hdac_widget_get(devinfo, 30);
4534                         if (w != NULL)
4535                                 w->selconn = 1;
4536                 }
4537                 break;
4538         case HDA_CODEC_STAC9221:
4539                 /*
4540                  * Dell XPS M1210 need all DACs for each output jacks
4541                  */
4542                 if (subvendor == DELL_XPSM1210_SUBVENDOR)
4543                         break;
4544                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4545                         w = hdac_widget_get(devinfo, i);
4546                         if (w == NULL || w->enable == 0)
4547                                 continue;
4548                         if (w->type !=
4549                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4550                                 continue;
4551                         if (w->nid != 2)
4552                                 w->enable = 0;
4553                 }
4554                 break;
4555         case HDA_CODEC_STAC9221D:
4556                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4557                         w = hdac_widget_get(devinfo, i);
4558                         if (w == NULL || w->enable == 0)
4559                                 continue;
4560                         if (w->type ==
4561                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4562                             w->nid != 6)
4563                                 w->enable = 0;
4564
4565                 }
4566                 break;
4567         case HDA_CODEC_STAC9227:
4568                 w = hdac_widget_get(devinfo, 8);
4569                 if (w != NULL)
4570                         w->enable = 0;
4571                 w = hdac_widget_get(devinfo, 9);
4572                 if (w != NULL)
4573                         w->enable = 0;
4574                 break;
4575         case HDA_CODEC_CXWAIKIKI:
4576                 if (subvendor == HP_DV5000_SUBVENDOR) {
4577                         w = hdac_widget_get(devinfo, 27);
4578                         if (w != NULL)
4579                                 w->enable = 0;
4580                 }
4581                 ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4582                 if (ctl != NULL)
4583                         ctl->ossmask = SOUND_MASK_SKIP;
4584                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 0, 1);
4585                 if (ctl != NULL && ctl->childwidget != NULL &&
4586                     ctl->childwidget->enable != 0) {
4587                         ctl->ossmask = SOUND_MASK_PCM | SOUND_MASK_VOLUME;
4588                         ctl->childwidget->ctlflags |= SOUND_MASK_PCM;
4589                 }
4590                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 1, 1);
4591                 if (ctl != NULL && ctl->childwidget != NULL &&
4592                     ctl->childwidget->enable != 0) {
4593                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4594                         ctl->childwidget->ctlflags |= SOUND_MASK_LINE;
4595                 }
4596                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 2, 1);
4597                 if (ctl != NULL && ctl->childwidget != NULL &&
4598                     ctl->childwidget->enable != 0) {
4599                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4600                         ctl->childwidget->ctlflags |= SOUND_MASK_MIC;
4601                 }
4602                 ctl = hdac_audio_ctl_amp_get(devinfo, 26, 0, 1);
4603                 if (ctl != NULL) {
4604                         ctl->ossmask = SOUND_MASK_SKIP;
4605                         /* XXX mixer \=rec mic broken.. why?!? */
4606                         /* ctl->widget->ctlflags |= SOUND_MASK_MIC; */
4607                 }
4608                 break;
4609         default:
4610                 break;
4611         }
4612 }
4613
4614 static int
4615 hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *devinfo)
4616 {
4617         int *dev = &devinfo->function.audio.ossidx;
4618
4619         while (*dev < SOUND_MIXER_NRDEVICES) {
4620                 switch (*dev) {
4621                 case SOUND_MIXER_VOLUME:
4622                 case SOUND_MIXER_BASS:
4623                 case SOUND_MIXER_TREBLE:
4624                 case SOUND_MIXER_PCM:
4625                 case SOUND_MIXER_SPEAKER:
4626                 case SOUND_MIXER_LINE:
4627                 case SOUND_MIXER_MIC:
4628                 case SOUND_MIXER_CD:
4629                 case SOUND_MIXER_RECLEV:
4630                 case SOUND_MIXER_IGAIN:
4631                 case SOUND_MIXER_OGAIN: /* reserved for EAPD switch */
4632                         (*dev)++;
4633                         break;
4634                 default:
4635                         return (*dev)++;
4636                         break;
4637                 }
4638         }
4639
4640         return (-1);
4641 }
4642
4643 static int
4644 hdac_widget_find_dac_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4645 {
4646         struct hdac_widget *w;
4647         int i, ret = 0;
4648
4649         if (depth > HDA_PARSE_MAXDEPTH)
4650                 return (0);
4651         w = hdac_widget_get(devinfo, nid);
4652         if (w == NULL || w->enable == 0)
4653                 return (0);
4654         switch (w->type) {
4655         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4656                 w->pflags |= HDA_DAC_PATH;
4657                 ret = 1;
4658                 break;
4659         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4660         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4661                 for (i = 0; i < w->nconns; i++) {
4662                         if (hdac_widget_find_dac_path(devinfo,
4663                             w->conns[i], depth + 1) != 0) {
4664                                 if (w->selconn == -1)
4665                                         w->selconn = i;
4666                                 ret = 1;
4667                                 w->pflags |= HDA_DAC_PATH;
4668                         }
4669                 }
4670                 break;
4671         default:
4672                 break;
4673         }
4674         return (ret);
4675 }
4676
4677 static int
4678 hdac_widget_find_adc_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4679 {
4680         struct hdac_widget *w;
4681         int i, conndev, ret = 0;
4682
4683         if (depth > HDA_PARSE_MAXDEPTH)
4684                 return (0);
4685         w = hdac_widget_get(devinfo, nid);
4686         if (w == NULL || w->enable == 0)
4687                 return (0);
4688         switch (w->type) {
4689         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4690         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4691         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4692                 for (i = 0; i < w->nconns; i++) {
4693                         if (hdac_widget_find_adc_path(devinfo, w->conns[i],
4694                             depth + 1) != 0) {
4695                                 if (w->selconn == -1)
4696                                         w->selconn = i;
4697                                 w->pflags |= HDA_ADC_PATH;
4698                                 ret = 1;
4699                         }
4700                 }
4701                 break;
4702         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4703                 conndev = w->wclass.pin.config &
4704                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4705                 if (HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4706                     (conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_CD ||
4707                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN ||
4708                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN)) {
4709                         w->pflags |= HDA_ADC_PATH;
4710                         ret = 1;
4711                 }
4712                 break;
4713         /*case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4714                 if (w->pflags & HDA_DAC_PATH) {
4715                         w->pflags |= HDA_ADC_PATH;
4716                         ret = 1;
4717                 }
4718                 break;*/
4719         default:
4720                 break;
4721         }
4722         return (ret);
4723 }
4724
4725 static uint32_t
4726 hdac_audio_ctl_outamp_build(struct hdac_devinfo *devinfo,
4727                                 nid_t nid, nid_t pnid, int index, int depth)
4728 {
4729         struct hdac_widget *w, *pw;
4730         struct hdac_audio_ctl *ctl;
4731         uint32_t fl = 0;
4732         int i, ossdev, conndev, strategy;
4733
4734         if (depth > HDA_PARSE_MAXDEPTH)
4735                 return (0);
4736
4737         w = hdac_widget_get(devinfo, nid);
4738         if (w == NULL || w->enable == 0)
4739                 return (0);
4740
4741         pw = hdac_widget_get(devinfo, pnid);
4742         strategy = devinfo->function.audio.parsing_strategy;
4743
4744         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER
4745             || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) {
4746                 for (i = 0; i < w->nconns; i++) {
4747                         fl |= hdac_audio_ctl_outamp_build(devinfo, w->conns[i],
4748                             w->nid, i, depth + 1);
4749                 }
4750                 w->ctlflags |= fl;
4751                 return (fl);
4752         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
4753             (w->pflags & HDA_DAC_PATH)) {
4754                 i = 0;
4755                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4756                         if (ctl->enable == 0 || ctl->widget == NULL)
4757                                 continue;
4758                         /* XXX This should be compressed! */
4759                         if (((ctl->widget->nid == w->nid) ||
4760                             (ctl->widget->nid == pnid && ctl->index == index &&
4761                             (ctl->dir & HDA_CTL_IN)) ||
4762                             (ctl->widget->nid == pnid && pw != NULL &&
4763                             pw->type ==
4764                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4765                             (pw->nconns < 2 || pw->selconn == index ||
4766                             pw->selconn == -1) &&
4767                             (ctl->dir & HDA_CTL_OUT)) ||
4768                             (strategy == HDA_PARSE_DIRECT &&
4769                             ctl->widget->nid == w->nid)) &&
4770                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4771                                 /*if (pw != NULL && pw->selconn == -1)
4772                                         pw->selconn = index;
4773                                 fl |= SOUND_MASK_VOLUME;
4774                                 fl |= SOUND_MASK_PCM;
4775                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4776                                 ctl->ossmask |= SOUND_MASK_PCM;
4777                                 ctl->ossdev = SOUND_MIXER_PCM;*/
4778                                 if (!(w->ctlflags & SOUND_MASK_PCM) ||
4779                                     (pw != NULL &&
4780                                     !(pw->ctlflags & SOUND_MASK_PCM))) {
4781                                         fl |= SOUND_MASK_VOLUME;
4782                                         fl |= SOUND_MASK_PCM;
4783                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4784                                         ctl->ossmask |= SOUND_MASK_PCM;
4785                                         ctl->ossdev = SOUND_MIXER_PCM;
4786                                         w->ctlflags |= SOUND_MASK_VOLUME;
4787                                         w->ctlflags |= SOUND_MASK_PCM;
4788                                         if (pw != NULL) {
4789                                                 if (pw->selconn == -1)
4790                                                         pw->selconn = index;
4791                                                 pw->ctlflags |=
4792                                                     SOUND_MASK_VOLUME;
4793                                                 pw->ctlflags |=
4794                                                     SOUND_MASK_PCM;
4795                                         }
4796                                 }
4797                         }
4798                 }
4799                 w->ctlflags |= fl;
4800                 return (fl);
4801         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4802             HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4803             (w->pflags & HDA_ADC_PATH)) {
4804                 conndev = w->wclass.pin.config &
4805                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4806                 i = 0;
4807                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4808                         if (ctl->enable == 0 || ctl->widget == NULL)
4809                                 continue;
4810                         /* XXX This should be compressed! */
4811                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4812                             (ctl->dir & HDA_CTL_IN)) ||
4813                             (ctl->widget->nid == pnid && pw != NULL &&
4814                             pw->type ==
4815                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4816                             (pw->nconns < 2 || pw->selconn == index ||
4817                             pw->selconn == -1) &&
4818                             (ctl->dir & HDA_CTL_OUT)) ||
4819                             (strategy == HDA_PARSE_DIRECT &&
4820                             ctl->widget->nid == w->nid)) &&
4821                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4822                                 if (pw != NULL && pw->selconn == -1)
4823                                         pw->selconn = index;
4824                                 ossdev = 0;
4825                                 switch (conndev) {
4826                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
4827                                         ossdev = SOUND_MIXER_MIC;
4828                                         break;
4829                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
4830                                         ossdev = SOUND_MIXER_LINE;
4831                                         break;
4832                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
4833                                         ossdev = SOUND_MIXER_CD;
4834                                         break;
4835                                 default:
4836                                         ossdev =
4837                                             hdac_audio_ctl_ossmixer_getnextdev(
4838                                             devinfo);
4839                                         if (ossdev < 0)
4840                                                 ossdev = 0;
4841                                         break;
4842                                 }
4843                                 if (strategy == HDA_PARSE_MIXER) {
4844                                         fl |= SOUND_MASK_VOLUME;
4845                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4846                                 }
4847                                 fl |= 1 << ossdev;
4848                                 ctl->ossmask |= 1 << ossdev;
4849                                 ctl->ossdev = ossdev;
4850                         }
4851                 }
4852                 w->ctlflags |= fl;
4853                 return (fl);
4854         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
4855                 i = 0;
4856                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4857                         if (ctl->enable == 0 || ctl->widget == NULL)
4858                                 continue;
4859                         /* XXX This should be compressed! */
4860                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4861                             (ctl->dir & HDA_CTL_IN)) ||
4862                             (ctl->widget->nid == pnid && pw != NULL &&
4863                             pw->type ==
4864                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4865                             (pw->nconns < 2 || pw->selconn == index ||
4866                             pw->selconn == -1) &&
4867                             (ctl->dir & HDA_CTL_OUT)) ||
4868                             (strategy == HDA_PARSE_DIRECT &&
4869                             ctl->widget->nid == w->nid)) &&
4870                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4871                                 if (pw != NULL && pw->selconn == -1)
4872                                         pw->selconn = index;
4873                                 fl |= SOUND_MASK_VOLUME;
4874                                 fl |= SOUND_MASK_SPEAKER;
4875                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4876                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
4877                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
4878                         }
4879                 }
4880                 w->ctlflags |= fl;
4881                 return (fl);
4882         }
4883         return (0);
4884 }
4885
4886 static uint32_t
4887 hdac_audio_ctl_inamp_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4888 {
4889         struct hdac_widget *w, *cw;
4890         struct hdac_audio_ctl *ctl;
4891         uint32_t fl;
4892         int i;
4893
4894         if (depth > HDA_PARSE_MAXDEPTH)
4895                 return (0);
4896
4897         w = hdac_widget_get(devinfo, nid);
4898         if (w == NULL || w->enable == 0)
4899                 return (0);
4900         /*if (!(w->pflags & HDA_ADC_PATH))
4901                 return (0);
4902         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4903             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4904                 return (0);*/
4905         i = 0;
4906         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4907                 if (ctl->enable == 0 || ctl->widget == NULL)
4908                         continue;
4909                 if (ctl->widget->nid == nid) {
4910                         ctl->ossmask |= SOUND_MASK_RECLEV;
4911                         w->ctlflags |= SOUND_MASK_RECLEV;
4912                         return (SOUND_MASK_RECLEV);
4913                 }
4914         }
4915         for (i = 0; i < w->nconns; i++) {
4916                 cw = hdac_widget_get(devinfo, w->conns[i]);
4917                 if (cw == NULL || cw->enable == 0)
4918                         continue;
4919                 if (cw->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
4920                         continue;
4921                 fl = hdac_audio_ctl_inamp_build(devinfo, cw->nid, depth + 1);
4922                 if (fl != 0) {
4923                         cw->ctlflags |= fl;
4924                         w->ctlflags |= fl;
4925                         return (fl);
4926                 }
4927         }
4928         return (0);
4929 }
4930
4931 static int
4932 hdac_audio_ctl_recsel_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4933 {
4934         struct hdac_widget *w, *cw;
4935         int i, child = 0;
4936
4937         if (depth > HDA_PARSE_MAXDEPTH)
4938                 return (0);
4939
4940         w = hdac_widget_get(devinfo, nid);
4941         if (w == NULL || w->enable == 0)
4942                 return (0);
4943         /*if (!(w->pflags & HDA_ADC_PATH))
4944                 return (0);
4945         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4946             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4947                 return (0);*/
4948         /* XXX weak! */
4949         for (i = 0; i < w->nconns; i++) {
4950                 cw = hdac_widget_get(devinfo, w->conns[i]);
4951                 if (cw == NULL)
4952                         continue;
4953                 if (++child > 1) {
4954                         w->pflags |= HDA_ADC_RECSEL;
4955                         return (1);
4956                 }
4957         }
4958         for (i = 0; i < w->nconns; i++) {
4959                 if (hdac_audio_ctl_recsel_build(devinfo,
4960                     w->conns[i], depth + 1) != 0)
4961                         return (1);
4962         }
4963         return (0);
4964 }
4965
4966 static int
4967 hdac_audio_build_tree_strategy(struct hdac_devinfo *devinfo)
4968 {
4969         struct hdac_widget *w, *cw;
4970         int i, j, conndev, found_dac = 0;
4971         int strategy;
4972
4973         strategy = devinfo->function.audio.parsing_strategy;
4974
4975         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4976                 w = hdac_widget_get(devinfo, i);
4977                 if (w == NULL || w->enable == 0)
4978                         continue;
4979                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4980                         continue;
4981                 if (!HDA_PARAM_PIN_CAP_OUTPUT_CAP(w->wclass.pin.cap))
4982                         continue;
4983                 conndev = w->wclass.pin.config &
4984                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4985                 if (!(conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4986                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4987                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT))
4988                         continue;
4989                 for (j = 0; j < w->nconns; j++) {
4990                         cw = hdac_widget_get(devinfo, w->conns[j]);
4991                         if (cw == NULL || cw->enable == 0)
4992                                 continue;
4993                         if (strategy == HDA_PARSE_MIXER && !(cw->type ==
4994                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
4995                             cw->type ==
4996                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4997                                 continue;
4998                         if (hdac_widget_find_dac_path(devinfo, cw->nid, 0)
4999                             != 0) {
5000                                 if (w->selconn == -1)
5001                                         w->selconn = j;
5002                                 w->pflags |= HDA_DAC_PATH;
5003                                 found_dac++;
5004                         }
5005                 }
5006         }
5007
5008         return (found_dac);
5009 }
5010
5011 static void
5012 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
5013 {
5014         struct hdac_widget *w;
5015         struct hdac_audio_ctl *ctl;
5016         int i, j, dacs, strategy;
5017
5018         /* Construct DAC path */
5019         strategy = HDA_PARSE_MIXER;
5020         devinfo->function.audio.parsing_strategy = strategy;
5021         HDA_BOOTVERBOSE(
5022                 device_printf(devinfo->codec->sc->dev,
5023                     "HDA_DEBUG: HWiP: HDA Widget Parser - Revision %d\n",
5024                     HDA_WIDGET_PARSER_REV);
5025         );
5026         dacs = hdac_audio_build_tree_strategy(devinfo);
5027         if (dacs == 0) {
5028                 HDA_BOOTVERBOSE(
5029                         device_printf(devinfo->codec->sc->dev,
5030                             "HDA_DEBUG: HWiP: 0 DAC path found! "
5031                             "Retrying parser "
5032                             "using HDA_PARSE_DIRECT strategy.\n");
5033                 );
5034                 strategy = HDA_PARSE_DIRECT;
5035                 devinfo->function.audio.parsing_strategy = strategy;
5036                 dacs = hdac_audio_build_tree_strategy(devinfo);
5037         }
5038
5039         HDA_BOOTVERBOSE(
5040                 device_printf(devinfo->codec->sc->dev,
5041                     "HDA_DEBUG: HWiP: Found %d DAC path using HDA_PARSE_%s "
5042                     "strategy.\n",
5043                     dacs, (strategy == HDA_PARSE_MIXER) ? "MIXER" : "DIRECT");
5044         );
5045
5046         /* Construct ADC path */
5047         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5048                 w = hdac_widget_get(devinfo, i);
5049                 if (w == NULL || w->enable == 0)
5050                         continue;
5051                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
5052                         continue;
5053                 (void)hdac_widget_find_adc_path(devinfo, w->nid, 0);
5054         }
5055
5056         /* Output mixers */
5057         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5058                 w = hdac_widget_get(devinfo, i);
5059                 if (w == NULL || w->enable == 0)
5060                         continue;
5061                 if ((strategy == HDA_PARSE_MIXER &&
5062                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
5063                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
5064                     && (w->pflags & HDA_DAC_PATH)) ||
5065                     (strategy == HDA_PARSE_DIRECT && (w->pflags &
5066                     (HDA_DAC_PATH | HDA_ADC_PATH)))) {
5067                         w->ctlflags |= hdac_audio_ctl_outamp_build(devinfo,
5068                             w->nid, devinfo->startnode - 1, 0, 0);
5069                 } else if (w->type ==
5070                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
5071                         j = 0;
5072                         while ((ctl = hdac_audio_ctl_each(devinfo, &j)) !=
5073                             NULL) {
5074                                 if (ctl->enable == 0 || ctl->widget == NULL)
5075                                         continue;
5076                                 if (ctl->widget->nid != w->nid)
5077                                         continue;
5078                                 ctl->ossmask |= SOUND_MASK_VOLUME;
5079                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
5080                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
5081                                 w->ctlflags |= SOUND_MASK_VOLUME;
5082                                 w->ctlflags |= SOUND_MASK_SPEAKER;
5083                         }
5084                 }
5085         }
5086
5087         /* Input mixers (rec) */
5088         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5089                 w = hdac_widget_get(devinfo, i);
5090                 if (w == NULL || w->enable == 0)
5091                         continue;
5092                 if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
5093                     w->pflags & HDA_ADC_PATH))
5094                         continue;
5095                 hdac_audio_ctl_inamp_build(devinfo, w->nid, 0);
5096                 hdac_audio_ctl_recsel_build(devinfo, w->nid, 0);
5097         }
5098 }
5099
5100 #define HDA_COMMIT_CONN (1 << 0)
5101 #define HDA_COMMIT_CTRL (1 << 1)
5102 #define HDA_COMMIT_EAPD (1 << 2)
5103 #define HDA_COMMIT_GPIO (1 << 3)
5104 #define HDA_COMMIT_MISC (1 << 4)
5105 #define HDA_COMMIT_ALL  (HDA_COMMIT_CONN | HDA_COMMIT_CTRL | \
5106                         HDA_COMMIT_EAPD | HDA_COMMIT_GPIO | HDA_COMMIT_MISC)
5107
5108 static void
5109 hdac_audio_commit(struct hdac_devinfo *devinfo, uint32_t cfl)
5110 {
5111         struct hdac_softc *sc = devinfo->codec->sc;
5112         struct hdac_widget *w;
5113         nid_t cad;
5114         int i;
5115
5116         if (!(cfl & HDA_COMMIT_ALL))
5117                 return;
5118
5119         cad = devinfo->codec->cad;
5120
5121         if ((cfl & HDA_COMMIT_MISC)) {
5122                 if (sc->pci_subvendor == APPLE_INTEL_MAC)
5123                         hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
5124                             0x7e7, 0), cad);
5125         }
5126
5127         if (cfl & HDA_COMMIT_GPIO) {
5128                 uint32_t gdata, gmask, gdir;
5129                 int commitgpio, numgpio;
5130
5131                 gdata = 0;
5132                 gmask = 0;
5133                 gdir = 0;
5134                 commitgpio = 0;
5135
5136                 numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
5137                     devinfo->function.audio.gpio);
5138
5139                 if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
5140                         commitgpio = (numgpio > 0) ? 1 : 0;
5141                 else {
5142                         for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
5143                                 if (!(devinfo->function.audio.quirks &
5144                                     (1 << i)))
5145                                         continue;
5146                                 if (commitgpio == 0) {
5147                                         commitgpio = 1;
5148                                         HDA_BOOTVERBOSE(
5149                                                 gdata = hdac_command(sc,
5150                                                     HDA_CMD_GET_GPIO_DATA(cad,
5151                                                     devinfo->nid), cad);
5152                                                 gmask = hdac_command(sc,
5153                                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
5154                                                     devinfo->nid), cad);
5155                                                 gdir = hdac_command(sc,
5156                                                     HDA_CMD_GET_GPIO_DIRECTION(cad,
5157                                                     devinfo->nid), cad);
5158                                                 device_printf(sc->dev,
5159                                                     "GPIO init: data=0x%08x "
5160                                                     "mask=0x%08x dir=0x%08x\n",
5161                                                     gdata, gmask, gdir);
5162                                                 gdata = 0;
5163                                                 gmask = 0;
5164                                                 gdir = 0;
5165                                         );
5166                                 }
5167                                 gdata |= 1 << i;
5168                                 gmask |= 1 << i;
5169                                 gdir |= 1 << i;
5170                         }
5171                 }
5172
5173                 if (commitgpio != 0) {
5174                         HDA_BOOTVERBOSE(
5175                                 device_printf(sc->dev,
5176                                     "GPIO commit: data=0x%08x mask=0x%08x "
5177                                     "dir=0x%08x\n",
5178                                     gdata, gmask, gdir);
5179                         );
5180                         hdac_command(sc,
5181                             HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
5182                             gmask), cad);
5183                         hdac_command(sc,
5184                             HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
5185                             gdir), cad);
5186                         hdac_command(sc,
5187                             HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
5188                             gdata), cad);
5189                 }
5190         }
5191
5192         for (i = 0; i < devinfo->nodecnt; i++) {
5193                 w = &devinfo->widget[i];
5194                 if (w == NULL || w->enable == 0)
5195                         continue;
5196                 if (cfl & HDA_COMMIT_CONN) {
5197                         if (w->selconn == -1)
5198                                 w->selconn = 0;
5199                         if (w->nconns > 0)
5200                                 hdac_widget_connection_select(w, w->selconn);
5201                 }
5202                 if ((cfl & HDA_COMMIT_CTRL) &&
5203                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5204                         uint32_t pincap;
5205
5206                         pincap = w->wclass.pin.cap;
5207
5208                         if ((w->pflags & (HDA_DAC_PATH | HDA_ADC_PATH)) ==
5209                             (HDA_DAC_PATH | HDA_ADC_PATH))
5210                                 device_printf(sc->dev, "WARNING: node %d "
5211                                     "participate both for DAC/ADC!\n", w->nid);
5212                         if (w->pflags & HDA_DAC_PATH) {
5213                                 w->wclass.pin.ctrl &=
5214                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
5215                                 if ((w->wclass.pin.config &
5216                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) !=
5217                                     HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
5218                                         w->wclass.pin.ctrl &=
5219                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
5220                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
5221                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5222                                         w->wclass.pin.ctrl |=
5223                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5224                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5225                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
5226                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5227                                         w->wclass.pin.ctrl |=
5228                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5229                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5230                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
5231                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5232                                         w->wclass.pin.ctrl |=
5233                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5234                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5235                         } else if (w->pflags & HDA_ADC_PATH) {
5236                                 w->wclass.pin.ctrl &=
5237                                     ~(HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5238                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE);
5239                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
5240                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5241                                         w->wclass.pin.ctrl |=
5242                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5243                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5244                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
5245                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5246                                         w->wclass.pin.ctrl |=
5247                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5248                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5249                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
5250                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5251                                         w->wclass.pin.ctrl |=
5252                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5253                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5254                         } else
5255                                 w->wclass.pin.ctrl &= ~(
5256                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
5257                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5258                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
5259                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
5260                         hdac_command(sc,
5261                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
5262                             w->wclass.pin.ctrl), cad);
5263                 }
5264                 if ((cfl & HDA_COMMIT_EAPD) &&
5265                     w->param.eapdbtl != HDAC_INVALID) {
5266                         uint32_t val;
5267
5268                         val = w->param.eapdbtl;
5269                         if (devinfo->function.audio.quirks &
5270                             HDA_QUIRK_EAPDINV)
5271                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
5272                         hdac_command(sc,
5273                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
5274                             val), cad);
5275
5276                 }
5277                 DELAY(1000);
5278         }
5279 }
5280
5281 static void
5282 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
5283 {
5284         struct hdac_softc *sc = devinfo->codec->sc;
5285         struct hdac_audio_ctl *ctl;
5286         int i;
5287
5288         devinfo->function.audio.mvol = 100 | (100 << 8);
5289         i = 0;
5290         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5291                 if (ctl->enable == 0 || ctl->widget == NULL) {
5292                         HDA_BOOTVERBOSE(
5293                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5294                                     i, (ctl->widget != NULL) ?
5295                                     ctl->widget->nid : -1);
5296                                 if (ctl->childwidget != NULL)
5297                                         printf(" childnid=%d",
5298                                             ctl->childwidget->nid);
5299                                 if (ctl->widget == NULL)
5300                                         printf(" NULL WIDGET!");
5301                                 printf(" DISABLED\n");
5302                         );
5303                         continue;
5304                 }
5305                 HDA_BOOTVERBOSE(
5306                         if (ctl->ossmask == 0) {
5307                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5308                                     i, ctl->widget->nid);
5309                                 if (ctl->childwidget != NULL)
5310                                         printf(" childnid=%d",
5311                                         ctl->childwidget->nid);
5312                                 printf(" Bind to NONE\n");
5313                         }
5314                 );
5315                 if (ctl->step > 0) {
5316                         ctl->ossval = (ctl->left * 100) / ctl->step;
5317                         ctl->ossval |= ((ctl->right * 100) / ctl->step) << 8;
5318                 } else
5319                         ctl->ossval = 0;
5320                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
5321                     ctl->left, ctl->right);
5322         }
5323 }
5324
5325 static int
5326 hdac_pcmchannel_setup(struct hdac_devinfo *devinfo, int dir)
5327 {
5328         struct hdac_chan *ch;
5329         struct hdac_widget *w;
5330         uint32_t cap, fmtcap, pcmcap, path;
5331         int i, type, ret, max;
5332
5333         if (dir == PCMDIR_PLAY) {
5334                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT;
5335                 ch = &devinfo->codec->sc->play;
5336                 path = HDA_DAC_PATH;
5337         } else {
5338                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT;
5339                 ch = &devinfo->codec->sc->rec;
5340                 path = HDA_ADC_PATH;
5341         }
5342
5343         ch->caps = hdac_caps;
5344         ch->caps.fmtlist = ch->fmtlist;
5345         ch->bit16 = 1;
5346         ch->bit32 = 0;
5347         ch->pcmrates[0] = 48000;
5348         ch->pcmrates[1] = 0;
5349
5350         ret = 0;
5351         fmtcap = devinfo->function.audio.supp_stream_formats;
5352         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
5353         max = (sizeof(ch->io) / sizeof(ch->io[0])) - 1;
5354
5355         for (i = devinfo->startnode; i < devinfo->endnode && ret < max; i++) {
5356                 w = hdac_widget_get(devinfo, i);
5357                 if (w == NULL || w->enable == 0 || w->type != type ||
5358                     !(w->pflags & path))
5359                         continue;
5360                 cap = w->param.widget_cap;
5361                 /*if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(cap))
5362                         continue;*/
5363                 if (!HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(cap))
5364                         continue;
5365                 cap = w->param.supp_stream_formats;
5366                 /*if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap)) {
5367                 }
5368                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap)) {
5369                 }*/
5370                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5371                         continue;
5372                 if (ret == 0) {
5373                         fmtcap = w->param.supp_stream_formats;
5374                         pcmcap = w->param.supp_pcm_size_rate;
5375                 } else {
5376                         fmtcap &= w->param.supp_stream_formats;
5377                         pcmcap &= w->param.supp_pcm_size_rate;
5378                 }
5379                 ch->io[ret++] = i;
5380         }
5381         ch->io[ret] = -1;
5382
5383         ch->supp_stream_formats = fmtcap;
5384         ch->supp_pcm_size_rate = pcmcap;
5385
5386         /*
5387          *  8bit = 0
5388          * 16bit = 1
5389          * 20bit = 2
5390          * 24bit = 3
5391          * 32bit = 4
5392          */
5393         if (ret > 0) {
5394                 cap = pcmcap;
5395                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5396                         ch->bit16 = 1;
5397                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5398                         ch->bit16 = 0;
5399                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5400                         ch->bit32 = 4;
5401                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5402                         ch->bit32 = 3;
5403                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5404                         ch->bit32 = 2;
5405                 i = 0;
5406                 if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO))
5407                         ch->fmtlist[i++] = AFMT_S16_LE;
5408                 ch->fmtlist[i++] = AFMT_S16_LE | AFMT_STEREO;
5409                 if (ch->bit32 > 0) {
5410                         if (!(devinfo->function.audio.quirks &
5411                             HDA_QUIRK_FORCESTEREO))
5412                                 ch->fmtlist[i++] = AFMT_S32_LE;
5413                         ch->fmtlist[i++] = AFMT_S32_LE | AFMT_STEREO;
5414                 }
5415                 ch->fmtlist[i] = 0;
5416                 i = 0;
5417                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5418                         ch->pcmrates[i++] = 8000;
5419                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5420                         ch->pcmrates[i++] = 11025;
5421                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5422                         ch->pcmrates[i++] = 16000;
5423                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5424                         ch->pcmrates[i++] = 22050;
5425                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5426                         ch->pcmrates[i++] = 32000;
5427                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5428                         ch->pcmrates[i++] = 44100;
5429                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(cap)) */
5430                 ch->pcmrates[i++] = 48000;
5431                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5432                         ch->pcmrates[i++] = 88200;
5433                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5434                         ch->pcmrates[i++] = 96000;
5435                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5436                         ch->pcmrates[i++] = 176400;
5437                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5438                         ch->pcmrates[i++] = 192000;
5439                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(cap)) */
5440                 ch->pcmrates[i] = 0;
5441                 if (i > 0) {
5442                         ch->caps.minspeed = ch->pcmrates[0];
5443                         ch->caps.maxspeed = ch->pcmrates[i - 1];
5444                 }
5445         }
5446
5447         return (ret);
5448 }
5449
5450 static void
5451 hdac_dump_ctls(struct hdac_devinfo *devinfo, const char *banner, uint32_t flag)
5452 {
5453         struct hdac_audio_ctl *ctl;
5454         struct hdac_softc *sc = devinfo->codec->sc;
5455         int i;
5456         uint32_t fl = 0;
5457
5458
5459         if (flag == 0) {
5460                 fl = SOUND_MASK_VOLUME | SOUND_MASK_PCM |
5461                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
5462                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_OGAIN;
5463         }
5464
5465         i = 0;
5466         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5467                 if (ctl->enable == 0 || ctl->widget == NULL ||
5468                     ctl->widget->enable == 0 || (ctl->ossmask &
5469                     (SOUND_MASK_SKIP | SOUND_MASK_DISABLE)))
5470                         continue;
5471                 if ((flag == 0 && (ctl->ossmask & ~fl)) ||
5472                     (flag != 0 && (ctl->ossmask & flag))) {
5473                         if (banner != NULL) {
5474                                 device_printf(sc->dev, "\n");
5475                                 device_printf(sc->dev, "%s\n", banner);
5476                         }
5477                         goto hdac_ctl_dump_it_all;
5478                 }
5479         }
5480
5481         return;
5482
5483 hdac_ctl_dump_it_all:
5484         i = 0;
5485         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5486                 if (ctl->enable == 0 || ctl->widget == NULL ||
5487                     ctl->widget->enable == 0)
5488                         continue;
5489                 if (!((flag == 0 && (ctl->ossmask & ~fl)) ||
5490                     (flag != 0 && (ctl->ossmask & flag))))
5491                         continue;
5492                 if (flag == 0) {
5493                         device_printf(sc->dev, "\n");
5494                         device_printf(sc->dev, "Unknown Ctl (OSS: %s)\n",
5495                             hdac_audio_ctl_ossmixer_mask2name(ctl->ossmask));
5496                 }
5497                 device_printf(sc->dev, "   |\n");
5498                 device_printf(sc->dev, "   +-  nid: %2d index: %2d ",
5499                     ctl->widget->nid, ctl->index);
5500                 if (ctl->childwidget != NULL)
5501                         printf("(nid: %2d) ", ctl->childwidget->nid);
5502                 else
5503                         printf("          ");
5504                 printf("mute: %d step: %3d size: %3d off: %3d dir=0x%x ossmask=0x%08x\n",
5505                     ctl->mute, ctl->step, ctl->size, ctl->offset, ctl->dir,
5506                     ctl->ossmask);
5507         }
5508 }
5509
5510 static void
5511 hdac_dump_audio_formats(struct hdac_softc *sc, uint32_t fcap, uint32_t pcmcap)
5512 {
5513         uint32_t cap;
5514
5515         cap = fcap;
5516         if (cap != 0) {
5517                 device_printf(sc->dev, "     Stream cap: 0x%08x\n", cap);
5518                 device_printf(sc->dev, "         Format:");
5519                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
5520                         printf(" AC3");
5521                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
5522                         printf(" FLOAT32");
5523                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5524                         printf(" PCM");
5525                 printf("\n");
5526         }
5527         cap = pcmcap;
5528         if (cap != 0) {
5529                 device_printf(sc->dev, "        PCM cap: 0x%08x\n", cap);
5530                 device_printf(sc->dev, "       PCM size:");
5531                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5532                         printf(" 8");
5533                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5534                         printf(" 16");
5535                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5536                         printf(" 20");
5537                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5538                         printf(" 24");
5539                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5540                         printf(" 32");
5541                 printf("\n");
5542                 device_printf(sc->dev, "       PCM rate:");
5543                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5544                         printf(" 8");
5545                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5546                         printf(" 11");
5547                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5548                         printf(" 16");
5549                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5550                         printf(" 22");
5551                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5552                         printf(" 32");
5553                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5554                         printf(" 44");
5555                 printf(" 48");
5556                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5557                         printf(" 88");
5558                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5559                         printf(" 96");
5560                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5561                         printf(" 176");
5562                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5563                         printf(" 192");
5564                 printf("\n");
5565         }
5566 }
5567
5568 static void
5569 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
5570 {
5571         uint32_t pincap, wcap;
5572
5573         pincap = w->wclass.pin.cap;
5574         wcap = w->param.widget_cap;
5575
5576         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
5577         device_printf(sc->dev, "                ");
5578         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
5579                 printf(" ISC");
5580         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
5581                 printf(" TRQD");
5582         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
5583                 printf(" PDC");
5584         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
5585                 printf(" HP");
5586         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
5587                 printf(" OUT");
5588         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
5589                 printf(" IN");
5590         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
5591                 printf(" BAL");
5592         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
5593                 printf(" VREF[");
5594                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5595                         printf(" 50");
5596                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5597                         printf(" 80");
5598                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5599                         printf(" 100");
5600                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
5601                         printf(" GROUND");
5602                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
5603                         printf(" HIZ");
5604                 printf(" ]");
5605         }
5606         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
5607                 printf(" EAPD");
5608         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(wcap))
5609                 printf(" : UNSOL");
5610         printf("\n");
5611         device_printf(sc->dev, "     Pin config: 0x%08x\n",
5612             w->wclass.pin.config);
5613         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
5614         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
5615                 printf(" HP");
5616         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
5617                 printf(" IN");
5618         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
5619                 printf(" OUT");
5620         printf("\n");
5621 }
5622
5623 static void
5624 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
5625 {
5626         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
5627         device_printf(sc->dev, "                 "
5628             "mute=%d step=%d size=%d offset=%d\n",
5629             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
5630             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
5631             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
5632             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
5633 }
5634
5635 static void
5636 hdac_dump_nodes(struct hdac_devinfo *devinfo)
5637 {
5638         struct hdac_softc *sc = devinfo->codec->sc;
5639         struct hdac_widget *w, *cw;
5640         int i, j;
5641
5642         device_printf(sc->dev, "\n");
5643         device_printf(sc->dev, "Default Parameter\n");
5644         device_printf(sc->dev, "-----------------\n");
5645         hdac_dump_audio_formats(sc,
5646             devinfo->function.audio.supp_stream_formats,
5647             devinfo->function.audio.supp_pcm_size_rate);
5648         device_printf(sc->dev, "         IN amp: 0x%08x\n",
5649             devinfo->function.audio.inamp_cap);
5650         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
5651             devinfo->function.audio.outamp_cap);
5652         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5653                 w = hdac_widget_get(devinfo, i);
5654                 if (w == NULL) {
5655                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
5656                         continue;
5657                 }
5658                 device_printf(sc->dev, "\n");
5659                 device_printf(sc->dev, "            nid: %d [%s]%s\n", w->nid,
5660                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap) ?
5661                     "DIGITAL" : "ANALOG",
5662                     (w->enable == 0) ? " [DISABLED]" : "");
5663                 device_printf(sc->dev, "           name: %s\n", w->name);
5664                 device_printf(sc->dev, "     widget_cap: 0x%08x\n",
5665                     w->param.widget_cap);
5666                 device_printf(sc->dev, "    Parse flags: 0x%08x\n",
5667                     w->pflags);
5668                 device_printf(sc->dev, "      Ctl flags: 0x%08x\n",
5669                     w->ctlflags);
5670                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
5671                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
5672                         hdac_dump_audio_formats(sc,
5673                             w->param.supp_stream_formats,
5674                             w->param.supp_pcm_size_rate);
5675                 } else if (w->type ==
5676                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5677                         hdac_dump_pin(sc, w);
5678                 if (w->param.eapdbtl != HDAC_INVALID)
5679                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
5680                             w->param.eapdbtl);
5681                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
5682                     w->param.outamp_cap != 0)
5683                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
5684                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
5685                     w->param.inamp_cap != 0)
5686                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
5687                 device_printf(sc->dev, "    connections: %d\n", w->nconns);
5688                 for (j = 0; j < w->nconns; j++) {
5689                         cw = hdac_widget_get(devinfo, w->conns[j]);
5690                         device_printf(sc->dev, "          |\n");
5691                         device_printf(sc->dev, "          + <- nid=%d [%s]",
5692                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
5693                         if (cw == NULL)
5694                                 printf(" [UNKNOWN]");
5695                         else if (cw->enable == 0)
5696                                 printf(" [DISABLED]");
5697                         if (w->nconns > 1 && w->selconn == j && w->type !=
5698                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5699                                 printf(" (selected)");
5700                         printf("\n");
5701                 }
5702         }
5703
5704 }
5705
5706 static int
5707 hdac_dump_dac_internal(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5708 {
5709         struct hdac_widget *w, *cw;
5710         struct hdac_softc *sc = devinfo->codec->sc;
5711         int i;
5712
5713         if (depth > HDA_PARSE_MAXDEPTH)
5714                 return (0);
5715
5716         w = hdac_widget_get(devinfo, nid);
5717         if (w == NULL || w->enable == 0 || !(w->pflags & HDA_DAC_PATH))
5718                 return (0);
5719
5720         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5721                 device_printf(sc->dev, "\n");
5722                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5723                 device_printf(sc->dev, "      ^\n");
5724                 device_printf(sc->dev, "      |\n");
5725                 device_printf(sc->dev, "      +-----<------+\n");
5726         } else {
5727                 device_printf(sc->dev, "                   ^\n");
5728                 device_printf(sc->dev, "                   |\n");
5729                 device_printf(sc->dev, "               ");
5730                 printf("  nid=%d [%s]\n", w->nid, w->name);
5731         }
5732
5733         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) {
5734                 return (1);
5735         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
5736                 for (i = 0; i < w->nconns; i++) {
5737                         cw = hdac_widget_get(devinfo, w->conns[i]);
5738                         if (cw == NULL || cw->enable == 0 || cw->type ==
5739                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5740                                 continue;
5741                         if (hdac_dump_dac_internal(devinfo, cw->nid,
5742                             depth + 1) != 0)
5743                                 return (1);
5744                 }
5745         } else if ((w->type ==
5746             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR ||
5747             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5748             w->selconn > -1 && w->selconn < w->nconns) {
5749                 if (hdac_dump_dac_internal(devinfo, w->conns[w->selconn],
5750                     depth + 1) != 0)
5751                         return (1);
5752         }
5753
5754         return (0);
5755 }
5756
5757 static void
5758 hdac_dump_dac(struct hdac_devinfo *devinfo)
5759 {
5760         struct hdac_widget *w;
5761         struct hdac_softc *sc = devinfo->codec->sc;
5762         int i, printed = 0;
5763
5764         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5765                 w = hdac_widget_get(devinfo, i);
5766                 if (w == NULL || w->enable == 0)
5767                         continue;
5768                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
5769                     !(w->pflags & HDA_DAC_PATH))
5770                         continue;
5771                 if (printed == 0) {
5772                         printed = 1;
5773                         device_printf(sc->dev, "\n");
5774                         device_printf(sc->dev, "Playback path:\n");
5775                 }
5776                 hdac_dump_dac_internal(devinfo, w->nid, 0);
5777         }
5778 }
5779
5780 static void
5781 hdac_dump_adc(struct hdac_devinfo *devinfo)
5782 {
5783         struct hdac_widget *w, *cw;
5784         struct hdac_softc *sc = devinfo->codec->sc;
5785         int i, j;
5786         int printed = 0;
5787         char ossdevs[256];
5788
5789         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5790                 w = hdac_widget_get(devinfo, i);
5791                 if (w == NULL || w->enable == 0)
5792                         continue;
5793                 if (!(w->pflags & HDA_ADC_RECSEL))
5794                         continue;
5795                 if (printed == 0) {
5796                         printed = 1;
5797                         device_printf(sc->dev, "\n");
5798                         device_printf(sc->dev, "Recording sources:\n");
5799                 }
5800                 device_printf(sc->dev, "\n");
5801                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5802                 for (j = 0; j < w->nconns; j++) {
5803                         cw = hdac_widget_get(devinfo, w->conns[j]);
5804                         if (cw == NULL || cw->enable == 0)
5805                                 continue;
5806                         hdac_audio_ctl_ossmixer_mask2allname(cw->ctlflags,
5807                             ossdevs, sizeof(ossdevs));
5808                         device_printf(sc->dev, "      |\n");
5809                         device_printf(sc->dev, "      + <- nid=%d [%s]",
5810                             cw->nid, cw->name);
5811                         if (strlen(ossdevs) > 0) {
5812                                 printf(" [recsrc: %s]", ossdevs);
5813                         }
5814                         printf("\n");
5815                 }
5816         }
5817 }
5818
5819 static void
5820 hdac_dump_pcmchannels(struct hdac_softc *sc, int pcnt, int rcnt)
5821 {
5822         nid_t *nids;
5823
5824         if (pcnt > 0) {
5825                 device_printf(sc->dev, "\n");
5826                 device_printf(sc->dev, "   PCM Playback: %d\n", pcnt);
5827                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5828                     sc->play.supp_pcm_size_rate);
5829                 device_printf(sc->dev, "            DAC:");
5830                 for (nids = sc->play.io; *nids != -1; nids++)
5831                         printf(" %d", *nids);
5832                 printf("\n");
5833         }
5834
5835         if (rcnt > 0) {
5836                 device_printf(sc->dev, "\n");
5837                 device_printf(sc->dev, "     PCM Record: %d\n", rcnt);
5838                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5839                     sc->rec.supp_pcm_size_rate);
5840                 device_printf(sc->dev, "            ADC:");
5841                 for (nids = sc->rec.io; *nids != -1; nids++)
5842                         printf(" %d", *nids);
5843                 printf("\n");
5844         }
5845 }
5846
5847 static void
5848 hdac_release_resources(struct hdac_softc *sc)
5849 {
5850         struct hdac_devinfo *devinfo = NULL;
5851         device_t *devlist = NULL;
5852         int i, devcount;
5853
5854         if (sc == NULL)
5855                 return;
5856
5857         hdac_lock(sc);
5858         sc->polling = 0;
5859         sc->poll_ival = 0;
5860         callout_stop(&sc->poll_hda);
5861         callout_stop(&sc->poll_hdac);
5862         callout_stop(&sc->poll_jack);
5863         hdac_reset(sc);
5864         hdac_unlock(sc);
5865         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
5866         callout_drain(&sc->poll_hda);
5867         callout_drain(&sc->poll_hdac);
5868         callout_drain(&sc->poll_jack);
5869
5870         hdac_irq_free(sc);
5871
5872         device_get_children(sc->dev, &devlist, &devcount);
5873         for (i = 0; devlist != NULL && i < devcount; i++) {
5874                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
5875                 if (devinfo == NULL)
5876                         continue;
5877                 if (devinfo->widget != NULL)
5878                         free(devinfo->widget, M_HDAC);
5879                 if (devinfo->node_type ==
5880                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
5881                     devinfo->function.audio.ctl != NULL)
5882                         free(devinfo->function.audio.ctl, M_HDAC);
5883                 free(devinfo, M_HDAC);
5884                 device_delete_child(sc->dev, devlist[i]);
5885         }
5886         if (devlist != NULL)
5887                 free(devlist, M_TEMP);
5888
5889         for (i = 0; i < HDAC_CODEC_MAX; i++) {
5890                 if (sc->codecs[i] != NULL)
5891                         free(sc->codecs[i], M_HDAC);
5892                 sc->codecs[i] = NULL;
5893         }
5894
5895         hdac_dma_free(sc, &sc->pos_dma);
5896         hdac_dma_free(sc, &sc->rirb_dma);
5897         hdac_dma_free(sc, &sc->corb_dma);
5898         if (sc->play.blkcnt > 0)
5899                 hdac_dma_free(sc, &sc->play.bdl_dma);
5900         if (sc->rec.blkcnt > 0)
5901                 hdac_dma_free(sc, &sc->rec.bdl_dma);
5902         if (sc->chan_dmat != NULL) {
5903                 bus_dma_tag_destroy(sc->chan_dmat);
5904                 sc->chan_dmat = NULL;
5905         }
5906         hdac_mem_free(sc);
5907         snd_mtxfree(sc->lock);
5908         free(sc, M_DEVBUF);
5909 }
5910
5911 /* This function surely going to make its way into upper level someday. */
5912 static void
5913 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
5914 {
5915         const char *res = NULL;
5916         int i = 0, j, k, len, inv;
5917
5918         if (on != NULL)
5919                 *on = 0;
5920         if (off != NULL)
5921                 *off = 0;
5922         if (sc == NULL)
5923                 return;
5924         if (resource_string_value(device_get_name(sc->dev),
5925             device_get_unit(sc->dev), "config", &res) != 0)
5926                 return;
5927         if (!(res != NULL && strlen(res) > 0))
5928                 return;
5929         HDA_BOOTVERBOSE(
5930                 device_printf(sc->dev, "HDA_DEBUG: HDA Config:");
5931         );
5932         for (;;) {
5933                 while (res[i] != '\0' &&
5934                     (res[i] == ',' || isspace(res[i]) != 0))
5935                         i++;
5936                 if (res[i] == '\0') {
5937                         HDA_BOOTVERBOSE(
5938                                 printf("\n");
5939                         );
5940                         return;
5941                 }
5942                 j = i;
5943                 while (res[j] != '\0' &&
5944                     !(res[j] == ',' || isspace(res[j]) != 0))
5945                         j++;
5946                 len = j - i;
5947                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
5948                         inv = 2;
5949                 else
5950                         inv = 0;
5951                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
5952                         if (strncmp(res + i + inv,
5953                             hdac_quirks_tab[k].key, len - inv) != 0)
5954                                 continue;
5955                         if (len - inv != strlen(hdac_quirks_tab[k].key))
5956                                 break;
5957                         HDA_BOOTVERBOSE(
5958                                 printf(" %s%s", (inv != 0) ? "no" : "",
5959                                     hdac_quirks_tab[k].key);
5960                         );
5961                         if (inv == 0 && on != NULL)
5962                                 *on |= hdac_quirks_tab[k].value;
5963                         else if (inv != 0 && off != NULL)
5964                                 *off |= hdac_quirks_tab[k].value;
5965                         break;
5966                 }
5967                 i = j;
5968         }
5969 }
5970
5971 #ifdef SND_DYNSYSCTL
5972 static int
5973 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
5974 {
5975         struct hdac_softc *sc;
5976         struct hdac_devinfo *devinfo;
5977         device_t dev;
5978         uint32_t ctl;
5979         int err, val;
5980
5981         dev = oidp->oid_arg1;
5982         devinfo = pcm_getdevinfo(dev);
5983         if (devinfo == NULL || devinfo->codec == NULL ||
5984             devinfo->codec->sc == NULL)
5985                 return (EINVAL);
5986         sc = devinfo->codec->sc;
5987         hdac_lock(sc);
5988         val = sc->polling;
5989         hdac_unlock(sc);
5990         err = sysctl_handle_int(oidp, &val, 0, req);
5991
5992         if (err != 0 || req->newptr == NULL)
5993                 return (err);
5994         if (val < 0 || val > 1)
5995                 return (EINVAL);
5996
5997         hdac_lock(sc);
5998         if (val != sc->polling) {
5999                 if (hda_chan_active(sc) != 0)
6000                         err = EBUSY;
6001                 else if (val == 0) {
6002                         callout_stop(&sc->poll_hdac);
6003                         hdac_unlock(sc);
6004                         callout_drain(&sc->poll_hdac);
6005                         hdac_lock(sc);
6006                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT,
6007                             sc->rirb_size / 2);
6008                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
6009                         ctl |= HDAC_RIRBCTL_RINTCTL;
6010                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
6011                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
6012                             HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
6013                         sc->polling = 0;
6014                         DELAY(1000);
6015                 } else {
6016                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, 0);
6017                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, 0);
6018                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
6019                         ctl &= ~HDAC_RIRBCTL_RINTCTL;
6020                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
6021                         hdac_unlock(sc);
6022                         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
6023                         hdac_lock(sc);
6024                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback,
6025                             sc);
6026                         sc->polling = 1;
6027                         DELAY(1000);
6028                 }
6029         }
6030         hdac_unlock(sc);
6031
6032         return (err);
6033 }
6034
6035 static int
6036 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
6037 {
6038         struct hdac_softc *sc;
6039         struct hdac_devinfo *devinfo;
6040         device_t dev;
6041         int err, val;
6042
6043         dev = oidp->oid_arg1;
6044         devinfo = pcm_getdevinfo(dev);
6045         if (devinfo == NULL || devinfo->codec == NULL ||
6046             devinfo->codec->sc == NULL)
6047                 return (EINVAL);
6048         sc = devinfo->codec->sc;
6049         hdac_lock(sc);
6050         val = ((uint64_t)sc->poll_ival * 1000) / hz;
6051         hdac_unlock(sc);
6052         err = sysctl_handle_int(oidp, &val, 0, req);
6053
6054         if (err != 0 || req->newptr == NULL)
6055                 return (err);
6056
6057         if (val < 1)
6058                 val = 1;
6059         if (val > 5000)
6060                 val = 5000;
6061         val = ((uint64_t)val * hz) / 1000;
6062         if (val < 1)
6063                 val = 1;
6064         if (val > (hz * 5))
6065                 val = hz * 5;
6066
6067         hdac_lock(sc);
6068         sc->poll_ival = val;
6069         hdac_unlock(sc);
6070
6071         return (err);
6072 }
6073
6074 #ifdef SND_DEBUG
6075 static int
6076 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
6077 {
6078         struct hdac_softc *sc;
6079         struct hdac_devinfo *devinfo;
6080         struct hdac_widget *w;
6081         device_t dev;
6082         uint32_t res, pincap, timeout;
6083         int i, err, val;
6084         nid_t cad;
6085
6086         dev = oidp->oid_arg1;
6087         devinfo = pcm_getdevinfo(dev);
6088         if (devinfo == NULL || devinfo->codec == NULL ||
6089             devinfo->codec->sc == NULL)
6090                 return (EINVAL);
6091         val = 0;
6092         err = sysctl_handle_int(oidp, &val, 0, req);
6093         if (err != 0 || req->newptr == NULL || val == 0)
6094                 return (err);
6095         sc = devinfo->codec->sc;
6096         cad = devinfo->codec->cad;
6097         hdac_lock(sc);
6098         device_printf(dev, "HDAC Dump AFG [nid=%d]:\n", devinfo->nid);
6099         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6100                 w = hdac_widget_get(devinfo, i);
6101                 if (w == NULL || w->type !=
6102                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6103                         continue;
6104                 pincap = w->wclass.pin.cap;
6105                 if ((HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
6106                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) &&
6107                     HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
6108                         timeout = 10000;
6109                         hdac_command(sc,
6110                             HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
6111                         do {
6112                                 res = hdac_command(sc,
6113                                     HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
6114                                 if (res != 0x7fffffff)
6115                                         break;
6116                                 DELAY(10);
6117                         } while (--timeout != 0);
6118                 } else {
6119                         timeout = -1;
6120                         res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
6121                             w->nid), cad);
6122                 }
6123                 device_printf(dev,
6124                     "PIN_SENSE: nid=%-3d timeout=%d res=0x%08x [%s]\n",
6125                     w->nid, timeout, res,
6126                     (w->enable == 0) ? "DISABLED" : "ENABLED");
6127         }
6128         device_printf(dev,
6129             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
6130             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
6131             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
6132             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
6133             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
6134             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
6135         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
6136                 device_printf(dev, " GPI:");
6137                 res = hdac_command(sc,
6138                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
6139                 printf(" data=0x%08x", res);
6140                 res = hdac_command(sc,
6141                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
6142                     cad);
6143                 printf(" wake=0x%08x", res);
6144                 res = hdac_command(sc,
6145                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6146                     cad);
6147                 printf(" unsol=0x%08x", res);
6148                 res = hdac_command(sc,
6149                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
6150                 printf(" sticky=0x%08x\n", res);
6151         }
6152         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
6153                 device_printf(dev, " GPO:");
6154                 res = hdac_command(sc,
6155                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
6156                 printf(" data=0x%08x\n", res);
6157         }
6158         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
6159                 device_printf(dev, "GPI0:");
6160                 res = hdac_command(sc,
6161                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
6162                 printf(" data=0x%08x", res);
6163                 res = hdac_command(sc,
6164                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
6165                 printf(" enable=0x%08x", res);
6166                 res = hdac_command(sc,
6167                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
6168                 printf(" direction=0x%08x\n", res);
6169                 res = hdac_command(sc,
6170                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
6171                 device_printf(dev, "      wake=0x%08x", res);
6172                 res = hdac_command(sc,
6173                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6174                     cad);
6175                 printf("  unsol=0x%08x", res);
6176                 res = hdac_command(sc,
6177                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
6178                 printf("    sticky=0x%08x\n", res);
6179         }
6180         hdac_unlock(sc);
6181         return (0);
6182 }
6183 #endif
6184 #endif
6185
6186 static void
6187 hdac_attach2(void *arg)
6188 {
6189         struct hdac_softc *sc;
6190         struct hdac_widget *w;
6191         struct hdac_audio_ctl *ctl;
6192         uint32_t quirks_on, quirks_off;
6193         int pcnt, rcnt, codec_index;
6194         int i;
6195         char status[SND_STATUSLEN];
6196         device_t *devlist = NULL;
6197         int devcount;
6198         struct hdac_devinfo *devinfo = NULL;
6199
6200         sc = (struct hdac_softc *)arg;
6201
6202         hdac_config_fetch(sc, &quirks_on, &quirks_off);
6203
6204         HDA_BOOTVERBOSE(
6205                 device_printf(sc->dev, "HDA_DEBUG: HDA Config: on=0x%08x off=0x%08x\n",
6206                     quirks_on, quirks_off);
6207         );
6208
6209         if (resource_int_value(device_get_name(sc->dev),
6210             device_get_unit(sc->dev), "codec_index", &codec_index) != 0) {
6211                 switch (sc->pci_subvendor) {
6212                 case GB_G33S2H_SUBVENDOR:
6213                         codec_index = 2;
6214                         break;
6215                 default:
6216                         codec_index = 0;
6217                         break;
6218                 }
6219         }
6220
6221         hdac_lock(sc);
6222
6223         /* Remove ourselves from the config hooks */
6224         if (sc->intrhook.ich_func != NULL) {
6225                 config_intrhook_disestablish(&sc->intrhook);
6226                 sc->intrhook.ich_func = NULL;
6227         }
6228
6229         /* Start the corb and rirb engines */
6230         HDA_BOOTVERBOSE(
6231                 device_printf(sc->dev, "HDA_DEBUG: Starting CORB Engine...\n");
6232         );
6233         hdac_corb_start(sc);
6234         HDA_BOOTVERBOSE(
6235                 device_printf(sc->dev, "HDA_DEBUG: Starting RIRB Engine...\n");
6236         );
6237         hdac_rirb_start(sc);
6238
6239         HDA_BOOTVERBOSE(
6240                 device_printf(sc->dev,
6241                     "HDA_DEBUG: Enabling controller interrupt...\n");
6242         );
6243         if (sc->polling == 0)
6244                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
6245                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
6246         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
6247             HDAC_GCTL_UNSOL);
6248
6249         DELAY(1000);
6250
6251         HDA_BOOTVERBOSE(
6252                 device_printf(sc->dev,
6253                     "HDA_DEBUG: Scanning HDA codecs [start index=%d] ...\n",
6254                     codec_index);
6255         );
6256         hdac_scan_codecs(sc, codec_index);
6257
6258         device_get_children(sc->dev, &devlist, &devcount);
6259         for (i = 0; devlist != NULL && i < devcount; i++) {
6260                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
6261                 if (devinfo != NULL && devinfo->node_type ==
6262                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
6263                         break;
6264                 } else
6265                         devinfo = NULL;
6266         }
6267         if (devlist != NULL)
6268                 free(devlist, M_TEMP);
6269
6270         if (devinfo == NULL) {
6271                 hdac_unlock(sc);
6272                 device_printf(sc->dev, "Audio Function Group not found!\n");
6273                 hdac_release_resources(sc);
6274                 return;
6275         }
6276
6277         HDA_BOOTVERBOSE(
6278                 device_printf(sc->dev,
6279                     "HDA_DEBUG: Parsing AFG nid=%d cad=%d\n",
6280                     devinfo->nid, devinfo->codec->cad);
6281         );
6282         hdac_audio_parse(devinfo);
6283         HDA_BOOTVERBOSE(
6284                 device_printf(sc->dev, "HDA_DEBUG: Parsing Ctls...\n");
6285         );
6286         hdac_audio_ctl_parse(devinfo);
6287         HDA_BOOTVERBOSE(
6288                 device_printf(sc->dev, "HDA_DEBUG: Parsing vendor patch...\n");
6289         );
6290         hdac_vendor_patch_parse(devinfo);
6291         if (quirks_on != 0)
6292                 devinfo->function.audio.quirks |= quirks_on;
6293         if (quirks_off != 0)
6294                 devinfo->function.audio.quirks &= ~quirks_off;
6295
6296         /* XXX Disable all DIGITAL path. */
6297         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6298                 w = hdac_widget_get(devinfo, i);
6299                 if (w == NULL)
6300                         continue;
6301                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
6302                         w->enable = 0;
6303                         continue;
6304                 }
6305                 /* XXX Disable useless pin ? */
6306                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6307                     (w->wclass.pin.config &
6308                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
6309                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
6310                         w->enable = 0;
6311         }
6312         i = 0;
6313         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6314                 if (ctl->widget == NULL)
6315                         continue;
6316                 if (ctl->ossmask & SOUND_MASK_DISABLE)
6317                         ctl->enable = 0;
6318                 w = ctl->widget;
6319                 if (w->enable == 0 ||
6320                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6321                         ctl->enable = 0;
6322                 w = ctl->childwidget;
6323                 if (w == NULL)
6324                         continue;
6325                 if (w->enable == 0 ||
6326                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6327                         ctl->enable = 0;
6328         }
6329
6330         HDA_BOOTVERBOSE(
6331                 device_printf(sc->dev, "HDA_DEBUG: Building AFG tree...\n");
6332         );
6333         hdac_audio_build_tree(devinfo);
6334
6335         i = 0;
6336         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6337                 if (ctl->ossmask & (SOUND_MASK_SKIP | SOUND_MASK_DISABLE))
6338                         ctl->ossmask = 0;
6339         }
6340         HDA_BOOTVERBOSE(
6341                 device_printf(sc->dev, "HDA_DEBUG: AFG commit...\n");
6342         );
6343         hdac_audio_commit(devinfo, HDA_COMMIT_ALL);
6344         HDA_BOOTVERBOSE(
6345                 device_printf(sc->dev, "HDA_DEBUG: Ctls commit...\n");
6346         );
6347         hdac_audio_ctl_commit(devinfo);
6348
6349         HDA_BOOTVERBOSE(
6350                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_PLAY setup...\n");
6351         );
6352         pcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_PLAY);
6353         HDA_BOOTVERBOSE(
6354                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_REC setup...\n");
6355         );
6356         rcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_REC);
6357
6358         hdac_unlock(sc);
6359         HDA_BOOTVERBOSE(
6360                 device_printf(sc->dev,
6361                     "HDA_DEBUG: OSS mixer initialization...\n");
6362         );
6363
6364         /*
6365          * There is no point of return after this. If the driver failed,
6366          * so be it. Let the detach procedure do all the cleanup.
6367          */
6368         if (mixer_init(sc->dev, &hdac_audio_ctl_ossmixer_class, devinfo) != 0)
6369                 device_printf(sc->dev, "Can't register mixer\n");
6370
6371         if (pcnt > 0)
6372                 pcnt = 1;
6373         if (rcnt > 0)
6374                 rcnt = 1;
6375
6376         HDA_BOOTVERBOSE(
6377                 device_printf(sc->dev,
6378                     "HDA_DEBUG: Registering PCM channels...\n");
6379         );
6380         if (pcm_register(sc->dev, devinfo, pcnt, rcnt) != 0)
6381                 device_printf(sc->dev, "Can't register PCM\n");
6382
6383         sc->registered++;
6384
6385         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
6386             hdac_dma_alloc(sc, &sc->pos_dma,
6387             (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
6388                 HDA_BOOTVERBOSE(
6389                         device_printf(sc->dev,
6390                             "Failed to allocate DMA pos buffer (non-fatal)\n");
6391                 );
6392         }
6393
6394         for (i = 0; i < pcnt; i++)
6395                 pcm_addchan(sc->dev, PCMDIR_PLAY, &hdac_channel_class, devinfo);
6396         for (i = 0; i < rcnt; i++)
6397                 pcm_addchan(sc->dev, PCMDIR_REC, &hdac_channel_class, devinfo);
6398
6399 #ifdef SND_DYNSYSCTL
6400         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
6401             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
6402             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6403             sysctl_hdac_polling, "I", "Enable polling mode");
6404         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
6405             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
6406             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
6407             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
6408             "Controller/Jack Sense polling interval (1-1000 ms)");
6409 #ifdef SND_DEBUG
6410         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
6411             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
6412             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6413             sysctl_hdac_pindump, "I", "Dump pin states/data");
6414 #endif
6415 #endif
6416
6417         snprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s [%s]",
6418             rman_get_start(sc->mem.mem_res), rman_get_start(sc->irq.irq_res),
6419             PCM_KLDSTRING(snd_hda), HDA_DRV_TEST_REV);
6420         pcm_setstatus(sc->dev, status);
6421         device_printf(sc->dev, "<HDA Codec: %s>\n", hdac_codec_name(devinfo));
6422         HDA_BOOTVERBOSE(
6423                 device_printf(sc->dev, "<HDA Codec ID: 0x%08x>\n",
6424                     hdac_codec_id(devinfo));
6425         );
6426         device_printf(sc->dev, "<HDA Driver Revision: %s>\n",
6427             HDA_DRV_TEST_REV);
6428
6429         HDA_BOOTVERBOSE(
6430                 if (devinfo->function.audio.quirks != 0) {
6431                         device_printf(sc->dev, "\n");
6432                         device_printf(sc->dev, "HDA config/quirks:");
6433                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
6434                                 if ((devinfo->function.audio.quirks &
6435                                     hdac_quirks_tab[i].value) ==
6436                                     hdac_quirks_tab[i].value)
6437                                         printf(" %s", hdac_quirks_tab[i].key);
6438                         }
6439                         printf("\n");
6440                 }
6441                 device_printf(sc->dev, "\n");
6442                 device_printf(sc->dev, "+-------------------+\n");
6443                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
6444                 device_printf(sc->dev, "+-------------------+\n");
6445                 hdac_dump_nodes(devinfo);
6446                 device_printf(sc->dev, "\n");
6447                 device_printf(sc->dev, "+------------------------+\n");
6448                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
6449                 device_printf(sc->dev, "+------------------------+\n");
6450                 device_printf(sc->dev, "\n");
6451                 i = 0;
6452                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6453                         device_printf(sc->dev, "%3d: nid=%d", i,
6454                             (ctl->widget != NULL) ? ctl->widget->nid : -1);
6455                         if (ctl->childwidget != NULL)
6456                                 printf(" cnid=%d", ctl->childwidget->nid);
6457                         printf(" dir=0x%x index=%d "
6458                             "ossmask=0x%08x ossdev=%d%s\n",
6459                             ctl->dir, ctl->index,
6460                             ctl->ossmask, ctl->ossdev,
6461                             (ctl->enable == 0) ? " [DISABLED]" : "");
6462                 }
6463                 device_printf(sc->dev, "\n");
6464                 device_printf(sc->dev, "+-----------------------------------+\n");
6465                 device_printf(sc->dev, "| DUMPING HDA AUDIO/VOLUME CONTROLS |\n");
6466                 device_printf(sc->dev, "+-----------------------------------+\n");
6467                 hdac_dump_ctls(devinfo, "Master Volume (OSS: vol)", SOUND_MASK_VOLUME);
6468                 hdac_dump_ctls(devinfo, "PCM Volume (OSS: pcm)", SOUND_MASK_PCM);
6469                 hdac_dump_ctls(devinfo, "CD Volume (OSS: cd)", SOUND_MASK_CD);
6470                 hdac_dump_ctls(devinfo, "Microphone Volume (OSS: mic)", SOUND_MASK_MIC);
6471                 hdac_dump_ctls(devinfo, "Line-in Volume (OSS: line)", SOUND_MASK_LINE);
6472                 hdac_dump_ctls(devinfo, "Recording Level (OSS: rec)", SOUND_MASK_RECLEV);
6473                 hdac_dump_ctls(devinfo, "Speaker/Beep (OSS: speaker)", SOUND_MASK_SPEAKER);
6474                 hdac_dump_ctls(devinfo, NULL, 0);
6475                 hdac_dump_dac(devinfo);
6476                 hdac_dump_adc(devinfo);
6477                 device_printf(sc->dev, "\n");
6478                 device_printf(sc->dev, "+--------------------------------------+\n");
6479                 device_printf(sc->dev, "| DUMPING PCM Playback/Record Channels |\n");
6480                 device_printf(sc->dev, "+--------------------------------------+\n");
6481                 hdac_dump_pcmchannels(sc, pcnt, rcnt);
6482         );
6483
6484         if (sc->polling != 0) {
6485                 hdac_lock(sc);
6486                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
6487                 hdac_unlock(sc);
6488         }
6489 }
6490
6491 /****************************************************************************
6492  * int hdac_detach(device_t)
6493  *
6494  * Detach and free up resources utilized by the hdac device.
6495  ****************************************************************************/
6496 static int
6497 hdac_detach(device_t dev)
6498 {
6499         struct hdac_softc *sc = NULL;
6500         struct hdac_devinfo *devinfo = NULL;
6501         int err;
6502
6503         devinfo = (struct hdac_devinfo *)pcm_getdevinfo(dev);
6504         if (devinfo != NULL && devinfo->codec != NULL)
6505                 sc = devinfo->codec->sc;
6506         if (sc == NULL)
6507                 return (0);
6508
6509         if (sc->registered > 0) {
6510                 err = pcm_unregister(dev);
6511                 if (err != 0)
6512                         return (err);
6513         }
6514
6515         hdac_release_resources(sc);
6516
6517         return (0);
6518 }
6519
6520 static device_method_t hdac_methods[] = {
6521         /* device interface */
6522         DEVMETHOD(device_probe,         hdac_probe),
6523         DEVMETHOD(device_attach,        hdac_attach),
6524         DEVMETHOD(device_detach,        hdac_detach),
6525         { 0, 0 }
6526 };
6527
6528 static driver_t hdac_driver = {
6529         "pcm",
6530         hdac_methods,
6531         PCM_SOFTC_SIZE,
6532 };
6533
6534 DRIVER_MODULE(snd_hda, pci, hdac_driver, pcm_devclass, 0, 0);
6535 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
6536 MODULE_VERSION(snd_hda, 1);