2 * Copyright (c) 2002 Orion Hodson <orion@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
29 #ifndef _SYS_SOUND_PCI_VIA8233_H_
30 #define _SYS_SOUND_PCI_VIA8233_H_
33 * VIA Technologies VT8233 Southbridge Audio Driver
35 * Documentation sources:
37 * o V8233C specs. from VIA, gratefully received under NDA.
39 * o ALSA driver (very useful comments)
42 #define VIA_PCI_SPDIF 0x49
43 #define VIA_SPDIF_EN 0x08
45 #define VIA_DXS0_BASE 0x00
46 #define VIA_DXS1_BASE 0x10
47 #define VIA_DXS2_BASE 0x20
48 #define VIA_DXS3_BASE 0x30
49 #define VIA_DXS_BASE(n) (0x10 * (n))
50 #define BASE_IS_VIA_DXS_REG(x) ((x) <= VIA_DXS3_BASE)
52 #define VIA8233_RP_DXS_LVOL 0x02
53 #define VIA8233_RP_DXS_RVOL 0x03
54 #define VIA8233_DXS_MUTE 0x3f
55 #define VIA8233_RP_DXS_RATEFMT 0x08
56 #define VIA8233_DXS_STOP_INDEX 0xff000000
57 #define VIA8233_DXS_RATEFMT_48K 0x000fffff
58 #define VIA8233_DXS_RATEFMT_STEREO 0x00100000
59 #define VIA8233_DXS_RATEFMT_16BIT 0x00200000
61 #define VIA_PCI_ACLINK_STAT 0x40
62 # define VIA_PCI_ACLINK_C11_READY 0x20
63 # define VIA_PCI_ACLINK_C10_READY 0x10
64 # define VIA_PCI_ACLINK_C01_READY 0x04
65 # define VIA_PCI_ACLINK_LOW_POWER 0x02
66 # define VIA_PCI_ACLINK_C00_READY 0x01
68 #define VIA_PCI_ACLINK_CTRL 0x41
69 # define VIA_PCI_ACLINK_EN 0x80
70 # define VIA_PCI_ACLINK_NRST 0x40
71 # define VIA_PCI_ACLINK_SYNC 0x20
72 # define VIA_PCI_ACLINK_SERIAL 0x10
73 # define VIA_PCI_ACLINK_VRATE 0x08
74 # define VIA_PCI_ACLINK_SGD 0x04
75 # define VIA_PCI_ACLINK_DESIRED (VIA_PCI_ACLINK_EN | \
76 VIA_PCI_ACLINK_NRST | \
77 VIA_PCI_ACLINK_VRATE | \
80 #define VIA_MC_SGD_STATUS 0x40
81 #define VIA_WR0_SGD_STATUS 0x60
82 #define VIA_WR1_SGD_STATUS 0x70
83 # define SGD_STATUS_ACTIVE 0x80
84 # define SGD_STATUS_AT_STOP 0x40
85 # define SGD_STATUS_TRIGGER_Q 0x08
86 # define SGD_STATUS_STOP_I_S 0x04
87 # define SGD_STATUS_EOL 0x02
88 # define SGD_STATUS_FLAG 0x01
89 # define SGD_STATUS_INTR (SGD_STATUS_EOL | SGD_STATUS_FLAG)
91 #define VIA_WR_BASE(n) (0x60 + (n) * 0x10)
93 #define VIA_MC_SGD_CONTROL 0x41
94 #define VIA_WR0_SGD_CONTROL 0x61
95 #define VIA_WR1_SGD_CONTROL 0x71
96 # define SGD_CONTROL_START 0x80
97 # define SGD_CONTROL_STOP 0x40
98 # define SGD_CONTROL_AUTOSTART 0x20
99 # define SGD_CONTROL_PAUSE 0x08
100 # define SGD_CONTROL_I_STOP 0x04
101 # define SGD_CONTROL_I_EOL 0x02
102 # define SGD_CONTROL_I_FLAG 0x01
104 #define VIA_MC_SGD_FORMAT 0x42
105 # define MC_SGD_16BIT 0x80
106 # define MC_SGD_8BIT 0x00
107 # define MC_SGD_CHANNELS(x) (((x)& 0x07) << 4)
109 #define VIA_WR0_SGD_FORMAT 0x62
110 #define VIA_WR1_SGD_FORMAT 0x72
111 #define VIA_WR_RP_SGD_FORMAT 0x02
112 # define WR_FIFO_ENABLE 0x40
114 #define VIA_WR0_SGD_INPUT 0x63
115 #define VIA_WR1_SGD_INPUT 0x73
116 # define WR_LINE_IN 0x00
117 # define WR_MIC_IN 0x04
118 # define WR_PRIMARY_CODEC 0x00
119 # define WR_SECONDARY_CODEC1 0x01
120 # define WR_SECONDARY_CODEC2 0x02
121 # define WR_SECONDARY_CODEC3 0x03
123 #define VIA_MC_TABLE_PTR_BASE 0x44
124 #define VIA_WR0_TABLE_PTR_BASE 0x64
125 #define VIA_WR1_TABLE_PTR_BASE 0x74
127 #define VIA_MC_SLOT_SELECT 0x48
128 # define SLOT3(x) (x)
129 # define SLOT4(x) ((x) << 4)
130 # define SLOT7(x) ((x) << 8)
131 # define SLOT8(x) ((x) << 12)
132 # define SLOT6(x) ((x) << 16)
133 # define SLOT9(x) ((x) << 20)
135 #define VIA_MC_CURRENT_COUNT 0x4c
137 #define VIA_WR0_FORMAT 0x68
138 #define VIA_WR1_FORMAT 0x78
139 # define WR_FORMAT_STOP_INDEX 0xff000000
140 # define WR_FORMAT_STEREO 0x00100000
141 # define WR_FORMAT_16BIT 0x00200000
143 /* Relative offsets */
144 #define VIA_RP_STATUS 0x00
145 #define VIA_RP_CONTROL 0x01
146 #define VIA_RP_TABLE_PTR 0x04
147 #define VIA_RP_CURRENT_COUNT 0x0c
149 #define VIA_AC97_CONTROL 0x80
150 # define VIA_AC97_CODECID11 0xc0000000
151 # define VIA_AC97_CODECID10 0x80000000
152 # define VIA_AC97_CODECID01 0x40000000
153 # define VIA_AC97_CODEC11_VALID 0x20000000
154 # define VIA_AC97_CODEC10_VALID 0x10000000
155 # define VIA_AC97_CODEC01_VALID 0x08000000
156 # define VIA_AC97_CODEC00_VALID 0x02000000
157 # define VIA_AC97_BUSY 0x01000000
158 # define VIA_AC97_READ 0x00800000
159 # define VIA_AC97_INDEX(x) ((x) << 16)
160 # define VIA_AC97_DATA(x) ((x) & 0xffff)
162 #define VIA_CODEC_BUSY 0x01000000
163 #define VIA_CODEC_PRIVALID 0x02000000
164 #define VIA_CODEC_INDEX(x) ((x)<<16)
166 #endif /* SYS_SOUND_PCI_VIA8233_H_ */