sys/dev/sr/if_sr.c

   1 /*-
   2  * Copyright (c) 1996 - 2001 John Hay.
   3  * Copyright (c) 1996 SDL Communications, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 /*
  36  * Programming assumptions and other issues.
  37  *
  38  * Only a 16K window will be used.
  39  *
  40  * The descriptors of a DMA channel will fit in a 16K memory window.
  41  *
  42  * The buffers of a transmit DMA channel will fit in a 16K memory window.
  43  *
  44  * When interface is going up, handshaking is set and it is only cleared
  45  * when the interface is down'ed.
  46  *
  47  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
  48  * internal/external clock, etc.....
  49  *
  50  */
  51
  52 #include "opt_netgraph.h"
  53 #ifdef NETGRAPH
  54 #include <dev/sr/if_sr.h>
  55 #endif  /* NETGRAPH */
  56
  57 #include <sys/param.h>
  58 #include <sys/systm.h>
  59 #include <sys/kernel.h>
  60 #include <sys/module.h>
  61 #include <sys/malloc.h>
  62 #include <sys/mbuf.h>
  63 #include <sys/sockio.h>
  64 #include <sys/socket.h>
  65 #include <sys/bus.h>
  66 #include <machine/bus.h>
  67 #include <machine/resource.h>
  68 #include <machine/bus_pio.h>
  69 #include <machine/bus_memio.h>
  70 #include <sys/rman.h>
  71
  72 #include <net/if.h>
  73 #ifdef NETGRAPH
  74 #include <sys/syslog.h>
  75 #else /* NETGRAPH */
  76 #include <net/if_sppp.h>
  77
  78 #include <net/bpf.h>
  79 #endif  /* NETGRAPH */
  80
  81 #include <machine/md_var.h>
  82
  83 #include <dev/ic/hd64570.h>
  84 #include <dev/sr/if_srregs.h>
  85
  86 #ifdef NETGRAPH
  87 #include <netgraph/ng_message.h>
  88 #include <netgraph/netgraph.h>
  89 #endif /* NETGRAPH */
  90 /* #define USE_MODEMCK */
  91
  92 #ifndef BUGGY
  93 #define BUGGY           0
  94 #endif
  95
  96 #ifndef NETGRAPH
  97 #define PPP_HEADER_LEN  4
  98 #endif /* NETGRAPH */
  99
 100 static int      next_sc_unit = 0;
 101 #ifndef NETGRAPH
 102 #ifdef USE_MODEMCK
 103 static int      sr_watcher = 0;
 104 #endif
 105 #endif /* NETGRAPH */
 106
 107 /*
 108  * Define the software interface for the card... There is one for
 109  * every channel (port).
 110  */
 111 struct sr_softc {
 112 #ifndef NETGRAPH
 113         struct  sppp ifsppp;    /* PPP service w/in system */
 114 #endif /* NETGRAPH */
 115         struct  sr_hardc *hc;   /* card-level information */
 116
 117         int     unit;           /* With regard to all sr devices */
 118         int     subunit;        /* With regard to this card */
 119
 120         struct  buf_block {
 121                 u_int   txdesc; /* DPRAM offset */
 122                 u_int   txstart;/* DPRAM offset */
 123                 u_int   txend;  /* DPRAM offset */
 124                 u_int   txtail; /* # of 1st free gran */
 125                 u_int   txmax;  /* # of free grans */
 126                 u_int   txeda;  /* err descr addr */
 127         } block[SR_TX_BLOCKS];
 128
 129         char    xmit_busy;      /* Transmitter is busy */
 130         char    txb_inuse;      /* # of tx grans in use */
 131         u_int   txb_new;        /* ndx to new buffer */
 132         u_int   txb_next_tx;    /* ndx to next gran rdy tx */
 133
 134         u_int   rxdesc;         /* DPRAM offset */
 135         u_int   rxstart;        /* DPRAM offset */
 136         u_int   rxend;          /* DPRAM offset */
 137         u_int   rxhind;         /* ndx to the hd of rx bufrs */
 138         u_int   rxmax;          /* # of avail grans */
 139
 140         u_int   clk_cfg;        /* Clock configuration */
 141
 142         int     scachan;        /* channel # on card */
 143 #ifdef NETGRAPH
 144         int     running;        /* something is attached so we are running */
 145         int     dcd;            /* do we have dcd? */
 146         /* ---netgraph bits --- */
 147         char            nodename[NG_NODESIZ]; /* store our node name */
 148         int             datahooks;      /* number of data hooks attached */
 149         node_p          node;           /* netgraph node */
 150         hook_p          hook;           /* data hook */
 151         hook_p          debug_hook;
 152         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
 153         struct ifqueue  xmitq;          /* transmit queue */
 154         int             flags;          /* state */
 155 #define SCF_RUNNING     0x01            /* board is active */
 156 #define SCF_OACTIVE     0x02            /* output is active */
 157         int             out_dog;        /* watchdog cycles output count-down */
 158         struct callout_handle handle;   /* timeout(9) handle */
 159         u_long          inbytes, outbytes;      /* stats */
 160         u_long          lastinbytes, lastoutbytes; /* a second ago */
 161         u_long          inrate, outrate;        /* highest rate seen */
 162         u_long          inlast;         /* last input N secs ago */
 163         u_long          out_deficit;    /* output since last input */
 164         u_long          oerrors, ierrors[6];
 165         u_long          opackets, ipackets;
 166 #endif /* NETGRAPH */
 167 };
 168
 169 #ifdef NETGRAPH
 170 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
 171 #define QUITE_A_WHILE   300     /* 5 MINUTES */
 172 #define LOTS_OF_PACKETS 100
 173 #endif /* NETGRAPH */
 174
 175 /*
 176  * Baud Rate table for Sync Mode.
 177  * Each entry consists of 3 elements:
 178  * Baud Rate (x100) , TMC, BR
 179  *
 180  * Baud Rate = FCLK / TMC / 2^BR
 181  * Baud table for Crystal freq. of 9.8304 Mhz
 182  */
 183 #ifdef N2_TEST_SPEED
 184 struct rate_line {
 185         int     target;         /* target rate/100 */
 186         int     tmc_reg;        /* TMC register value */
 187         int     br_reg;         /* BR (BaudRateClk) selector */
 188 } n2_rates[] = {
 189         /* Baudx100     TMC             BR */
 190         { 3,            128,            8 },
 191         { 6,            128,            7 },
 192         { 12,           128,            6 },
 193         { 24,           128,            5 },
 194         { 48,           128,            4 },
 195         { 96,           128,            3 },
 196         { 192,          128,            2 },
 197         { 384,          128,            1 },
 198         { 560,          88,             1 },
 199         { 640,          77,             1 },
 200         { 1280,         38,             1 },
 201         { 2560,         19,             1 },
 202         { 5120,         10,             1 },
 203         { 10000,        5,              1 },
 204         { 15000,        3,              1 },
 205         { 25000,        2,              1 },
 206         { 50000,        1,              1 },
 207         { 0,            0,              0 }
 208 };
 209
 210 int     sr_test_speed[] = {
 211         N2_TEST_SPEED,
 212         N2_TEST_SPEED
 213 };
 214
 215 int     etc0vals[] = {
 216         SR_MCR_ETC0,            /* ISA channel 0 */
 217         SR_MCR_ETC1,            /* ISA channel 1 */
 218         SR_FECR_ETC0,           /* PCI channel 0 */
 219         SR_FECR_ETC1            /* PCI channel 1 */
 220 };
 221 #endif
 222
 223 devclass_t sr_devclass;
 224 #ifndef NETGRAPH
 225 MODULE_DEPEND(if_sr, sppp, 1, 1, 1);
 226 #else
 227 MODULE_DEPEND(ng_sync_sr, netgraph, 1, 1, 1);
 228 #endif
 229
 230 static void     srintr(void *arg);
 231 static void     sr_xmit(struct sr_softc *sc);
 232 #ifndef NETGRAPH
 233 static void     srstart(struct ifnet *ifp);
 234 static int      srioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
 235 static void     srwatchdog(struct ifnet *ifp);
 236 #else
 237 static void     srstart(struct sr_softc *sc);
 238 static void     srwatchdog(struct sr_softc *sc);
 239 #endif /* NETGRAPH */
 240 static int      sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat);
 241 static void     sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len);
 242 static void     sr_eat_packet(struct sr_softc *sc, int single);
 243 static void     sr_get_packets(struct sr_softc *sc);
 244
 245 static void     sr_up(struct sr_softc *sc);
 246 static void     sr_down(struct sr_softc *sc);
 247 static void     src_init(struct sr_hardc *hc);
 248 static void     sr_init_sca(struct sr_hardc *hc);
 249 static void     sr_init_msci(struct sr_softc *sc);
 250 static void     sr_init_rx_dmac(struct sr_softc *sc);
 251 static void     sr_init_tx_dmac(struct sr_softc *sc);
 252 static void     sr_dmac_intr(struct sr_hardc *hc, u_char isr);
 253 static void     sr_msci_intr(struct sr_hardc *hc, u_char isr);
 254 static void     sr_timer_intr(struct sr_hardc *hc, u_char isr);
 255 #ifndef NETGRAPH
 256 #ifdef USE_MODEMCK
 257 static void     sr_modemck(void *x);
 258 #endif
 259 #else
 260 static void     sr_modemck(struct sr_softc *x);
 261 #endif /* NETGRAPH */
 262
 263 #ifdef NETGRAPH
 264 static  void    ngsr_watchdog_frame(void * arg);
 265 static  void    ngsr_init(void* ignored);
 266
 267 static ng_constructor_t ngsr_constructor;
 268 static ng_rcvmsg_t      ngsr_rcvmsg;
 269 static ng_shutdown_t    ngsr_shutdown;
 270 static ng_newhook_t     ngsr_newhook;
 271 /*static ng_findhook_t  ngsr_findhook; */
 272 static ng_connect_t     ngsr_connect;
 273 static ng_rcvdata_t     ngsr_rcvdata;
 274 static ng_disconnect_t  ngsr_disconnect;
 275
 276 static struct ng_type typestruct = {
 277         .version =      NG_ABI_VERSION,
 278         .name =         NG_SR_NODE_TYPE,
 279         .constructor =  ngsr_constructor,
 280         .rcvmsg =       ngsr_rcvmsg,
 281         .shutdown =     ngsr_shutdown,
 282         .newhook =      ngsr_newhook,
 283         .connect =      ngsr_connect,
 284         .rcvdata =      ngsr_rcvdata,
 285         .disconnect =   ngsr_disconnect,
 286 };
 287
 288 static int      ngsr_done_init = 0;
 289 #endif /* NETGRAPH */
 290
 291 /*
 292  * Register the ports on the adapter.
 293  * Fill in the info for each port.
 294 #ifndef NETGRAPH
 295  * Attach each port to sppp and bpf.
 296 #endif
 297  */
 298 int
 299 sr_attach(device_t device)
 300 {
 301         int intf_sw, pndx;
 302         u_int32_t flags;
 303         u_int fecr;
 304         struct sr_hardc *hc;
 305         struct sr_softc *sc;
 306 #ifndef NETGRAPH
 307         struct ifnet *ifp;
 308 #endif /* NETGRAPH */
 309         int unit;               /* index: channel w/in card */
 310
 311         hc = (struct sr_hardc *)device_get_softc(device);
 312         MALLOC(sc, struct sr_softc *,
 313                 hc->numports * sizeof(struct sr_softc),
 314                 M_DEVBUF, M_WAITOK | M_ZERO);
 315         if (sc == NULL)
 316                 goto errexit;
 317         hc->sc = sc;
 318
 319         /*
 320          * Get the TX clock direction and configuration. The default is a
 321          * single external clock which is used by RX and TX.
 322          */
 323         switch(hc->cardtype) {
 324         case SR_CRD_N2:
 325                 flags = device_get_flags(device);
 326 #ifdef N2_TEST_SPEED
 327                 if (sr_test_speed[0] > 0)
 328                         hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 329                 else
 330 #endif
 331                 if (flags & SR_FLAGS_0_CLK_MSK)
 332                         hc->sc[0].clk_cfg =
 333                             (flags & SR_FLAGS_0_CLK_MSK)
 334                             >> SR_FLAGS_CLK_SHFT;
 335
 336                 if (hc->numports == 2)
 337 #ifdef N2_TEST_SPEED
 338                         if (sr_test_speed[1] > 0)
 339                                 hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 340                         else
 341 #endif
 342                         if (flags & SR_FLAGS_1_CLK_MSK)
 343                                 hc->sc[1].clk_cfg = (flags & SR_FLAGS_1_CLK_MSK)
 344                                     >> (SR_FLAGS_CLK_SHFT +
 345                                     SR_FLAGS_CLK_CHAN_SHFT);
 346                 break;
 347         case SR_CRD_N2PCI:
 348                 fecr = sr_read_fecr(hc);
 349                 for (pndx = 0; pndx < hc->numports; pndx++, sc++) {
 350                         switch (pndx) {
 351                         case 1:
 352                                 intf_sw = fecr & SR_FECR_ID1 >> SR_FE_ID1_SHFT;
 353                                 break;
 354                         case 0:
 355                         default:
 356                                 intf_sw = fecr & SR_FECR_ID0 >> SR_FE_ID0_SHFT;
 357                         }
 358
 359 #ifdef N2_TEST_SPEED
 360                         if (sr_test_speed[pndx] > 0)
 361                                 sc->clk_cfg = SR_FLAGS_INT_CLK;
 362                         else
 363 #endif
 364                                 switch (intf_sw) {
 365                                 default:
 366                                 case SR_FE_ID_RS232:
 367                                 case SR_FE_ID_HSSI:
 368                                 case SR_FE_ID_RS422:
 369                                 case SR_FE_ID_TEST:
 370                                         break;
 371
 372                                 case SR_FE_ID_V35:
 373                                         sc->clk_cfg = SR_FLAGS_EXT_SEP_CLK;
 374                                         break;
 375
 376                                 case SR_FE_ID_X21:
 377                                         sc->clk_cfg = SR_FLAGS_EXT_CLK;
 378                                         break;
 379                                 }
 380                 }
 381                 sc = hc->sc;
 382                 break;
 383         }
 384
 385         /*
 386          * Report Card configuration information before we start configuring
 387          * each channel on the card...
 388          */
 389         printf("src%d: %uK RAM (%d mempages) @ %p-%p, %u ports.\n",
 390                hc->cunit, hc->memsize / 1024, hc->mempages,
 391                hc->mem_start, hc->mem_end, hc->numports);
 392
 393         src_init(hc);
 394         sr_init_sca(hc);
 395
 396         if (BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq,
 397             INTR_TYPE_NET, srintr, hc, &hc->intr_cookie) != 0)
 398                 goto errexit;
 399
 400         /*
 401          * Now configure each port on the card.
 402          */
 403         for (unit = 0; unit < hc->numports; sc++, unit++) {
 404                 sc->hc = hc;
 405                 sc->subunit = unit;
 406                 sc->unit = next_sc_unit;
 407                 next_sc_unit++;
 408                 sc->scachan = unit % NCHAN;
 409
 410                 sr_init_rx_dmac(sc);
 411                 sr_init_tx_dmac(sc);
 412                 sr_init_msci(sc);
 413
 414                 printf("sr%d: Adapter %d, port %d.\n",
 415                        sc->unit, hc->cunit, sc->subunit);
 416
 417 #ifndef NETGRAPH
 418                 ifp = &sc->ifsppp.pp_if;
 419                 ifp->if_softc = sc;
 420                 if_initname(ifp, device_get_name(device),
 421                     device_get_unit(device));
 422                 ifp->if_mtu = PP_MTU;
 423                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST |
 424                     IFF_NEEDSGIANT;
 425                 ifp->if_ioctl = srioctl;
 426                 ifp->if_start = srstart;
 427                 ifp->if_watchdog = srwatchdog;
 428
 429                 sc->ifsppp.pp_flags = PP_KEEPALIVE;
 430                 sppp_attach((struct ifnet *)&sc->ifsppp);
 431                 if_attach(ifp);
 432
 433                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
 434 #else   /* NETGRAPH */
 435                 /*
 436                  * we have found a node, make sure our 'type' is availabe.
 437                  */
 438                 if (ngsr_done_init == 0) ngsr_init(NULL);
 439                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
 440                         goto errexit;
 441                 sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
 442                 if (ng_name_node(sc->node, sc->nodename)) {
 443                         NG_NODE_UNREF(sc->node); /* make it go away again */
 444                         goto errexit;
 445                 }
 446                 NG_NODE_SET_PRIVATE(sc->node, sc);
 447                 callout_handle_init(&sc->handle);
 448                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
 449                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
 450                 mtx_init(&sc->xmitq.ifq_mtx, "sr_xmitq", NULL, MTX_DEF);
 451                 mtx_init(&sc->xmitq_hipri.ifq_mtx, "sr_xmitq_hipri", NULL,
 452                     MTX_DEF);
 453                 sc->running = 0;
 454 #endif  /* NETGRAPH */
 455         }
 456
 457         if (hc->mempages)
 458                 SRC_SET_OFF(hc);
 459
 460         return (0);
 461
 462 errexit:
 463         sr_deallocate_resources(device);
 464         return (ENXIO);
 465 }
 466
 467 int
 468 sr_detach(device_t device)
 469 {
 470         device_t parent = device_get_parent(device);
 471         struct sr_hardc *hc = device_get_softc(device);
 472
 473         if (hc->intr_cookie != NULL) {
 474                 if (BUS_TEARDOWN_INTR(parent, device,
 475                         hc->res_irq, hc->intr_cookie) != 0) {
 476                                 printf("intr teardown failed.. continuing\n");
 477                 }
 478                 hc->intr_cookie = NULL;
 479         }
 480
 481         /* XXX Stop the DMA. */
 482
 483         /*
 484          * deallocate any system resources we may have
 485          * allocated on behalf of this driver.
 486          */
 487         FREE(hc->sc, M_DEVBUF);
 488         hc->sc = NULL;
 489         hc->mem_start = NULL;
 490         return (sr_deallocate_resources(device));
 491 }
 492
 493 int
 494 sr_allocate_ioport(device_t device, int rid, u_long size)
 495 {
 496         struct sr_hardc *hc = device_get_softc(device);
 497
 498         hc->rid_ioport = rid;
 499         hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
 500                         &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE);
 501         if (hc->res_ioport == NULL) {
 502                 goto errexit;
 503         }
 504         hc->bt_ioport = rman_get_bustag(hc->res_ioport);
 505         hc->bh_ioport = rman_get_bushandle(hc->res_ioport);
 506
 507         return (0);
 508
 509 errexit:
 510         sr_deallocate_resources(device);
 511         return (ENXIO);
 512 }
 513
 514 int
 515 sr_allocate_irq(device_t device, int rid, u_long size)
 516 {
 517         struct sr_hardc *hc = device_get_softc(device);
 518
 519         hc->rid_irq = rid;
 520         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
 521                         &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
 522         if (hc->res_irq == NULL) {
 523                 goto errexit;
 524         }
 525         return (0);
 526
 527 errexit:
 528         sr_deallocate_resources(device);
 529         return (ENXIO);
 530 }
 531
 532 int
 533 sr_allocate_memory(device_t device, int rid, u_long size)
 534 {
 535         struct sr_hardc *hc = device_get_softc(device);
 536
 537         hc->rid_memory = rid;
 538         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 539                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
 540         if (hc->res_memory == NULL) {
 541                 goto errexit;
 542         }
 543         hc->bt_memory = rman_get_bustag(hc->res_memory);
 544         hc->bh_memory = rman_get_bushandle(hc->res_memory);
 545
 546         return (0);
 547
 548 errexit:
 549         sr_deallocate_resources(device);
 550         return (ENXIO);
 551 }
 552
 553 int
 554 sr_allocate_plx_memory(device_t device, int rid, u_long size)
 555 {
 556         struct sr_hardc *hc = device_get_softc(device);
 557
 558         hc->rid_plx_memory = rid;
 559         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 560                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
 561         if (hc->res_plx_memory == NULL) {
 562                 goto errexit;
 563         }
 564         return (0);
 565
 566 errexit:
 567         sr_deallocate_resources(device);
 568         return (ENXIO);
 569 }
 570
 571 int
 572 sr_deallocate_resources(device_t device)
 573 {
 574         struct sr_hardc *hc = device_get_softc(device);
 575
 576         if (hc->res_irq != 0) {
 577                 bus_deactivate_resource(device, SYS_RES_IRQ,
 578                         hc->rid_irq, hc->res_irq);
 579                 bus_release_resource(device, SYS_RES_IRQ,
 580                         hc->rid_irq, hc->res_irq);
 581                 hc->res_irq = 0;
 582         }
 583         if (hc->res_ioport != 0) {
 584                 bus_deactivate_resource(device, SYS_RES_IOPORT,
 585                         hc->rid_ioport, hc->res_ioport);
 586                 bus_release_resource(device, SYS_RES_IOPORT,
 587                         hc->rid_ioport, hc->res_ioport);
 588                 hc->res_ioport = 0;
 589         }
 590         if (hc->res_memory != 0) {
 591                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 592                         hc->rid_memory, hc->res_memory);
 593                 bus_release_resource(device, SYS_RES_MEMORY,
 594                         hc->rid_memory, hc->res_memory);
 595                 hc->res_memory = 0;
 596         }
 597         if (hc->res_plx_memory != 0) {
 598                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 599                         hc->rid_plx_memory, hc->res_plx_memory);
 600                 bus_release_resource(device, SYS_RES_MEMORY,
 601                         hc->rid_plx_memory, hc->res_plx_memory);
 602                 hc->res_plx_memory = 0;
 603         }
 604         return (0);
 605 }
 606
 607 /*
 608  * N2 Interrupt Service Routine
 609  *
 610  * First figure out which SCA gave the interrupt.
 611  * Process it.
 612  * See if there is other interrupts pending.
 613  * Repeat until there no interrupts remain.
 614  */
 615 static void
 616 srintr(void *arg)
 617 {
 618         struct sr_hardc *hc = (struct sr_hardc *)arg;
 619         sca_regs *sca = hc->sca;        /* MSCI register tree */
 620         u_char  isr0, isr1, isr2;       /* interrupt statii captured */
 621
 622 #if BUGGY > 1
 623         printf("sr: srintr_hc(hc=%08x)\n", hc);
 624 #endif
 625
 626         /*
 627          * Since multiple interfaces may share this interrupt, we must loop
 628          * until no interrupts are still pending service.
 629          */
 630         while (1) {
 631                 /*
 632                  * Read all three interrupt status registers from the N2
 633                  * card...
 634                  */
 635                 isr0 = SRC_GET8(hc, sca->isr0);
 636                 isr1 = SRC_GET8(hc, sca->isr1);
 637                 isr2 = SRC_GET8(hc, sca->isr2);
 638
 639                 /*
 640                  * If all three registers returned 0, we've finished
 641                  * processing interrupts from this device, so we can quit
 642                  * this loop...
 643                  */
 644                 if ((isr0 | isr1 | isr2) == 0)
 645                         break;
 646
 647 #if BUGGY > 2
 648                 printf("src%d: srintr_hc isr0 %x, isr1 %x, isr2 %x\n",
 649 #ifndef NETGRAPH
 650                         unit, isr0, isr1, isr2);
 651 #else
 652                         hc->cunit, isr0, isr1, isr2);
 653 #endif /* NETGRAPH */
 654 #endif
 655
 656                 /*
 657                  * Now we can dispatch the interrupts. Since we don't expect
 658                  * either MSCI or timer interrupts, we'll test for DMA
 659                  * interrupts first...
 660                  */
 661                 if (isr1)       /* DMA-initiated interrupt */
 662                         sr_dmac_intr(hc, isr1);
 663
 664                 if (isr0)       /* serial part IRQ? */
 665                         sr_msci_intr(hc, isr0);
 666
 667                 if (isr2)       /* timer-initiated interrupt */
 668                         sr_timer_intr(hc, isr2);
 669         }
 670 }
 671
 672 /*
 673  * This will only start the transmitter. It is assumed that the data
 674  * is already there.
 675  * It is normally called from srstart() or sr_dmac_intr().
 676  */
 677 static void
 678 sr_xmit(struct sr_softc *sc)
 679 {
 680         u_short cda_value;      /* starting descriptor */
 681         u_short eda_value;      /* ending descriptor */
 682         struct sr_hardc *hc;
 683 #ifndef NETGRAPH
 684         struct ifnet *ifp;      /* O/S Network Services */
 685 #endif /* NETGRAPH */
 686         dmac_channel *dmac;     /* DMA channel registers */
 687
 688 #if BUGGY > 0
 689         printf("sr: sr_xmit( sc=%08x)\n", sc);
 690 #endif
 691
 692         hc = sc->hc;
 693 #ifndef NETGRAPH
 694         ifp = &sc->ifsppp.pp_if;
 695 #endif /* NETGRAPH */
 696         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
 697
 698         /*
 699          * Get the starting and ending addresses of the chain to be
 700          * transmitted and pass these on to the DMA engine on-chip.
 701          */
 702         cda_value = sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart;
 703         cda_value &= 0x00ffff;
 704         eda_value = sc->block[sc->txb_next_tx].txeda + hc->mem_pstart;
 705         eda_value &= 0x00ffff;
 706
 707         SRC_PUT16(hc, dmac->cda, cda_value);
 708         SRC_PUT16(hc, dmac->eda, eda_value);
 709
 710         /*
 711          * Now we'll let the DMA status register know about this change
 712          */
 713         SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);
 714
 715         sc->xmit_busy = 1;      /* mark transmitter busy */
 716
 717 #if BUGGY > 2
 718         printf("sr%d: XMIT  cda=%04x, eda=%4x, rcda=%08lx\n",
 719                sc->unit, cda_value, eda_value,
 720                sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart);
 721 #endif
 722
 723         sc->txb_next_tx++;      /* update next transmit seq# */
 724
 725         if (sc->txb_next_tx == SR_TX_BLOCKS)    /* handle wrap... */
 726                 sc->txb_next_tx = 0;
 727
 728 #ifndef NETGRAPH
 729         /*
 730          * Finally, we'll set a timout (which will start srwatchdog())
 731          * within the O/S network services layer...
 732          */
 733         ifp->if_timer = 2;      /* Value in seconds. */
 734 #else
 735         /*
 736          * Don't time out for a while.
 737          */
 738         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
 739 #endif /* NETGRAPH */
 740 }
 741
 742 /*
 743  * This function will be called from the upper level when a user add a
 744  * packet to be send, and from the interrupt handler after a finished
 745  * transmit.
 746  *
 747  * NOTE: it should run at spl_imp().
 748  *
 749  * This function only place the data in the oncard buffers. It does not
 750  * start the transmition. sr_xmit() does that.
 751  *
 752  * Transmitter idle state is indicated by the IFF_OACTIVE flag.
 753  * The function that clears that should ensure that the transmitter
 754  * and its DMA is in a "good" idle state.
 755  */
 756 #ifndef NETGRAPH
 757 static void
 758 srstart(struct ifnet *ifp)
 759 {
 760         struct sr_softc *sc;    /* channel control structure */
 761 #else
 762 static void
 763 srstart(struct sr_softc *sc)
 764 {
 765 #endif /* NETGRAPH */
 766         struct sr_hardc *hc;    /* card control/config block */
 767         int len;                /* total length of a packet */
 768         int pkts;               /* packets placed in DPRAM */
 769         int tlen;               /* working length of pkt */
 770         u_int i;
 771         struct mbuf *mtx;       /* message buffer from O/S */
 772         u_char *txdata;         /* buffer address in DPRAM */
 773         sca_descriptor *txdesc; /* working descriptor pointr */
 774         struct buf_block *blkp;
 775
 776 #ifndef NETGRAPH
 777 #if BUGGY > 0
 778         printf("sr: srstart( ifp=%08x)\n", ifp);
 779 #endif
 780         sc = ifp->if_softc;
 781         if ((ifp->if_flags & IFF_RUNNING) == 0)
 782                 return;
 783 #endif /* NETGRAPH */
 784         hc = sc->hc;
 785         /*
 786          * It is OK to set the memory window outside the loop because all tx
 787          * buffers and descriptors are assumed to be in the same 16K window.
 788          */
 789         if (hc->mempages) {
 790                 SRC_SET_ON(hc);
 791                 SRC_SET_MEM(hc, sc->block[0].txdesc);
 792         }
 793
 794         /*
 795          * Loop to place packets into DPRAM.
 796          *
 797          * We stay in this loop until there is nothing in
 798          * the TX queue left or the tx buffers are full.
 799          */
 800 top_srstart:
 801
 802         /*
 803          * See if we have space for more packets.
 804          */
 805         if (sc->txb_inuse == SR_TX_BLOCKS) {    /* out of space? */
 806 #ifndef NETGRAPH
 807                 ifp->if_flags |= IFF_OACTIVE;   /* yes, mark active */
 808 #else
 809                 /*ifp->if_flags |= IFF_OACTIVE;*/       /* yes, mark active */
 810 #endif /* NETGRAPH */
 811
 812                 if (hc->mempages)
 813                         SRC_SET_OFF(hc);
 814
 815 #if BUGGY > 9
 816                 printf("sr%d.srstart: sc->txb_inuse=%d; DPRAM full...\n",
 817                        sc->unit, sc->txb_inuse);
 818 #endif
 819                 return;
 820         }
 821         /*
 822          * OK, the card can take more traffic.  Let's see if there's any
 823          * pending from the system...
 824          *
 825          * NOTE:
 826          * The architecture of the networking interface doesn't
 827          * actually call us like 'write()', providing an address.  We get
 828          * started, a lot like a disk strategy routine, and we actually call
 829          * back out to the system to get traffic to send...
 830          *
 831          * NOTE:
 832          * If we were gonna run through another layer, we would use a
 833          * dispatch table to select the service we're getting a packet
 834          * from...
 835          */
 836 #ifndef NETGRAPH
 837         mtx = sppp_dequeue(ifp);
 838 #else /* NETGRAPH */
 839         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 840         if (mtx == NULL) {
 841                 IF_DEQUEUE(&sc->xmitq, mtx);
 842         }
 843 #endif /* NETGRAPH */
 844         if (!mtx) {
 845                 if (hc->mempages)
 846                         SRC_SET_OFF(hc);
 847                 return;
 848         }
 849         /*
 850          * OK, we got a packet from the network services of the O/S. Now we
 851          * can move it into the DPRAM (under control of the descriptors) and
 852          * fire it off...
 853          */
 854         pkts = 0;
 855         i = 0;                  /* counts # of granules used */
 856
 857         blkp = &sc->block[sc->txb_new]; /* address of free granule */
 858         txdesc = (sca_descriptor *)
 859             (hc->mem_start + (blkp->txdesc & hc->winmsk));
 860
 861         txdata = (u_char *)(hc->mem_start
 862                             + (blkp->txstart & hc->winmsk));
 863
 864         /*
 865          * Now we'll try to install as many packets as possible into the
 866          * card's DP RAM buffers.
 867          */
 868         for (;;) {              /* perform actual copy of packet */
 869                 len = mtx->m_pkthdr.len;        /* length of message */
 870
 871 #if BUGGY > 1
 872                 printf("sr%d.srstart: mbuf @ %08lx, %d bytes\n",
 873                            sc->unit, mtx, len);
 874 #endif
 875
 876 #ifndef NETGRAPH
 877                 BPF_MTAP(ifp, mtx);
 878 #else   /* NETGRAPH */
 879                 sc->outbytes += len;
 880 #endif  /* NETGRAPH */
 881
 882                 /*
 883                  * We can perform a straight copy because the tranmit
 884                  * buffers won't wrap.
 885                  */
 886                 m_copydata(mtx, 0, len, txdata);
 887
 888                 /*
 889                  * Now we know how big the message is gonna be.  We must now
 890                  * construct the descriptors to drive this message out...
 891                  */
 892                 tlen = len;
 893                 while (tlen > SR_BUF_SIZ) {     /* loop for full granules */
 894                         txdesc->stat = 0;       /* reset bits */
 895                         txdesc->len = SR_BUF_SIZ;       /* size of granule */
 896                         tlen -= SR_BUF_SIZ;
 897
 898                         txdesc++;       /* move to next dscr */
 899                         txdata += SR_BUF_SIZ;   /* adjust data addr */
 900                         i++;
 901                 }
 902
 903                 /*
 904                  * This section handles the setting of the final piece of a
 905                  * message.
 906                  */
 907                 txdesc->stat = SCA_DESC_EOM;
 908                 txdesc->len = tlen;
 909                 pkts++;
 910
 911                 /*
 912                  * prepare for subsequent packets (if any)
 913                  */
 914                 txdesc++;
 915                 txdata += SR_BUF_SIZ;   /* next mem granule */
 916                 i++;            /* count of granules */
 917
 918                 /*
 919                  * OK, we've now placed the message into the DPRAM where it
 920                  * can be transmitted.  We'll now release the message memory
 921                  * and update the statistics...
 922                  */
 923                 m_freem(mtx);
 924 #ifndef NETGRAPH
 925                 ++sc->ifsppp.pp_if.if_opackets;
 926 #else   /* NETGRAPH */
 927                 sc->opackets++;
 928 #endif /* NETGRAPH */
 929
 930                 /*
 931                  * Check if we have space for another packet. XXX This is
 932                  * hardcoded.  A packet can't be larger than 3 buffers (3 x
 933                  * 512).
 934                  */
 935                 if ((i + 3) >= blkp->txmax) {   /* enough remains? */
 936 #if BUGGY > 9
 937                         printf("sr%d.srstart: i=%d (%d pkts); card full.\n",
 938                                sc->unit, i, pkts);
 939 #endif
 940                         break;
 941                 }
 942                 /*
 943                  * We'll pull the next message to be sent (if any)
 944                  */
 945 #ifndef NETGRAPH
 946                 mtx = sppp_dequeue(ifp);
 947 #else /* NETGRAPH */
 948                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 949                 if (mtx == NULL) {
 950                         IF_DEQUEUE(&sc->xmitq, mtx);
 951                 }
 952 #endif /* NETGRAPH */
 953                 if (!mtx) {     /* no message?  We're done! */
 954 #if BUGGY > 9
 955                         printf("sr%d.srstart: pending=0, pkts=%d\n",
 956                                sc->unit, pkts);
 957 #endif
 958                         break;
 959                 }
 960         }
 961
 962         blkp->txtail = i;       /* record next free granule */
 963
 964         /*
 965          * Mark the last descriptor, so that the SCA know where to stop.
 966          */
 967         txdesc--;               /* back up to last descriptor in list */
 968         txdesc->stat |= SCA_DESC_EOT;   /* mark as end of list */
 969
 970         /*
 971          * Now we'll reset the transmit granule's descriptor address so we
 972          * can record this in the structure and fire it off w/ the DMA
 973          * processor of the serial chip...
 974          */
 975         txdesc = (sca_descriptor *)(uintptr_t)blkp->txdesc;
 976         blkp->txeda = (u_short)((uintptr_t)&txdesc[i]);
 977
 978         sc->txb_inuse++;        /* update inuse status */
 979         sc->txb_new++;          /* new traffic wuz added */
 980
 981         if (sc->txb_new == SR_TX_BLOCKS)
 982                 sc->txb_new = 0;
 983
 984         /*
 985          * If the tranmitter wasn't marked as "busy" we will force it to be
 986          * started...
 987          */
 988         if (sc->xmit_busy == 0) {
 989                 sr_xmit(sc);
 990 #if BUGGY > 9
 991                 printf("sr%d.srstart: called sr_xmit()\n", sc->unit);
 992 #endif
 993         }
 994         goto top_srstart;
 995 }
 996
 997 #ifndef NETGRAPH
 998 /*
 999  * Handle ioctl's at the device level, though we *will* call up
1000  * a layer...
1001  */
1002 #if BUGGY > 2
1003 static int bug_splats[] = {0, 0, 0, 0, 0, 0, 0, 0};
1004 #endif
1005
1006 static int
1007 srioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1008 {
1009         int s, error, was_up, should_be_up;
1010         struct sr_softc *sc = ifp->if_softc;
1011
1012 #if BUGGY > 0
1013         if_printf(ifp, "srioctl(ifp=%08x, cmd=%08x, data=%08x)\n",
1014                ifp, cmd, data);
1015 #endif
1016
1017         was_up = ifp->if_flags & IFF_RUNNING;
1018
1019         error = sppp_ioctl(ifp, cmd, data);
1020
1021 #if BUGGY > 1
1022         if_printf(ifp, "ioctl: ifsppp.pp_flags = %08x, if_flags %08x.\n",
1023               ((struct sppp *)ifp)->pp_flags, ifp->if_flags);
1024 #endif
1025
1026         if (error)
1027                 return error;
1028
1029         if ((cmd != SIOCSIFFLAGS) && (cmd != SIOCSIFADDR)) {
1030 #if BUGGY > 2
1031                 if (bug_splats[sc->unit]++ < 2) {
1032                         printf("sr(%d).if_addrlist = %08x\n",
1033                                sc->unit, ifp->if_addrlist);
1034                         printf("sr(%d).if_bpf = %08x\n",
1035                                sc->unit, ifp->if_bpf);
1036                         printf("sr(%d).if_init = %08x\n",
1037                                sc->unit, ifp->if_init);
1038                         printf("sr(%d).if_output = %08x\n",
1039                                sc->unit, ifp->if_output);
1040                         printf("sr(%d).if_start = %08x\n",
1041                                sc->unit, ifp->if_start);
1042                         printf("sr(%d).if_done = %08x\n",
1043                                sc->unit, ifp->if_done);
1044                         printf("sr(%d).if_ioctl = %08x\n",
1045                                sc->unit, ifp->if_ioctl);
1046                         printf("sr(%d).if_reset = %08x\n",
1047                                sc->unit, ifp->if_reset);
1048                         printf("sr(%d).if_watchdog = %08x\n",
1049                                sc->unit, ifp->if_watchdog);
1050                 }
1051 #endif
1052                 return 0;
1053         }
1054
1055         s = splimp();
1056         should_be_up = ifp->if_flags & IFF_RUNNING;
1057
1058         if (!was_up && should_be_up) {
1059                 /*
1060                  * Interface should be up -- start it.
1061                  */
1062                 sr_up(sc);
1063                 srstart(ifp);
1064
1065                 /*
1066                  * XXX Clear the IFF_UP flag so that the link will only go
1067                  * up after sppp lcp and ipcp negotiation.
1068                  */
1069                 /* ifp->if_flags &= ~IFF_UP; */
1070         } else if (was_up && !should_be_up) {
1071                 /*
1072                  * Interface should be down -- stop it.
1073                  */
1074                 sr_down(sc);
1075                 sppp_flush(ifp);
1076         }
1077         splx(s);
1078         return 0;
1079 }
1080 #endif /* NETGRAPH */
1081
1082 /*
1083  * This is to catch lost tx interrupts.
1084  */
1085 static void
1086 #ifndef NETGRAPH
1087 srwatchdog(struct ifnet *ifp)
1088 #else
1089 srwatchdog(struct sr_softc *sc)
1090 #endif /* NETGRAPH */
1091 {
1092         int     got_st0, got_st1, got_st3, got_dsr;
1093 #ifndef NETGRAPH
1094         struct sr_softc *sc = ifp->if_softc;
1095 #endif /* NETGRAPH */
1096         struct sr_hardc *hc = sc->hc;
1097         msci_channel *msci = &hc->sca->msci[sc->scachan];
1098         dmac_channel *dmac = &sc->hc->sca->dmac[sc->scachan];
1099
1100 #if BUGGY > 0
1101 #ifndef NETGRAPH
1102         printf("srwatchdog(unit=%d)\n", unit);
1103 #else
1104         printf("srwatchdog(unit=%d)\n", sc->unit);
1105 #endif /* NETGRAPH */
1106 #endif
1107
1108 #ifndef NETGRAPH
1109         if (!(ifp->if_flags & IFF_RUNNING))
1110                 return;
1111
1112         ifp->if_oerrors++;      /* update output error count */
1113 #else   /* NETGRAPH */
1114         sc->oerrors++;  /* update output error count */
1115 #endif /* NETGRAPH */
1116
1117         got_st0 = SRC_GET8(hc, msci->st0);
1118         got_st1 = SRC_GET8(hc, msci->st1);
1119         got_st3 = SRC_GET8(hc, msci->st3);
1120         got_dsr = SRC_GET8(hc, dmac->dsr);
1121
1122 #ifndef NETGRAPH
1123 #if     0
1124         if (ifp->if_flags & IFF_DEBUG)
1125 #endif
1126                 printf("sr%d: transmit failed, "
1127 #else   /* NETGRAPH */
1128         printf("sr%d: transmit failed, "
1129 #endif /* NETGRAPH */
1130                        "ST0 %02x, ST1 %02x, ST3 %02x, DSR %02x.\n",
1131                        sc->unit,
1132                        got_st0, got_st1, got_st3, got_dsr);
1133
1134         if (SRC_GET8(hc, msci->st1) & SCA_ST1_UDRN) {
1135                 SRC_PUT8(hc, msci->cmd, SCA_CMD_TXABORT);
1136                 SRC_PUT8(hc, msci->cmd, SCA_CMD_TXENABLE);
1137                 SRC_PUT8(hc, msci->st1, SCA_ST1_UDRN);
1138         }
1139         sc->xmit_busy = 0;
1140 #ifndef NETGRAPH
1141         ifp->if_flags &= ~IFF_OACTIVE;
1142 #else
1143         /*ifp->if_flags &= ~IFF_OACTIVE; */
1144 #endif /* NETGRAPH */
1145
1146         if (sc->txb_inuse && --sc->txb_inuse)
1147                 sr_xmit(sc);
1148
1149 #ifndef NETGRAPH
1150         srstart(ifp);   /* restart transmitter */
1151 #else
1152         srstart(sc);    /* restart transmitter */
1153 #endif /* NETGRAPH */
1154 }
1155
1156 static void
1157 sr_up(struct sr_softc *sc)
1158 {
1159         struct sr_hardc *hc = sc->hc;
1160         sca_regs *sca = hc->sca;
1161         msci_channel *msci = &sca->msci[sc->scachan];
1162
1163 #if BUGGY > 0
1164         printf("sr_up(sc=%08x)\n", sc);
1165 #endif
1166
1167         /*
1168          * Enable transmitter and receiver. Raise DTR and RTS. Enable
1169          * interrupts.
1170          *
1171          * XXX What about using AUTO mode in msci->md0 ???
1172          */
1173         SRC_PUT8(hc, msci->ctl, SRC_GET8(hc, msci->ctl) & ~SCA_CTL_RTS);
1174
1175         if (sc->scachan == 0)
1176                 switch (hc->cardtype) {
1177                 case SR_CRD_N2:
1178                         sr_outb(hc, SR_MCR,
1179                             (sr_inb(hc, SR_MCR) & ~SR_MCR_DTR0));
1180                         break;
1181                 case SR_CRD_N2PCI:
1182                         sr_write_fecr(hc, sr_read_fecr(hc) & ~SR_FECR_DTR0);
1183                         break;
1184                 }
1185         else
1186                 switch (hc->cardtype) {
1187                 case SR_CRD_N2:
1188                         sr_outb(hc, SR_MCR,
1189                             (sr_inb(hc, SR_MCR) & ~SR_MCR_DTR1));
1190                         break;
1191                 case SR_CRD_N2PCI:
1192                         sr_write_fecr(hc, sr_read_fecr(hc) & ~SR_FECR_DTR1);
1193                         break;
1194                 }
1195
1196         if (sc->scachan == 0) {
1197                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) | 0x000F);
1198                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) | 0x000F);
1199         } else {
1200                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) | 0x00F0);
1201                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) | 0x00F0);
1202         }
1203
1204         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXENABLE);
1205         sr_inb(hc, 0);  /* XXX slow it down a bit. */
1206         SRC_PUT8(hc, msci->cmd, SCA_CMD_TXENABLE);
1207
1208 #ifndef NETGRAPH
1209 #ifdef USE_MODEMCK
1210         if (sr_watcher == 0)
1211                 sr_modemck(NULL);
1212 #endif
1213 #else   /* NETGRAPH */
1214         untimeout(ngsr_watchdog_frame, sc, sc->handle);
1215         sc->handle = timeout(ngsr_watchdog_frame, sc, hz);
1216         sc->running = 1;
1217 #endif /* NETGRAPH */
1218 }
1219
1220 static void
1221 sr_down(struct sr_softc *sc)
1222 {
1223         struct sr_hardc *hc = sc->hc;
1224         sca_regs *sca = hc->sca;
1225         msci_channel *msci = &sca->msci[sc->scachan];
1226
1227 #if BUGGY > 0
1228         printf("sr_down(sc=%08x)\n", sc);
1229 #endif
1230 #ifdef NETGRAPH
1231         untimeout(ngsr_watchdog_frame, sc, sc->handle);
1232         sc->running = 0;
1233 #endif /* NETGRAPH */
1234
1235         /*
1236          * Disable transmitter and receiver. Lower DTR and RTS. Disable
1237          * interrupts.
1238          */
1239         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXDISABLE);
1240         sr_inb(hc, 0);  /* XXX slow it down a bit. */
1241         SRC_PUT8(hc, msci->cmd, SCA_CMD_TXDISABLE);
1242
1243         SRC_PUT8(hc, msci->ctl, SRC_GET8(hc, msci->ctl) | SCA_CTL_RTS);
1244
1245         if (sc->scachan == 0)
1246                 switch (hc->cardtype) {
1247                 case SR_CRD_N2:
1248                         sr_outb(hc, SR_MCR, sr_inb(hc, SR_MCR) | SR_MCR_DTR0);
1249                         break;
1250                 case SR_CRD_N2PCI:
1251                         sr_write_fecr(hc, sr_read_fecr(hc) | SR_FECR_DTR0);
1252                         break;
1253                 }
1254         else
1255                 switch (hc->cardtype) {
1256                 case SR_CRD_N2:
1257                         sr_outb(hc, SR_MCR, sr_inb(hc, SR_MCR) | SR_MCR_DTR1);
1258                         break;
1259                 case SR_CRD_N2PCI:
1260                         sr_write_fecr(hc, sr_read_fecr(hc) | SR_FECR_DTR1);
1261                         break;
1262                 }
1263
1264         if (sc->scachan == 0) {
1265                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) & ~0x0F);
1266                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) & ~0x0F);
1267         } else {
1268                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) & ~0xF0);
1269                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) & ~0xF0);
1270         }
1271 }
1272
1273 /*
1274  * Initialize the card, allocate memory for the sr_softc structures
1275  * and fill in the pointers.
1276  */
1277 static void
1278 src_init(struct sr_hardc *hc)
1279 {
1280         struct sr_softc *sc = hc->sc;
1281         int x;
1282         u_int chanmem;
1283         u_int bufmem;
1284         u_int next;
1285         u_int descneeded;
1286
1287 #if BUGGY > 0
1288         printf("src_init(hc=%08x)\n", hc);
1289 #endif
1290
1291         chanmem = hc->memsize / hc->numports;
1292         next = 0;
1293
1294         for (x = 0; x < hc->numports; x++, sc++) {
1295                 int blk;
1296
1297                 for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1298                         sc->block[blk].txdesc = next;
1299                         bufmem = (16 * 1024) / SR_TX_BLOCKS;
1300                         descneeded = bufmem / SR_BUF_SIZ;
1301
1302                         sc->block[blk].txstart = sc->block[blk].txdesc
1303                             + ((((descneeded * sizeof(sca_descriptor))
1304                                  / SR_BUF_SIZ) + 1)
1305                                * SR_BUF_SIZ);
1306
1307                         sc->block[blk].txend = next + bufmem;
1308                         sc->block[blk].txmax =
1309                             (sc->block[blk].txend - sc->block[blk].txstart)
1310                             / SR_BUF_SIZ;
1311                         next += bufmem;
1312
1313 #if BUGGY > 2
1314                         printf("sr%d: blk %d: txdesc %08x, txstart %08x\n",
1315                                sc->unit, blk,
1316                                sc->block[blk].txdesc, sc->block[blk].txstart);
1317 #endif
1318                 }
1319
1320                 sc->rxdesc = next;
1321                 bufmem = chanmem - (bufmem * SR_TX_BLOCKS);
1322                 descneeded = bufmem / SR_BUF_SIZ;
1323                 sc->rxstart = sc->rxdesc +
1324                     ((((descneeded * sizeof(sca_descriptor)) /
1325                        SR_BUF_SIZ) + 1) * SR_BUF_SIZ);
1326                 sc->rxend = next + bufmem;
1327                 sc->rxmax = (sc->rxend - sc->rxstart) / SR_BUF_SIZ;
1328                 next += bufmem;
1329         }
1330 }
1331
1332 /*
1333  * The things done here are channel independent.
1334  *
1335  * Configure the sca waitstates.
1336  * Configure the global interrupt registers.
1337  * Enable master dma enable.
1338  */
1339 static void
1340 sr_init_sca(struct sr_hardc *hc)
1341 {
1342         sca_regs *sca = hc->sca;
1343
1344 #if BUGGY > 0
1345         printf("sr_init_sca(hc=%08x)\n", hc);
1346 #endif
1347
1348         /*
1349          * Do the wait registers. Set everything to 0 wait states.
1350          */
1351         SRC_PUT8(hc, sca->pabr0, 0);
1352         SRC_PUT8(hc, sca->pabr1, 0);
1353         SRC_PUT8(hc, sca->wcrl, 0);
1354         SRC_PUT8(hc, sca->wcrm, 0);
1355         SRC_PUT8(hc, sca->wcrh, 0);
1356
1357         /*
1358          * Configure the interrupt registers. Most are cleared until the
1359          * interface is configured.
1360          */
1361         SRC_PUT8(hc, sca->ier0, 0x00);          /* MSCI interrupts. */
1362         SRC_PUT8(hc, sca->ier1, 0x00);          /* DMAC interrupts */
1363         SRC_PUT8(hc, sca->ier2, 0x00);          /* TIMER interrupts. */
1364         SRC_PUT8(hc, sca->itcr, 0x00);          /* Use ivr and no intr ack */
1365         SRC_PUT8(hc, sca->ivr, 0x40);           /* Interrupt vector. */
1366         SRC_PUT8(hc, sca->imvr, 0x40);
1367
1368         /*
1369          * Configure the timers. XXX Later
1370          */
1371
1372         /*
1373          * Set the DMA channel priority to rotate between all four channels.
1374          *
1375          * Enable all dma channels.
1376          */
1377         SRC_PUT8(hc, sca->pcr, SCA_PCR_PR2);
1378         SRC_PUT8(hc, sca->dmer, SCA_DMER_EN);
1379 }
1380
1381 /*
1382  * Configure the msci
1383  *
1384  * NOTE: The serial port configuration is hardcoded at the moment.
1385  */
1386 static void
1387 sr_init_msci(struct sr_softc *sc)
1388 {
1389         int portndx;            /* on-board port number */
1390         u_int mcr_v;            /* contents of modem control */
1391         struct sr_hardc *hc = sc->hc;
1392         msci_channel *msci = &hc->sca->msci[sc->scachan];
1393 #ifdef N2_TEST_SPEED
1394         int br_v;               /* contents for BR divisor */
1395         int etcndx;             /* index into ETC table */
1396         int fifo_v, gotspeed;   /* final tabled speed found */
1397         int tmc_v;              /* timer control register */
1398         int wanted;             /* speed (bitrate) wanted... */
1399         struct rate_line *rtp;
1400 #endif
1401
1402         portndx = sc->scachan;
1403
1404 #if BUGGY > 0
1405         printf("sr: sr_init_msci( sc=%08x)\n", sc);
1406 #endif
1407
1408         SRC_PUT8(hc, msci->cmd, SCA_CMD_RESET);
1409         SRC_PUT8(hc, msci->md0, SCA_MD0_CRC_1 | SCA_MD0_CRC_CCITT |
1410             SCA_MD0_CRC_ENABLE | SCA_MD0_MODE_HDLC);
1411         SRC_PUT8(hc, msci->md1, SCA_MD1_NOADDRCHK);
1412         SRC_PUT8(hc, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
1413
1414         /*
1415          * According to the manual I should give a reset after changing the
1416          * mode registers.
1417          */
1418         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXRESET);
1419         SRC_PUT8(hc, msci->ctl, SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS);
1420
1421         /*
1422          * XXX Later we will have to support different clock settings.
1423          */
1424         switch (sc->clk_cfg) {
1425         default:
1426 #if BUGGY > 0
1427                 printf("sr%: clk_cfg=%08x, selected default clock.\n",
1428                        portndx, sc->clk_cfg);
1429 #endif
1430                 /* FALLTHROUGH */
1431         case SR_FLAGS_EXT_CLK:
1432                 /*
1433                  * For now all interfaces are programmed to use the RX clock
1434                  * for the TX clock.
1435                  */
1436
1437 #if BUGGY > 0
1438                 printf("sr%d: External Clock Selected.\n", portndx);
1439 #endif
1440
1441                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1442                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_RX | SCA_TXS_DIV1);
1443                 break;
1444
1445         case SR_FLAGS_EXT_SEP_CLK:
1446 #if BUGGY > 0
1447                 printf("sr%d: Split Clocking Selected.\n", portndx);
1448 #endif
1449
1450                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1451                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_TXC | SCA_TXS_DIV1);
1452                 break;
1453
1454         case SR_FLAGS_INT_CLK:
1455 #if BUGGY > 0
1456                 printf("sr%d: Internal Clocking selected.\n", portndx);
1457 #endif
1458
1459                 /*
1460                  * XXX I do need some code to set the baud rate here!
1461                  */
1462 #ifdef N2_TEST_SPEED
1463                 switch (hc->cardtype) {
1464                 case SR_CRD_N2PCI:
1465                         mcr_v = sr_read_fecr(hc);
1466                         etcndx = 2;
1467                         break;
1468                 case SR_CRD_N2:
1469                 default:
1470                         mcr_v = sr_inb(hc, SR_MCR);
1471                         etcndx = 0;
1472                 }
1473
1474                 fifo_v = 0x10;  /* stolen from Linux version */
1475
1476                 /*
1477                  * search for appropriate speed in table, don't calc it:
1478                  */
1479                 wanted = sr_test_speed[portndx];
1480                 rtp = &n2_rates[0];     /* point to first table item */
1481
1482                 while ((rtp->target > 0)        /* search table for speed */
1483                        &&(rtp->target != wanted))
1484                         rtp++;
1485
1486                 /*
1487                  * We've searched the table for a matching speed.  If we've
1488                  * found the correct rate line, we'll get the pre-calc'd
1489                  * values for the TMC and baud rate divisor for subsequent
1490                  * use...
1491                  */
1492                 if (rtp->target > 0) {  /* use table-provided values */
1493                         gotspeed = wanted;
1494                         tmc_v = rtp->tmc_reg;
1495                         br_v = rtp->br_reg;
1496                 } else {        /* otherwise assume 1MBit comm rate */
1497                         gotspeed = 10000;
1498                         tmc_v = 5;
1499                         br_v = 1;
1500                 }
1501
1502                 /*
1503                  * Now we mask in the enable clock output for the MCR:
1504                  */
1505                 mcr_v |= etc0vals[etcndx + portndx];
1506
1507                 /*
1508                  * Now we'll program the registers with these speed- related
1509                  * contents...
1510                  */
1511                 SRC_PUT8(hc, msci->tmc, tmc_v);
1512                 SRC_PUT8(hc, msci->trc0, fifo_v);
1513                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_INT + br_v);
1514                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_INT + br_v);
1515
1516                 switch (hc->cardtype) {
1517                 case SR_CRD_N2PCI:
1518                         sr_write_fecr(hc, mcr_v);
1519                         break;
1520                 case SR_CRD_N2:
1521                 default:
1522                         sr_outb(hc, SR_MCR, mcr_v);
1523                 }
1524
1525 #if BUGGY > 0
1526                 if (wanted != gotspeed)
1527                         printf("sr%d: Speed wanted=%d, found=%d\n",
1528                                wanted, gotspeed);
1529
1530                 printf("sr%d: Internal Clock %dx100 BPS, tmc=%d, div=%d\n",
1531                        portndx, gotspeed, tmc_v, br_v);
1532 #endif
1533 #else
1534                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_INT | SCA_RXS_DIV1);
1535                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_INT | SCA_TXS_DIV1);
1536
1537                 SRC_PUT8(hc, msci->tmc, 5);
1538
1539                 if (portndx == 0)
1540                         switch (hc->cardtype) {
1541                         case SR_CRD_N2PCI:
1542                                 sr_write_fecr(hc,
1543                                     sr_read_fecr(hc) | SR_FECR_ETC0);
1544                                 break;
1545                         case SR_CRD_N2:
1546                         default:
1547                                 mcr_v = sr_inb(hc, SR_MCR);
1548                                 mcr_v |= SR_MCR_ETC0;
1549                                 sr_outb(hc, SR_MCR, mcr_v);
1550                         }
1551                 else
1552                         switch (hc->cardtype) {
1553                         case SR_CRD_N2:
1554                                 mcr_v = sr_inb(hc, SR_MCR);
1555                                 mcr_v |= SR_MCR_ETC1;
1556                                 sr_outb(hc, SR_MCR, mcr_v);
1557                                 break;
1558                         case SR_CRD_N2PCI:
1559                                 sr_write_fecr(hc,
1560                                     sr_read_fecr(hc) | SR_FECR_ETC1);
1561                                 break;
1562                         }
1563 #endif
1564         }
1565
1566         /*
1567          * XXX Disable all interrupts for now. I think if you are using the
1568          * dmac you don't use these interrupts.
1569          */
1570         SRC_PUT8(hc, msci->ie0, 0);
1571         SRC_PUT8(hc, msci->ie1, 0x0C);
1572         SRC_PUT8(hc, msci->ie2, 0);
1573         SRC_PUT8(hc, msci->fie, 0);
1574
1575         SRC_PUT8(hc, msci->sa0, 0);
1576         SRC_PUT8(hc, msci->sa1, 0);
1577
1578         SRC_PUT8(hc, msci->idl, 0x7E);  /* set flags value */
1579
1580         SRC_PUT8(hc, msci->rrc, 0x0E);
1581         SRC_PUT8(hc, msci->trc0, 0x10);
1582         SRC_PUT8(hc, msci->trc1, 0x1F);
1583 }
1584
1585 /*
1586  * Configure the rx dma controller.
1587  */
1588 static void
1589 sr_init_rx_dmac(struct sr_softc *sc)
1590 {
1591         struct sr_hardc *hc;
1592         dmac_channel *dmac;
1593         sca_descriptor *rxd;
1594         u_int cda_v, sarb_v, rxbuf, rxda, rxda_d;
1595
1596 #if BUGGY > 0
1597         printf("sr_init_rx_dmac(sc=%08x)\n", sc);
1598 #endif
1599
1600         hc = sc->hc;
1601         dmac = &hc->sca->dmac[DMAC_RXCH(sc->scachan)];
1602
1603         if (hc->mempages)
1604                 SRC_SET_MEM(hc, sc->rxdesc);
1605
1606         /*
1607          * This phase initializes the contents of the descriptor table
1608          * needed to construct a circular buffer...
1609          */
1610         rxd = (sca_descriptor *)(hc->mem_start + (sc->rxdesc & hc->winmsk));
1611         rxda_d = (uintptr_t) hc->mem_start - (sc->rxdesc & ~hc->winmsk);
1612
1613         for (rxbuf = sc->rxstart;
1614              rxbuf < sc->rxend;
1615              rxbuf += SR_BUF_SIZ, rxd++) {
1616                 /*
1617                  * construct the circular chain...
1618                  */
1619                 rxda = (uintptr_t) &rxd[1] - rxda_d + hc->mem_pstart;
1620                 rxd->cp = (u_short)(rxda & 0xffff);
1621
1622                 /*
1623                  * set the on-card buffer address...
1624                  */
1625                 rxd->bp = (u_short)((rxbuf + hc->mem_pstart) & 0xffff);
1626                 rxd->bpb = (u_char)(((rxbuf + hc->mem_pstart) >> 16) & 0xff);
1627
1628                 rxd->len = 0;   /* bytes resident w/in granule */
1629                 rxd->stat = 0xff;       /* The sca write here when finished */
1630         }
1631
1632         /*
1633          * heal the chain so that the last entry points to the first...
1634          */
1635         rxd--;
1636         rxd->cp = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1637
1638         /*
1639          * reset the reception handler's index...
1640          */
1641         sc->rxhind = 0;
1642
1643         /*
1644          * We'll now configure the receiver's DMA logic...
1645          */
1646         SRC_PUT8(hc, dmac->dsr, 0);     /* Disable DMA transfer */
1647         SRC_PUT8(hc, dmac->dcr, SCA_DCR_ABRT);
1648
1649         /* XXX maybe also SCA_DMR_CNTE */
1650         SRC_PUT8(hc, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1651         SRC_PUT16(hc, dmac->bfl, SR_BUF_SIZ);
1652
1653         cda_v = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1654         sarb_v = (u_char)(((sc->rxdesc + hc->mem_pstart) >> 16) & 0xff);
1655
1656         SRC_PUT16(hc, dmac->cda, cda_v);
1657         SRC_PUT8(hc, dmac->sarb, sarb_v);
1658
1659         rxd = (sca_descriptor *)(uintptr_t)sc->rxstart;
1660
1661         SRC_PUT16(hc, dmac->eda,
1662             (u_short)((uintptr_t)&rxd[sc->rxmax - 1] & 0xffff));
1663
1664         SRC_PUT8(hc, dmac->dir, 0xF0);
1665
1666         SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);    /* Enable DMA */
1667 }
1668
1669 /*
1670  * Configure the TX DMA descriptors.
1671  * Initialize the needed values and chain the descriptors.
1672  */
1673 static void
1674 sr_init_tx_dmac(struct sr_softc *sc)
1675 {
1676         int blk;
1677         u_int txbuf, txda, txda_d;
1678         struct sr_hardc *hc;
1679         sca_descriptor *txd;
1680         dmac_channel *dmac;
1681         struct buf_block *blkp;
1682         u_int x;
1683         u_int sarb_v;
1684
1685 #if BUGGY > 0
1686         printf("sr_init_tx_dmac(sc=%08x)\n", sc);
1687 #endif
1688
1689         hc = sc->hc;
1690         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
1691
1692         if (hc->mempages)
1693                 SRC_SET_MEM(hc, sc->block[0].txdesc);
1694
1695         /*
1696          * Initialize the array of descriptors for transmission
1697          */
1698         for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1699                 blkp = &sc->block[blk];
1700                 txd = (sca_descriptor *)(hc->mem_start
1701                                          + (blkp->txdesc & hc->winmsk));
1702                 txda_d = (uintptr_t) hc->mem_start
1703                     - (blkp->txdesc & ~hc->winmsk);
1704
1705                 x = 0;
1706                 txbuf = blkp->txstart;
1707                 for (; txbuf < blkp->txend; txbuf += SR_BUF_SIZ, txd++) {
1708                         txda = (uintptr_t) &txd[1] - txda_d + hc->mem_pstart;
1709                         txd->cp = (u_short)(txda & 0xffff);
1710
1711                         txd->bp = (u_short)((txbuf + hc->mem_pstart)
1712                                             & 0xffff);
1713                         txd->bpb = (u_char)(((txbuf + hc->mem_pstart) >> 16)
1714                                             & 0xff);
1715                         txd->len = 0;
1716                         txd->stat = 0;
1717                         x++;
1718                 }
1719
1720                 txd--;
1721                 txd->cp = (u_short)((blkp->txdesc + hc->mem_pstart)
1722                                     & 0xffff);
1723
1724                 blkp->txtail = (uintptr_t)txd - (uintptr_t)hc->mem_start;
1725         }
1726
1727         SRC_PUT8(hc, dmac->dsr, 0);     /* Disable DMA */
1728         SRC_PUT8(hc, dmac->dcr, SCA_DCR_ABRT);
1729         SRC_PUT8(hc, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1730         SRC_PUT8(hc, dmac->dir, SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF);
1731
1732         sarb_v = (sc->block[0].txdesc + hc->mem_pstart) >> 16;
1733         sarb_v &= 0x00ff;
1734
1735         SRC_PUT8(hc, dmac->sarb, (u_char) sarb_v);
1736 }
1737
1738 /*
1739  * Look through the descriptors to see if there is a complete packet
1740  * available. Stop if we get to where the sca is busy.
1741  *
1742  * Return the length and status of the packet.
1743  * Return nonzero if there is a packet available.
1744  *
1745  * NOTE:
1746  * It seems that we get the interrupt a bit early. The updateing of
1747  * descriptor values is not always completed when this is called.
1748  */
1749 static int
1750 sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat)
1751 {
1752         int granules;   /* count of granules in pkt */
1753         int wki, wko;
1754         struct sr_hardc *hc;
1755         sca_descriptor *rxdesc; /* current descriptor */
1756         sca_descriptor *endp;   /* ending descriptor */
1757         sca_descriptor *cda;    /* starting descriptor */
1758
1759         hc = sc->hc;            /* get card's information */
1760
1761         /*
1762          * set up starting descriptor by pulling that info from the DMA half
1763          * of the HD chip...
1764          */
1765         wki = DMAC_RXCH(sc->scachan);
1766         wko = SRC_GET16(hc, hc->sca->dmac[wki].cda);
1767
1768         cda = (sca_descriptor *)(hc->mem_start + (wko & hc->winmsk));
1769
1770 #if BUGGY > 1
1771         printf("sr_packet_avail(): wki=%d, wko=%04x, cda=%08x\n",
1772                wki, wko, cda);
1773 #endif
1774
1775         /*
1776          * open the appropriate memory window and set our expectations...
1777          */
1778         if (hc->mempages) {
1779                 SRC_SET_MEM(hc, sc->rxdesc);
1780                 SRC_SET_ON(hc);
1781         }
1782         rxdesc = (sca_descriptor *)
1783             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1784         endp = rxdesc;
1785         rxdesc = &rxdesc[sc->rxhind];
1786         endp = &endp[sc->rxmax];
1787
1788         *len = 0;               /* reset result total length */
1789         granules = 0;           /* reset count of granules */
1790
1791         /*
1792          * This loop will scan descriptors, but it *will* puke up if we wrap
1793          * around to our starting point...
1794          */
1795         while (rxdesc != cda) {
1796                 *len += rxdesc->len;    /* increment result length */
1797                 granules++;
1798
1799                 /*
1800                  * If we hit a valid packet's completion we'll know we've
1801                  * got a live one, and that we can deliver the packet.
1802                  * Since we're only allowed to report a packet available,
1803                  * somebody else does that...
1804                  */
1805                 if (rxdesc->stat & SCA_DESC_EOM) {      /* End Of Message */
1806                         *rxstat = rxdesc->stat; /* return closing */
1807 #if BUGGY > 0
1808                         printf("sr%d: PKT AVAIL len %d, %x, bufs %u.\n",
1809                                sc->unit, *len, *rxstat, granules);
1810 #endif
1811                         return 1;       /* indicate success */
1812                 }
1813                 /*
1814                  * OK, this packet take up multiple granules.  Move on to
1815                  * the next descriptor so we can consider it...
1816                  */
1817                 rxdesc++;
1818
1819                 if (rxdesc == endp)     /* recognize & act on wrap point */
1820                         rxdesc = (sca_descriptor *)
1821                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1822         }
1823
1824         /*
1825          * Nothing found in the DPRAM.  Let the caller know...
1826          */
1827         *len = 0;
1828         *rxstat = 0;
1829
1830         return 0;
1831 }
1832
1833 /*
1834  * Copy a packet from the on card memory into a provided mbuf.
1835  * Take into account that buffers wrap and that a packet may
1836  * be larger than a buffer.
1837  */
1838 static void
1839 sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len)
1840 {
1841         struct sr_hardc *hc;
1842         sca_descriptor *rxdesc;
1843         u_int rxdata;
1844         u_int rxmax;
1845         u_int off = 0;
1846         u_int tlen;
1847
1848 #if BUGGY > 0
1849         printf("sr_copy_rxbuf(m=%08x,sc=%08x,len=%d)\n",
1850                m, sc, len);
1851 #endif
1852
1853         hc = sc->hc;
1854
1855         rxdata = sc->rxstart + (sc->rxhind * SR_BUF_SIZ);
1856         rxmax = sc->rxstart + (sc->rxmax * SR_BUF_SIZ);
1857
1858         rxdesc = (sca_descriptor *)
1859             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1860         rxdesc = &rxdesc[sc->rxhind];
1861
1862         /*
1863          * Using the count of bytes in the received packet, we decrement it
1864          * for each granule (controller by an SCA descriptor) to control the
1865          * looping...
1866          */
1867         while (len) {
1868                 /*
1869                  * tlen gets the length of *this* granule... ...which is
1870                  * then copied to the target buffer.
1871                  */
1872                 tlen = (len < SR_BUF_SIZ) ? len : SR_BUF_SIZ;
1873
1874                 if (hc->mempages)
1875                         SRC_SET_MEM(hc, rxdata);
1876
1877                 bcopy(hc->mem_start + (rxdata & hc->winmsk),
1878                       mtod(m, caddr_t) +off,
1879                       tlen);
1880
1881                 off += tlen;
1882                 len -= tlen;
1883
1884                 /*
1885                  * now, return to the descriptor's window in DPRAM and reset
1886                  * the descriptor we've just suctioned...
1887                  */
1888                 if (hc->mempages)
1889                         SRC_SET_MEM(hc, sc->rxdesc);
1890
1891                 rxdesc->len = 0;
1892                 rxdesc->stat = 0xff;
1893
1894                 /*
1895                  * Move on to the next granule.  If we've any remaining
1896                  * bytes to process we'll just continue in our loop...
1897                  */
1898                 rxdata += SR_BUF_SIZ;
1899                 rxdesc++;
1900
1901                 if (rxdata == rxmax) {  /* handle the wrap point */
1902                         rxdata = sc->rxstart;
1903                         rxdesc = (sca_descriptor *)
1904                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1905                 }
1906         }
1907 }
1908
1909 /*
1910  * If single is set, just eat a packet. Otherwise eat everything up to
1911  * where cda points. Update pointers to point to the next packet.
1912  *
1913  * This handles "flushing" of a packet as received...
1914  *
1915  * If the "single" parameter is zero, all pending reeceive traffic will
1916  * be flushed out of existence.  A non-zero value will only drop the
1917  * *next* (currently) pending packet...
1918  */
1919 static void
1920 sr_eat_packet(struct sr_softc *sc, int single)
1921 {
1922         struct sr_hardc *hc;
1923         sca_descriptor *rxdesc; /* current descriptor being eval'd */
1924         sca_descriptor *endp;   /* last descriptor in chain */
1925         sca_descriptor *cda;    /* current start point */
1926         u_int loopcnt = 0;      /* count of packets flushed ??? */
1927         u_char stat;            /* captured status byte from descr */
1928
1929         hc = sc->hc;
1930         cda = (sca_descriptor *)(hc->mem_start + (SRC_GET16(hc,
1931             hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda) & hc->winmsk));
1932
1933         /*
1934          * loop until desc->stat == (0xff || EOM) Clear the status and
1935          * length in the descriptor. Increment the descriptor.
1936          */
1937         if (hc->mempages)
1938                 SRC_SET_MEM(hc, sc->rxdesc);
1939
1940         rxdesc = (sca_descriptor *)
1941             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1942         endp = rxdesc;
1943         rxdesc = &rxdesc[sc->rxhind];
1944         endp = &endp[sc->rxmax];
1945
1946         /*
1947          * allow loop, but abort it if we wrap completely...
1948          */
1949         while (rxdesc != cda) {
1950                 loopcnt++;
1951
1952                 if (loopcnt > sc->rxmax) {
1953                         printf("sr%d: eat pkt %d loop, cda %p, "
1954                                "rxdesc %p, stat %x.\n",
1955                                sc->unit, loopcnt, cda, rxdesc,
1956                                rxdesc->stat);
1957                         break;
1958                 }
1959                 stat = rxdesc->stat;
1960
1961                 rxdesc->len = 0;
1962                 rxdesc->stat = 0xff;
1963
1964                 rxdesc++;
1965                 sc->rxhind++;
1966
1967                 if (rxdesc == endp) {
1968                         rxdesc = (sca_descriptor *)
1969                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1970                         sc->rxhind = 0;
1971                 }
1972                 if (single && (stat == SCA_DESC_EOM))
1973                         break;
1974         }
1975
1976         /*
1977          * Update the eda to the previous descriptor.
1978          */
1979         rxdesc = (sca_descriptor *)(uintptr_t)sc->rxdesc;
1980         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2) % sc->rxmax];
1981
1982         SRC_PUT16(hc, hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
1983             (u_short)(((uintptr_t)rxdesc + hc->mem_pstart) & 0xffff));
1984 }
1985
1986 /*
1987  * While there is packets available in the rx buffer, read them out
1988  * into mbufs and ship them off.
1989  */
1990 static void
1991 sr_get_packets(struct sr_softc *sc)
1992 {
1993         u_char rxstat;          /* acquired status byte */
1994         int i;
1995         int pkts;               /* count of packets found */
1996         int rxndx;              /* rcv buffer index */
1997         int tries;              /* settling time counter */
1998         u_int len;              /* length of pending packet */
1999         struct sr_hardc *hc;    /* card-level information */
2000         sca_descriptor *rxdesc; /* descriptor in memory */
2001 #ifndef NETGRAPH
2002         struct ifnet *ifp;      /* network intf ctl table */
2003 #else
2004         int error;
2005 #endif /* NETGRAPH */
2006         struct mbuf *m = NULL;  /* message buffer */
2007
2008 #if BUGGY > 0
2009         printf("sr_get_packets(sc=%08x)\n", sc);
2010 #endif
2011
2012         hc = sc->hc;
2013 #ifndef NETGRAPH
2014         ifp = &sc->ifsppp.pp_if;
2015 #endif /* NETGRAPH */
2016
2017         if (hc->mempages) {
2018                 SRC_SET_MEM(hc, sc->rxdesc);
2019                 SRC_SET_ON(hc); /* enable shared memory */
2020         }
2021         pkts = 0;               /* reset count of found packets */
2022
2023         /*
2024          * for each complete packet in the receiving pool, process each
2025          * packet...
2026          */
2027         while (sr_packet_avail(sc, &len, &rxstat)) {    /* packet pending? */
2028                 /*
2029                  * I have seen situations where we got the interrupt but the
2030                  * status value wasn't deposited.  This code should allow
2031                  * the status byte's value to settle...
2032                  */
2033
2034                 tries = 5;
2035
2036                 while ((rxstat == 0x00ff)
2037                        && --tries)
2038                         sr_packet_avail(sc, &len, &rxstat);
2039
2040 #if BUGGY > 1
2041                 printf("sr_packet_avail() returned len=%d, rxstat=%02ux\n",
2042                        len, rxstat);
2043 #endif
2044
2045                 pkts++;
2046 #ifdef NETGRAPH
2047                 sc->inbytes += len;
2048                 sc->inlast = 0;
2049 #endif /* NETGRAPH */
2050
2051                 /*
2052                  * OK, we've settled the incoming message status. We can now
2053                  * process it...
2054                  */
2055                 if (((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
2056 #if BUGGY > 1
2057                         printf("sr%d: sr_get_packet() rxstat=%02x, len=%d\n",
2058                                sc->unit, rxstat, len);
2059 #endif
2060
2061                         MGETHDR(m, M_DONTWAIT, MT_DATA);
2062                         if (m == NULL) {
2063                                 /*
2064                                  * eat (flush) packet if get mbuf fail!!
2065                                  */
2066                                 sr_eat_packet(sc, 1);
2067                                 continue;
2068                         }
2069                         /*
2070                          * construct control information for pass-off
2071                          */
2072 #ifndef NETGRAPH
2073                         m->m_pkthdr.rcvif = ifp;
2074 #else
2075                         m->m_pkthdr.rcvif = NULL;
2076 #endif /* NETGRAPH */
2077                         m->m_pkthdr.len = m->m_len = len;
2078                         if (len > MHLEN) {
2079                                 MCLGET(m, M_DONTWAIT);
2080                                 if ((m->m_flags & M_EXT) == 0) {
2081                                         /*
2082                                          * We couldn't get a big enough
2083                                          * message packet, so we'll send the
2084                                          * packet to /dev/null...
2085                                          */
2086                                         m_freem(m);
2087                                         sr_eat_packet(sc, 1);
2088                                         continue;
2089                                 }
2090                         }
2091                         /*
2092                          * OK, we've got a good message buffer.  Now we can
2093                          * copy the received message into it
2094                          */
2095                         sr_copy_rxbuf(m, sc, len);      /* copy from DPRAM */
2096
2097 #ifndef NETGRAPH
2098                         BPF_MTAP(ifp, m);
2099
2100 #if BUGGY > 3
2101                         {
2102                                 u_char *bp;
2103
2104                                 bp = (u_char *)m;
2105                                 printf("sr%d: rcvd=%02x%02x%02x%02x%02x%02x\n",
2106                                        sc->unit,
2107                                        bp[0], bp[1], bp[2],
2108                                        bp[4], bp[5], bp[6]);
2109                         }
2110 #endif
2111                         sppp_input(ifp, m);
2112                         ifp->if_ipackets++;
2113
2114 #else   /* NETGRAPH */
2115 #if BUGGY > 3
2116                         {
2117                                 u_char *bp;
2118
2119                                 bp = mtod(m,u_char *);
2120                                 printf("sr%d: rd=%02x:%02x:%02x:%02x:%02x:%02x",
2121                                        sc->unit,
2122                                        bp[0], bp[1], bp[2],
2123                                        bp[4], bp[5], bp[6]);
2124                                 printf(":%02x:%02x:%02x:%02x:%02x:%02x\n",
2125                                        bp[6], bp[7], bp[8],
2126                                        bp[9], bp[10], bp[11]);
2127                         }
2128 #endif
2129                         NG_SEND_DATA_ONLY(error, sc->hook, m);
2130                         sc->ipackets++;
2131 #endif /* NETGRAPH */
2132                         /*
2133                          * Update the eda to the previous descriptor.
2134                          */
2135                         i = (len + SR_BUF_SIZ - 1) / SR_BUF_SIZ;
2136                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
2137
2138                         rxdesc = (sca_descriptor *)(uintptr_t)sc->rxdesc;
2139                         rxndx = (sc->rxhind + sc->rxmax - 2) % sc->rxmax;
2140                         rxdesc = &rxdesc[rxndx];
2141
2142                         SRC_PUT16(hc, hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2143                             (u_short)(((uintptr_t)rxdesc + hc->mem_pstart)
2144                             & 0xffff));
2145
2146                 } else {
2147                         int got_st3, got_cda, got_eda;
2148                         int tries = 5;
2149
2150                         while ((rxstat == 0xff) && --tries)
2151                                 sr_packet_avail(sc, &len, &rxstat);
2152
2153                         /*
2154                          * It look like we get an interrupt early
2155                          * sometimes and then the status is not
2156                          * filled in yet.
2157                          */
2158                         if (tries && (tries != 5))
2159                                 continue;
2160
2161                         /*
2162                          * This chunk of code handles the error packets.
2163                          * We'll log them for posterity...
2164                          */
2165                         sr_eat_packet(sc, 1);
2166
2167 #ifndef NETGRAPH
2168                         ifp->if_ierrors++;
2169 #else
2170                         sc->ierrors[0]++;
2171 #endif /* NETGRAPH */
2172
2173                         got_st3 = SRC_GET8(hc,
2174                                   hc->sca->msci[sc->scachan].st3);
2175                         got_cda = SRC_GET16(hc,
2176                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda);
2177                         got_eda = SRC_GET16(hc,
2178                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda);
2179
2180 #if BUGGY > 0
2181                         printf("sr%d: Receive error chan %d, "
2182                                "stat %02x, msci st3 %02x,"
2183                                "rxhind %d, cda %04x, eda %04x.\n",
2184                                sc->unit, sc->scachan, rxstat,
2185                                got_st3, sc->rxhind, got_cda, got_eda);
2186 #endif
2187                 }
2188         }
2189
2190 #if BUGGY > 0
2191         printf("sr%d: sr_get_packets() found %d packet(s)\n",
2192                sc->unit, pkts);
2193 #endif
2194
2195         if (hc->mempages)
2196                 SRC_SET_OFF(hc);
2197 }
2198
2199 /*
2200  * All DMA interrupts come here.
2201  *
2202  * Each channel has two interrupts.
2203  * Interrupt A for errors and Interrupt B for normal stuff like end
2204  * of transmit or receive dmas.
2205  */
2206 static void
2207 sr_dmac_intr(struct sr_hardc *hc, u_char isr1)
2208 {
2209         u_char dsr;             /* contents of DMA Stat Reg */
2210         u_char dotxstart;       /* enables for tranmit part */
2211         int mch;                /* channel being processed */
2212         struct sr_softc *sc;    /* channel's softc structure */
2213         sca_regs *sca = hc->sca;
2214         dmac_channel *dmac;     /* dma structure of chip */
2215
2216 #if BUGGY > 0
2217         printf("sr_dmac_intr(hc=%08x,isr1=%04x)\n", hc, isr1);
2218 #endif
2219
2220         mch = 0;                /* assume chan0 on card */
2221         dotxstart = isr1;       /* copy for xmitter starts */
2222
2223         /*
2224          * Shortcut if there is no interrupts for dma channel 0 or 1.
2225          * Skip processing for channel 0 if no incoming hit
2226          */
2227         if ((isr1 & 0x0F) == 0) {
2228                 mch = 1;
2229                 isr1 >>= 4;
2230         }
2231         do {
2232                 sc = &hc->sc[mch];
2233
2234                 /*
2235                  * Transmit channel - DMA Status Register Evaluation
2236                  */
2237                 if (isr1 & 0x0C) {
2238                         dmac = &sca->dmac[DMAC_TXCH(mch)];
2239
2240                         /*
2241                          * get the DMA Status Register contents and write
2242                          * back to reset interrupt...
2243                          */
2244                         dsr = SRC_GET8(hc, dmac->dsr);
2245                         SRC_PUT8(hc, dmac->dsr, dsr);
2246
2247                         /*
2248                          * Check for (& process) a Counter overflow
2249                          */
2250                         if (dsr & SCA_DSR_COF) {
2251                                 printf("sr%d: TX DMA Counter overflow, "
2252                                        "txpacket no %lu.\n",
2253 #ifndef NETGRAPH
2254                                        sc->unit, sc->ifsppp.pp_if.if_opackets);
2255                                 sc->ifsppp.pp_if.if_oerrors++;
2256 #else
2257                                        sc->unit, sc->opackets);
2258                                 sc->oerrors++;
2259 #endif /* NETGRAPH */
2260                         }
2261                         /*
2262                          * Check for (& process) a Buffer overflow
2263                          */
2264                         if (dsr & SCA_DSR_BOF) {
2265                                 printf("sr%d: TX DMA Buffer overflow, "
2266                                        "txpacket no %lu, dsr %02x, "
2267                                        "cda %04x, eda %04x.\n",
2268 #ifndef NETGRAPH
2269                                        sc->unit, sc->ifsppp.pp_if.if_opackets,
2270 #else
2271                                        sc->unit, sc->opackets,
2272 #endif /* NETGRAPH */
2273                                        dsr,
2274                                        SRC_GET16(hc, dmac->cda),
2275                                        SRC_GET16(hc, dmac->eda));
2276 #ifndef NETGRAPH
2277                                 sc->ifsppp.pp_if.if_oerrors++;
2278 #else
2279                                 sc->oerrors++;
2280 #endif /* NETGRAPH */
2281                         }
2282                         /*
2283                          * Check for (& process) an End of Transfer (OK)
2284                          */
2285                         if (dsr & SCA_DSR_EOT) {
2286                                 /*
2287                                  * This should be the most common case.
2288                                  *
2289                                  * Clear the IFF_OACTIVE flag.
2290                                  *
2291                                  * Call srstart to start a new transmit if
2292                                  * there is data to transmit.
2293                                  */
2294 #if BUGGY > 0
2295                                 printf("sr%d: TX Completed OK\n", sc->unit);
2296 #endif
2297                                 sc->xmit_busy = 0;
2298 #ifndef NETGRAPH
2299                                 sc->ifsppp.pp_if.if_flags &= ~IFF_OACTIVE;
2300                                 sc->ifsppp.pp_if.if_timer = 0;
2301 #else
2302                                 /* XXX may need to mark tx inactive? */
2303                                 sc->out_deficit++;
2304                                 sc->out_dog = DOG_HOLDOFF;
2305 #endif /* NETGRAPH */
2306
2307                                 if (sc->txb_inuse && --sc->txb_inuse)
2308                                         sr_xmit(sc);
2309                         }
2310                 }
2311                 /*
2312                  * Receive channel processing of DMA Status Register
2313                  */
2314                 if (isr1 & 0x03) {
2315                         dmac = &sca->dmac[DMAC_RXCH(mch)];
2316
2317                         dsr = SRC_GET8(hc, dmac->dsr);
2318                         SRC_PUT8(hc, dmac->dsr, dsr);
2319
2320                         /*
2321                          * End of frame processing (MSG OK?)
2322                          */
2323                         if (dsr & SCA_DSR_EOM) {
2324 #if BUGGY > 0
2325                                 int tt, ind;
2326
2327 #ifndef NETGRAPH
2328                                 tt = sc->ifsppp.pp_if.if_ipackets;
2329 #else   /* NETGRAPH */
2330                                 tt = sc->ipackets;
2331 #endif /* NETGRAPH */
2332                                 ind = sc->rxhind;
2333 #endif
2334
2335                                 sr_get_packets(sc);
2336 #if BUGGY > 0
2337 #ifndef NETGRAPH
2338                                 if (tt == sc->ifsppp.pp_if.if_ipackets)
2339 #else   /* NETGRAPH */
2340                                 if (tt == sc->ipackets)
2341 #endif /* NETGRAPH */
2342                                 {
2343                                         sca_descriptor *rxdesc;
2344                                         int i;
2345
2346                                         printf("SR: RXINTR isr1 %x, dsr %x, "
2347                                                "no data %d pkts, orxind %d.\n",
2348                                                dotxstart, dsr, tt, ind);
2349                                         printf("SR: rxdesc %x, rxstart %x, "
2350                                                "rxend %x, rxhind %d, "
2351                                                "rxmax %d.\n",
2352                                                sc->rxdesc, sc->rxstart,
2353                                                sc->rxend, sc->rxhind,
2354                                                sc->rxmax);
2355                                         printf("SR: cda %x, eda %x.\n",
2356                                             SRC_GET16(hc, dmac->cda),
2357                                             SRC_GET16(hc, dmac->eda));
2358
2359                                         if (hc->mempages) {
2360                                                 SRC_SET_ON(hc);
2361                                                 SRC_SET_MEM(hc, sc->rxdesc);
2362                                         }
2363                                         rxdesc = (sca_descriptor *)
2364                                                  (hc->mem_start +
2365                                                   (sc->rxdesc & hc->winmsk));
2366                                         rxdesc = &rxdesc[sc->rxhind];
2367
2368                                         for (i = 0; i < 3; i++, rxdesc++)
2369                                                 printf("SR: rxdesc->stat %x, "
2370                                                        "len %d.\n",
2371                                                        rxdesc->stat,
2372                                                        rxdesc->len);
2373
2374                                         if (hc->mempages)
2375                                                 SRC_SET_OFF(hc);
2376                                 }
2377 #endif /* BUGGY */
2378                         }
2379                         /*
2380                          * Check for Counter overflow
2381                          */
2382                         if (dsr & SCA_DSR_COF) {
2383                                 printf("sr%d: RX DMA Counter overflow, "
2384                                        "rxpkts %lu.\n",
2385 #ifndef NETGRAPH
2386                                        sc->unit, sc->ifsppp.pp_if.if_ipackets);
2387                                 sc->ifsppp.pp_if.if_ierrors++;
2388 #else   /* NETGRAPH */
2389                                        sc->unit, sc->ipackets);
2390                                 sc->ierrors[1]++;
2391 #endif /* NETGRAPH */
2392                         }
2393                         /*
2394                          * Check for Buffer overflow
2395                          */
2396                         if (dsr & SCA_DSR_BOF) {
2397                                 printf("sr%d: RX DMA Buffer overflow, "
2398                                        "rxpkts %lu, rxind %d, "
2399                                        "cda %x, eda %x, dsr %x.\n",
2400 #ifndef NETGRAPH
2401                                        sc->unit, sc->ifsppp.pp_if.if_ipackets,
2402 #else   /* NETGRAPH */
2403                                        sc->unit, sc->ipackets,
2404 #endif /* NETGRAPH */
2405                                        sc->rxhind,
2406                                        SRC_GET16(hc, dmac->cda),
2407                                        SRC_GET16(hc, dmac->eda),
2408                                        dsr);
2409
2410                                 /*
2411                                  * Make sure we eat as many as possible.
2412                                  * Then get the system running again.
2413                                  */
2414                                 if (hc->mempages)
2415                                         SRC_SET_ON(hc);
2416
2417                                 sr_eat_packet(sc, 0);
2418 #ifndef NETGRAPH
2419                                 sc->ifsppp.pp_if.if_ierrors++;
2420 #else   /* NETGRAPH */
2421                                 sc->ierrors[2]++;
2422 #endif /* NETGRAPH */
2423
2424                                 SRC_PUT8(hc, sca->msci[mch].cmd,
2425                                     SCA_CMD_RXMSGREJ);
2426
2427                                 SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);
2428
2429 #if BUGGY > 0
2430                                 printf("sr%d: RX DMA Buffer overflow, "
2431                                        "rxpkts %lu, rxind %d, "
2432                                        "cda %x, eda %x, dsr %x. After\n",
2433                                        sc->unit,
2434 #ifndef NETGRAPH
2435                                        sc->ipackets,
2436 #else   /* NETGRAPH */
2437                                        sc->ifsppp.pp_if.if_ipackets,
2438 #endif /* NETGRAPH */
2439                                        sc->rxhind,
2440                                        SRC_GET16(hc, dmac->cda),
2441                                        SRC_GET16(hc, dmac->eda),
2442                                        SRC_GET8(hc, dmac->dsr));
2443 #endif
2444
2445                                 if (hc->mempages)
2446                                         SRC_SET_OFF(hc);
2447                         }
2448                         /*
2449                          * End of Transfer
2450                          */
2451                         if (dsr & SCA_DSR_EOT) {
2452                                 /*
2453                                  * If this happen, it means that we are
2454                                  * receiving faster than what the processor
2455                                  * can handle.
2456                                  *
2457                                  * XXX We should enable the dma again.
2458                                  */
2459                                 printf("sr%d: RX End of xfer, rxpkts %lu.\n",
2460                                        sc->unit,
2461 #ifndef NETGRAPH
2462                                        sc->ifsppp.pp_if.if_ipackets);
2463                                 sc->ifsppp.pp_if.if_ierrors++;
2464 #else
2465                                        sc->ipackets);
2466                                 sc->ierrors[3]++;
2467 #endif /* NETGRAPH */
2468                         }
2469                 }
2470                 isr1 >>= 4;     /* process next half of ISR */
2471                 mch++;          /* and move to next channel */
2472         } while ((mch < NCHAN) && isr1);        /* loop for each chn */
2473
2474         /*
2475          * Now that we have done all the urgent things, see if we can fill
2476          * the transmit buffers.
2477          */
2478         for (mch = 0; mch < NCHAN; mch++) {
2479                 if (dotxstart & 0x0C) { /* TX initiation enabled? */
2480                         sc = &hc->sc[mch];
2481 #ifndef NETGRAPH
2482                         srstart(&sc->ifsppp.pp_if);
2483 #else
2484                         srstart(sc);
2485 #endif /* NETGRAPH */
2486                 }
2487                 dotxstart >>= 4;/* shift for next channel */
2488         }
2489 }
2490 #ifndef NETGRAPH
2491 #ifdef USE_MODEMCK
2492 /*
2493  * Perform timeout on an FR channel
2494  *
2495  * Establish a periodic check of open N2 ports;  If
2496  * a port is open/active, its DCD state is checked
2497  * and a loss of DCD is recognized (and eventually
2498  * processed).
2499  */
2500 static void
2501 sr_modemck(void *arg)
2502 {
2503         u_int s;
2504         int card;               /* card index in table */
2505         int cards;              /* card list index */
2506         int mch;                /* channel on card */
2507         u_char dcd_v;           /* Data Carrier Detect */
2508         u_char got_st0;         /* contents of ST0 */
2509         u_char got_st1;         /* contents of ST1 */
2510         u_char got_st2;         /* contents of ST2 */
2511         u_char got_st3;         /* contents of ST3 */
2512         struct sr_hardc *hc;    /* card's configuration */
2513         struct sr_hardc *Card[16];/* up to 16 cards in system */
2514         struct sr_softc *sc;    /* channel's softc structure */
2515         struct ifnet *ifp;      /* interface control table */
2516         msci_channel *msci;     /* regs specific to channel */
2517
2518         s = splimp();
2519
2520 #if     0
2521         if (sr_opens == 0) {    /* count of "up" channels */
2522                 sr_watcher = 0; /* indicate no watcher */
2523                 splx(s);
2524                 return;
2525         }
2526 #endif
2527
2528         sr_watcher = 1;         /* mark that we're online */
2529
2530         /*
2531          * Now we'll need a list of cards to process.  Since we can handle
2532          * both ISA and PCI cards (and I didn't think of making this logic
2533          * global YET) we'll generate a single table of card table
2534          * addresses.
2535          */
2536         cards = 0;
2537
2538         for (card = 0; card < NSR; card++) {
2539                 hc = &sr_hardc[card];
2540
2541                 if (hc->sc == (void *)0)
2542                         continue;
2543
2544                 Card[cards++] = hc;
2545         }
2546
2547         hc = sr_hardc_pci;
2548
2549         while (hc) {
2550                 Card[cards++] = hc;
2551                 hc = hc->next;
2552         }
2553
2554         /*
2555          * OK, we've got work we can do.  Let's do it... (Please note that
2556          * this code _only_ deals w/ ISA cards)
2557          */
2558         for (card = 0; card < cards; card++) {
2559                 hc = Card[card];/* get card table */
2560
2561                 for (mch = 0; mch < hc->numports; mch++) {
2562                         sc = &hc->sc[mch];
2563
2564                         ifp = &sc->ifsppp.pp_if;
2565
2566                         /*
2567                          * if this channel isn't "up", skip it
2568                          */
2569                         if ((ifp->if_flags & IFF_UP) == 0)
2570                                 continue;
2571
2572                         /*
2573                          * OK, now we can go looking at this channel's
2574                          * actual register contents...
2575                          */
2576                         msci = &hc->sca->msci[sc->scachan];
2577
2578                         /*
2579                          * OK, now we'll look into the actual status of this
2580                          * channel...
2581                          *
2582                          * I suck in more registers than strictly needed
2583                          */
2584                         got_st0 = SRC_GET8(hc, msci->st0);
2585                         got_st1 = SRC_GET8(hc, msci->st1);
2586                         got_st2 = SRC_GET8(hc, msci->st2);
2587                         got_st3 = SRC_GET8(hc, msci->st3);
2588
2589                         /*
2590                          * We want to see if the DCD signal is up (DCD is
2591                          * true if zero)
2592                          */
2593                         dcd_v = (got_st3 & SCA_ST3_DCD) == 0;
2594
2595                         if (dcd_v == 0)
2596                                 printf("sr%d: DCD lost\n", sc->unit);
2597                 }
2598         }
2599
2600         /*
2601          * OK, now set up for the next modem signal checking pass...
2602          */
2603         timeout(sr_modemck, NULL, hz);
2604
2605         splx(s);
2606 }
2607 #endif
2608 #else   /* NETGRAPH */
2609 /*
2610  * If a port is open/active, it's DCD state is checked
2611  * and a loss of DCD is recognized (and eventually processed?).
2612  */
2613 static void
2614 sr_modemck(struct sr_softc *sc )
2615 {
2616         u_int s;
2617         u_char got_st3;                 /* contents of ST3 */
2618         struct sr_hardc *hc = sc->hc;   /* card's configuration */
2619         msci_channel *msci;             /* regs specific to channel */
2620
2621         s = splimp();
2622
2623
2624         if (sc->running == 0)
2625                 return;
2626         /*
2627          * OK, now we can go looking at this channel's register contents...
2628          */
2629         msci = &hc->sca->msci[sc->scachan];
2630         got_st3 = SRC_GET8(hc, msci->st3);
2631
2632         /*
2633          * We want to see if the DCD signal is up (DCD is true if zero)
2634          */
2635         sc->dcd = (got_st3 & SCA_ST3_DCD) == 0;
2636         splx(s);
2637 }
2638
2639 #endif  /* NETGRAPH */
2640 static void
2641 sr_msci_intr(struct sr_hardc *hc, u_char isr0)
2642 {
2643         printf("src%d: SRINTR: MSCI\n", hc->cunit);
2644 }
2645
2646 static void
2647 sr_timer_intr(struct sr_hardc *hc, u_char isr2)
2648 {
2649         printf("src%d: SRINTR: TIMER\n", hc->cunit);
2650 }
2651
2652 #ifdef  NETGRAPH
2653 /*****************************************
2654  * Device timeout/watchdog routine.
2655  * called once per second.
2656  * checks to see that if activity was expected, that it hapenned.
2657  * At present we only look to see if expected output was completed.
2658  */
2659 static void
2660 ngsr_watchdog_frame(void * arg)
2661 {
2662         struct sr_softc * sc = arg;
2663         int s;
2664         int     speed;
2665
2666         if (sc->running == 0)
2667                 return; /* if we are not running let timeouts die */
2668         /*
2669          * calculate the apparent throughputs
2670          *  XXX a real hack
2671          */
2672         s = splimp();
2673         speed = sc->inbytes - sc->lastinbytes;
2674         sc->lastinbytes = sc->inbytes;
2675         if ( sc->inrate < speed )
2676                 sc->inrate = speed;
2677         speed = sc->outbytes - sc->lastoutbytes;
2678         sc->lastoutbytes = sc->outbytes;
2679         if ( sc->outrate < speed )
2680                 sc->outrate = speed;
2681         sc->inlast++;
2682         splx(s);
2683
2684         if ((sc->inlast > QUITE_A_WHILE)
2685         && (sc->out_deficit > LOTS_OF_PACKETS)) {
2686                 log(LOG_ERR, "sr%d: No response from remote end\n", sc->unit);
2687                 s = splimp();
2688                 sr_down(sc);
2689                 sr_up(sc);
2690                 sc->inlast = sc->out_deficit = 0;
2691                 splx(s);
2692         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
2693                 if (sc->out_dog == 0) {
2694                         log(LOG_ERR, "sr%d: Transmit failure.. no clock?\n",
2695                                         sc->unit);
2696                         s = splimp();
2697                         srwatchdog(sc);
2698 #if 0
2699                         sr_down(sc);
2700                         sr_up(sc);
2701 #endif
2702                         splx(s);
2703                         sc->inlast = sc->out_deficit = 0;
2704                 } else {
2705                         sc->out_dog--;
2706                 }
2707         }
2708         sr_modemck(sc);         /* update the DCD status */
2709         sc->handle = timeout(ngsr_watchdog_frame, sc, hz);
2710 }
2711
2712 /***********************************************************************
2713  * This section contains the methods for the Netgraph interface
2714  ***********************************************************************/
2715 /*
2716  * It is not possible or allowable to create a node of this type.
2717  * If the hardware exists, it will already have created it.
2718  */
2719 static  int
2720 ngsr_constructor(node_p node)
2721 {
2722         return (EINVAL);
2723 }
2724
2725 /*
2726  * give our ok for a hook to be added...
2727  * If we are not running this should kick the device into life.
2728  * The hook's private info points to our stash of info about that
2729  * channel.
2730  */
2731 static int
2732 ngsr_newhook(node_p node, hook_p hook, const char *name)
2733 {
2734         struct sr_softc *       sc = NG_NODE_PRIVATE(node);
2735
2736         /*
2737          * check if it's our friend the debug hook
2738          */
2739         if (strcmp(name, NG_SR_HOOK_DEBUG) == 0) {
2740                 NG_HOOK_SET_PRIVATE(hook, NULL); /* paranoid */
2741                 sc->debug_hook = hook;
2742                 return (0);
2743         }
2744
2745         /*
2746          * Check for raw mode hook.
2747          */
2748         if (strcmp(name, NG_SR_HOOK_RAW) != 0) {
2749                 return (EINVAL);
2750         }
2751         NG_HOOK_SET_PRIVATE(hook, sc);
2752         sc->hook = hook;
2753         sc->datahooks++;
2754         sr_up(sc);
2755         return (0);
2756 }
2757
2758 /*
2759  * incoming messages.
2760  * Just respond to the generic TEXT_STATUS message
2761  */
2762 static  int
2763 ngsr_rcvmsg(node_p node, item_p item, hook_p lasthook)
2764 {
2765         struct sr_softc *       sc;
2766         struct ng_mesg *resp = NULL;
2767         int error = 0;
2768         struct ng_mesg *msg;
2769
2770         NGI_GET_MSG(item,msg);
2771         sc = NG_NODE_PRIVATE(node);
2772         switch (msg->header.typecookie) {
2773         case    NG_SR_COOKIE:
2774                 error = EINVAL;
2775                 break;
2776         case    NGM_GENERIC_COOKIE:
2777                 switch(msg->header.cmd) {
2778                 case NGM_TEXT_STATUS: {
2779                         char        *arg;
2780                         int pos = 0;
2781
2782                         int resplen = sizeof(struct ng_mesg) + 512;
2783                         NG_MKRESPONSE(resp, msg, resplen, M_NOWAIT);
2784                         if (resp == NULL) {
2785                                 error = ENOMEM;
2786                                 break;
2787                         }
2788                         arg = (resp)->data;
2789                         pos = sprintf(arg, "%ld bytes in, %ld bytes out\n"
2790                             "highest rate seen: %ld B/S in, %ld B/S out\n",
2791                         sc->inbytes, sc->outbytes,
2792                         sc->inrate, sc->outrate);
2793                         pos += sprintf(arg + pos,
2794                                 "%ld output errors\n",
2795                                 sc->oerrors);
2796                         pos += sprintf(arg + pos,
2797                                 "ierrors = %ld, %ld, %ld, %ld, %ld, %ld\n",
2798                                 sc->ierrors[0],
2799                                 sc->ierrors[1],
2800                                 sc->ierrors[2],
2801                                 sc->ierrors[3],
2802                                 sc->ierrors[4],
2803                                 sc->ierrors[5]);
2804
2805                         resp->header.arglen = pos + 1;
2806                         break;
2807                       }
2808                 default:
2809                         error = EINVAL;
2810                         break;
2811                 }
2812                 break;
2813         default:
2814                 error = EINVAL;
2815                 break;
2816         }
2817         /* Take care of synchronous response, if any */
2818         NG_RESPOND_MSG(error, node, item, resp);
2819         NG_FREE_MSG(msg);
2820         return (error);
2821 }
2822
2823 /*
2824  * get data from another node and transmit it to the correct channel
2825  */
2826 static  int
2827 ngsr_rcvdata(hook_p hook, item_p item)
2828 {
2829         int s;
2830         int error = 0;
2831         struct sr_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
2832         struct ifqueue  *xmitq_p;
2833         struct mbuf *m;
2834         struct ng_tag_prio *ptag;
2835
2836         NGI_GET_M(item, m);
2837         NG_FREE_ITEM(item);
2838         /*
2839          * data doesn't come in from just anywhere (e.g control hook)
2840          */
2841         if ( NG_HOOK_PRIVATE(hook) == NULL) {
2842                 error = ENETDOWN;
2843                 goto bad;
2844         }
2845
2846         /*
2847          * Now queue the data for when it can be sent
2848          */
2849         if ((ptag = (struct ng_tag_prio *)m_tag_locate(m, NGM_GENERIC_COOKIE,
2850             NG_TAG_PRIO, NULL)) != NULL && (ptag->priority > NG_PRIO_CUTOFF) )
2851                 xmitq_p = (&sc->xmitq_hipri);
2852         else
2853                 xmitq_p = (&sc->xmitq);
2854
2855         s = splimp();
2856         IF_LOCK(xmitq_p);
2857         if (_IF_QFULL(xmitq_p)) {
2858                 _IF_DROP(xmitq_p);
2859                 IF_UNLOCK(xmitq_p);
2860                 splx(s);
2861                 error = ENOBUFS;
2862                 goto bad;
2863         }
2864         _IF_ENQUEUE(xmitq_p, m);
2865         IF_UNLOCK(xmitq_p);
2866         srstart(sc);
2867         splx(s);
2868         return (0);
2869
2870 bad:
2871         /*
2872          * It was an error case.
2873          * check if we need to free the mbuf, and then return the error
2874          */
2875         NG_FREE_M(m);
2876         return (error);
2877 }
2878
2879 /*
2880  * do local shutdown processing..
2881  * this node will refuse to go away, unless the hardware says to..
2882  * don't unref the node, or remove our name. just clear our links up.
2883  */
2884 static  int
2885 ngsr_shutdown(node_p node)
2886 {
2887         struct sr_softc * sc = NG_NODE_PRIVATE(node);
2888
2889         sr_down(sc);
2890         NG_NODE_UNREF(node);
2891 /* XXX should drain queues! */
2892         if (ng_make_node_common(&typestruct, &sc->node) != 0)
2893                 return (0);
2894         sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
2895         if (ng_name_node(sc->node, sc->nodename)) {
2896                 printf("node naming failed\n");
2897                 sc->node = NULL;
2898                 NG_NODE_UNREF(sc->node); /* drop it again */
2899                 return (0);
2900         }
2901         NG_NODE_SET_PRIVATE(sc->node, sc);
2902         callout_handle_init(&sc->handle); /* should kill timeout */
2903         sc->running = 0;
2904         return (0);
2905 }
2906
2907 /* already linked */
2908 static  int
2909 ngsr_connect(hook_p hook)
2910 {
2911         /* probably not at splnet, force outward queueing */
2912         NG_HOOK_FORCE_QUEUE(NG_HOOK_PEER(hook));
2913         /* be really amiable and just say "YUP that's OK by me! " */
2914         return (0);
2915 }
2916
2917 /*
2918  * notify on hook disconnection (destruction)
2919  *
2920  * Invalidate the private data associated with this dlci.
2921  * For this type, removal of the last link resets tries to destroy the node.
2922  * As the device still exists, the shutdown method will not actually
2923  * destroy the node, but reset the device and leave it 'fresh' :)
2924  *
2925  * The node removal code will remove all references except that owned by the
2926  * driver.
2927  */
2928 static  int
2929 ngsr_disconnect(hook_p hook)
2930 {
2931         struct sr_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
2932         int     s;
2933         /*
2934          * If it's the data hook, then free resources etc.
2935          */
2936         if (NG_HOOK_PRIVATE(hook)) {
2937                 s = splimp();
2938                 sc->datahooks--;
2939                 if (sc->datahooks == 0)
2940                         sr_down(sc);
2941                 splx(s);
2942         } else {
2943                 sc->debug_hook = NULL;
2944         }
2945         return (0);
2946 }
2947
2948 /*
2949  * called during bootup
2950  * or LKM loading to put this type into the list of known modules
2951  */
2952 static void
2953 ngsr_init(void *ignored)
2954 {
2955         if (ng_newtype(&typestruct))
2956                 printf("ngsr install failed\n");
2957         ngsr_done_init = 1;
2958 }
2959 #endif /* NETGRAPH */
2960
2961 /*
2962  ********************************* END ************************************
2963  */