sys/dev/sr/if_sr.c

   1 /*-
   2  * Copyright (c) 1996 - 2001 John Hay.
   3  * Copyright (c) 1996 SDL Communications, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 /*
  36  * Programming assumptions and other issues.
  37  *
  38  * Only a 16K window will be used.
  39  *
  40  * The descriptors of a DMA channel will fit in a 16K memory window.
  41  *
  42  * The buffers of a transmit DMA channel will fit in a 16K memory window.
  43  *
  44  * When interface is going up, handshaking is set and it is only cleared
  45  * when the interface is down'ed.
  46  *
  47  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
  48  * internal/external clock, etc.....
  49  *
  50  */
  51
  52 #include "opt_netgraph.h"
  53 #ifdef NETGRAPH
  54 #include <dev/sr/if_sr.h>
  55 #endif  /* NETGRAPH */
  56
  57 #include <sys/param.h>
  58 #include <sys/systm.h>
  59 #include <sys/kernel.h>
  60 #include <sys/module.h>
  61 #include <sys/malloc.h>
  62 #include <sys/mbuf.h>
  63 #include <sys/sockio.h>
  64 #include <sys/socket.h>
  65 #include <sys/bus.h>
  66 #include <machine/bus.h>
  67 #include <machine/resource.h>
  68 #include <sys/rman.h>
  69
  70 #include <net/if.h>
  71 #ifdef NETGRAPH
  72 #include <sys/syslog.h>
  73 #else /* NETGRAPH */
  74 #include <net/if_sppp.h>
  75 #include <net/if_types.h>
  76
  77 #include <net/bpf.h>
  78 #endif  /* NETGRAPH */
  79
  80 #include <machine/md_var.h>
  81
  82 #include <dev/ic/hd64570.h>
  83 #include <dev/sr/if_srregs.h>
  84
  85 #ifdef NETGRAPH
  86 #include <netgraph/ng_message.h>
  87 #include <netgraph/netgraph.h>
  88 #endif /* NETGRAPH */
  89 /* #define USE_MODEMCK */
  90
  91 #ifndef BUGGY
  92 #define BUGGY           0
  93 #endif
  94
  95 #ifndef NETGRAPH
  96 #define PPP_HEADER_LEN  4
  97 #endif /* NETGRAPH */
  98
  99 static int      next_sc_unit = 0;
 100 #ifndef NETGRAPH
 101 #ifdef USE_MODEMCK
 102 static int      sr_watcher = 0;
 103 #endif
 104 #endif /* NETGRAPH */
 105
 106 /*
 107  * Define the software interface for the card... There is one for
 108  * every channel (port).
 109  */
 110 struct sr_softc {
 111 #ifndef NETGRAPH
 112         struct  ifnet *ifp;     /* PPP service w/in system */
 113 #endif /* NETGRAPH */
 114         struct  sr_hardc *hc;   /* card-level information */
 115
 116         int     unit;           /* With regard to all sr devices */
 117         int     subunit;        /* With regard to this card */
 118
 119         struct  buf_block {
 120                 u_int   txdesc; /* DPRAM offset */
 121                 u_int   txstart;/* DPRAM offset */
 122                 u_int   txend;  /* DPRAM offset */
 123                 u_int   txtail; /* # of 1st free gran */
 124                 u_int   txmax;  /* # of free grans */
 125                 u_int   txeda;  /* err descr addr */
 126         } block[SR_TX_BLOCKS];
 127
 128         char    xmit_busy;      /* Transmitter is busy */
 129         char    txb_inuse;      /* # of tx grans in use */
 130         u_int   txb_new;        /* ndx to new buffer */
 131         u_int   txb_next_tx;    /* ndx to next gran rdy tx */
 132
 133         u_int   rxdesc;         /* DPRAM offset */
 134         u_int   rxstart;        /* DPRAM offset */
 135         u_int   rxend;          /* DPRAM offset */
 136         u_int   rxhind;         /* ndx to the hd of rx bufrs */
 137         u_int   rxmax;          /* # of avail grans */
 138
 139         u_int   clk_cfg;        /* Clock configuration */
 140
 141         int     scachan;        /* channel # on card */
 142 #ifdef NETGRAPH
 143         int     running;        /* something is attached so we are running */
 144         int     dcd;            /* do we have dcd? */
 145         /* ---netgraph bits --- */
 146         char            nodename[NG_NODESIZ]; /* store our node name */
 147         int             datahooks;      /* number of data hooks attached */
 148         node_p          node;           /* netgraph node */
 149         hook_p          hook;           /* data hook */
 150         hook_p          debug_hook;
 151         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
 152         struct ifqueue  xmitq;          /* transmit queue */
 153         int             flags;          /* state */
 154 #define SCF_RUNNING     0x01            /* board is active */
 155 #define SCF_OACTIVE     0x02            /* output is active */
 156         int             out_dog;        /* watchdog cycles output count-down */
 157         struct callout_handle handle;   /* timeout(9) handle */
 158         u_long          inbytes, outbytes;      /* stats */
 159         u_long          lastinbytes, lastoutbytes; /* a second ago */
 160         u_long          inrate, outrate;        /* highest rate seen */
 161         u_long          inlast;         /* last input N secs ago */
 162         u_long          out_deficit;    /* output since last input */
 163         u_long          oerrors, ierrors[6];
 164         u_long          opackets, ipackets;
 165 #endif /* NETGRAPH */
 166 };
 167 #define SC2IFP(sc)      sc->ifp
 168
 169 #ifdef NETGRAPH
 170 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
 171 #define QUITE_A_WHILE   300     /* 5 MINUTES */
 172 #define LOTS_OF_PACKETS 100
 173 #endif /* NETGRAPH */
 174
 175 /*
 176  * Baud Rate table for Sync Mode.
 177  * Each entry consists of 3 elements:
 178  * Baud Rate (x100) , TMC, BR
 179  *
 180  * Baud Rate = FCLK / TMC / 2^BR
 181  * Baud table for Crystal freq. of 9.8304 Mhz
 182  */
 183 #ifdef N2_TEST_SPEED
 184 struct rate_line {
 185         int     target;         /* target rate/100 */
 186         int     tmc_reg;        /* TMC register value */
 187         int     br_reg;         /* BR (BaudRateClk) selector */
 188 } n2_rates[] = {
 189         /* Baudx100     TMC             BR */
 190         { 3,            128,            8 },
 191         { 6,            128,            7 },
 192         { 12,           128,            6 },
 193         { 24,           128,            5 },
 194         { 48,           128,            4 },
 195         { 96,           128,            3 },
 196         { 192,          128,            2 },
 197         { 384,          128,            1 },
 198         { 560,          88,             1 },
 199         { 640,          77,             1 },
 200         { 1280,         38,             1 },
 201         { 2560,         19,             1 },
 202         { 5120,         10,             1 },
 203         { 10000,        5,              1 },
 204         { 15000,        3,              1 },
 205         { 25000,        2,              1 },
 206         { 50000,        1,              1 },
 207         { 0,            0,              0 }
 208 };
 209
 210 int     sr_test_speed[] = {
 211         N2_TEST_SPEED,
 212         N2_TEST_SPEED
 213 };
 214
 215 int     etc0vals[] = {
 216         SR_MCR_ETC0,            /* ISA channel 0 */
 217         SR_MCR_ETC1,            /* ISA channel 1 */
 218         SR_FECR_ETC0,           /* PCI channel 0 */
 219         SR_FECR_ETC1            /* PCI channel 1 */
 220 };
 221 #endif
 222
 223 devclass_t sr_devclass;
 224 #ifndef NETGRAPH
 225 MODULE_DEPEND(if_sr, sppp, 1, 1, 1);
 226 #endif
 227
 228 static void     srintr(void *arg);
 229 static void     sr_xmit(struct sr_softc *sc);
 230 #ifndef NETGRAPH
 231 static void     srstart(struct ifnet *ifp);
 232 static int      srioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
 233 static void     srwatchdog(struct ifnet *ifp);
 234 #else
 235 static void     srstart(struct sr_softc *sc);
 236 static void     srwatchdog(struct sr_softc *sc);
 237 #endif /* NETGRAPH */
 238 static int      sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat);
 239 static void     sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len);
 240 static void     sr_eat_packet(struct sr_softc *sc, int single);
 241 static void     sr_get_packets(struct sr_softc *sc);
 242
 243 static void     sr_up(struct sr_softc *sc);
 244 static void     sr_down(struct sr_softc *sc);
 245 static void     src_init(struct sr_hardc *hc);
 246 static void     sr_init_sca(struct sr_hardc *hc);
 247 static void     sr_init_msci(struct sr_softc *sc);
 248 static void     sr_init_rx_dmac(struct sr_softc *sc);
 249 static void     sr_init_tx_dmac(struct sr_softc *sc);
 250 static void     sr_dmac_intr(struct sr_hardc *hc, u_char isr);
 251 static void     sr_msci_intr(struct sr_hardc *hc, u_char isr);
 252 static void     sr_timer_intr(struct sr_hardc *hc, u_char isr);
 253 #ifndef NETGRAPH
 254 #ifdef USE_MODEMCK
 255 static void     sr_modemck(void *x);
 256 #endif
 257 #else
 258 static void     sr_modemck(struct sr_softc *x);
 259 #endif /* NETGRAPH */
 260
 261 #ifdef NETGRAPH
 262 static  void    ngsr_watchdog_frame(void * arg);
 263
 264 static ng_constructor_t ngsr_constructor;
 265 static ng_rcvmsg_t      ngsr_rcvmsg;
 266 static ng_shutdown_t    ngsr_shutdown;
 267 static ng_newhook_t     ngsr_newhook;
 268 /*static ng_findhook_t  ngsr_findhook; */
 269 static ng_connect_t     ngsr_connect;
 270 static ng_rcvdata_t     ngsr_rcvdata;
 271 static ng_disconnect_t  ngsr_disconnect;
 272
 273 static struct ng_type typestruct = {
 274         .version =      NG_ABI_VERSION,
 275         .name =         NG_SR_NODE_TYPE,
 276         .constructor =  ngsr_constructor,
 277         .rcvmsg =       ngsr_rcvmsg,
 278         .shutdown =     ngsr_shutdown,
 279         .newhook =      ngsr_newhook,
 280         .connect =      ngsr_connect,
 281         .rcvdata =      ngsr_rcvdata,
 282         .disconnect =   ngsr_disconnect,
 283 };
 284 NETGRAPH_INIT_ORDERED(sync_sr, &typestruct, SI_SUB_DRIVERS, SI_ORDER_FIRST);
 285 #endif /* NETGRAPH */
 286
 287 /*
 288  * Register the ports on the adapter.
 289  * Fill in the info for each port.
 290 #ifndef NETGRAPH
 291  * Attach each port to sppp and bpf.
 292 #endif
 293  */
 294 int
 295 sr_attach(device_t device)
 296 {
 297         int intf_sw, pndx;
 298         u_int32_t flags;
 299         u_int fecr;
 300         struct sr_hardc *hc;
 301         struct sr_softc *sc;
 302 #ifndef NETGRAPH
 303         struct ifnet *ifp;
 304 #endif /* NETGRAPH */
 305         int unit;               /* index: channel w/in card */
 306
 307         hc = (struct sr_hardc *)device_get_softc(device);
 308         MALLOC(sc, struct sr_softc *,
 309                 hc->numports * sizeof(struct sr_softc),
 310                 M_DEVBUF, M_WAITOK | M_ZERO);
 311         if (sc == NULL)
 312                 goto errexit;
 313         hc->sc = sc;
 314
 315         /*
 316          * Get the TX clock direction and configuration. The default is a
 317          * single external clock which is used by RX and TX.
 318          */
 319         switch(hc->cardtype) {
 320         case SR_CRD_N2:
 321                 flags = device_get_flags(device);
 322 #ifdef N2_TEST_SPEED
 323                 if (sr_test_speed[0] > 0)
 324                         hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 325                 else
 326 #endif
 327                 if (flags & SR_FLAGS_0_CLK_MSK)
 328                         hc->sc[0].clk_cfg =
 329                             (flags & SR_FLAGS_0_CLK_MSK)
 330                             >> SR_FLAGS_CLK_SHFT;
 331
 332                 if (hc->numports == 2)
 333 #ifdef N2_TEST_SPEED
 334                         if (sr_test_speed[1] > 0)
 335                                 hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 336                         else
 337 #endif
 338                         if (flags & SR_FLAGS_1_CLK_MSK)
 339                                 hc->sc[1].clk_cfg = (flags & SR_FLAGS_1_CLK_MSK)
 340                                     >> (SR_FLAGS_CLK_SHFT +
 341                                     SR_FLAGS_CLK_CHAN_SHFT);
 342                 break;
 343         case SR_CRD_N2PCI:
 344                 fecr = sr_read_fecr(hc);
 345                 for (pndx = 0; pndx < hc->numports; pndx++, sc++) {
 346                         switch (pndx) {
 347                         case 1:
 348                                 intf_sw = fecr & SR_FECR_ID1 >> SR_FE_ID1_SHFT;
 349                                 break;
 350                         case 0:
 351                         default:
 352                                 intf_sw = fecr & SR_FECR_ID0 >> SR_FE_ID0_SHFT;
 353                         }
 354
 355 #ifdef N2_TEST_SPEED
 356                         if (sr_test_speed[pndx] > 0)
 357                                 sc->clk_cfg = SR_FLAGS_INT_CLK;
 358                         else
 359 #endif
 360                                 switch (intf_sw) {
 361                                 default:
 362                                 case SR_FE_ID_RS232:
 363                                 case SR_FE_ID_HSSI:
 364                                 case SR_FE_ID_RS422:
 365                                 case SR_FE_ID_TEST:
 366                                         break;
 367
 368                                 case SR_FE_ID_V35:
 369                                         sc->clk_cfg = SR_FLAGS_EXT_SEP_CLK;
 370                                         break;
 371
 372                                 case SR_FE_ID_X21:
 373                                         sc->clk_cfg = SR_FLAGS_EXT_CLK;
 374                                         break;
 375                                 }
 376                 }
 377                 sc = hc->sc;
 378                 break;
 379         }
 380
 381         /*
 382          * Report Card configuration information before we start configuring
 383          * each channel on the card...
 384          */
 385         printf("src%d: %uK RAM (%d mempages) @ %p-%p, %u ports.\n",
 386                hc->cunit, hc->memsize / 1024, hc->mempages,
 387                hc->mem_start, hc->mem_end, hc->numports);
 388
 389         src_init(hc);
 390         sr_init_sca(hc);
 391
 392         if (BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq,
 393             INTR_TYPE_NET, srintr, hc, &hc->intr_cookie) != 0)
 394                 goto errexit;
 395
 396         /*
 397          * Now configure each port on the card.
 398          */
 399         for (unit = 0; unit < hc->numports; sc++, unit++) {
 400                 sc->hc = hc;
 401                 sc->subunit = unit;
 402                 sc->unit = next_sc_unit;
 403                 next_sc_unit++;
 404                 sc->scachan = unit % NCHAN;
 405
 406                 sr_init_rx_dmac(sc);
 407                 sr_init_tx_dmac(sc);
 408                 sr_init_msci(sc);
 409
 410                 printf("sr%d: Adapter %d, port %d.\n",
 411                        sc->unit, hc->cunit, sc->subunit);
 412
 413 #ifndef NETGRAPH
 414                 ifp = SC2IFP(sc) = if_alloc(IFT_PPP);
 415                 if (ifp == NULL) {
 416                         goto errexit;
 417                 }
 418                 ifp->if_softc = sc;
 419                 if_initname(ifp, device_get_name(device),
 420                     device_get_unit(device));
 421                 ifp->if_mtu = PP_MTU;
 422                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST |
 423                     IFF_NEEDSGIANT;
 424                 ifp->if_ioctl = srioctl;
 425                 ifp->if_start = srstart;
 426                 ifp->if_watchdog = srwatchdog;
 427
 428                 IFP2SP(sc->ifp)->pp_flags = PP_KEEPALIVE;
 429                 sppp_attach(sc->ifp);
 430                 if_attach(ifp);
 431
 432                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
 433 #else   /* NETGRAPH */
 434                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
 435                         goto errexit;
 436                 sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
 437                 if (ng_name_node(sc->node, sc->nodename)) {
 438                         NG_NODE_UNREF(sc->node); /* make it go away again */
 439                         goto errexit;
 440                 }
 441                 NG_NODE_SET_PRIVATE(sc->node, sc);
 442                 callout_handle_init(&sc->handle);
 443                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
 444                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
 445                 mtx_init(&sc->xmitq.ifq_mtx, "sr_xmitq", NULL, MTX_DEF);
 446                 mtx_init(&sc->xmitq_hipri.ifq_mtx, "sr_xmitq_hipri", NULL,
 447                     MTX_DEF);
 448                 sc->running = 0;
 449 #endif  /* NETGRAPH */
 450         }
 451
 452         if (hc->mempages)
 453                 SRC_SET_OFF(hc);
 454
 455         return (0);
 456
 457 errexit:
 458         sr_deallocate_resources(device);
 459         return (ENXIO);
 460 }
 461
 462 int
 463 sr_detach(device_t device)
 464 {
 465         device_t parent = device_get_parent(device);
 466         struct sr_hardc *hc = device_get_softc(device);
 467
 468         if (hc->intr_cookie != NULL) {
 469                 if (BUS_TEARDOWN_INTR(parent, device,
 470                         hc->res_irq, hc->intr_cookie) != 0) {
 471                                 printf("intr teardown failed.. continuing\n");
 472                 }
 473                 hc->intr_cookie = NULL;
 474         }
 475
 476         /* XXX Stop the DMA. */
 477
 478         /*
 479          * deallocate any system resources we may have
 480          * allocated on behalf of this driver.
 481          */
 482         FREE(hc->sc, M_DEVBUF);
 483         hc->sc = NULL;
 484         hc->mem_start = NULL;
 485         return (sr_deallocate_resources(device));
 486 }
 487
 488 int
 489 sr_allocate_ioport(device_t device, int rid, u_long size)
 490 {
 491         struct sr_hardc *hc = device_get_softc(device);
 492
 493         hc->rid_ioport = rid;
 494         hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
 495                         &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE);
 496         if (hc->res_ioport == NULL) {
 497                 goto errexit;
 498         }
 499         hc->bt_ioport = rman_get_bustag(hc->res_ioport);
 500         hc->bh_ioport = rman_get_bushandle(hc->res_ioport);
 501
 502         return (0);
 503
 504 errexit:
 505         sr_deallocate_resources(device);
 506         return (ENXIO);
 507 }
 508
 509 int
 510 sr_allocate_irq(device_t device, int rid, u_long size)
 511 {
 512         struct sr_hardc *hc = device_get_softc(device);
 513
 514         hc->rid_irq = rid;
 515         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
 516                         &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
 517         if (hc->res_irq == NULL) {
 518                 goto errexit;
 519         }
 520         return (0);
 521
 522 errexit:
 523         sr_deallocate_resources(device);
 524         return (ENXIO);
 525 }
 526
 527 int
 528 sr_allocate_memory(device_t device, int rid, u_long size)
 529 {
 530         struct sr_hardc *hc = device_get_softc(device);
 531
 532         hc->rid_memory = rid;
 533         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 534                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
 535         if (hc->res_memory == NULL) {
 536                 goto errexit;
 537         }
 538         hc->bt_memory = rman_get_bustag(hc->res_memory);
 539         hc->bh_memory = rman_get_bushandle(hc->res_memory);
 540
 541         return (0);
 542
 543 errexit:
 544         sr_deallocate_resources(device);
 545         return (ENXIO);
 546 }
 547
 548 int
 549 sr_allocate_plx_memory(device_t device, int rid, u_long size)
 550 {
 551         struct sr_hardc *hc = device_get_softc(device);
 552
 553         hc->rid_plx_memory = rid;
 554         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 555                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
 556         if (hc->res_plx_memory == NULL) {
 557                 goto errexit;
 558         }
 559         return (0);
 560
 561 errexit:
 562         sr_deallocate_resources(device);
 563         return (ENXIO);
 564 }
 565
 566 int
 567 sr_deallocate_resources(device_t device)
 568 {
 569         struct sr_hardc *hc = device_get_softc(device);
 570
 571         if (hc->res_irq != 0) {
 572                 bus_deactivate_resource(device, SYS_RES_IRQ,
 573                         hc->rid_irq, hc->res_irq);
 574                 bus_release_resource(device, SYS_RES_IRQ,
 575                         hc->rid_irq, hc->res_irq);
 576                 hc->res_irq = 0;
 577         }
 578         if (hc->res_ioport != 0) {
 579                 bus_deactivate_resource(device, SYS_RES_IOPORT,
 580                         hc->rid_ioport, hc->res_ioport);
 581                 bus_release_resource(device, SYS_RES_IOPORT,
 582                         hc->rid_ioport, hc->res_ioport);
 583                 hc->res_ioport = 0;
 584         }
 585         if (hc->res_memory != 0) {
 586                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 587                         hc->rid_memory, hc->res_memory);
 588                 bus_release_resource(device, SYS_RES_MEMORY,
 589                         hc->rid_memory, hc->res_memory);
 590                 hc->res_memory = 0;
 591         }
 592         if (hc->res_plx_memory != 0) {
 593                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 594                         hc->rid_plx_memory, hc->res_plx_memory);
 595                 bus_release_resource(device, SYS_RES_MEMORY,
 596                         hc->rid_plx_memory, hc->res_plx_memory);
 597                 hc->res_plx_memory = 0;
 598         }
 599         return (0);
 600 }
 601
 602 /*
 603  * N2 Interrupt Service Routine
 604  *
 605  * First figure out which SCA gave the interrupt.
 606  * Process it.
 607  * See if there is other interrupts pending.
 608  * Repeat until there no interrupts remain.
 609  */
 610 static void
 611 srintr(void *arg)
 612 {
 613         struct sr_hardc *hc = (struct sr_hardc *)arg;
 614         sca_regs *sca = hc->sca;        /* MSCI register tree */
 615         u_char  isr0, isr1, isr2;       /* interrupt statii captured */
 616
 617 #if BUGGY > 1
 618         printf("sr: srintr_hc(hc=%08x)\n", hc);
 619 #endif
 620
 621         /*
 622          * Since multiple interfaces may share this interrupt, we must loop
 623          * until no interrupts are still pending service.
 624          */
 625         while (1) {
 626                 /*
 627                  * Read all three interrupt status registers from the N2
 628                  * card...
 629                  */
 630                 isr0 = SRC_GET8(hc, sca->isr0);
 631                 isr1 = SRC_GET8(hc, sca->isr1);
 632                 isr2 = SRC_GET8(hc, sca->isr2);
 633
 634                 /*
 635                  * If all three registers returned 0, we've finished
 636                  * processing interrupts from this device, so we can quit
 637                  * this loop...
 638                  */
 639                 if ((isr0 | isr1 | isr2) == 0)
 640                         break;
 641
 642 #if BUGGY > 2
 643                 printf("src%d: srintr_hc isr0 %x, isr1 %x, isr2 %x\n",
 644 #ifndef NETGRAPH
 645                         unit, isr0, isr1, isr2);
 646 #else
 647                         hc->cunit, isr0, isr1, isr2);
 648 #endif /* NETGRAPH */
 649 #endif
 650
 651                 /*
 652                  * Now we can dispatch the interrupts. Since we don't expect
 653                  * either MSCI or timer interrupts, we'll test for DMA
 654                  * interrupts first...
 655                  */
 656                 if (isr1)       /* DMA-initiated interrupt */
 657                         sr_dmac_intr(hc, isr1);
 658
 659                 if (isr0)       /* serial part IRQ? */
 660                         sr_msci_intr(hc, isr0);
 661
 662                 if (isr2)       /* timer-initiated interrupt */
 663                         sr_timer_intr(hc, isr2);
 664         }
 665 }
 666
 667 /*
 668  * This will only start the transmitter. It is assumed that the data
 669  * is already there.
 670  * It is normally called from srstart() or sr_dmac_intr().
 671  */
 672 static void
 673 sr_xmit(struct sr_softc *sc)
 674 {
 675         u_short cda_value;      /* starting descriptor */
 676         u_short eda_value;      /* ending descriptor */
 677         struct sr_hardc *hc;
 678 #ifndef NETGRAPH
 679         struct ifnet *ifp;      /* O/S Network Services */
 680 #endif /* NETGRAPH */
 681         dmac_channel *dmac;     /* DMA channel registers */
 682
 683 #if BUGGY > 0
 684         printf("sr: sr_xmit( sc=%08x)\n", sc);
 685 #endif
 686
 687         hc = sc->hc;
 688 #ifndef NETGRAPH
 689         ifp = SC2IFP(sc);
 690 #endif /* NETGRAPH */
 691         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
 692
 693         /*
 694          * Get the starting and ending addresses of the chain to be
 695          * transmitted and pass these on to the DMA engine on-chip.
 696          */
 697         cda_value = sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart;
 698         cda_value &= 0x00ffff;
 699         eda_value = sc->block[sc->txb_next_tx].txeda + hc->mem_pstart;
 700         eda_value &= 0x00ffff;
 701
 702         SRC_PUT16(hc, dmac->cda, cda_value);
 703         SRC_PUT16(hc, dmac->eda, eda_value);
 704
 705         /*
 706          * Now we'll let the DMA status register know about this change
 707          */
 708         SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);
 709
 710         sc->xmit_busy = 1;      /* mark transmitter busy */
 711
 712 #if BUGGY > 2
 713         printf("sr%d: XMIT  cda=%04x, eda=%4x, rcda=%08lx\n",
 714                sc->unit, cda_value, eda_value,
 715                sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart);
 716 #endif
 717
 718         sc->txb_next_tx++;      /* update next transmit seq# */
 719
 720         if (sc->txb_next_tx == SR_TX_BLOCKS)    /* handle wrap... */
 721                 sc->txb_next_tx = 0;
 722
 723 #ifndef NETGRAPH
 724         /*
 725          * Finally, we'll set a timout (which will start srwatchdog())
 726          * within the O/S network services layer...
 727          */
 728         ifp->if_timer = 2;      /* Value in seconds. */
 729 #else
 730         /*
 731          * Don't time out for a while.
 732          */
 733         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
 734 #endif /* NETGRAPH */
 735 }
 736
 737 /*
 738  * This function will be called from the upper level when a user add a
 739  * packet to be send, and from the interrupt handler after a finished
 740  * transmit.
 741  *
 742  * NOTE: it should run at spl_imp().
 743  *
 744  * This function only place the data in the oncard buffers. It does not
 745  * start the transmition. sr_xmit() does that.
 746  *
 747  * Transmitter idle state is indicated by the IFF_OACTIVE flag.
 748  * The function that clears that should ensure that the transmitter
 749  * and its DMA is in a "good" idle state.
 750  */
 751 #ifndef NETGRAPH
 752 static void
 753 srstart(struct ifnet *ifp)
 754 {
 755         struct sr_softc *sc;    /* channel control structure */
 756 #else
 757 static void
 758 srstart(struct sr_softc *sc)
 759 {
 760 #endif /* NETGRAPH */
 761         struct sr_hardc *hc;    /* card control/config block */
 762         int len;                /* total length of a packet */
 763         int pkts;               /* packets placed in DPRAM */
 764         int tlen;               /* working length of pkt */
 765         u_int i;
 766         struct mbuf *mtx;       /* message buffer from O/S */
 767         u_char *txdata;         /* buffer address in DPRAM */
 768         sca_descriptor *txdesc; /* working descriptor pointr */
 769         struct buf_block *blkp;
 770
 771 #ifndef NETGRAPH
 772 #if BUGGY > 0
 773         printf("sr: srstart( ifp=%08x)\n", ifp);
 774 #endif
 775         sc = ifp->if_softc;
 776         if ((ifp->if_flags & IFF_RUNNING) == 0)
 777                 return;
 778 #endif /* NETGRAPH */
 779         hc = sc->hc;
 780         /*
 781          * It is OK to set the memory window outside the loop because all tx
 782          * buffers and descriptors are assumed to be in the same 16K window.
 783          */
 784         if (hc->mempages) {
 785                 SRC_SET_ON(hc);
 786                 SRC_SET_MEM(hc, sc->block[0].txdesc);
 787         }
 788
 789         /*
 790          * Loop to place packets into DPRAM.
 791          *
 792          * We stay in this loop until there is nothing in
 793          * the TX queue left or the tx buffers are full.
 794          */
 795 top_srstart:
 796
 797         /*
 798          * See if we have space for more packets.
 799          */
 800         if (sc->txb_inuse == SR_TX_BLOCKS) {    /* out of space? */
 801 #ifndef NETGRAPH
 802                 ifp->if_flags |= IFF_OACTIVE;   /* yes, mark active */
 803 #else
 804                 /*ifp->if_flags |= IFF_OACTIVE;*/       /* yes, mark active */
 805 #endif /* NETGRAPH */
 806
 807                 if (hc->mempages)
 808                         SRC_SET_OFF(hc);
 809
 810 #if BUGGY > 9
 811                 printf("sr%d.srstart: sc->txb_inuse=%d; DPRAM full...\n",
 812                        sc->unit, sc->txb_inuse);
 813 #endif
 814                 return;
 815         }
 816         /*
 817          * OK, the card can take more traffic.  Let's see if there's any
 818          * pending from the system...
 819          *
 820          * NOTE:
 821          * The architecture of the networking interface doesn't
 822          * actually call us like 'write()', providing an address.  We get
 823          * started, a lot like a disk strategy routine, and we actually call
 824          * back out to the system to get traffic to send...
 825          *
 826          * NOTE:
 827          * If we were gonna run through another layer, we would use a
 828          * dispatch table to select the service we're getting a packet
 829          * from...
 830          */
 831 #ifndef NETGRAPH
 832         mtx = sppp_dequeue(ifp);
 833 #else /* NETGRAPH */
 834         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 835         if (mtx == NULL) {
 836                 IF_DEQUEUE(&sc->xmitq, mtx);
 837         }
 838 #endif /* NETGRAPH */
 839         if (!mtx) {
 840                 if (hc->mempages)
 841                         SRC_SET_OFF(hc);
 842                 return;
 843         }
 844         /*
 845          * OK, we got a packet from the network services of the O/S. Now we
 846          * can move it into the DPRAM (under control of the descriptors) and
 847          * fire it off...
 848          */
 849         pkts = 0;
 850         i = 0;                  /* counts # of granules used */
 851
 852         blkp = &sc->block[sc->txb_new]; /* address of free granule */
 853         txdesc = (sca_descriptor *)
 854             (hc->mem_start + (blkp->txdesc & hc->winmsk));
 855
 856         txdata = (u_char *)(hc->mem_start
 857                             + (blkp->txstart & hc->winmsk));
 858
 859         /*
 860          * Now we'll try to install as many packets as possible into the
 861          * card's DP RAM buffers.
 862          */
 863         for (;;) {              /* perform actual copy of packet */
 864                 len = mtx->m_pkthdr.len;        /* length of message */
 865
 866 #if BUGGY > 1
 867                 printf("sr%d.srstart: mbuf @ %08lx, %d bytes\n",
 868                            sc->unit, mtx, len);
 869 #endif
 870
 871 #ifndef NETGRAPH
 872                 BPF_MTAP(ifp, mtx);
 873 #else   /* NETGRAPH */
 874                 sc->outbytes += len;
 875 #endif  /* NETGRAPH */
 876
 877                 /*
 878                  * We can perform a straight copy because the tranmit
 879                  * buffers won't wrap.
 880                  */
 881                 m_copydata(mtx, 0, len, txdata);
 882
 883                 /*
 884                  * Now we know how big the message is gonna be.  We must now
 885                  * construct the descriptors to drive this message out...
 886                  */
 887                 tlen = len;
 888                 while (tlen > SR_BUF_SIZ) {     /* loop for full granules */
 889                         txdesc->stat = 0;       /* reset bits */
 890                         txdesc->len = SR_BUF_SIZ;       /* size of granule */
 891                         tlen -= SR_BUF_SIZ;
 892
 893                         txdesc++;       /* move to next dscr */
 894                         txdata += SR_BUF_SIZ;   /* adjust data addr */
 895                         i++;
 896                 }
 897
 898                 /*
 899                  * This section handles the setting of the final piece of a
 900                  * message.
 901                  */
 902                 txdesc->stat = SCA_DESC_EOM;
 903                 txdesc->len = tlen;
 904                 pkts++;
 905
 906                 /*
 907                  * prepare for subsequent packets (if any)
 908                  */
 909                 txdesc++;
 910                 txdata += SR_BUF_SIZ;   /* next mem granule */
 911                 i++;            /* count of granules */
 912
 913                 /*
 914                  * OK, we've now placed the message into the DPRAM where it
 915                  * can be transmitted.  We'll now release the message memory
 916                  * and update the statistics...
 917                  */
 918                 m_freem(mtx);
 919 #ifndef NETGRAPH
 920                 ++SC2IFP(sc)->if_opackets;
 921 #else   /* NETGRAPH */
 922                 sc->opackets++;
 923 #endif /* NETGRAPH */
 924
 925                 /*
 926                  * Check if we have space for another packet. XXX This is
 927                  * hardcoded.  A packet can't be larger than 3 buffers (3 x
 928                  * 512).
 929                  */
 930                 if ((i + 3) >= blkp->txmax) {   /* enough remains? */
 931 #if BUGGY > 9
 932                         printf("sr%d.srstart: i=%d (%d pkts); card full.\n",
 933                                sc->unit, i, pkts);
 934 #endif
 935                         break;
 936                 }
 937                 /*
 938                  * We'll pull the next message to be sent (if any)
 939                  */
 940 #ifndef NETGRAPH
 941                 mtx = sppp_dequeue(ifp);
 942 #else /* NETGRAPH */
 943                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 944                 if (mtx == NULL) {
 945                         IF_DEQUEUE(&sc->xmitq, mtx);
 946                 }
 947 #endif /* NETGRAPH */
 948                 if (!mtx) {     /* no message?  We're done! */
 949 #if BUGGY > 9
 950                         printf("sr%d.srstart: pending=0, pkts=%d\n",
 951                                sc->unit, pkts);
 952 #endif
 953                         break;
 954                 }
 955         }
 956
 957         blkp->txtail = i;       /* record next free granule */
 958
 959         /*
 960          * Mark the last descriptor, so that the SCA know where to stop.
 961          */
 962         txdesc--;               /* back up to last descriptor in list */
 963         txdesc->stat |= SCA_DESC_EOT;   /* mark as end of list */
 964
 965         /*
 966          * Now we'll reset the transmit granule's descriptor address so we
 967          * can record this in the structure and fire it off w/ the DMA
 968          * processor of the serial chip...
 969          */
 970         txdesc = (sca_descriptor *)(uintptr_t)blkp->txdesc;
 971         blkp->txeda = (u_short)((uintptr_t)&txdesc[i]);
 972
 973         sc->txb_inuse++;        /* update inuse status */
 974         sc->txb_new++;          /* new traffic wuz added */
 975
 976         if (sc->txb_new == SR_TX_BLOCKS)
 977                 sc->txb_new = 0;
 978
 979         /*
 980          * If the tranmitter wasn't marked as "busy" we will force it to be
 981          * started...
 982          */
 983         if (sc->xmit_busy == 0) {
 984                 sr_xmit(sc);
 985 #if BUGGY > 9
 986                 printf("sr%d.srstart: called sr_xmit()\n", sc->unit);
 987 #endif
 988         }
 989         goto top_srstart;
 990 }
 991
 992 #ifndef NETGRAPH
 993 /*
 994  * Handle ioctl's at the device level, though we *will* call up
 995  * a layer...
 996  */
 997 #if BUGGY > 2
 998 static int bug_splats[] = {0, 0, 0, 0, 0, 0, 0, 0};
 999 #endif
1000
1001 static int
1002 srioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1003 {
1004         int s, error, was_up, should_be_up;
1005         struct sr_softc *sc = ifp->if_softc;
1006
1007 #if BUGGY > 0
1008         if_printf(ifp, "srioctl(ifp=%08x, cmd=%08x, data=%08x)\n",
1009                ifp, cmd, data);
1010 #endif
1011
1012         was_up = ifp->if_flags & IFF_RUNNING;
1013
1014         error = sppp_ioctl(ifp, cmd, data);
1015
1016 #if BUGGY > 1
1017         if_printf(ifp, "ioctl: ifsppp.pp_flags = %08x, if_flags %08x.\n",
1018               ((struct sppp *)ifp)->pp_flags, ifp->if_flags);
1019 #endif
1020
1021         if (error)
1022                 return error;
1023
1024         if ((cmd != SIOCSIFFLAGS) && (cmd != SIOCSIFADDR)) {
1025 #if BUGGY > 2
1026                 if (bug_splats[sc->unit]++ < 2) {
1027                         printf("sr(%d).if_addrlist = %08x\n",
1028                                sc->unit, ifp->if_addrlist);
1029                         printf("sr(%d).if_bpf = %08x\n",
1030                                sc->unit, ifp->if_bpf);
1031                         printf("sr(%d).if_init = %08x\n",
1032                                sc->unit, ifp->if_init);
1033                         printf("sr(%d).if_output = %08x\n",
1034                                sc->unit, ifp->if_output);
1035                         printf("sr(%d).if_start = %08x\n",
1036                                sc->unit, ifp->if_start);
1037                         printf("sr(%d).if_done = %08x\n",
1038                                sc->unit, ifp->if_done);
1039                         printf("sr(%d).if_ioctl = %08x\n",
1040                                sc->unit, ifp->if_ioctl);
1041                         printf("sr(%d).if_reset = %08x\n",
1042                                sc->unit, ifp->if_reset);
1043                         printf("sr(%d).if_watchdog = %08x\n",
1044                                sc->unit, ifp->if_watchdog);
1045                 }
1046 #endif
1047                 return 0;
1048         }
1049
1050         s = splimp();
1051         should_be_up = ifp->if_flags & IFF_RUNNING;
1052
1053         if (!was_up && should_be_up) {
1054                 /*
1055                  * Interface should be up -- start it.
1056                  */
1057                 sr_up(sc);
1058                 srstart(ifp);
1059
1060                 /*
1061                  * XXX Clear the IFF_UP flag so that the link will only go
1062                  * up after sppp lcp and ipcp negotiation.
1063                  */
1064                 /* ifp->if_flags &= ~IFF_UP; */
1065         } else if (was_up && !should_be_up) {
1066                 /*
1067                  * Interface should be down -- stop it.
1068                  */
1069                 sr_down(sc);
1070                 sppp_flush(ifp);
1071         }
1072         splx(s);
1073         return 0;
1074 }
1075 #endif /* NETGRAPH */
1076
1077 /*
1078  * This is to catch lost tx interrupts.
1079  */
1080 static void
1081 #ifndef NETGRAPH
1082 srwatchdog(struct ifnet *ifp)
1083 #else
1084 srwatchdog(struct sr_softc *sc)
1085 #endif /* NETGRAPH */
1086 {
1087         int     got_st0, got_st1, got_st3, got_dsr;
1088 #ifndef NETGRAPH
1089         struct sr_softc *sc = ifp->if_softc;
1090 #endif /* NETGRAPH */
1091         struct sr_hardc *hc = sc->hc;
1092         msci_channel *msci = &hc->sca->msci[sc->scachan];
1093         dmac_channel *dmac = &sc->hc->sca->dmac[sc->scachan];
1094
1095 #if BUGGY > 0
1096 #ifndef NETGRAPH
1097         printf("srwatchdog(unit=%d)\n", unit);
1098 #else
1099         printf("srwatchdog(unit=%d)\n", sc->unit);
1100 #endif /* NETGRAPH */
1101 #endif
1102
1103 #ifndef NETGRAPH
1104         if (!(ifp->if_flags & IFF_RUNNING))
1105                 return;
1106
1107         ifp->if_oerrors++;      /* update output error count */
1108 #else   /* NETGRAPH */
1109         sc->oerrors++;  /* update output error count */
1110 #endif /* NETGRAPH */
1111
1112         got_st0 = SRC_GET8(hc, msci->st0);
1113         got_st1 = SRC_GET8(hc, msci->st1);
1114         got_st3 = SRC_GET8(hc, msci->st3);
1115         got_dsr = SRC_GET8(hc, dmac->dsr);
1116
1117 #ifndef NETGRAPH
1118 #if     0
1119         if (ifp->if_flags & IFF_DEBUG)
1120 #endif
1121                 printf("sr%d: transmit failed, "
1122 #else   /* NETGRAPH */
1123         printf("sr%d: transmit failed, "
1124 #endif /* NETGRAPH */
1125                        "ST0 %02x, ST1 %02x, ST3 %02x, DSR %02x.\n",
1126                        sc->unit,
1127                        got_st0, got_st1, got_st3, got_dsr);
1128
1129         if (SRC_GET8(hc, msci->st1) & SCA_ST1_UDRN) {
1130                 SRC_PUT8(hc, msci->cmd, SCA_CMD_TXABORT);
1131                 SRC_PUT8(hc, msci->cmd, SCA_CMD_TXENABLE);
1132                 SRC_PUT8(hc, msci->st1, SCA_ST1_UDRN);
1133         }
1134         sc->xmit_busy = 0;
1135 #ifndef NETGRAPH
1136         ifp->if_flags &= ~IFF_OACTIVE;
1137 #else
1138         /*ifp->if_flags &= ~IFF_OACTIVE; */
1139 #endif /* NETGRAPH */
1140
1141         if (sc->txb_inuse && --sc->txb_inuse)
1142                 sr_xmit(sc);
1143
1144 #ifndef NETGRAPH
1145         srstart(ifp);   /* restart transmitter */
1146 #else
1147         srstart(sc);    /* restart transmitter */
1148 #endif /* NETGRAPH */
1149 }
1150
1151 static void
1152 sr_up(struct sr_softc *sc)
1153 {
1154         struct sr_hardc *hc = sc->hc;
1155         sca_regs *sca = hc->sca;
1156         msci_channel *msci = &sca->msci[sc->scachan];
1157
1158 #if BUGGY > 0
1159         printf("sr_up(sc=%08x)\n", sc);
1160 #endif
1161
1162         /*
1163          * Enable transmitter and receiver. Raise DTR and RTS. Enable
1164          * interrupts.
1165          *
1166          * XXX What about using AUTO mode in msci->md0 ???
1167          */
1168         SRC_PUT8(hc, msci->ctl, SRC_GET8(hc, msci->ctl) & ~SCA_CTL_RTS);
1169
1170         if (sc->scachan == 0)
1171                 switch (hc->cardtype) {
1172                 case SR_CRD_N2:
1173                         sr_outb(hc, SR_MCR,
1174                             (sr_inb(hc, SR_MCR) & ~SR_MCR_DTR0));
1175                         break;
1176                 case SR_CRD_N2PCI:
1177                         sr_write_fecr(hc, sr_read_fecr(hc) & ~SR_FECR_DTR0);
1178                         break;
1179                 }
1180         else
1181                 switch (hc->cardtype) {
1182                 case SR_CRD_N2:
1183                         sr_outb(hc, SR_MCR,
1184                             (sr_inb(hc, SR_MCR) & ~SR_MCR_DTR1));
1185                         break;
1186                 case SR_CRD_N2PCI:
1187                         sr_write_fecr(hc, sr_read_fecr(hc) & ~SR_FECR_DTR1);
1188                         break;
1189                 }
1190
1191         if (sc->scachan == 0) {
1192                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) | 0x000F);
1193                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) | 0x000F);
1194         } else {
1195                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) | 0x00F0);
1196                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) | 0x00F0);
1197         }
1198
1199         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXENABLE);
1200         sr_inb(hc, 0);  /* XXX slow it down a bit. */
1201         SRC_PUT8(hc, msci->cmd, SCA_CMD_TXENABLE);
1202
1203 #ifndef NETGRAPH
1204 #ifdef USE_MODEMCK
1205         if (sr_watcher == 0)
1206                 sr_modemck(NULL);
1207 #endif
1208 #else   /* NETGRAPH */
1209         untimeout(ngsr_watchdog_frame, sc, sc->handle);
1210         sc->handle = timeout(ngsr_watchdog_frame, sc, hz);
1211         sc->running = 1;
1212 #endif /* NETGRAPH */
1213 }
1214
1215 static void
1216 sr_down(struct sr_softc *sc)
1217 {
1218         struct sr_hardc *hc = sc->hc;
1219         sca_regs *sca = hc->sca;
1220         msci_channel *msci = &sca->msci[sc->scachan];
1221
1222 #if BUGGY > 0
1223         printf("sr_down(sc=%08x)\n", sc);
1224 #endif
1225 #ifdef NETGRAPH
1226         untimeout(ngsr_watchdog_frame, sc, sc->handle);
1227         sc->running = 0;
1228 #endif /* NETGRAPH */
1229
1230         /*
1231          * Disable transmitter and receiver. Lower DTR and RTS. Disable
1232          * interrupts.
1233          */
1234         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXDISABLE);
1235         sr_inb(hc, 0);  /* XXX slow it down a bit. */
1236         SRC_PUT8(hc, msci->cmd, SCA_CMD_TXDISABLE);
1237
1238         SRC_PUT8(hc, msci->ctl, SRC_GET8(hc, msci->ctl) | SCA_CTL_RTS);
1239
1240         if (sc->scachan == 0)
1241                 switch (hc->cardtype) {
1242                 case SR_CRD_N2:
1243                         sr_outb(hc, SR_MCR, sr_inb(hc, SR_MCR) | SR_MCR_DTR0);
1244                         break;
1245                 case SR_CRD_N2PCI:
1246                         sr_write_fecr(hc, sr_read_fecr(hc) | SR_FECR_DTR0);
1247                         break;
1248                 }
1249         else
1250                 switch (hc->cardtype) {
1251                 case SR_CRD_N2:
1252                         sr_outb(hc, SR_MCR, sr_inb(hc, SR_MCR) | SR_MCR_DTR1);
1253                         break;
1254                 case SR_CRD_N2PCI:
1255                         sr_write_fecr(hc, sr_read_fecr(hc) | SR_FECR_DTR1);
1256                         break;
1257                 }
1258
1259         if (sc->scachan == 0) {
1260                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) & ~0x0F);
1261                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) & ~0x0F);
1262         } else {
1263                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) & ~0xF0);
1264                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) & ~0xF0);
1265         }
1266 }
1267
1268 /*
1269  * Initialize the card, allocate memory for the sr_softc structures
1270  * and fill in the pointers.
1271  */
1272 static void
1273 src_init(struct sr_hardc *hc)
1274 {
1275         struct sr_softc *sc = hc->sc;
1276         int x;
1277         u_int chanmem;
1278         u_int bufmem;
1279         u_int next;
1280         u_int descneeded;
1281
1282 #if BUGGY > 0
1283         printf("src_init(hc=%08x)\n", hc);
1284 #endif
1285
1286         chanmem = hc->memsize / hc->numports;
1287         next = 0;
1288
1289         for (x = 0; x < hc->numports; x++, sc++) {
1290                 int blk;
1291
1292                 for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1293                         sc->block[blk].txdesc = next;
1294                         bufmem = (16 * 1024) / SR_TX_BLOCKS;
1295                         descneeded = bufmem / SR_BUF_SIZ;
1296
1297                         sc->block[blk].txstart = sc->block[blk].txdesc
1298                             + ((((descneeded * sizeof(sca_descriptor))
1299                                  / SR_BUF_SIZ) + 1)
1300                                * SR_BUF_SIZ);
1301
1302                         sc->block[blk].txend = next + bufmem;
1303                         sc->block[blk].txmax =
1304                             (sc->block[blk].txend - sc->block[blk].txstart)
1305                             / SR_BUF_SIZ;
1306                         next += bufmem;
1307
1308 #if BUGGY > 2
1309                         printf("sr%d: blk %d: txdesc %08x, txstart %08x\n",
1310                                sc->unit, blk,
1311                                sc->block[blk].txdesc, sc->block[blk].txstart);
1312 #endif
1313                 }
1314
1315                 sc->rxdesc = next;
1316                 bufmem = chanmem - (bufmem * SR_TX_BLOCKS);
1317                 descneeded = bufmem / SR_BUF_SIZ;
1318                 sc->rxstart = sc->rxdesc +
1319                     ((((descneeded * sizeof(sca_descriptor)) /
1320                        SR_BUF_SIZ) + 1) * SR_BUF_SIZ);
1321                 sc->rxend = next + bufmem;
1322                 sc->rxmax = (sc->rxend - sc->rxstart) / SR_BUF_SIZ;
1323                 next += bufmem;
1324         }
1325 }
1326
1327 /*
1328  * The things done here are channel independent.
1329  *
1330  * Configure the sca waitstates.
1331  * Configure the global interrupt registers.
1332  * Enable master dma enable.
1333  */
1334 static void
1335 sr_init_sca(struct sr_hardc *hc)
1336 {
1337         sca_regs *sca = hc->sca;
1338
1339 #if BUGGY > 0
1340         printf("sr_init_sca(hc=%08x)\n", hc);
1341 #endif
1342
1343         /*
1344          * Do the wait registers. Set everything to 0 wait states.
1345          */
1346         SRC_PUT8(hc, sca->pabr0, 0);
1347         SRC_PUT8(hc, sca->pabr1, 0);
1348         SRC_PUT8(hc, sca->wcrl, 0);
1349         SRC_PUT8(hc, sca->wcrm, 0);
1350         SRC_PUT8(hc, sca->wcrh, 0);
1351
1352         /*
1353          * Configure the interrupt registers. Most are cleared until the
1354          * interface is configured.
1355          */
1356         SRC_PUT8(hc, sca->ier0, 0x00);          /* MSCI interrupts. */
1357         SRC_PUT8(hc, sca->ier1, 0x00);          /* DMAC interrupts */
1358         SRC_PUT8(hc, sca->ier2, 0x00);          /* TIMER interrupts. */
1359         SRC_PUT8(hc, sca->itcr, 0x00);          /* Use ivr and no intr ack */
1360         SRC_PUT8(hc, sca->ivr, 0x40);           /* Interrupt vector. */
1361         SRC_PUT8(hc, sca->imvr, 0x40);
1362
1363         /*
1364          * Configure the timers. XXX Later
1365          */
1366
1367         /*
1368          * Set the DMA channel priority to rotate between all four channels.
1369          *
1370          * Enable all dma channels.
1371          */
1372         SRC_PUT8(hc, sca->pcr, SCA_PCR_PR2);
1373         SRC_PUT8(hc, sca->dmer, SCA_DMER_EN);
1374 }
1375
1376 /*
1377  * Configure the msci
1378  *
1379  * NOTE: The serial port configuration is hardcoded at the moment.
1380  */
1381 static void
1382 sr_init_msci(struct sr_softc *sc)
1383 {
1384         int portndx;            /* on-board port number */
1385         u_int mcr_v;            /* contents of modem control */
1386         struct sr_hardc *hc = sc->hc;
1387         msci_channel *msci = &hc->sca->msci[sc->scachan];
1388 #ifdef N2_TEST_SPEED
1389         int br_v;               /* contents for BR divisor */
1390         int etcndx;             /* index into ETC table */
1391         int fifo_v, gotspeed;   /* final tabled speed found */
1392         int tmc_v;              /* timer control register */
1393         int wanted;             /* speed (bitrate) wanted... */
1394         struct rate_line *rtp;
1395 #endif
1396
1397         portndx = sc->scachan;
1398
1399 #if BUGGY > 0
1400         printf("sr: sr_init_msci( sc=%08x)\n", sc);
1401 #endif
1402
1403         SRC_PUT8(hc, msci->cmd, SCA_CMD_RESET);
1404         SRC_PUT8(hc, msci->md0, SCA_MD0_CRC_1 | SCA_MD0_CRC_CCITT |
1405             SCA_MD0_CRC_ENABLE | SCA_MD0_MODE_HDLC);
1406         SRC_PUT8(hc, msci->md1, SCA_MD1_NOADDRCHK);
1407         SRC_PUT8(hc, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
1408
1409         /*
1410          * According to the manual I should give a reset after changing the
1411          * mode registers.
1412          */
1413         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXRESET);
1414         SRC_PUT8(hc, msci->ctl, SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS);
1415
1416         /*
1417          * XXX Later we will have to support different clock settings.
1418          */
1419         switch (sc->clk_cfg) {
1420         default:
1421 #if BUGGY > 0
1422                 printf("sr%: clk_cfg=%08x, selected default clock.\n",
1423                        portndx, sc->clk_cfg);
1424 #endif
1425                 /* FALLTHROUGH */
1426         case SR_FLAGS_EXT_CLK:
1427                 /*
1428                  * For now all interfaces are programmed to use the RX clock
1429                  * for the TX clock.
1430                  */
1431
1432 #if BUGGY > 0
1433                 printf("sr%d: External Clock Selected.\n", portndx);
1434 #endif
1435
1436                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1437                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_RX | SCA_TXS_DIV1);
1438                 break;
1439
1440         case SR_FLAGS_EXT_SEP_CLK:
1441 #if BUGGY > 0
1442                 printf("sr%d: Split Clocking Selected.\n", portndx);
1443 #endif
1444
1445                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1446                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_TXC | SCA_TXS_DIV1);
1447                 break;
1448
1449         case SR_FLAGS_INT_CLK:
1450 #if BUGGY > 0
1451                 printf("sr%d: Internal Clocking selected.\n", portndx);
1452 #endif
1453
1454                 /*
1455                  * XXX I do need some code to set the baud rate here!
1456                  */
1457 #ifdef N2_TEST_SPEED
1458                 switch (hc->cardtype) {
1459                 case SR_CRD_N2PCI:
1460                         mcr_v = sr_read_fecr(hc);
1461                         etcndx = 2;
1462                         break;
1463                 case SR_CRD_N2:
1464                 default:
1465                         mcr_v = sr_inb(hc, SR_MCR);
1466                         etcndx = 0;
1467                 }
1468
1469                 fifo_v = 0x10;  /* stolen from Linux version */
1470
1471                 /*
1472                  * search for appropriate speed in table, don't calc it:
1473                  */
1474                 wanted = sr_test_speed[portndx];
1475                 rtp = &n2_rates[0];     /* point to first table item */
1476
1477                 while ((rtp->target > 0)        /* search table for speed */
1478                        &&(rtp->target != wanted))
1479                         rtp++;
1480
1481                 /*
1482                  * We've searched the table for a matching speed.  If we've
1483                  * found the correct rate line, we'll get the pre-calc'd
1484                  * values for the TMC and baud rate divisor for subsequent
1485                  * use...
1486                  */
1487                 if (rtp->target > 0) {  /* use table-provided values */
1488                         gotspeed = wanted;
1489                         tmc_v = rtp->tmc_reg;
1490                         br_v = rtp->br_reg;
1491                 } else {        /* otherwise assume 1MBit comm rate */
1492                         gotspeed = 10000;
1493                         tmc_v = 5;
1494                         br_v = 1;
1495                 }
1496
1497                 /*
1498                  * Now we mask in the enable clock output for the MCR:
1499                  */
1500                 mcr_v |= etc0vals[etcndx + portndx];
1501
1502                 /*
1503                  * Now we'll program the registers with these speed- related
1504                  * contents...
1505                  */
1506                 SRC_PUT8(hc, msci->tmc, tmc_v);
1507                 SRC_PUT8(hc, msci->trc0, fifo_v);
1508                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_INT + br_v);
1509                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_INT + br_v);
1510
1511                 switch (hc->cardtype) {
1512                 case SR_CRD_N2PCI:
1513                         sr_write_fecr(hc, mcr_v);
1514                         break;
1515                 case SR_CRD_N2:
1516                 default:
1517                         sr_outb(hc, SR_MCR, mcr_v);
1518                 }
1519
1520 #if BUGGY > 0
1521                 if (wanted != gotspeed)
1522                         printf("sr%d: Speed wanted=%d, found=%d\n",
1523                                wanted, gotspeed);
1524
1525                 printf("sr%d: Internal Clock %dx100 BPS, tmc=%d, div=%d\n",
1526                        portndx, gotspeed, tmc_v, br_v);
1527 #endif
1528 #else
1529                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_INT | SCA_RXS_DIV1);
1530                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_INT | SCA_TXS_DIV1);
1531
1532                 SRC_PUT8(hc, msci->tmc, 5);
1533
1534                 if (portndx == 0)
1535                         switch (hc->cardtype) {
1536                         case SR_CRD_N2PCI:
1537                                 sr_write_fecr(hc,
1538                                     sr_read_fecr(hc) | SR_FECR_ETC0);
1539                                 break;
1540                         case SR_CRD_N2:
1541                         default:
1542                                 mcr_v = sr_inb(hc, SR_MCR);
1543                                 mcr_v |= SR_MCR_ETC0;
1544                                 sr_outb(hc, SR_MCR, mcr_v);
1545                         }
1546                 else
1547                         switch (hc->cardtype) {
1548                         case SR_CRD_N2:
1549                                 mcr_v = sr_inb(hc, SR_MCR);
1550                                 mcr_v |= SR_MCR_ETC1;
1551                                 sr_outb(hc, SR_MCR, mcr_v);
1552                                 break;
1553                         case SR_CRD_N2PCI:
1554                                 sr_write_fecr(hc,
1555                                     sr_read_fecr(hc) | SR_FECR_ETC1);
1556                                 break;
1557                         }
1558 #endif
1559         }
1560
1561         /*
1562          * XXX Disable all interrupts for now. I think if you are using the
1563          * dmac you don't use these interrupts.
1564          */
1565         SRC_PUT8(hc, msci->ie0, 0);
1566         SRC_PUT8(hc, msci->ie1, 0x0C);
1567         SRC_PUT8(hc, msci->ie2, 0);
1568         SRC_PUT8(hc, msci->fie, 0);
1569
1570         SRC_PUT8(hc, msci->sa0, 0);
1571         SRC_PUT8(hc, msci->sa1, 0);
1572
1573         SRC_PUT8(hc, msci->idl, 0x7E);  /* set flags value */
1574
1575         SRC_PUT8(hc, msci->rrc, 0x0E);
1576         SRC_PUT8(hc, msci->trc0, 0x10);
1577         SRC_PUT8(hc, msci->trc1, 0x1F);
1578 }
1579
1580 /*
1581  * Configure the rx dma controller.
1582  */
1583 static void
1584 sr_init_rx_dmac(struct sr_softc *sc)
1585 {
1586         struct sr_hardc *hc;
1587         dmac_channel *dmac;
1588         sca_descriptor *rxd;
1589         u_int cda_v, sarb_v, rxbuf, rxda, rxda_d;
1590
1591 #if BUGGY > 0
1592         printf("sr_init_rx_dmac(sc=%08x)\n", sc);
1593 #endif
1594
1595         hc = sc->hc;
1596         dmac = &hc->sca->dmac[DMAC_RXCH(sc->scachan)];
1597
1598         if (hc->mempages)
1599                 SRC_SET_MEM(hc, sc->rxdesc);
1600
1601         /*
1602          * This phase initializes the contents of the descriptor table
1603          * needed to construct a circular buffer...
1604          */
1605         rxd = (sca_descriptor *)(hc->mem_start + (sc->rxdesc & hc->winmsk));
1606         rxda_d = (uintptr_t) hc->mem_start - (sc->rxdesc & ~hc->winmsk);
1607
1608         for (rxbuf = sc->rxstart;
1609              rxbuf < sc->rxend;
1610              rxbuf += SR_BUF_SIZ, rxd++) {
1611                 /*
1612                  * construct the circular chain...
1613                  */
1614                 rxda = (uintptr_t) &rxd[1] - rxda_d + hc->mem_pstart;
1615                 rxd->cp = (u_short)(rxda & 0xffff);
1616
1617                 /*
1618                  * set the on-card buffer address...
1619                  */
1620                 rxd->bp = (u_short)((rxbuf + hc->mem_pstart) & 0xffff);
1621                 rxd->bpb = (u_char)(((rxbuf + hc->mem_pstart) >> 16) & 0xff);
1622
1623                 rxd->len = 0;   /* bytes resident w/in granule */
1624                 rxd->stat = 0xff;       /* The sca write here when finished */
1625         }
1626
1627         /*
1628          * heal the chain so that the last entry points to the first...
1629          */
1630         rxd--;
1631         rxd->cp = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1632
1633         /*
1634          * reset the reception handler's index...
1635          */
1636         sc->rxhind = 0;
1637
1638         /*
1639          * We'll now configure the receiver's DMA logic...
1640          */
1641         SRC_PUT8(hc, dmac->dsr, 0);     /* Disable DMA transfer */
1642         SRC_PUT8(hc, dmac->dcr, SCA_DCR_ABRT);
1643
1644         /* XXX maybe also SCA_DMR_CNTE */
1645         SRC_PUT8(hc, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1646         SRC_PUT16(hc, dmac->bfl, SR_BUF_SIZ);
1647
1648         cda_v = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1649         sarb_v = (u_char)(((sc->rxdesc + hc->mem_pstart) >> 16) & 0xff);
1650
1651         SRC_PUT16(hc, dmac->cda, cda_v);
1652         SRC_PUT8(hc, dmac->sarb, sarb_v);
1653
1654         rxd = (sca_descriptor *)(uintptr_t)sc->rxstart;
1655
1656         SRC_PUT16(hc, dmac->eda,
1657             (u_short)((uintptr_t)&rxd[sc->rxmax - 1] & 0xffff));
1658
1659         SRC_PUT8(hc, dmac->dir, 0xF0);
1660
1661         SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);    /* Enable DMA */
1662 }
1663
1664 /*
1665  * Configure the TX DMA descriptors.
1666  * Initialize the needed values and chain the descriptors.
1667  */
1668 static void
1669 sr_init_tx_dmac(struct sr_softc *sc)
1670 {
1671         int blk;
1672         u_int txbuf, txda, txda_d;
1673         struct sr_hardc *hc;
1674         sca_descriptor *txd;
1675         dmac_channel *dmac;
1676         struct buf_block *blkp;
1677         u_int x;
1678         u_int sarb_v;
1679
1680 #if BUGGY > 0
1681         printf("sr_init_tx_dmac(sc=%08x)\n", sc);
1682 #endif
1683
1684         hc = sc->hc;
1685         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
1686
1687         if (hc->mempages)
1688                 SRC_SET_MEM(hc, sc->block[0].txdesc);
1689
1690         /*
1691          * Initialize the array of descriptors for transmission
1692          */
1693         for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1694                 blkp = &sc->block[blk];
1695                 txd = (sca_descriptor *)(hc->mem_start
1696                                          + (blkp->txdesc & hc->winmsk));
1697                 txda_d = (uintptr_t) hc->mem_start
1698                     - (blkp->txdesc & ~hc->winmsk);
1699
1700                 x = 0;
1701                 txbuf = blkp->txstart;
1702                 for (; txbuf < blkp->txend; txbuf += SR_BUF_SIZ, txd++) {
1703                         txda = (uintptr_t) &txd[1] - txda_d + hc->mem_pstart;
1704                         txd->cp = (u_short)(txda & 0xffff);
1705
1706                         txd->bp = (u_short)((txbuf + hc->mem_pstart)
1707                                             & 0xffff);
1708                         txd->bpb = (u_char)(((txbuf + hc->mem_pstart) >> 16)
1709                                             & 0xff);
1710                         txd->len = 0;
1711                         txd->stat = 0;
1712                         x++;
1713                 }
1714
1715                 txd--;
1716                 txd->cp = (u_short)((blkp->txdesc + hc->mem_pstart)
1717                                     & 0xffff);
1718
1719                 blkp->txtail = (uintptr_t)txd - (uintptr_t)hc->mem_start;
1720         }
1721
1722         SRC_PUT8(hc, dmac->dsr, 0);     /* Disable DMA */
1723         SRC_PUT8(hc, dmac->dcr, SCA_DCR_ABRT);
1724         SRC_PUT8(hc, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1725         SRC_PUT8(hc, dmac->dir, SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF);
1726
1727         sarb_v = (sc->block[0].txdesc + hc->mem_pstart) >> 16;
1728         sarb_v &= 0x00ff;
1729
1730         SRC_PUT8(hc, dmac->sarb, (u_char) sarb_v);
1731 }
1732
1733 /*
1734  * Look through the descriptors to see if there is a complete packet
1735  * available. Stop if we get to where the sca is busy.
1736  *
1737  * Return the length and status of the packet.
1738  * Return nonzero if there is a packet available.
1739  *
1740  * NOTE:
1741  * It seems that we get the interrupt a bit early. The updateing of
1742  * descriptor values is not always completed when this is called.
1743  */
1744 static int
1745 sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat)
1746 {
1747         int granules;   /* count of granules in pkt */
1748         int wki, wko;
1749         struct sr_hardc *hc;
1750         sca_descriptor *rxdesc; /* current descriptor */
1751         sca_descriptor *endp;   /* ending descriptor */
1752         sca_descriptor *cda;    /* starting descriptor */
1753
1754         hc = sc->hc;            /* get card's information */
1755
1756         /*
1757          * set up starting descriptor by pulling that info from the DMA half
1758          * of the HD chip...
1759          */
1760         wki = DMAC_RXCH(sc->scachan);
1761         wko = SRC_GET16(hc, hc->sca->dmac[wki].cda);
1762
1763         cda = (sca_descriptor *)(hc->mem_start + (wko & hc->winmsk));
1764
1765 #if BUGGY > 1
1766         printf("sr_packet_avail(): wki=%d, wko=%04x, cda=%08x\n",
1767                wki, wko, cda);
1768 #endif
1769
1770         /*
1771          * open the appropriate memory window and set our expectations...
1772          */
1773         if (hc->mempages) {
1774                 SRC_SET_MEM(hc, sc->rxdesc);
1775                 SRC_SET_ON(hc);
1776         }
1777         rxdesc = (sca_descriptor *)
1778             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1779         endp = rxdesc;
1780         rxdesc = &rxdesc[sc->rxhind];
1781         endp = &endp[sc->rxmax];
1782
1783         *len = 0;               /* reset result total length */
1784         granules = 0;           /* reset count of granules */
1785
1786         /*
1787          * This loop will scan descriptors, but it *will* puke up if we wrap
1788          * around to our starting point...
1789          */
1790         while (rxdesc != cda) {
1791                 *len += rxdesc->len;    /* increment result length */
1792                 granules++;
1793
1794                 /*
1795                  * If we hit a valid packet's completion we'll know we've
1796                  * got a live one, and that we can deliver the packet.
1797                  * Since we're only allowed to report a packet available,
1798                  * somebody else does that...
1799                  */
1800                 if (rxdesc->stat & SCA_DESC_EOM) {      /* End Of Message */
1801                         *rxstat = rxdesc->stat; /* return closing */
1802 #if BUGGY > 0
1803                         printf("sr%d: PKT AVAIL len %d, %x, bufs %u.\n",
1804                                sc->unit, *len, *rxstat, granules);
1805 #endif
1806                         return 1;       /* indicate success */
1807                 }
1808                 /*
1809                  * OK, this packet take up multiple granules.  Move on to
1810                  * the next descriptor so we can consider it...
1811                  */
1812                 rxdesc++;
1813
1814                 if (rxdesc == endp)     /* recognize & act on wrap point */
1815                         rxdesc = (sca_descriptor *)
1816                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1817         }
1818
1819         /*
1820          * Nothing found in the DPRAM.  Let the caller know...
1821          */
1822         *len = 0;
1823         *rxstat = 0;
1824
1825         return 0;
1826 }
1827
1828 /*
1829  * Copy a packet from the on card memory into a provided mbuf.
1830  * Take into account that buffers wrap and that a packet may
1831  * be larger than a buffer.
1832  */
1833 static void
1834 sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len)
1835 {
1836         struct sr_hardc *hc;
1837         sca_descriptor *rxdesc;
1838         u_int rxdata;
1839         u_int rxmax;
1840         u_int off = 0;
1841         u_int tlen;
1842
1843 #if BUGGY > 0
1844         printf("sr_copy_rxbuf(m=%08x,sc=%08x,len=%d)\n",
1845                m, sc, len);
1846 #endif
1847
1848         hc = sc->hc;
1849
1850         rxdata = sc->rxstart + (sc->rxhind * SR_BUF_SIZ);
1851         rxmax = sc->rxstart + (sc->rxmax * SR_BUF_SIZ);
1852
1853         rxdesc = (sca_descriptor *)
1854             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1855         rxdesc = &rxdesc[sc->rxhind];
1856
1857         /*
1858          * Using the count of bytes in the received packet, we decrement it
1859          * for each granule (controller by an SCA descriptor) to control the
1860          * looping...
1861          */
1862         while (len) {
1863                 /*
1864                  * tlen gets the length of *this* granule... ...which is
1865                  * then copied to the target buffer.
1866                  */
1867                 tlen = (len < SR_BUF_SIZ) ? len : SR_BUF_SIZ;
1868
1869                 if (hc->mempages)
1870                         SRC_SET_MEM(hc, rxdata);
1871
1872                 bcopy(hc->mem_start + (rxdata & hc->winmsk),
1873                       mtod(m, caddr_t) +off,
1874                       tlen);
1875
1876                 off += tlen;
1877                 len -= tlen;
1878
1879                 /*
1880                  * now, return to the descriptor's window in DPRAM and reset
1881                  * the descriptor we've just suctioned...
1882                  */
1883                 if (hc->mempages)
1884                         SRC_SET_MEM(hc, sc->rxdesc);
1885
1886                 rxdesc->len = 0;
1887                 rxdesc->stat = 0xff;
1888
1889                 /*
1890                  * Move on to the next granule.  If we've any remaining
1891                  * bytes to process we'll just continue in our loop...
1892                  */
1893                 rxdata += SR_BUF_SIZ;
1894                 rxdesc++;
1895
1896                 if (rxdata == rxmax) {  /* handle the wrap point */
1897                         rxdata = sc->rxstart;
1898                         rxdesc = (sca_descriptor *)
1899                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1900                 }
1901         }
1902 }
1903
1904 /*
1905  * If single is set, just eat a packet. Otherwise eat everything up to
1906  * where cda points. Update pointers to point to the next packet.
1907  *
1908  * This handles "flushing" of a packet as received...
1909  *
1910  * If the "single" parameter is zero, all pending reeceive traffic will
1911  * be flushed out of existence.  A non-zero value will only drop the
1912  * *next* (currently) pending packet...
1913  */
1914 static void
1915 sr_eat_packet(struct sr_softc *sc, int single)
1916 {
1917         struct sr_hardc *hc;
1918         sca_descriptor *rxdesc; /* current descriptor being eval'd */
1919         sca_descriptor *endp;   /* last descriptor in chain */
1920         sca_descriptor *cda;    /* current start point */
1921         u_int loopcnt = 0;      /* count of packets flushed ??? */
1922         u_char stat;            /* captured status byte from descr */
1923
1924         hc = sc->hc;
1925         cda = (sca_descriptor *)(hc->mem_start + (SRC_GET16(hc,
1926             hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda) & hc->winmsk));
1927
1928         /*
1929          * loop until desc->stat == (0xff || EOM) Clear the status and
1930          * length in the descriptor. Increment the descriptor.
1931          */
1932         if (hc->mempages)
1933                 SRC_SET_MEM(hc, sc->rxdesc);
1934
1935         rxdesc = (sca_descriptor *)
1936             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1937         endp = rxdesc;
1938         rxdesc = &rxdesc[sc->rxhind];
1939         endp = &endp[sc->rxmax];
1940
1941         /*
1942          * allow loop, but abort it if we wrap completely...
1943          */
1944         while (rxdesc != cda) {
1945                 loopcnt++;
1946
1947                 if (loopcnt > sc->rxmax) {
1948                         printf("sr%d: eat pkt %d loop, cda %p, "
1949                                "rxdesc %p, stat %x.\n",
1950                                sc->unit, loopcnt, cda, rxdesc,
1951                                rxdesc->stat);
1952                         break;
1953                 }
1954                 stat = rxdesc->stat;
1955
1956                 rxdesc->len = 0;
1957                 rxdesc->stat = 0xff;
1958
1959                 rxdesc++;
1960                 sc->rxhind++;
1961
1962                 if (rxdesc == endp) {
1963                         rxdesc = (sca_descriptor *)
1964                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1965                         sc->rxhind = 0;
1966                 }
1967                 if (single && (stat == SCA_DESC_EOM))
1968                         break;
1969         }
1970
1971         /*
1972          * Update the eda to the previous descriptor.
1973          */
1974         rxdesc = (sca_descriptor *)(uintptr_t)sc->rxdesc;
1975         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2) % sc->rxmax];
1976
1977         SRC_PUT16(hc, hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
1978             (u_short)(((uintptr_t)rxdesc + hc->mem_pstart) & 0xffff));
1979 }
1980
1981 /*
1982  * While there is packets available in the rx buffer, read them out
1983  * into mbufs and ship them off.
1984  */
1985 static void
1986 sr_get_packets(struct sr_softc *sc)
1987 {
1988         u_char rxstat;          /* acquired status byte */
1989         int i;
1990         int pkts;               /* count of packets found */
1991         int rxndx;              /* rcv buffer index */
1992         int tries;              /* settling time counter */
1993         u_int len;              /* length of pending packet */
1994         struct sr_hardc *hc;    /* card-level information */
1995         sca_descriptor *rxdesc; /* descriptor in memory */
1996 #ifndef NETGRAPH
1997         struct ifnet *ifp;      /* network intf ctl table */
1998 #else
1999         int error;
2000 #endif /* NETGRAPH */
2001         struct mbuf *m = NULL;  /* message buffer */
2002
2003 #if BUGGY > 0
2004         printf("sr_get_packets(sc=%08x)\n", sc);
2005 #endif
2006
2007         hc = sc->hc;
2008 #ifndef NETGRAPH
2009         ifp = SC2IFP(sc);
2010 #endif /* NETGRAPH */
2011
2012         if (hc->mempages) {
2013                 SRC_SET_MEM(hc, sc->rxdesc);
2014                 SRC_SET_ON(hc); /* enable shared memory */
2015         }
2016         pkts = 0;               /* reset count of found packets */
2017
2018         /*
2019          * for each complete packet in the receiving pool, process each
2020          * packet...
2021          */
2022         while (sr_packet_avail(sc, &len, &rxstat)) {    /* packet pending? */
2023                 /*
2024                  * I have seen situations where we got the interrupt but the
2025                  * status value wasn't deposited.  This code should allow
2026                  * the status byte's value to settle...
2027                  */
2028
2029                 tries = 5;
2030
2031                 while ((rxstat == 0x00ff)
2032                        && --tries)
2033                         sr_packet_avail(sc, &len, &rxstat);
2034
2035 #if BUGGY > 1
2036                 printf("sr_packet_avail() returned len=%d, rxstat=%02ux\n",
2037                        len, rxstat);
2038 #endif
2039
2040                 pkts++;
2041 #ifdef NETGRAPH
2042                 sc->inbytes += len;
2043                 sc->inlast = 0;
2044 #endif /* NETGRAPH */
2045
2046                 /*
2047                  * OK, we've settled the incoming message status. We can now
2048                  * process it...
2049                  */
2050                 if (((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
2051 #if BUGGY > 1
2052                         printf("sr%d: sr_get_packet() rxstat=%02x, len=%d\n",
2053                                sc->unit, rxstat, len);
2054 #endif
2055
2056                         MGETHDR(m, M_DONTWAIT, MT_DATA);
2057                         if (m == NULL) {
2058                                 /*
2059                                  * eat (flush) packet if get mbuf fail!!
2060                                  */
2061                                 sr_eat_packet(sc, 1);
2062                                 continue;
2063                         }
2064                         /*
2065                          * construct control information for pass-off
2066                          */
2067 #ifndef NETGRAPH
2068                         m->m_pkthdr.rcvif = ifp;
2069 #else
2070                         m->m_pkthdr.rcvif = NULL;
2071 #endif /* NETGRAPH */
2072                         m->m_pkthdr.len = m->m_len = len;
2073                         if (len > MHLEN) {
2074                                 MCLGET(m, M_DONTWAIT);
2075                                 if ((m->m_flags & M_EXT) == 0) {
2076                                         /*
2077                                          * We couldn't get a big enough
2078                                          * message packet, so we'll send the
2079                                          * packet to /dev/null...
2080                                          */
2081                                         m_freem(m);
2082                                         sr_eat_packet(sc, 1);
2083                                         continue;
2084                                 }
2085                         }
2086                         /*
2087                          * OK, we've got a good message buffer.  Now we can
2088                          * copy the received message into it
2089                          */
2090                         sr_copy_rxbuf(m, sc, len);      /* copy from DPRAM */
2091
2092 #ifndef NETGRAPH
2093                         BPF_MTAP(ifp, m);
2094
2095 #if BUGGY > 3
2096                         {
2097                                 u_char *bp;
2098
2099                                 bp = (u_char *)m;
2100                                 printf("sr%d: rcvd=%02x%02x%02x%02x%02x%02x\n",
2101                                        sc->unit,
2102                                        bp[0], bp[1], bp[2],
2103                                        bp[4], bp[5], bp[6]);
2104                         }
2105 #endif
2106                         sppp_input(ifp, m);
2107                         ifp->if_ipackets++;
2108
2109 #else   /* NETGRAPH */
2110 #if BUGGY > 3
2111                         {
2112                                 u_char *bp;
2113
2114                                 bp = mtod(m,u_char *);
2115                                 printf("sr%d: rd=%02x:%02x:%02x:%02x:%02x:%02x",
2116                                        sc->unit,
2117                                        bp[0], bp[1], bp[2],
2118                                        bp[4], bp[5], bp[6]);
2119                                 printf(":%02x:%02x:%02x:%02x:%02x:%02x\n",
2120                                        bp[6], bp[7], bp[8],
2121                                        bp[9], bp[10], bp[11]);
2122                         }
2123 #endif
2124                         NG_SEND_DATA_ONLY(error, sc->hook, m);
2125                         sc->ipackets++;
2126 #endif /* NETGRAPH */
2127                         /*
2128                          * Update the eda to the previous descriptor.
2129                          */
2130                         i = (len + SR_BUF_SIZ - 1) / SR_BUF_SIZ;
2131                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
2132
2133                         rxdesc = (sca_descriptor *)(uintptr_t)sc->rxdesc;
2134                         rxndx = (sc->rxhind + sc->rxmax - 2) % sc->rxmax;
2135                         rxdesc = &rxdesc[rxndx];
2136
2137                         SRC_PUT16(hc, hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2138                             (u_short)(((uintptr_t)rxdesc + hc->mem_pstart)
2139                             & 0xffff));
2140
2141                 } else {
2142                         int got_st3, got_cda, got_eda;
2143                         int tries = 5;
2144
2145                         while ((rxstat == 0xff) && --tries)
2146                                 sr_packet_avail(sc, &len, &rxstat);
2147
2148                         /*
2149                          * It look like we get an interrupt early
2150                          * sometimes and then the status is not
2151                          * filled in yet.
2152                          */
2153                         if (tries && (tries != 5))
2154                                 continue;
2155
2156                         /*
2157                          * This chunk of code handles the error packets.
2158                          * We'll log them for posterity...
2159                          */
2160                         sr_eat_packet(sc, 1);
2161
2162 #ifndef NETGRAPH
2163                         ifp->if_ierrors++;
2164 #else
2165                         sc->ierrors[0]++;
2166 #endif /* NETGRAPH */
2167
2168                         got_st3 = SRC_GET8(hc,
2169                                   hc->sca->msci[sc->scachan].st3);
2170                         got_cda = SRC_GET16(hc,
2171                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda);
2172                         got_eda = SRC_GET16(hc,
2173                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda);
2174
2175 #if BUGGY > 0
2176                         printf("sr%d: Receive error chan %d, "
2177                                "stat %02x, msci st3 %02x,"
2178                                "rxhind %d, cda %04x, eda %04x.\n",
2179                                sc->unit, sc->scachan, rxstat,
2180                                got_st3, sc->rxhind, got_cda, got_eda);
2181 #endif
2182                 }
2183         }
2184
2185 #if BUGGY > 0
2186         printf("sr%d: sr_get_packets() found %d packet(s)\n",
2187                sc->unit, pkts);
2188 #endif
2189
2190         if (hc->mempages)
2191                 SRC_SET_OFF(hc);
2192 }
2193
2194 /*
2195  * All DMA interrupts come here.
2196  *
2197  * Each channel has two interrupts.
2198  * Interrupt A for errors and Interrupt B for normal stuff like end
2199  * of transmit or receive dmas.
2200  */
2201 static void
2202 sr_dmac_intr(struct sr_hardc *hc, u_char isr1)
2203 {
2204         u_char dsr;             /* contents of DMA Stat Reg */
2205         u_char dotxstart;       /* enables for tranmit part */
2206         int mch;                /* channel being processed */
2207         struct sr_softc *sc;    /* channel's softc structure */
2208         sca_regs *sca = hc->sca;
2209         dmac_channel *dmac;     /* dma structure of chip */
2210
2211 #if BUGGY > 0
2212         printf("sr_dmac_intr(hc=%08x,isr1=%04x)\n", hc, isr1);
2213 #endif
2214
2215         mch = 0;                /* assume chan0 on card */
2216         dotxstart = isr1;       /* copy for xmitter starts */
2217
2218         /*
2219          * Shortcut if there is no interrupts for dma channel 0 or 1.
2220          * Skip processing for channel 0 if no incoming hit
2221          */
2222         if ((isr1 & 0x0F) == 0) {
2223                 mch = 1;
2224                 isr1 >>= 4;
2225         }
2226         do {
2227                 sc = &hc->sc[mch];
2228
2229                 /*
2230                  * Transmit channel - DMA Status Register Evaluation
2231                  */
2232                 if (isr1 & 0x0C) {
2233                         dmac = &sca->dmac[DMAC_TXCH(mch)];
2234
2235                         /*
2236                          * get the DMA Status Register contents and write
2237                          * back to reset interrupt...
2238                          */
2239                         dsr = SRC_GET8(hc, dmac->dsr);
2240                         SRC_PUT8(hc, dmac->dsr, dsr);
2241
2242                         /*
2243                          * Check for (& process) a Counter overflow
2244                          */
2245                         if (dsr & SCA_DSR_COF) {
2246                                 printf("sr%d: TX DMA Counter overflow, "
2247                                        "txpacket no %lu.\n",
2248 #ifndef NETGRAPH
2249                                        sc->unit, SC2IFP(sc)->if_opackets);
2250                                 SC2IFP(sc)->if_oerrors++;
2251 #else
2252                                        sc->unit, sc->opackets);
2253                                 sc->oerrors++;
2254 #endif /* NETGRAPH */
2255                         }
2256                         /*
2257                          * Check for (& process) a Buffer overflow
2258                          */
2259                         if (dsr & SCA_DSR_BOF) {
2260                                 printf("sr%d: TX DMA Buffer overflow, "
2261                                        "txpacket no %lu, dsr %02x, "
2262                                        "cda %04x, eda %04x.\n",
2263 #ifndef NETGRAPH
2264                                        sc->unit, SC2IFP(sc)->if_opackets,
2265 #else
2266                                        sc->unit, sc->opackets,
2267 #endif /* NETGRAPH */
2268                                        dsr,
2269                                        SRC_GET16(hc, dmac->cda),
2270                                        SRC_GET16(hc, dmac->eda));
2271 #ifndef NETGRAPH
2272                                 SC2IFP(sc)->if_oerrors++;
2273 #else
2274                                 sc->oerrors++;
2275 #endif /* NETGRAPH */
2276                         }
2277                         /*
2278                          * Check for (& process) an End of Transfer (OK)
2279                          */
2280                         if (dsr & SCA_DSR_EOT) {
2281                                 /*
2282                                  * This should be the most common case.
2283                                  *
2284                                  * Clear the IFF_OACTIVE flag.
2285                                  *
2286                                  * Call srstart to start a new transmit if
2287                                  * there is data to transmit.
2288                                  */
2289 #if BUGGY > 0
2290                                 printf("sr%d: TX Completed OK\n", sc->unit);
2291 #endif
2292                                 sc->xmit_busy = 0;
2293 #ifndef NETGRAPH
2294                                 SC2IFP(sc)->if_flags &= ~IFF_OACTIVE;
2295                                 SC2IFP(sc)->if_timer = 0;
2296 #else
2297                                 /* XXX may need to mark tx inactive? */
2298                                 sc->out_deficit++;
2299                                 sc->out_dog = DOG_HOLDOFF;
2300 #endif /* NETGRAPH */
2301
2302                                 if (sc->txb_inuse && --sc->txb_inuse)
2303                                         sr_xmit(sc);
2304                         }
2305                 }
2306                 /*
2307                  * Receive channel processing of DMA Status Register
2308                  */
2309                 if (isr1 & 0x03) {
2310                         dmac = &sca->dmac[DMAC_RXCH(mch)];
2311
2312                         dsr = SRC_GET8(hc, dmac->dsr);
2313                         SRC_PUT8(hc, dmac->dsr, dsr);
2314
2315                         /*
2316                          * End of frame processing (MSG OK?)
2317                          */
2318                         if (dsr & SCA_DSR_EOM) {
2319 #if BUGGY > 0
2320                                 int tt, ind;
2321
2322 #ifndef NETGRAPH
2323                                 tt = SC2IFP(sc)->if_ipackets;
2324 #else   /* NETGRAPH */
2325                                 tt = sc->ipackets;
2326 #endif /* NETGRAPH */
2327                                 ind = sc->rxhind;
2328 #endif
2329
2330                                 sr_get_packets(sc);
2331 #if BUGGY > 0
2332 #ifndef NETGRAPH
2333                                 if (tt == SC2IFP(sc)->if_ipackets)
2334 #else   /* NETGRAPH */
2335                                 if (tt == sc->ipackets)
2336 #endif /* NETGRAPH */
2337                                 {
2338                                         sca_descriptor *rxdesc;
2339                                         int i;
2340
2341                                         printf("SR: RXINTR isr1 %x, dsr %x, "
2342                                                "no data %d pkts, orxind %d.\n",
2343                                                dotxstart, dsr, tt, ind);
2344                                         printf("SR: rxdesc %x, rxstart %x, "
2345                                                "rxend %x, rxhind %d, "
2346                                                "rxmax %d.\n",
2347                                                sc->rxdesc, sc->rxstart,
2348                                                sc->rxend, sc->rxhind,
2349                                                sc->rxmax);
2350                                         printf("SR: cda %x, eda %x.\n",
2351                                             SRC_GET16(hc, dmac->cda),
2352                                             SRC_GET16(hc, dmac->eda));
2353
2354                                         if (hc->mempages) {
2355                                                 SRC_SET_ON(hc);
2356                                                 SRC_SET_MEM(hc, sc->rxdesc);
2357                                         }
2358                                         rxdesc = (sca_descriptor *)
2359                                                  (hc->mem_start +
2360                                                   (sc->rxdesc & hc->winmsk));
2361                                         rxdesc = &rxdesc[sc->rxhind];
2362
2363                                         for (i = 0; i < 3; i++, rxdesc++)
2364                                                 printf("SR: rxdesc->stat %x, "
2365                                                        "len %d.\n",
2366                                                        rxdesc->stat,
2367                                                        rxdesc->len);
2368
2369                                         if (hc->mempages)
2370                                                 SRC_SET_OFF(hc);
2371                                 }
2372 #endif /* BUGGY */
2373                         }
2374                         /*
2375                          * Check for Counter overflow
2376                          */
2377                         if (dsr & SCA_DSR_COF) {
2378                                 printf("sr%d: RX DMA Counter overflow, "
2379                                        "rxpkts %lu.\n",
2380 #ifndef NETGRAPH
2381                                        sc->unit, SC2IFP(sc)->if_ipackets);
2382                                 SC2IFP(sc)->if_ierrors++;
2383 #else   /* NETGRAPH */
2384                                        sc->unit, sc->ipackets);
2385                                 sc->ierrors[1]++;
2386 #endif /* NETGRAPH */
2387                         }
2388                         /*
2389                          * Check for Buffer overflow
2390                          */
2391                         if (dsr & SCA_DSR_BOF) {
2392                                 printf("sr%d: RX DMA Buffer overflow, "
2393                                        "rxpkts %lu, rxind %d, "
2394                                        "cda %x, eda %x, dsr %x.\n",
2395 #ifndef NETGRAPH
2396                                        sc->unit, SC2IFP(sc)->if_ipackets,
2397 #else   /* NETGRAPH */
2398                                        sc->unit, sc->ipackets,
2399 #endif /* NETGRAPH */
2400                                        sc->rxhind,
2401                                        SRC_GET16(hc, dmac->cda),
2402                                        SRC_GET16(hc, dmac->eda),
2403                                        dsr);
2404
2405                                 /*
2406                                  * Make sure we eat as many as possible.
2407                                  * Then get the system running again.
2408                                  */
2409                                 if (hc->mempages)
2410                                         SRC_SET_ON(hc);
2411
2412                                 sr_eat_packet(sc, 0);
2413 #ifndef NETGRAPH
2414                                 SC2IFP(sc)->if_ierrors++;
2415 #else   /* NETGRAPH */
2416                                 sc->ierrors[2]++;
2417 #endif /* NETGRAPH */
2418
2419                                 SRC_PUT8(hc, sca->msci[mch].cmd,
2420                                     SCA_CMD_RXMSGREJ);
2421
2422                                 SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);
2423
2424 #if BUGGY > 0
2425                                 printf("sr%d: RX DMA Buffer overflow, "
2426                                        "rxpkts %lu, rxind %d, "
2427                                        "cda %x, eda %x, dsr %x. After\n",
2428                                        sc->unit,
2429 #ifndef NETGRAPH
2430                                        sc->ipackets,
2431 #else   /* NETGRAPH */
2432                                        SC2IFP(sc)->if_ipackets,
2433 #endif /* NETGRAPH */
2434                                        sc->rxhind,
2435                                        SRC_GET16(hc, dmac->cda),
2436                                        SRC_GET16(hc, dmac->eda),
2437                                        SRC_GET8(hc, dmac->dsr));
2438 #endif
2439
2440                                 if (hc->mempages)
2441                                         SRC_SET_OFF(hc);
2442                         }
2443                         /*
2444                          * End of Transfer
2445                          */
2446                         if (dsr & SCA_DSR_EOT) {
2447                                 /*
2448                                  * If this happen, it means that we are
2449                                  * receiving faster than what the processor
2450                                  * can handle.
2451                                  *
2452                                  * XXX We should enable the dma again.
2453                                  */
2454                                 printf("sr%d: RX End of xfer, rxpkts %lu.\n",
2455                                        sc->unit,
2456 #ifndef NETGRAPH
2457                                        SC2IFP(sc)->if_ipackets);
2458                                 SC2IFP(sc)->if_ierrors++;
2459 #else
2460                                        sc->ipackets);
2461                                 sc->ierrors[3]++;
2462 #endif /* NETGRAPH */
2463                         }
2464                 }
2465                 isr1 >>= 4;     /* process next half of ISR */
2466                 mch++;          /* and move to next channel */
2467         } while ((mch < NCHAN) && isr1);        /* loop for each chn */
2468
2469         /*
2470          * Now that we have done all the urgent things, see if we can fill
2471          * the transmit buffers.
2472          */
2473         for (mch = 0; mch < NCHAN; mch++) {
2474                 if (dotxstart & 0x0C) { /* TX initiation enabled? */
2475                         sc = &hc->sc[mch];
2476 #ifndef NETGRAPH
2477                         srstart(SC2IFP(sc));
2478 #else
2479                         srstart(sc);
2480 #endif /* NETGRAPH */
2481                 }
2482                 dotxstart >>= 4;/* shift for next channel */
2483         }
2484 }
2485 #ifndef NETGRAPH
2486 #ifdef USE_MODEMCK
2487 /*
2488  * Perform timeout on an FR channel
2489  *
2490  * Establish a periodic check of open N2 ports;  If
2491  * a port is open/active, its DCD state is checked
2492  * and a loss of DCD is recognized (and eventually
2493  * processed).
2494  */
2495 static void
2496 sr_modemck(void *arg)
2497 {
2498         u_int s;
2499         int card;               /* card index in table */
2500         int cards;              /* card list index */
2501         int mch;                /* channel on card */
2502         u_char dcd_v;           /* Data Carrier Detect */
2503         u_char got_st0;         /* contents of ST0 */
2504         u_char got_st1;         /* contents of ST1 */
2505         u_char got_st2;         /* contents of ST2 */
2506         u_char got_st3;         /* contents of ST3 */
2507         struct sr_hardc *hc;    /* card's configuration */
2508         struct sr_hardc *Card[16];/* up to 16 cards in system */
2509         struct sr_softc *sc;    /* channel's softc structure */
2510         struct ifnet *ifp;      /* interface control table */
2511         msci_channel *msci;     /* regs specific to channel */
2512
2513         s = splimp();
2514
2515 #if     0
2516         if (sr_opens == 0) {    /* count of "up" channels */
2517                 sr_watcher = 0; /* indicate no watcher */
2518                 splx(s);
2519                 return;
2520         }
2521 #endif
2522
2523         sr_watcher = 1;         /* mark that we're online */
2524
2525         /*
2526          * Now we'll need a list of cards to process.  Since we can handle
2527          * both ISA and PCI cards (and I didn't think of making this logic
2528          * global YET) we'll generate a single table of card table
2529          * addresses.
2530          */
2531         cards = 0;
2532
2533         for (card = 0; card < NSR; card++) {
2534                 hc = &sr_hardc[card];
2535
2536                 if (hc->sc == (void *)0)
2537                         continue;
2538
2539                 Card[cards++] = hc;
2540         }
2541
2542         hc = sr_hardc_pci;
2543
2544         while (hc) {
2545                 Card[cards++] = hc;
2546                 hc = hc->next;
2547         }
2548
2549         /*
2550          * OK, we've got work we can do.  Let's do it... (Please note that
2551          * this code _only_ deals w/ ISA cards)
2552          */
2553         for (card = 0; card < cards; card++) {
2554                 hc = Card[card];/* get card table */
2555
2556                 for (mch = 0; mch < hc->numports; mch++) {
2557                         sc = &hc->sc[mch];
2558
2559                         ifp = SC2IFP(sc);
2560
2561                         /*
2562                          * if this channel isn't "up", skip it
2563                          */
2564                         if ((ifp->if_flags & IFF_UP) == 0)
2565                                 continue;
2566
2567                         /*
2568                          * OK, now we can go looking at this channel's
2569                          * actual register contents...
2570                          */
2571                         msci = &hc->sca->msci[sc->scachan];
2572
2573                         /*
2574                          * OK, now we'll look into the actual status of this
2575                          * channel...
2576                          *
2577                          * I suck in more registers than strictly needed
2578                          */
2579                         got_st0 = SRC_GET8(hc, msci->st0);
2580                         got_st1 = SRC_GET8(hc, msci->st1);
2581                         got_st2 = SRC_GET8(hc, msci->st2);
2582                         got_st3 = SRC_GET8(hc, msci->st3);
2583
2584                         /*
2585                          * We want to see if the DCD signal is up (DCD is
2586                          * true if zero)
2587                          */
2588                         dcd_v = (got_st3 & SCA_ST3_DCD) == 0;
2589
2590                         if (dcd_v == 0)
2591                                 printf("sr%d: DCD lost\n", sc->unit);
2592                 }
2593         }
2594
2595         /*
2596          * OK, now set up for the next modem signal checking pass...
2597          */
2598         timeout(sr_modemck, NULL, hz);
2599
2600         splx(s);
2601 }
2602 #endif
2603 #else   /* NETGRAPH */
2604 /*
2605  * If a port is open/active, it's DCD state is checked
2606  * and a loss of DCD is recognized (and eventually processed?).
2607  */
2608 static void
2609 sr_modemck(struct sr_softc *sc )
2610 {
2611         u_int s;
2612         u_char got_st3;                 /* contents of ST3 */
2613         struct sr_hardc *hc = sc->hc;   /* card's configuration */
2614         msci_channel *msci;             /* regs specific to channel */
2615
2616         s = splimp();
2617
2618
2619         if (sc->running == 0)
2620                 return;
2621         /*
2622          * OK, now we can go looking at this channel's register contents...
2623          */
2624         msci = &hc->sca->msci[sc->scachan];
2625         got_st3 = SRC_GET8(hc, msci->st3);
2626
2627         /*
2628          * We want to see if the DCD signal is up (DCD is true if zero)
2629          */
2630         sc->dcd = (got_st3 & SCA_ST3_DCD) == 0;
2631         splx(s);
2632 }
2633
2634 #endif  /* NETGRAPH */
2635 static void
2636 sr_msci_intr(struct sr_hardc *hc, u_char isr0)
2637 {
2638         printf("src%d: SRINTR: MSCI\n", hc->cunit);
2639 }
2640
2641 static void
2642 sr_timer_intr(struct sr_hardc *hc, u_char isr2)
2643 {
2644         printf("src%d: SRINTR: TIMER\n", hc->cunit);
2645 }
2646
2647 #ifdef  NETGRAPH
2648 /*****************************************
2649  * Device timeout/watchdog routine.
2650  * called once per second.
2651  * checks to see that if activity was expected, that it hapenned.
2652  * At present we only look to see if expected output was completed.
2653  */
2654 static void
2655 ngsr_watchdog_frame(void * arg)
2656 {
2657         struct sr_softc * sc = arg;
2658         int s;
2659         int     speed;
2660
2661         if (sc->running == 0)
2662                 return; /* if we are not running let timeouts die */
2663         /*
2664          * calculate the apparent throughputs
2665          *  XXX a real hack
2666          */
2667         s = splimp();
2668         speed = sc->inbytes - sc->lastinbytes;
2669         sc->lastinbytes = sc->inbytes;
2670         if ( sc->inrate < speed )
2671                 sc->inrate = speed;
2672         speed = sc->outbytes - sc->lastoutbytes;
2673         sc->lastoutbytes = sc->outbytes;
2674         if ( sc->outrate < speed )
2675                 sc->outrate = speed;
2676         sc->inlast++;
2677         splx(s);
2678
2679         if ((sc->inlast > QUITE_A_WHILE)
2680         && (sc->out_deficit > LOTS_OF_PACKETS)) {
2681                 log(LOG_ERR, "sr%d: No response from remote end\n", sc->unit);
2682                 s = splimp();
2683                 sr_down(sc);
2684                 sr_up(sc);
2685                 sc->inlast = sc->out_deficit = 0;
2686                 splx(s);
2687         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
2688                 if (sc->out_dog == 0) {
2689                         log(LOG_ERR, "sr%d: Transmit failure.. no clock?\n",
2690                                         sc->unit);
2691                         s = splimp();
2692                         srwatchdog(sc);
2693 #if 0
2694                         sr_down(sc);
2695                         sr_up(sc);
2696 #endif
2697                         splx(s);
2698                         sc->inlast = sc->out_deficit = 0;
2699                 } else {
2700                         sc->out_dog--;
2701                 }
2702         }
2703         sr_modemck(sc);         /* update the DCD status */
2704         sc->handle = timeout(ngsr_watchdog_frame, sc, hz);
2705 }
2706
2707 /***********************************************************************
2708  * This section contains the methods for the Netgraph interface
2709  ***********************************************************************/
2710 /*
2711  * It is not possible or allowable to create a node of this type.
2712  * If the hardware exists, it will already have created it.
2713  */
2714 static  int
2715 ngsr_constructor(node_p node)
2716 {
2717         return (EINVAL);
2718 }
2719
2720 /*
2721  * give our ok for a hook to be added...
2722  * If we are not running this should kick the device into life.
2723  * The hook's private info points to our stash of info about that
2724  * channel.
2725  */
2726 static int
2727 ngsr_newhook(node_p node, hook_p hook, const char *name)
2728 {
2729         struct sr_softc *       sc = NG_NODE_PRIVATE(node);
2730
2731         /*
2732          * check if it's our friend the debug hook
2733          */
2734         if (strcmp(name, NG_SR_HOOK_DEBUG) == 0) {
2735                 NG_HOOK_SET_PRIVATE(hook, NULL); /* paranoid */
2736                 sc->debug_hook = hook;
2737                 return (0);
2738         }
2739
2740         /*
2741          * Check for raw mode hook.
2742          */
2743         if (strcmp(name, NG_SR_HOOK_RAW) != 0) {
2744                 return (EINVAL);
2745         }
2746         NG_HOOK_SET_PRIVATE(hook, sc);
2747         sc->hook = hook;
2748         sc->datahooks++;
2749         sr_up(sc);
2750         return (0);
2751 }
2752
2753 /*
2754  * incoming messages.
2755  * Just respond to the generic TEXT_STATUS message
2756  */
2757 static  int
2758 ngsr_rcvmsg(node_p node, item_p item, hook_p lasthook)
2759 {
2760         struct sr_softc *       sc;
2761         struct ng_mesg *resp = NULL;
2762         int error = 0;
2763         struct ng_mesg *msg;
2764
2765         NGI_GET_MSG(item,msg);
2766         sc = NG_NODE_PRIVATE(node);
2767         switch (msg->header.typecookie) {
2768         case    NG_SR_COOKIE:
2769                 error = EINVAL;
2770                 break;
2771         case    NGM_GENERIC_COOKIE:
2772                 switch(msg->header.cmd) {
2773                 case NGM_TEXT_STATUS: {
2774                         char        *arg;
2775                         int pos = 0;
2776
2777                         int resplen = sizeof(struct ng_mesg) + 512;
2778                         NG_MKRESPONSE(resp, msg, resplen, M_NOWAIT);
2779                         if (resp == NULL) {
2780                                 error = ENOMEM;
2781                                 break;
2782                         }
2783                         arg = (resp)->data;
2784                         pos = sprintf(arg, "%ld bytes in, %ld bytes out\n"
2785                             "highest rate seen: %ld B/S in, %ld B/S out\n",
2786                         sc->inbytes, sc->outbytes,
2787                         sc->inrate, sc->outrate);
2788                         pos += sprintf(arg + pos,
2789                                 "%ld output errors\n",
2790                                 sc->oerrors);
2791                         pos += sprintf(arg + pos,
2792                                 "ierrors = %ld, %ld, %ld, %ld, %ld, %ld\n",
2793                                 sc->ierrors[0],
2794                                 sc->ierrors[1],
2795                                 sc->ierrors[2],
2796                                 sc->ierrors[3],
2797                                 sc->ierrors[4],
2798                                 sc->ierrors[5]);
2799
2800                         resp->header.arglen = pos + 1;
2801                         break;
2802                       }
2803                 default:
2804                         error = EINVAL;
2805                         break;
2806                 }
2807                 break;
2808         default:
2809                 error = EINVAL;
2810                 break;
2811         }
2812         /* Take care of synchronous response, if any */
2813         NG_RESPOND_MSG(error, node, item, resp);
2814         NG_FREE_MSG(msg);
2815         return (error);
2816 }
2817
2818 /*
2819  * get data from another node and transmit it to the correct channel
2820  */
2821 static  int
2822 ngsr_rcvdata(hook_p hook, item_p item)
2823 {
2824         int s;
2825         int error = 0;
2826         struct sr_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
2827         struct ifqueue  *xmitq_p;
2828         struct mbuf *m;
2829         struct ng_tag_prio *ptag;
2830
2831         NGI_GET_M(item, m);
2832         NG_FREE_ITEM(item);
2833         /*
2834          * data doesn't come in from just anywhere (e.g control hook)
2835          */
2836         if ( NG_HOOK_PRIVATE(hook) == NULL) {
2837                 error = ENETDOWN;
2838                 goto bad;
2839         }
2840
2841         /*
2842          * Now queue the data for when it can be sent
2843          */
2844         if ((ptag = (struct ng_tag_prio *)m_tag_locate(m, NGM_GENERIC_COOKIE,
2845             NG_TAG_PRIO, NULL)) != NULL && (ptag->priority > NG_PRIO_CUTOFF) )
2846                 xmitq_p = (&sc->xmitq_hipri);
2847         else
2848                 xmitq_p = (&sc->xmitq);
2849
2850         s = splimp();
2851         IF_LOCK(xmitq_p);
2852         if (_IF_QFULL(xmitq_p)) {
2853                 _IF_DROP(xmitq_p);
2854                 IF_UNLOCK(xmitq_p);
2855                 splx(s);
2856                 error = ENOBUFS;
2857                 goto bad;
2858         }
2859         _IF_ENQUEUE(xmitq_p, m);
2860         IF_UNLOCK(xmitq_p);
2861         srstart(sc);
2862         splx(s);
2863         return (0);
2864
2865 bad:
2866         /*
2867          * It was an error case.
2868          * check if we need to free the mbuf, and then return the error
2869          */
2870         NG_FREE_M(m);
2871         return (error);
2872 }
2873
2874 /*
2875  * do local shutdown processing..
2876  * this node will refuse to go away, unless the hardware says to..
2877  * don't unref the node, or remove our name. just clear our links up.
2878  */
2879 static  int
2880 ngsr_shutdown(node_p node)
2881 {
2882         struct sr_softc * sc = NG_NODE_PRIVATE(node);
2883
2884         sr_down(sc);
2885         NG_NODE_UNREF(node);
2886 /* XXX should drain queues! */
2887         if (ng_make_node_common(&typestruct, &sc->node) != 0)
2888                 return (0);
2889         sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
2890         if (ng_name_node(sc->node, sc->nodename)) {
2891                 printf("node naming failed\n");
2892                 sc->node = NULL;
2893                 NG_NODE_UNREF(sc->node); /* drop it again */
2894                 return (0);
2895         }
2896         NG_NODE_SET_PRIVATE(sc->node, sc);
2897         callout_handle_init(&sc->handle); /* should kill timeout */
2898         sc->running = 0;
2899         return (0);
2900 }
2901
2902 /* already linked */
2903 static  int
2904 ngsr_connect(hook_p hook)
2905 {
2906         /* probably not at splnet, force outward queueing */
2907         NG_HOOK_FORCE_QUEUE(NG_HOOK_PEER(hook));
2908         /* be really amiable and just say "YUP that's OK by me! " */
2909         return (0);
2910 }
2911
2912 /*
2913  * notify on hook disconnection (destruction)
2914  *
2915  * Invalidate the private data associated with this dlci.
2916  * For this type, removal of the last link resets tries to destroy the node.
2917  * As the device still exists, the shutdown method will not actually
2918  * destroy the node, but reset the device and leave it 'fresh' :)
2919  *
2920  * The node removal code will remove all references except that owned by the
2921  * driver.
2922  */
2923 static  int
2924 ngsr_disconnect(hook_p hook)
2925 {
2926         struct sr_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
2927         int     s;
2928         /*
2929          * If it's the data hook, then free resources etc.
2930          */
2931         if (NG_HOOK_PRIVATE(hook)) {
2932                 s = splimp();
2933                 sc->datahooks--;
2934                 if (sc->datahooks == 0)
2935                         sr_down(sc);
2936                 splx(s);
2937         } else {
2938                 sc->debug_hook = NULL;
2939         }
2940         return (0);
2941 }
2942 #endif /* NETGRAPH */
2943
2944 /*
2945  ********************************* END ************************************
2946  */