1 /* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */
6 #define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT)
9 * [NetBSD for NEC PC-98 series]
10 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
11 * NetBSD/pc98 porting staff. All rights reserved.
12 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
13 * Naofumi HONDA. All rights reserved.
14 * Copyright (c) 1996, 1997, 1998, 1999
15 * Kouichi Matsuda. All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. The name of the author may not be used to endorse or promote products
26 * derived from this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
30 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
32 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
49 #include <sys/queue.h>
50 #include <sys/malloc.h>
51 #include <sys/errno.h>
54 #include <machine/cpu.h>
55 #include <machine/bus.h>
57 #include <cam/scsi/scsi_low.h>
58 #include <dev/stg/tmc18c30reg.h>
59 #include <dev/stg/tmc18c30var.h>
61 /***************************************************
63 ***************************************************/
64 /* DEVICE CONFIGURATION FLAGS (MINOR)
67 * 0x02 PARITY LINE OFF
68 * 0x04 IDENTIFY MSG OFF ( = single lun)
69 * 0x08 SYNC TRANSFER OFF
71 /* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */
73 /* For the 512 fifo type: change below */
74 #define TMC18C30_FIFOSZ 0x800
75 #define TMC18C30_FCBSZ 0x200
76 #define TMC18C50_FIFOSZ 0x2000
77 #define TMC18C50_FCBSZ 0x400
79 #define STG_MAX_DATA_SIZE (64 * 1024)
80 #define STG_DELAY_MAX (2 * 1000 * 1000)
81 #define STG_DELAY_INTERVAL (1)
82 #define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000)
84 /***************************************************
86 ***************************************************/
87 #define STG_NTARGETS 8
90 /***************************************************
92 ***************************************************/
95 #endif /* STG_DEBUG */
98 static struct stg_statics {
104 #endif /* STG_STATICS */
106 /***************************************************
108 ***************************************************/
109 #define STG_FIFO_INTERRUPTS 0x0001
110 #define STG_WAIT_FOR_SELECT 0x0100
112 int stg_io_control = STG_IO_CONTROL_FLAGS;
114 /***************************************************
116 ***************************************************/
117 extern struct cfdriver stg_cd;
119 /**************************************************************
121 **************************************************************/
123 static void stg_pio_read(struct stg_softc *, struct targ_info *, u_int);
124 static void stg_pio_write(struct stg_softc *, struct targ_info *, u_int);
125 static int stg_xfer(struct stg_softc *, u_int8_t *, int, int, int);
126 static int stg_msg(struct stg_softc *, struct targ_info *, u_int);
127 static int stg_reselected(struct stg_softc *);
128 static int stg_disconnected(struct stg_softc *, struct targ_info *);
129 static __inline void stg_pdma_end(struct stg_softc *, struct targ_info *);
130 static int stghw_select_targ_wait(struct stg_softc *, int);
131 static int stghw_check(struct stg_softc *);
132 static void stghw_init(struct stg_softc *);
133 static int stg_negate_signal(struct stg_softc *, u_int8_t, u_char *);
134 static int stg_expect_signal(struct stg_softc *, u_int8_t, u_int8_t);
135 static int stg_world_start(struct stg_softc *, int);
136 static int stghw_start_selection(struct stg_softc *sc, struct slccb *);
137 static void stghw_bus_reset(struct stg_softc *);
138 static void stghw_attention(struct stg_softc *);
139 static int stg_target_nexus_establish(struct stg_softc *);
140 static int stg_lun_nexus_establish(struct stg_softc *);
141 static int stg_ccb_nexus_establish(struct stg_softc *);
142 static int stg_targ_init(struct stg_softc *, struct targ_info *, int);
143 static __inline void stghw_bcr_write_1(struct stg_softc *, u_int8_t);
144 static int stg_timeout(struct stg_softc *);
145 static void stg_selection_done_and_expect_msgout(struct stg_softc *);
147 struct scsi_low_funcs stgfuncs = {
148 SC_LOW_INIT_T stg_world_start,
149 SC_LOW_BUSRST_T stghw_bus_reset,
150 SC_LOW_TARG_INIT_T stg_targ_init,
151 SC_LOW_LUN_INIT_T NULL,
153 SC_LOW_SELECT_T stghw_start_selection,
154 SC_LOW_NEXUS_T stg_lun_nexus_establish,
155 SC_LOW_NEXUS_T stg_ccb_nexus_establish,
157 SC_LOW_ATTEN_T stghw_attention,
158 SC_LOW_MSG_T stg_msg,
160 SC_LOW_TIMEOUT_T stg_timeout,
161 SC_LOW_POLL_T stgintr,
166 /****************************************************
168 ****************************************************/
170 stghw_bcr_write_1(struct stg_softc *sc, u_int8_t bcv)
173 bus_write_1(sc->port_res, tmc_bctl, bcv);
179 struct stg_softc *sc;
181 struct scsi_low_softc *slp = &sc->sc_sclow;
185 lsb = bus_read_1(sc->port_res, tmc_idlsb);
186 msb = bus_read_1(sc->port_res, tmc_idmsb);
187 switch (msb << 8 | lsb)
190 /* TMCCHIP_1800 not supported. (it's my policy) */
191 sc->sc_chip = TMCCHIP_1800;
195 if (bus_read_1(sc->port_res, tmc_cfg2) & 0x02)
197 sc->sc_chip = TMCCHIP_18C30;
198 sc->sc_fsz = TMC18C30_FIFOSZ;
199 fcbsize = TMC18C30_FCBSZ;
203 sc->sc_chip = TMCCHIP_18C50;
204 sc->sc_fsz = TMC18C50_FIFOSZ;
205 fcbsize = TMC18C50_FCBSZ;
210 sc->sc_chip = TMCCHIP_UNK;
214 sc->sc_fcRinit = FCTL_INTEN;
215 sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
217 if (slp->sl_cfgflags & CFG_NOATTEN)
220 sc->sc_imsg = BCTL_ATN;
221 sc->sc_busc = BCTL_BUSEN;
223 sc->sc_wthold = fcbsize + 256;
224 sc->sc_rthold = fcbsize - 256;
225 sc->sc_maxwsize = sc->sc_fsz;
227 fcb = fcbsize / (sc->sc_fsz / 16);
228 sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb;
234 struct stg_softc *sc;
237 bus_write_1(sc->port_res, tmc_ictl, 0);
238 stghw_bcr_write_1(sc, BCTL_BUSFREE);
239 bus_write_1(sc->port_res, tmc_fctl,
240 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
241 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
242 bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
244 bus_write_1(sc->port_res, tmc_ssctl, 0);
248 stg_targ_init(sc, ti, action)
249 struct stg_softc *sc;
250 struct targ_info *ti;
253 struct stg_targ_info *sti = (void *) ti;
255 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
257 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
258 ti->ti_maxsynch.period = 0;
259 ti->ti_maxsynch.offset = 0;
260 sti->sti_reg_synch = 0;
265 /****************************************************
267 ****************************************************/
270 struct stg_softc *sc;
273 sc->sc_busc |= BCTL_ATN;
274 sc->sc_busimg |= BCTL_ATN;
275 bus_write_1(sc->port_res, tmc_bctl, sc->sc_busimg);
281 struct stg_softc *sc;
284 bus_write_1(sc->port_res, tmc_ictl, 0);
285 bus_write_1(sc->port_res, tmc_fctl, 0);
286 stghw_bcr_write_1(sc, BCTL_RST);
288 stghw_bcr_write_1(sc, BCTL_BUSFREE);
292 stghw_start_selection(sc, cb)
293 struct stg_softc *sc;
296 struct targ_info *ti = cb->ti;
297 register u_int8_t stat;
299 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
300 sc->sc_dataout_timeout = 0;
301 sc->sc_ubf_timeout = 0;
302 stghw_bcr_write_1(sc, BCTL_BUSFREE);
303 bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
305 stat = bus_read_1(sc->port_res, tmc_astat);
306 if ((stat & ASTAT_INT) != 0)
308 return SCSI_LOW_START_FAIL;
311 bus_write_1(sc->port_res, tmc_scsiid, sc->sc_idbit);
312 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
314 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
315 return SCSI_LOW_START_OK;
319 stg_world_start(sc, fdone)
320 struct stg_softc *sc;
323 struct scsi_low_softc *slp = &sc->sc_sclow;
326 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
327 sc->sc_fcRinit |= FCTL_PARENB;
329 sc->sc_fcRinit &= ~FCTL_PARENB;
331 if ((error = stghw_check(sc)) != 0)
335 scsi_low_bus_reset(slp);
343 struct stg_softc *sc;
344 struct targ_info *ti;
347 struct stg_targ_info *sti = (void *) ti;
348 u_int period, offset;
350 if ((msg & SCSI_LOW_MSG_WIDE) != 0)
352 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
354 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
360 if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
363 period = ti->ti_maxsynch.period;
364 offset = ti->ti_maxsynch.offset;
365 period = period << 2;
368 sti->sti_reg_synch = (period - 200) / 50;
370 sti->sti_reg_synch ++;
371 sti->sti_reg_synch |= SSCTL_SYNCHEN;
373 else if (period >= 100)
375 sti->sti_reg_synch = (period - 100) / 50;
377 sti->sti_reg_synch ++;
378 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
380 bus_write_1(sc->port_res, tmc_ssctl, sti->sti_reg_synch);
384 /**************************************************************
385 * General probe attach
386 **************************************************************/
388 stgprobesubr(struct resource *res, u_int dvcfg)
392 lsb = bus_read_1(res, tmc_idlsb);
393 msb = bus_read_1(res, tmc_idmsb);
394 switch (msb << 8 | lsb)
409 struct stg_softc *sc;
411 struct scsi_low_softc *slp = &sc->sc_sclow;
415 sc->sc_idbit = (1 << slp->sl_hostid);
416 slp->sl_funcs = &stgfuncs;
417 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
419 slp->sl_flags |= HW_READ_PADDING;
420 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */
422 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS,
423 sizeof(struct stg_targ_info), 0);
426 /**************************************************************
428 **************************************************************/
431 struct stg_softc *sc;
432 struct targ_info *ti;
434 struct scsi_low_softc *slp = &sc->sc_sclow;
435 struct slccb *cb = slp->sl_Qnexus;
438 slp->sl_flags &= ~HW_PDMASTART;
439 sc->sc_icinit &= ~ICTL_FIFO;
440 sc->sc_dataout_timeout = 0;
444 slp->sl_error |= PDMAERR;
448 if (ti->ti_phase == PH_DATA)
450 len = bus_read_2(sc->port_res, tmc_fdcnt);
451 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
455 tres = len + slp->sl_scp.scp_datalen;
456 if (tres <= (u_int) cb->ccb_scp.scp_datalen)
458 slp->sl_scp.scp_data -= len;
459 slp->sl_scp.scp_datalen = tres;
463 slp->sl_error |= PDMAERR;
464 device_printf(slp->sl_dev,
465 "len %x >= datalen %x\n",
466 len, slp->sl_scp.scp_datalen);
470 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
474 slp->sl_error |= PDMAERR;
475 device_printf(slp->sl_dev,
476 "len %x left in fifo\n", len);
479 scsi_low_data_finish(slp);
484 device_printf(slp->sl_dev, "data phase miss\n");
485 slp->sl_error |= PDMAERR;
489 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
493 stg_pio_read(sc, ti, thold)
494 struct stg_softc *sc;
495 struct targ_info *ti;
498 struct scsi_low_softc *slp = &sc->sc_sclow;
499 struct sc_p *sp = &slp->sl_scp;
504 if ((slp->sl_flags & HW_PDMASTART) == 0)
506 bus_write_1(sc->port_res, tmc_fctl,
507 sc->sc_fcRinit | FCTL_FIFOEN);
508 slp->sl_flags |= HW_PDMASTART;
511 tout = sc->sc_tmaxcnt;
516 res = bus_read_2(sc->port_res, tmc_fdcnt);
519 bus_write_1(sc->port_res, tmc_ictl,
526 stat = bus_read_1(sc->port_res, tmc_bstat);
527 res = bus_read_2(sc->port_res, tmc_fdcnt);
530 if ((stat & PHASE_MASK) != DATA_IN_PHASE)
532 if (sp->scp_datalen <= 0)
539 /* The assumtion res != 0 is valid here */
540 if (res > sp->scp_datalen)
542 if (res == (u_int) -1)
545 slp->sl_error |= PDMAERR;
546 if ((slp->sl_flags & HW_READ_PADDING) == 0)
548 device_printf(slp->sl_dev,
549 "read padding required\n");
554 if (res > STG_MAX_DATA_SIZE)
555 res = STG_MAX_DATA_SIZE;
558 (void) bus_read_1(sc->port_res, tmc_rfifo);
563 sp->scp_datalen -= res;
566 *sp->scp_data = bus_read_1(sc->port_res, tmc_rfifo);
571 bus_read_multi_2(sc->port_res, tmc_rfifo,
572 (u_int16_t *) sp->scp_data, res >> 1);
577 device_printf(slp->sl_dev, "pio read timeout\n");
581 stg_pio_write(sc, ti, thold)
582 struct stg_softc *sc;
583 struct targ_info *ti;
586 struct scsi_low_softc *slp = &sc->sc_sclow;
587 struct sc_p *sp = &slp->sl_scp;
590 register u_int8_t stat;
592 if ((slp->sl_flags & HW_PDMASTART) == 0)
594 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
595 bus_write_1(sc->port_res, tmc_fctl, stat | FCTL_CLRFIFO);
596 bus_write_1(sc->port_res, tmc_fctl, stat);
597 slp->sl_flags |= HW_PDMASTART;
600 tout = sc->sc_tmaxcnt;
603 stat = bus_read_1(sc->port_res, tmc_bstat);
604 if ((stat & PHASE_MASK) != DATA_OUT_PHASE)
607 if (sp->scp_datalen <= 0)
609 if (sc->sc_dataout_timeout == 0)
610 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
616 res = bus_read_2(sc->port_res, tmc_fdcnt);
619 bus_write_1(sc->port_res, tmc_ictl,
626 res = bus_read_2(sc->port_res, tmc_fdcnt);
627 if (res > sc->sc_maxwsize / 2)
634 if (res == (u_int) -1)
636 res = sc->sc_maxwsize - res;
637 if (res > sp->scp_datalen)
638 res = sp->scp_datalen;
640 sp->scp_datalen -= res;
641 if ((res & 0x1) != 0)
643 bus_write_1(sc->port_res, tmc_wfifo, *sp->scp_data);
648 bus_write_multi_2(sc->port_res, tmc_wfifo,
649 (u_int16_t *) sp->scp_data, res >> 1);
654 device_printf(slp->sl_dev, "pio write timeout\n");
658 stg_negate_signal(struct stg_softc *sc, u_int8_t mask, u_char *s)
660 struct scsi_low_softc *slp = &sc->sc_sclow;
664 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
666 regv = bus_read_1(sc->port_res, tmc_bstat);
667 if (regv == (u_int8_t) -1)
669 if ((regv & mask) == 0)
672 DELAY(STG_DELAY_INTERVAL);
675 device_printf(slp->sl_dev, "%s stg_negate_signal timeout\n", s);
680 stg_expect_signal(struct stg_softc *sc, u_int8_t phase, u_int8_t mask)
682 struct scsi_low_softc *slp = &sc->sc_sclow;
687 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
689 ph = bus_read_1(sc->port_res, tmc_bstat);
690 if (ph == (u_int8_t) -1)
692 if ((ph & PHASE_MASK) != phase)
694 if ((ph & mask) != 0)
697 DELAY(STG_DELAY_INTERVAL);
700 device_printf(slp->sl_dev, "stg_expect_signal timeout\n");
705 stg_xfer(sc, buf, len, phase, clear_atn)
706 struct stg_softc *sc;
714 if (phase & BSTAT_IO)
715 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
717 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcWinit);
719 for (ptr = 0; len > 0; len --)
721 rv = stg_expect_signal(sc, phase, BSTAT_REQ);
725 if (len == 1 && clear_atn != 0)
727 sc->sc_busc &= ~BCTL_ATN;
728 stghw_bcr_write_1(sc, sc->sc_busc);
729 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
732 if (phase & BSTAT_IO)
734 buf[ptr ++] = bus_read_1(sc->port_res, tmc_rdata);
738 bus_write_1(sc->port_res, tmc_wdata, buf[ptr ++]);
741 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
745 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
749 /**************************************************************
750 * disconnect & reselect (HW low)
751 **************************************************************/
754 struct stg_softc *sc;
756 struct scsi_low_softc *slp = &sc->sc_sclow;
761 if (slp->sl_selid != NULL)
764 * Selection vs Reselection conflicts.
766 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
767 stghw_bcr_write_1(sc, BCTL_BUSFREE);
769 else if (slp->sl_Tnexus != NULL)
771 device_printf(slp->sl_dev, "unexpected termination\n");
772 stg_disconnected(sc, slp->sl_Tnexus);
776 * We should ack the reselection as soon as possible,
777 * because the target would abort the current reselection seq
778 * due to reselection timeout.
780 tout = STG_DELAY_SELECT_POLLING_MAX;
783 regv = bus_read_1(sc->port_res, tmc_bstat);
784 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
785 (BSTAT_IO | BSTAT_SEL))
788 regv = bus_read_1(sc->port_res, tmc_bstat);
789 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
790 (BSTAT_IO | BSTAT_SEL))
795 device_printf(slp->sl_dev, "reselction timeout I\n");
799 sid = (u_int) bus_read_1(sc->port_res, tmc_scsiid);
800 if ((sid & sc->sc_idbit) == 0)
806 bus_write_1(sc->port_res, tmc_fctl,
807 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
808 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
809 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
813 regv = bus_read_1(sc->port_res, tmc_bstat);
814 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY)
818 device_printf(slp->sl_dev, "reselction timeout II\n");
822 sid &= ~sc->sc_idbit;
824 if (scsi_low_reselected(slp, sid) == NULL)
828 stg_statics.reselect ++;
829 #endif /* STG_STATICS */
834 stg_disconnected(sc, ti)
835 struct stg_softc *sc;
836 struct targ_info *ti;
838 struct scsi_low_softc *slp = &sc->sc_sclow;
840 /* clear bus status & fifo */
841 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
842 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
843 stghw_bcr_write_1(sc, BCTL_BUSFREE);
844 sc->sc_icinit &= ~ICTL_FIFO;
845 sc->sc_busc &= ~BCTL_ATN;
846 sc->sc_dataout_timeout = 0;
847 sc->sc_ubf_timeout = 0;
850 stg_statics.disconnect ++;
851 #endif /* STG_STATICS */
852 scsi_low_disconnected(slp, ti);
856 /**************************************************************
858 **************************************************************/
860 stg_target_nexus_establish(sc)
861 struct stg_softc *sc;
863 struct scsi_low_softc *slp = &sc->sc_sclow;
864 struct targ_info *ti = slp->sl_Tnexus;
865 struct stg_targ_info *sti = (void *) ti;
867 bus_write_1(sc->port_res, tmc_ssctl, sti->sti_reg_synch);
868 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0)
870 sc->sc_icinit |= ICTL_FIFO;
876 stg_lun_nexus_establish(sc)
877 struct stg_softc *sc;
884 stg_ccb_nexus_establish(sc)
885 struct stg_softc *sc;
887 struct scsi_low_softc *slp = &sc->sc_sclow;
888 struct slccb *cb = slp->sl_Qnexus;
890 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
894 #define STGHW_SELECT_INTERVAL 10
897 stghw_select_targ_wait(sc, mu)
898 struct stg_softc *sc;
902 mu = mu / STGHW_SELECT_INTERVAL;
905 if ((bus_read_1(sc->port_res, tmc_bstat) & BSTAT_BSY) == 0)
907 DELAY(STGHW_SELECT_INTERVAL);
911 if ((bus_read_1(sc->port_res, tmc_bstat) & BSTAT_BSY) != 0)
920 stg_selection_done_and_expect_msgout(sc)
921 struct stg_softc *sc;
923 struct scsi_low_softc *slp = &sc->sc_sclow;
925 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
926 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
927 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
928 SCSI_LOW_ASSERT_ATN(slp);
935 struct stg_softc *sc = arg;
936 struct scsi_low_softc *slp = &sc->sc_sclow;
937 struct targ_info *ti;
941 u_int8_t status, astatus, regv;
943 /*******************************************
945 *******************************************/
946 if (slp->sl_flags & HW_INACTIVE)
949 astatus = bus_read_1(sc->port_res, tmc_astat);
950 status = bus_read_1(sc->port_res, tmc_bstat);
952 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1)
955 bus_write_1(sc->port_res, tmc_ictl, 0);
956 if (astatus & ASTAT_SCSIRST)
958 bus_write_1(sc->port_res, tmc_fctl,
959 sc->sc_fcRinit | FCTL_CLRFIFO);
960 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
961 bus_write_1(sc->port_res, tmc_ictl, 0);
963 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
964 "bus reset (power off?)");
968 /*******************************************
970 *******************************************/
974 scsi_low_print(slp, NULL);
975 device_printf(slp->sl_dev, "st %x ist %x\n\n",
979 kdb_enter(KDB_WHY_CAM, "stg");
982 #endif /* STG_DEBUG */
984 /*******************************************
985 * reselection & nexus
986 *******************************************/
987 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
989 if (stg_reselected(sc) == EJUSTRETURN)
993 if ((ti = slp->sl_Tnexus) == NULL)
997 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
998 (sc->sc_fcRinit & FCTL_PARENB) != 0)
1000 slp->sl_error |= PARITYERR;
1001 derror = SCSI_LOW_DATA_PE;
1002 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE)
1003 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0);
1005 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
1008 /*******************************************
1009 * aribitration & selection
1010 *******************************************/
1011 switch (ti->ti_phase)
1014 if ((astatus & ASTAT_ARBIT) == 0)
1017 stg_statics.arbit_fail_0 ++;
1018 #endif /* STG_STATICS */
1022 status = bus_read_1(sc->port_res, tmc_bstat);
1023 if ((status & BSTAT_IO) != 0)
1026 * Selection vs Reselection conflicts.
1029 stg_statics.arbit_fail_1 ++;
1030 #endif /* STG_STATICS */
1032 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
1033 stghw_bcr_write_1(sc, BCTL_BUSFREE);
1034 scsi_low_arbit_fail(slp, slp->sl_Qnexus);
1039 * selection assert start.
1041 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
1042 scsi_low_arbit_win(slp);
1044 bus_write_1(sc->port_res, tmc_scsiid,
1045 sc->sc_idbit | (1 << ti->ti_id));
1046 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
1047 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcWinit);
1048 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0)
1050 /* selection abort delay 200 + 100 micro sec */
1051 if (stghw_select_targ_wait(sc, 300) == 0)
1053 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1054 stg_selection_done_and_expect_msgout(sc);
1060 if ((status & BSTAT_BSY) == 0)
1062 /* selection timeout delay 250 ms */
1063 if (stghw_select_targ_wait(sc, 250 * 1000) != 0)
1065 stg_disconnected(sc, ti);
1070 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1071 stg_selection_done_and_expect_msgout(sc);
1075 if ((status & BSTAT_REQ) == 0)
1077 stg_target_nexus_establish(sc);
1081 if ((status & BSTAT_REQ) == 0)
1084 /* clear a busy line */
1085 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
1086 stghw_bcr_write_1(sc, sc->sc_busc);
1087 stg_target_nexus_establish(sc);
1088 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
1090 device_printf(slp->sl_dev,
1091 "unexpected phase after reselect\n");
1092 slp->sl_error |= FATALIO;
1093 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1099 /*******************************************
1101 *******************************************/
1102 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0)
1104 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1105 stg_pio_read(sc, ti, 0);
1107 stg_pdma_end(sc, ti);
1110 /*******************************************
1112 *******************************************/
1113 switch (status & PHASE_MASK)
1116 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0)
1119 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1120 if (scsi_low_cmd(slp, ti) != 0)
1122 scsi_low_attention(slp);
1125 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen,
1126 COMMAND_PHASE, 0) != 0)
1128 device_printf(slp->sl_dev, "CMDOUT short\n");
1132 case DATA_OUT_PHASE:
1133 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1134 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1136 scsi_low_attention(slp);
1139 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1140 stg_pio_write(sc, ti, sc->sc_wthold);
1142 stg_pio_write(sc, ti, 0);
1146 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1147 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1149 scsi_low_attention(slp);
1152 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1153 stg_pio_read(sc, ti, sc->sc_rthold);
1155 stg_pio_read(sc, ti, 0);
1159 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ);
1163 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1164 regv = bus_read_1(sc->port_res, tmc_sdna);
1165 if (scsi_low_statusin(slp, ti, regv | derror) != 0)
1167 scsi_low_attention(slp);
1169 if (regv != bus_read_1(sc->port_res, tmc_rdata))
1171 device_printf(slp->sl_dev, "STATIN: data mismatch\n");
1173 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>");
1176 case MESSAGE_OUT_PHASE:
1177 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0)
1180 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1181 flags = (ti->ti_ophase != ti->ti_phase) ?
1182 SCSI_LOW_MSGOUT_INIT : 0;
1183 len = scsi_low_msgout(slp, ti, flags);
1185 if (len > 1 && slp->sl_atten == 0)
1187 scsi_low_attention(slp);
1190 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE,
1191 slp->sl_clear_atten) != 0)
1193 device_printf(slp->sl_dev, "MSGOUT short\n");
1197 if (slp->sl_msgphase >= MSGPH_ABORT)
1199 stg_disconnected(sc, ti);
1204 case MESSAGE_IN_PHASE:
1205 /* confirm phase and req signal */
1206 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0)
1209 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1211 /* read data with NOACK */
1212 regv = bus_read_1(sc->port_res, tmc_sdna);
1214 if (scsi_low_msgin(slp, ti, derror | regv) == 0)
1216 if (scsi_low_is_msgout_continue(ti, 0) != 0)
1218 scsi_low_attention(slp);
1222 /* read data with ACK */
1223 if (regv != bus_read_1(sc->port_res, tmc_rdata))
1225 device_printf(slp->sl_dev, "MSGIN: data mismatch\n");
1228 /* wait for the ack negated */
1229 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>");
1231 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT)
1233 stg_disconnected(sc, ti);
1238 device_printf(slp->sl_dev, "unexpected disconnect\n");
1239 stg_disconnected(sc, ti);
1243 slp->sl_error |= FATALIO;
1244 device_printf(slp->sl_dev, "unknown phase bus %x intr %x\n",
1250 bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
1256 struct stg_softc *sc;
1258 struct scsi_low_softc *slp = &sc->sc_sclow;
1262 if (slp->sl_Tnexus == NULL)
1265 status = bus_read_1(sc->port_res, tmc_bstat);
1266 if ((status & PHASE_MASK) == 0)
1268 if (sc->sc_ubf_timeout ++ == 0)
1271 device_printf(slp->sl_dev, "unexpected bus free detected\n");
1272 slp->sl_error |= FATALIO;
1273 scsi_low_print(slp, slp->sl_Tnexus);
1274 stg_disconnected(sc, slp->sl_Tnexus);
1278 switch (status & PHASE_MASK)
1280 case DATA_OUT_PHASE:
1281 if (sc->sc_dataout_timeout == 0)
1283 if ((status & BSTAT_REQ) == 0)
1285 if (bus_read_2(sc->port_res, tmc_fdcnt) != 0)
1287 if ((-- sc->sc_dataout_timeout) > 0)
1290 slp->sl_error |= PDMAERR;
1291 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1293 device_printf(slp->sl_dev, "write padding required\n");
1297 bus_write_1(sc->port_res, tmc_ictl, 0);
1299 tout = STG_DELAY_MAX;
1302 status = bus_read_1(sc->port_res, tmc_bstat);
1303 if ((status & PHASE_MASK) != DATA_OUT_PHASE)
1306 if (bus_read_2(sc->port_res, tmc_fdcnt) != 0)
1312 for (count = sc->sc_maxwsize; count > 0; count --)
1313 bus_write_1(sc->port_res, tmc_wfifo, 0);
1316 status = bus_read_1(sc->port_res, tmc_bstat);
1317 if ((status & PHASE_MASK) == DATA_OUT_PHASE)
1318 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1320 bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);