sys/dev/stg/tmc18c30.c

   1 /*      $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */
   2 /*      $NetBSD$        */
   3
   4 #define STG_DEBUG
   5 #define STG_STATICS
   6 #define STG_IO_CONTROL_FLAGS    (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT)
   7
   8 /*-
   9  * [NetBSD for NEC PC-98 series]
  10  *  Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
  11  *      NetBSD/pc98 porting staff. All rights reserved.
  12  *  Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
  13  *      Naofumi HONDA. All rights reserved.
  14  *  Copyright (c) 1996, 1997, 1998, 1999
  15  *      Kouichi Matsuda. All rights reserved.
  16  *
  17  *  Redistribution and use in source and binary forms, with or without
  18  *  modification, are permitted provided that the following conditions
  19  *  are met:
  20  *  1. Redistributions of source code must retain the above copyright
  21  *     notice, this list of conditions and the following disclaimer.
  22  *  2. Redistributions in binary form must reproduce the above copyright
  23  *     notice, this list of conditions and the following disclaimer in the
  24  *     documentation and/or other materials provided with the distribution.
  25  *  3. The name of the author may not be used to endorse or promote products
  26  *     derived from this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  29  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  30  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  32  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  33  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  34  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 #include <sys/cdefs.h>
  42 __FBSDID("$FreeBSD$");
  43
  44 #include <sys/param.h>
  45 #include <sys/systm.h>
  46 #include <sys/kernel.h>
  47 #include <sys/bio.h>
  48 #include <sys/buf.h>
  49 #include <sys/queue.h>
  50 #include <sys/malloc.h>
  51 #include <sys/errno.h>
  52 #include <sys/rman.h>
  53
  54 #include <machine/cpu.h>
  55 #include <machine/bus.h>
  56
  57 #include <cam/scsi/scsi_low.h>
  58 #include <dev/stg/tmc18c30reg.h>
  59 #include <dev/stg/tmc18c30var.h>
  60
  61 /***************************************************
  62  * USER SETTINGS
  63  ***************************************************/
  64 /* DEVICE CONFIGURATION FLAGS (MINOR)
  65  *
  66  * 0x01   DISCONNECT OFF
  67  * 0x02   PARITY LINE OFF
  68  * 0x04   IDENTIFY MSG OFF ( = single lun)
  69  * 0x08   SYNC TRANSFER OFF
  70  */
  71 /* #define      STG_SYNC_SUPPORT */     /* NOT YET but easy */
  72
  73 /* For the 512 fifo type: change below */
  74 #define TMC18C30_FIFOSZ 0x800
  75 #define TMC18C30_FCBSZ  0x200
  76 #define TMC18C50_FIFOSZ 0x2000
  77 #define TMC18C50_FCBSZ  0x400
  78
  79 #define STG_MAX_DATA_SIZE       (64 * 1024)
  80 #define STG_DELAY_MAX                   (2 * 1000 * 1000)
  81 #define STG_DELAY_INTERVAL              (1)
  82 #define STG_DELAY_SELECT_POLLING_MAX    (5 * 1000 * 1000)
  83
  84 /***************************************************
  85  * PARAMS
  86  ***************************************************/
  87 #define STG_NTARGETS    8
  88 #define STG_NLUNS       8
  89
  90 /***************************************************
  91  * DEBUG
  92  ***************************************************/
  93 #ifdef  STG_DEBUG
  94 static int stg_debug;
  95 #endif  /* STG_DEBUG */
  96
  97 #ifdef  STG_STATICS
  98 static struct stg_statics {
  99         int arbit_fail_0;
 100         int arbit_fail_1;
 101         int disconnect;
 102         int reselect;
 103 } stg_statics;
 104 #endif  /* STG_STATICS */
 105
 106 /***************************************************
 107  * IO control flags
 108  ***************************************************/
 109 #define STG_FIFO_INTERRUPTS     0x0001
 110 #define STG_WAIT_FOR_SELECT     0x0100
 111
 112 int stg_io_control = STG_IO_CONTROL_FLAGS;
 113
 114 /***************************************************
 115  * DEVICE STRUCTURE
 116  ***************************************************/
 117 extern struct cfdriver stg_cd;
 118
 119 /**************************************************************
 120  * DECLARE
 121  **************************************************************/
 122 /* static */
 123 static void stg_pio_read(struct stg_softc *, struct targ_info *, u_int);
 124 static void stg_pio_write(struct stg_softc *, struct targ_info *, u_int);
 125 static int stg_xfer(struct stg_softc *, u_int8_t *, int, int, int);
 126 static int stg_msg(struct stg_softc *, struct targ_info *, u_int);
 127 static int stg_reselected(struct stg_softc *);
 128 static int stg_disconnected(struct stg_softc *, struct targ_info *);
 129 static __inline void stg_pdma_end(struct stg_softc *, struct targ_info *);
 130 static int stghw_select_targ_wait(struct stg_softc *, int);
 131 static int stghw_check(struct stg_softc *);
 132 static void stghw_init(struct stg_softc *);
 133 static int stg_negate_signal(struct stg_softc *, u_int8_t, u_char *);
 134 static int stg_expect_signal(struct stg_softc *, u_int8_t, u_int8_t);
 135 static int stg_world_start(struct stg_softc *, int);
 136 static int stghw_start_selection(struct stg_softc *sc, struct slccb *);
 137 static void stghw_bus_reset(struct stg_softc *);
 138 static void stghw_attention(struct stg_softc *);
 139 static int stg_target_nexus_establish(struct stg_softc *);
 140 static int stg_lun_nexus_establish(struct stg_softc *);
 141 static int stg_ccb_nexus_establish(struct stg_softc *);
 142 static int stg_targ_init(struct stg_softc *, struct targ_info *, int);
 143 static __inline void stghw_bcr_write_1(struct stg_softc *, u_int8_t);
 144 static int stg_timeout(struct stg_softc *);
 145 static void stg_selection_done_and_expect_msgout(struct stg_softc *);
 146
 147 struct scsi_low_funcs stgfuncs = {
 148         SC_LOW_INIT_T stg_world_start,
 149         SC_LOW_BUSRST_T stghw_bus_reset,
 150         SC_LOW_TARG_INIT_T stg_targ_init,
 151         SC_LOW_LUN_INIT_T NULL,
 152
 153         SC_LOW_SELECT_T stghw_start_selection,
 154         SC_LOW_NEXUS_T stg_lun_nexus_establish,
 155         SC_LOW_NEXUS_T stg_ccb_nexus_establish,
 156
 157         SC_LOW_ATTEN_T stghw_attention,
 158         SC_LOW_MSG_T stg_msg,
 159
 160         SC_LOW_TIMEOUT_T stg_timeout,
 161         SC_LOW_POLL_T stgintr,
 162
 163         NULL,
 164 };
 165
 166 /****************************************************
 167  * hwfuncs
 168  ****************************************************/
 169 static __inline void
 170 stghw_bcr_write_1(struct stg_softc *sc, u_int8_t bcv)
 171 {
 172
 173         bus_write_1(sc->port_res, tmc_bctl, bcv);
 174         sc->sc_busimg = bcv;
 175 }
 176
 177 static int
 178 stghw_check(sc)
 179         struct stg_softc *sc;
 180 {
 181         struct scsi_low_softc *slp = &sc->sc_sclow;
 182         u_int fcbsize, fcb;
 183         u_int16_t lsb, msb;
 184
 185         lsb = bus_read_1(sc->port_res, tmc_idlsb);
 186         msb = bus_read_1(sc->port_res, tmc_idmsb);
 187         switch (msb << 8 | lsb)
 188         {
 189                 case 0x6127:
 190                         /* TMCCHIP_1800 not supported. (it's my policy) */
 191                         sc->sc_chip = TMCCHIP_1800;
 192                         return EINVAL;
 193
 194                 case 0x60e9:
 195                         if (bus_read_1(sc->port_res, tmc_cfg2) & 0x02)
 196                         {
 197                                 sc->sc_chip = TMCCHIP_18C30;
 198                                 sc->sc_fsz = TMC18C30_FIFOSZ;
 199                                 fcbsize = TMC18C30_FCBSZ;
 200                         }
 201                         else
 202                         {
 203                                 sc->sc_chip = TMCCHIP_18C50;
 204                                 sc->sc_fsz = TMC18C50_FIFOSZ;
 205                                 fcbsize = TMC18C50_FCBSZ;
 206                         }
 207                         break;
 208
 209                 default:
 210                         sc->sc_chip = TMCCHIP_UNK;
 211                         return ENODEV;
 212         }
 213
 214         sc->sc_fcRinit = FCTL_INTEN;
 215         sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
 216
 217         if (slp->sl_cfgflags & CFG_NOATTEN)
 218                 sc->sc_imsg = 0;
 219         else
 220                 sc->sc_imsg = BCTL_ATN;
 221         sc->sc_busc = BCTL_BUSEN;
 222
 223         sc->sc_wthold = fcbsize + 256;
 224         sc->sc_rthold = fcbsize - 256;
 225         sc->sc_maxwsize = sc->sc_fsz;
 226
 227         fcb = fcbsize / (sc->sc_fsz / 16);
 228         sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb;
 229         return 0;
 230 }
 231
 232 static void
 233 stghw_init(sc)
 234         struct stg_softc *sc;
 235 {
 236
 237         bus_write_1(sc->port_res, tmc_ictl, 0);
 238         stghw_bcr_write_1(sc, BCTL_BUSFREE);
 239         bus_write_1(sc->port_res, tmc_fctl,
 240                           sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
 241         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 242         bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
 243
 244         bus_write_1(sc->port_res, tmc_ssctl, 0);
 245 }
 246
 247 static int
 248 stg_targ_init(sc, ti, action)
 249         struct stg_softc *sc;
 250         struct targ_info *ti;
 251         int action;
 252 {
 253         struct stg_targ_info *sti = (void *) ti;
 254
 255         if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
 256         {
 257                 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
 258                 ti->ti_maxsynch.period = 0;
 259                 ti->ti_maxsynch.offset = 0;
 260                 sti->sti_reg_synch = 0;
 261         }
 262         return 0;
 263 }
 264
 265 /****************************************************
 266  * scsi low interface
 267  ****************************************************/
 268 static void
 269 stghw_attention(sc)
 270         struct stg_softc *sc;
 271 {
 272
 273         sc->sc_busc |= BCTL_ATN;
 274         sc->sc_busimg |= BCTL_ATN;
 275         bus_write_1(sc->port_res, tmc_bctl, sc->sc_busimg);
 276         DELAY(10);
 277 }
 278
 279 static void
 280 stghw_bus_reset(sc)
 281         struct stg_softc *sc;
 282 {
 283
 284         bus_write_1(sc->port_res, tmc_ictl, 0);
 285         bus_write_1(sc->port_res, tmc_fctl, 0);
 286         stghw_bcr_write_1(sc, BCTL_RST);
 287         DELAY(100000);
 288         stghw_bcr_write_1(sc, BCTL_BUSFREE);
 289 }
 290
 291 static int
 292 stghw_start_selection(sc, cb)
 293         struct stg_softc *sc;
 294         struct slccb *cb;
 295 {
 296         struct targ_info *ti = cb->ti;
 297         register u_int8_t stat;
 298
 299         sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
 300         sc->sc_dataout_timeout = 0;
 301         sc->sc_ubf_timeout = 0;
 302         stghw_bcr_write_1(sc, BCTL_BUSFREE);
 303         bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
 304
 305         stat = bus_read_1(sc->port_res, tmc_astat);
 306         if ((stat & ASTAT_INT) != 0)
 307         {
 308                 return SCSI_LOW_START_FAIL;
 309         }
 310
 311         bus_write_1(sc->port_res, tmc_scsiid, sc->sc_idbit);
 312         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
 313
 314         SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
 315         return SCSI_LOW_START_OK;
 316 }
 317
 318 static int
 319 stg_world_start(sc, fdone)
 320         struct stg_softc *sc;
 321         int fdone;
 322 {
 323         struct scsi_low_softc *slp = &sc->sc_sclow;
 324         int error;
 325
 326         if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
 327                 sc->sc_fcRinit |= FCTL_PARENB;
 328         else
 329                 sc->sc_fcRinit &= ~FCTL_PARENB;
 330
 331         if ((error = stghw_check(sc)) != 0)
 332                 return error;
 333
 334         stghw_init(sc);
 335         scsi_low_bus_reset(slp);
 336         stghw_init(sc);
 337
 338         return 0;
 339 }
 340
 341 static int
 342 stg_msg(sc, ti, msg)
 343         struct stg_softc *sc;
 344         struct targ_info *ti;
 345         u_int msg;
 346 {
 347         struct stg_targ_info *sti = (void *) ti;
 348         u_int period, offset;
 349
 350         if ((msg & SCSI_LOW_MSG_WIDE) != 0)
 351         {
 352                 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
 353                 {
 354                         ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
 355                         return EINVAL;
 356                 }
 357                 return 0;
 358         }
 359
 360         if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
 361                 return 0;
 362
 363         period = ti->ti_maxsynch.period;
 364         offset = ti->ti_maxsynch.offset;
 365         period = period << 2;
 366         if (period >= 200)
 367         {
 368                 sti->sti_reg_synch = (period - 200) / 50;
 369                 if (period % 50)
 370                         sti->sti_reg_synch ++;
 371                 sti->sti_reg_synch |= SSCTL_SYNCHEN;
 372         }
 373         else if (period >= 100)
 374         {
 375                 sti->sti_reg_synch = (period - 100) / 50;
 376                 if (period % 50)
 377                         sti->sti_reg_synch ++;
 378                 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
 379         }
 380         bus_write_1(sc->port_res, tmc_ssctl, sti->sti_reg_synch);
 381         return 0;
 382 }
 383
 384 /**************************************************************
 385  * General probe attach
 386  **************************************************************/
 387 int
 388 stgprobesubr(struct resource *res, u_int dvcfg)
 389 {
 390         u_int16_t lsb, msb;
 391
 392         lsb = bus_read_1(res, tmc_idlsb);
 393         msb = bus_read_1(res, tmc_idmsb);
 394         switch (msb << 8 | lsb)
 395         {
 396                 default:
 397                         return 0;
 398                 case 0x6127:
 399                         /* not support! */
 400                         return 0;
 401                 case 0x60e9:
 402                         return 1;
 403         }
 404         return 0;
 405 }
 406
 407 void
 408 stgattachsubr(sc)
 409         struct stg_softc *sc;
 410 {
 411         struct scsi_low_softc *slp = &sc->sc_sclow;
 412
 413         printf("\n");
 414
 415         sc->sc_idbit = (1 << slp->sl_hostid);
 416         slp->sl_funcs = &stgfuncs;
 417         sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
 418
 419         slp->sl_flags |= HW_READ_PADDING;
 420         slp->sl_cfgflags |= CFG_ASYNC;  /* XXX */
 421
 422         (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS,
 423                                 sizeof(struct stg_targ_info), 0);
 424 }
 425
 426 /**************************************************************
 427  * PDMA functions
 428  **************************************************************/
 429 static __inline void
 430 stg_pdma_end(sc, ti)
 431         struct stg_softc *sc;
 432         struct targ_info *ti;
 433 {
 434         struct scsi_low_softc *slp = &sc->sc_sclow;
 435         struct slccb *cb = slp->sl_Qnexus;
 436         u_int len, tres;
 437
 438         slp->sl_flags &= ~HW_PDMASTART;
 439         sc->sc_icinit &= ~ICTL_FIFO;
 440         sc->sc_dataout_timeout = 0;
 441
 442         if (cb == NULL)
 443         {
 444                 slp->sl_error |= PDMAERR;
 445                 goto out;
 446         }
 447
 448         if (ti->ti_phase == PH_DATA)
 449         {
 450                 len = bus_read_2(sc->port_res, tmc_fdcnt);
 451                 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
 452                 {
 453                         if (len != 0)
 454                         {
 455                                 tres = len + slp->sl_scp.scp_datalen;
 456                                 if (tres <= (u_int) cb->ccb_scp.scp_datalen)
 457                                 {
 458                                         slp->sl_scp.scp_data -= len;
 459                                         slp->sl_scp.scp_datalen = tres;
 460                                 }
 461                                 else
 462                                 {
 463                                         slp->sl_error |= PDMAERR;
 464                                         device_printf(slp->sl_dev,
 465                                                 "len %x >= datalen %x\n",
 466                                                 len, slp->sl_scp.scp_datalen);
 467                                 }
 468                         }
 469                 }
 470                 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
 471                 {
 472                         if (len != 0)
 473                         {
 474                                 slp->sl_error |= PDMAERR;
 475                                 device_printf(slp->sl_dev,
 476                                     "len %x left in fifo\n", len);
 477                         }
 478                 }
 479                 scsi_low_data_finish(slp);
 480         }
 481         else
 482         {
 483
 484                 device_printf(slp->sl_dev, "data phase miss\n");
 485                 slp->sl_error |= PDMAERR;
 486         }
 487
 488 out:
 489         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 490 }
 491
 492 static void
 493 stg_pio_read(sc, ti, thold)
 494         struct stg_softc *sc;
 495         struct targ_info *ti;
 496         u_int thold;
 497 {
 498         struct scsi_low_softc *slp = &sc->sc_sclow;
 499         struct sc_p *sp = &slp->sl_scp;
 500         int tout;
 501         u_int res;
 502         u_int8_t stat;
 503
 504         if ((slp->sl_flags & HW_PDMASTART) == 0)
 505         {
 506                 bus_write_1(sc->port_res, tmc_fctl,
 507                                   sc->sc_fcRinit | FCTL_FIFOEN);
 508                 slp->sl_flags |= HW_PDMASTART;
 509         }
 510
 511         tout = sc->sc_tmaxcnt;
 512         while (tout -- > 0)
 513         {
 514                 if (thold > 0)
 515                 {
 516                         res = bus_read_2(sc->port_res, tmc_fdcnt);
 517                         if (res < thold)
 518                         {
 519                                 bus_write_1(sc->port_res, tmc_ictl,
 520                                                   sc->sc_icinit);
 521                                 break;
 522                         }
 523                 }
 524                 else
 525                 {
 526                         stat = bus_read_1(sc->port_res, tmc_bstat);
 527                         res = bus_read_2(sc->port_res, tmc_fdcnt);
 528                         if (res == 0)
 529                         {
 530                                 if ((stat & PHASE_MASK) != DATA_IN_PHASE)
 531                                         break;
 532                                 if (sp->scp_datalen <= 0)
 533                                         break;
 534                                 DELAY(1);
 535                                 continue;
 536                         }
 537                 }
 538
 539                 /* The assumtion res != 0 is valid here */
 540                 if (res > sp->scp_datalen)
 541                 {
 542                         if (res == (u_int) -1)
 543                                 break;
 544
 545                         slp->sl_error |= PDMAERR;
 546                         if ((slp->sl_flags & HW_READ_PADDING) == 0)
 547                         {
 548                                 device_printf(slp->sl_dev,
 549                                     "read padding required\n");
 550                                 break;
 551                         }
 552
 553                         sp->scp_datalen = 0;
 554                         if (res > STG_MAX_DATA_SIZE)
 555                                 res = STG_MAX_DATA_SIZE;
 556                         while (res -- > 0)
 557                         {
 558                                 (void) bus_read_1(sc->port_res, tmc_rfifo);
 559                         }
 560                         continue;
 561                 }
 562
 563                 sp->scp_datalen -= res;
 564                 if (res & 1)
 565                 {
 566                         *sp->scp_data = bus_read_1(sc->port_res, tmc_rfifo);
 567                         sp->scp_data ++;
 568                         res --;
 569                 }
 570
 571                 bus_read_multi_2(sc->port_res, tmc_rfifo,
 572                                        (u_int16_t *) sp->scp_data, res >> 1);
 573                 sp->scp_data += res;
 574         }
 575
 576         if (tout <= 0)
 577                 device_printf(slp->sl_dev, "pio read timeout\n");
 578 }
 579
 580 static void
 581 stg_pio_write(sc, ti, thold)
 582         struct stg_softc *sc;
 583         struct targ_info *ti;
 584         u_int thold;
 585 {
 586         struct scsi_low_softc *slp = &sc->sc_sclow;
 587         struct sc_p *sp = &slp->sl_scp;
 588         u_int res;
 589         int tout;
 590         register u_int8_t stat;
 591
 592         if ((slp->sl_flags & HW_PDMASTART) == 0)
 593         {
 594                 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
 595                 bus_write_1(sc->port_res, tmc_fctl, stat | FCTL_CLRFIFO);
 596                 bus_write_1(sc->port_res, tmc_fctl, stat);
 597                 slp->sl_flags |= HW_PDMASTART;
 598         }
 599
 600         tout = sc->sc_tmaxcnt;
 601         while (tout -- > 0)
 602         {
 603                 stat = bus_read_1(sc->port_res, tmc_bstat);
 604                 if ((stat & PHASE_MASK) != DATA_OUT_PHASE)
 605                         break;
 606
 607                 if (sp->scp_datalen <= 0)
 608                 {
 609                         if (sc->sc_dataout_timeout == 0)
 610                                 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
 611                         break;
 612                 }
 613
 614                 if (thold > 0)
 615                 {
 616                         res = bus_read_2(sc->port_res, tmc_fdcnt);
 617                         if (res > thold)
 618                         {
 619                                 bus_write_1(sc->port_res, tmc_ictl,
 620                                                   sc->sc_icinit);
 621                                 break;
 622                         }
 623                 }
 624                 else
 625                 {
 626                         res = bus_read_2(sc->port_res, tmc_fdcnt);
 627                         if (res > sc->sc_maxwsize / 2)
 628                         {
 629                                 DELAY(1);
 630                                 continue;
 631                         }
 632                 }
 633
 634                 if (res == (u_int) -1)
 635                         break;
 636                 res = sc->sc_maxwsize - res;
 637                 if (res > sp->scp_datalen)
 638                         res = sp->scp_datalen;
 639
 640                 sp->scp_datalen -= res;
 641                 if ((res & 0x1) != 0)
 642                 {
 643                         bus_write_1(sc->port_res, tmc_wfifo, *sp->scp_data);
 644                         sp->scp_data ++;
 645                         res --;
 646                 }
 647
 648                 bus_write_multi_2(sc->port_res, tmc_wfifo,
 649                                         (u_int16_t *) sp->scp_data, res >> 1);
 650                 sp->scp_data += res;
 651         }
 652
 653         if (tout <= 0)
 654                 device_printf(slp->sl_dev, "pio write timeout\n");
 655 }
 656
 657 static int
 658 stg_negate_signal(struct stg_softc *sc, u_int8_t mask, u_char *s)
 659 {
 660         struct scsi_low_softc *slp = &sc->sc_sclow;
 661         int wc;
 662         u_int8_t regv;
 663
 664         for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
 665         {
 666                 regv = bus_read_1(sc->port_res, tmc_bstat);
 667                 if (regv == (u_int8_t) -1)
 668                         return -1;
 669                 if ((regv & mask) == 0)
 670                         return 1;
 671
 672                 DELAY(STG_DELAY_INTERVAL);
 673         }
 674
 675         device_printf(slp->sl_dev, "%s stg_negate_signal timeout\n", s);
 676         return -1;
 677 }
 678
 679 static int
 680 stg_expect_signal(struct stg_softc *sc, u_int8_t phase, u_int8_t mask)
 681 {
 682         struct scsi_low_softc *slp = &sc->sc_sclow;
 683         int wc;
 684         u_int8_t ph;
 685
 686         phase &= PHASE_MASK;
 687         for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
 688         {
 689                 ph = bus_read_1(sc->port_res, tmc_bstat);
 690                 if (ph == (u_int8_t) -1)
 691                         return -1;
 692                 if ((ph & PHASE_MASK) != phase)
 693                         return 0;
 694                 if ((ph & mask) != 0)
 695                         return 1;
 696
 697                 DELAY(STG_DELAY_INTERVAL);
 698         }
 699
 700         device_printf(slp->sl_dev, "stg_expect_signal timeout\n");
 701         return -1;
 702 }
 703
 704 static int
 705 stg_xfer(sc, buf, len, phase, clear_atn)
 706         struct stg_softc *sc;
 707         u_int8_t *buf;
 708         int len;
 709         int phase;
 710         int clear_atn;
 711 {
 712         int rv, ptr;
 713
 714         if (phase & BSTAT_IO)
 715                 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 716         else
 717                 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcWinit);
 718
 719         for (ptr = 0; len > 0; len --)
 720         {
 721                 rv = stg_expect_signal(sc, phase, BSTAT_REQ);
 722                 if (rv <= 0)
 723                         goto bad;
 724
 725                 if (len == 1 && clear_atn != 0)
 726                 {
 727                         sc->sc_busc &= ~BCTL_ATN;
 728                         stghw_bcr_write_1(sc, sc->sc_busc);
 729                         SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
 730                 }
 731
 732                 if (phase & BSTAT_IO)
 733                 {
 734                         buf[ptr ++] = bus_read_1(sc->port_res, tmc_rdata);
 735                 }
 736                 else
 737                 {
 738                         bus_write_1(sc->port_res, tmc_wdata, buf[ptr ++]);
 739                 }
 740
 741                 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
 742         }
 743
 744 bad:
 745         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 746         return len;
 747 }
 748
 749 /**************************************************************
 750  * disconnect & reselect (HW low)
 751  **************************************************************/
 752 static int
 753 stg_reselected(sc)
 754         struct stg_softc *sc;
 755 {
 756         struct scsi_low_softc *slp = &sc->sc_sclow;
 757         int tout;
 758         u_int sid;
 759         u_int8_t regv;
 760
 761         if (slp->sl_selid != NULL)
 762         {
 763                 /* XXX:
 764                  * Selection vs Reselection conflicts.
 765                  */
 766                 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 767                 stghw_bcr_write_1(sc, BCTL_BUSFREE);
 768         }
 769         else if (slp->sl_Tnexus != NULL)
 770         {
 771                 device_printf(slp->sl_dev, "unexpected termination\n");
 772                 stg_disconnected(sc, slp->sl_Tnexus);
 773         }
 774
 775         /* XXX:
 776          * We should ack the reselection as soon as possible,
 777          * because the target would abort the current reselection seq
 778          * due to reselection timeout.
 779          */
 780         tout = STG_DELAY_SELECT_POLLING_MAX;
 781         while (tout -- > 0)
 782         {
 783                 regv = bus_read_1(sc->port_res, tmc_bstat);
 784                 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
 785                             (BSTAT_IO | BSTAT_SEL))
 786                 {
 787                         DELAY(1);
 788                         regv = bus_read_1(sc->port_res, tmc_bstat);
 789                         if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
 790                                     (BSTAT_IO | BSTAT_SEL))
 791                                 goto reselect_start;
 792                 }
 793                 DELAY(1);
 794         }
 795         device_printf(slp->sl_dev, "reselction timeout I\n");
 796         return EJUSTRETURN;
 797
 798 reselect_start:
 799         sid = (u_int) bus_read_1(sc->port_res, tmc_scsiid);
 800         if ((sid & sc->sc_idbit) == 0)
 801         {
 802                 /* not us */
 803                 return EJUSTRETURN;
 804         }
 805
 806         bus_write_1(sc->port_res, tmc_fctl,
 807                             sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
 808         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 809         stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
 810
 811         while (tout -- > 0)
 812         {
 813                 regv = bus_read_1(sc->port_res, tmc_bstat);
 814                 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY)
 815                         goto reselected;
 816                 DELAY(1);
 817         }
 818         device_printf(slp->sl_dev, "reselction timeout II\n");
 819         return EJUSTRETURN;
 820
 821 reselected:
 822         sid &= ~sc->sc_idbit;
 823         sid = ffs(sid) - 1;
 824         if (scsi_low_reselected(slp, sid) == NULL)
 825                 return EJUSTRETURN;
 826
 827 #ifdef  STG_STATICS
 828         stg_statics.reselect ++;
 829 #endif  /* STG_STATICS */
 830         return EJUSTRETURN;
 831 }
 832
 833 static int
 834 stg_disconnected(sc, ti)
 835         struct stg_softc *sc;
 836         struct targ_info *ti;
 837 {
 838         struct scsi_low_softc *slp = &sc->sc_sclow;
 839
 840         /* clear bus status & fifo */
 841         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
 842         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 843         stghw_bcr_write_1(sc, BCTL_BUSFREE);
 844         sc->sc_icinit &= ~ICTL_FIFO;
 845         sc->sc_busc &= ~BCTL_ATN;
 846         sc->sc_dataout_timeout = 0;
 847         sc->sc_ubf_timeout = 0;
 848
 849 #ifdef  STG_STATICS
 850         stg_statics.disconnect ++;
 851 #endif  /* STG_STATICS */
 852         scsi_low_disconnected(slp, ti);
 853         return 1;
 854 }
 855
 856 /**************************************************************
 857  * SEQUENCER
 858  **************************************************************/
 859 static int
 860 stg_target_nexus_establish(sc)
 861         struct stg_softc *sc;
 862 {
 863         struct scsi_low_softc *slp = &sc->sc_sclow;
 864         struct targ_info *ti = slp->sl_Tnexus;
 865         struct stg_targ_info *sti = (void *) ti;
 866
 867         bus_write_1(sc->port_res, tmc_ssctl, sti->sti_reg_synch);
 868         if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0)
 869         {
 870                 sc->sc_icinit |= ICTL_FIFO;
 871         }
 872         return 0;
 873 }
 874
 875 static int
 876 stg_lun_nexus_establish(sc)
 877         struct stg_softc *sc;
 878 {
 879
 880         return 0;
 881 }
 882
 883 static int
 884 stg_ccb_nexus_establish(sc)
 885         struct stg_softc *sc;
 886 {
 887         struct scsi_low_softc *slp = &sc->sc_sclow;
 888         struct slccb *cb = slp->sl_Qnexus;
 889
 890         sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
 891         return 0;
 892 }
 893
 894 #define STGHW_SELECT_INTERVAL   10
 895
 896 static int
 897 stghw_select_targ_wait(sc, mu)
 898         struct stg_softc *sc;
 899         int mu;
 900 {
 901
 902         mu = mu / STGHW_SELECT_INTERVAL;
 903         while (mu -- > 0)
 904         {
 905                 if ((bus_read_1(sc->port_res, tmc_bstat) & BSTAT_BSY) == 0)
 906                 {
 907                         DELAY(STGHW_SELECT_INTERVAL);
 908                         continue;
 909                 }
 910                 DELAY(1);
 911                 if ((bus_read_1(sc->port_res, tmc_bstat) & BSTAT_BSY) != 0)
 912                 {
 913                         return 0;
 914                 }
 915         }
 916         return ENXIO;
 917 }
 918
 919 static void
 920 stg_selection_done_and_expect_msgout(sc)
 921         struct stg_softc *sc;
 922 {
 923         struct scsi_low_softc *slp = &sc->sc_sclow;
 924
 925         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
 926         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 927         stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
 928         SCSI_LOW_ASSERT_ATN(slp);
 929 }
 930
 931 int
 932 stgintr(arg)
 933         void *arg;
 934 {
 935         struct stg_softc *sc = arg;
 936         struct scsi_low_softc *slp = &sc->sc_sclow;
 937         struct targ_info *ti;
 938         struct buf *bp;
 939         u_int derror, flags;
 940         int len;
 941         u_int8_t status, astatus, regv;
 942
 943         /*******************************************
 944          * interrupt check
 945          *******************************************/
 946         if (slp->sl_flags & HW_INACTIVE)
 947                 return 0;
 948
 949         astatus = bus_read_1(sc->port_res, tmc_astat);
 950         status = bus_read_1(sc->port_res, tmc_bstat);
 951
 952         if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1)
 953                 return 0;
 954
 955         bus_write_1(sc->port_res, tmc_ictl, 0);
 956         if (astatus & ASTAT_SCSIRST)
 957         {
 958                 bus_write_1(sc->port_res, tmc_fctl,
 959                                   sc->sc_fcRinit | FCTL_CLRFIFO);
 960                 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
 961                 bus_write_1(sc->port_res, tmc_ictl, 0);
 962
 963                 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
 964                                  "bus reset (power off?)");
 965                 return 1;
 966         }
 967
 968         /*******************************************
 969          * debug section
 970          *******************************************/
 971 #ifdef  STG_DEBUG
 972         if (stg_debug)
 973         {
 974                 scsi_low_print(slp, NULL);
 975                 device_printf(slp->sl_dev, "st %x ist %x\n\n",
 976                        status, astatus);
 977 #ifdef  KDB
 978                 if (stg_debug > 1)
 979                         kdb_enter(KDB_WHY_CAM, "stg");
 980 #endif  /* KDB */
 981         }
 982 #endif  /* STG_DEBUG */
 983
 984         /*******************************************
 985          * reselection & nexus
 986          *******************************************/
 987         if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
 988         {
 989                 if (stg_reselected(sc) == EJUSTRETURN)
 990                         goto out;
 991         }
 992
 993         if ((ti = slp->sl_Tnexus) == NULL)
 994                 return 0;
 995
 996         derror = 0;
 997         if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
 998             (sc->sc_fcRinit & FCTL_PARENB) != 0)
 999         {
1000                 slp->sl_error |= PARITYERR;
1001                 derror = SCSI_LOW_DATA_PE;
1002                 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE)
1003                         scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0);
1004                 else
1005                         scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
1006         }
1007
1008         /*******************************************
1009          * aribitration & selection
1010          *******************************************/
1011         switch (ti->ti_phase)
1012         {
1013         case PH_ARBSTART:
1014                 if ((astatus & ASTAT_ARBIT) == 0)
1015                 {
1016 #ifdef  STG_STATICS
1017                         stg_statics.arbit_fail_0 ++;
1018 #endif  /* STG_STATICS */
1019                         goto arb_fail;
1020                 }
1021
1022                 status = bus_read_1(sc->port_res, tmc_bstat);
1023                 if ((status & BSTAT_IO) != 0)
1024                 {
1025                         /* XXX:
1026                          * Selection vs Reselection conflicts.
1027                          */
1028 #ifdef  STG_STATICS
1029                         stg_statics.arbit_fail_1 ++;
1030 #endif  /* STG_STATICS */
1031 arb_fail:
1032                         bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
1033                         stghw_bcr_write_1(sc, BCTL_BUSFREE);
1034                         scsi_low_arbit_fail(slp, slp->sl_Qnexus);
1035                         goto out;
1036                 }
1037
1038                 /*
1039                  * selection assert start.
1040                  */
1041                 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
1042                 scsi_low_arbit_win(slp);
1043
1044                 bus_write_1(sc->port_res, tmc_scsiid,
1045                                   sc->sc_idbit | (1 << ti->ti_id));
1046                 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
1047                 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcWinit);
1048                 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0)
1049                 {
1050                         /* selection abort delay 200 + 100 micro sec */
1051                         if (stghw_select_targ_wait(sc, 300) == 0)
1052                         {
1053                                 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1054                                 stg_selection_done_and_expect_msgout(sc);
1055                         }
1056                 }
1057                 goto out;
1058
1059         case PH_SELSTART:
1060                 if ((status & BSTAT_BSY) == 0)
1061                 {
1062                         /* selection timeout delay 250 ms */
1063                         if (stghw_select_targ_wait(sc, 250 * 1000) != 0)
1064                         {
1065                                 stg_disconnected(sc, ti);
1066                                 goto out;
1067                         }
1068                 }
1069
1070                 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1071                 stg_selection_done_and_expect_msgout(sc);
1072                 goto out;
1073
1074         case PH_SELECTED:
1075                 if ((status & BSTAT_REQ) == 0)
1076                         goto out;
1077                 stg_target_nexus_establish(sc);
1078                 break;
1079
1080         case PH_RESEL:
1081                 if ((status & BSTAT_REQ) == 0)
1082                         goto out;
1083
1084                 /* clear a busy line */
1085                 bus_write_1(sc->port_res, tmc_fctl, sc->sc_fcRinit);
1086                 stghw_bcr_write_1(sc, sc->sc_busc);
1087                 stg_target_nexus_establish(sc);
1088                 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
1089                 {
1090                         device_printf(slp->sl_dev,
1091                             "unexpected phase after reselect\n");
1092                         slp->sl_error |= FATALIO;
1093                         scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1094                         goto out;
1095                 }
1096                 break;
1097         }
1098
1099         /*******************************************
1100          * data phase
1101          *******************************************/
1102         if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0)
1103         {
1104                 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1105                         stg_pio_read(sc, ti, 0);
1106
1107                 stg_pdma_end(sc, ti);
1108         }
1109
1110         /*******************************************
1111          * scsi seq
1112          *******************************************/
1113         switch (status & PHASE_MASK)
1114         {
1115         case COMMAND_PHASE:
1116                 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0)
1117                         break;
1118
1119                 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1120                 if (scsi_low_cmd(slp, ti) != 0)
1121                 {
1122                         scsi_low_attention(slp);
1123                 }
1124
1125                 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen,
1126                              COMMAND_PHASE, 0) != 0)
1127                 {
1128                         device_printf(slp->sl_dev, "CMDOUT short\n");
1129                 }
1130                 break;
1131
1132         case DATA_OUT_PHASE:
1133                 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1134                 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1135                 {
1136                         scsi_low_attention(slp);
1137                 }
1138
1139                 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1140                         stg_pio_write(sc, ti, sc->sc_wthold);
1141                 else
1142                         stg_pio_write(sc, ti, 0);
1143                 break;
1144
1145         case DATA_IN_PHASE:
1146                 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1147                 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1148                 {
1149                         scsi_low_attention(slp);
1150                 }
1151
1152                 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1153                         stg_pio_read(sc, ti, sc->sc_rthold);
1154                 else
1155                         stg_pio_read(sc, ti, 0);
1156                 break;
1157
1158         case STATUS_PHASE:
1159                 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ);
1160                 if (regv <= 0)
1161                         break;
1162
1163                 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1164                 regv = bus_read_1(sc->port_res, tmc_sdna);
1165                 if (scsi_low_statusin(slp, ti, regv | derror) != 0)
1166                 {
1167                         scsi_low_attention(slp);
1168                 }
1169                 if (regv != bus_read_1(sc->port_res, tmc_rdata))
1170                 {
1171                         device_printf(slp->sl_dev, "STATIN: data mismatch\n");
1172                 }
1173                 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>");
1174                 break;
1175
1176         case MESSAGE_OUT_PHASE:
1177                 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0)
1178                         break;
1179
1180                 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1181                 flags = (ti->ti_ophase != ti->ti_phase) ?
1182                                 SCSI_LOW_MSGOUT_INIT : 0;
1183                 len = scsi_low_msgout(slp, ti, flags);
1184
1185                 if (len > 1 && slp->sl_atten == 0)
1186                 {
1187                         scsi_low_attention(slp);
1188                 }
1189
1190                 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE,
1191                              slp->sl_clear_atten) != 0)
1192                 {
1193                         device_printf(slp->sl_dev, "MSGOUT short\n");
1194                 }
1195                 else
1196                 {
1197                         if (slp->sl_msgphase >= MSGPH_ABORT)
1198                         {
1199                                 stg_disconnected(sc, ti);
1200                         }
1201                 }
1202                 break;
1203
1204         case MESSAGE_IN_PHASE:
1205                 /* confirm phase and req signal */
1206                 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0)
1207                         break;
1208
1209                 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1210
1211                 /* read data with NOACK */
1212                 regv = bus_read_1(sc->port_res, tmc_sdna);
1213
1214                 if (scsi_low_msgin(slp, ti, derror | regv) == 0)
1215                 {
1216                         if (scsi_low_is_msgout_continue(ti, 0) != 0)
1217                         {
1218                                 scsi_low_attention(slp);
1219                         }
1220                 }
1221
1222                 /* read data with ACK */
1223                 if (regv != bus_read_1(sc->port_res, tmc_rdata))
1224                 {
1225                         device_printf(slp->sl_dev, "MSGIN: data mismatch\n");
1226                 }
1227
1228                 /* wait for the ack negated */
1229                 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>");
1230
1231                 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT)
1232                 {
1233                         stg_disconnected(sc, ti);
1234                 }
1235                 break;
1236
1237         case BUSFREE_PHASE:
1238                 device_printf(slp->sl_dev, "unexpected disconnect\n");
1239                 stg_disconnected(sc, ti);
1240                 break;
1241
1242         default:
1243                 slp->sl_error |= FATALIO;
1244                 device_printf(slp->sl_dev, "unknown phase bus %x intr %x\n",
1245                     status, astatus);
1246                 break;
1247         }
1248
1249 out:
1250         bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
1251         return 1;
1252 }
1253
1254 static int
1255 stg_timeout(sc)
1256         struct stg_softc *sc;
1257 {
1258         struct scsi_low_softc *slp = &sc->sc_sclow;
1259         int tout, count;
1260         u_int8_t status;
1261
1262         if (slp->sl_Tnexus == NULL)
1263                 return 0;
1264
1265         status = bus_read_1(sc->port_res, tmc_bstat);
1266         if ((status & PHASE_MASK) == 0)
1267         {
1268                 if (sc->sc_ubf_timeout ++ == 0)
1269                         return 0;
1270
1271                 device_printf(slp->sl_dev, "unexpected bus free detected\n");
1272                 slp->sl_error |= FATALIO;
1273                 scsi_low_print(slp, slp->sl_Tnexus);
1274                 stg_disconnected(sc, slp->sl_Tnexus);
1275                 return 0;
1276         }
1277
1278         switch (status & PHASE_MASK)
1279         {
1280         case DATA_OUT_PHASE:
1281                 if (sc->sc_dataout_timeout == 0)
1282                         break;
1283                 if ((status & BSTAT_REQ) == 0)
1284                         break;
1285                 if (bus_read_2(sc->port_res, tmc_fdcnt) != 0)
1286                         break;
1287                 if ((-- sc->sc_dataout_timeout) > 0)
1288                         break;
1289
1290                 slp->sl_error |= PDMAERR;
1291                 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1292                 {
1293                         device_printf(slp->sl_dev, "write padding required\n");
1294                         break;
1295                 }
1296
1297                 bus_write_1(sc->port_res, tmc_ictl, 0);
1298
1299                 tout = STG_DELAY_MAX;
1300                 while (tout --)
1301                 {
1302                         status = bus_read_1(sc->port_res, tmc_bstat);
1303                         if ((status & PHASE_MASK) != DATA_OUT_PHASE)
1304                                 break;
1305
1306                         if (bus_read_2(sc->port_res, tmc_fdcnt) != 0)
1307                         {
1308                                 DELAY(1);
1309                                 continue;
1310                         }
1311
1312                         for (count = sc->sc_maxwsize; count > 0; count --)
1313                                 bus_write_1(sc->port_res, tmc_wfifo, 0);
1314                 }
1315
1316                 status = bus_read_1(sc->port_res, tmc_bstat);
1317                 if ((status & PHASE_MASK) == DATA_OUT_PHASE)
1318                         sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1319
1320                 bus_write_1(sc->port_res, tmc_ictl, sc->sc_icinit);
1321                 break;
1322
1323         default:
1324                 break;
1325         }
1326         return 0;
1327 }