2 * Device driver for Specialix I/O8+ multiport serial card.
4 * Copyright 2003 Frank Mayhar <frank@exit.com>
6 * Derived from the "si" driver by Peter Wemm <peter@netplex.com.au>, using
7 * lots of information from the Linux "specialix" driver by Roger Wolff
8 * <R.E.Wolff@BitWizard.nl> and from the Intel CD1865 "Intelligent Eight-
9 * Channel Communications Controller" datasheet. Roger was also nice
10 * enough to answer numerous questions about stuff specific to the I/O8+
11 * not covered by the CD1865 datasheet.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notices, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notices, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
22 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE.
30 #include "opt_debug_sx.h"
32 /* Utility and support routines for the Specialix I/O8+ driver. */
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <machine/resource.h>
39 #include <machine/bus.h>
40 #include <machine/clock.h>
43 #include <dev/sx/cd1865.h>
44 #include <dev/sx/sxvar.h>
45 #include <dev/sx/sx.h>
46 #include <dev/sx/sx_util.h>
50 * Probe the board to verify that it is a Specialix I/O8+.
53 * This is called by sx_pci_attach() (and possibly in the future by
54 * sx_isa_attach()) to verify that the card we're attaching to is
55 * indeed a Specialix I/O8+. To do this, we check for the Prescaler
56 * Period Register of the CD1865 chip and for the Specialix signature
57 * on the DSR input line of each channel. These lines, along with the
58 * RTS output lines, are wired down in hardware.
65 unsigned char val1, val2;
68 sc = device_get_softc(dev);
70 * Try to write the Prescaler Period Register, then read it back,
71 * twice. If this fails, it's not an I/O8+.
73 sx_cd1865_out(sc, CD1865_PPRL, 0x5a);
75 val1 = sx_cd1865_in(sc, CD1865_PPRL);
77 sx_cd1865_out(sc, CD1865_PPRL, 0xa5);
79 val2 = sx_cd1865_in(sc, CD1865_PPRL);
81 if ((val1 != 0x5a) || (val2 != 0xa5))
85 * Check the lines that Specialix uses as board identification.
86 * These are the DSR input and the RTS output, which are wired
90 for (i = 0; i < 8; i++) {
91 sx_cd1865_out(sc, CD1865_CAR, i); /* Select channel. */
92 if (sx_cd1865_in(sc, CD1865_MSVR) & CD1865_MSVR_DSR) /* Set? */
93 val1 |= 1 << i; /* OR it in. */
97 for (i = 0; i < 8; i++) {
98 sx_cd1865_out(sc, CD1865_CAR, i); /* Select channel. */
99 if (sx_cd1865_in(sc, CD1865_MSVR) & CD1865_MSVR_RTS) /* Set? */
100 val2 |= 1 << i; /* OR it in. */
103 * They managed to switch the bit order between the docs and
104 * the IO8+ card. The new PCI card now conforms to old docs.
105 * They changed the PCI docs to reflect the situation on the
108 val2 = (bp->flags & SX_BOARD_IS_PCI) ? 0x4d : 0xb2;
113 "Specialix I/O8+ ID 0x4d not found (0x%02x).\n",
117 return(0); /* Probed successfully. */
122 * Hard-reset and initialize the I/O8+ CD1865 processor.
125 * This routine does a hard reset of the CD1865 chip and waits for it
126 * to complete. (The reset should complete after 500us; we wait 1ms
127 * and fail if we time out.) We then initialize the CD1865 processor.
139 sx_cd1865_out(sc, CD1865_GSVR, 0x00); /* Clear the GSVR. */
140 sx_cd1865_wait_CCR(sc, 0); /* Wait for the CCR to clear. */
141 sx_cd1865_out(sc, CD1865_CCR, CD1865_CCR_HARDRESET); /* Reset CD1865. */
143 to = SX_GSVR_TIMEOUT/5;
145 if (sx_cd1865_in(sc, CD1865_GSVR) == 0xff)
151 printf("sx%d: Timeout waiting for reset.\n", unit);
155 * The high five bits of the Global Interrupt Vector Register is
156 * used to identify daisy-chained CD1865 chips. The I/O8+ isn't
157 * daisy chained, but we have to initialize the field anyway.
159 sx_cd1865_out(sc, CD1865_GIVR, SX_CD1865_ID);
160 /* Clear the Global Interrupting Channel register. */
161 sx_cd1865_out(sc, CD1865_GICR, 0);
163 * Set the Service Match Registers to the appropriate values. See
164 * the cd1865.h include file for more information.
166 sx_cd1865_out(sc, CD1865_MSMR, CD1865_ACK_MINT); /* Modem. */
167 sx_cd1865_out(sc, CD1865_TSMR, CD1865_ACK_TINT); /* Transmit. */
168 sx_cd1865_out(sc, CD1865_RSMR, CD1865_ACK_RINT); /* Receive. */
170 * Set RegAckEn in the Service Request Configuration Register;
171 * we'll be acknowledging service requests in software, not
174 sx_cd1865_bis(sc, CD1865_SRCR, CD1865_SRCR_REGACKEN);
176 * Set the CD1865 timer tick rate. The value here is the processor
177 * clock rate (in MHz) divided by the rate in ticks per second. See
178 * commentary in sx.h.
180 sx_cd1865_out(sc, CD1865_PPRH, SX_CD1865_PRESCALE >> 8);
181 sx_cd1865_out(sc, CD1865_PPRL, SX_CD1865_PRESCALE & 0xff);
189 * Set the IRQ using the RTS lines that run to the PAL on the board....
191 * This is a placeholder for ISA support, if that's ever implemented. This
192 * should _only_ be called from sx_isa_attach().
204 /* In the same order as in the docs... */
218 printf("sx%d: Illegal irq %d.\n", unit, irq);
221 for (i = 0; i < 2; i++) {
222 sx_cd1865_out(sc, CD1865_CAR, i); /* Select channel. */
223 j = ((virq >> i) & 0x1) ? MSVR_RTS : 0;
224 sx_cd1865_out(sc, CD1865_MSVRTS, j);
233 * Determine the port that interrupted us.
236 * This routine checks the Global Interrupting Channel Register (GICR)
237 * to find the port that caused an interrupt. It returns a pointer to
238 * the sx_port structure of the interrupting port, or NULL if there was
241 * XXX - check type/validity of interrupt?
251 chan = (sx_cd1865_in(sc, CD1865_GSCR2|SX_EI) & CD1865_GICR_CHAN_MASK)
252 >> CD1865_GICR_CHAN_SHIFT;
253 DPRINT((NULL, DBG_INTR, "Intr chan %d\n", chan));
254 if (chan < CD1865_NUMCHAN) {
255 pp = sc->sc_ports + (int)chan;
258 printf("sx%d: False interrupt on port %d.\n", unit, chan);