2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
61 * Scripts for SYMBIOS-Processor
63 * We have to know the offsets of all labels before we reach
64 * them (for forward jumps). Therefore we declare a struct
65 * here. If you make changes inside the script,
67 * DONT FORGET TO CHANGE THE LENGTHS HERE!
71 * Script fragments which are loaded into the on-chip RAM
72 * of 825A, 875, 876, 895, 895A, 896 and 1010 chips.
73 * Must not exceed 4K bytes.
77 u32 getjob_begin [ 4];
85 #ifdef SYM_CONF_IARB_SUPPORT
102 #ifdef SYM_CONF_IARB_SUPPORT
110 u32 complete_error [ 5];
117 u32 disconnect [ 20];
118 u32 disconnect2 [ 5];
120 #ifdef SYM_CONF_IARB_SUPPORT
125 #ifdef SYM_CONF_IARB_SUPPORT
131 u32 reselected [ 19];
134 u32 reselected1 [ 25];
139 #if SYM_CONF_MAX_TASK*4 > 512
141 #elif SYM_CONF_MAX_TASK*4 > 256
152 u32 resel_no_tag [ 4];
154 u32 data_in [SYM_CONF_MAX_SG * 2];
156 u32 data_out [SYM_CONF_MAX_SG * 2];
159 u32 pm0_data_out [ 6];
160 u32 pm0_data_end [ 7];
161 u32 pm_data_end [ 4];
164 u32 pm1_data_out [ 6];
165 u32 pm1_data_end [ 9];
169 * Script fragments which stay in main memory for all chips
170 * except for chips that support 8K on-chip RAM.
174 u32 sel_for_abort [ 18];
175 u32 sel_for_abort_1 [ 2];
176 u32 msg_in_etc [ 12];
177 u32 msg_received [ 5];
178 u32 msg_weird_seen [ 5];
179 u32 msg_extended [ 17];
190 u32 nego_bad_phase [ 4];
192 u32 msg_out_done [ 4];
194 u32 data_ovrun1 [ 22];
195 u32 data_ovrun2 [ 8];
196 u32 abort_resel [ 16];
197 u32 resend_ident [ 4];
198 u32 ident_break [ 4];
199 u32 ident_break_atn [ 4];
201 u32 resel_bad_lun [ 4];
203 u32 bad_i_t_l_q [ 4];
205 u32 wsr_ma_helper [ 4];
216 /* End of data area */
222 static const struct SYM_FWA_SCR SYM_FWA_SCR = {
223 /*--------------------------< START >----------------------------*/ {
226 * Will be patched with a NO_OP if LED
227 * not needed or not desired.
229 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
234 SCR_FROM_REG (ctest2),
237 * Stop here if the C code wants to perform
238 * some error recovery procedure manually.
239 * (Indicate this by setting SEM in ISTAT)
241 SCR_FROM_REG (istat),
244 * Report to the C code the next position in
245 * the start queue the SCRIPTS will schedule.
246 * The C code must not change SCRATCHA.
251 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
254 * Start the next job.
256 * @DSA = start point for this job.
257 * SCRATCHA = address of this job in the start queue.
259 * We will restore startpos with SCRATCHA if we fails the
260 * arbitration or if it is the idle job.
262 * The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
263 * is a critical path. If it is partially executed, it then
264 * may happen that the job address is not yet in the DSA
265 * and the the next queue position points to the next JOB.
267 }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
269 * Copy to a fixed location both the next STARTPOS
270 * and the current JOB address, using self modifying
277 }/*-------------------------< _SMS_A10 >-------------------------*/,{
281 * Move the start address to TEMP using self-
282 * modifying SCRIPTS and jump indirectly to
288 }/*-------------------------< GETJOB_END >-----------------------*/,{
293 }/*-------------------------< _SMS_A20 >-------------------------*/,{
298 }/*-------------------------< SELECT >---------------------------*/,{
300 * DSA contains the address of a scheduled
303 * SCRATCHA contains the address of the start queue
304 * entry which points to the next job.
306 * Set Initiator mode.
308 * (Target mode is left as an exercise for the reader)
313 * And try to select this target.
315 SCR_SEL_TBL_ATN ^ offsetof (struct sym_dsb, select),
318 * Now there are 4 possibilities:
320 * (1) The chip loses arbitration.
321 * This is ok, because it will try again,
322 * when the bus becomes idle.
323 * (But beware of the timeout function!)
325 * (2) The chip is reselected.
326 * Then the script processor takes the jump
327 * to the RESELECT label.
329 * (3) The chip wins arbitration.
330 * Then it will execute SCRIPTS instruction until
331 * the next instruction that checks SCSI phase.
332 * Then will stop and wait for selection to be
333 * complete or selection time-out to occur.
335 * After having won arbitration, the SCRIPTS
336 * processor is able to execute instructions while
337 * the SCSI core is performing SCSI selection.
341 * Copy the CCB header to a fixed location
342 * in the HCB using self-modifying SCRIPTS.
347 SCR_COPY (sizeof(struct sym_ccbh)),
348 }/*-------------------------< _SMS_A30 >-------------------------*/,{
352 * Load the savep (saved data pointer) into
353 * the actual data pointer.
356 HADDR_1 (ccb_head.savep),
359 * Initialize the status register
362 HADDR_1 (ccb_head.status),
364 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
365 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
366 SIR_SEL_ATN_NO_MSG_OUT,
367 }/*-------------------------< SEND_IDENT >-----------------------*/,{
369 * Selection complete.
370 * Send the IDENTIFY and possibly the TAG message
371 * and negotiation message if present.
373 SCR_MOVE_TBL ^ SCR_MSG_OUT,
374 offsetof (struct sym_dsb, smsg),
375 }/*-------------------------< SELECT2 >--------------------------*/,{
376 #ifdef SYM_CONF_IARB_SUPPORT
378 * Set IMMEDIATE ARBITRATION if we have been given
379 * a hint to do so. (Some job to do after this one).
381 SCR_FROM_REG (HF_REG),
383 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
385 SCR_REG_REG (scntl1, SCR_OR, IARB),
389 * Anticipate the COMMAND phase.
390 * This is the PHASE we expect at this point.
392 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
393 PADDR_A (sel_no_cmd),
394 }/*-------------------------< COMMAND >--------------------------*/,{
396 * ... and send the command
398 SCR_MOVE_TBL ^ SCR_COMMAND,
399 offsetof (struct sym_dsb, cmd),
400 }/*-------------------------< DISPATCH >-------------------------*/,{
402 * MSG_IN is the only phase that shall be
403 * entered at least once for each (re)selection.
404 * So we test it first.
406 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
408 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
409 PADDR_A (datao_phase),
410 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
411 PADDR_A (datai_phase),
412 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
414 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
416 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
419 * Discard as many illegal phases as
420 * required and tell the C code about.
422 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
424 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
426 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
428 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
430 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
432 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
438 }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
440 * The target does not switch to command
441 * phase after IDENTIFY has been sent.
443 * If it stays in MSG OUT phase send it
444 * the IDENTIFY again.
446 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
447 PADDR_B (resend_ident),
449 * If target does not switch to MSG IN phase
450 * and we sent a negotiation, assert the
451 * failure immediately.
453 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
455 SCR_FROM_REG (HS_REG),
457 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
460 * Jump to dispatcher.
464 }/*-------------------------< INIT >-----------------------------*/,{
466 * Wait for the SCSI RESET signal to be
467 * inactive before restarting operations,
468 * since the chip may hang on SEL_ATN
469 * if SCSI RESET is active.
471 SCR_FROM_REG (sstat0),
473 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
477 }/*-------------------------< CLRACK >---------------------------*/,{
479 * Terminate possible pending message phase.
485 }/*-------------------------< DISP_STATUS >----------------------*/,{
487 * Anticipate STATUS phase.
489 * Does spare 3 SCRIPTS instructions when we have
490 * completed the INPUT of the data.
492 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
496 }/*-------------------------< DATAI_DONE >-----------------------*/,{
498 * If the device still wants to send us data,
499 * we must count the extra bytes.
501 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_IN)),
502 PADDR_B (data_ovrun),
504 * If the SWIDE is not full, jump to dispatcher.
505 * We anticipate a STATUS phase.
507 SCR_FROM_REG (scntl2),
509 SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
510 PADDR_A (disp_status),
513 * Clear this condition.
515 SCR_REG_REG (scntl2, SCR_OR, WSR),
518 * We are expecting an IGNORE RESIDUE message
519 * from the device, otherwise we are in data
520 * overrun condition. Check against MSG_IN phase.
522 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
524 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
525 PADDR_A (disp_status),
527 * We are in MSG_IN phase,
528 * Read the first byte of the message.
529 * If it is not an IGNORE RESIDUE message,
530 * signal overrun and jump to message
533 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
535 SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
537 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
540 * We got the message we expected.
541 * Read the 2nd byte, and jump to dispatcher.
545 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
550 PADDR_A (disp_status),
551 }/*-------------------------< DATAO_DONE >-----------------------*/,{
553 * If the device wants us to send more data,
554 * we must count the extra bytes.
556 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
557 PADDR_B (data_ovrun),
559 * If the SODL is not full jump to dispatcher.
560 * We anticipate a STATUS phase.
562 SCR_FROM_REG (scntl2),
564 SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
565 PADDR_A (disp_status),
567 * The SODL is full, clear this condition.
569 SCR_REG_REG (scntl2, SCR_OR, WSS),
572 * And signal a DATA UNDERRUN condition
579 }/*-------------------------< DATAI_PHASE >----------------------*/,{
582 }/*-------------------------< DATAO_PHASE >----------------------*/,{
585 }/*-------------------------< MSG_IN >---------------------------*/,{
587 * Get the first byte of the message.
589 * The script processor doesn't negate the
590 * ACK signal after this transfer.
592 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
594 }/*-------------------------< MSG_IN2 >--------------------------*/,{
596 * Check first against 1 byte messages
597 * that we handle from SCRIPTS.
599 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
601 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
602 PADDR_A (disconnect),
603 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
605 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
606 PADDR_A (restore_dp),
608 * We handle all other messages from the
609 * C code, so no need to waste on-chip RAM
613 PADDR_B (msg_in_etc),
614 }/*-------------------------< STATUS >---------------------------*/,{
618 SCR_MOVE_ABS (1) ^ SCR_STATUS,
620 #ifdef SYM_CONF_IARB_SUPPORT
622 * If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
623 * since we may have to tamper the start queue from
626 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
628 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
632 * save status to scsi_status.
637 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
640 * Anticipate the MESSAGE PHASE for
641 * the TASK COMPLETE message.
643 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
647 }/*-------------------------< COMPLETE >-------------------------*/,{
651 * Copy the data pointer to LASTP.
655 HADDR_1 (ccb_head.lastp),
657 * When we terminate the cycle by clearing ACK,
658 * the target may disconnect immediately.
660 * We don't want to be told of an "unexpected disconnect",
661 * so we disable this feature.
663 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
666 * Terminate cycle ...
668 SCR_CLR (SCR_ACK|SCR_ATN),
671 * ... and wait for the disconnect.
675 }/*-------------------------< COMPLETE2 >------------------------*/,{
681 HADDR_1 (ccb_head.status),
683 * Move back the CCB header using self-modifying
689 SCR_COPY (sizeof(struct sym_ccbh)),
691 }/*-------------------------< _SMS_A40 >-------------------------*/,{
694 * Some bridges may reorder DMA writes to memory.
695 * We donnot want the CPU to deal with completions
696 * without all the posted write having been flushed
697 * to memory. This DUMMY READ should flush posted
698 * buffers prior to the CPU having to deal with
701 SCR_COPY (4), /* DUMMY READ */
702 HADDR_1 (ccb_head.status),
705 * If command resulted in not GOOD status,
706 * call the C code if needed.
708 SCR_FROM_REG (SS_REG),
710 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
711 PADDR_B (bad_status),
713 * If we performed an auto-sense, call
714 * the C code to synchronyze task aborts
715 * with UNIT ATTENTION conditions.
717 SCR_FROM_REG (HF_REG),
719 SCR_JUMP ^ IFTRUE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
721 }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
727 }/*-------------------------< DONE >-----------------------------*/,{
729 * Copy the DSA to the DONE QUEUE and
730 * signal completion to the host.
731 * If we are interrupted between DONE
732 * and DONE_END, we must reset, otherwise
733 * the completed CCB may be lost.
740 }/*-------------------------< _SMS_A50 >-------------------------*/,{
746 * The instruction below reads the DONE QUEUE next
747 * free position from memory.
748 * In addition it ensures that all PCI posted writes
749 * are flushed and so the DSA value of the done
750 * CCB is visible by the CPU before INTFLY is raised.
753 }/*-------------------------< _SMS_A60 >-------------------------*/,{
756 }/*-------------------------< DONE_END >-------------------------*/,{
761 }/*-------------------------< SAVE_DP >--------------------------*/,{
763 * Clear ACK immediately.
764 * No need to delay it.
769 * Keep track we received a SAVE DP, so
770 * we will switch to the other PM context
771 * on the next PM since the DP may point
772 * to the current PM context.
774 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
778 * Copy the data pointer to SAVEP.
782 HADDR_1 (ccb_head.savep),
785 }/*-------------------------< RESTORE_DP >-----------------------*/,{
787 * RESTORE_DP message:
788 * Copy SAVEP to actual data pointer.
791 HADDR_1 (ccb_head.savep),
795 }/*-------------------------< DISCONNECT >-----------------------*/,{
799 * disable the "unexpected disconnect" feature,
800 * and remove the ACK signal.
802 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
804 SCR_CLR (SCR_ACK|SCR_ATN),
807 * Wait for the disconnect.
812 * Status is: DISCONNECTED.
814 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
821 HADDR_1 (ccb_head.status),
823 * If QUIRK_AUTOSAVE is set,
824 * do a "save pointer" operation.
826 SCR_FROM_REG (QU_REG),
828 SCR_JUMP ^ IFFALSE (MASK (SYM_QUIRK_AUTOSAVE, SYM_QUIRK_AUTOSAVE)),
829 PADDR_A (disconnect2),
831 * like SAVE_DP message:
832 * Remember we saved the data pointer.
833 * Copy data pointer to SAVEP.
835 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
839 HADDR_1 (ccb_head.savep),
840 }/*-------------------------< DISCONNECT2 >----------------------*/,{
842 * Move back the CCB header using self-modifying
848 SCR_COPY (sizeof(struct sym_ccbh)),
850 }/*-------------------------< _SMS_A65 >-------------------------*/,{
854 }/*-------------------------< IDLE >-----------------------------*/,{
857 * Switch the LED off and wait for reselect.
858 * Will be patched with a NO_OP if LED
859 * not needed or not desired.
861 SCR_REG_REG (gpreg, SCR_OR, 0x01),
863 #ifdef SYM_CONF_IARB_SUPPORT
867 }/*-------------------------< UNGETJOB >-------------------------*/,{
868 #ifdef SYM_CONF_IARB_SUPPORT
870 * Set IMMEDIATE ARBITRATION, for the next time.
871 * This will give us better chance to win arbitration
872 * for the job we just wanted to do.
874 SCR_REG_REG (scntl1, SCR_OR, IARB),
878 * We are not able to restart the SCRIPTS if we are
879 * interrupted and these instruction haven't been
880 * all executed. BTW, this is very unlikely to
881 * happen, but we check that from the C code.
883 SCR_LOAD_REG (dsa, 0xff),
888 }/*-------------------------< RESELECT >-------------------------*/,{
890 * Make sure we are in initiator mode.
895 * Sleep waiting for a reselection.
899 }/*-------------------------< RESELECTED >-----------------------*/,{
902 * Will be patched with a NO_OP if LED
903 * not needed or not desired.
905 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
908 * load the target id into the sdid
910 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
915 * Load the target control block address
920 SCR_SFBR_REG (dsa, SCR_SHL, 0),
922 SCR_REG_REG (dsa, SCR_SHL, 0),
924 SCR_REG_REG (dsa, SCR_AND, 0x3c),
930 }/*-------------------------< _SMS_A70 >-------------------------*/,{
934 * Copy the TCB header to a fixed place in
940 SCR_COPY (sizeof(struct sym_tcbh)),
941 }/*-------------------------< _SMS_A80 >-------------------------*/,{
945 * We expect MESSAGE IN phase.
946 * If not, get help from the C code.
948 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
950 }/*-------------------------< RESELECTED1 >----------------------*/,{
952 * Load the synchronous transfer registers.
955 HADDR_1 (tcb_head.wval),
958 HADDR_1 (tcb_head.sval),
961 * Get the IDENTIFY message.
963 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
966 * If IDENTIFY LUN #0, use a faster path
967 * to find the LCB structure.
969 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
970 PADDR_A (resel_lun0),
972 * If message isn't an IDENTIFY,
973 * tell the C code about.
975 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
976 SIR_RESEL_NO_IDENTIFY,
978 * It is an IDENTIFY message,
979 * Load the LUN control block address.
982 HADDR_1 (tcb_head.luntbl_sa),
984 SCR_SFBR_REG (dsa, SCR_SHL, 0),
986 SCR_REG_REG (dsa, SCR_SHL, 0),
988 SCR_REG_REG (dsa, SCR_AND, 0xfc),
994 }/*-------------------------< _SMS_A90 >-------------------------*/,{
999 }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
1001 * LUN 0 special case (but usual one :))
1004 HADDR_1 (tcb_head.lun0_sa),
1007 * Jump indirectly to the reselect action for this LUN.
1008 * (lcb.head.resel_sa assumed at offset zero of lcb).
1012 PADDR_A (_sms_a100),
1014 }/*-------------------------< _SMS_A100 >------------------------*/,{
1019 /* In normal situations, we jump to RESEL_TAG or RESEL_NO_TAG */
1020 }/*-------------------------< RESEL_TAG >------------------------*/,{
1022 * ACK the IDENTIFY previously received.
1027 * It shall be a tagged command.
1029 * The C code will deal with errors.
1030 * Agressive optimization, is'nt it? :)
1032 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
1035 * Copy the LCB header to a fixed place in
1036 * the HCB using self-modifying SCRIPTS.
1040 PADDR_A (_sms_a110),
1041 SCR_COPY (sizeof(struct sym_lcbh)),
1042 }/*-------------------------< _SMS_A110 >------------------------*/,{
1046 * Load the pointer to the tagged task
1047 * table for this LUN.
1050 HADDR_1 (lcb_head.itlq_tbl_sa),
1053 * The SIDL still contains the TAG value.
1054 * Agressive optimization, isn't it? :):)
1056 SCR_REG_SFBR (sidl, SCR_SHL, 0),
1058 #if SYM_CONF_MAX_TASK*4 > 512
1059 SCR_JUMPR ^ IFFALSE (CARRYSET),
1061 SCR_REG_REG (dsa1, SCR_OR, 2),
1063 SCR_REG_REG (sfbr, SCR_SHL, 0),
1065 SCR_JUMPR ^ IFFALSE (CARRYSET),
1067 SCR_REG_REG (dsa1, SCR_OR, 1),
1069 #elif SYM_CONF_MAX_TASK*4 > 256
1070 SCR_JUMPR ^ IFFALSE (CARRYSET),
1072 SCR_REG_REG (dsa1, SCR_OR, 1),
1076 * Retrieve the DSA of this task.
1077 * JUMP indirectly to the restart point of the CCB.
1079 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
1083 PADDR_A (_sms_a120),
1085 }/*-------------------------< _SMS_A120 >------------------------*/,{
1088 }/*-------------------------< RESEL_GO >-------------------------*/,{
1091 PADDR_A (_sms_a130),
1093 * Move 'ccb.phys.head.go' action to
1094 * scratch/scratch1. So scratch1 will
1095 * contain the 'restart' field of the
1099 }/*-------------------------< _SMS_A130 >------------------------*/,{
1103 PADDR_B (scratch1), /* phys.head.go.restart */
1107 /* In normal situations we branch to RESEL_DSA */
1108 }/*-------------------------< RESEL_DSA >------------------------*/,{
1110 * ACK the IDENTIFY or TAG previously received.
1114 }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
1116 * Copy the CCB header to a fixed location
1117 * in the HCB using self-modifying SCRIPTS.
1121 PADDR_A (_sms_a140),
1122 SCR_COPY (sizeof(struct sym_ccbh)),
1123 }/*-------------------------< _SMS_A140 >------------------------*/,{
1127 * Load the savep (saved data pointer) into
1128 * the actual data pointer.
1131 HADDR_1 (ccb_head.savep),
1134 * Initialize the status register
1137 HADDR_1 (ccb_head.status),
1140 * Jump to dispatcher.
1144 }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
1146 * Copy the LCB header to a fixed place in
1147 * the HCB using self-modifying SCRIPTS.
1151 PADDR_A (_sms_a145),
1152 SCR_COPY (sizeof(struct sym_lcbh)),
1153 }/*-------------------------< _SMS_A145 >------------------------*/,{
1157 * Load the DSA with the unique ITL task.
1160 HADDR_1 (lcb_head.itl_task_sa),
1164 }/*-------------------------< DATA_IN >--------------------------*/,{
1166 * Because the size depends on the
1167 * #define SYM_CONF_MAX_SG parameter,
1168 * it is filled in at runtime.
1170 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1171 * || SCR_CHMOV_TBL ^ SCR_DATA_IN,
1172 * || offsetof (struct sym_dsb, data[ i]),
1173 * ##==========================================
1176 }/*-------------------------< DATA_IN2 >-------------------------*/,{
1178 PADDR_A (datai_done),
1180 PADDR_B (data_ovrun),
1181 }/*-------------------------< DATA_OUT >-------------------------*/,{
1183 * Because the size depends on the
1184 * #define SYM_CONF_MAX_SG parameter,
1185 * it is filled in at runtime.
1187 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1188 * || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1189 * || offsetof (struct sym_dsb, data[ i]),
1190 * ##==========================================
1193 }/*-------------------------< DATA_OUT2 >------------------------*/,{
1195 PADDR_A (datao_done),
1197 PADDR_B (data_ovrun),
1198 }/*-------------------------< PM0_DATA >-------------------------*/,{
1200 * Read our host flags to SFBR, so we will be able
1201 * to check against the data direction we expect.
1203 SCR_FROM_REG (HF_REG),
1206 * Check against actual DATA PHASE.
1208 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1209 PADDR_A (pm0_data_out),
1211 * Actual phase is DATA IN.
1212 * Check against expected direction.
1214 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1215 PADDR_B (data_ovrun),
1217 * Keep track we are moving data from the
1218 * PM0 DATA mini-script.
1220 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1223 * Move the data to memory.
1225 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1226 offsetof (struct sym_ccb, phys.pm0.sg),
1228 PADDR_A (pm0_data_end),
1229 }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
1231 * Actual phase is DATA OUT.
1232 * Check against expected direction.
1234 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1235 PADDR_B (data_ovrun),
1237 * Keep track we are moving data from the
1238 * PM0 DATA mini-script.
1240 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1243 * Move the data from memory.
1245 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1246 offsetof (struct sym_ccb, phys.pm0.sg),
1247 }/*-------------------------< PM0_DATA_END >---------------------*/,{
1249 * Clear the flag that told we were moving
1250 * data from the PM0 DATA mini-script.
1252 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
1255 * Return to the previous DATA script which
1256 * is guaranteed by design (if no bug) to be
1257 * the main DATA script for this transfer.
1262 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm0.ret)),
1264 }/*-------------------------< PM_DATA_END >----------------------*/,{
1267 PADDR_A (_sms_a150),
1269 }/*-------------------------< _SMS_A150 >------------------------*/,{
1274 }/*-------------------------< PM1_DATA >-------------------------*/,{
1276 * Read our host flags to SFBR, so we will be able
1277 * to check against the data direction we expect.
1279 SCR_FROM_REG (HF_REG),
1282 * Check against actual DATA PHASE.
1284 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1285 PADDR_A (pm1_data_out),
1287 * Actual phase is DATA IN.
1288 * Check against expected direction.
1290 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1291 PADDR_B (data_ovrun),
1293 * Keep track we are moving data from the
1294 * PM1 DATA mini-script.
1296 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1299 * Move the data to memory.
1301 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1302 offsetof (struct sym_ccb, phys.pm1.sg),
1304 PADDR_A (pm1_data_end),
1305 }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
1307 * Actual phase is DATA OUT.
1308 * Check against expected direction.
1310 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1311 PADDR_B (data_ovrun),
1313 * Keep track we are moving data from the
1314 * PM1 DATA mini-script.
1316 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1319 * Move the data from memory.
1321 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1322 offsetof (struct sym_ccb, phys.pm1.sg),
1323 }/*-------------------------< PM1_DATA_END >---------------------*/,{
1325 * Clear the flag that told we were moving
1326 * data from the PM1 DATA mini-script.
1328 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
1331 * Return to the previous DATA script which
1332 * is guaranteed by design (if no bug) to be
1333 * the main DATA script for this transfer.
1338 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm1.ret)),
1341 PADDR_A (pm_data_end),
1342 }/*--------------------------<>----------------------------------*/
1345 static const struct SYM_FWB_SCR SYM_FWB_SCR = {
1346 /*-------------------------< NO_DATA >--------------------------*/ {
1348 PADDR_B (data_ovrun),
1349 }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
1351 * We are jumped here by the C code, if we have
1352 * some target to reset or some disconnected
1353 * job to abort. Since error recovery is a serious
1354 * busyness, we will really reset the SCSI BUS, if
1355 * case of a SCSI interrupt occuring in this path.
1359 * Set initiator mode.
1364 * And try to select this target.
1366 SCR_SEL_TBL_ATN ^ offsetof (struct sym_hcb, abrt_sel),
1369 * Wait for the selection to complete or
1370 * the selection to time out.
1372 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1378 SIR_TARGET_SELECTED,
1380 * The C code should let us continue here.
1381 * Send the 'kiss of death' message.
1382 * We expect an immediate disconnect once
1383 * the target has eaten the message.
1385 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1387 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1388 offsetof (struct sym_hcb, abrt_tbl),
1389 SCR_CLR (SCR_ACK|SCR_ATN),
1394 * Tell the C code that we are done.
1398 }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
1400 * Jump at scheduler.
1404 }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
1406 * If it is an EXTENDED (variable size message)
1409 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
1410 PADDR_B (msg_extended),
1412 * Let the C code handle any other
1415 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1416 PADDR_B (msg_received),
1417 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1418 PADDR_B (msg_received),
1420 * We donnot handle 2 bytes messages from SCRIPTS.
1421 * So, let the C code deal with these ones too.
1423 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
1424 PADDR_B (msg_weird_seen),
1427 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1429 }/*-------------------------< MSG_RECEIVED >---------------------*/,{
1430 SCR_COPY (4), /* DUMMY READ */
1435 }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
1436 SCR_COPY (4), /* DUMMY READ */
1441 }/*-------------------------< MSG_EXTENDED >---------------------*/,{
1443 * Clear ACK and get the next byte
1444 * assumed to be the message length.
1448 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1451 * Try to catch some unlikely situations as 0 length
1452 * or too large the length.
1454 SCR_JUMP ^ IFTRUE (DATA (0)),
1455 PADDR_B (msg_weird_seen),
1456 SCR_TO_REG (scratcha),
1458 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
1460 SCR_JUMP ^ IFTRUE (CARRYSET),
1461 PADDR_B (msg_weird_seen),
1463 * We donnot handle extended messages from SCRIPTS.
1464 * Read the amount of data correponding to the
1465 * message length and call the C code.
1472 }/*-------------------------< _SMS_B10 >-------------------------*/,{
1473 SCR_MOVE_ABS (0) ^ SCR_MSG_IN,
1476 PADDR_B (msg_received),
1477 }/*-------------------------< MSG_BAD >--------------------------*/,{
1479 * unimplemented message - reject it.
1487 }/*-------------------------< MSG_WEIRD >------------------------*/,{
1489 * weird message received
1490 * ignore all MSG IN phases and reject it.
1496 }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
1499 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1501 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1504 PADDR_B (msg_weird1),
1505 }/*-------------------------< WDTR_RESP >------------------------*/,{
1507 * let the target fetch our answer.
1513 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1514 PADDR_B (nego_bad_phase),
1515 }/*-------------------------< SEND_WDTR >------------------------*/,{
1517 * Send the M_X_WIDE_REQ
1519 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
1522 PADDR_B (msg_out_done),
1523 }/*-------------------------< SDTR_RESP >------------------------*/,{
1525 * let the target fetch our answer.
1531 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1532 PADDR_B (nego_bad_phase),
1533 }/*-------------------------< SEND_SDTR >------------------------*/,{
1535 * Send the M_X_SYNC_REQ
1537 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
1540 PADDR_B (msg_out_done),
1541 }/*-------------------------< PPR_RESP >-------------------------*/,{
1543 * let the target fetch our answer.
1549 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1550 PADDR_B (nego_bad_phase),
1551 }/*-------------------------< SEND_PPR >-------------------------*/,{
1553 * Send the M_X_PPR_REQ
1555 SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
1558 PADDR_B (msg_out_done),
1559 }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
1564 }/*-------------------------< MSG_OUT >--------------------------*/,{
1566 * The target requests a message.
1567 * We donnot send messages that may
1568 * require the device to go to bus free.
1570 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1573 * ... wait for the next phase
1574 * if it's a message out, send it again, ...
1576 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1578 }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
1580 * Let the C code be aware of the
1581 * sent message and clear the message.
1586 * ... and process the next phase
1590 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
1592 * Zero scratcha that will count the
1598 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
1600 * The target may want to transfer too much data.
1602 * If phase is DATA OUT write 1 byte and count it.
1604 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1606 SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
1609 PADDR_B (data_ovrun2),
1611 * If WSR is set, clear this condition, and
1614 SCR_FROM_REG (scntl2),
1616 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1618 SCR_REG_REG (scntl2, SCR_OR, WSR),
1621 PADDR_B (data_ovrun2),
1623 * Finally check against DATA IN phase.
1624 * Signal data overrun to the C code
1625 * and jump to dispatcher if not so.
1626 * Read 1 byte otherwise and count it.
1628 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
1634 SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
1636 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
1639 * This will allow to return a negative
1642 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
1644 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
1646 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
1649 * .. and repeat as required.
1652 PADDR_B (data_ovrun1),
1653 }/*-------------------------< ABORT_RESEL >----------------------*/,{
1659 * send the abort/abortag/reset message
1660 * we expect an immediate disconnect
1662 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1664 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1666 SCR_CLR (SCR_ACK|SCR_ATN),
1674 }/*-------------------------< RESEND_IDENT >---------------------*/,{
1676 * The target stays in MSG OUT phase after having acked
1677 * Identify [+ Tag [+ Extended message ]]. Targets shall
1678 * behave this way on parity error.
1679 * We must send it again all the messages.
1681 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
1682 0, /* 1rst ACK = 90 ns. Hope the chip isn't too fast */
1684 PADDR_A (send_ident),
1685 }/*-------------------------< IDENT_BREAK >----------------------*/,{
1690 }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
1695 }/*-------------------------< SDATA_IN >-------------------------*/,{
1696 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1697 offsetof (struct sym_dsb, sense),
1699 PADDR_A (datai_done),
1701 PADDR_B (data_ovrun),
1702 }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
1704 * Message is an IDENTIFY, but lun is unknown.
1705 * Signal problem to C code for logging the event.
1706 * Send a M_ABORT to clear all pending tasks.
1711 PADDR_B (abort_resel),
1712 }/*-------------------------< BAD_I_T_L >------------------------*/,{
1714 * We donnot have a task for that I_T_L.
1715 * Signal problem to C code for logging the event.
1716 * Send a M_ABORT message.
1719 SIR_RESEL_BAD_I_T_L,
1721 PADDR_B (abort_resel),
1722 }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
1724 * We donnot have a task that matches the tag.
1725 * Signal problem to C code for logging the event.
1726 * Send a M_ABORTTAG message.
1729 SIR_RESEL_BAD_I_T_L_Q,
1731 PADDR_B (abort_resel),
1732 }/*-------------------------< BAD_STATUS >-----------------------*/,{
1734 * Anything different from INTERMEDIATE
1735 * CONDITION MET should be a bad SCSI status,
1736 * given that GOOD status has already been tested.
1742 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
1743 SIR_BAD_SCSI_STATUS,
1746 }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
1748 * Helper for the C code when WSR bit is set.
1749 * Perform the move of the residual byte.
1751 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1752 offsetof (struct sym_ccb, phys.wresid),
1755 }/*-------------------------< ZERO >-----------------------------*/,{
1757 }/*-------------------------< SCRATCH >--------------------------*/,{
1758 SCR_DATA_ZERO, /* MUST BE BEFORE SCRATCH1 */
1759 }/*-------------------------< SCRATCH1 >-------------------------*/,{
1761 }/*-------------------------< PREV_DONE >------------------------*/,{
1762 SCR_DATA_ZERO, /* MUST BE BEFORE DONE_POS ! */
1763 }/*-------------------------< DONE_POS >-------------------------*/,{
1765 }/*-------------------------< NEXTJOB >--------------------------*/,{
1766 SCR_DATA_ZERO, /* MUST BE BEFORE STARTPOS ! */
1767 }/*-------------------------< STARTPOS >-------------------------*/,{
1769 }/*-------------------------< TARGTBL >--------------------------*/,{
1772 }/*-------------------------< SNOOPTEST >------------------------*/,{
1774 * Read the variable.
1780 * Write the variable.
1786 * Read back the variable.
1791 }/*-------------------------< SNOOPEND >-------------------------*/,{
1797 }/*--------------------------<>----------------------------------*/