2 * SPDX-License-Identifier: BSD-3-Clause
4 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
5 * PCI-SCSI controllers.
7 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
10 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
11 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
14 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
15 * Copyright (C) 1998-1999 Gerard Roudier
17 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
18 * a port of the FreeBSD ncr driver to Linux-1.2.13.
20 * The original ncr driver has been written for 386bsd and FreeBSD by
21 * Wolfgang Stanglmeier <wolf@cologne.de>
22 * Stefan Esser <se@mi.Uni-Koeln.de>
23 * Copyright (C) 1994 Wolfgang Stanglmeier
25 * The initialisation code, and part of the code that addresses
26 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
27 * written by Justin T. Gibbs.
29 * Other major contributions:
31 * NVRAM detection and reading.
32 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
34 *-----------------------------------------------------------------------------
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. The name of the author may not be used to endorse or promote products
45 * derived from this software without specific prior written permission.
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
51 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63 * Scripts for SYMBIOS-Processor
65 * We have to know the offsets of all labels before we reach
66 * them (for forward jumps). Therefore we declare a struct
67 * here. If you make changes inside the script,
69 * DONT FORGET TO CHANGE THE LENGTHS HERE!
73 * Script fragments which are loaded into the on-chip RAM
74 * of 825A, 875, 876, 895, 895A, 896 and 1010 chips.
75 * Must not exceed 4K bytes.
79 u32 getjob_begin [ 4];
87 #ifdef SYM_CONF_IARB_SUPPORT
100 u32 datai_phase [ 2];
101 u32 datao_phase [ 2];
104 #ifdef SYM_CONF_IARB_SUPPORT
112 u32 complete_error [ 5];
119 u32 disconnect [ 20];
120 u32 disconnect2 [ 5];
122 #ifdef SYM_CONF_IARB_SUPPORT
127 #ifdef SYM_CONF_IARB_SUPPORT
133 u32 reselected [ 19];
136 u32 reselected1 [ 25];
141 #if SYM_CONF_MAX_TASK*4 > 512
143 #elif SYM_CONF_MAX_TASK*4 > 256
154 u32 resel_no_tag [ 4];
156 u32 data_in [SYM_CONF_MAX_SG * 2];
158 u32 data_out [SYM_CONF_MAX_SG * 2];
161 u32 pm0_data_out [ 6];
162 u32 pm0_data_end [ 7];
163 u32 pm_data_end [ 4];
166 u32 pm1_data_out [ 6];
167 u32 pm1_data_end [ 9];
171 * Script fragments which stay in main memory for all chips
172 * except for chips that support 8K on-chip RAM.
176 u32 sel_for_abort [ 18];
177 u32 sel_for_abort_1 [ 2];
178 u32 msg_in_etc [ 12];
179 u32 msg_received [ 5];
180 u32 msg_weird_seen [ 5];
181 u32 msg_extended [ 17];
192 u32 nego_bad_phase [ 4];
194 u32 msg_out_done [ 4];
196 u32 data_ovrun1 [ 22];
197 u32 data_ovrun2 [ 8];
198 u32 abort_resel [ 16];
199 u32 resend_ident [ 4];
200 u32 ident_break [ 4];
201 u32 ident_break_atn [ 4];
203 u32 resel_bad_lun [ 4];
205 u32 bad_i_t_l_q [ 4];
207 u32 wsr_ma_helper [ 4];
218 /* End of data area */
224 static const struct SYM_FWA_SCR SYM_FWA_SCR = {
225 /*--------------------------< START >----------------------------*/ {
228 * Will be patched with a NO_OP if LED
229 * not needed or not desired.
231 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
236 SCR_FROM_REG (ctest2),
239 * Stop here if the C code wants to perform
240 * some error recovery procedure manually.
241 * (Indicate this by setting SEM in ISTAT)
243 SCR_FROM_REG (istat),
246 * Report to the C code the next position in
247 * the start queue the SCRIPTS will schedule.
248 * The C code must not change SCRATCHA.
253 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
256 * Start the next job.
258 * @DSA = start point for this job.
259 * SCRATCHA = address of this job in the start queue.
261 * We will restore startpos with SCRATCHA if we fails the
262 * arbitration or if it is the idle job.
264 * The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
265 * is a critical path. If it is partially executed, it then
266 * may happen that the job address is not yet in the DSA
267 * and the next queue position points to the next JOB.
269 }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
271 * Copy to a fixed location both the next STARTPOS
272 * and the current JOB address, using self modifying
279 }/*-------------------------< _SMS_A10 >-------------------------*/,{
283 * Move the start address to TEMP using self-
284 * modifying SCRIPTS and jump indirectly to
290 }/*-------------------------< GETJOB_END >-----------------------*/,{
295 }/*-------------------------< _SMS_A20 >-------------------------*/,{
300 }/*-------------------------< SELECT >---------------------------*/,{
302 * DSA contains the address of a scheduled
305 * SCRATCHA contains the address of the start queue
306 * entry which points to the next job.
308 * Set Initiator mode.
310 * (Target mode is left as an exercise for the reader)
315 * And try to select this target.
317 SCR_SEL_TBL_ATN ^ offsetof (struct sym_dsb, select),
320 * Now there are 4 possibilities:
322 * (1) The chip loses arbitration.
323 * This is ok, because it will try again,
324 * when the bus becomes idle.
325 * (But beware of the timeout function!)
327 * (2) The chip is reselected.
328 * Then the script processor takes the jump
329 * to the RESELECT label.
331 * (3) The chip wins arbitration.
332 * Then it will execute SCRIPTS instruction until
333 * the next instruction that checks SCSI phase.
334 * Then will stop and wait for selection to be
335 * complete or selection time-out to occur.
337 * After having won arbitration, the SCRIPTS
338 * processor is able to execute instructions while
339 * the SCSI core is performing SCSI selection.
343 * Copy the CCB header to a fixed location
344 * in the HCB using self-modifying SCRIPTS.
349 SCR_COPY (sizeof(struct sym_ccbh)),
350 }/*-------------------------< _SMS_A30 >-------------------------*/,{
354 * Load the savep (saved data pointer) into
355 * the actual data pointer.
358 HADDR_1 (ccb_head.savep),
361 * Initialize the status register
364 HADDR_1 (ccb_head.status),
366 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
367 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
368 SIR_SEL_ATN_NO_MSG_OUT,
369 }/*-------------------------< SEND_IDENT >-----------------------*/,{
371 * Selection complete.
372 * Send the IDENTIFY and possibly the TAG message
373 * and negotiation message if present.
375 SCR_MOVE_TBL ^ SCR_MSG_OUT,
376 offsetof (struct sym_dsb, smsg),
377 }/*-------------------------< SELECT2 >--------------------------*/,{
378 #ifdef SYM_CONF_IARB_SUPPORT
380 * Set IMMEDIATE ARBITRATION if we have been given
381 * a hint to do so. (Some job to do after this one).
383 SCR_FROM_REG (HF_REG),
385 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
387 SCR_REG_REG (scntl1, SCR_OR, IARB),
391 * Anticipate the COMMAND phase.
392 * This is the PHASE we expect at this point.
394 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
395 PADDR_A (sel_no_cmd),
396 }/*-------------------------< COMMAND >--------------------------*/,{
398 * ... and send the command
400 SCR_MOVE_TBL ^ SCR_COMMAND,
401 offsetof (struct sym_dsb, cmd),
402 }/*-------------------------< DISPATCH >-------------------------*/,{
404 * MSG_IN is the only phase that shall be
405 * entered at least once for each (re)selection.
406 * So we test it first.
408 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
410 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
411 PADDR_A (datao_phase),
412 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
413 PADDR_A (datai_phase),
414 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
416 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
418 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
421 * Discard as many illegal phases as
422 * required and tell the C code about.
424 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
426 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
428 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
430 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
432 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
434 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
440 }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
442 * The target does not switch to command
443 * phase after IDENTIFY has been sent.
445 * If it stays in MSG OUT phase send it
446 * the IDENTIFY again.
448 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
449 PADDR_B (resend_ident),
451 * If target does not switch to MSG IN phase
452 * and we sent a negotiation, assert the
453 * failure immediately.
455 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
457 SCR_FROM_REG (HS_REG),
459 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
462 * Jump to dispatcher.
466 }/*-------------------------< INIT >-----------------------------*/,{
468 * Wait for the SCSI RESET signal to be
469 * inactive before restarting operations,
470 * since the chip may hang on SEL_ATN
471 * if SCSI RESET is active.
473 SCR_FROM_REG (sstat0),
475 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
479 }/*-------------------------< CLRACK >---------------------------*/,{
481 * Terminate possible pending message phase.
487 }/*-------------------------< DISP_STATUS >----------------------*/,{
489 * Anticipate STATUS phase.
491 * Does spare 3 SCRIPTS instructions when we have
492 * completed the INPUT of the data.
494 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
498 }/*-------------------------< DATAI_DONE >-----------------------*/,{
500 * If the device still wants to send us data,
501 * we must count the extra bytes.
503 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_IN)),
504 PADDR_B (data_ovrun),
506 * If the SWIDE is not full, jump to dispatcher.
507 * We anticipate a STATUS phase.
509 SCR_FROM_REG (scntl2),
511 SCR_JUMP ^ IFFALSE (MASK (WSR, WSR)),
512 PADDR_A (disp_status),
515 * Clear this condition.
517 SCR_REG_REG (scntl2, SCR_OR, WSR),
520 * We are expecting an IGNORE RESIDUE message
521 * from the device, otherwise we are in data
522 * overrun condition. Check against MSG_IN phase.
524 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
526 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
527 PADDR_A (disp_status),
529 * We are in MSG_IN phase,
530 * Read the first byte of the message.
531 * If it is not an IGNORE RESIDUE message,
532 * signal overrun and jump to message
535 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
537 SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
539 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
542 * We got the message we expected.
543 * Read the 2nd byte, and jump to dispatcher.
547 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
552 PADDR_A (disp_status),
553 }/*-------------------------< DATAO_DONE >-----------------------*/,{
555 * If the device wants us to send more data,
556 * we must count the extra bytes.
558 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
559 PADDR_B (data_ovrun),
561 * If the SODL is not full jump to dispatcher.
562 * We anticipate a STATUS phase.
564 SCR_FROM_REG (scntl2),
566 SCR_JUMP ^ IFFALSE (MASK (WSS, WSS)),
567 PADDR_A (disp_status),
569 * The SODL is full, clear this condition.
571 SCR_REG_REG (scntl2, SCR_OR, WSS),
574 * And signal a DATA UNDERRUN condition
581 }/*-------------------------< DATAI_PHASE >----------------------*/,{
584 }/*-------------------------< DATAO_PHASE >----------------------*/,{
587 }/*-------------------------< MSG_IN >---------------------------*/,{
589 * Get the first byte of the message.
591 * The script processor doesn't negate the
592 * ACK signal after this transfer.
594 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
596 }/*-------------------------< MSG_IN2 >--------------------------*/,{
598 * Check first against 1 byte messages
599 * that we handle from SCRIPTS.
601 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
603 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
604 PADDR_A (disconnect),
605 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
607 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
608 PADDR_A (restore_dp),
610 * We handle all other messages from the
611 * C code, so no need to waste on-chip RAM
615 PADDR_B (msg_in_etc),
616 }/*-------------------------< STATUS >---------------------------*/,{
620 SCR_MOVE_ABS (1) ^ SCR_STATUS,
622 #ifdef SYM_CONF_IARB_SUPPORT
624 * If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
625 * since we may have to tamper the start queue from
628 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
630 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
634 * save status to scsi_status.
639 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
642 * Anticipate the MESSAGE PHASE for
643 * the TASK COMPLETE message.
645 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
649 }/*-------------------------< COMPLETE >-------------------------*/,{
653 * Copy the data pointer to LASTP.
657 HADDR_1 (ccb_head.lastp),
659 * When we terminate the cycle by clearing ACK,
660 * the target may disconnect immediately.
662 * We don't want to be told of an "unexpected disconnect",
663 * so we disable this feature.
665 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
668 * Terminate cycle ...
670 SCR_CLR (SCR_ACK|SCR_ATN),
673 * ... and wait for the disconnect.
677 }/*-------------------------< COMPLETE2 >------------------------*/,{
683 HADDR_1 (ccb_head.status),
685 * Move back the CCB header using self-modifying
691 SCR_COPY (sizeof(struct sym_ccbh)),
693 }/*-------------------------< _SMS_A40 >-------------------------*/,{
696 * Some bridges may reorder DMA writes to memory.
697 * We donnot want the CPU to deal with completions
698 * without all the posted write having been flushed
699 * to memory. This DUMMY READ should flush posted
700 * buffers prior to the CPU having to deal with
703 SCR_COPY (4), /* DUMMY READ */
704 HADDR_1 (ccb_head.status),
707 * If command resulted in not GOOD status,
708 * call the C code if needed.
710 SCR_FROM_REG (SS_REG),
712 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
713 PADDR_B (bad_status),
715 * If we performed an auto-sense, call
716 * the C code to synchronyze task aborts
717 * with UNIT ATTENTION conditions.
719 SCR_FROM_REG (HF_REG),
721 SCR_JUMP ^ IFTRUE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
723 }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
729 }/*-------------------------< DONE >-----------------------------*/,{
731 * Copy the DSA to the DONE QUEUE and
732 * signal completion to the host.
733 * If we are interrupted between DONE
734 * and DONE_END, we must reset, otherwise
735 * the completed CCB may be lost.
742 }/*-------------------------< _SMS_A50 >-------------------------*/,{
748 * The instruction below reads the DONE QUEUE next
749 * free position from memory.
750 * In addition it ensures that all PCI posted writes
751 * are flushed and so the DSA value of the done
752 * CCB is visible by the CPU before INTFLY is raised.
755 }/*-------------------------< _SMS_A60 >-------------------------*/,{
758 }/*-------------------------< DONE_END >-------------------------*/,{
763 }/*-------------------------< SAVE_DP >--------------------------*/,{
765 * Clear ACK immediately.
766 * No need to delay it.
771 * Keep track we received a SAVE DP, so
772 * we will switch to the other PM context
773 * on the next PM since the DP may point
774 * to the current PM context.
776 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
780 * Copy the data pointer to SAVEP.
784 HADDR_1 (ccb_head.savep),
787 }/*-------------------------< RESTORE_DP >-----------------------*/,{
789 * RESTORE_DP message:
790 * Copy SAVEP to actual data pointer.
793 HADDR_1 (ccb_head.savep),
797 }/*-------------------------< DISCONNECT >-----------------------*/,{
801 * disable the "unexpected disconnect" feature,
802 * and remove the ACK signal.
804 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
806 SCR_CLR (SCR_ACK|SCR_ATN),
809 * Wait for the disconnect.
814 * Status is: DISCONNECTED.
816 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
823 HADDR_1 (ccb_head.status),
825 * If QUIRK_AUTOSAVE is set,
826 * do a "save pointer" operation.
828 SCR_FROM_REG (QU_REG),
830 SCR_JUMP ^ IFFALSE (MASK (SYM_QUIRK_AUTOSAVE, SYM_QUIRK_AUTOSAVE)),
831 PADDR_A (disconnect2),
833 * like SAVE_DP message:
834 * Remember we saved the data pointer.
835 * Copy data pointer to SAVEP.
837 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
841 HADDR_1 (ccb_head.savep),
842 }/*-------------------------< DISCONNECT2 >----------------------*/,{
844 * Move back the CCB header using self-modifying
850 SCR_COPY (sizeof(struct sym_ccbh)),
852 }/*-------------------------< _SMS_A65 >-------------------------*/,{
856 }/*-------------------------< IDLE >-----------------------------*/,{
859 * Switch the LED off and wait for reselect.
860 * Will be patched with a NO_OP if LED
861 * not needed or not desired.
863 SCR_REG_REG (gpreg, SCR_OR, 0x01),
865 #ifdef SYM_CONF_IARB_SUPPORT
869 }/*-------------------------< UNGETJOB >-------------------------*/,{
870 #ifdef SYM_CONF_IARB_SUPPORT
872 * Set IMMEDIATE ARBITRATION, for the next time.
873 * This will give us better chance to win arbitration
874 * for the job we just wanted to do.
876 SCR_REG_REG (scntl1, SCR_OR, IARB),
880 * We are not able to restart the SCRIPTS if we are
881 * interrupted and these instruction haven't been
882 * all executed. BTW, this is very unlikely to
883 * happen, but we check that from the C code.
885 SCR_LOAD_REG (dsa, 0xff),
890 }/*-------------------------< RESELECT >-------------------------*/,{
892 * Make sure we are in initiator mode.
897 * Sleep waiting for a reselection.
901 }/*-------------------------< RESELECTED >-----------------------*/,{
904 * Will be patched with a NO_OP if LED
905 * not needed or not desired.
907 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
910 * load the target id into the sdid
912 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
917 * Load the target control block address
922 SCR_SFBR_REG (dsa, SCR_SHL, 0),
924 SCR_REG_REG (dsa, SCR_SHL, 0),
926 SCR_REG_REG (dsa, SCR_AND, 0x3c),
932 }/*-------------------------< _SMS_A70 >-------------------------*/,{
936 * Copy the TCB header to a fixed place in
942 SCR_COPY (sizeof(struct sym_tcbh)),
943 }/*-------------------------< _SMS_A80 >-------------------------*/,{
947 * We expect MESSAGE IN phase.
948 * If not, get help from the C code.
950 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
952 }/*-------------------------< RESELECTED1 >----------------------*/,{
954 * Load the synchronous transfer registers.
957 HADDR_1 (tcb_head.wval),
960 HADDR_1 (tcb_head.sval),
963 * Get the IDENTIFY message.
965 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
968 * If IDENTIFY LUN #0, use a faster path
969 * to find the LCB structure.
971 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
972 PADDR_A (resel_lun0),
974 * If message isn't an IDENTIFY,
975 * tell the C code about.
977 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
978 SIR_RESEL_NO_IDENTIFY,
980 * It is an IDENTIFY message,
981 * Load the LUN control block address.
984 HADDR_1 (tcb_head.luntbl_sa),
986 SCR_SFBR_REG (dsa, SCR_SHL, 0),
988 SCR_REG_REG (dsa, SCR_SHL, 0),
990 SCR_REG_REG (dsa, SCR_AND, 0xfc),
996 }/*-------------------------< _SMS_A90 >-------------------------*/,{
1001 }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
1003 * LUN 0 special case (but usual one :))
1006 HADDR_1 (tcb_head.lun0_sa),
1009 * Jump indirectly to the reselect action for this LUN.
1010 * (lcb.head.resel_sa assumed at offset zero of lcb).
1014 PADDR_A (_sms_a100),
1016 }/*-------------------------< _SMS_A100 >------------------------*/,{
1021 /* In normal situations, we jump to RESEL_TAG or RESEL_NO_TAG */
1022 }/*-------------------------< RESEL_TAG >------------------------*/,{
1024 * ACK the IDENTIFY previously received.
1029 * It shall be a tagged command.
1031 * The C code will deal with errors.
1032 * Aggressive optimization, isn't it? :)
1034 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
1037 * Copy the LCB header to a fixed place in
1038 * the HCB using self-modifying SCRIPTS.
1042 PADDR_A (_sms_a110),
1043 SCR_COPY (sizeof(struct sym_lcbh)),
1044 }/*-------------------------< _SMS_A110 >------------------------*/,{
1048 * Load the pointer to the tagged task
1049 * table for this LUN.
1052 HADDR_1 (lcb_head.itlq_tbl_sa),
1055 * The SIDL still contains the TAG value.
1056 * Aggressive optimization, isn't it? :):)
1058 SCR_REG_SFBR (sidl, SCR_SHL, 0),
1060 #if SYM_CONF_MAX_TASK*4 > 512
1061 SCR_JUMPR ^ IFFALSE (CARRYSET),
1063 SCR_REG_REG (dsa1, SCR_OR, 2),
1065 SCR_REG_REG (sfbr, SCR_SHL, 0),
1067 SCR_JUMPR ^ IFFALSE (CARRYSET),
1069 SCR_REG_REG (dsa1, SCR_OR, 1),
1071 #elif SYM_CONF_MAX_TASK*4 > 256
1072 SCR_JUMPR ^ IFFALSE (CARRYSET),
1074 SCR_REG_REG (dsa1, SCR_OR, 1),
1078 * Retrieve the DSA of this task.
1079 * JUMP indirectly to the restart point of the CCB.
1081 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
1085 PADDR_A (_sms_a120),
1087 }/*-------------------------< _SMS_A120 >------------------------*/,{
1090 }/*-------------------------< RESEL_GO >-------------------------*/,{
1093 PADDR_A (_sms_a130),
1095 * Move 'ccb.phys.head.go' action to
1096 * scratch/scratch1. So scratch1 will
1097 * contain the 'restart' field of the
1101 }/*-------------------------< _SMS_A130 >------------------------*/,{
1105 PADDR_B (scratch1), /* phys.head.go.restart */
1109 /* In normal situations we branch to RESEL_DSA */
1110 }/*-------------------------< RESEL_DSA >------------------------*/,{
1112 * ACK the IDENTIFY or TAG previously received.
1116 }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
1118 * Copy the CCB header to a fixed location
1119 * in the HCB using self-modifying SCRIPTS.
1123 PADDR_A (_sms_a140),
1124 SCR_COPY (sizeof(struct sym_ccbh)),
1125 }/*-------------------------< _SMS_A140 >------------------------*/,{
1129 * Load the savep (saved data pointer) into
1130 * the actual data pointer.
1133 HADDR_1 (ccb_head.savep),
1136 * Initialize the status register
1139 HADDR_1 (ccb_head.status),
1142 * Jump to dispatcher.
1146 }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
1148 * Copy the LCB header to a fixed place in
1149 * the HCB using self-modifying SCRIPTS.
1153 PADDR_A (_sms_a145),
1154 SCR_COPY (sizeof(struct sym_lcbh)),
1155 }/*-------------------------< _SMS_A145 >------------------------*/,{
1159 * Load the DSA with the unique ITL task.
1162 HADDR_1 (lcb_head.itl_task_sa),
1166 }/*-------------------------< DATA_IN >--------------------------*/,{
1168 * Because the size depends on the
1169 * #define SYM_CONF_MAX_SG parameter,
1170 * it is filled in at runtime.
1172 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1173 * || SCR_CHMOV_TBL ^ SCR_DATA_IN,
1174 * || offsetof (struct sym_dsb, data[ i]),
1175 * ##==========================================
1178 }/*-------------------------< DATA_IN2 >-------------------------*/,{
1180 PADDR_A (datai_done),
1182 PADDR_B (data_ovrun),
1183 }/*-------------------------< DATA_OUT >-------------------------*/,{
1185 * Because the size depends on the
1186 * #define SYM_CONF_MAX_SG parameter,
1187 * it is filled in at runtime.
1189 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1190 * || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1191 * || offsetof (struct sym_dsb, data[ i]),
1192 * ##==========================================
1195 }/*-------------------------< DATA_OUT2 >------------------------*/,{
1197 PADDR_A (datao_done),
1199 PADDR_B (data_ovrun),
1200 }/*-------------------------< PM0_DATA >-------------------------*/,{
1202 * Read our host flags to SFBR, so we will be able
1203 * to check against the data direction we expect.
1205 SCR_FROM_REG (HF_REG),
1208 * Check against actual DATA PHASE.
1210 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1211 PADDR_A (pm0_data_out),
1213 * Actual phase is DATA IN.
1214 * Check against expected direction.
1216 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1217 PADDR_B (data_ovrun),
1219 * Keep track we are moving data from the
1220 * PM0 DATA mini-script.
1222 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1225 * Move the data to memory.
1227 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1228 offsetof (struct sym_ccb, phys.pm0.sg),
1230 PADDR_A (pm0_data_end),
1231 }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
1233 * Actual phase is DATA OUT.
1234 * Check against expected direction.
1236 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1237 PADDR_B (data_ovrun),
1239 * Keep track we are moving data from the
1240 * PM0 DATA mini-script.
1242 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1245 * Move the data from memory.
1247 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1248 offsetof (struct sym_ccb, phys.pm0.sg),
1249 }/*-------------------------< PM0_DATA_END >---------------------*/,{
1251 * Clear the flag that told we were moving
1252 * data from the PM0 DATA mini-script.
1254 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
1257 * Return to the previous DATA script which
1258 * is guaranteed by design (if no bug) to be
1259 * the main DATA script for this transfer.
1264 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm0.ret)),
1266 }/*-------------------------< PM_DATA_END >----------------------*/,{
1269 PADDR_A (_sms_a150),
1271 }/*-------------------------< _SMS_A150 >------------------------*/,{
1276 }/*-------------------------< PM1_DATA >-------------------------*/,{
1278 * Read our host flags to SFBR, so we will be able
1279 * to check against the data direction we expect.
1281 SCR_FROM_REG (HF_REG),
1284 * Check against actual DATA PHASE.
1286 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1287 PADDR_A (pm1_data_out),
1289 * Actual phase is DATA IN.
1290 * Check against expected direction.
1292 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1293 PADDR_B (data_ovrun),
1295 * Keep track we are moving data from the
1296 * PM1 DATA mini-script.
1298 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1301 * Move the data to memory.
1303 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1304 offsetof (struct sym_ccb, phys.pm1.sg),
1306 PADDR_A (pm1_data_end),
1307 }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
1309 * Actual phase is DATA OUT.
1310 * Check against expected direction.
1312 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1313 PADDR_B (data_ovrun),
1315 * Keep track we are moving data from the
1316 * PM1 DATA mini-script.
1318 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1321 * Move the data from memory.
1323 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1324 offsetof (struct sym_ccb, phys.pm1.sg),
1325 }/*-------------------------< PM1_DATA_END >---------------------*/,{
1327 * Clear the flag that told we were moving
1328 * data from the PM1 DATA mini-script.
1330 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
1333 * Return to the previous DATA script which
1334 * is guaranteed by design (if no bug) to be
1335 * the main DATA script for this transfer.
1340 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm1.ret)),
1343 PADDR_A (pm_data_end),
1344 }/*--------------------------<>----------------------------------*/
1347 static const struct SYM_FWB_SCR SYM_FWB_SCR = {
1348 /*-------------------------< NO_DATA >--------------------------*/ {
1350 PADDR_B (data_ovrun),
1351 }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
1353 * We are jumped here by the C code, if we have
1354 * some target to reset or some disconnected
1355 * job to abort. Since error recovery is a serious
1356 * busyness, we will really reset the SCSI BUS, if
1357 * case of a SCSI interrupt occurring in this path.
1361 * Set initiator mode.
1366 * And try to select this target.
1368 SCR_SEL_TBL_ATN ^ offsetof (struct sym_hcb, abrt_sel),
1371 * Wait for the selection to complete or
1372 * the selection to time out.
1374 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1380 SIR_TARGET_SELECTED,
1382 * The C code should let us continue here.
1383 * Send the 'kiss of death' message.
1384 * We expect an immediate disconnect once
1385 * the target has eaten the message.
1387 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1389 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1390 offsetof (struct sym_hcb, abrt_tbl),
1391 SCR_CLR (SCR_ACK|SCR_ATN),
1396 * Tell the C code that we are done.
1400 }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
1402 * Jump at scheduler.
1406 }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
1408 * If it is an EXTENDED (variable size message)
1411 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
1412 PADDR_B (msg_extended),
1414 * Let the C code handle any other
1417 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1418 PADDR_B (msg_received),
1419 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1420 PADDR_B (msg_received),
1422 * We donnot handle 2 bytes messages from SCRIPTS.
1423 * So, let the C code deal with these ones too.
1425 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
1426 PADDR_B (msg_weird_seen),
1429 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1431 }/*-------------------------< MSG_RECEIVED >---------------------*/,{
1432 SCR_COPY (4), /* DUMMY READ */
1437 }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
1438 SCR_COPY (4), /* DUMMY READ */
1443 }/*-------------------------< MSG_EXTENDED >---------------------*/,{
1445 * Clear ACK and get the next byte
1446 * assumed to be the message length.
1450 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1453 * Try to catch some unlikely situations as 0 length
1454 * or too large the length.
1456 SCR_JUMP ^ IFTRUE (DATA (0)),
1457 PADDR_B (msg_weird_seen),
1458 SCR_TO_REG (scratcha),
1460 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
1462 SCR_JUMP ^ IFTRUE (CARRYSET),
1463 PADDR_B (msg_weird_seen),
1465 * We donnot handle extended messages from SCRIPTS.
1466 * Read the amount of data corresponding to the
1467 * message length and call the C code.
1474 }/*-------------------------< _SMS_B10 >-------------------------*/,{
1475 SCR_MOVE_ABS (0) ^ SCR_MSG_IN,
1478 PADDR_B (msg_received),
1479 }/*-------------------------< MSG_BAD >--------------------------*/,{
1481 * unimplemented message - reject it.
1489 }/*-------------------------< MSG_WEIRD >------------------------*/,{
1491 * weird message received
1492 * ignore all MSG IN phases and reject it.
1498 }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
1501 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1503 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1506 PADDR_B (msg_weird1),
1507 }/*-------------------------< WDTR_RESP >------------------------*/,{
1509 * let the target fetch our answer.
1515 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1516 PADDR_B (nego_bad_phase),
1517 }/*-------------------------< SEND_WDTR >------------------------*/,{
1519 * Send the M_X_WIDE_REQ
1521 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
1524 PADDR_B (msg_out_done),
1525 }/*-------------------------< SDTR_RESP >------------------------*/,{
1527 * let the target fetch our answer.
1533 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1534 PADDR_B (nego_bad_phase),
1535 }/*-------------------------< SEND_SDTR >------------------------*/,{
1537 * Send the M_X_SYNC_REQ
1539 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
1542 PADDR_B (msg_out_done),
1543 }/*-------------------------< PPR_RESP >-------------------------*/,{
1545 * let the target fetch our answer.
1551 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1552 PADDR_B (nego_bad_phase),
1553 }/*-------------------------< SEND_PPR >-------------------------*/,{
1555 * Send the M_X_PPR_REQ
1557 SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
1560 PADDR_B (msg_out_done),
1561 }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
1566 }/*-------------------------< MSG_OUT >--------------------------*/,{
1568 * The target requests a message.
1569 * We donnot send messages that may
1570 * require the device to go to bus free.
1572 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1575 * ... wait for the next phase
1576 * if it's a message out, send it again, ...
1578 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1580 }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
1582 * Let the C code be aware of the
1583 * sent message and clear the message.
1588 * ... and process the next phase
1592 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
1594 * Zero scratcha that will count the
1600 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
1602 * The target may want to transfer too much data.
1604 * If phase is DATA OUT write 1 byte and count it.
1606 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1608 SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
1611 PADDR_B (data_ovrun2),
1613 * If WSR is set, clear this condition, and
1616 SCR_FROM_REG (scntl2),
1618 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1620 SCR_REG_REG (scntl2, SCR_OR, WSR),
1623 PADDR_B (data_ovrun2),
1625 * Finally check against DATA IN phase.
1626 * Signal data overrun to the C code
1627 * and jump to dispatcher if not so.
1628 * Read 1 byte otherwise and count it.
1630 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
1636 SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
1638 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
1641 * This will allow to return a negative
1644 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
1646 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
1648 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
1651 * .. and repeat as required.
1654 PADDR_B (data_ovrun1),
1655 }/*-------------------------< ABORT_RESEL >----------------------*/,{
1661 * send the abort/abortag/reset message
1662 * we expect an immediate disconnect
1664 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1666 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1668 SCR_CLR (SCR_ACK|SCR_ATN),
1676 }/*-------------------------< RESEND_IDENT >---------------------*/,{
1678 * The target stays in MSG OUT phase after having acked
1679 * Identify [+ Tag [+ Extended message ]]. Targets shall
1680 * behave this way on parity error.
1681 * We must send it again all the messages.
1683 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
1684 0, /* 1rst ACK = 90 ns. Hope the chip isn't too fast */
1686 PADDR_A (send_ident),
1687 }/*-------------------------< IDENT_BREAK >----------------------*/,{
1692 }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
1697 }/*-------------------------< SDATA_IN >-------------------------*/,{
1698 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1699 offsetof (struct sym_dsb, sense),
1701 PADDR_A (datai_done),
1703 PADDR_B (data_ovrun),
1704 }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
1706 * Message is an IDENTIFY, but lun is unknown.
1707 * Signal problem to C code for logging the event.
1708 * Send a M_ABORT to clear all pending tasks.
1713 PADDR_B (abort_resel),
1714 }/*-------------------------< BAD_I_T_L >------------------------*/,{
1716 * We donnot have a task for that I_T_L.
1717 * Signal problem to C code for logging the event.
1718 * Send a M_ABORT message.
1721 SIR_RESEL_BAD_I_T_L,
1723 PADDR_B (abort_resel),
1724 }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
1726 * We donnot have a task that matches the tag.
1727 * Signal problem to C code for logging the event.
1728 * Send a M_ABORTTAG message.
1731 SIR_RESEL_BAD_I_T_L_Q,
1733 PADDR_B (abort_resel),
1734 }/*-------------------------< BAD_STATUS >-----------------------*/,{
1736 * Anything different from INTERMEDIATE
1737 * CONDITION MET should be a bad SCSI status,
1738 * given that GOOD status has already been tested.
1744 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
1745 SIR_BAD_SCSI_STATUS,
1748 }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
1750 * Helper for the C code when WSR bit is set.
1751 * Perform the move of the residual byte.
1753 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1754 offsetof (struct sym_ccb, phys.wresid),
1757 }/*-------------------------< ZERO >-----------------------------*/,{
1759 }/*-------------------------< SCRATCH >--------------------------*/,{
1760 SCR_DATA_ZERO, /* MUST BE BEFORE SCRATCH1 */
1761 }/*-------------------------< SCRATCH1 >-------------------------*/,{
1763 }/*-------------------------< PREV_DONE >------------------------*/,{
1764 SCR_DATA_ZERO, /* MUST BE BEFORE DONE_POS ! */
1765 }/*-------------------------< DONE_POS >-------------------------*/,{
1767 }/*-------------------------< NEXTJOB >--------------------------*/,{
1768 SCR_DATA_ZERO, /* MUST BE BEFORE STARTPOS ! */
1769 }/*-------------------------< STARTPOS >-------------------------*/,{
1771 }/*-------------------------< TARGTBL >--------------------------*/,{
1774 }/*-------------------------< SNOOPTEST >------------------------*/,{
1776 * Read the variable.
1782 * Write the variable.
1788 * Read back the variable.
1793 }/*-------------------------< SNOOPEND >-------------------------*/,{
1799 }/*--------------------------<>----------------------------------*/