2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
64 /* #define CAM_NEW_TRAN_CODE */
66 #include <sys/param.h>
69 * Driver configuration options.
72 #include <dev/sym/sym_conf.h>
75 #include <sys/systm.h>
76 #include <sys/malloc.h>
77 #include <sys/endian.h>
78 #include <sys/kernel.h>
80 #include <sys/mutex.h>
81 #include <sys/module.h>
86 #include <dev/pci/pcireg.h>
87 #include <dev/pci/pcivar.h>
89 #include <machine/bus.h>
90 #include <machine/resource.h>
94 #include <cam/cam_ccb.h>
95 #include <cam/cam_sim.h>
96 #include <cam/cam_xpt_sim.h>
97 #include <cam/cam_debug.h>
99 #include <cam/scsi/scsi_all.h>
100 #include <cam/scsi/scsi_message.h>
103 #include <vm/vm_param.h>
106 /* Short and quite clear integer types */
111 typedef u_int16_t u16;
112 typedef u_int32_t u32;
115 * From 'cam.error_recovery_diffs.20010313.context' patch.
117 #ifdef CAM_NEW_TRAN_CODE
118 #define FreeBSD_New_Tran_Settings
119 #endif /* CAM_NEW_TRAN_CODE */
122 * Driver definitions.
124 #include <dev/sym/sym_defs.h>
125 #include <dev/sym/sym_fw.h>
128 * IA32 architecture does not reorder STORES and prevents
129 * LOADS from passing STORES. It is called `program order'
130 * by Intel and allows device drivers to deal with memory
131 * ordering by only ensuring that the code is not reordered
132 * by the compiler when ordering is required.
133 * Other architectures implement a weaker ordering that
134 * requires memory barriers (and also IO barriers when they
135 * make sense) to be used.
138 #if defined __i386__ || defined __amd64__
139 #define MEMORY_BARRIER() do { ; } while(0)
140 #elif defined __alpha__
141 #define MEMORY_BARRIER() alpha_mb()
142 #elif defined __powerpc__
143 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
144 #elif defined __ia64__
145 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
146 #elif defined __sparc64__
147 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
149 #error "Not supported platform"
153 * A la VMS/CAM-3 queue management.
156 typedef struct sym_quehead {
157 struct sym_quehead *flink; /* Forward pointer */
158 struct sym_quehead *blink; /* Backward pointer */
161 #define sym_que_init(ptr) do { \
162 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
165 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
167 return (head->flink == head) ? 0 : head->flink;
170 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
172 return (head->blink == head) ? 0 : head->blink;
175 static __inline void __sym_que_add(struct sym_quehead * new,
176 struct sym_quehead * blink,
177 struct sym_quehead * flink)
185 static __inline void __sym_que_del(struct sym_quehead * blink,
186 struct sym_quehead * flink)
188 flink->blink = blink;
189 blink->flink = flink;
192 static __inline int sym_que_empty(struct sym_quehead *head)
194 return head->flink == head;
197 static __inline void sym_que_splice(struct sym_quehead *list,
198 struct sym_quehead *head)
200 struct sym_quehead *first = list->flink;
203 struct sym_quehead *last = list->blink;
204 struct sym_quehead *at = head->flink;
214 #define sym_que_entry(ptr, type, member) \
215 ((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member)))
218 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
220 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
222 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
224 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
226 struct sym_quehead *elem = head->flink;
229 __sym_que_del(head, elem->flink);
235 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
237 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
239 struct sym_quehead *elem = head->blink;
242 __sym_que_del(elem->blink, head);
249 * This one may be useful.
251 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
252 for (qp = (head)->flink; qp != (head); qp = qp->flink)
254 * FreeBSD does not offer our kind of queue in the CAM CCB.
255 * So, we have to cast.
257 #define sym_qptr(p) ((struct sym_quehead *) (p))
260 * Simple bitmap operations.
262 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
263 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
264 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
267 * Number of tasks per device we want to handle.
269 #if SYM_CONF_MAX_TAG_ORDER > 8
270 #error "more than 256 tags per logical unit not allowed."
272 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
275 * Donnot use more tasks that we can handle.
277 #ifndef SYM_CONF_MAX_TAG
278 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
280 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
281 #undef SYM_CONF_MAX_TAG
282 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
286 * This one means 'NO TAG for this job'
291 * Number of SCSI targets.
293 #if SYM_CONF_MAX_TARGET > 16
294 #error "more than 16 targets not allowed."
298 * Number of logical units per target.
300 #if SYM_CONF_MAX_LUN > 64
301 #error "more than 64 logical units per target not allowed."
305 * Asynchronous pre-scaler (ns). Shall be 40 for
306 * the SCSI timings to be compliant.
308 #define SYM_CONF_MIN_ASYNC (40)
311 * Number of entries in the START and DONE queues.
313 * We limit to 1 PAGE in order to succeed allocation of
314 * these queues. Each entry is 8 bytes long (2 DWORDS).
316 #ifdef SYM_CONF_MAX_START
317 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
319 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
320 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
323 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
324 #undef SYM_CONF_MAX_QUEUE
325 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
326 #undef SYM_CONF_MAX_START
327 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
331 * For this one, we want a short name :-)
333 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
336 * Active debugging tags and verbosity.
338 #define DEBUG_ALLOC (0x0001)
339 #define DEBUG_PHASE (0x0002)
340 #define DEBUG_POLL (0x0004)
341 #define DEBUG_QUEUE (0x0008)
342 #define DEBUG_RESULT (0x0010)
343 #define DEBUG_SCATTER (0x0020)
344 #define DEBUG_SCRIPT (0x0040)
345 #define DEBUG_TINY (0x0080)
346 #define DEBUG_TIMING (0x0100)
347 #define DEBUG_NEGO (0x0200)
348 #define DEBUG_TAGS (0x0400)
349 #define DEBUG_POINTER (0x0800)
352 static int sym_debug = 0;
353 #define DEBUG_FLAGS sym_debug
355 /* #define DEBUG_FLAGS (0x0631) */
356 #define DEBUG_FLAGS (0x0000)
359 #define sym_verbose (np->verbose)
362 * Insert a delay in micro-seconds and milli-seconds.
364 static void UDELAY(int us) { DELAY(us); }
365 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
368 * Simple power of two buddy-like allocator.
370 * This simple code is not intended to be fast, but to
371 * provide power of 2 aligned memory allocations.
372 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
373 * this allocator allows simple and fast address calculations
374 * from the SCRIPTS code. In addition, cache line alignment
375 * is guaranteed for power of 2 cache line size.
377 * This allocator has been developped for the Linux sym53c8xx
378 * driver, since this O/S does not provide naturally aligned
380 * It has the advantage of allowing the driver to use private
381 * pages of memory that will be useful if we ever need to deal
382 * with IO MMUs for PCI.
385 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
387 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
389 #define MEMO_PAGE_ORDER 1 /* 2 PAGEs maximum on amd64 */
392 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
395 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
396 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
397 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
400 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
401 #define free_pages(p) free((p), M_DEVBUF)
403 #define get_pages() contigmalloc(MEMO_CLUSTER_SIZE, M_DEVBUF, \
404 0, 0, 1LL << 32, PAGE_SIZE, 1LL << 32)
405 #define free_pages(p) contigfree((p), MEMO_CLUSTER_SIZE, M_DEVBUF)
408 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
410 typedef struct m_link { /* Link between free memory chunks */
414 typedef struct m_vtob { /* Virtual to Bus address translation */
416 bus_dmamap_t dmamap; /* Map for this chunk */
417 m_addr_t vaddr; /* Virtual address */
418 m_addr_t baddr; /* Bus physical address */
420 /* Hash this stuff a bit to speed up translations */
421 #define VTOB_HASH_SHIFT 5
422 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
423 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
424 #define VTOB_HASH_CODE(m) \
425 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
427 typedef struct m_pool { /* Memory pool of a given kind */
428 bus_dma_tag_t dev_dmat; /* Identifies the pool */
429 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
430 m_addr_t (*getp)(struct m_pool *);
431 #ifdef MEMO_FREE_UNUSED
432 void (*freep)(struct m_pool *, m_addr_t);
434 #define M_GETP() mp->getp(mp)
435 #define M_FREEP(p) mp->freep(mp, p)
437 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
439 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
442 static void *___sym_malloc(m_pool_s *mp, int size)
445 int s = (1 << MEMO_SHIFT);
450 if (size > MEMO_CLUSTER_SIZE)
460 if (s == MEMO_CLUSTER_SIZE) {
461 h[j].next = (m_link_s *) M_GETP();
469 a = (m_addr_t) h[j].next;
471 h[j].next = h[j].next->next;
475 h[j].next = (m_link_s *) (a+s);
480 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
485 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
488 int s = (1 << MEMO_SHIFT);
494 printf("___sym_mfree(%p, %d)\n", ptr, size);
497 if (size > MEMO_CLUSTER_SIZE)
508 #ifdef MEMO_FREE_UNUSED
509 if (s == MEMO_CLUSTER_SIZE) {
516 while (q->next && q->next != (m_link_s *) b) {
520 ((m_link_s *) a)->next = h[i].next;
521 h[i].next = (m_link_s *) a;
524 q->next = q->next->next;
531 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
535 p = ___sym_malloc(mp, size);
537 if (DEBUG_FLAGS & DEBUG_ALLOC)
538 printf ("new %-10s[%4d] @%p.\n", name, size, p);
542 else if (uflags & MEMO_WARN)
543 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
548 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
550 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
552 if (DEBUG_FLAGS & DEBUG_ALLOC)
553 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
555 ___sym_mfree(mp, ptr, size);
560 * Default memory pool we donnot need to involve in DMA.
563 * With the `bus dma abstraction', we use a separate pool for
564 * memory we donnot need to involve in DMA.
566 static m_addr_t ___mp0_getp(m_pool_s *mp)
568 m_addr_t m = (m_addr_t) get_pages();
574 #ifdef MEMO_FREE_UNUSED
575 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
582 #ifdef MEMO_FREE_UNUSED
583 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
585 static m_pool_s mp0 = {0, 0, ___mp0_getp};
590 * Actual memory allocation routine for non-DMAed memory.
592 static void *sym_calloc(int size, char *name)
596 m = __sym_calloc(&mp0, size, name);
602 * Actual memory allocation routine for non-DMAed memory.
604 static void sym_mfree(void *ptr, int size, char *name)
607 __sym_mfree(&mp0, ptr, size, name);
615 * With `bus dma abstraction', we use a separate pool per parent
616 * BUS handle. A reverse table (hashed) is maintained for virtual
617 * to BUS address translation.
619 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
622 baddr = (bus_addr_t *)arg;
623 *baddr = segs->ds_addr;
626 static m_addr_t ___dma_getp(m_pool_s *mp)
630 bus_addr_t baddr = 0;
632 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
636 if (bus_dmamem_alloc(mp->dmat, &vaddr,
637 BUS_DMA_NOWAIT, &vbp->dmamap))
639 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
640 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, 0);
642 int hc = VTOB_HASH_CODE(vaddr);
643 vbp->vaddr = (m_addr_t) vaddr;
644 vbp->baddr = (m_addr_t) baddr;
645 vbp->next = mp->vtob[hc];
648 return (m_addr_t) vaddr;
652 bus_dmamap_unload(mp->dmat, vbp->dmamap);
654 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
657 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
658 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
663 #ifdef MEMO_FREE_UNUSED
664 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
666 m_vtob_s **vbpp, *vbp;
667 int hc = VTOB_HASH_CODE(m);
669 vbpp = &mp->vtob[hc];
670 while (*vbpp && (*vbpp)->vaddr != m)
671 vbpp = &(*vbpp)->next;
674 *vbpp = (*vbpp)->next;
675 bus_dmamap_unload(mp->dmat, vbp->dmamap);
676 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
677 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
678 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
684 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
687 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
691 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
695 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
697 mp->dev_dmat = dev_dmat;
698 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
699 BUS_SPACE_MAXADDR_32BIT,
700 BUS_SPACE_MAXADDR_32BIT,
701 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
702 MEMO_CLUSTER_SIZE, 0,
703 busdma_lock_mutex, &Giant, &mp->dmat)) {
704 mp->getp = ___dma_getp;
705 #ifdef MEMO_FREE_UNUSED
706 mp->freep = ___dma_freep;
714 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
718 #ifdef MEMO_FREE_UNUSED
719 static void ___del_dma_pool(m_pool_s *p)
721 struct m_pool **pp = &mp0.next;
723 while (*pp && *pp != p)
727 bus_dma_tag_destroy(p->dmat);
728 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
733 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
739 mp = ___get_dma_pool(dev_dmat);
741 mp = ___cre_dma_pool(dev_dmat);
743 m = __sym_calloc(mp, size, name);
744 #ifdef MEMO_FREE_UNUSED
754 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
759 mp = ___get_dma_pool(dev_dmat);
761 __sym_mfree(mp, m, size, name);
762 #ifdef MEMO_FREE_UNUSED
769 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
772 int hc = VTOB_HASH_CODE(m);
774 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
777 mp = ___get_dma_pool(dev_dmat);
780 while (vp && (m_addr_t) vp->vaddr != a)
785 panic("sym: VTOBUS FAILED!\n");
786 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
791 * Verbs for DMAable memory handling.
792 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
795 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
796 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
797 #define _sym_mfree_dma(np, p, s, n) \
798 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
799 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
800 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
801 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
802 #define vtobus(p) _vtobus(np, p)
806 * Print a buffer in hexadecimal format.
808 static void sym_printb_hex (u_char *p, int n)
811 printf (" %x", *p++);
815 * Same with a label at beginning and .\n at end.
817 static void sym_printl_hex (char *label, u_char *p, int n)
819 printf ("%s", label);
820 sym_printb_hex (p, n);
825 * Return a string for SCSI BUS mode.
827 static char *sym_scsi_bus_mode(int mode)
830 case SMODE_HVD: return "HVD";
831 case SMODE_SE: return "SE";
832 case SMODE_LVD: return "LVD";
838 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
840 #ifdef SYM_CONF_NVRAM_SUPPORT
841 static u_char Tekram_sync[16] =
842 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
846 * Union of supported NVRAM formats.
850 #define SYM_SYMBIOS_NVRAM (1)
851 #define SYM_TEKRAM_NVRAM (2)
852 #ifdef SYM_CONF_NVRAM_SUPPORT
854 Symbios_nvram Symbios;
861 * This one is hopefully useless, but actually useful. :-)
864 #define assert(expression) { \
865 if (!(expression)) { \
867 "assertion \"%s\" failed: file \"%s\", line %d\n", \
869 __FILE__, __LINE__); \
875 * Some provision for a possible big endian mode supported by
876 * Symbios chips (never seen, by the way).
877 * For now, this stuff does not deserve any comments. :)
880 #define sym_offb(o) (o)
881 #define sym_offw(o) (o)
884 * Some provision for support for BIG ENDIAN CPU.
887 #define cpu_to_scr(dw) htole32(dw)
888 #define scr_to_cpu(dw) le32toh(dw)
891 * Access to the chip IO registers and on-chip RAM.
892 * We use the `bus space' interface under FreeBSD-4 and
893 * later kernel versions.
897 #if defined(SYM_CONF_IOMAPPED)
899 #define INB_OFF(o) bus_space_read_1(np->io_tag, np->io_bsh, o)
900 #define INW_OFF(o) bus_space_read_2(np->io_tag, np->io_bsh, o)
901 #define INL_OFF(o) bus_space_read_4(np->io_tag, np->io_bsh, o)
903 #define OUTB_OFF(o, v) bus_space_write_1(np->io_tag, np->io_bsh, o, (v))
904 #define OUTW_OFF(o, v) bus_space_write_2(np->io_tag, np->io_bsh, o, (v))
905 #define OUTL_OFF(o, v) bus_space_write_4(np->io_tag, np->io_bsh, o, (v))
907 #else /* Memory mapped IO */
909 #define INB_OFF(o) bus_space_read_1(np->mmio_tag, np->mmio_bsh, o)
910 #define INW_OFF(o) bus_space_read_2(np->mmio_tag, np->mmio_bsh, o)
911 #define INL_OFF(o) bus_space_read_4(np->mmio_tag, np->mmio_bsh, o)
913 #define OUTB_OFF(o, v) bus_space_write_1(np->mmio_tag, np->mmio_bsh, o, (v))
914 #define OUTW_OFF(o, v) bus_space_write_2(np->mmio_tag, np->mmio_bsh, o, (v))
915 #define OUTL_OFF(o, v) bus_space_write_4(np->mmio_tag, np->mmio_bsh, o, (v))
917 #endif /* SYM_CONF_IOMAPPED */
919 #define OUTRAM_OFF(o, a, l) \
920 bus_space_write_region_1(np->ram_tag, np->ram_bsh, o, (a), (l))
924 * Common definitions for both bus space and legacy IO methods.
926 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
927 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
928 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
930 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
931 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
932 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
934 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
935 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
936 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
937 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
938 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
939 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
942 * We normally want the chip to have a consistent view
943 * of driver internal data structures when we restart it.
946 #define OUTL_DSP(v) \
949 OUTL (nc_dsp, (v)); \
952 #define OUTONB_STD() \
955 OUTONB (nc_dcntl, (STD|NOCOM)); \
959 * Command control block states.
963 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
964 #define HS_DISCONNECT (3) /* Disconnected by target */
965 #define HS_WAIT (4) /* waiting for resource */
967 #define HS_DONEMASK (0x80)
968 #define HS_COMPLETE (4|HS_DONEMASK)
969 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
970 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
971 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
974 * Software Interrupt Codes
976 #define SIR_BAD_SCSI_STATUS (1)
977 #define SIR_SEL_ATN_NO_MSG_OUT (2)
978 #define SIR_MSG_RECEIVED (3)
979 #define SIR_MSG_WEIRD (4)
980 #define SIR_NEGO_FAILED (5)
981 #define SIR_NEGO_PROTO (6)
982 #define SIR_SCRIPT_STOPPED (7)
983 #define SIR_REJECT_TO_SEND (8)
984 #define SIR_SWIDE_OVERRUN (9)
985 #define SIR_SODL_UNDERRUN (10)
986 #define SIR_RESEL_NO_MSG_IN (11)
987 #define SIR_RESEL_NO_IDENTIFY (12)
988 #define SIR_RESEL_BAD_LUN (13)
989 #define SIR_TARGET_SELECTED (14)
990 #define SIR_RESEL_BAD_I_T_L (15)
991 #define SIR_RESEL_BAD_I_T_L_Q (16)
992 #define SIR_ABORT_SENT (17)
993 #define SIR_RESEL_ABORTED (18)
994 #define SIR_MSG_OUT_DONE (19)
995 #define SIR_COMPLETE_ERROR (20)
996 #define SIR_DATA_OVERRUN (21)
997 #define SIR_BAD_PHASE (22)
1001 * Extended error bit codes.
1002 * xerr_status field of struct sym_ccb.
1004 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1005 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
1006 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
1007 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
1008 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
1011 * Negotiation status.
1012 * nego_status field of struct sym_ccb.
1019 * A CCB hashed table is used to retrieve CCB address
1022 #define CCB_HASH_SHIFT 8
1023 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1024 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1025 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
1030 #define SYM_DISC_ENABLED (1)
1031 #define SYM_TAGS_ENABLED (1<<1)
1032 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1033 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1036 * Host adapter miscellaneous flags.
1038 #define SYM_AVOID_BUS_RESET (1)
1039 #define SYM_SCAN_TARGETS_HILO (1<<1)
1043 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1044 * saving the DATA POINTER then reselects and terminates the IO.
1045 * On reselection, the automatic RESTORE DATA POINTER makes the
1046 * CURRENT DATA POINTER not point at the end of the IO.
1047 * This behaviour just breaks our calculation of the residual.
1048 * For now, we just force an AUTO SAVE on disconnection and will
1049 * fix that in a further driver version.
1051 #define SYM_QUIRK_AUTOSAVE 1
1056 #define SYM_SNOOP_TIMEOUT (10000000)
1057 #define SYM_PCI_IO PCIR_BAR(0)
1058 #define SYM_PCI_MMIO PCIR_BAR(1)
1059 #define SYM_PCI_RAM PCIR_BAR(2)
1060 #define SYM_PCI_RAM64 PCIR_BAR(3)
1063 * Back-pointer from the CAM CCB to our data structures.
1065 #define sym_hcb_ptr spriv_ptr0
1066 /* #define sym_ccb_ptr spriv_ptr1 */
1069 * We mostly have to deal with pointers.
1070 * Thus these typedef's.
1072 typedef struct sym_tcb *tcb_p;
1073 typedef struct sym_lcb *lcb_p;
1074 typedef struct sym_ccb *ccb_p;
1075 typedef struct sym_hcb *hcb_p;
1078 * Gather negotiable parameters value
1081 #ifdef FreeBSD_New_Tran_Settings
1088 u8 options; /* PPR options */
1092 struct sym_trans current;
1093 struct sym_trans goal;
1094 struct sym_trans user;
1097 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1098 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1101 * Global TCB HEADER.
1103 * Due to lack of indirect addressing on earlier NCR chips,
1104 * this substructure is copied from the TCB to a global
1105 * address after selection.
1106 * For SYMBIOS chips that support LOAD/STORE this copy is
1107 * not needed and thus not performed.
1111 * Scripts bus addresses of LUN table accessed from scripts.
1112 * LUN #0 is a special case, since multi-lun devices are rare,
1113 * and we we want to speed-up the general case and not waste
1116 u32 luntbl_sa; /* bus address of this table */
1117 u32 lun0_sa; /* bus address of LCB #0 */
1119 * Actual SYNC/WIDE IO registers value for this target.
1120 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1121 * so have alignment constraints.
1123 /*0*/ u_char uval; /* -> SCNTL4 register */
1124 /*1*/ u_char sval; /* -> SXFER io register */
1125 /*2*/ u_char filler1;
1126 /*3*/ u_char wval; /* -> SCNTL3 io register */
1130 * Target Control Block
1135 * Assumed at offset 0.
1137 /*0*/ struct sym_tcbh head;
1140 * LUN table used by the SCRIPTS processor.
1141 * An array of bus addresses is used on reselection.
1143 u32 *luntbl; /* LCBs bus address table */
1146 * LUN table used by the C code.
1148 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1149 #if SYM_CONF_MAX_LUN > 1
1150 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1154 * Bitmap that tells about LUNs that succeeded at least
1155 * 1 IO and therefore assumed to be a real device.
1156 * Avoid useless allocation of the LCB structure.
1158 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1161 * Bitmap that tells about LUNs that haven't yet an LCB
1162 * allocated (not discovered or LCB allocation failed).
1164 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1167 * Transfer capabilities (SIP)
1169 struct sym_tinfo tinfo;
1172 * Keep track of the CCB used for the negotiation in order
1173 * to ensure that only 1 negotiation is queued at a time.
1175 ccb_p nego_cp; /* CCB used for the nego */
1178 * Set when we want to reset the device.
1183 * Other user settable limits and options.
1184 * These limits are read from the NVRAM if present.
1191 * Global LCB HEADER.
1193 * Due to lack of indirect addressing on earlier NCR chips,
1194 * this substructure is copied from the LCB to a global
1195 * address after selection.
1196 * For SYMBIOS chips that support LOAD/STORE this copy is
1197 * not needed and thus not performed.
1201 * SCRIPTS address jumped by SCRIPTS on reselection.
1202 * For not probed logical units, this address points to
1203 * SCRIPTS that deal with bad LU handling (must be at
1204 * offset zero of the LCB for that reason).
1209 * Task (bus address of a CCB) read from SCRIPTS that points
1210 * to the unique ITL nexus allowed to be disconnected.
1215 * Task table bus address (read from SCRIPTS).
1221 * Logical Unit Control Block
1226 * Assumed at offset 0.
1228 /*0*/ struct sym_lcbh head;
1231 * Task table read from SCRIPTS that contains pointers to
1232 * ITLQ nexuses. The bus address read from SCRIPTS is
1233 * inside the header.
1235 u32 *itlq_tbl; /* Kernel virtual address */
1238 * Busy CCBs management.
1240 u_short busy_itlq; /* Number of busy tagged CCBs */
1241 u_short busy_itl; /* Number of busy untagged CCBs */
1244 * Circular tag allocation buffer.
1246 u_short ia_tag; /* Tag allocation index */
1247 u_short if_tag; /* Tag release index */
1248 u_char *cb_tags; /* Circular tags buffer */
1251 * Set when we want to clear all tasks.
1259 u_char current_flags;
1263 * Action from SCRIPTS on a task.
1264 * Is part of the CCB, but is also used separately to plug
1265 * error handling action to perform from SCRIPTS.
1268 u32 start; /* Jumped by SCRIPTS after selection */
1269 u32 restart; /* Jumped by SCRIPTS on relection */
1273 * Phase mismatch context.
1275 * It is part of the CCB and is used as parameters for the
1276 * DATA pointer. We need two contexts to handle correctly the
1277 * SAVED DATA POINTER.
1280 struct sym_tblmove sg; /* Updated interrupted SG block */
1281 u32 ret; /* SCRIPT return address */
1285 * LUN control block lookup.
1286 * We use a direct pointer for LUN #0, and a table of
1287 * pointers which is only allocated for devices that support
1290 #if SYM_CONF_MAX_LUN <= 1
1291 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1293 #define sym_lp(np, tp, lun) \
1294 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1298 * Status are used by the host and the script processor.
1300 * The last four bytes (status[4]) are copied to the
1301 * scratchb register (declared as scr0..scr3) just after the
1302 * select/reselect, and copied back just after disconnecting.
1303 * Inside the script the XX_REG are used.
1307 * Last four bytes (script)
1311 #define HS_PRT nc_scr1
1313 #define SS_PRT nc_scr2
1315 #define HF_PRT nc_scr3
1318 * Last four bytes (host)
1320 #define actualquirks phys.head.status[0]
1321 #define host_status phys.head.status[1]
1322 #define ssss_status phys.head.status[2]
1323 #define host_flags phys.head.status[3]
1328 #define HF_IN_PM0 1u
1329 #define HF_IN_PM1 (1u<<1)
1330 #define HF_ACT_PM (1u<<2)
1331 #define HF_DP_SAVED (1u<<3)
1332 #define HF_SENSE (1u<<4)
1333 #define HF_EXT_ERR (1u<<5)
1334 #define HF_DATA_IN (1u<<6)
1335 #ifdef SYM_CONF_IARB_SUPPORT
1336 #define HF_HINT_IARB (1u<<7)
1340 * Global CCB HEADER.
1342 * Due to lack of indirect addressing on earlier NCR chips,
1343 * this substructure is copied from the ccb to a global
1344 * address after selection (or reselection) and copied back
1345 * before disconnect.
1346 * For SYMBIOS chips that support LOAD/STORE this copy is
1347 * not needed and thus not performed.
1352 * Start and restart SCRIPTS addresses (must be at 0).
1354 /*0*/ struct sym_actscr go;
1357 * SCRIPTS jump address that deal with data pointers.
1358 * 'savep' points to the position in the script responsible
1359 * for the actual transfer of data.
1360 * It's written on reception of a SAVE_DATA_POINTER message.
1362 u32 savep; /* Jump address to saved data pointer */
1363 u32 lastp; /* SCRIPTS address at end of data */
1364 u32 goalp; /* Not accessed for now from SCRIPTS */
1373 * Data Structure Block
1375 * During execution of a ccb by the script processor, the
1376 * DSA (data structure address) register points to this
1377 * substructure of the ccb.
1382 * Also assumed at offset 0 of the sym_ccb structure.
1384 /*0*/ struct sym_ccbh head;
1387 * Phase mismatch contexts.
1388 * We need two to handle correctly the SAVED DATA POINTER.
1389 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1390 * for address calculation from SCRIPTS.
1396 * Table data for Script
1398 struct sym_tblsel select;
1399 struct sym_tblmove smsg;
1400 struct sym_tblmove smsg_ext;
1401 struct sym_tblmove cmd;
1402 struct sym_tblmove sense;
1403 struct sym_tblmove wresid;
1404 struct sym_tblmove data [SYM_CONF_MAX_SG];
1408 * Our Command Control Block
1412 * This is the data structure which is pointed by the DSA
1413 * register when it is executed by the script processor.
1414 * It must be the first entry.
1416 struct sym_dsb phys;
1419 * Pointer to CAM ccb and related stuff.
1421 union ccb *cam_ccb; /* CAM scsiio ccb */
1422 u8 cdb_buf[16]; /* Copy of CDB */
1423 u8 *sns_bbuf; /* Bounce buffer for sense data */
1424 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1425 int data_len; /* Total data length */
1426 int segments; /* Number of SG segments */
1429 * Miscellaneous status'.
1431 u_char nego_status; /* Negotiation status */
1432 u_char xerr_status; /* Extended error flags */
1433 u32 extra_bytes; /* Extraneous bytes transferred */
1437 * We prepare a message to be sent after selection.
1438 * We may use a second one if the command is rescheduled
1439 * due to CHECK_CONDITION or COMMAND TERMINATED.
1440 * Contents are IDENTIFY and SIMPLE_TAG.
1441 * While negotiating sync or wide transfer,
1442 * a SDTR or WDTR message is appended.
1444 u_char scsi_smsg [12];
1445 u_char scsi_smsg2[12];
1448 * Auto request sense related fields.
1450 u_char sensecmd[6]; /* Request Sense command */
1451 u_char sv_scsi_status; /* Saved SCSI status */
1452 u_char sv_xerr_status; /* Saved extended status */
1453 int sv_resid; /* Saved residual */
1456 * Map for the DMA of user data.
1458 void *arg; /* Argument for some callback */
1459 bus_dmamap_t dmamap; /* DMA map for user data */
1461 #define SYM_DMA_NONE 0
1462 #define SYM_DMA_READ 1
1463 #define SYM_DMA_WRITE 2
1467 u32 ccb_ba; /* BUS address of this CCB */
1468 u_short tag; /* Tag for this transfer */
1469 /* NO_TAG means no tag */
1472 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1474 link_ccbq; /* Link to free/busy CCB queue */
1475 u32 startp; /* Initial data pointer */
1476 int ext_sg; /* Extreme data pointer, used */
1477 int ext_ofs; /* to calculate the residual. */
1478 u_char to_abort; /* Want this IO to be aborted */
1481 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1484 * Host Control Block
1489 * Due to poorness of addressing capabilities, earlier
1490 * chips (810, 815, 825) copy part of the data structures
1491 * (CCB, TCB and LCB) in fixed areas.
1493 #ifdef SYM_CONF_GENERIC_SUPPORT
1494 struct sym_ccbh ccb_head;
1495 struct sym_tcbh tcb_head;
1496 struct sym_lcbh lcb_head;
1499 * Idle task and invalid task actions and
1500 * their bus addresses.
1502 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1503 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1506 * Dummy lun table to protect us against target
1507 * returning bad lun number on reselection.
1509 u32 *badluntbl; /* Table physical address */
1510 u32 badlun_sa; /* SCRIPT handler BUS address */
1513 * Bus address of this host control block.
1518 * Bit 32-63 of the on-chip RAM bus address in LE format.
1519 * The START_RAM64 script loads the MMRS and MMWS from this
1525 * Chip and controller indentification.
1532 * Initial value of some IO register bits.
1533 * These values are assumed to have been set by BIOS, and may
1534 * be used to probe adapter implementation differences.
1536 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1537 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1541 * Actual initial value of IO register bits used by the
1542 * driver. They are loaded at initialisation according to
1543 * features that are to be enabled/disabled.
1545 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1546 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1551 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1554 * Target control block bus address array used by the SCRIPT
1561 * CAM SIM information for this instance.
1563 struct cam_sim *sim;
1564 struct cam_path *path;
1567 * Allocated hardware resources.
1569 struct resource *irq_res;
1570 struct resource *io_res;
1571 struct resource *mmio_res;
1572 struct resource *ram_res;
1579 * My understanding of PCI is that all agents must share the
1580 * same addressing range and model.
1581 * But some hardware architecture guys provide complex and
1582 * brain-deaded stuff that makes shit.
1583 * This driver only support PCI compliant implementations and
1584 * deals with part of the BUS stuff complexity only to fit O/S
1587 bus_space_handle_t io_bsh;
1588 bus_space_tag_t io_tag;
1589 bus_space_handle_t mmio_bsh;
1590 bus_space_tag_t mmio_tag;
1591 bus_space_handle_t ram_bsh;
1592 bus_space_tag_t ram_tag;
1597 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1598 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1600 * Virtual and physical bus addresses of the chip.
1602 vm_offset_t mmio_va; /* MMIO kernel virtual address */
1603 vm_offset_t mmio_pa; /* MMIO CPU physical address */
1604 vm_offset_t mmio_ba; /* MMIO BUS address */
1605 int mmio_ws; /* MMIO Window size */
1607 vm_offset_t ram_va; /* RAM kernel virtual address */
1608 vm_offset_t ram_pa; /* RAM CPU physical address */
1609 vm_offset_t ram_ba; /* RAM BUS address */
1610 int ram_ws; /* RAM window size */
1611 u32 io_port; /* IO port address */
1614 * SCRIPTS virtual and physical bus addresses.
1615 * 'script' is loaded in the on-chip RAM if present.
1616 * 'scripth' stays in main memory for all chips except the
1617 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1619 u_char *scripta0; /* Copies of script and scripth */
1620 u_char *scriptb0; /* Copies of script and scripth */
1621 vm_offset_t scripta_ba; /* Actual script and scripth */
1622 vm_offset_t scriptb_ba; /* bus addresses. */
1623 vm_offset_t scriptb0_ba;
1624 u_short scripta_sz; /* Actual size of script A */
1625 u_short scriptb_sz; /* Actual size of script B */
1628 * Bus addresses, setup and patch methods for
1629 * the selected firmware.
1631 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1632 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1633 void (*fw_setup)(hcb_p np, struct sym_fw *fw);
1634 void (*fw_patch)(hcb_p np);
1638 * General controller parameters and configuration.
1640 u_short device_id; /* PCI device id */
1641 u_char revision_id; /* PCI device revision id */
1642 u_int features; /* Chip features map */
1643 u_char myaddr; /* SCSI id of the adapter */
1644 u_char maxburst; /* log base 2 of dwords burst */
1645 u_char maxwide; /* Maximum transfer width */
1646 u_char minsync; /* Min sync period factor (ST) */
1647 u_char maxsync; /* Max sync period factor (ST) */
1648 u_char maxoffs; /* Max scsi offset (ST) */
1649 u_char minsync_dt; /* Min sync period factor (DT) */
1650 u_char maxsync_dt; /* Max sync period factor (DT) */
1651 u_char maxoffs_dt; /* Max scsi offset (DT) */
1652 u_char multiplier; /* Clock multiplier (1,2,4) */
1653 u_char clock_divn; /* Number of clock divisors */
1654 u32 clock_khz; /* SCSI clock frequency in KHz */
1655 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1657 * Start queue management.
1658 * It is filled up by the host processor and accessed by the
1659 * SCRIPTS processor in order to start SCSI commands.
1661 volatile /* Prevent code optimizations */
1662 u32 *squeue; /* Start queue virtual address */
1663 u32 squeue_ba; /* Start queue BUS address */
1664 u_short squeueput; /* Next free slot of the queue */
1665 u_short actccbs; /* Number of allocated CCBs */
1668 * Command completion queue.
1669 * It is the same size as the start queue to avoid overflow.
1671 u_short dqueueget; /* Next position to scan */
1672 volatile /* Prevent code optimizations */
1673 u32 *dqueue; /* Completion (done) queue */
1674 u32 dqueue_ba; /* Done queue BUS address */
1677 * Miscellaneous buffers accessed by the scripts-processor.
1678 * They shall be DWORD aligned, because they may be read or
1679 * written with a script command.
1681 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1682 u_char msgin [8]; /* Buffer for MESSAGE IN */
1683 u32 lastmsg; /* Last SCSI message sent */
1684 u_char scratch; /* Scratch for SCSI receive */
1687 * Miscellaneous configuration and status parameters.
1689 u_char usrflags; /* Miscellaneous user flags */
1690 u_char scsi_mode; /* Current SCSI BUS mode */
1691 u_char verbose; /* Verbosity for this controller*/
1692 u32 cache; /* Used for cache test at init. */
1695 * CCB lists and queue.
1697 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1698 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1699 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1702 * During error handling and/or recovery,
1703 * active CCBs that are to be completed with
1704 * error or requeued are moved from the busy_ccbq
1705 * to the comp_ccbq prior to completion.
1707 SYM_QUEHEAD comp_ccbq;
1710 * CAM CCB pending queue.
1712 SYM_QUEHEAD cam_ccbq;
1715 * IMMEDIATE ARBITRATION (IARB) control.
1717 * We keep track in 'last_cp' of the last CCB that has been
1718 * queued to the SCRIPTS processor and clear 'last_cp' when
1719 * this CCB completes. If last_cp is not zero at the moment
1720 * we queue a new CCB, we set a flag in 'last_cp' that is
1721 * used by the SCRIPTS as a hint for setting IARB.
1722 * We donnot set more than 'iarb_max' consecutive hints for
1723 * IARB in order to leave devices a chance to reselect.
1724 * By the way, any non zero value of 'iarb_max' is unfair. :)
1726 #ifdef SYM_CONF_IARB_SUPPORT
1727 u_short iarb_max; /* Max. # consecutive IARB hints*/
1728 u_short iarb_count; /* Actual # of these hints */
1733 * Command abort handling.
1734 * We need to synchronize tightly with the SCRIPTS
1735 * processor in order to handle things correctly.
1737 u_char abrt_msg[4]; /* Message to send buffer */
1738 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1739 struct sym_tblsel abrt_sel; /* Sync params for selection */
1740 u_char istat_sem; /* Tells the chip to stop (SEM) */
1743 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1746 * Return the name of the controller.
1748 static __inline char *sym_name(hcb_p np)
1750 return np->inst_name;
1753 /*--------------------------------------------------------------------------*/
1754 /*------------------------------ FIRMWARES ---------------------------------*/
1755 /*--------------------------------------------------------------------------*/
1758 * This stuff will be moved to a separate source file when
1759 * the driver will be broken into several source modules.
1763 * Macros used for all firmwares.
1765 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1766 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1767 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1768 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1771 #ifdef SYM_CONF_GENERIC_SUPPORT
1773 * Allocate firmware #1 script area.
1775 #define SYM_FWA_SCR sym_fw1a_scr
1776 #define SYM_FWB_SCR sym_fw1b_scr
1777 #include <dev/sym/sym_fw1.h>
1778 struct sym_fwa_ofs sym_fw1a_ofs = {
1779 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1781 struct sym_fwb_ofs sym_fw1b_ofs = {
1782 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1786 #endif /* SYM_CONF_GENERIC_SUPPORT */
1789 * Allocate firmware #2 script area.
1791 #define SYM_FWA_SCR sym_fw2a_scr
1792 #define SYM_FWB_SCR sym_fw2b_scr
1793 #include <dev/sym/sym_fw2.h>
1794 struct sym_fwa_ofs sym_fw2a_ofs = {
1795 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1797 struct sym_fwb_ofs sym_fw2b_ofs = {
1798 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1799 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1800 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1810 #ifdef SYM_CONF_GENERIC_SUPPORT
1812 * Patch routine for firmware #1.
1815 sym_fw1_patch(hcb_p np)
1817 struct sym_fw1a_scr *scripta0;
1818 struct sym_fw1b_scr *scriptb0;
1820 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1821 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1824 * Remove LED support if not needed.
1826 if (!(np->features & FE_LED0)) {
1827 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1828 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1829 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1832 #ifdef SYM_CONF_IARB_SUPPORT
1834 * If user does not want to use IMMEDIATE ARBITRATION
1835 * when we are reselected while attempting to arbitrate,
1836 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1838 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1839 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1842 * Patch some data in SCRIPTS.
1843 * - start and done queue initial bus address.
1844 * - target bus address table bus address.
1846 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1847 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1848 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1850 #endif /* SYM_CONF_GENERIC_SUPPORT */
1853 * Patch routine for firmware #2.
1856 sym_fw2_patch(hcb_p np)
1858 struct sym_fw2a_scr *scripta0;
1859 struct sym_fw2b_scr *scriptb0;
1861 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1862 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1865 * Remove LED support if not needed.
1867 if (!(np->features & FE_LED0)) {
1868 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1869 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1870 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1873 #ifdef SYM_CONF_IARB_SUPPORT
1875 * If user does not want to use IMMEDIATE ARBITRATION
1876 * when we are reselected while attempting to arbitrate,
1877 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1879 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1880 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1883 * Patch some variable in SCRIPTS.
1884 * - start and done queue initial bus address.
1885 * - target bus address table bus address.
1887 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1888 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1889 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1892 * Remove the load of SCNTL4 on reselection if not a C10.
1894 if (!(np->features & FE_C10)) {
1895 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1896 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1900 * Remove a couple of work-arounds specific to C1010 if
1901 * they are not desirable. See `sym_fw2.h' for more details.
1903 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1904 np->revision_id < 0x1 &&
1905 np->pciclk_khz < 60000)) {
1906 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1907 scripta0->datao_phase[1] = cpu_to_scr(0);
1909 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1910 /* np->revision_id < 0xff */ 1)) {
1911 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1912 scripta0->sel_done[1] = cpu_to_scr(0);
1916 * Patch some other variables in SCRIPTS.
1917 * These ones are loaded by the SCRIPTS processor.
1919 scriptb0->pm0_data_addr[0] =
1920 cpu_to_scr(np->scripta_ba +
1921 offsetof(struct sym_fw2a_scr, pm0_data));
1922 scriptb0->pm1_data_addr[0] =
1923 cpu_to_scr(np->scripta_ba +
1924 offsetof(struct sym_fw2a_scr, pm1_data));
1928 * Fill the data area in scripts.
1929 * To be done for all firmwares.
1932 sym_fw_fill_data (u32 *in, u32 *out)
1936 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1937 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1938 *in++ = offsetof (struct sym_dsb, data[i]);
1939 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1940 *out++ = offsetof (struct sym_dsb, data[i]);
1945 * Setup useful script bus addresses.
1946 * To be done for all firmwares.
1949 sym_fw_setup_bus_addresses(hcb_p np, struct sym_fw *fw)
1956 * Build the bus address table for script A
1957 * from the script A offset table.
1959 po = (u_short *) fw->a_ofs;
1960 pa = (u32 *) &np->fwa_bas;
1961 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1962 pa[i] = np->scripta_ba + po[i];
1965 * Same for script B.
1967 po = (u_short *) fw->b_ofs;
1968 pa = (u32 *) &np->fwb_bas;
1969 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1970 pa[i] = np->scriptb_ba + po[i];
1973 #ifdef SYM_CONF_GENERIC_SUPPORT
1975 * Setup routine for firmware #1.
1978 sym_fw1_setup(hcb_p np, struct sym_fw *fw)
1980 struct sym_fw1a_scr *scripta0;
1981 struct sym_fw1b_scr *scriptb0;
1983 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1984 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1987 * Fill variable parts in scripts.
1989 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1992 * Setup bus addresses used from the C code..
1994 sym_fw_setup_bus_addresses(np, fw);
1996 #endif /* SYM_CONF_GENERIC_SUPPORT */
1999 * Setup routine for firmware #2.
2002 sym_fw2_setup(hcb_p np, struct sym_fw *fw)
2004 struct sym_fw2a_scr *scripta0;
2005 struct sym_fw2b_scr *scriptb0;
2007 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2008 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2011 * Fill variable parts in scripts.
2013 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2016 * Setup bus addresses used from the C code..
2018 sym_fw_setup_bus_addresses(np, fw);
2022 * Allocate firmware descriptors.
2024 #ifdef SYM_CONF_GENERIC_SUPPORT
2025 static struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2026 #endif /* SYM_CONF_GENERIC_SUPPORT */
2027 static struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2030 * Find the most appropriate firmware for a chip.
2032 static struct sym_fw *
2033 sym_find_firmware(struct sym_pci_chip *chip)
2035 if (chip->features & FE_LDSTR)
2037 #ifdef SYM_CONF_GENERIC_SUPPORT
2038 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2046 * Bind a script to physical addresses.
2048 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2050 u32 opcode, new, old, tmp1, tmp2;
2055 end = start + len/4;
2062 * If we forget to change the length
2063 * in scripts, a field will be
2064 * padded with 0. This is an illegal
2068 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2069 sym_name(np), (int) (cur-start));
2076 * We use the bogus value 0xf00ff00f ;-)
2077 * to reserve data area in SCRIPTS.
2079 if (opcode == SCR_DATA_ZERO) {
2084 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2085 printf ("%d: <%x>\n", (int) (cur-start),
2089 * We don't have to decode ALL commands
2091 switch (opcode >> 28) {
2094 * LOAD / STORE DSA relative, don't relocate.
2100 * LOAD / STORE absolute.
2106 * COPY has TWO arguments.
2111 if ((tmp1 ^ tmp2) & 3) {
2112 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2113 sym_name(np), (int) (cur-start));
2117 * If PREFETCH feature not enabled, remove
2118 * the NO FLUSH bit if present.
2120 if ((opcode & SCR_NO_FLUSH) &&
2121 !(np->features & FE_PFEN)) {
2122 opcode = (opcode & ~SCR_NO_FLUSH);
2127 * MOVE/CHMOV (absolute address)
2129 if (!(np->features & FE_WIDE))
2130 opcode = (opcode | OPC_MOVE);
2135 * MOVE/CHMOV (table indirect)
2137 if (!(np->features & FE_WIDE))
2138 opcode = (opcode | OPC_MOVE);
2144 * dont't relocate if relative :-)
2146 if (opcode & 0x00800000)
2148 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2165 * Scriptify:) the opcode.
2167 *cur++ = cpu_to_scr(opcode);
2170 * If no relocation, assume 1 argument
2171 * and just scriptize:) it.
2174 *cur = cpu_to_scr(*cur);
2180 * Otherwise performs all needed relocations.
2185 switch (old & RELOC_MASK) {
2186 case RELOC_REGISTER:
2187 new = (old & ~RELOC_MASK) + np->mmio_ba;
2190 new = (old & ~RELOC_MASK) + np->scripta_ba;
2193 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2196 new = (old & ~RELOC_MASK) + np->hcb_ba;
2200 * Don't relocate a 0 address.
2201 * They are mostly used for patched or
2202 * script self-modified areas.
2211 panic("sym_fw_bind_script: "
2212 "weird relocation %x\n", old);
2216 *cur++ = cpu_to_scr(new);
2221 /*--------------------------------------------------------------------------*/
2222 /*--------------------------- END OF FIRMARES -----------------------------*/
2223 /*--------------------------------------------------------------------------*/
2226 * Function prototypes.
2228 static void sym_save_initial_setting (hcb_p np);
2229 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2230 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2231 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2232 static void sym_chip_reset (hcb_p np);
2233 static void sym_soft_reset (hcb_p np);
2234 static void sym_start_reset (hcb_p np);
2235 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2236 static int sym_wakeup_done (hcb_p np);
2237 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2238 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2239 static void sym_init (hcb_p np, int reason);
2240 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2242 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2243 u_char div, u_char fak);
2244 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2245 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2246 u_char per, u_char wide, u_char div, u_char fak);
2247 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2248 u_char per, u_char wide, u_char div, u_char fak);
2249 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2250 static void sym_intr (void *arg);
2251 static void sym_poll (struct cam_sim *sim);
2252 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2253 static void sym_int_sto (hcb_p np);
2254 static void sym_int_udc (hcb_p np);
2255 static void sym_int_sbmc (hcb_p np);
2256 static void sym_int_par (hcb_p np, u_short sist);
2257 static void sym_int_ma (hcb_p np);
2258 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2260 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2261 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2262 static void sym_sir_task_recovery (hcb_p np, int num);
2263 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2264 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2265 static int sym_compute_residual (hcb_p np, ccb_p cp);
2266 static int sym_show_msg (u_char * msg);
2267 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2268 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2269 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2270 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2271 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2272 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2273 static void sym_int_sir (hcb_p np);
2274 static void sym_free_ccb (hcb_p np, ccb_p cp);
2275 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2276 static ccb_p sym_alloc_ccb (hcb_p np);
2277 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2278 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2279 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2280 static int sym_snooptest (hcb_p np);
2281 static void sym_selectclock(hcb_p np, u_char scntl3);
2282 static void sym_getclock (hcb_p np, int mult);
2283 static int sym_getpciclock (hcb_p np);
2284 static void sym_complete_ok (hcb_p np, ccb_p cp);
2285 static void sym_complete_error (hcb_p np, ccb_p cp);
2286 static void sym_timeout (void *arg);
2287 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2288 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2289 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2290 static void sym_action1 (struct cam_sim *sim, union ccb *ccb);
2291 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2292 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2294 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2295 bus_dma_segment_t *psegs, int nsegs);
2296 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2297 bus_dma_segment_t *psegs, int nsegs);
2298 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2299 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2300 struct ccb_trans_settings *cts);
2301 static void sym_update_dflags(hcb_p np, u_char *flags,
2302 struct ccb_trans_settings *cts);
2304 static struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2305 static int sym_pci_probe (device_t dev);
2306 static int sym_pci_attach (device_t dev);
2308 static void sym_pci_free (hcb_p np);
2309 static int sym_cam_attach (hcb_p np);
2310 static void sym_cam_free (hcb_p np);
2312 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2313 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2314 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2317 * Print something which allows to retrieve the controler type,
2318 * unit, target, lun concerned by a kernel message.
2320 static void PRINT_TARGET (hcb_p np, int target)
2322 printf ("%s:%d:", sym_name(np), target);
2325 static void PRINT_LUN(hcb_p np, int target, int lun)
2327 printf ("%s:%d:%d:", sym_name(np), target, lun);
2330 static void PRINT_ADDR (ccb_p cp)
2332 if (cp && cp->cam_ccb)
2333 xpt_print_path(cp->cam_ccb->ccb_h.path);
2337 * Take into account this ccb in the freeze count.
2339 static void sym_freeze_cam_ccb(union ccb *ccb)
2341 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2342 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2343 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2344 xpt_freeze_devq(ccb->ccb_h.path, 1);
2350 * Set the status field of a CAM CCB.
2352 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2354 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2355 ccb->ccb_h.status |= status;
2359 * Get the status field of a CAM CCB.
2361 static __inline int sym_get_cam_status(union ccb *ccb)
2363 return ccb->ccb_h.status & CAM_STATUS_MASK;
2367 * Enqueue a CAM CCB.
2369 static void sym_enqueue_cam_ccb(hcb_p np, union ccb *ccb)
2371 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2372 ccb->ccb_h.status = CAM_REQ_INPROG;
2374 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb,
2375 ccb->ccb_h.timeout*hz/1000);
2376 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2377 ccb->ccb_h.sym_hcb_ptr = np;
2379 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2383 * Complete a pending CAM CCB.
2385 static void sym_xpt_done(hcb_p np, union ccb *ccb)
2387 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2388 untimeout(sym_timeout, (caddr_t) ccb, ccb->ccb_h.timeout_ch);
2389 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2390 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2391 ccb->ccb_h.sym_hcb_ptr = 0;
2393 if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2394 sym_freeze_cam_ccb(ccb);
2398 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2400 sym_set_cam_status(ccb, cam_status);
2401 sym_xpt_done(np, ccb);
2405 * SYMBIOS chip clock divisor table.
2407 * Divisors are multiplied by 10,000,000 in order to make
2408 * calculations more simple.
2411 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2414 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2415 * 128 transfers. All chips support at least 16 transfers
2416 * bursts. The 825A, 875 and 895 chips support bursts of up
2417 * to 128 transfers and the 895A and 896 support bursts of up
2418 * to 64 transfers. All other chips support up to 16
2421 * For PCI 32 bit data transfers each transfer is a DWORD.
2422 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2424 * We use log base 2 (burst length) as internal code, with
2425 * value 0 meaning "burst disabled".
2429 * Burst length from burst code.
2431 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2434 * Burst code from io register bits.
2436 #define burst_code(dmode, ctest4, ctest5) \
2437 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2440 * Set initial io register bits from burst code.
2442 static __inline void sym_init_burst(hcb_p np, u_char bc)
2444 np->rv_ctest4 &= ~0x80;
2445 np->rv_dmode &= ~(0x3 << 6);
2446 np->rv_ctest5 &= ~0x4;
2449 np->rv_ctest4 |= 0x80;
2453 np->rv_dmode |= ((bc & 0x3) << 6);
2454 np->rv_ctest5 |= (bc & 0x4);
2460 * Print out the list of targets that have some flag disabled by user.
2462 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2467 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2468 if (i == np->myaddr)
2470 if (np->target[i].usrflags & mask) {
2472 printf("%s: %s disabled for targets",
2482 * Save initial settings of some IO registers.
2483 * Assumed to have been set by BIOS.
2484 * We cannot reset the chip prior to reading the
2485 * IO registers, since informations will be lost.
2486 * Since the SCRIPTS processor may be running, this
2487 * is not safe on paper, but it seems to work quite
2490 static void sym_save_initial_setting (hcb_p np)
2492 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2493 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2494 np->sv_dmode = INB(nc_dmode) & 0xce;
2495 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2496 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2497 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2498 np->sv_gpcntl = INB(nc_gpcntl);
2499 np->sv_stest1 = INB(nc_stest1);
2500 np->sv_stest2 = INB(nc_stest2) & 0x20;
2501 np->sv_stest4 = INB(nc_stest4);
2502 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2503 np->sv_scntl4 = INB(nc_scntl4);
2504 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2507 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2511 * Prepare io register values used by sym_init() according
2512 * to selected and supported features.
2514 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2523 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2526 * Get the frequency of the chip's clock.
2528 if (np->features & FE_QUAD)
2530 else if (np->features & FE_DBLR)
2535 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2536 np->clock_khz *= np->multiplier;
2538 if (np->clock_khz != 40000)
2539 sym_getclock(np, np->multiplier);
2542 * Divisor to be used for async (timer pre-scaler).
2544 i = np->clock_divn - 1;
2546 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2551 np->rv_scntl3 = i+1;
2554 * The C1010 uses hardwired divisors for async.
2555 * So, we just throw away, the async. divisor.:-)
2557 if (np->features & FE_C10)
2561 * Minimum synchronous period factor supported by the chip.
2562 * Btw, 'period' is in tenths of nanoseconds.
2564 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2565 if (period <= 250) np->minsync = 10;
2566 else if (period <= 303) np->minsync = 11;
2567 else if (period <= 500) np->minsync = 12;
2568 else np->minsync = (period + 40 - 1) / 40;
2571 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2573 if (np->minsync < 25 &&
2574 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2576 else if (np->minsync < 12 &&
2577 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2581 * Maximum synchronous period factor supported by the chip.
2583 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2584 np->maxsync = period > 2540 ? 254 : period / 10;
2587 * If chip is a C1010, guess the sync limits in DT mode.
2589 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2590 if (np->clock_khz == 160000) {
2592 np->maxsync_dt = 50;
2593 np->maxoffs_dt = 62;
2598 * 64 bit addressing (895A/896/1010) ?
2600 if (np->features & FE_DAC)
2602 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2604 np->rv_ccntl1 |= (DDAC);
2608 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2610 if (np->features & FE_NOPM)
2611 np->rv_ccntl0 |= (ENPMJ);
2615 * In dual channel mode, contention occurs if internal cycles
2616 * are used. Disable internal cycles.
2618 if (np->device_id == PCI_ID_LSI53C1010 &&
2619 np->revision_id < 0x2)
2620 np->rv_ccntl0 |= DILS;
2623 * Select burst length (dwords)
2625 burst_max = SYM_SETUP_BURST_ORDER;
2626 if (burst_max == 255)
2627 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2631 if (burst_max > np->maxburst)
2632 burst_max = np->maxburst;
2635 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2636 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2637 * based transactions on LOAD/STORE instructions. So we have
2638 * to prevent these chips from using such PCI transactions in
2639 * this driver. The generic ncr driver that does not use
2640 * LOAD/STORE instructions does not need this work-around.
2642 if ((np->device_id == PCI_ID_SYM53C810 &&
2643 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2644 (np->device_id == PCI_ID_SYM53C860 &&
2645 np->revision_id <= 0x1))
2646 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2649 * Select all supported special features.
2650 * If we are using on-board RAM for scripts, prefetch (PFEN)
2651 * does not help, but burst op fetch (BOF) does.
2652 * Disabling PFEN makes sure BOF will be used.
2654 if (np->features & FE_ERL)
2655 np->rv_dmode |= ERL; /* Enable Read Line */
2656 if (np->features & FE_BOF)
2657 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2658 if (np->features & FE_ERMP)
2659 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2661 if ((np->features & FE_PFEN) && !np->ram_ba)
2663 if (np->features & FE_PFEN)
2665 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2666 if (np->features & FE_CLSE)
2667 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2668 if (np->features & FE_WRIE)
2669 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2670 if (np->features & FE_DFS)
2671 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2676 if (SYM_SETUP_PCI_PARITY)
2677 np->rv_ctest4 |= MPEE; /* Master parity checking */
2678 if (SYM_SETUP_SCSI_PARITY)
2679 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2682 * Get parity checking, host ID and verbose mode from NVRAM
2685 sym_nvram_setup_host (np, nvram);
2688 * Get SCSI addr of host adapter (set by bios?).
2690 if (np->myaddr == 255) {
2691 np->myaddr = INB(nc_scid) & 0x07;
2693 np->myaddr = SYM_SETUP_HOST_ID;
2697 * Prepare initial io register bits for burst length
2699 sym_init_burst(np, burst_max);
2702 * Set SCSI BUS mode.
2703 * - LVD capable chips (895/895A/896/1010) report the
2704 * current BUS mode through the STEST4 IO register.
2705 * - For previous generation chips (825/825A/875),
2706 * user has to tell us how to check against HVD,
2707 * since a 100% safe algorithm is not possible.
2709 np->scsi_mode = SMODE_SE;
2710 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2711 np->scsi_mode = (np->sv_stest4 & SMODE);
2712 else if (np->features & FE_DIFF) {
2713 if (SYM_SETUP_SCSI_DIFF == 1) {
2714 if (np->sv_scntl3) {
2715 if (np->sv_stest2 & 0x20)
2716 np->scsi_mode = SMODE_HVD;
2718 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2719 if (!(INB(nc_gpreg) & 0x08))
2720 np->scsi_mode = SMODE_HVD;
2723 else if (SYM_SETUP_SCSI_DIFF == 2)
2724 np->scsi_mode = SMODE_HVD;
2726 if (np->scsi_mode == SMODE_HVD)
2727 np->rv_stest2 |= 0x20;
2730 * Set LED support from SCRIPTS.
2731 * Ignore this feature for boards known to use a
2732 * specific GPIO wiring and for the 895A, 896
2733 * and 1010 that drive the LED directly.
2735 if ((SYM_SETUP_SCSI_LED ||
2736 (nvram->type == SYM_SYMBIOS_NVRAM ||
2737 (nvram->type == SYM_TEKRAM_NVRAM &&
2738 np->device_id == PCI_ID_SYM53C895))) &&
2739 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2740 np->features |= FE_LED0;
2745 switch(SYM_SETUP_IRQ_MODE & 3) {
2747 np->rv_dcntl |= IRQM;
2750 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2757 * Configure targets according to driver setup.
2758 * If NVRAM present get targets setup from NVRAM.
2760 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2761 tcb_p tp = &np->target[i];
2763 #ifdef FreeBSD_New_Tran_Settings
2764 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2765 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2767 tp->tinfo.user.period = np->minsync;
2768 tp->tinfo.user.offset = np->maxoffs;
2769 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2770 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2771 tp->usrtags = SYM_SETUP_MAX_TAG;
2773 sym_nvram_setup_target (np, i, nvram);
2776 * For now, guess PPR/DT support from the period
2779 if (np->features & FE_ULTRA3) {
2780 if (tp->tinfo.user.period <= 9 &&
2781 tp->tinfo.user.width == BUS_16_BIT) {
2782 tp->tinfo.user.options |= PPR_OPT_DT;
2783 tp->tinfo.user.offset = np->maxoffs_dt;
2784 #ifdef FreeBSD_New_Tran_Settings
2785 tp->tinfo.user.spi_version = 3;
2791 tp->usrflags &= ~SYM_TAGS_ENABLED;
2795 * Let user know about the settings.
2798 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2799 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2800 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2802 (np->features & FE_ULTRA3) ? 80 :
2803 (np->features & FE_ULTRA2) ? 40 :
2804 (np->features & FE_ULTRA) ? 20 : 10,
2805 sym_scsi_bus_mode(np->scsi_mode),
2806 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2808 * Tell him more on demand.
2811 printf("%s: %s IRQ line driver%s\n",
2813 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2814 np->ram_ba ? ", using on-chip SRAM" : "");
2815 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2816 if (np->features & FE_NOPM)
2817 printf("%s: handling phase mismatch from SCRIPTS.\n",
2823 if (sym_verbose > 1) {
2824 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2825 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2826 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2827 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2829 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2830 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2831 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2832 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2835 * Let user be aware of targets that have some disable flags set.
2837 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2839 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2846 * Prepare the next negotiation message if needed.
2848 * Fill in the part of message buffer that contains the
2849 * negotiation and the nego_status field of the CCB.
2850 * Returns the size of the message in bytes.
2853 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2855 tcb_p tp = &np->target[cp->target];
2859 * Early C1010 chips need a work-around for DT
2860 * data transfer to work.
2862 if (!(np->features & FE_U3EN))
2863 tp->tinfo.goal.options = 0;
2865 * negotiate using PPR ?
2867 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2870 * negotiate wide transfers ?
2872 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2875 * negotiate synchronous transfers?
2877 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2878 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2883 msgptr[msglen++] = M_EXTENDED;
2884 msgptr[msglen++] = 3;
2885 msgptr[msglen++] = M_X_SYNC_REQ;
2886 msgptr[msglen++] = tp->tinfo.goal.period;
2887 msgptr[msglen++] = tp->tinfo.goal.offset;
2890 msgptr[msglen++] = M_EXTENDED;
2891 msgptr[msglen++] = 2;
2892 msgptr[msglen++] = M_X_WIDE_REQ;
2893 msgptr[msglen++] = tp->tinfo.goal.width;
2896 msgptr[msglen++] = M_EXTENDED;
2897 msgptr[msglen++] = 6;
2898 msgptr[msglen++] = M_X_PPR_REQ;
2899 msgptr[msglen++] = tp->tinfo.goal.period;
2900 msgptr[msglen++] = 0;
2901 msgptr[msglen++] = tp->tinfo.goal.offset;
2902 msgptr[msglen++] = tp->tinfo.goal.width;
2903 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2907 cp->nego_status = nego;
2910 tp->nego_cp = cp; /* Keep track a nego will be performed */
2911 if (DEBUG_FLAGS & DEBUG_NEGO) {
2912 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2913 nego == NS_WIDE ? "wide msgout" :
2914 "ppr msgout", msgptr);
2922 * Insert a job into the start queue.
2924 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2928 #ifdef SYM_CONF_IARB_SUPPORT
2930 * If the previously queued CCB is not yet done,
2931 * set the IARB hint. The SCRIPTS will go with IARB
2932 * for this job when starting the previous one.
2933 * We leave devices a chance to win arbitration by
2934 * not using more than 'iarb_max' consecutive
2935 * immediate arbitrations.
2937 if (np->last_cp && np->iarb_count < np->iarb_max) {
2938 np->last_cp->host_flags |= HF_HINT_IARB;
2947 * Insert first the idle task and then our job.
2948 * The MB should ensure proper ordering.
2950 qidx = np->squeueput + 2;
2951 if (qidx >= MAX_QUEUE*2) qidx = 0;
2953 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2955 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2957 np->squeueput = qidx;
2959 if (DEBUG_FLAGS & DEBUG_QUEUE)
2960 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2963 * Script processor may be waiting for reselect.
2967 OUTB (nc_istat, SIGP|np->istat_sem);
2972 * Soft reset the chip.
2974 * Raising SRST when the chip is running may cause
2975 * problems on dual function chips (see below).
2976 * On the other hand, LVD devices need some delay
2977 * to settle and report actual BUS mode in STEST4.
2979 static void sym_chip_reset (hcb_p np)
2981 OUTB (nc_istat, SRST);
2984 UDELAY(2000); /* For BUS MODE to settle */
2988 * Soft reset the chip.
2990 * Some 896 and 876 chip revisions may hang-up if we set
2991 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2993 * So, we need to abort the current operation prior to
2994 * soft resetting the chip.
2996 static void sym_soft_reset (hcb_p np)
3001 OUTB (nc_istat, CABRT);
3002 for (i = 1000000 ; i ; --i) {
3003 istat = INB (nc_istat);
3015 printf("%s: unable to abort current chip operation.\n",
3017 sym_chip_reset (np);
3021 * Start reset process.
3023 * The interrupt handler will reinitialize the chip.
3025 static void sym_start_reset(hcb_p np)
3027 (void) sym_reset_scsi_bus(np, 1);
3030 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3035 sym_soft_reset(np); /* Soft reset the chip */
3037 OUTW (nc_sien, RST);
3039 * Enable Tolerant, reset IRQD if present and
3040 * properly set IRQ mode, prior to resetting the bus.
3042 OUTB (nc_stest3, TE);
3043 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3044 OUTB (nc_scntl1, CRST);
3047 if (!SYM_SETUP_SCSI_BUS_CHECK)
3050 * Check for no terminators or SCSI bus shorts to ground.
3051 * Read SCSI data bus, data parity bits and control signals.
3052 * We are expecting RESET to be TRUE and other signals to be
3055 term = INB(nc_sstat0);
3056 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3057 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3058 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3059 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3060 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3062 if (!(np->features & FE_WIDE))
3065 if (term != (2<<7)) {
3066 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3068 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3069 "0x%lx, expecting 0x%lx\n",
3071 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3072 (u_long)term, (u_long)(2<<7));
3073 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3077 OUTB (nc_scntl1, 0);
3083 * The chip may have completed jobs. Look at the DONE QUEUE.
3085 * On architectures that may reorder LOAD/STORE operations,
3086 * a memory barrier may be needed after the reading of the
3087 * so-called `flag' and prior to dealing with the data.
3089 static int sym_wakeup_done (hcb_p np)
3098 dsa = scr_to_cpu(np->dqueue[i]);
3102 if ((i = i+2) >= MAX_QUEUE*2)
3105 cp = sym_ccb_from_dsa(np, dsa);
3108 sym_complete_ok (np, cp);
3112 printf ("%s: bad DSA (%x) in done queue.\n",
3113 sym_name(np), (u_int) dsa);
3121 * Complete all active CCBs with error.
3122 * Used on CHIP/SCSI RESET.
3124 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3127 * Move all active CCBs to the COMP queue
3128 * and flush this queue.
3130 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3131 sym_que_init(&np->busy_ccbq);
3132 sym_flush_comp_queue(np, cam_status);
3139 * 0: initialisation.
3140 * 1: SCSI BUS RESET delivered or received.
3141 * 2: SCSI BUS MODE changed.
3143 static void sym_init (hcb_p np, int reason)
3149 * Reset chip if asked, otherwise just clear fifos.
3154 OUTB (nc_stest3, TE|CSF);
3155 OUTONB (nc_ctest3, CLF);
3161 phys = np->squeue_ba;
3162 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3163 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3164 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3166 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3169 * Start at first entry.
3176 phys = np->dqueue_ba;
3177 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3179 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3181 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3184 * Start at first entry.
3189 * Install patches in scripts.
3190 * This also let point to first position the start
3191 * and done queue pointers used from SCRIPTS.
3196 * Wakeup all pending jobs.
3198 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3203 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3204 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3206 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3207 /* full arb., ena parity, par->ATN */
3208 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3210 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3212 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3213 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3214 OUTB (nc_istat , SIGP ); /* Signal Process */
3215 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3216 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3218 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3219 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3220 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3222 /* Extended Sreq/Sack filtering not supported on the C10 */
3223 if (np->features & FE_C10)
3224 OUTB (nc_stest2, np->rv_stest2);
3226 OUTB (nc_stest2, EXT|np->rv_stest2);
3228 OUTB (nc_stest3, TE); /* TolerANT enable */
3229 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3232 * For now, disable AIP generation on C1010-66.
3234 if (np->device_id == PCI_ID_LSI53C1010_2)
3235 OUTB (nc_aipcntl1, DISAIP);
3239 * Errant SGE's when in narrow. Write bits 4 & 5 of
3240 * STEST1 register to disable SGE. We probably should do
3241 * that from SCRIPTS for each selection/reselection, but
3242 * I just don't want. :)
3244 if (np->device_id == PCI_ID_LSI53C1010 &&
3245 /* np->revision_id < 0xff */ 1)
3246 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3249 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3250 * Disable overlapped arbitration for some dual function devices,
3251 * regardless revision id (kind of post-chip-design feature. ;-))
3253 if (np->device_id == PCI_ID_SYM53C875)
3254 OUTB (nc_ctest0, (1<<5));
3255 else if (np->device_id == PCI_ID_SYM53C896)
3256 np->rv_ccntl0 |= DPR;
3259 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3260 * and/or hardware phase mismatch, since only such chips
3261 * seem to support those IO registers.
3263 if (np->features & (FE_DAC|FE_NOPM)) {
3264 OUTB (nc_ccntl0, np->rv_ccntl0);
3265 OUTB (nc_ccntl1, np->rv_ccntl1);
3269 * If phase mismatch handled by scripts (895A/896/1010),
3270 * set PM jump addresses.
3272 if (np->features & FE_NOPM) {
3273 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3274 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3278 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3279 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3281 if (np->features & FE_LED0)
3282 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3283 else if (np->features & FE_LEDC)
3284 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3289 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3290 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3293 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3294 * Try to eat the spurious SBMC interrupt that may occur when
3295 * we reset the chip but not the SCSI BUS (at initialization).
3297 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3298 OUTONW (nc_sien, SBMC);
3303 np->scsi_mode = INB (nc_stest4) & SMODE;
3307 * Fill in target structure.
3308 * Reinitialize usrsync.
3309 * Reinitialize usrwide.
3310 * Prepare sync negotiation according to actual SCSI bus mode.
3312 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3313 tcb_p tp = &np->target[i];
3317 tp->head.wval = np->rv_scntl3;
3320 tp->tinfo.current.period = 0;
3321 tp->tinfo.current.offset = 0;
3322 tp->tinfo.current.width = BUS_8_BIT;
3323 tp->tinfo.current.options = 0;
3327 * Download SCSI SCRIPTS to on-chip RAM if present,
3328 * and start script processor.
3331 if (sym_verbose > 1)
3332 printf ("%s: Downloading SCSI SCRIPTS.\n",
3334 if (np->ram_ws == 8192) {
3335 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3336 OUTL (nc_mmws, np->scr_ram_seg);
3337 OUTL (nc_mmrs, np->scr_ram_seg);
3338 OUTL (nc_sfs, np->scr_ram_seg);
3339 phys = SCRIPTB_BA (np, start64);
3342 phys = SCRIPTA_BA (np, init);
3343 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3346 phys = SCRIPTA_BA (np, init);
3350 OUTL (nc_dsa, np->hcb_ba);
3354 * Notify the XPT about the RESET condition.
3357 xpt_async(AC_BUS_RESET, np->path, NULL);
3361 * Get clock factor and sync divisor for a given
3362 * synchronous factor period.
3365 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3367 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3368 int div = np->clock_divn; /* Number of divisors supported */
3369 u32 fak; /* Sync factor in sxfer */
3370 u32 per; /* Period in tenths of ns */
3371 u32 kpc; /* (per * clk) */
3375 * Compute the synchronous period in tenths of nano-seconds
3377 if (dt && sfac <= 9) per = 125;
3378 else if (sfac <= 10) per = 250;
3379 else if (sfac == 11) per = 303;
3380 else if (sfac == 12) per = 500;
3381 else per = 40 * sfac;
3389 * For earliest C10 revision 0, we cannot use extra
3390 * clocks for the setting of the SCSI clocking.
3391 * Note that this limits the lowest sync data transfer
3392 * to 5 Mega-transfers per second and may result in
3393 * using higher clock divisors.
3396 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3398 * Look for the lowest clock divisor that allows an
3399 * output speed not faster than the period.
3403 if (kpc > (div_10M[div] << 2)) {
3408 fak = 0; /* No extra clocks */
3409 if (div == np->clock_divn) { /* Are we too fast ? */
3419 * Look for the greatest clock divisor that allows an
3420 * input speed faster than the period.
3423 if (kpc >= (div_10M[div] << 2)) break;
3426 * Calculate the lowest clock factor that allows an output
3427 * speed not faster than the period, and the max output speed.
3428 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3429 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3432 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3433 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3436 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3437 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3441 * Check against our hardware limits, or bugs :).
3443 if (fak < 0) {fak = 0; ret = -1;}
3444 if (fak > 2) {fak = 2; ret = -1;}
3447 * Compute and return sync parameters.
3456 * Tell the SCSI layer about the new transfer parameters.
3459 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3461 struct ccb_trans_settings cts;
3462 struct cam_path *path;
3464 tcb_p tp = &np->target[target];
3466 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3468 if (sts != CAM_REQ_CMP)
3471 bzero(&cts, sizeof(cts));
3473 #ifdef FreeBSD_New_Tran_Settings
3474 #define cts__scsi (cts.proto_specific.scsi)
3475 #define cts__spi (cts.xport_specific.spi)
3477 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3478 cts.protocol = PROTO_SCSI;
3479 cts.transport = XPORT_SPI;
3480 cts.protocol_version = tp->tinfo.current.scsi_version;
3481 cts.transport_version = tp->tinfo.current.spi_version;
3483 cts__spi.valid = spi_valid;
3484 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3485 cts__spi.sync_period = tp->tinfo.current.period;
3486 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3487 cts__spi.sync_offset = tp->tinfo.current.offset;
3488 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3489 cts__spi.bus_width = tp->tinfo.current.width;
3490 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3491 cts__spi.ppr_options = tp->tinfo.current.options;
3495 cts.valid = spi_valid;
3496 if (spi_valid & CCB_TRANS_SYNC_RATE_VALID)
3497 cts.sync_period = tp->tinfo.current.period;
3498 if (spi_valid & CCB_TRANS_SYNC_OFFSET_VALID)
3499 cts.sync_offset = tp->tinfo.current.offset;
3500 if (spi_valid & CCB_TRANS_BUS_WIDTH_VALID)
3501 cts.bus_width = tp->tinfo.current.width;
3503 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3504 xpt_async(AC_TRANSFER_NEG, path, &cts);
3505 xpt_free_path(path);
3508 #ifdef FreeBSD_New_Tran_Settings
3509 #define SYM_SPI_VALID_WDTR \
3510 CTS_SPI_VALID_BUS_WIDTH | \
3511 CTS_SPI_VALID_SYNC_RATE | \
3512 CTS_SPI_VALID_SYNC_OFFSET
3513 #define SYM_SPI_VALID_SDTR \
3514 CTS_SPI_VALID_SYNC_RATE | \
3515 CTS_SPI_VALID_SYNC_OFFSET
3516 #define SYM_SPI_VALID_PPR \
3517 CTS_SPI_VALID_PPR_OPTIONS | \
3518 CTS_SPI_VALID_BUS_WIDTH | \
3519 CTS_SPI_VALID_SYNC_RATE | \
3520 CTS_SPI_VALID_SYNC_OFFSET
3522 #define SYM_SPI_VALID_WDTR \
3523 CCB_TRANS_BUS_WIDTH_VALID | \
3524 CCB_TRANS_SYNC_RATE_VALID | \
3525 CCB_TRANS_SYNC_OFFSET_VALID
3526 #define SYM_SPI_VALID_SDTR \
3527 CCB_TRANS_SYNC_RATE_VALID | \
3528 CCB_TRANS_SYNC_OFFSET_VALID
3529 #define SYM_SPI_VALID_PPR \
3530 CCB_TRANS_BUS_WIDTH_VALID | \
3531 CCB_TRANS_SYNC_RATE_VALID | \
3532 CCB_TRANS_SYNC_OFFSET_VALID
3536 * We received a WDTR.
3537 * Let everything be aware of the changes.
3539 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3541 tcb_p tp = &np->target[cp->target];
3543 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3546 * Tell the SCSI layer about the new transfer parameters.
3548 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3549 tp->tinfo.current.offset = 0;
3550 tp->tinfo.current.period = 0;
3551 tp->tinfo.current.options = 0;
3553 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3557 * We received a SDTR.
3558 * Let everything be aware of the changes.
3561 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3563 tcb_p tp = &np->target[cp->target];
3564 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3566 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3569 * Tell the SCSI layer about the new transfer parameters.
3571 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3572 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3573 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3575 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3579 * We received a PPR.
3580 * Let everything be aware of the changes.
3582 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3583 u_char per, u_char wide, u_char div, u_char fak)
3585 tcb_p tp = &np->target[cp->target];
3587 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3590 * Tell the SCSI layer about the new transfer parameters.
3592 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3593 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3594 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3595 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3597 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3601 * Switch trans mode for current job and it's target.
3603 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3604 u_char per, u_char wide, u_char div, u_char fak)
3609 u_char target = INB (nc_sdid) & 0x0f;
3610 u_char sval, wval, uval;
3617 assert (target == (cp->target & 0xf));
3618 tp = &np->target[target];
3620 sval = tp->head.sval;
3621 wval = tp->head.wval;
3622 uval = tp->head.uval;
3625 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3626 sval, wval, uval, np->rv_scntl3);
3631 if (!(np->features & FE_C10))
3632 sval = (sval & ~0x1f) | ofs;
3634 sval = (sval & ~0x3f) | ofs;
3637 * Set the sync divisor and extra clock factor.
3640 wval = (wval & ~0x70) | ((div+1) << 4);
3641 if (!(np->features & FE_C10))
3642 sval = (sval & ~0xe0) | (fak << 5);
3644 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3645 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3646 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3651 * Set the bus width.
3658 * Set misc. ultra enable bits.
3660 if (np->features & FE_C10) {
3661 uval = uval & ~(U3EN|AIPCKEN);
3663 assert(np->features & FE_U3EN);
3668 wval = wval & ~ULTRA;
3669 if (per <= 12) wval |= ULTRA;
3673 * Stop there if sync parameters are unchanged.
3675 if (tp->head.sval == sval &&
3676 tp->head.wval == wval &&
3677 tp->head.uval == uval)
3679 tp->head.sval = sval;
3680 tp->head.wval = wval;
3681 tp->head.uval = uval;
3684 * Disable extended Sreq/Sack filtering if per < 50.
3685 * Not supported on the C1010.
3687 if (per < 50 && !(np->features & FE_C10))
3688 OUTOFFB (nc_stest2, EXT);
3691 * set actual value and sync_status
3693 OUTB (nc_sxfer, tp->head.sval);
3694 OUTB (nc_scntl3, tp->head.wval);
3696 if (np->features & FE_C10) {
3697 OUTB (nc_scntl4, tp->head.uval);
3701 * patch ALL busy ccbs of this target.
3703 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3704 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3705 if (cp->target != target)
3707 cp->phys.select.sel_scntl3 = tp->head.wval;
3708 cp->phys.select.sel_sxfer = tp->head.sval;
3709 if (np->features & FE_C10) {
3710 cp->phys.select.sel_scntl4 = tp->head.uval;
3716 * log message for real hard errors
3718 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3719 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3721 * exception register:
3726 * so: control lines as driven by chip.
3727 * si: control lines as seen by chip.
3728 * sd: scsi data lines as seen by chip.
3731 * sxfer: (see the manual)
3732 * scntl3: (see the manual)
3734 * current script command:
3735 * dsp: script address (relative to start of script).
3736 * dbc: first word of script command.
3738 * First 24 register of the chip:
3741 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3747 u_char *script_base;
3752 if (dsp > np->scripta_ba &&
3753 dsp <= np->scripta_ba + np->scripta_sz) {
3754 script_ofs = dsp - np->scripta_ba;
3755 script_size = np->scripta_sz;
3756 script_base = (u_char *) np->scripta0;
3757 script_name = "scripta";
3759 else if (np->scriptb_ba < dsp &&
3760 dsp <= np->scriptb_ba + np->scriptb_sz) {
3761 script_ofs = dsp - np->scriptb_ba;
3762 script_size = np->scriptb_sz;
3763 script_base = (u_char *) np->scriptb0;
3764 script_name = "scriptb";
3769 script_name = "mem";
3772 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3773 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3774 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3775 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3776 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3777 (unsigned)INL (nc_dbc));
3779 if (((script_ofs & 3) == 0) &&
3780 (unsigned)script_ofs < script_size) {
3781 printf ("%s: script cmd = %08x\n", sym_name(np),
3782 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3785 printf ("%s: regdump:", sym_name(np));
3787 printf (" %02x", (unsigned)INB_OFF(i));
3791 * PCI BUS error, read the PCI ststus register.
3793 if (dstat & (MDPE|BF)) {
3795 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3796 if (pci_sts & 0xf900) {
3797 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3798 printf("%s: PCI STATUS = 0x%04x\n",
3799 sym_name(np), pci_sts & 0xf900);
3805 * chip interrupt handler
3807 * In normal situations, interrupt conditions occur one at
3808 * a time. But when something bad happens on the SCSI BUS,
3809 * the chip may raise several interrupt flags before
3810 * stopping and interrupting the CPU. The additionnal
3811 * interrupt flags are stacked in some extra registers
3812 * after the SIP and/or DIP flag has been raised in the
3813 * ISTAT. After the CPU has read the interrupt condition
3814 * flag from SIST or DSTAT, the chip unstacks the other
3815 * interrupt flags and sets the corresponding bits in
3816 * SIST or DSTAT. Since the chip starts stacking once the
3817 * SIP or DIP flag is set, there is a small window of time
3818 * where the stacking does not occur.
3820 * Typically, multiple interrupt conditions may happen in
3821 * the following situations:
3823 * - SCSI parity error + Phase mismatch (PAR|MA)
3824 * When a parity error is detected in input phase
3825 * and the device switches to msg-in phase inside a
3827 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3828 * When a stupid device does not want to handle the
3829 * recovery of an SCSI parity error.
3830 * - Some combinations of STO, PAR, UDC, ...
3831 * When using non compliant SCSI stuff, when user is
3832 * doing non compliant hot tampering on the BUS, when
3833 * something really bad happens to a device, etc ...
3835 * The heuristic suggested by SYMBIOS to handle
3836 * multiple interrupts is to try unstacking all
3837 * interrupts conditions and to handle them on some
3838 * priority based on error severity.
3839 * This will work when the unstacking has been
3840 * successful, but we cannot be 100 % sure of that,
3841 * since the CPU may have been faster to unstack than
3842 * the chip is able to stack. Hmmm ... But it seems that
3843 * such a situation is very unlikely to happen.
3845 * If this happen, for example STO caught by the CPU
3846 * then UDC happenning before the CPU have restarted
3847 * the SCRIPTS, the driver may wrongly complete the
3848 * same command on UDC, since the SCRIPTS didn't restart
3849 * and the DSA still points to the same command.
3850 * We avoid this situation by setting the DSA to an
3851 * invalid value when the CCB is completed and before
3852 * restarting the SCRIPTS.
3854 * Another issue is that we need some section of our
3855 * recovery procedures to be somehow uninterruptible but
3856 * the SCRIPTS processor does not provides such a
3857 * feature. For this reason, we handle recovery preferently
3858 * from the C code and check against some SCRIPTS critical
3859 * sections from the C code.
3861 * Hopefully, the interrupt handling of the driver is now
3862 * able to resist to weird BUS error conditions, but donnot
3863 * ask me for any guarantee that it will never fail. :-)
3864 * Use at your own decision and risk.
3867 static void sym_intr1 (hcb_p np)
3869 u_char istat, istatc;
3874 * interrupt on the fly ?
3876 * A `dummy read' is needed to ensure that the
3877 * clear of the INTF flag reaches the device
3878 * before the scanning of the DONE queue.
3880 istat = INB (nc_istat);
3882 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3883 istat = INB (nc_istat); /* DUMMY READ */
3884 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3885 (void)sym_wakeup_done (np);
3888 if (!(istat & (SIP|DIP)))
3891 #if 0 /* We should never get this one */
3893 OUTB (nc_istat, CABRT);
3897 * PAR and MA interrupts may occur at the same time,
3898 * and we need to know of both in order to handle
3899 * this situation properly. We try to unstack SCSI
3900 * interrupts for that reason. BTW, I dislike a LOT
3901 * such a loop inside the interrupt routine.
3902 * Even if DMA interrupt stacking is very unlikely to
3903 * happen, we also try unstacking these ones, since
3904 * this has no performance impact.
3911 sist |= INW (nc_sist);
3913 dstat |= INB (nc_dstat);
3914 istatc = INB (nc_istat);
3916 } while (istatc & (SIP|DIP));
3918 if (DEBUG_FLAGS & DEBUG_TINY)
3919 printf ("<%d|%x:%x|%x:%x>",
3922 (unsigned)INL(nc_dsp),
3923 (unsigned)INL(nc_dbc));
3925 * On paper, a memory barrier may be needed here.
3926 * And since we are paranoid ... :)
3931 * First, interrupts we want to service cleanly.
3933 * Phase mismatch (MA) is the most frequent interrupt
3934 * for chip earlier than the 896 and so we have to service
3935 * it as quickly as possible.
3936 * A SCSI parity error (PAR) may be combined with a phase
3937 * mismatch condition (MA).
3938 * Programmed interrupts (SIR) are used to call the C code
3940 * The single step interrupt (SSI) is not used in this
3943 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3944 !(dstat & (MDPE|BF|ABRT|IID))) {
3945 if (sist & PAR) sym_int_par (np, sist);
3946 else if (sist & MA) sym_int_ma (np);
3947 else if (dstat & SIR) sym_int_sir (np);
3948 else if (dstat & SSI) OUTONB_STD ();
3949 else goto unknown_int;
3954 * Now, interrupts that donnot happen in normal
3955 * situations and that we may need to recover from.
3957 * On SCSI RESET (RST), we reset everything.
3958 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3959 * active CCBs with RESET status, prepare all devices
3960 * for negotiating again and restart the SCRIPTS.
3961 * On STO and UDC, we complete the CCB with the corres-
3962 * ponding status and restart the SCRIPTS.
3965 xpt_print_path(np->path);
3966 printf("SCSI BUS reset detected.\n");
3971 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3972 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3974 if (!(sist & (GEN|HTH|SGE)) &&
3975 !(dstat & (MDPE|BF|ABRT|IID))) {
3976 if (sist & SBMC) sym_int_sbmc (np);
3977 else if (sist & STO) sym_int_sto (np);
3978 else if (sist & UDC) sym_int_udc (np);
3979 else goto unknown_int;
3984 * Now, interrupts we are not able to recover cleanly.
3986 * Log message for hard errors.
3990 sym_log_hard_error(np, sist, dstat);
3992 if ((sist & (GEN|HTH|SGE)) ||
3993 (dstat & (MDPE|BF|ABRT|IID))) {
3994 sym_start_reset(np);
4000 * We just miss the cause of the interrupt. :(
4001 * Print a message. The timeout will do the real work.
4003 printf( "%s: unknown interrupt(s) ignored, "
4004 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
4005 sym_name(np), istat, dstat, sist);
4008 static void sym_intr(void *arg)
4010 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
4011 sym_intr1((hcb_p) arg);
4012 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
4016 static void sym_poll(struct cam_sim *sim)
4019 sym_intr(cam_sim_softc(sim));
4025 * generic recovery from scsi interrupt
4027 * The doc says that when the chip gets an SCSI interrupt,
4028 * it tries to stop in an orderly fashion, by completing
4029 * an instruction fetch that had started or by flushing
4030 * the DMA fifo for a write to memory that was executing.
4031 * Such a fashion is not enough to know if the instruction
4032 * that was just before the current DSP value has been
4035 * There are some small SCRIPTS sections that deal with
4036 * the start queue and the done queue that may break any
4037 * assomption from the C code if we are interrupted
4038 * inside, so we reset if this happens. Btw, since these
4039 * SCRIPTS sections are executed while the SCRIPTS hasn't
4040 * started SCSI operations, it is very unlikely to happen.
4042 * All the driver data structures are supposed to be
4043 * allocated from the same 4 GB memory window, so there
4044 * is a 1 to 1 relationship between DSA and driver data
4045 * structures. Since we are careful :) to invalidate the
4046 * DSA when we complete a command or when the SCRIPTS
4047 * pushes a DSA into a queue, we can trust it when it
4050 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4052 u32 dsp = INL (nc_dsp);
4053 u32 dsa = INL (nc_dsa);
4054 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4057 * If we haven't been interrupted inside the SCRIPTS
4058 * critical pathes, we can safely restart the SCRIPTS
4059 * and trust the DSA value if it matches a CCB.
4061 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4062 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4063 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4064 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4065 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4066 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4067 (!(dsp > SCRIPTA_BA (np, done) &&
4068 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4069 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4070 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4072 * If we have a CCB, let the SCRIPTS call us back for
4073 * the handling of the error with SCRATCHA filled with
4074 * STARTPOS. This way, we will be able to freeze the
4075 * device queue and requeue awaiting IOs.
4078 cp->host_status = hsts;
4079 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4082 * Otherwise just restart the SCRIPTS.
4085 OUTL (nc_dsa, 0xffffff);
4086 OUTL_DSP (SCRIPTA_BA (np, start));
4095 sym_start_reset(np);
4099 * chip exception handler for selection timeout
4101 static void sym_int_sto (hcb_p np)
4103 u32 dsp = INL (nc_dsp);
4105 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4107 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4108 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4110 sym_start_reset(np);
4114 * chip exception handler for unexpected disconnect
4116 static void sym_int_udc (hcb_p np)
4118 printf ("%s: unexpected disconnect\n", sym_name(np));
4119 sym_recover_scsi_int(np, HS_UNEXPECTED);
4123 * chip exception handler for SCSI bus mode change
4125 * spi2-r12 11.2.3 says a transceiver mode change must
4126 * generate a reset event and a device that detects a reset
4127 * event shall initiate a hard reset. It says also that a
4128 * device that detects a mode change shall set data transfer
4129 * mode to eight bit asynchronous, etc...
4130 * So, just reinitializing all except chip should be enough.
4132 static void sym_int_sbmc (hcb_p np)
4134 u_char scsi_mode = INB (nc_stest4) & SMODE;
4139 xpt_print_path(np->path);
4140 printf("SCSI BUS mode change from %s to %s.\n",
4141 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4144 * Should suspend command processing for a few seconds and
4145 * reinitialize all except the chip.
4151 * chip exception handler for SCSI parity error.
4153 * When the chip detects a SCSI parity error and is
4154 * currently executing a (CH)MOV instruction, it does
4155 * not interrupt immediately, but tries to finish the
4156 * transfer of the current scatter entry before
4157 * interrupting. The following situations may occur:
4159 * - The complete scatter entry has been transferred
4160 * without the device having changed phase.
4161 * The chip will then interrupt with the DSP pointing
4162 * to the instruction that follows the MOV.
4164 * - A phase mismatch occurs before the MOV finished
4165 * and phase errors are to be handled by the C code.
4166 * The chip will then interrupt with both PAR and MA
4169 * - A phase mismatch occurs before the MOV finished and
4170 * phase errors are to be handled by SCRIPTS.
4171 * The chip will load the DSP with the phase mismatch
4172 * JUMP address and interrupt the host processor.
4174 static void sym_int_par (hcb_p np, u_short sist)
4176 u_char hsts = INB (HS_PRT);
4177 u32 dsp = INL (nc_dsp);
4178 u32 dbc = INL (nc_dbc);
4179 u32 dsa = INL (nc_dsa);
4180 u_char sbcl = INB (nc_sbcl);
4181 u_char cmd = dbc >> 24;
4182 int phase = cmd & 7;
4183 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4185 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4186 sym_name(np), hsts, dbc, sbcl);
4189 * Check that the chip is connected to the SCSI BUS.
4191 if (!(INB (nc_scntl1) & ISCON)) {
4192 sym_recover_scsi_int(np, HS_UNEXPECTED);
4197 * If the nexus is not clearly identified, reset the bus.
4198 * We will try to do better later.
4204 * Check instruction was a MOV, direction was INPUT and
4207 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4211 * Keep track of the parity error.
4213 OUTONB (HF_PRT, HF_EXT_ERR);
4214 cp->xerr_status |= XE_PARITY_ERR;
4217 * Prepare the message to send to the device.
4219 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4222 * If the old phase was DATA IN phase, we have to deal with
4223 * the 3 situations described above.
4224 * For other input phases (MSG IN and STATUS), the device
4225 * must resend the whole thing that failed parity checking
4226 * or signal error. So, jumping to dispatcher should be OK.
4228 if (phase == 1 || phase == 5) {
4229 /* Phase mismatch handled by SCRIPTS */
4230 if (dsp == SCRIPTB_BA (np, pm_handle))
4232 /* Phase mismatch handled by the C code */
4235 /* No phase mismatch occurred */
4237 OUTL (nc_temp, dsp);
4238 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4242 OUTL_DSP (SCRIPTA_BA (np, clrack));
4246 sym_start_reset(np);
4251 * chip exception handler for phase errors.
4253 * We have to construct a new transfer descriptor,
4254 * to transfer the rest of the current block.
4256 static void sym_int_ma (hcb_p np)
4269 u_char hflags, hflags0;
4278 rest = dbc & 0xffffff;
4282 * locate matching cp if any.
4284 cp = sym_ccb_from_dsa(np, dsa);
4287 * Donnot take into account dma fifo and various buffers in
4288 * INPUT phase since the chip flushes everything before
4289 * raising the MA interrupt for interrupted INPUT phases.
4290 * For DATA IN phase, we will check for the SWIDE later.
4292 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4295 if (np->features & FE_DFBC)
4296 delta = INW (nc_dfbc);
4301 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4303 dfifo = INL(nc_dfifo);
4306 * Calculate remaining bytes in DMA fifo.
4307 * (CTEST5 = dfifo >> 16)
4309 if (dfifo & (DFS << 16))
4310 delta = ((((dfifo >> 8) & 0x300) |
4311 (dfifo & 0xff)) - rest) & 0x3ff;
4313 delta = ((dfifo & 0xff) - rest) & 0x7f;
4317 * The data in the dma fifo has not been transfered to
4318 * the target -> add the amount to the rest
4319 * and clear the data.
4320 * Check the sstat2 register in case of wide transfer.
4323 ss0 = INB (nc_sstat0);
4324 if (ss0 & OLF) rest++;
4325 if (!(np->features & FE_C10))
4326 if (ss0 & ORF) rest++;
4327 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4328 ss2 = INB (nc_sstat2);
4329 if (ss2 & OLF1) rest++;
4330 if (!(np->features & FE_C10))
4331 if (ss2 & ORF1) rest++;
4337 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4338 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4342 * log the information
4344 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4345 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4346 (unsigned) rest, (unsigned) delta);
4349 * try to find the interrupted script command,
4350 * and the address at which to continue.
4354 if (dsp > np->scripta_ba &&
4355 dsp <= np->scripta_ba + np->scripta_sz) {
4356 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4359 else if (dsp > np->scriptb_ba &&
4360 dsp <= np->scriptb_ba + np->scriptb_sz) {
4361 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4366 * log the information
4368 if (DEBUG_FLAGS & DEBUG_PHASE) {
4369 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4370 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4374 printf ("%s: interrupted SCRIPT address not found.\n",
4380 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4386 * get old startaddress and old length.
4388 oadr = scr_to_cpu(vdsp[1]);
4390 if (cmd & 0x10) { /* Table indirect */
4391 tblp = (u32 *) ((char*) &cp->phys + oadr);
4392 olen = scr_to_cpu(tblp[0]);
4393 oadr = scr_to_cpu(tblp[1]);
4396 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4399 if (DEBUG_FLAGS & DEBUG_PHASE) {
4400 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4401 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4408 * check cmd against assumed interrupted script command.
4409 * If dt data phase, the MOVE instruction hasn't bit 4 of
4412 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4414 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4415 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4421 * if old phase not dataphase, leave here.
4425 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4426 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4427 (unsigned)oadr, (unsigned)rest);
4428 goto unexpected_phase;
4432 * Choose the correct PM save area.
4434 * Look at the PM_SAVE SCRIPT if you want to understand
4435 * this stuff. The equivalent code is implemented in
4436 * SCRIPTS for the 895A, 896 and 1010 that are able to
4437 * handle PM from the SCRIPTS processor.
4439 hflags0 = INB (HF_PRT);
4442 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4443 if (hflags & HF_IN_PM0)
4444 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4445 else if (hflags & HF_IN_PM1)
4446 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4448 if (hflags & HF_DP_SAVED)
4449 hflags ^= HF_ACT_PM;
4452 if (!(hflags & HF_ACT_PM)) {
4454 newcmd = SCRIPTA_BA (np, pm0_data);
4458 newcmd = SCRIPTA_BA (np, pm1_data);
4461 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4462 if (hflags != hflags0)
4463 OUTB (HF_PRT, hflags);
4466 * fillin the phase mismatch context
4468 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4469 pm->sg.size = cpu_to_scr(rest);
4470 pm->ret = cpu_to_scr(nxtdsp);
4473 * If we have a SWIDE,
4474 * - prepare the address to write the SWIDE from SCRIPTS,
4475 * - compute the SCRIPTS address to restart from,
4476 * - move current data pointer context by one byte.
4478 nxtdsp = SCRIPTA_BA (np, dispatch);
4479 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4480 (INB (nc_scntl2) & WSR)) {
4484 * Set up the table indirect for the MOVE
4485 * of the residual byte and adjust the data
4488 tmp = scr_to_cpu(pm->sg.addr);
4489 cp->phys.wresid.addr = cpu_to_scr(tmp);
4490 pm->sg.addr = cpu_to_scr(tmp + 1);
4491 tmp = scr_to_cpu(pm->sg.size);
4492 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4493 pm->sg.size = cpu_to_scr(tmp - 1);
4496 * If only the residual byte is to be moved,
4497 * no PM context is needed.
4499 if ((tmp&0xffffff) == 1)
4503 * Prepare the address of SCRIPTS that will
4504 * move the residual byte to memory.
4506 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4509 if (DEBUG_FLAGS & DEBUG_PHASE) {
4511 printf ("PM %x %x %x / %x %x %x.\n",
4512 hflags0, hflags, newcmd,
4513 (unsigned)scr_to_cpu(pm->sg.addr),
4514 (unsigned)scr_to_cpu(pm->sg.size),
4515 (unsigned)scr_to_cpu(pm->ret));
4519 * Restart the SCRIPTS processor.
4521 OUTL (nc_temp, newcmd);
4526 * Unexpected phase changes that occurs when the current phase
4527 * is not a DATA IN or DATA OUT phase are due to error conditions.
4528 * Such event may only happen when the SCRIPTS is using a
4529 * multibyte SCSI MOVE.
4531 * Phase change Some possible cause
4533 * COMMAND --> MSG IN SCSI parity error detected by target.
4534 * COMMAND --> STATUS Bad command or refused by target.
4535 * MSG OUT --> MSG IN Message rejected by target.
4536 * MSG OUT --> COMMAND Bogus target that discards extended
4537 * negotiation messages.
4539 * The code below does not care of the new phase and so
4540 * trusts the target. Why to annoy it ?
4541 * If the interrupted phase is COMMAND phase, we restart at
4543 * If a target does not get all the messages after selection,
4544 * the code assumes blindly that the target discards extended
4545 * messages and clears the negotiation status.
4546 * If the target does not want all our response to negotiation,
4547 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4548 * bloat for such a should_not_happen situation).
4549 * In all other situation, we reset the BUS.
4550 * Are these assumptions reasonnable ? (Wait and see ...)
4557 case 2: /* COMMAND phase */
4558 nxtdsp = SCRIPTA_BA (np, dispatch);
4561 case 3: /* STATUS phase */
4562 nxtdsp = SCRIPTA_BA (np, dispatch);
4565 case 6: /* MSG OUT phase */
4567 * If the device may want to use untagged when we want
4568 * tagged, we prepare an IDENTIFY without disc. granted,
4569 * since we will not be able to handle reselect.
4570 * Otherwise, we just don't care.
4572 if (dsp == SCRIPTA_BA (np, send_ident)) {
4573 if (cp->tag != NO_TAG && olen - rest <= 3) {
4574 cp->host_status = HS_BUSY;
4575 np->msgout[0] = M_IDENTIFY | cp->lun;
4576 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4579 nxtdsp = SCRIPTB_BA (np, ident_break);
4581 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4582 dsp == SCRIPTB_BA (np, send_sdtr) ||
4583 dsp == SCRIPTB_BA (np, send_ppr)) {
4584 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4588 case 7: /* MSG IN phase */
4589 nxtdsp = SCRIPTA_BA (np, clrack);
4600 sym_start_reset(np);
4604 * Dequeue from the START queue all CCBs that match
4605 * a given target/lun/task condition (-1 means all),
4606 * and move them from the BUSY queue to the COMP queue
4607 * with CAM_REQUEUE_REQ status condition.
4608 * This function is used during error handling/recovery.
4609 * It is called with SCRIPTS not running.
4612 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4618 * Make sure the starting index is within range.
4620 assert((i >= 0) && (i < 2*MAX_QUEUE));
4623 * Walk until end of START queue and dequeue every job
4624 * that matches the target/lun/task condition.
4627 while (i != np->squeueput) {
4628 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4630 #ifdef SYM_CONF_IARB_SUPPORT
4631 /* Forget hints for IARB, they may be no longer relevant */
4632 cp->host_flags &= ~HF_HINT_IARB;
4634 if ((target == -1 || cp->target == target) &&
4635 (lun == -1 || cp->lun == lun) &&
4636 (task == -1 || cp->tag == task)) {
4637 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4638 sym_remque(&cp->link_ccbq);
4639 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4643 np->squeue[j] = np->squeue[i];
4644 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4646 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4648 if (i != j) /* Copy back the idle task if needed */
4649 np->squeue[j] = np->squeue[i];
4650 np->squeueput = j; /* Update our current start queue pointer */
4656 * Complete all CCBs queued to the COMP queue.
4658 * These CCBs are assumed:
4659 * - Not to be referenced either by devices or
4660 * SCRIPTS-related queues and datas.
4661 * - To have to be completed with an error condition
4664 * The device queue freeze count is incremented
4665 * for each CCB that does not prevent this.
4666 * This function is called when all CCBs involved
4667 * in error handling/recovery have been reaped.
4670 sym_flush_comp_queue(hcb_p np, int cam_status)
4675 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
4677 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4678 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4679 /* Leave quiet CCBs waiting for resources */
4680 if (cp->host_status == HS_WAIT)
4684 sym_set_cam_status(ccb, cam_status);
4685 sym_free_ccb(np, cp);
4686 sym_freeze_cam_ccb(ccb);
4687 sym_xpt_done(np, ccb);
4692 * chip handler for bad SCSI status condition
4694 * In case of bad SCSI status, we unqueue all the tasks
4695 * currently queued to the controller but not yet started
4696 * and then restart the SCRIPTS processor immediately.
4698 * QUEUE FULL and BUSY conditions are handled the same way.
4699 * Basically all the not yet started tasks are requeued in
4700 * device queue and the queue is frozen until a completion.
4702 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4703 * the CCB of the failed command to prepare a REQUEST SENSE
4704 * SCSI command and queue it to the controller queue.
4706 * SCRATCHA is assumed to have been loaded with STARTPOS
4707 * before the SCRIPTS called the C code.
4709 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4711 tcb_p tp = &np->target[cp->target];
4713 u_char s_status = cp->ssss_status;
4714 u_char h_flags = cp->host_flags;
4720 * Compute the index of the next job to start from SCRIPTS.
4722 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4725 * The last CCB queued used for IARB hint may be
4726 * no longer relevant. Forget it.
4728 #ifdef SYM_CONF_IARB_SUPPORT
4734 * Now deal with the SCSI status.
4739 if (sym_verbose >= 2) {
4741 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4743 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4744 sym_complete_error (np, cp);
4749 * If we get an SCSI error when requesting sense, give up.
4751 if (h_flags & HF_SENSE) {
4752 sym_complete_error (np, cp);
4757 * Dequeue all queued CCBs for that device not yet started,
4758 * and restart the SCRIPTS processor immediately.
4760 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4761 OUTL_DSP (SCRIPTA_BA (np, start));
4764 * Save some info of the actual IO.
4765 * Compute the data residual.
4767 cp->sv_scsi_status = cp->ssss_status;
4768 cp->sv_xerr_status = cp->xerr_status;
4769 cp->sv_resid = sym_compute_residual(np, cp);
4772 * Prepare all needed data structures for
4773 * requesting sense data.
4779 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4783 * If we are currently using anything different from
4784 * async. 8 bit data transfers with that target,
4785 * start a negotiation, since the device may want
4786 * to report us a UNIT ATTENTION condition due to
4787 * a cause we currently ignore, and we donnot want
4788 * to be stuck with WIDE and/or SYNC data transfer.
4790 * cp->nego_status is filled by sym_prepare_nego().
4792 cp->nego_status = 0;
4794 if (tp->tinfo.current.options & PPR_OPT_MASK)
4796 else if (tp->tinfo.current.width != BUS_8_BIT)
4798 else if (tp->tinfo.current.offset != 0)
4802 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4804 * Message table indirect structure.
4806 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4807 cp->phys.smsg.size = cpu_to_scr(msglen);
4812 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4813 cp->phys.cmd.size = cpu_to_scr(6);
4816 * patch requested size into sense command
4818 cp->sensecmd[0] = 0x03;
4819 cp->sensecmd[1] = cp->lun << 5;
4820 #ifdef FreeBSD_New_Tran_Settings
4821 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4822 cp->sensecmd[1] = 0;
4824 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4825 cp->data_len = SYM_SNS_BBUF_LEN;
4830 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4831 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4832 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4835 * requeue the command.
4837 startp = SCRIPTB_BA (np, sdata_in);
4839 cp->phys.head.savep = cpu_to_scr(startp);
4840 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4841 cp->phys.head.lastp = cpu_to_scr(startp);
4842 cp->startp = cpu_to_scr(startp);
4844 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4845 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4846 cp->ssss_status = S_ILLEGAL;
4847 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4848 cp->xerr_status = 0;
4849 cp->extra_bytes = 0;
4851 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4854 * Requeue the command.
4856 sym_put_start_queue(np, cp);
4859 * Give back to upper layer everything we have dequeued.
4861 sym_flush_comp_queue(np, 0);
4867 * After a device has accepted some management message
4868 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4869 * a device signals a UNIT ATTENTION condition, some
4870 * tasks are thrown away by the device. We are required
4871 * to reflect that on our tasks list since the device
4872 * will never complete these tasks.
4874 * This function move from the BUSY queue to the COMP
4875 * queue all disconnected CCBs for a given target that
4876 * match the following criteria:
4877 * - lun=-1 means any logical UNIT otherwise a given one.
4878 * - task=-1 means any task, otherwise a given one.
4881 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4883 SYM_QUEHEAD qtmp, *qp;
4888 * Move the entire BUSY queue to our temporary queue.
4890 sym_que_init(&qtmp);
4891 sym_que_splice(&np->busy_ccbq, &qtmp);
4892 sym_que_init(&np->busy_ccbq);
4895 * Put all CCBs that matches our criteria into
4896 * the COMP queue and put back other ones into
4899 while ((qp = sym_remque_head(&qtmp)) != 0) {
4901 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4903 if (cp->host_status != HS_DISCONNECT ||
4904 cp->target != target ||
4905 (lun != -1 && cp->lun != lun) ||
4907 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4908 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4911 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4913 /* Preserve the software timeout condition */
4914 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4915 sym_set_cam_status(ccb, cam_status);
4918 printf("XXXX TASK @%p CLEARED\n", cp);
4925 * chip handler for TASKS recovery
4927 * We cannot safely abort a command, while the SCRIPTS
4928 * processor is running, since we just would be in race
4931 * As long as we have tasks to abort, we keep the SEM
4932 * bit set in the ISTAT. When this bit is set, the
4933 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4934 * each time it enters the scheduler.
4936 * If we have to reset a target, clear tasks of a unit,
4937 * or to perform the abort of a disconnected job, we
4938 * restart the SCRIPTS for selecting the target. Once
4939 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4940 * If it loses arbitration, the SCRIPTS will interrupt again
4941 * the next time it will enter its scheduler, and so on ...
4943 * On SIR_TARGET_SELECTED, we scan for the more
4944 * appropriate thing to do:
4946 * - If nothing, we just sent a M_ABORT message to the
4947 * target to get rid of the useless SCSI bus ownership.
4948 * According to the specs, no tasks shall be affected.
4949 * - If the target is to be reset, we send it a M_RESET
4951 * - If a logical UNIT is to be cleared , we send the
4952 * IDENTIFY(lun) + M_ABORT.
4953 * - If an untagged task is to be aborted, we send the
4954 * IDENTIFY(lun) + M_ABORT.
4955 * - If a tagged task is to be aborted, we send the
4956 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4958 * Once our 'kiss of death' :) message has been accepted
4959 * by the target, the SCRIPTS interrupts again
4960 * (SIR_ABORT_SENT). On this interrupt, we complete
4961 * all the CCBs that should have been aborted by the
4962 * target according to our message.
4964 static void sym_sir_task_recovery(hcb_p np, int num)
4969 int target=-1, lun=-1, task;
4974 * The SCRIPTS processor stopped before starting
4975 * the next command in order to allow us to perform
4976 * some task recovery.
4978 case SIR_SCRIPT_STOPPED:
4980 * Do we have any target to reset or unit to clear ?
4982 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4983 tp = &np->target[i];
4985 (tp->lun0p && tp->lun0p->to_clear)) {
4991 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4992 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5002 * If not, walk the busy queue for any
5003 * disconnected CCB to be aborted.
5006 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5007 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
5008 if (cp->host_status != HS_DISCONNECT)
5011 target = cp->target;
5018 * If some target is to be selected,
5019 * prepare and start the selection.
5022 tp = &np->target[target];
5023 np->abrt_sel.sel_id = target;
5024 np->abrt_sel.sel_scntl3 = tp->head.wval;
5025 np->abrt_sel.sel_sxfer = tp->head.sval;
5026 OUTL(nc_dsa, np->hcb_ba);
5027 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
5032 * Now look for a CCB to abort that haven't started yet.
5033 * Btw, the SCRIPTS processor is still stopped, so
5034 * we are not in race.
5038 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5039 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5040 if (cp->host_status != HS_BUSY &&
5041 cp->host_status != HS_NEGOTIATE)
5045 #ifdef SYM_CONF_IARB_SUPPORT
5047 * If we are using IMMEDIATE ARBITRATION, we donnot
5048 * want to cancel the last queued CCB, since the
5049 * SCRIPTS may have anticipated the selection.
5051 if (cp == np->last_cp) {
5056 i = 1; /* Means we have found some */
5061 * We are done, so we donnot need
5062 * to synchronize with the SCRIPTS anylonger.
5063 * Remove the SEM flag from the ISTAT.
5066 OUTB (nc_istat, SIGP);
5070 * Compute index of next position in the start
5071 * queue the SCRIPTS intends to start and dequeue
5072 * all CCBs for that device that haven't been started.
5074 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5075 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5078 * Make sure at least our IO to abort has been dequeued.
5080 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5083 * Keep track in cam status of the reason of the abort.
5085 if (cp->to_abort == 2)
5086 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5088 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5091 * Complete with error everything that we have dequeued.
5093 sym_flush_comp_queue(np, 0);
5096 * The SCRIPTS processor has selected a target
5097 * we may have some manual recovery to perform for.
5099 case SIR_TARGET_SELECTED:
5100 target = (INB (nc_sdid) & 0xf);
5101 tp = &np->target[target];
5103 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5106 * If the target is to be reset, prepare a
5107 * M_RESET message and clear the to_reset flag
5108 * since we donnot expect this operation to fail.
5111 np->abrt_msg[0] = M_RESET;
5112 np->abrt_tbl.size = 1;
5118 * Otherwise, look for some logical unit to be cleared.
5120 if (tp->lun0p && tp->lun0p->to_clear)
5122 else if (tp->lunmp) {
5123 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5124 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5132 * If a logical unit is to be cleared, prepare
5133 * an IDENTIFY(lun) + ABORT MESSAGE.
5136 lcb_p lp = sym_lp(np, tp, lun);
5137 lp->to_clear = 0; /* We donnot expect to fail here */
5138 np->abrt_msg[0] = M_IDENTIFY | lun;
5139 np->abrt_msg[1] = M_ABORT;
5140 np->abrt_tbl.size = 2;
5145 * Otherwise, look for some disconnected job to
5146 * abort for this target.
5150 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5151 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5152 if (cp->host_status != HS_DISCONNECT)
5154 if (cp->target != target)
5158 i = 1; /* Means we have some */
5163 * If we have none, probably since the device has
5164 * completed the command before we won abitration,
5165 * send a M_ABORT message without IDENTIFY.
5166 * According to the specs, the device must just
5167 * disconnect the BUS and not abort any task.
5170 np->abrt_msg[0] = M_ABORT;
5171 np->abrt_tbl.size = 1;
5176 * We have some task to abort.
5177 * Set the IDENTIFY(lun)
5179 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5182 * If we want to abort an untagged command, we
5183 * will send an IDENTIFY + M_ABORT.
5184 * Otherwise (tagged command), we will send
5185 * an IDENTIFY + task attributes + ABORT TAG.
5187 if (cp->tag == NO_TAG) {
5188 np->abrt_msg[1] = M_ABORT;
5189 np->abrt_tbl.size = 2;
5192 np->abrt_msg[1] = cp->scsi_smsg[1];
5193 np->abrt_msg[2] = cp->scsi_smsg[2];
5194 np->abrt_msg[3] = M_ABORT_TAG;
5195 np->abrt_tbl.size = 4;
5198 * Keep track of software timeout condition, since the
5199 * peripheral driver may not count retries on abort
5200 * conditions not due to timeout.
5202 if (cp->to_abort == 2)
5203 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5204 cp->to_abort = 0; /* We donnot expect to fail here */
5208 * The target has accepted our message and switched
5209 * to BUS FREE phase as we expected.
5211 case SIR_ABORT_SENT:
5212 target = (INB (nc_sdid) & 0xf);
5213 tp = &np->target[target];
5216 ** If we didn't abort anything, leave here.
5218 if (np->abrt_msg[0] == M_ABORT)
5222 * If we sent a M_RESET, then a hardware reset has
5223 * been performed by the target.
5224 * - Reset everything to async 8 bit
5225 * - Tell ourself to negotiate next time :-)
5226 * - Prepare to clear all disconnected CCBs for
5227 * this target from our task list (lun=task=-1)
5231 if (np->abrt_msg[0] == M_RESET) {
5233 tp->head.wval = np->rv_scntl3;
5235 tp->tinfo.current.period = 0;
5236 tp->tinfo.current.offset = 0;
5237 tp->tinfo.current.width = BUS_8_BIT;
5238 tp->tinfo.current.options = 0;
5242 * Otherwise, check for the LUN and TASK(s)
5243 * concerned by the cancelation.
5244 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5245 * or an ABORT message :-)
5248 lun = np->abrt_msg[0] & 0x3f;
5249 if (np->abrt_msg[1] == M_ABORT_TAG)
5250 task = np->abrt_msg[2];
5254 * Complete all the CCBs the device should have
5255 * aborted due to our 'kiss of death' message.
5257 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5258 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5259 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5260 sym_flush_comp_queue(np, 0);
5263 * If we sent a BDR, make uper layer aware of that.
5265 if (np->abrt_msg[0] == M_RESET)
5266 xpt_async(AC_SENT_BDR, np->path, NULL);
5271 * Print to the log the message we intend to send.
5273 if (num == SIR_TARGET_SELECTED) {
5274 PRINT_TARGET(np, target);
5275 sym_printl_hex("control msgout:", np->abrt_msg,
5277 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5281 * Let the SCRIPTS processor continue.
5287 * Gerard's alchemy:) that deals with with the data
5288 * pointer for both MDP and the residual calculation.
5290 * I didn't want to bloat the code by more than 200
5291 * lignes for the handling of both MDP and the residual.
5292 * This has been achieved by using a data pointer
5293 * representation consisting in an index in the data
5294 * array (dp_sg) and a negative offset (dp_ofs) that
5295 * have the following meaning:
5297 * - dp_sg = SYM_CONF_MAX_SG
5298 * we are at the end of the data script.
5299 * - dp_sg < SYM_CONF_MAX_SG
5300 * dp_sg points to the next entry of the scatter array
5301 * we want to transfer.
5303 * dp_ofs represents the residual of bytes of the
5304 * previous entry scatter entry we will send first.
5306 * no residual to send first.
5308 * The function sym_evaluate_dp() accepts an arbitray
5309 * offset (basically from the MDP message) and returns
5310 * the corresponding values of dp_sg and dp_ofs.
5313 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5316 int dp_ofs, dp_sg, dp_sgmin;
5321 * Compute the resulted data pointer in term of a script
5322 * address within some DATA script and a signed byte offset.
5326 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5328 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5334 dp_scr = scr_to_cpu(pm->ret);
5335 dp_ofs -= scr_to_cpu(pm->sg.size);
5339 * If we are auto-sensing, then we are done.
5341 if (cp->host_flags & HF_SENSE) {
5347 * Deduce the index of the sg entry.
5348 * Keep track of the index of the first valid entry.
5349 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5352 tmp = scr_to_cpu(cp->phys.head.goalp);
5353 dp_sg = SYM_CONF_MAX_SG;
5355 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5356 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5359 * Move to the sg entry the data pointer belongs to.
5361 * If we are inside the data area, we expect result to be:
5364 * dp_ofs = 0 and dp_sg is the index of the sg entry
5365 * the data pointer belongs to (or the end of the data)
5367 * dp_ofs < 0 and dp_sg is the index of the sg entry
5368 * the data pointer belongs to + 1.
5372 while (dp_sg > dp_sgmin) {
5374 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5375 n = dp_ofs + (tmp & 0xffffff);
5383 else if (dp_ofs > 0) {
5384 while (dp_sg < SYM_CONF_MAX_SG) {
5385 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5386 dp_ofs -= (tmp & 0xffffff);
5394 * Make sure the data pointer is inside the data area.
5395 * If not, return some error.
5397 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5399 else if (dp_sg > SYM_CONF_MAX_SG ||
5400 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5404 * Save the extreme pointer if needed.
5406 if (dp_sg > cp->ext_sg ||
5407 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5409 cp->ext_ofs = dp_ofs;
5423 * chip handler for MODIFY DATA POINTER MESSAGE
5425 * We also call this function on IGNORE WIDE RESIDUE
5426 * messages that do not match a SWIDE full condition.
5427 * Btw, we assume in that situation that such a message
5428 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5431 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5434 u32 dp_scr = INL (nc_temp);
5442 * Not supported for auto-sense.
5444 if (cp->host_flags & HF_SENSE)
5448 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5449 * to the resulted data pointer.
5451 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5456 * And our alchemy:) allows to easily calculate the data
5457 * script address we want to return for the next data phase.
5459 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5460 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5463 * If offset / scatter entry is zero we donnot need
5464 * a context for the new current data pointer.
5472 * Get a context for the new current data pointer.
5474 hflags = INB (HF_PRT);
5476 if (hflags & HF_DP_SAVED)
5477 hflags ^= HF_ACT_PM;
5479 if (!(hflags & HF_ACT_PM)) {
5481 dp_scr = SCRIPTA_BA (np, pm0_data);
5485 dp_scr = SCRIPTA_BA (np, pm1_data);
5488 hflags &= ~(HF_DP_SAVED);
5490 OUTB (HF_PRT, hflags);
5493 * Set up the new current data pointer.
5494 * ofs < 0 there, and for the next data phase, we
5495 * want to transfer part of the data of the sg entry
5496 * corresponding to index dp_sg-1 prior to returning
5497 * to the main data script.
5499 pm->ret = cpu_to_scr(dp_ret);
5500 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5501 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5502 pm->sg.addr = cpu_to_scr(tmp);
5503 pm->sg.size = cpu_to_scr(-dp_ofs);
5506 OUTL (nc_temp, dp_scr);
5507 OUTL_DSP (SCRIPTA_BA (np, clrack));
5511 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5516 * chip calculation of the data residual.
5518 * As I used to say, the requirement of data residual
5519 * in SCSI is broken, useless and cannot be achieved
5520 * without huge complexity.
5521 * But most OSes and even the official CAM require it.
5522 * When stupidity happens to be so widely spread inside
5523 * a community, it gets hard to convince.
5525 * Anyway, I don't care, since I am not going to use
5526 * any software that considers this data residual as
5527 * a relevant information. :)
5530 static int sym_compute_residual(hcb_p np, ccb_p cp)
5532 int dp_sg, dp_sgmin, resid = 0;
5536 * Check for some data lost or just thrown away.
5537 * We are not required to be quite accurate in this
5538 * situation. Btw, if we are odd for output and the
5539 * device claims some more data, it may well happen
5540 * than our residual be zero. :-)
5542 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5543 if (cp->xerr_status & XE_EXTRA_DATA)
5544 resid -= cp->extra_bytes;
5545 if (cp->xerr_status & XE_SODL_UNRUN)
5547 if (cp->xerr_status & XE_SWIDE_OVRUN)
5552 * If all data has been transferred,
5553 * there is no residual.
5555 if (cp->phys.head.lastp == cp->phys.head.goalp)
5559 * If no data transfer occurs, or if the data
5560 * pointer is weird, return full residual.
5562 if (cp->startp == cp->phys.head.lastp ||
5563 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5565 return cp->data_len;
5569 * If we were auto-sensing, then we are done.
5571 if (cp->host_flags & HF_SENSE) {
5576 * We are now full comfortable in the computation
5577 * of the data residual (2's complement).
5579 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5580 resid = -cp->ext_ofs;
5581 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5582 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5583 resid += (tmp & 0xffffff);
5587 * Hopefully, the result is not too wrong.
5593 * Print out the content of a SCSI message.
5596 static int sym_show_msg (u_char * msg)
5600 if (*msg==M_EXTENDED) {
5602 if (i-1>msg[1]) break;
5603 printf ("-%x",msg[i]);
5606 } else if ((*msg & 0xf0) == 0x20) {
5607 printf ("-%x",msg[1]);
5613 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5617 printf ("%s: ", label);
5619 (void) sym_show_msg (msg);
5624 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5626 * When we try to negotiate, we append the negotiation message
5627 * to the identify and (maybe) simple tag message.
5628 * The host status field is set to HS_NEGOTIATE to mark this
5631 * If the target doesn't answer this message immediately
5632 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5633 * will be raised eventually.
5634 * The handler removes the HS_NEGOTIATE status, and sets the
5635 * negotiated value to the default (async / nowide).
5637 * If we receive a matching answer immediately, we check it
5638 * for validity, and set the values.
5640 * If we receive a Reject message immediately, we assume the
5641 * negotiation has failed, and fall back to standard values.
5643 * If we receive a negotiation message while not in HS_NEGOTIATE
5644 * state, it's a target initiated negotiation. We prepare a
5645 * (hopefully) valid answer, set our parameters, and send back
5646 * this answer to the target.
5648 * If the target doesn't fetch the answer (no message out phase),
5649 * we assume the negotiation has failed, and fall back to default
5650 * settings (SIR_NEGO_PROTO interrupt).
5652 * When we set the values, we adjust them in all ccbs belonging
5653 * to this target, in the controller's register, and in the "phys"
5654 * field of the controller's struct sym_hcb.
5658 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5660 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5662 u_char chg, ofs, per, fak, div;
5666 * Synchronous request message received.
5668 if (DEBUG_FLAGS & DEBUG_NEGO) {
5669 sym_print_msg(cp, "sync msgin", np->msgin);
5673 * request or answer ?
5675 if (INB (HS_PRT) == HS_NEGOTIATE) {
5676 OUTB (HS_PRT, HS_BUSY);
5677 if (cp->nego_status && cp->nego_status != NS_SYNC)
5683 * get requested values.
5690 * check values against our limits.
5693 if (ofs > np->maxoffs)
5694 {chg = 1; ofs = np->maxoffs;}
5696 if (ofs > tp->tinfo.user.offset)
5697 {chg = 1; ofs = tp->tinfo.user.offset;}
5702 if (per < np->minsync)
5703 {chg = 1; per = np->minsync;}
5705 if (per < tp->tinfo.user.period)
5706 {chg = 1; per = tp->tinfo.user.period;}
5711 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5714 if (DEBUG_FLAGS & DEBUG_NEGO) {
5716 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5717 ofs, per, div, fak, chg);
5721 * This was an answer message
5724 if (chg) /* Answer wasn't acceptable. */
5726 sym_setsync (np, cp, ofs, per, div, fak);
5727 OUTL_DSP (SCRIPTA_BA (np, clrack));
5732 * It was a request. Set value and
5733 * prepare an answer message
5735 sym_setsync (np, cp, ofs, per, div, fak);
5737 np->msgout[0] = M_EXTENDED;
5739 np->msgout[2] = M_X_SYNC_REQ;
5740 np->msgout[3] = per;
5741 np->msgout[4] = ofs;
5743 cp->nego_status = NS_SYNC;
5745 if (DEBUG_FLAGS & DEBUG_NEGO) {
5746 sym_print_msg(cp, "sync msgout", np->msgout);
5749 np->msgin [0] = M_NOOP;
5751 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5754 sym_setsync (np, cp, 0, 0, 0, 0);
5755 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5759 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5761 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5763 u_char chg, ofs, per, fak, dt, div, wide;
5767 * Synchronous request message received.
5769 if (DEBUG_FLAGS & DEBUG_NEGO) {
5770 sym_print_msg(cp, "ppr msgin", np->msgin);
5774 * get requested values.
5779 wide = np->msgin[6];
5780 dt = np->msgin[7] & PPR_OPT_DT;
5783 * request or answer ?
5785 if (INB (HS_PRT) == HS_NEGOTIATE) {
5786 OUTB (HS_PRT, HS_BUSY);
5787 if (cp->nego_status && cp->nego_status != NS_PPR)
5793 * check values against our limits.
5795 if (wide > np->maxwide)
5796 {chg = 1; wide = np->maxwide;}
5797 if (!wide || !(np->features & FE_ULTRA3))
5800 if (wide > tp->tinfo.user.width)
5801 {chg = 1; wide = tp->tinfo.user.width;}
5804 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5807 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5811 if (ofs > np->maxoffs_dt)
5812 {chg = 1; ofs = np->maxoffs_dt;}
5814 else if (ofs > np->maxoffs)
5815 {chg = 1; ofs = np->maxoffs;}
5817 if (ofs > tp->tinfo.user.offset)
5818 {chg = 1; ofs = tp->tinfo.user.offset;}
5824 if (per < np->minsync_dt)
5825 {chg = 1; per = np->minsync_dt;}
5827 else if (per < np->minsync)
5828 {chg = 1; per = np->minsync;}
5830 if (per < tp->tinfo.user.period)
5831 {chg = 1; per = tp->tinfo.user.period;}
5836 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5839 if (DEBUG_FLAGS & DEBUG_NEGO) {
5842 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5843 dt, ofs, per, wide, div, fak, chg);
5850 if (chg) /* Answer wasn't acceptable */
5852 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5853 OUTL_DSP (SCRIPTA_BA (np, clrack));
5858 * It was a request. Set value and
5859 * prepare an answer message
5861 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5863 np->msgout[0] = M_EXTENDED;
5865 np->msgout[2] = M_X_PPR_REQ;
5866 np->msgout[3] = per;
5868 np->msgout[5] = ofs;
5869 np->msgout[6] = wide;
5872 cp->nego_status = NS_PPR;
5874 if (DEBUG_FLAGS & DEBUG_NEGO) {
5875 sym_print_msg(cp, "ppr msgout", np->msgout);
5878 np->msgin [0] = M_NOOP;
5880 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5883 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5884 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5886 * If it was a device response that should result in
5887 * ST, we may want to try a legacy negotiation later.
5890 tp->tinfo.goal.options = 0;
5891 tp->tinfo.goal.width = wide;
5892 tp->tinfo.goal.period = per;
5893 tp->tinfo.goal.offset = ofs;
5899 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5901 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5907 * Wide request message received.
5909 if (DEBUG_FLAGS & DEBUG_NEGO) {
5910 sym_print_msg(cp, "wide msgin", np->msgin);
5914 * Is it a request from the device?
5916 if (INB (HS_PRT) == HS_NEGOTIATE) {
5917 OUTB (HS_PRT, HS_BUSY);
5918 if (cp->nego_status && cp->nego_status != NS_WIDE)
5924 * get requested values.
5927 wide = np->msgin[3];
5930 * check values against driver limits.
5932 if (wide > np->maxwide)
5933 {chg = 1; wide = np->maxwide;}
5935 if (wide > tp->tinfo.user.width)
5936 {chg = 1; wide = tp->tinfo.user.width;}
5939 if (DEBUG_FLAGS & DEBUG_NEGO) {
5941 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5945 * This was an answer message
5948 if (chg) /* Answer wasn't acceptable. */
5950 sym_setwide (np, cp, wide);
5953 * Negotiate for SYNC immediately after WIDE response.
5954 * This allows to negotiate for both WIDE and SYNC on
5955 * a single SCSI command (Suggested by Justin Gibbs).
5957 if (tp->tinfo.goal.offset) {
5958 np->msgout[0] = M_EXTENDED;
5960 np->msgout[2] = M_X_SYNC_REQ;
5961 np->msgout[3] = tp->tinfo.goal.period;
5962 np->msgout[4] = tp->tinfo.goal.offset;
5964 if (DEBUG_FLAGS & DEBUG_NEGO) {
5965 sym_print_msg(cp, "sync msgout", np->msgout);
5968 cp->nego_status = NS_SYNC;
5969 OUTB (HS_PRT, HS_NEGOTIATE);
5970 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5974 OUTL_DSP (SCRIPTA_BA (np, clrack));
5979 * It was a request, set value and
5980 * prepare an answer message
5982 sym_setwide (np, cp, wide);
5984 np->msgout[0] = M_EXTENDED;
5986 np->msgout[2] = M_X_WIDE_REQ;
5987 np->msgout[3] = wide;
5989 np->msgin [0] = M_NOOP;
5991 cp->nego_status = NS_WIDE;
5993 if (DEBUG_FLAGS & DEBUG_NEGO) {
5994 sym_print_msg(cp, "wide msgout", np->msgout);
5997 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
6000 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6004 * Reset SYNC or WIDE to default settings.
6006 * Called when a negotiation does not succeed either
6007 * on rejection or on protocol error.
6009 * If it was a PPR that made problems, we may want to
6010 * try a legacy negotiation later.
6012 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
6015 * any error in negotiation:
6016 * fall back to default mode.
6018 switch (cp->nego_status) {
6021 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6023 tp->tinfo.goal.options = 0;
6024 if (tp->tinfo.goal.period < np->minsync)
6025 tp->tinfo.goal.period = np->minsync;
6026 if (tp->tinfo.goal.offset > np->maxoffs)
6027 tp->tinfo.goal.offset = np->maxoffs;
6031 sym_setsync (np, cp, 0, 0, 0, 0);
6034 sym_setwide (np, cp, 0);
6037 np->msgin [0] = M_NOOP;
6038 np->msgout[0] = M_NOOP;
6039 cp->nego_status = 0;
6043 * chip handler for MESSAGE REJECT received in response to
6044 * a WIDE or SYNCHRONOUS negotiation.
6046 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6048 sym_nego_default(np, tp, cp);
6049 OUTB (HS_PRT, HS_BUSY);
6053 * chip exception handler for programmed interrupts.
6055 static void sym_int_sir (hcb_p np)
6057 u_char num = INB (nc_dsps);
6058 u32 dsa = INL (nc_dsa);
6059 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6060 u_char target = INB (nc_sdid) & 0x0f;
6061 tcb_p tp = &np->target[target];
6064 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6068 * Command has been completed with error condition
6069 * or has been auto-sensed.
6071 case SIR_COMPLETE_ERROR:
6072 sym_complete_error(np, cp);
6075 * The C code is currently trying to recover from something.
6076 * Typically, user want to abort some command.
6078 case SIR_SCRIPT_STOPPED:
6079 case SIR_TARGET_SELECTED:
6080 case SIR_ABORT_SENT:
6081 sym_sir_task_recovery(np, num);
6084 * The device didn't go to MSG OUT phase after having
6085 * been selected with ATN. We donnot want to handle
6088 case SIR_SEL_ATN_NO_MSG_OUT:
6089 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6090 sym_name (np), target);
6093 * The device didn't switch to MSG IN phase after
6094 * having reseleted the initiator.
6096 case SIR_RESEL_NO_MSG_IN:
6097 printf ("%s:%d: No MSG IN phase after reselection.\n",
6098 sym_name (np), target);
6101 * After reselection, the device sent a message that wasn't
6104 case SIR_RESEL_NO_IDENTIFY:
6105 printf ("%s:%d: No IDENTIFY after reselection.\n",
6106 sym_name (np), target);
6109 * The device reselected a LUN we donnot know about.
6111 case SIR_RESEL_BAD_LUN:
6112 np->msgout[0] = M_RESET;
6115 * The device reselected for an untagged nexus and we
6118 case SIR_RESEL_BAD_I_T_L:
6119 np->msgout[0] = M_ABORT;
6122 * The device reselected for a tagged nexus that we donnot
6125 case SIR_RESEL_BAD_I_T_L_Q:
6126 np->msgout[0] = M_ABORT_TAG;
6129 * The SCRIPTS let us know that the device has grabbed
6130 * our message and will abort the job.
6132 case SIR_RESEL_ABORTED:
6133 np->lastmsg = np->msgout[0];
6134 np->msgout[0] = M_NOOP;
6135 printf ("%s:%d: message %x sent on bad reselection.\n",
6136 sym_name (np), target, np->lastmsg);
6139 * The SCRIPTS let us know that a message has been
6140 * successfully sent to the device.
6142 case SIR_MSG_OUT_DONE:
6143 np->lastmsg = np->msgout[0];
6144 np->msgout[0] = M_NOOP;
6145 /* Should we really care of that */
6146 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6148 cp->xerr_status &= ~XE_PARITY_ERR;
6149 if (!cp->xerr_status)
6150 OUTOFFB (HF_PRT, HF_EXT_ERR);
6155 * The device didn't send a GOOD SCSI status.
6156 * We may have some work to do prior to allow
6157 * the SCRIPTS processor to continue.
6159 case SIR_BAD_SCSI_STATUS:
6162 sym_sir_bad_scsi_status(np, num, cp);
6165 * We are asked by the SCRIPTS to prepare a
6168 case SIR_REJECT_TO_SEND:
6169 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6170 np->msgout[0] = M_REJECT;
6173 * We have been ODD at the end of a DATA IN
6174 * transfer and the device didn't send a
6175 * IGNORE WIDE RESIDUE message.
6176 * It is a data overrun condition.
6178 case SIR_SWIDE_OVERRUN:
6180 OUTONB (HF_PRT, HF_EXT_ERR);
6181 cp->xerr_status |= XE_SWIDE_OVRUN;
6185 * We have been ODD at the end of a DATA OUT
6187 * It is a data underrun condition.
6189 case SIR_SODL_UNDERRUN:
6191 OUTONB (HF_PRT, HF_EXT_ERR);
6192 cp->xerr_status |= XE_SODL_UNRUN;
6196 * The device wants us to tranfer more data than
6197 * expected or in the wrong direction.
6198 * The number of extra bytes is in scratcha.
6199 * It is a data overrun condition.
6201 case SIR_DATA_OVERRUN:
6203 OUTONB (HF_PRT, HF_EXT_ERR);
6204 cp->xerr_status |= XE_EXTRA_DATA;
6205 cp->extra_bytes += INL (nc_scratcha);
6209 * The device switched to an illegal phase (4/5).
6213 OUTONB (HF_PRT, HF_EXT_ERR);
6214 cp->xerr_status |= XE_BAD_PHASE;
6218 * We received a message.
6220 case SIR_MSG_RECEIVED:
6223 switch (np->msgin [0]) {
6225 * We received an extended message.
6226 * We handle MODIFY DATA POINTER, SDTR, WDTR
6227 * and reject all other extended messages.
6230 switch (np->msgin [2]) {
6232 if (DEBUG_FLAGS & DEBUG_POINTER)
6233 sym_print_msg(cp,"modify DP",np->msgin);
6234 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6235 (np->msgin[5]<<8) + (np->msgin[6]);
6236 sym_modify_dp(np, tp, cp, tmp);
6239 sym_sync_nego(np, tp, cp);
6242 sym_ppr_nego(np, tp, cp);
6245 sym_wide_nego(np, tp, cp);
6252 * We received a 1/2 byte message not handled from SCRIPTS.
6253 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6254 * RESIDUE messages that haven't been anticipated by
6255 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6256 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6259 if (DEBUG_FLAGS & DEBUG_POINTER)
6260 sym_print_msg(cp,"ign wide residue", np->msgin);
6261 sym_modify_dp(np, tp, cp, -1);
6264 if (INB (HS_PRT) == HS_NEGOTIATE)
6265 sym_nego_rejected(np, tp, cp);
6268 printf ("M_REJECT received (%x:%x).\n",
6269 scr_to_cpu(np->lastmsg), np->msgout[0]);
6278 * We received an unknown message.
6279 * Ignore all MSG IN phases and reject it.
6282 sym_print_msg(cp, "WEIRD message received", np->msgin);
6283 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6286 * Negotiation failed.
6287 * Target does not send us the reply.
6288 * Remove the HS_NEGOTIATE status.
6290 case SIR_NEGO_FAILED:
6291 OUTB (HS_PRT, HS_BUSY);
6293 * Negotiation failed.
6294 * Target does not want answer message.
6296 case SIR_NEGO_PROTO:
6297 sym_nego_default(np, tp, cp);
6305 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6308 OUTL_DSP (SCRIPTA_BA (np, clrack));
6315 * Acquire a control block
6317 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6319 tcb_p tp = &np->target[tn];
6320 lcb_p lp = sym_lp(np, tp, ln);
6321 u_short tag = NO_TAG;
6323 ccb_p cp = (ccb_p) 0;
6326 * Look for a free CCB
6328 if (sym_que_empty(&np->free_ccbq))
6329 (void) sym_alloc_ccb(np);
6330 qp = sym_remque_head(&np->free_ccbq);
6333 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6336 * If the LCB is not yet available and the LUN
6337 * has been probed ok, try to allocate the LCB.
6339 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6340 lp = sym_alloc_lcb(np, tn, ln);
6346 * If the LCB is not available here, then the
6347 * logical unit is not yet discovered. For those
6348 * ones only accept 1 SCSI IO per logical unit,
6349 * since we cannot allow disconnections.
6352 if (!sym_is_bit(tp->busy0_map, ln))
6353 sym_set_bit(tp->busy0_map, ln);
6358 * If we have been asked for a tagged command.
6362 * Debugging purpose.
6364 assert(lp->busy_itl == 0);
6366 * Allocate resources for tags if not yet.
6369 sym_alloc_lcb_tags(np, tn, ln);
6374 * Get a tag for this SCSI IO and set up
6375 * the CCB bus address for reselection,
6376 * and count it for this LUN.
6377 * Toggle reselect path to tagged.
6379 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6380 tag = lp->cb_tags[lp->ia_tag];
6381 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6383 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6386 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6392 * This command will not be tagged.
6393 * If we already have either a tagged or untagged
6394 * one, refuse to overlap this untagged one.
6398 * Debugging purpose.
6400 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6402 * Count this nexus for this LUN.
6403 * Set up the CCB bus address for reselection.
6404 * Toggle reselect path to untagged.
6406 if (++lp->busy_itl == 1) {
6407 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6409 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6416 * Put the CCB into the busy queue.
6418 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6421 * Remember all informations needed to free this CCB.
6428 if (DEBUG_FLAGS & DEBUG_TAGS) {
6429 PRINT_LUN(np, tn, ln);
6430 printf ("ccb @%p using tag %d.\n", cp, tag);
6436 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6441 * Release one control block
6443 static void sym_free_ccb (hcb_p np, ccb_p cp)
6445 tcb_p tp = &np->target[cp->target];
6446 lcb_p lp = sym_lp(np, tp, cp->lun);
6448 if (DEBUG_FLAGS & DEBUG_TAGS) {
6449 PRINT_LUN(np, cp->target, cp->lun);
6450 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6458 * If tagged, release the tag, set the relect path
6460 if (cp->tag != NO_TAG) {
6462 * Free the tag value.
6464 lp->cb_tags[lp->if_tag] = cp->tag;
6465 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6468 * Make the reselect path invalid,
6469 * and uncount this CCB.
6471 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6473 } else { /* Untagged */
6475 * Make the reselect path invalid,
6476 * and uncount this CCB.
6478 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6482 * If no JOB active, make the LUN reselect path invalid.
6484 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6486 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6489 * Otherwise, we only accept 1 IO per LUN.
6490 * Clear the bit that keeps track of this IO.
6493 sym_clr_bit(tp->busy0_map, cp->lun);
6496 * We donnot queue more than 1 ccb per target
6497 * with negotiation at any time. If this ccb was
6498 * used for negotiation, clear this info in the tcb.
6500 if (cp == tp->nego_cp)
6503 #ifdef SYM_CONF_IARB_SUPPORT
6505 * If we just complete the last queued CCB,
6506 * clear this info that is no longer relevant.
6508 if (cp == np->last_cp)
6513 * Unmap user data from DMA map if needed.
6515 if (cp->dmamapped) {
6516 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6521 * Make this CCB available.
6524 cp->host_status = HS_IDLE;
6525 sym_remque(&cp->link_ccbq);
6526 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6530 * Allocate a CCB from memory and initialize its fixed part.
6532 static ccb_p sym_alloc_ccb(hcb_p np)
6538 * Prevent from allocating more CCBs than we can
6539 * queue to the controller.
6541 if (np->actccbs >= SYM_CONF_MAX_START)
6545 * Allocate memory for this CCB.
6547 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6552 * Allocate a bounce buffer for sense data.
6554 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6559 * Allocate a map for the DMA of user data.
6561 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6569 * Compute the bus address of this ccb.
6571 cp->ccb_ba = vtobus(cp);
6574 * Insert this ccb into the hashed list.
6576 hcode = CCB_HASH_CODE(cp->ccb_ba);
6577 cp->link_ccbh = np->ccbh[hcode];
6578 np->ccbh[hcode] = cp;
6581 * Initialyze the start and restart actions.
6583 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6584 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6587 * Initilialyze some other fields.
6589 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6592 * Chain into free ccb queue.
6594 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6600 sym_mfree_dma(cp->sns_bbuf,SYM_SNS_BBUF_LEN,"SNS_BBUF");
6601 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6607 * Look up a CCB from a DSA value.
6609 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6614 hcode = CCB_HASH_CODE(dsa);
6615 cp = np->ccbh[hcode];
6617 if (cp->ccb_ba == dsa)
6626 * Target control block initialisation.
6627 * Nothing important to do at the moment.
6629 static void sym_init_tcb (hcb_p np, u_char tn)
6632 * Check some alignments required by the chip.
6634 assert (((offsetof(struct sym_reg, nc_sxfer) ^
6635 offsetof(struct sym_tcb, head.sval)) &3) == 0);
6636 assert (((offsetof(struct sym_reg, nc_scntl3) ^
6637 offsetof(struct sym_tcb, head.wval)) &3) == 0);
6641 * Lun control block allocation and initialization.
6643 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6645 tcb_p tp = &np->target[tn];
6646 lcb_p lp = sym_lp(np, tp, ln);
6649 * Already done, just return.
6654 * Check against some race.
6656 assert(!sym_is_bit(tp->busy0_map, ln));
6659 * Initialize the target control block if not yet.
6661 sym_init_tcb (np, tn);
6664 * Allocate the LCB bus address array.
6665 * Compute the bus address of this table.
6667 if (ln && !tp->luntbl) {
6670 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6673 for (i = 0 ; i < 64 ; i++)
6674 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6675 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6679 * Allocate the table of pointers for LUN(s) > 0, if needed.
6681 if (ln && !tp->lunmp) {
6682 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6690 * Make it available to the chip.
6692 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6697 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6701 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6705 * Let the itl task point to error handling.
6707 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6710 * Set the reselect pattern to our default. :)
6712 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6715 * Set user capabilities.
6717 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6724 * Allocate LCB resources for tagged command queuing.
6726 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6728 tcb_p tp = &np->target[tn];
6729 lcb_p lp = sym_lp(np, tp, ln);
6733 * If LCB not available, try to allocate it.
6735 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6739 * Allocate the task table and and the tag allocation
6740 * circular buffer. We want both or none.
6742 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6745 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6747 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6753 * Initialize the task table with invalid entries.
6755 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6756 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6759 * Fill up the tag buffer with tag numbers.
6761 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6765 * Make the task table available to SCRIPTS,
6766 * And accept tagged commands now.
6768 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6776 * Test the pci bus snoop logic :-(
6778 * Has to be called with interrupts disabled.
6780 #ifndef SYM_CONF_IOMAPPED
6781 static int sym_regtest (hcb_p np)
6783 register volatile u32 data;
6785 * chip registers may NOT be cached.
6786 * write 0xffffffff to a read only register area,
6787 * and try to read it back.
6790 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6791 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6793 if (data == 0xffffffff) {
6795 if ((data & 0xe2f0fffd) != 0x02000080) {
6797 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6805 static int sym_snooptest (hcb_p np)
6807 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6809 #ifndef SYM_CONF_IOMAPPED
6810 err |= sym_regtest (np);
6811 if (err) return (err);
6815 * Enable Master Parity Checking as we intend
6816 * to enable it for normal operations.
6818 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6822 pc = SCRIPTB0_BA (np, snooptest);
6826 * Set memory and register.
6828 np->cache = cpu_to_scr(host_wr);
6829 OUTL (nc_temp, sym_wr);
6831 * Start script (exchange values)
6833 OUTL (nc_dsa, np->hcb_ba);
6836 * Wait 'til done (with timeout)
6838 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6839 if (INB(nc_istat) & (INTF|SIP|DIP))
6841 if (i>=SYM_SNOOP_TIMEOUT) {
6842 printf ("CACHE TEST FAILED: timeout.\n");
6846 * Check for fatal DMA errors.
6848 dstat = INB (nc_dstat);
6849 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6850 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6851 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6852 "DISABLING MASTER DATA PARITY CHECKING.\n",
6854 np->rv_ctest4 &= ~MPEE;
6858 if (dstat & (MDPE|BF|IID)) {
6859 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6863 * Save termination position.
6867 * Read memory and register.
6869 host_rd = scr_to_cpu(np->cache);
6870 sym_rd = INL (nc_scratcha);
6871 sym_bk = INL (nc_temp);
6874 * Check termination position.
6876 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6877 printf ("CACHE TEST FAILED: script execution failed.\n");
6878 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6879 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6880 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6886 if (host_wr != sym_rd) {
6887 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6888 (int) host_wr, (int) sym_rd);
6891 if (host_rd != sym_wr) {
6892 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6893 (int) sym_wr, (int) host_rd);
6896 if (sym_bk != sym_wr) {
6897 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6898 (int) sym_wr, (int) sym_bk);
6906 * Determine the chip's clock frequency.
6908 * This is essential for the negotiation of the synchronous
6911 * Note: we have to return the correct value.
6912 * THERE IS NO SAFE DEFAULT VALUE.
6914 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6915 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6916 * do not have a clock doubler and so are provided with a
6917 * 80 MHz clock. All other fast20 boards incorporate a doubler
6918 * and so should be delivered with a 40 MHz clock.
6919 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6920 * clock and provide a clock quadrupler (160 Mhz).
6924 * Select SCSI clock frequency
6926 static void sym_selectclock(hcb_p np, u_char scntl3)
6929 * If multiplier not present or not selected, leave here.
6931 if (np->multiplier <= 1) {
6932 OUTB(nc_scntl3, scntl3);
6936 if (sym_verbose >= 2)
6937 printf ("%s: enabling clock multiplier\n", sym_name(np));
6939 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6941 * Wait for the LCKFRQ bit to be set if supported by the chip.
6942 * Otherwise wait 20 micro-seconds.
6944 if (np->features & FE_LCKFRQ) {
6946 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6949 printf("%s: the chip cannot lock the frequency\n",
6953 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6954 OUTB(nc_scntl3, scntl3);
6955 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6956 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6960 * calculate SCSI clock frequency (in KHz)
6962 static unsigned getfreq (hcb_p np, int gen)
6964 unsigned int ms = 0;
6968 * Measure GEN timer delay in order
6969 * to calculate SCSI clock frequency
6971 * This code will never execute too
6972 * many loop iterations (if DELAY is
6973 * reasonably correct). It could get
6974 * too low a delay (too high a freq.)
6975 * if the CPU is slow executing the
6976 * loop for some reason (an NMI, for
6977 * example). For this reason we will
6978 * if multiple measurements are to be
6979 * performed trust the higher delay
6980 * (lower frequency returned).
6982 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6983 (void) INW (nc_sist); /* clear pending scsi interrupt */
6984 OUTB (nc_dien , 0); /* mask all dma interrupts */
6985 (void) INW (nc_sist); /* another one, just to be sure :) */
6986 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6987 OUTB (nc_stime1, 0); /* disable general purpose timer */
6988 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6989 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6990 UDELAY (1000); /* count ms */
6991 OUTB (nc_stime1, 0); /* disable general purpose timer */
6993 * set prescaler to divide by whatever 0 means
6994 * 0 ought to choose divide by 2, but appears
6995 * to set divide by 3.5 mode in my 53c810 ...
6997 OUTB (nc_scntl3, 0);
7000 * adjust for prescaler, and convert into KHz
7002 f = ms ? ((1 << gen) * 4340) / ms : 0;
7004 if (sym_verbose >= 2)
7005 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
7006 sym_name(np), gen, ms, f);
7011 static unsigned sym_getfreq (hcb_p np)
7016 (void) getfreq (np, gen); /* throw away first result */
7017 f1 = getfreq (np, gen);
7018 f2 = getfreq (np, gen);
7019 if (f1 > f2) f1 = f2; /* trust lower result */
7024 * Get/probe chip SCSI clock frequency
7026 static void sym_getclock (hcb_p np, int mult)
7028 unsigned char scntl3 = np->sv_scntl3;
7029 unsigned char stest1 = np->sv_stest1;
7033 * For the C10 core, assume 40 MHz.
7035 if (np->features & FE_C10) {
7036 np->multiplier = mult;
7037 np->clock_khz = 40000 * mult;
7044 * True with 875/895/896/895A with clock multiplier selected
7046 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7047 if (sym_verbose >= 2)
7048 printf ("%s: clock multiplier found\n", sym_name(np));
7049 np->multiplier = mult;
7053 * If multiplier not found or scntl3 not 7,5,3,
7054 * reset chip and get frequency from general purpose timer.
7055 * Otherwise trust scntl3 BIOS setting.
7057 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7058 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7059 f1 = sym_getfreq (np);
7062 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7064 if (f1 < 45000) f1 = 40000;
7065 else if (f1 < 55000) f1 = 50000;
7068 if (f1 < 80000 && mult > 1) {
7069 if (sym_verbose >= 2)
7070 printf ("%s: clock multiplier assumed\n",
7072 np->multiplier = mult;
7075 if ((scntl3 & 7) == 3) f1 = 40000;
7076 else if ((scntl3 & 7) == 5) f1 = 80000;
7079 f1 /= np->multiplier;
7083 * Compute controller synchronous parameters.
7085 f1 *= np->multiplier;
7090 * Get/probe PCI clock frequency
7092 static int sym_getpciclock (hcb_p np)
7097 * For the C1010-33, this doesn't work.
7098 * For the C1010-66, this will be tested when I'll have
7099 * such a beast to play with.
7101 if (!(np->features & FE_C10)) {
7102 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7103 f = (int) sym_getfreq (np);
7104 OUTB (nc_stest1, 0);
7111 /*============= DRIVER ACTION/COMPLETION ====================*/
7114 * Print something that tells about extended errors.
7116 static void sym_print_xerr(ccb_p cp, int x_status)
7118 if (x_status & XE_PARITY_ERR) {
7120 printf ("unrecovered SCSI parity error.\n");
7122 if (x_status & XE_EXTRA_DATA) {
7124 printf ("extraneous data discarded.\n");
7126 if (x_status & XE_BAD_PHASE) {
7128 printf ("illegal scsi phase (4/5).\n");
7130 if (x_status & XE_SODL_UNRUN) {
7132 printf ("ODD transfer in DATA OUT phase.\n");
7134 if (x_status & XE_SWIDE_OVRUN) {
7136 printf ("ODD transfer in DATA IN phase.\n");
7141 * Choose the more appropriate CAM status if
7142 * the IO encountered an extended error.
7144 static int sym_xerr_cam_status(int cam_status, int x_status)
7147 if (x_status & XE_PARITY_ERR)
7148 cam_status = CAM_UNCOR_PARITY;
7149 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7150 cam_status = CAM_DATA_RUN_ERR;
7151 else if (x_status & XE_BAD_PHASE)
7152 cam_status = CAM_REQ_CMP_ERR;
7154 cam_status = CAM_REQ_CMP_ERR;
7160 * Complete execution of a SCSI command with extented
7161 * error, SCSI status error, or having been auto-sensed.
7163 * The SCRIPTS processor is not running there, so we
7164 * can safely access IO registers and remove JOBs from
7166 * SCRATCHA is assumed to have been loaded with STARTPOS
7167 * before the SCRIPTS called the C code.
7169 static void sym_complete_error (hcb_p np, ccb_p cp)
7171 struct ccb_scsiio *csio;
7176 * Paranoid check. :)
7178 if (!cp || !cp->cam_ccb)
7181 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7182 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7183 cp->host_status, cp->ssss_status, cp->host_flags,
7184 cp->target, cp->lun);
7189 * Get CAM command pointer.
7191 csio = &cp->cam_ccb->csio;
7194 * Check for extended errors.
7196 if (cp->xerr_status) {
7198 sym_print_xerr(cp, cp->xerr_status);
7199 if (cp->host_status == HS_COMPLETE)
7200 cp->host_status = HS_COMP_ERR;
7204 * Calculate the residual.
7206 csio->sense_resid = 0;
7207 csio->resid = sym_compute_residual(np, cp);
7209 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7210 csio->resid = 0; /* throw them away. :) */
7214 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7215 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7216 csio->sense_resid = csio->resid; /* Swap residuals */
7217 csio->resid = cp->sv_resid;
7219 if (sym_verbose && cp->sv_xerr_status)
7220 sym_print_xerr(cp, cp->sv_xerr_status);
7221 if (cp->host_status == HS_COMPLETE &&
7222 cp->ssss_status == S_GOOD &&
7223 cp->xerr_status == 0) {
7224 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7225 cp->sv_xerr_status);
7226 cam_status |= CAM_AUTOSNS_VALID;
7228 * Bounce back the sense data to user and
7231 bzero(&csio->sense_data, csio->sense_len);
7232 bcopy(cp->sns_bbuf, &csio->sense_data,
7233 MIN(csio->sense_len, SYM_SNS_BBUF_LEN));
7234 csio->sense_resid += csio->sense_len;
7235 csio->sense_resid -= SYM_SNS_BBUF_LEN;
7238 * If the device reports a UNIT ATTENTION condition
7239 * due to a RESET condition, we should consider all
7240 * disconnect CCBs for this unit as aborted.
7244 p = (u_char *) csio->sense_data;
7245 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7246 sym_clear_tasks(np, CAM_REQ_ABORTED,
7247 cp->target,cp->lun, -1);
7252 cam_status = CAM_AUTOSENSE_FAIL;
7254 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7255 csio->scsi_status = cp->ssss_status;
7256 cam_status = CAM_SCSI_STATUS_ERROR;
7258 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7259 cam_status = CAM_SEL_TIMEOUT;
7260 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7261 cam_status = CAM_UNEXP_BUSFREE;
7262 else { /* Extended error */
7265 printf ("COMMAND FAILED (%x %x %x).\n",
7266 cp->host_status, cp->ssss_status,
7269 csio->scsi_status = cp->ssss_status;
7271 * Set the most appropriate value for CAM status.
7273 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7278 * Dequeue all queued CCBs for that device
7279 * not yet started by SCRIPTS.
7281 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7282 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7285 * Restart the SCRIPTS processor.
7287 OUTL_DSP (SCRIPTA_BA (np, start));
7290 * Synchronize DMA map if needed.
7292 if (cp->dmamapped) {
7293 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7294 (cp->dmamapped == SYM_DMA_READ ?
7295 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7298 * Add this one to the COMP queue.
7299 * Complete all those commands with either error
7300 * or requeue condition.
7302 sym_set_cam_status((union ccb *) csio, cam_status);
7303 sym_remque(&cp->link_ccbq);
7304 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7305 sym_flush_comp_queue(np, 0);
7309 * Complete execution of a successful SCSI command.
7311 * Only successful commands go to the DONE queue,
7312 * since we need to have the SCRIPTS processor
7313 * stopped on any error condition.
7314 * The SCRIPTS processor is running while we are
7315 * completing successful commands.
7317 static void sym_complete_ok (hcb_p np, ccb_p cp)
7319 struct ccb_scsiio *csio;
7324 * Paranoid check. :)
7326 if (!cp || !cp->cam_ccb)
7328 assert (cp->host_status == HS_COMPLETE);
7331 * Get command, target and lun pointers.
7333 csio = &cp->cam_ccb->csio;
7334 tp = &np->target[cp->target];
7335 lp = sym_lp(np, tp, cp->lun);
7338 * Assume device discovered on first success.
7341 sym_set_bit(tp->lun_map, cp->lun);
7344 * If all data have been transferred, given than no
7345 * extended error did occur, there is no residual.
7348 if (cp->phys.head.lastp != cp->phys.head.goalp)
7349 csio->resid = sym_compute_residual(np, cp);
7352 * Wrong transfer residuals may be worse than just always
7353 * returning zero. User can disable this feature from
7354 * sym_conf.h. Residual support is enabled by default.
7356 if (!SYM_CONF_RESIDUAL_SUPPORT)
7360 * Synchronize DMA map if needed.
7362 if (cp->dmamapped) {
7363 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7364 (cp->dmamapped == SYM_DMA_READ ?
7365 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7368 * Set status and complete the command.
7370 csio->scsi_status = cp->ssss_status;
7371 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7372 sym_free_ccb (np, cp);
7373 sym_xpt_done(np, (union ccb *) csio);
7377 * Our timeout handler.
7379 static void sym_timeout1(void *arg)
7381 union ccb *ccb = (union ccb *) arg;
7382 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7385 * Check that the CAM CCB is still queued.
7390 switch(ccb->ccb_h.func_code) {
7392 (void) sym_abort_scsiio(np, ccb, 1);
7399 static void sym_timeout(void *arg)
7409 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7415 * Look up our CCB control block.
7418 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7419 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7420 if (cp2->cam_ccb == ccb) {
7425 if (!cp || cp->host_status == HS_WAIT)
7429 * If a previous abort didn't succeed in time,
7430 * perform a BUS reset.
7433 sym_reset_scsi_bus(np, 1);
7438 * Mark the CCB for abort and allow time for.
7440 cp->to_abort = timed_out ? 2 : 1;
7441 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb, 10*hz);
7444 * Tell the SCRIPTS processor to stop and synchronize with us.
7446 np->istat_sem = SEM;
7447 OUTB (nc_istat, SIGP|SEM);
7452 * Reset a SCSI device (all LUNs of a target).
7454 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7457 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7459 if (ccb_h->target_id == np->myaddr ||
7460 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7461 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7462 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7466 tp = &np->target[ccb_h->target_id];
7469 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7471 np->istat_sem = SEM;
7472 OUTB (nc_istat, SIGP|SEM);
7477 * SIM action entry point.
7479 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7482 sym_action1(sim, ccb);
7486 static void sym_action1(struct cam_sim *sim, union ccb *ccb)
7493 u_char idmsg, *msgptr;
7495 struct ccb_scsiio *csio;
7496 struct ccb_hdr *ccb_h;
7498 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7501 * Retrieve our controller data structure.
7503 np = (hcb_p) cam_sim_softc(sim);
7506 * The common case is SCSI IO.
7507 * We deal with other ones elsewhere.
7509 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7510 sym_action2(sim, ccb);
7514 ccb_h = &csio->ccb_h;
7517 * Work around races.
7519 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7525 * Minimal checkings, so that we will not
7526 * go outside our tables.
7528 if (ccb_h->target_id == np->myaddr ||
7529 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7530 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7531 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7536 * Retreive the target and lun descriptors.
7538 tp = &np->target[ccb_h->target_id];
7539 lp = sym_lp(np, tp, ccb_h->target_lun);
7542 * Complete the 1st INQUIRY command with error
7543 * condition if the device is flagged NOSCAN
7544 * at BOOT in the NVRAM. This may speed up
7545 * the boot and maintain coherency with BIOS
7546 * device numbering. Clearing the flag allows
7547 * user to rescan skipped devices later.
7548 * We also return error for devices not flagged
7549 * for SCAN LUNS in the NVRAM since some mono-lun
7550 * devices behave badly when asked for some non
7551 * zero LUN. Btw, this is an absolute hack.:-)
7553 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7554 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7555 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7556 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7557 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7558 ccb_h->target_lun != 0)) {
7559 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7560 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7566 * Get a control block for this IO.
7568 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7569 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7571 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7576 * Keep track of the IO in our CCB.
7581 * Build the IDENTIFY message.
7583 idmsg = M_IDENTIFY | cp->lun;
7584 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7587 msgptr = cp->scsi_smsg;
7589 msgptr[msglen++] = idmsg;
7592 * Build the tag message if present.
7594 if (cp->tag != NO_TAG) {
7595 u_char order = csio->tag_action;
7603 order = M_SIMPLE_TAG;
7605 msgptr[msglen++] = order;
7608 * For less than 128 tags, actual tags are numbered
7609 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7610 * with devices that have problems with #TAG 0 or too
7611 * great #TAG numbers. For more tags (up to 256),
7612 * we use directly our tag number.
7614 #if SYM_CONF_MAX_TASK > (512/4)
7615 msgptr[msglen++] = cp->tag;
7617 msgptr[msglen++] = (cp->tag << 1) + 1;
7622 * Build a negotiation message if needed.
7623 * (nego_status is filled by sym_prepare_nego())
7625 cp->nego_status = 0;
7626 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7627 tp->tinfo.current.period != tp->tinfo.goal.period ||
7628 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7629 tp->tinfo.current.options != tp->tinfo.goal.options) {
7630 if (!tp->nego_cp && lp)
7631 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7641 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7642 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7647 cp->phys.select.sel_id = cp->target;
7648 cp->phys.select.sel_scntl3 = tp->head.wval;
7649 cp->phys.select.sel_sxfer = tp->head.sval;
7650 cp->phys.select.sel_scntl4 = tp->head.uval;
7655 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7656 cp->phys.smsg.size = cpu_to_scr(msglen);
7661 if (sym_setup_cdb(np, csio, cp) < 0) {
7662 sym_free_ccb(np, cp);
7663 sym_xpt_done(np, ccb);
7670 #if 0 /* Provision */
7671 cp->actualquirks = tp->quirks;
7673 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7674 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7675 cp->ssss_status = S_ILLEGAL;
7676 cp->xerr_status = 0;
7678 cp->extra_bytes = 0;
7681 * extreme data pointer.
7682 * shall be positive, so -1 is lower than lowest.:)
7688 * Build the data descriptor block
7691 sym_setup_data_and_start(np, csio, cp);
7695 * Setup buffers and pointers that address the CDB.
7696 * I bet, physical CDBs will never be used on the planet,
7697 * since they can be bounced without significant overhead.
7699 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7701 struct ccb_hdr *ccb_h;
7705 ccb_h = &csio->ccb_h;
7708 * CDB is 16 bytes max.
7710 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7711 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7714 cmd_len = csio->cdb_len;
7716 if (ccb_h->flags & CAM_CDB_POINTER) {
7717 /* CDB is a pointer */
7718 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7719 /* CDB pointer is virtual */
7720 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7721 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7723 /* CDB pointer is physical */
7725 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7727 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7732 /* CDB is in the CAM ccb (buffer) */
7733 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7734 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7737 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7738 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7744 * Set up data pointers used by SCRIPTS.
7746 static void __inline
7747 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7752 * No segments means no data.
7758 * Set the data pointer.
7762 goalp = SCRIPTA_BA (np, data_out2) + 8;
7763 lastp = goalp - 8 - (cp->segments * (2*4));
7766 cp->host_flags |= HF_DATA_IN;
7767 goalp = SCRIPTA_BA (np, data_in2) + 8;
7768 lastp = goalp - 8 - (cp->segments * (2*4));
7772 lastp = goalp = SCRIPTB_BA (np, no_data);
7776 cp->phys.head.lastp = cpu_to_scr(lastp);
7777 cp->phys.head.goalp = cpu_to_scr(goalp);
7778 cp->phys.head.savep = cpu_to_scr(lastp);
7779 cp->startp = cp->phys.head.savep;
7784 * Call back routine for the DMA map service.
7785 * If bounce buffers are used (why ?), we may sleep and then
7786 * be called there in another context.
7789 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7800 np = (hcb_p) cp->arg;
7803 * Deal with weird races.
7805 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7809 * Deal with weird errors.
7813 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7818 * Build the data descriptor for the chip.
7822 /* 896 rev 1 requires to be careful about boundaries */
7823 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7824 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7826 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7828 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7834 * Synchronize the DMA map only if we have
7835 * actually mapped the data.
7837 if (cp->dmamapped) {
7838 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7839 (cp->dmamapped == SYM_DMA_READ ?
7840 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7844 * Set host status to busy state.
7845 * May have been set back to HS_WAIT to avoid a race.
7847 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7850 * Set data pointers.
7852 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7855 * Enqueue this IO in our pending queue.
7857 sym_enqueue_cam_ccb(np, ccb);
7860 * When `#ifed 1', the code below makes the driver
7861 * panic on the first attempt to write to a SCSI device.
7862 * It is the first test we want to do after a driver
7863 * change that does not seem obviously safe. :)
7866 switch (cp->cdb_buf[0]) {
7867 case 0x0A: case 0x2A: case 0xAA:
7868 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7876 * Activate this job.
7878 sym_put_start_queue(np, cp);
7883 sym_free_ccb(np, cp);
7884 sym_xpt_done(np, ccb);
7889 * How complex it gets to deal with the data in CAM.
7890 * The Bus Dma stuff makes things still more complex.
7893 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7895 struct ccb_hdr *ccb_h;
7898 ccb_h = &csio->ccb_h;
7901 * Now deal with the data.
7903 cp->data_len = csio->dxfer_len;
7907 * No direction means no data.
7909 dir = (ccb_h->flags & CAM_DIR_MASK);
7910 if (dir == CAM_DIR_NONE) {
7911 sym_execute_ccb(cp, NULL, 0, 0);
7915 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
7917 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
7918 /* Buffer is virtual */
7921 cp->dmamapped = (dir == CAM_DIR_IN) ?
7922 SYM_DMA_READ : SYM_DMA_WRITE;
7924 retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
7925 csio->data_ptr, csio->dxfer_len,
7926 sym_execute_ccb, cp, 0);
7927 if (retv == EINPROGRESS) {
7928 cp->host_status = HS_WAIT;
7929 xpt_freeze_simq(np->sim, 1);
7930 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7934 /* Buffer is physical */
7935 struct bus_dma_segment seg;
7937 seg.ds_addr = (bus_addr_t) csio->data_ptr;
7938 sym_execute_ccb(cp, &seg, 1, 0);
7941 /* Scatter/gather list */
7942 struct bus_dma_segment *segs;
7944 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
7945 /* The SG list pointer is physical */
7946 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7950 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
7951 /* SG buffer pointers are virtual */
7952 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7956 /* SG buffer pointers are physical */
7957 segs = (struct bus_dma_segment *)csio->data_ptr;
7958 sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
7962 sym_free_ccb(np, cp);
7963 sym_xpt_done(np, (union ccb *) csio);
7967 * Move the scatter list to our data block.
7970 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7971 bus_dma_segment_t *psegs, int nsegs)
7973 struct sym_tblmove *data;
7974 bus_dma_segment_t *psegs2;
7976 if (nsegs > SYM_CONF_MAX_SG)
7979 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7980 psegs2 = &psegs[nsegs-1];
7981 cp->segments = nsegs;
7984 data->addr = cpu_to_scr(psegs2->ds_addr);
7985 data->size = cpu_to_scr(psegs2->ds_len);
7986 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7987 printf ("%s scatter: paddr=%lx len=%ld\n",
7988 sym_name(np), (long) psegs2->ds_addr,
7989 (long) psegs2->ds_len);
7991 if (psegs2 != psegs) {
8003 * Scatter a SG list with physical addresses into bus addressable chunks.
8004 * We need to ensure 16MB boundaries not to be crossed during DMA of
8005 * each segment, due to some chips being flawed.
8007 #define BOUND_MASK ((1UL<<24)-1)
8009 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8015 s = SYM_CONF_MAX_SG - 1;
8017 ps = psegs[t].ds_addr;
8018 pe = ps + psegs[t].ds_len;
8021 pn = (pe - 1) & ~BOUND_MASK;
8025 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8026 printf ("%s scatter: paddr=%lx len=%ld\n",
8027 sym_name(np), pn, k);
8029 cp->phys.data[s].addr = cpu_to_scr(pn);
8030 cp->phys.data[s].size = cpu_to_scr(k);
8035 ps = psegs[t].ds_addr;
8036 pe = ps + psegs[t].ds_len;
8042 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8044 return t >= 0 ? -1 : 0;
8049 * SIM action for non performance critical stuff.
8051 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8056 struct ccb_hdr *ccb_h;
8059 * Retrieve our controller data structure.
8061 np = (hcb_p) cam_sim_softc(sim);
8063 ccb_h = &ccb->ccb_h;
8065 switch (ccb_h->func_code) {
8066 case XPT_SET_TRAN_SETTINGS:
8068 struct ccb_trans_settings *cts;
8071 tp = &np->target[ccb_h->target_id];
8074 * Update SPI transport settings in TARGET control block.
8075 * Update SCSI device settings in LUN control block.
8077 lp = sym_lp(np, tp, ccb_h->target_lun);
8078 #ifdef FreeBSD_New_Tran_Settings
8079 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8081 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8083 sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8085 sym_update_dflags(np, &lp->current_flags, cts);
8087 #ifdef FreeBSD_New_Tran_Settings
8088 if (cts->type == CTS_TYPE_USER_SETTINGS) {
8090 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
8092 sym_update_trans(np, tp, &tp->tinfo.user, cts);
8094 sym_update_dflags(np, &lp->user_flags, cts);
8097 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8100 case XPT_GET_TRAN_SETTINGS:
8102 struct ccb_trans_settings *cts;
8103 struct sym_trans *tip;
8107 tp = &np->target[ccb_h->target_id];
8108 lp = sym_lp(np, tp, ccb_h->target_lun);
8110 #ifdef FreeBSD_New_Tran_Settings
8111 #define cts__scsi (&cts->proto_specific.scsi)
8112 #define cts__spi (&cts->xport_specific.spi)
8113 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8114 tip = &tp->tinfo.current;
8115 dflags = lp ? lp->current_flags : 0;
8118 tip = &tp->tinfo.user;
8119 dflags = lp ? lp->user_flags : tp->usrflags;
8122 cts->protocol = PROTO_SCSI;
8123 cts->transport = XPORT_SPI;
8124 cts->protocol_version = tip->scsi_version;
8125 cts->transport_version = tip->spi_version;
8127 cts__spi->sync_period = tip->period;
8128 cts__spi->sync_offset = tip->offset;
8129 cts__spi->bus_width = tip->width;
8130 cts__spi->ppr_options = tip->options;
8132 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8133 | CTS_SPI_VALID_SYNC_OFFSET
8134 | CTS_SPI_VALID_BUS_WIDTH
8135 | CTS_SPI_VALID_PPR_OPTIONS;
8137 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8138 if (dflags & SYM_DISC_ENABLED)
8139 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8140 cts__spi->valid |= CTS_SPI_VALID_DISC;
8142 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8143 if (dflags & SYM_TAGS_ENABLED)
8144 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8145 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8149 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8150 tip = &tp->tinfo.current;
8151 dflags = lp ? lp->current_flags : 0;
8154 tip = &tp->tinfo.user;
8155 dflags = lp ? lp->user_flags : tp->usrflags;
8158 cts->sync_period = tip->period;
8159 cts->sync_offset = tip->offset;
8160 cts->bus_width = tip->width;
8162 cts->valid = CCB_TRANS_SYNC_RATE_VALID
8163 | CCB_TRANS_SYNC_OFFSET_VALID
8164 | CCB_TRANS_BUS_WIDTH_VALID;
8166 cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
8168 if (dflags & SYM_DISC_ENABLED)
8169 cts->flags |= CCB_TRANS_DISC_ENB;
8171 if (dflags & SYM_TAGS_ENABLED)
8172 cts->flags |= CCB_TRANS_TAG_ENB;
8174 cts->valid |= CCB_TRANS_DISC_VALID;
8175 cts->valid |= CCB_TRANS_TQ_VALID;
8177 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8180 case XPT_CALC_GEOMETRY:
8182 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8183 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8188 struct ccb_pathinq *cpi = &ccb->cpi;
8189 cpi->version_num = 1;
8190 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8191 if ((np->features & FE_WIDE) != 0)
8192 cpi->hba_inquiry |= PI_WIDE_16;
8193 cpi->target_sprt = 0;
8195 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8196 cpi->hba_misc |= PIM_SCANHILO;
8197 if (np->usrflags & SYM_AVOID_BUS_RESET)
8198 cpi->hba_misc |= PIM_NOBUSRESET;
8199 cpi->hba_eng_cnt = 0;
8200 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8201 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8202 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8203 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8204 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8205 cpi->bus_id = cam_sim_bus(sim);
8206 cpi->initiator_id = np->myaddr;
8207 cpi->base_transfer_speed = 3300;
8208 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8209 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8210 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8211 cpi->unit_number = cam_sim_unit(sim);
8213 #ifdef FreeBSD_New_Tran_Settings
8214 cpi->protocol = PROTO_SCSI;
8215 cpi->protocol_version = SCSI_REV_2;
8216 cpi->transport = XPORT_SPI;
8217 cpi->transport_version = 2;
8218 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8219 if (np->features & FE_ULTRA3) {
8220 cpi->transport_version = 3;
8221 cpi->xport_specific.spi.ppr_options =
8222 SID_SPI_CLOCK_DT_ST;
8225 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8230 union ccb *abort_ccb = ccb->cab.abort_ccb;
8231 switch(abort_ccb->ccb_h.func_code) {
8233 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8234 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8238 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8245 sym_reset_dev(np, ccb);
8250 sym_reset_scsi_bus(np, 0);
8252 xpt_print_path(np->path);
8253 printf("SCSI BUS reset delivered.\n");
8256 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8259 case XPT_ACCEPT_TARGET_IO:
8260 case XPT_CONT_TARGET_IO:
8262 case XPT_NOTIFY_ACK:
8263 case XPT_IMMED_NOTIFY:
8266 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8272 * Asynchronous notification handler.
8275 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8278 struct cam_sim *sim;
8285 sim = (struct cam_sim *) cb_arg;
8286 np = (hcb_p) cam_sim_softc(sim);
8289 case AC_LOST_DEVICE:
8290 tn = xpt_path_target_id(path);
8291 if (tn >= SYM_CONF_MAX_TARGET)
8294 tp = &np->target[tn];
8298 tp->head.wval = np->rv_scntl3;
8301 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8302 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8303 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8304 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8315 * Update transfer settings of a target.
8317 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8318 struct ccb_trans_settings *cts)
8323 #ifdef FreeBSD_New_Tran_Settings
8324 #define cts__spi (&cts->xport_specific.spi)
8325 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8326 tip->width = cts__spi->bus_width;
8327 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8328 tip->offset = cts__spi->sync_offset;
8329 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8330 tip->period = cts__spi->sync_period;
8331 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8332 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8333 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8334 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8335 tip->scsi_version = cts->protocol_version;
8336 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8337 cts->transport_version != XPORT_VERSION_UNKNOWN)
8338 tip->spi_version = cts->transport_version;
8341 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
8342 tip->width = cts->bus_width;
8343 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
8344 tip->offset = cts->sync_offset;
8345 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
8346 tip->period = cts->sync_period;
8349 * Scale against driver configuration limits.
8351 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8352 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8353 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8356 * Scale against actual controller BUS width.
8358 if (tip->width > np->maxwide)
8359 tip->width = np->maxwide;
8361 #ifdef FreeBSD_New_Tran_Settings
8363 * Only accept DT if controller supports and SYNC/WIDE asked.
8365 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8366 !(tip->width == BUS_16_BIT && tip->offset)) {
8367 tip->options &= ~PPR_OPT_DT;
8371 * For now, only assume DT if period <= 9, BUS 16 and offset != 0.
8374 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3) &&
8375 tip->period <= 9 && tip->width == BUS_16_BIT && tip->offset) {
8376 tip->options |= PPR_OPT_DT;
8381 * Scale period factor and offset against controller limits.
8383 if (tip->options & PPR_OPT_DT) {
8384 if (tip->period < np->minsync_dt)
8385 tip->period = np->minsync_dt;
8386 if (tip->period > np->maxsync_dt)
8387 tip->period = np->maxsync_dt;
8388 if (tip->offset > np->maxoffs_dt)
8389 tip->offset = np->maxoffs_dt;
8392 if (tip->period < np->minsync)
8393 tip->period = np->minsync;
8394 if (tip->period > np->maxsync)
8395 tip->period = np->maxsync;
8396 if (tip->offset > np->maxoffs)
8397 tip->offset = np->maxoffs;
8402 * Update flags for a device (logical unit).
8405 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8407 #ifdef FreeBSD_New_Tran_Settings
8408 #define cts__scsi (&cts->proto_specific.scsi)
8409 #define cts__spi (&cts->xport_specific.spi)
8410 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8411 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8412 *flags |= SYM_DISC_ENABLED;
8414 *flags &= ~SYM_DISC_ENABLED;
8417 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8418 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8419 *flags |= SYM_TAGS_ENABLED;
8421 *flags &= ~SYM_TAGS_ENABLED;
8426 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
8427 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
8428 *flags |= SYM_DISC_ENABLED;
8430 *flags &= ~SYM_DISC_ENABLED;
8433 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
8434 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
8435 *flags |= SYM_TAGS_ENABLED;
8437 *flags &= ~SYM_TAGS_ENABLED;
8443 /*============= DRIVER INITIALISATION ==================*/
8446 static device_method_t sym_pci_methods[] = {
8447 DEVMETHOD(device_probe, sym_pci_probe),
8448 DEVMETHOD(device_attach, sym_pci_attach),
8452 static driver_t sym_pci_driver = {
8455 sizeof(struct sym_hcb)
8458 static devclass_t sym_devclass;
8460 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, 0, 0);
8461 MODULE_DEPEND(sym, cam, 1, 1, 1);
8462 MODULE_DEPEND(sym, pci, 1, 1, 1);
8465 static struct sym_pci_chip sym_pci_dev_table[] = {
8466 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8469 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8470 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8474 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8475 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8478 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8481 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8482 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8484 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8485 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8487 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8488 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8490 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8491 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8494 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8495 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8498 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8499 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8502 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8503 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8506 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8507 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8508 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8512 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8513 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8517 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8518 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8519 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8521 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8522 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8523 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8525 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8526 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8527 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8530 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8531 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8532 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8535 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8536 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8537 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8540 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8541 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8542 FE_RAM|FE_IO256|FE_LEDC}
8545 #define sym_pci_num_devs \
8546 (sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
8549 * Look up the chip table.
8551 * Return a pointer to the chip entry if found,
8554 static struct sym_pci_chip *
8555 sym_find_pci_chip(device_t dev)
8557 struct sym_pci_chip *chip;
8562 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8565 device_id = pci_get_device(dev);
8566 revision = pci_get_revid(dev);
8568 for (i = 0; i < sym_pci_num_devs; i++) {
8569 chip = &sym_pci_dev_table[i];
8570 if (device_id != chip->device_id)
8572 if (revision > chip->revision_id)
8581 * Tell upper layer if the chip is supported.
8584 sym_pci_probe(device_t dev)
8586 struct sym_pci_chip *chip;
8588 chip = sym_find_pci_chip(dev);
8589 if (chip && sym_find_firmware(chip)) {
8590 device_set_desc(dev, chip->name);
8591 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8592 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8598 * Attach a sym53c8xx device.
8601 sym_pci_attach(device_t dev)
8603 struct sym_pci_chip *chip;
8606 struct sym_hcb *np = 0;
8607 struct sym_nvram nvram;
8608 struct sym_fw *fw = 0;
8610 bus_dma_tag_t bus_dmat;
8613 * I expected to be told about a parent
8614 * DMA tag, but didn't find any.
8619 * Only probed devices should be attached.
8620 * We just enjoy being paranoid. :)
8622 chip = sym_find_pci_chip(dev);
8623 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8627 * Allocate immediately the host control block,
8628 * since we are only expecting to succeed. :)
8629 * We keep track in the HCB of all the resources that
8630 * are to be released on error.
8632 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8634 np->bus_dmat = bus_dmat;
8639 * Copy some useful infos to the HCB.
8641 np->hcb_ba = vtobus(np);
8642 np->verbose = bootverbose;
8644 np->unit = device_get_unit(dev);
8645 np->device_id = pci_get_device(dev);
8646 np->revision_id = pci_get_revid(dev);
8647 np->features = chip->features;
8648 np->clock_divn = chip->nr_divisor;
8649 np->maxoffs = chip->offset_max;
8650 np->maxburst = chip->burst_max;
8651 np->scripta_sz = fw->a_size;
8652 np->scriptb_sz = fw->b_size;
8653 np->fw_setup = fw->setup;
8654 np->fw_patch = fw->patch;
8655 np->fw_name = fw->name;
8660 snprintf(np->inst_name, sizeof(np->inst_name), "sym%d", np->unit);
8663 * Initialyze the CCB free and busy queues.
8665 sym_que_init(&np->free_ccbq);
8666 sym_que_init(&np->busy_ccbq);
8667 sym_que_init(&np->comp_ccbq);
8668 sym_que_init(&np->cam_ccbq);
8671 * Allocate a tag for the DMA of user data.
8673 if (bus_dma_tag_create(np->bus_dmat, 1, (1<<24),
8674 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
8676 BUS_SPACE_MAXSIZE, SYM_CONF_MAX_SG,
8677 (1<<24), 0, busdma_lock_mutex, &Giant,
8679 device_printf(dev, "failed to create DMA tag.\n");
8683 * Read and apply some fix-ups to the PCI COMMAND
8684 * register. We want the chip to be enabled for:
8686 * - PCI parity checking (reporting would also be fine)
8687 * - Write And Invalidate.
8689 command = pci_read_config(dev, PCIR_COMMAND, 2);
8690 command |= PCIM_CMD_BUSMASTEREN;
8691 command |= PCIM_CMD_PERRESPEN;
8692 command |= /* PCIM_CMD_MWIEN */ 0x0010;
8693 pci_write_config(dev, PCIR_COMMAND, command, 2);
8696 * Let the device know about the cache line size,
8697 * if it doesn't yet.
8699 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8702 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8706 * Alloc/get/map/retrieve everything that deals with MMIO.
8708 if ((command & PCIM_CMD_MEMEN) != 0) {
8709 int regs_id = SYM_PCI_MMIO;
8710 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8711 ®s_id, RF_ACTIVE);
8713 if (!np->mmio_res) {
8714 device_printf(dev, "failed to allocate MMIO resources\n");
8717 np->mmio_bsh = rman_get_bushandle(np->mmio_res);
8718 np->mmio_tag = rman_get_bustag(np->mmio_res);
8719 np->mmio_pa = rman_get_start(np->mmio_res);
8720 np->mmio_va = (vm_offset_t) rman_get_virtual(np->mmio_res);
8721 np->mmio_ba = np->mmio_pa;
8727 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8728 RF_ACTIVE | RF_SHAREABLE);
8730 device_printf(dev, "failed to allocate IRQ resource\n");
8734 #ifdef SYM_CONF_IOMAPPED
8736 * User want us to use normal IO with PCI.
8737 * Alloc/get/map/retrieve everything that deals with IO.
8739 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
8740 int regs_id = SYM_PCI_IO;
8741 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
8742 ®s_id, RF_ACTIVE);
8745 device_printf(dev, "failed to allocate IO resources\n");
8748 np->io_bsh = rman_get_bushandle(np->io_res);
8749 np->io_tag = rman_get_bustag(np->io_res);
8750 np->io_port = rman_get_start(np->io_res);
8752 #endif /* SYM_CONF_IOMAPPED */
8755 * If the chip has RAM.
8756 * Alloc/get/map/retrieve the corresponding resources.
8758 if ((np->features & (FE_RAM|FE_RAM8K)) &&
8759 (command & PCIM_CMD_MEMEN) != 0) {
8760 int regs_id = SYM_PCI_RAM;
8761 if (np->features & FE_64BIT)
8762 regs_id = SYM_PCI_RAM64;
8763 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8764 ®s_id, RF_ACTIVE);
8766 device_printf(dev,"failed to allocate RAM resources\n");
8769 np->ram_id = regs_id;
8770 np->ram_bsh = rman_get_bushandle(np->ram_res);
8771 np->ram_tag = rman_get_bustag(np->ram_res);
8772 np->ram_pa = rman_get_start(np->ram_res);
8773 np->ram_va = (vm_offset_t) rman_get_virtual(np->ram_res);
8774 np->ram_ba = np->ram_pa;
8778 * Save setting of some IO registers, so we will
8779 * be able to probe specific implementations.
8781 sym_save_initial_setting (np);
8784 * Reset the chip now, since it has been reported
8785 * that SCSI clock calibration may not work properly
8786 * if the chip is currently active.
8788 sym_chip_reset (np);
8791 * Try to read the user set-up.
8793 (void) sym_read_nvram(np, &nvram);
8796 * Prepare controller and devices settings, according
8797 * to chip features, user set-up and driver set-up.
8799 (void) sym_prepare_setting(np, &nvram);
8802 * Check the PCI clock frequency.
8803 * Must be performed after prepare_setting since it destroys
8804 * STEST1 that is used to probe for the clock doubler.
8806 i = sym_getpciclock(np);
8808 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8811 * Allocate the start queue.
8813 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8816 np->squeue_ba = vtobus(np->squeue);
8819 * Allocate the done queue.
8821 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8824 np->dqueue_ba = vtobus(np->dqueue);
8827 * Allocate the target bus address array.
8829 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8832 np->targtbl_ba = vtobus(np->targtbl);
8835 * Allocate SCRIPTS areas.
8837 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8838 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8839 if (!np->scripta0 || !np->scriptb0)
8843 * Allocate some CCB. We need at least ONE.
8845 if (!sym_alloc_ccb(np))
8849 * Calculate BUS addresses where we are going
8850 * to load the SCRIPTS.
8852 np->scripta_ba = vtobus(np->scripta0);
8853 np->scriptb_ba = vtobus(np->scriptb0);
8854 np->scriptb0_ba = np->scriptb_ba;
8857 np->scripta_ba = np->ram_ba;
8858 if (np->features & FE_RAM8K) {
8860 np->scriptb_ba = np->scripta_ba + 4096;
8862 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8870 * Copy scripts to controller instance.
8872 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8873 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8876 * Setup variable parts in scripts and compute
8877 * scripts bus addresses used from the C code.
8879 np->fw_setup(np, fw);
8882 * Bind SCRIPTS with physical addresses usable by the
8883 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8885 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8886 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8888 #ifdef SYM_CONF_IARB_SUPPORT
8890 * If user wants IARB to be set when we win arbitration
8891 * and have other jobs, compute the max number of consecutive
8892 * settings of IARB hints before we leave devices a chance to
8893 * arbitrate for reselection.
8895 #ifdef SYM_SETUP_IARB_MAX
8896 np->iarb_max = SYM_SETUP_IARB_MAX;
8903 * Prepare the idle and invalid task actions.
8905 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8906 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8907 np->idletask_ba = vtobus(&np->idletask);
8909 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8910 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8911 np->notask_ba = vtobus(&np->notask);
8913 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8914 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8915 np->bad_itl_ba = vtobus(&np->bad_itl);
8917 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8918 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8919 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8922 * Allocate and prepare the lun JUMP table that is used
8923 * for a target prior the probing of devices (bad lun table).
8924 * A private table will be allocated for the target on the
8925 * first INQUIRY response received.
8927 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8931 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8932 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8933 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8936 * Prepare the bus address array that contains the bus
8937 * address of each target control block.
8938 * For now, assume all logical units are wrong. :)
8940 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8941 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8942 np->target[i].head.luntbl_sa =
8943 cpu_to_scr(vtobus(np->badluntbl));
8944 np->target[i].head.lun0_sa =
8945 cpu_to_scr(vtobus(&np->badlun_sa));
8949 * Now check the cache handling of the pci chipset.
8951 if (sym_snooptest (np)) {
8952 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8957 * Now deal with CAM.
8958 * Hopefully, we will succeed with that one.:)
8960 if (!sym_cam_attach(np))
8964 * Sigh! we are done.
8970 * We will try to free all the resources we have
8971 * allocated, but if we are a boot device, this
8972 * will not help that much.;)
8981 * Free everything that have been allocated for this device.
8983 static void sym_pci_free(hcb_p np)
8993 * First free CAM resources.
9000 * Now every should be quiet for us to
9001 * free other resources.
9004 bus_release_resource(np->device, SYS_RES_MEMORY,
9005 np->ram_id, np->ram_res);
9007 bus_release_resource(np->device, SYS_RES_MEMORY,
9008 SYM_PCI_MMIO, np->mmio_res);
9010 bus_release_resource(np->device, SYS_RES_IOPORT,
9011 SYM_PCI_IO, np->io_res);
9013 bus_release_resource(np->device, SYS_RES_IRQ,
9017 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
9019 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
9021 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
9023 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
9025 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
9026 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
9027 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
9028 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
9029 sym_mfree_dma(cp, sizeof(*cp), "CCB");
9033 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
9035 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
9036 tp = &np->target[target];
9037 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
9038 lp = sym_lp(np, tp, lun);
9042 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
9045 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
9047 sym_mfree_dma(lp, sizeof(*lp), "LCB");
9049 #if SYM_CONF_MAX_LUN > 1
9051 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
9056 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
9058 bus_dma_tag_destroy(np->data_dmat);
9059 sym_mfree_dma(np, sizeof(*np), "HCB");
9063 * Allocate CAM resources and register a bus to CAM.
9065 static int sym_cam_attach(hcb_p np)
9067 struct cam_devq *devq = 0;
9068 struct cam_sim *sim = 0;
9069 struct cam_path *path = 0;
9070 struct ccb_setasync csa;
9076 * Establish our interrupt handler.
9078 err = bus_setup_intr(np->device, np->irq_res,
9079 INTR_TYPE_CAM | INTR_ENTROPY, sym_intr, np,
9082 device_printf(np->device, "bus_setup_intr() failed: %d\n",
9088 * Create the device queue for our sym SIM.
9090 devq = cam_simq_alloc(SYM_CONF_MAX_START);
9095 * Construct our SIM entry.
9097 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np, np->unit,
9098 1, SYM_SETUP_MAX_TAG, devq);
9103 if (xpt_bus_register(sim, 0) != CAM_SUCCESS)
9108 if (xpt_create_path(&path, 0,
9109 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
9110 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
9116 * Establish our async notification handler.
9118 xpt_setup_ccb(&csa.ccb_h, np->path, 5);
9119 csa.ccb_h.func_code = XPT_SASYNC_CB;
9120 csa.event_enable = AC_LOST_DEVICE;
9121 csa.callback = sym_async;
9122 csa.callback_arg = np->sim;
9123 xpt_action((union ccb *)&csa);
9126 * Start the chip now, without resetting the BUS, since
9127 * it seems that this must stay under control of CAM.
9128 * With LVD/SE capable chips and BUS in SE mode, we may
9129 * get a spurious SMBC interrupt.
9137 cam_sim_free(sim, FALSE);
9139 cam_simq_free(devq);
9148 * Free everything that deals with CAM.
9150 static void sym_cam_free(hcb_p np)
9153 bus_teardown_intr(np->device, np->irq_res, np->intr);
9158 xpt_bus_deregister(cam_sim_path(np->sim));
9159 cam_sim_free(np->sim, /*free_devq*/ TRUE);
9163 xpt_free_path(np->path);
9168 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9171 * Get host setup from NVRAM.
9173 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9175 #ifdef SYM_CONF_NVRAM_SUPPORT
9177 * Get parity checking, host ID, verbose mode
9178 * and miscellaneous host flags from NVRAM.
9180 switch(nvram->type) {
9181 case SYM_SYMBIOS_NVRAM:
9182 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9183 np->rv_scntl0 &= ~0x0a;
9184 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9185 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9187 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9188 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9189 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9190 np->usrflags |= SYM_AVOID_BUS_RESET;
9192 case SYM_TEKRAM_NVRAM:
9193 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9202 * Get target setup from NVRAM.
9204 #ifdef SYM_CONF_NVRAM_SUPPORT
9205 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9206 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9210 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9212 #ifdef SYM_CONF_NVRAM_SUPPORT
9214 case SYM_SYMBIOS_NVRAM:
9215 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9217 case SYM_TEKRAM_NVRAM:
9218 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9226 #ifdef SYM_CONF_NVRAM_SUPPORT
9228 * Get target set-up from Symbios format NVRAM.
9231 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9233 tcb_p tp = &np->target[target];
9234 Symbios_target *tn = &nvram->target[target];
9236 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9237 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9239 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9241 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9242 tp->usrflags &= ~SYM_DISC_ENABLED;
9243 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9244 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9245 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9246 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9250 * Get target set-up from Tekram format NVRAM.
9253 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9255 tcb_p tp = &np->target[target];
9256 struct Tekram_target *tn = &nvram->target[target];
9259 if (tn->flags & TEKRAM_SYNC_NEGO) {
9260 i = tn->sync_index & 0xf;
9261 tp->tinfo.user.period = Tekram_sync[i];
9264 tp->tinfo.user.width =
9265 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9267 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9268 tp->usrtags = 2 << nvram->max_tags_index;
9271 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9272 tp->usrflags |= SYM_DISC_ENABLED;
9274 /* If any device does not support parity, we will not use this option */
9275 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9276 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9279 #ifdef SYM_CONF_DEBUG_NVRAM
9281 * Dump Symbios format NVRAM for debugging purpose.
9283 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9287 /* display Symbios nvram host data */
9288 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9289 sym_name(np), nvram->host_id & 0x0f,
9290 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9291 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9292 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9293 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9294 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9295 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9297 /* display Symbios nvram drive data */
9298 for (i = 0 ; i < 15 ; i++) {
9299 struct Symbios_target *tn = &nvram->target[i];
9300 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9302 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9303 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9304 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9305 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9307 tn->sync_period / 4,
9313 * Dump TEKRAM format NVRAM for debugging purpose.
9315 static u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9316 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9318 int i, tags, boot_delay;
9321 /* display Tekram nvram host data */
9322 tags = 2 << nvram->max_tags_index;
9324 if (nvram->boot_delay_index < 6)
9325 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9326 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9328 case 0: rem = ""; break;
9329 case 1: rem = " REMOVABLE=boot device"; break;
9330 case 2: rem = " REMOVABLE=all"; break;
9333 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9334 sym_name(np), nvram->host_id & 0x0f,
9335 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9336 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9337 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9338 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9339 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9340 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9341 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9342 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9343 rem, boot_delay, tags);
9345 /* display Tekram nvram drive data */
9346 for (i = 0; i <= 15; i++) {
9348 struct Tekram_target *tn = &nvram->target[i];
9349 j = tn->sync_index & 0xf;
9350 sync = Tekram_sync[j];
9351 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9353 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9354 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9355 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9356 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9357 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9358 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9362 #endif /* SYM_CONF_DEBUG_NVRAM */
9363 #endif /* SYM_CONF_NVRAM_SUPPORT */
9367 * Try reading Symbios or Tekram NVRAM
9369 #ifdef SYM_CONF_NVRAM_SUPPORT
9370 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9371 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9374 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9376 #ifdef SYM_CONF_NVRAM_SUPPORT
9378 * Try to read SYMBIOS nvram.
9379 * Try to read TEKRAM nvram if Symbios nvram not found.
9381 if (SYM_SETUP_SYMBIOS_NVRAM &&
9382 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9383 nvp->type = SYM_SYMBIOS_NVRAM;
9384 #ifdef SYM_CONF_DEBUG_NVRAM
9385 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9388 else if (SYM_SETUP_TEKRAM_NVRAM &&
9389 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9390 nvp->type = SYM_TEKRAM_NVRAM;
9391 #ifdef SYM_CONF_DEBUG_NVRAM
9392 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9404 #ifdef SYM_CONF_NVRAM_SUPPORT
9406 * 24C16 EEPROM reading.
9408 * GPOI0 - data in/data out
9410 * Symbios NVRAM wiring now also used by Tekram.
9419 * Set/clear data/clock bit in GPIO0
9421 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9427 *gpreg |= write_bit;
9440 OUTB (nc_gpreg, *gpreg);
9445 * Send START condition to NVRAM to wake it up.
9447 static void S24C16_start(hcb_p np, u_char *gpreg)
9449 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9450 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9451 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9452 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9456 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9458 static void S24C16_stop(hcb_p np, u_char *gpreg)
9460 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9461 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9465 * Read or write a bit to the NVRAM,
9466 * read if GPIO0 input else write if GPIO0 output
9468 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9471 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9472 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9474 *read_bit = INB (nc_gpreg);
9475 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9476 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9480 * Output an ACK to the NVRAM after reading,
9481 * change GPIO0 to output and when done back to an input
9483 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9486 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9487 S24C16_do_bit(np, 0, write_bit, gpreg);
9488 OUTB (nc_gpcntl, *gpcntl);
9492 * Input an ACK from NVRAM after writing,
9493 * change GPIO0 to input and when done back to an output
9495 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9498 OUTB (nc_gpcntl, *gpcntl | 0x01);
9499 S24C16_do_bit(np, read_bit, 1, gpreg);
9500 OUTB (nc_gpcntl, *gpcntl);
9504 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9505 * GPIO0 must already be set as an output
9507 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9508 u_char *gpreg, u_char *gpcntl)
9512 for (x = 0; x < 8; x++)
9513 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9515 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9519 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9520 * GPIO0 must already be set as an input
9522 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9523 u_char *gpreg, u_char *gpcntl)
9529 for (x = 0; x < 8; x++) {
9530 S24C16_do_bit(np, &read_bit, 1, gpreg);
9531 *read_data |= ((read_bit & 0x01) << (7 - x));
9534 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9538 * Read 'len' bytes starting at 'offset'.
9540 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9542 u_char gpcntl, gpreg;
9543 u_char old_gpcntl, old_gpreg;
9548 /* save current state of GPCNTL and GPREG */
9549 old_gpreg = INB (nc_gpreg);
9550 old_gpcntl = INB (nc_gpcntl);
9551 gpcntl = old_gpcntl & 0x1c;
9553 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9554 OUTB (nc_gpreg, old_gpreg);
9555 OUTB (nc_gpcntl, gpcntl);
9557 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9559 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9560 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9562 /* now set NVRAM inactive with GPIO0/1 both high */
9563 S24C16_stop(np, &gpreg);
9565 /* activate NVRAM */
9566 S24C16_start(np, &gpreg);
9568 /* write device code and random address MSB */
9569 S24C16_write_byte(np, &ack_data,
9570 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9571 if (ack_data & 0x01)
9574 /* write random address LSB */
9575 S24C16_write_byte(np, &ack_data,
9576 offset & 0xff, &gpreg, &gpcntl);
9577 if (ack_data & 0x01)
9580 /* regenerate START state to set up for reading */
9581 S24C16_start(np, &gpreg);
9583 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9584 S24C16_write_byte(np, &ack_data,
9585 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9586 if (ack_data & 0x01)
9589 /* now set up GPIO0 for inputting data */
9591 OUTB (nc_gpcntl, gpcntl);
9593 /* input all requested data - only part of total NVRAM */
9594 for (x = 0; x < len; x++)
9595 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9597 /* finally put NVRAM back in inactive mode */
9599 OUTB (nc_gpcntl, gpcntl);
9600 S24C16_stop(np, &gpreg);
9603 /* return GPIO0/1 to original states after having accessed NVRAM */
9604 OUTB (nc_gpcntl, old_gpcntl);
9605 OUTB (nc_gpreg, old_gpreg);
9610 #undef SET_BIT /* 0 */
9611 #undef CLR_BIT /* 1 */
9612 #undef SET_CLK /* 2 */
9613 #undef CLR_CLK /* 3 */
9616 * Try reading Symbios NVRAM.
9619 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9621 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9622 u_char *data = (u_char *) nvram;
9623 int len = sizeof(*nvram);
9627 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9628 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9631 /* check valid NVRAM signature, verify byte count and checksum */
9632 if (nvram->type != 0 ||
9633 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9634 nvram->byte_count != len - 12)
9637 /* verify checksum */
9638 for (x = 6, csum = 0; x < len - 6; x++)
9640 if (csum != nvram->checksum)
9647 * 93C46 EEPROM reading.
9652 * GPIO4 - chip select
9658 * Pulse clock bit in GPIO0
9660 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9662 OUTB (nc_gpreg, *gpreg | 0x04);
9664 OUTB (nc_gpreg, *gpreg);
9668 * Read bit from NVRAM
9670 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9673 T93C46_Clk(np, gpreg);
9674 *read_bit = INB (nc_gpreg);
9678 * Write bit to GPIO0
9680 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9682 if (write_bit & 0x01)
9689 OUTB (nc_gpreg, *gpreg);
9692 T93C46_Clk(np, gpreg);
9696 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9698 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9701 OUTB (nc_gpreg, *gpreg);
9704 T93C46_Clk(np, gpreg);
9708 * Send read command and address to NVRAM
9710 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9711 u_char *read_bit, u_char *gpreg)
9715 /* send 9 bits, start bit (1), command (2), address (6) */
9716 for (x = 0; x < 9; x++)
9717 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9719 *read_bit = INB (nc_gpreg);
9723 * READ 2 bytes from the NVRAM
9725 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9731 for (x = 0; x < 16; x++) {
9732 T93C46_Read_Bit(np, &read_bit, gpreg);
9734 if (read_bit & 0x01)
9735 *nvram_data |= (0x01 << (15 - x));
9737 *nvram_data &= ~(0x01 << (15 - x));
9742 * Read Tekram NvRAM data.
9744 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9749 for (x = 0; x < len; x++) {
9751 /* output read command and address */
9752 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9753 if (read_bit & 0x01)
9755 T93C46_Read_Word(np, &data[x], gpreg);
9756 T93C46_Stop(np, gpreg);
9763 * Try reading 93C46 Tekram NVRAM.
9765 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9767 u_char gpcntl, gpreg;
9768 u_char old_gpcntl, old_gpreg;
9771 /* save current state of GPCNTL and GPREG */
9772 old_gpreg = INB (nc_gpreg);
9773 old_gpcntl = INB (nc_gpcntl);
9775 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9777 gpreg = old_gpreg & 0xe9;
9778 OUTB (nc_gpreg, gpreg);
9779 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9780 OUTB (nc_gpcntl, gpcntl);
9782 /* input all of NVRAM, 64 words */
9783 retv = T93C46_Read_Data(np, (u_short *) nvram,
9784 sizeof(*nvram) / sizeof(short), &gpreg);
9786 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9787 OUTB (nc_gpcntl, old_gpcntl);
9788 OUTB (nc_gpreg, old_gpreg);
9794 * Try reading Tekram NVRAM.
9797 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9799 u_char *data = (u_char *) nvram;
9800 int len = sizeof(*nvram);
9804 switch (np->device_id) {
9805 case PCI_ID_SYM53C885:
9806 case PCI_ID_SYM53C895:
9807 case PCI_ID_SYM53C896:
9808 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9811 case PCI_ID_SYM53C875:
9812 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9817 x = sym_read_T93C46_nvram(np, nvram);
9823 /* verify checksum */
9824 for (x = 0, csum = 0; x < len - 1; x += 2)
9825 csum += data[x] + (data[x+1] << 8);
9832 #endif /* SYM_CONF_NVRAM_SUPPORT */