2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
60 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
62 /* #define SYM_DEBUG_GENERIC_SUPPORT */
63 /* #define CAM_NEW_TRAN_CODE */
65 #include <sys/param.h>
68 * Only use the BUS stuff for PCI under FreeBSD 4 and later versions.
69 * Note that the old BUS stuff also works for FreeBSD 4 and spares
70 * about 1 KB for the driver object file.
72 #if __FreeBSD_version >= 400000
73 #define FreeBSD_Bus_Dma_Abstraction
74 #define FreeBSD_Bus_Io_Abstraction
75 #define FreeBSD_Bus_Space_Abstraction
79 * Driver configuration options.
82 #include <dev/sym/sym_conf.h>
84 #ifndef FreeBSD_Bus_Io_Abstraction
85 #include "ncr.h" /* To know if the ncr has been configured */
88 #include <sys/systm.h>
89 #include <sys/malloc.h>
90 #include <sys/endian.h>
91 #include <sys/kernel.h>
92 #ifdef FreeBSD_Bus_Io_Abstraction
93 #include <sys/module.h>
99 #include <pci/pcireg.h>
100 #include <pci/pcivar.h>
102 #ifdef FreeBSD_Bus_Space_Abstraction
103 #include <machine/bus_memio.h>
105 * Only include bus_pio if needed.
106 * This avoids bus space primitives to be uselessly bloated
107 * by out-of-age PIO operations.
109 #ifdef SYM_CONF_IOMAPPED
110 #include <machine/bus_pio.h>
113 #include <machine/bus.h>
115 #ifdef FreeBSD_Bus_Io_Abstraction
116 #include <machine/resource.h>
117 #include <sys/rman.h>
121 #include <cam/cam_ccb.h>
122 #include <cam/cam_sim.h>
123 #include <cam/cam_xpt_sim.h>
124 #include <cam/cam_debug.h>
126 #include <cam/scsi/scsi_all.h>
127 #include <cam/scsi/scsi_message.h>
130 #include <vm/vm_param.h>
133 /* Short and quite clear integer types */
138 typedef u_int16_t u16;
139 typedef u_int32_t u32;
142 * From 'cam.error_recovery_diffs.20010313.context' patch.
144 #ifdef CAM_NEW_TRAN_CODE
145 #define FreeBSD_New_Tran_Settings
146 #endif /* CAM_NEW_TRAN_CODE */
149 * Driver definitions.
151 #include <dev/sym/sym_defs.h>
152 #include <dev/sym/sym_fw.h>
155 * IA32 architecture does not reorder STORES and prevents
156 * LOADS from passing STORES. It is called `program order'
157 * by Intel and allows device drivers to deal with memory
158 * ordering by only ensuring that the code is not reordered
159 * by the compiler when ordering is required.
160 * Other architectures implement a weaker ordering that
161 * requires memory barriers (and also IO barriers when they
162 * make sense) to be used.
166 #define MEMORY_BARRIER() do { ; } while(0)
167 #elif defined __alpha__
168 #define MEMORY_BARRIER() alpha_mb()
169 #elif defined __powerpc__
170 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
171 #elif defined __ia64__
172 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
173 #elif defined __sparc64__
174 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
176 #error "Not supported platform"
180 * Portable but silly implemented byte order primitives.
181 * We define the primitives we need, since FreeBSD doesn't
182 * seem to have them yet.
184 #if BYTE_ORDER == BIG_ENDIAN
186 #define __revb16(x) ( (((u16)(x) & (u16)0x00ffU) << 8) | \
187 (((u16)(x) & (u16)0xff00U) >> 8) )
188 #define __revb32(x) ( (((u32)(x) & 0x000000ffU) << 24) | \
189 (((u32)(x) & 0x0000ff00U) << 8) | \
190 (((u32)(x) & 0x00ff0000U) >> 8) | \
191 (((u32)(x) & 0xff000000U) >> 24) )
193 #define __htole16(v) __revb16(v)
194 #define __htole32(v) __revb32(v)
195 #define __le16toh(v) __htole16(v)
196 #define __le32toh(v) __htole32(v)
198 static __inline u16 _htole16(u16 v) { return __htole16(v); }
199 static __inline u32 _htole32(u32 v) { return __htole32(v); }
200 #define _le16toh _htole16
201 #define _le32toh _htole32
203 #else /* LITTLE ENDIAN */
205 #define __htole16(v) (v)
206 #define __htole32(v) (v)
207 #define __le16toh(v) (v)
208 #define __le32toh(v) (v)
210 #define _htole16(v) (v)
211 #define _htole32(v) (v)
212 #define _le16toh(v) (v)
213 #define _le32toh(v) (v)
215 #endif /* BYTE_ORDER */
218 * A la VMS/CAM-3 queue management.
221 typedef struct sym_quehead {
222 struct sym_quehead *flink; /* Forward pointer */
223 struct sym_quehead *blink; /* Backward pointer */
226 #define sym_que_init(ptr) do { \
227 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
230 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
232 return (head->flink == head) ? 0 : head->flink;
235 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
237 return (head->blink == head) ? 0 : head->blink;
240 static __inline void __sym_que_add(struct sym_quehead * new,
241 struct sym_quehead * blink,
242 struct sym_quehead * flink)
250 static __inline void __sym_que_del(struct sym_quehead * blink,
251 struct sym_quehead * flink)
253 flink->blink = blink;
254 blink->flink = flink;
257 static __inline int sym_que_empty(struct sym_quehead *head)
259 return head->flink == head;
262 static __inline void sym_que_splice(struct sym_quehead *list,
263 struct sym_quehead *head)
265 struct sym_quehead *first = list->flink;
268 struct sym_quehead *last = list->blink;
269 struct sym_quehead *at = head->flink;
279 #define sym_que_entry(ptr, type, member) \
280 ((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member)))
283 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
285 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
287 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
289 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
291 struct sym_quehead *elem = head->flink;
294 __sym_que_del(head, elem->flink);
300 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
302 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
304 struct sym_quehead *elem = head->blink;
307 __sym_que_del(elem->blink, head);
314 * This one may be useful.
316 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
317 for (qp = (head)->flink; qp != (head); qp = qp->flink)
319 * FreeBSD does not offer our kind of queue in the CAM CCB.
320 * So, we have to cast.
322 #define sym_qptr(p) ((struct sym_quehead *) (p))
325 * Simple bitmap operations.
327 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
328 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
329 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
332 * Number of tasks per device we want to handle.
334 #if SYM_CONF_MAX_TAG_ORDER > 8
335 #error "more than 256 tags per logical unit not allowed."
337 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
340 * Donnot use more tasks that we can handle.
342 #ifndef SYM_CONF_MAX_TAG
343 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
345 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
346 #undef SYM_CONF_MAX_TAG
347 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
351 * This one means 'NO TAG for this job'
356 * Number of SCSI targets.
358 #if SYM_CONF_MAX_TARGET > 16
359 #error "more than 16 targets not allowed."
363 * Number of logical units per target.
365 #if SYM_CONF_MAX_LUN > 64
366 #error "more than 64 logical units per target not allowed."
370 * Asynchronous pre-scaler (ns). Shall be 40 for
371 * the SCSI timings to be compliant.
373 #define SYM_CONF_MIN_ASYNC (40)
376 * Number of entries in the START and DONE queues.
378 * We limit to 1 PAGE in order to succeed allocation of
379 * these queues. Each entry is 8 bytes long (2 DWORDS).
381 #ifdef SYM_CONF_MAX_START
382 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
384 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
385 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
388 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
389 #undef SYM_CONF_MAX_QUEUE
390 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
391 #undef SYM_CONF_MAX_START
392 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
396 * For this one, we want a short name :-)
398 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
401 * These ones should have been already defined.
404 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
408 * Active debugging tags and verbosity.
410 #define DEBUG_ALLOC (0x0001)
411 #define DEBUG_PHASE (0x0002)
412 #define DEBUG_POLL (0x0004)
413 #define DEBUG_QUEUE (0x0008)
414 #define DEBUG_RESULT (0x0010)
415 #define DEBUG_SCATTER (0x0020)
416 #define DEBUG_SCRIPT (0x0040)
417 #define DEBUG_TINY (0x0080)
418 #define DEBUG_TIMING (0x0100)
419 #define DEBUG_NEGO (0x0200)
420 #define DEBUG_TAGS (0x0400)
421 #define DEBUG_POINTER (0x0800)
424 static int sym_debug = 0;
425 #define DEBUG_FLAGS sym_debug
427 /* #define DEBUG_FLAGS (0x0631) */
428 #define DEBUG_FLAGS (0x0000)
431 #define sym_verbose (np->verbose)
434 * Insert a delay in micro-seconds and milli-seconds.
436 static void UDELAY(int us) { DELAY(us); }
437 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
440 * Simple power of two buddy-like allocator.
442 * This simple code is not intended to be fast, but to
443 * provide power of 2 aligned memory allocations.
444 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
445 * this allocator allows simple and fast address calculations
446 * from the SCRIPTS code. In addition, cache line alignment
447 * is guaranteed for power of 2 cache line size.
449 * This allocator has been developped for the Linux sym53c8xx
450 * driver, since this O/S does not provide naturally aligned
452 * It has the advantage of allowing the driver to use private
453 * pages of memory that will be useful if we ever need to deal
454 * with IO MMUs for PCI.
457 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
458 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
460 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
463 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
464 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
465 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
467 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
468 #define free_pages(p) free((p), M_DEVBUF)
470 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
472 typedef struct m_link { /* Link between free memory chunks */
476 #ifdef FreeBSD_Bus_Dma_Abstraction
477 typedef struct m_vtob { /* Virtual to Bus address translation */
479 bus_dmamap_t dmamap; /* Map for this chunk */
480 m_addr_t vaddr; /* Virtual address */
481 m_addr_t baddr; /* Bus physical address */
483 /* Hash this stuff a bit to speed up translations */
484 #define VTOB_HASH_SHIFT 5
485 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
486 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
487 #define VTOB_HASH_CODE(m) \
488 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
491 typedef struct m_pool { /* Memory pool of a given kind */
492 #ifdef FreeBSD_Bus_Dma_Abstraction
493 bus_dma_tag_t dev_dmat; /* Identifies the pool */
494 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
495 m_addr_t (*getp)(struct m_pool *);
496 #ifdef MEMO_FREE_UNUSED
497 void (*freep)(struct m_pool *, m_addr_t);
499 #define M_GETP() mp->getp(mp)
500 #define M_FREEP(p) mp->freep(mp, p)
502 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
505 #define M_GETP() get_pages()
506 #define M_FREEP(p) free_pages(p)
507 #endif /* FreeBSD_Bus_Dma_Abstraction */
508 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
511 static void *___sym_malloc(m_pool_s *mp, int size)
514 int s = (1 << MEMO_SHIFT);
519 if (size > MEMO_CLUSTER_SIZE)
529 if (s == MEMO_CLUSTER_SIZE) {
530 h[j].next = (m_link_s *) M_GETP();
538 a = (m_addr_t) h[j].next;
540 h[j].next = h[j].next->next;
544 h[j].next = (m_link_s *) (a+s);
549 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
554 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
557 int s = (1 << MEMO_SHIFT);
563 printf("___sym_mfree(%p, %d)\n", ptr, size);
566 if (size > MEMO_CLUSTER_SIZE)
577 #ifdef MEMO_FREE_UNUSED
578 if (s == MEMO_CLUSTER_SIZE) {
585 while (q->next && q->next != (m_link_s *) b) {
589 ((m_link_s *) a)->next = h[i].next;
590 h[i].next = (m_link_s *) a;
593 q->next = q->next->next;
600 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
604 p = ___sym_malloc(mp, size);
606 if (DEBUG_FLAGS & DEBUG_ALLOC)
607 printf ("new %-10s[%4d] @%p.\n", name, size, p);
611 else if (uflags & MEMO_WARN)
612 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
617 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
619 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
621 if (DEBUG_FLAGS & DEBUG_ALLOC)
622 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
624 ___sym_mfree(mp, ptr, size);
629 * Default memory pool we donnot need to involve in DMA.
631 #ifndef FreeBSD_Bus_Dma_Abstraction
633 * Without the `bus dma abstraction', all the memory is assumed
634 * DMAable and a single pool is all what we need.
640 * With the `bus dma abstraction', we use a separate pool for
641 * memory we donnot need to involve in DMA.
643 static m_addr_t ___mp0_getp(m_pool_s *mp)
645 m_addr_t m = (m_addr_t) get_pages();
651 #ifdef MEMO_FREE_UNUSED
652 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
659 #ifdef MEMO_FREE_UNUSED
660 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
662 static m_pool_s mp0 = {0, 0, ___mp0_getp};
665 #endif /* FreeBSD_Bus_Dma_Abstraction */
668 * Actual memory allocation routine for non-DMAed memory.
670 static void *sym_calloc(int size, char *name)
674 m = __sym_calloc(&mp0, size, name);
680 * Actual memory allocation routine for non-DMAed memory.
682 static void sym_mfree(void *ptr, int size, char *name)
685 __sym_mfree(&mp0, ptr, size, name);
692 #ifndef FreeBSD_Bus_Dma_Abstraction
694 * Without `bus dma abstraction', all the memory is DMAable, and
695 * only a single pool is needed (vtophys() is our friend).
697 #define __sym_calloc_dma(b, s, n) sym_calloc(s, n)
698 #define __sym_mfree_dma(b, p, s, n) sym_mfree(p, s, n)
700 #define __vtobus(b, p) alpha_XXX_dmamap((vm_offset_t)(p))
701 #else /*__i386__, __sparc64__*/
702 #define __vtobus(b, p) vtophys(p)
707 * With `bus dma abstraction', we use a separate pool per parent
708 * BUS handle. A reverse table (hashed) is maintained for virtual
709 * to BUS address translation.
711 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
714 baddr = (bus_addr_t *)arg;
715 *baddr = segs->ds_addr;
718 static m_addr_t ___dma_getp(m_pool_s *mp)
722 bus_addr_t baddr = 0;
724 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
728 if (bus_dmamem_alloc(mp->dmat, &vaddr,
729 BUS_DMA_NOWAIT, &vbp->dmamap))
731 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
732 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, 0);
734 int hc = VTOB_HASH_CODE(vaddr);
735 vbp->vaddr = (m_addr_t) vaddr;
736 vbp->baddr = (m_addr_t) baddr;
737 vbp->next = mp->vtob[hc];
740 return (m_addr_t) vaddr;
744 bus_dmamap_unload(mp->dmat, vbp->dmamap);
746 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
748 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
750 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
754 #ifdef MEMO_FREE_UNUSED
755 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
757 m_vtob_s **vbpp, *vbp;
758 int hc = VTOB_HASH_CODE(m);
760 vbpp = &mp->vtob[hc];
761 while (*vbpp && (*vbpp)->vaddr != m)
762 vbpp = &(*vbpp)->next;
765 *vbpp = (*vbpp)->next;
766 bus_dmamap_unload(mp->dmat, vbp->dmamap);
767 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
768 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
769 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
775 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
778 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
782 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
786 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
788 mp->dev_dmat = dev_dmat;
789 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
790 BUS_SPACE_MAXADDR_32BIT,
791 BUS_SPACE_MAXADDR_32BIT,
792 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
793 MEMO_CLUSTER_SIZE, 0, &mp->dmat)) {
794 mp->getp = ___dma_getp;
795 #ifdef MEMO_FREE_UNUSED
796 mp->freep = ___dma_freep;
804 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
808 #ifdef MEMO_FREE_UNUSED
809 static void ___del_dma_pool(m_pool_s *p)
811 struct m_pool **pp = &mp0.next;
813 while (*pp && *pp != p)
817 bus_dma_tag_destroy(p->dmat);
818 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
823 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
829 mp = ___get_dma_pool(dev_dmat);
831 mp = ___cre_dma_pool(dev_dmat);
833 m = __sym_calloc(mp, size, name);
834 #ifdef MEMO_FREE_UNUSED
844 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
849 mp = ___get_dma_pool(dev_dmat);
851 __sym_mfree(mp, m, size, name);
852 #ifdef MEMO_FREE_UNUSED
859 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
862 int hc = VTOB_HASH_CODE(m);
864 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
867 mp = ___get_dma_pool(dev_dmat);
870 while (vp && (m_addr_t) vp->vaddr != a)
875 panic("sym: VTOBUS FAILED!\n");
876 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
879 #endif /* FreeBSD_Bus_Dma_Abstraction */
882 * Verbs for DMAable memory handling.
883 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
886 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
887 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
888 #define _sym_mfree_dma(np, p, s, n) \
889 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
890 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
891 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
892 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
893 #define vtobus(p) _vtobus(np, p)
897 * Print a buffer in hexadecimal format.
899 static void sym_printb_hex (u_char *p, int n)
902 printf (" %x", *p++);
906 * Same with a label at beginning and .\n at end.
908 static void sym_printl_hex (char *label, u_char *p, int n)
910 printf ("%s", label);
911 sym_printb_hex (p, n);
916 * Return a string for SCSI BUS mode.
918 static char *sym_scsi_bus_mode(int mode)
921 case SMODE_HVD: return "HVD";
922 case SMODE_SE: return "SE";
923 case SMODE_LVD: return "LVD";
929 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
931 #ifdef SYM_CONF_NVRAM_SUPPORT
932 static u_char Tekram_sync[16] =
933 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
937 * Union of supported NVRAM formats.
941 #define SYM_SYMBIOS_NVRAM (1)
942 #define SYM_TEKRAM_NVRAM (2)
943 #ifdef SYM_CONF_NVRAM_SUPPORT
945 Symbios_nvram Symbios;
952 * This one is hopefully useless, but actually useful. :-)
955 #define assert(expression) { \
956 if (!(expression)) { \
958 "assertion \"%s\" failed: file \"%s\", line %d\n", \
960 __FILE__, __LINE__); \
966 * Some provision for a possible big endian mode supported by
967 * Symbios chips (never seen, by the way).
968 * For now, this stuff does not deserve any comments. :)
971 #define sym_offb(o) (o)
972 #define sym_offw(o) (o)
975 * Some provision for support for BIG ENDIAN CPU.
976 * Btw, FreeBSD does not seem to be ready yet for big endian.
979 #if BYTE_ORDER == BIG_ENDIAN
980 #define cpu_to_scr(dw) _htole32(dw)
981 #define scr_to_cpu(dw) _le32toh(dw)
983 #define cpu_to_scr(dw) (dw)
984 #define scr_to_cpu(dw) (dw)
988 * Access to the chip IO registers and on-chip RAM.
989 * We use the `bus space' interface under FreeBSD-4 and
990 * later kernel versions.
993 #ifdef FreeBSD_Bus_Space_Abstraction
995 #if defined(SYM_CONF_IOMAPPED)
997 #define INB_OFF(o) bus_space_read_1(np->io_tag, np->io_bsh, o)
998 #define INW_OFF(o) bus_space_read_2(np->io_tag, np->io_bsh, o)
999 #define INL_OFF(o) bus_space_read_4(np->io_tag, np->io_bsh, o)
1001 #define OUTB_OFF(o, v) bus_space_write_1(np->io_tag, np->io_bsh, o, (v))
1002 #define OUTW_OFF(o, v) bus_space_write_2(np->io_tag, np->io_bsh, o, (v))
1003 #define OUTL_OFF(o, v) bus_space_write_4(np->io_tag, np->io_bsh, o, (v))
1005 #else /* Memory mapped IO */
1007 #define INB_OFF(o) bus_space_read_1(np->mmio_tag, np->mmio_bsh, o)
1008 #define INW_OFF(o) bus_space_read_2(np->mmio_tag, np->mmio_bsh, o)
1009 #define INL_OFF(o) bus_space_read_4(np->mmio_tag, np->mmio_bsh, o)
1011 #define OUTB_OFF(o, v) bus_space_write_1(np->mmio_tag, np->mmio_bsh, o, (v))
1012 #define OUTW_OFF(o, v) bus_space_write_2(np->mmio_tag, np->mmio_bsh, o, (v))
1013 #define OUTL_OFF(o, v) bus_space_write_4(np->mmio_tag, np->mmio_bsh, o, (v))
1015 #endif /* SYM_CONF_IOMAPPED */
1017 #define OUTRAM_OFF(o, a, l) \
1018 bus_space_write_region_1(np->ram_tag, np->ram_bsh, o, (a), (l))
1020 #else /* not defined FreeBSD_Bus_Space_Abstraction */
1022 #if BYTE_ORDER == BIG_ENDIAN
1023 #error "BIG ENDIAN support requires bus space kernel interface"
1027 * Access to the chip IO registers and on-chip RAM.
1028 * We use legacy MMIO and IO interface for FreeBSD 3.X versions.
1032 * Define some understable verbs for IO and MMIO.
1034 #define io_read8(p) scr_to_cpu(inb((p)))
1035 #define io_read16(p) scr_to_cpu(inw((p)))
1036 #define io_read32(p) scr_to_cpu(inl((p)))
1037 #define io_write8(p, v) outb((p), cpu_to_scr(v))
1038 #define io_write16(p, v) outw((p), cpu_to_scr(v))
1039 #define io_write32(p, v) outl((p), cpu_to_scr(v))
1043 #define mmio_read8(a) readb(a)
1044 #define mmio_read16(a) readw(a)
1045 #define mmio_read32(a) readl(a)
1046 #define mmio_write8(a, b) writeb(a, b)
1047 #define mmio_write16(a, b) writew(a, b)
1048 #define mmio_write32(a, b) writel(a, b)
1049 #define memcpy_to_pci(d, s, n) memcpy_toio((u32)(d), (void *)(s), (n))
1051 #else /*__i386__, __sparc64__*/
1053 #define mmio_read8(a) scr_to_cpu((*(volatile unsigned char *) (a)))
1054 #define mmio_read16(a) scr_to_cpu((*(volatile unsigned short *) (a)))
1055 #define mmio_read32(a) scr_to_cpu((*(volatile unsigned int *) (a)))
1056 #define mmio_write8(a, b) (*(volatile unsigned char *) (a)) = cpu_to_scr(b)
1057 #define mmio_write16(a, b) (*(volatile unsigned short *) (a)) = cpu_to_scr(b)
1058 #define mmio_write32(a, b) (*(volatile unsigned int *) (a)) = cpu_to_scr(b)
1059 #define memcpy_to_pci(d, s, n) bcopy((s), (void *)(d), (n))
1066 #if defined(SYM_CONF_IOMAPPED)
1068 #define INB_OFF(o) io_read8(np->io_port + sym_offb(o))
1069 #define OUTB_OFF(o, v) io_write8(np->io_port + sym_offb(o), (v))
1071 #define INW_OFF(o) io_read16(np->io_port + sym_offw(o))
1072 #define OUTW_OFF(o, v) io_write16(np->io_port + sym_offw(o), (v))
1074 #define INL_OFF(o) io_read32(np->io_port + (o))
1075 #define OUTL_OFF(o, v) io_write32(np->io_port + (o), (v))
1077 #else /* Memory mapped IO */
1079 #define INB_OFF(o) mmio_read8(np->mmio_va + sym_offb(o))
1080 #define OUTB_OFF(o, v) mmio_write8(np->mmio_va + sym_offb(o), (v))
1082 #define INW_OFF(o) mmio_read16(np->mmio_va + sym_offw(o))
1083 #define OUTW_OFF(o, v) mmio_write16(np->mmio_va + sym_offw(o), (v))
1085 #define INL_OFF(o) mmio_read32(np->mmio_va + (o))
1086 #define OUTL_OFF(o, v) mmio_write32(np->mmio_va + (o), (v))
1090 #define OUTRAM_OFF(o, a, l) memcpy_to_pci(np->ram_va + (o), (a), (l))
1092 #endif /* FreeBSD_Bus_Space_Abstraction */
1095 * Common definitions for both bus space and legacy IO methods.
1097 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
1098 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
1099 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
1101 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
1102 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
1103 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
1105 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
1106 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
1107 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
1108 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
1109 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
1110 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
1113 * We normally want the chip to have a consistent view
1114 * of driver internal data structures when we restart it.
1115 * Thus these macros.
1117 #define OUTL_DSP(v) \
1120 OUTL (nc_dsp, (v)); \
1123 #define OUTONB_STD() \
1126 OUTONB (nc_dcntl, (STD|NOCOM)); \
1130 * Command control block states.
1134 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
1135 #define HS_DISCONNECT (3) /* Disconnected by target */
1136 #define HS_WAIT (4) /* waiting for resource */
1138 #define HS_DONEMASK (0x80)
1139 #define HS_COMPLETE (4|HS_DONEMASK)
1140 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
1141 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
1142 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
1145 * Software Interrupt Codes
1147 #define SIR_BAD_SCSI_STATUS (1)
1148 #define SIR_SEL_ATN_NO_MSG_OUT (2)
1149 #define SIR_MSG_RECEIVED (3)
1150 #define SIR_MSG_WEIRD (4)
1151 #define SIR_NEGO_FAILED (5)
1152 #define SIR_NEGO_PROTO (6)
1153 #define SIR_SCRIPT_STOPPED (7)
1154 #define SIR_REJECT_TO_SEND (8)
1155 #define SIR_SWIDE_OVERRUN (9)
1156 #define SIR_SODL_UNDERRUN (10)
1157 #define SIR_RESEL_NO_MSG_IN (11)
1158 #define SIR_RESEL_NO_IDENTIFY (12)
1159 #define SIR_RESEL_BAD_LUN (13)
1160 #define SIR_TARGET_SELECTED (14)
1161 #define SIR_RESEL_BAD_I_T_L (15)
1162 #define SIR_RESEL_BAD_I_T_L_Q (16)
1163 #define SIR_ABORT_SENT (17)
1164 #define SIR_RESEL_ABORTED (18)
1165 #define SIR_MSG_OUT_DONE (19)
1166 #define SIR_COMPLETE_ERROR (20)
1167 #define SIR_DATA_OVERRUN (21)
1168 #define SIR_BAD_PHASE (22)
1169 #define SIR_MAX (22)
1172 * Extended error bit codes.
1173 * xerr_status field of struct sym_ccb.
1175 #define XE_EXTRA_DATA (1) /* unexpected data phase */
1176 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
1177 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
1178 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
1179 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
1182 * Negotiation status.
1183 * nego_status field of struct sym_ccb.
1190 * A CCB hashed table is used to retrieve CCB address
1193 #define CCB_HASH_SHIFT 8
1194 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
1195 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
1196 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
1201 #define SYM_DISC_ENABLED (1)
1202 #define SYM_TAGS_ENABLED (1<<1)
1203 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1204 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1207 * Host adapter miscellaneous flags.
1209 #define SYM_AVOID_BUS_RESET (1)
1210 #define SYM_SCAN_TARGETS_HILO (1<<1)
1214 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1215 * saving the DATA POINTER then reselects and terminates the IO.
1216 * On reselection, the automatic RESTORE DATA POINTER makes the
1217 * CURRENT DATA POINTER not point at the end of the IO.
1218 * This behaviour just breaks our calculation of the residual.
1219 * For now, we just force an AUTO SAVE on disconnection and will
1220 * fix that in a further driver version.
1222 #define SYM_QUIRK_AUTOSAVE 1
1227 #define SYM_SNOOP_TIMEOUT (10000000)
1228 #define SYM_PCI_IO PCIR_MAPS
1229 #define SYM_PCI_MMIO (PCIR_MAPS + 4)
1230 #define SYM_PCI_RAM (PCIR_MAPS + 8)
1231 #define SYM_PCI_RAM64 (PCIR_MAPS + 12)
1234 * Back-pointer from the CAM CCB to our data structures.
1236 #define sym_hcb_ptr spriv_ptr0
1237 /* #define sym_ccb_ptr spriv_ptr1 */
1240 * We mostly have to deal with pointers.
1241 * Thus these typedef's.
1243 typedef struct sym_tcb *tcb_p;
1244 typedef struct sym_lcb *lcb_p;
1245 typedef struct sym_ccb *ccb_p;
1246 typedef struct sym_hcb *hcb_p;
1249 * Gather negotiable parameters value
1252 #ifdef FreeBSD_New_Tran_Settings
1259 u8 options; /* PPR options */
1263 struct sym_trans current;
1264 struct sym_trans goal;
1265 struct sym_trans user;
1268 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1269 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1272 * Global TCB HEADER.
1274 * Due to lack of indirect addressing on earlier NCR chips,
1275 * this substructure is copied from the TCB to a global
1276 * address after selection.
1277 * For SYMBIOS chips that support LOAD/STORE this copy is
1278 * not needed and thus not performed.
1282 * Scripts bus addresses of LUN table accessed from scripts.
1283 * LUN #0 is a special case, since multi-lun devices are rare,
1284 * and we we want to speed-up the general case and not waste
1287 u32 luntbl_sa; /* bus address of this table */
1288 u32 lun0_sa; /* bus address of LCB #0 */
1290 * Actual SYNC/WIDE IO registers value for this target.
1291 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1292 * so have alignment constraints.
1294 /*0*/ u_char uval; /* -> SCNTL4 register */
1295 /*1*/ u_char sval; /* -> SXFER io register */
1296 /*2*/ u_char filler1;
1297 /*3*/ u_char wval; /* -> SCNTL3 io register */
1301 * Target Control Block
1306 * Assumed at offset 0.
1308 /*0*/ struct sym_tcbh head;
1311 * LUN table used by the SCRIPTS processor.
1312 * An array of bus addresses is used on reselection.
1314 u32 *luntbl; /* LCBs bus address table */
1317 * LUN table used by the C code.
1319 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1320 #if SYM_CONF_MAX_LUN > 1
1321 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1325 * Bitmap that tells about LUNs that succeeded at least
1326 * 1 IO and therefore assumed to be a real device.
1327 * Avoid useless allocation of the LCB structure.
1329 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1332 * Bitmap that tells about LUNs that haven't yet an LCB
1333 * allocated (not discovered or LCB allocation failed).
1335 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1338 * Transfer capabilities (SIP)
1340 struct sym_tinfo tinfo;
1343 * Keep track of the CCB used for the negotiation in order
1344 * to ensure that only 1 negotiation is queued at a time.
1346 ccb_p nego_cp; /* CCB used for the nego */
1349 * Set when we want to reset the device.
1354 * Other user settable limits and options.
1355 * These limits are read from the NVRAM if present.
1362 * Global LCB HEADER.
1364 * Due to lack of indirect addressing on earlier NCR chips,
1365 * this substructure is copied from the LCB to a global
1366 * address after selection.
1367 * For SYMBIOS chips that support LOAD/STORE this copy is
1368 * not needed and thus not performed.
1372 * SCRIPTS address jumped by SCRIPTS on reselection.
1373 * For not probed logical units, this address points to
1374 * SCRIPTS that deal with bad LU handling (must be at
1375 * offset zero of the LCB for that reason).
1380 * Task (bus address of a CCB) read from SCRIPTS that points
1381 * to the unique ITL nexus allowed to be disconnected.
1386 * Task table bus address (read from SCRIPTS).
1392 * Logical Unit Control Block
1397 * Assumed at offset 0.
1399 /*0*/ struct sym_lcbh head;
1402 * Task table read from SCRIPTS that contains pointers to
1403 * ITLQ nexuses. The bus address read from SCRIPTS is
1404 * inside the header.
1406 u32 *itlq_tbl; /* Kernel virtual address */
1409 * Busy CCBs management.
1411 u_short busy_itlq; /* Number of busy tagged CCBs */
1412 u_short busy_itl; /* Number of busy untagged CCBs */
1415 * Circular tag allocation buffer.
1417 u_short ia_tag; /* Tag allocation index */
1418 u_short if_tag; /* Tag release index */
1419 u_char *cb_tags; /* Circular tags buffer */
1422 * Set when we want to clear all tasks.
1430 u_char current_flags;
1434 * Action from SCRIPTS on a task.
1435 * Is part of the CCB, but is also used separately to plug
1436 * error handling action to perform from SCRIPTS.
1439 u32 start; /* Jumped by SCRIPTS after selection */
1440 u32 restart; /* Jumped by SCRIPTS on relection */
1444 * Phase mismatch context.
1446 * It is part of the CCB and is used as parameters for the
1447 * DATA pointer. We need two contexts to handle correctly the
1448 * SAVED DATA POINTER.
1451 struct sym_tblmove sg; /* Updated interrupted SG block */
1452 u32 ret; /* SCRIPT return address */
1456 * LUN control block lookup.
1457 * We use a direct pointer for LUN #0, and a table of
1458 * pointers which is only allocated for devices that support
1461 #if SYM_CONF_MAX_LUN <= 1
1462 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1464 #define sym_lp(np, tp, lun) \
1465 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1469 * Status are used by the host and the script processor.
1471 * The last four bytes (status[4]) are copied to the
1472 * scratchb register (declared as scr0..scr3) just after the
1473 * select/reselect, and copied back just after disconnecting.
1474 * Inside the script the XX_REG are used.
1478 * Last four bytes (script)
1482 #define HS_PRT nc_scr1
1484 #define SS_PRT nc_scr2
1486 #define HF_PRT nc_scr3
1489 * Last four bytes (host)
1491 #define actualquirks phys.head.status[0]
1492 #define host_status phys.head.status[1]
1493 #define ssss_status phys.head.status[2]
1494 #define host_flags phys.head.status[3]
1499 #define HF_IN_PM0 1u
1500 #define HF_IN_PM1 (1u<<1)
1501 #define HF_ACT_PM (1u<<2)
1502 #define HF_DP_SAVED (1u<<3)
1503 #define HF_SENSE (1u<<4)
1504 #define HF_EXT_ERR (1u<<5)
1505 #define HF_DATA_IN (1u<<6)
1506 #ifdef SYM_CONF_IARB_SUPPORT
1507 #define HF_HINT_IARB (1u<<7)
1511 * Global CCB HEADER.
1513 * Due to lack of indirect addressing on earlier NCR chips,
1514 * this substructure is copied from the ccb to a global
1515 * address after selection (or reselection) and copied back
1516 * before disconnect.
1517 * For SYMBIOS chips that support LOAD/STORE this copy is
1518 * not needed and thus not performed.
1523 * Start and restart SCRIPTS addresses (must be at 0).
1525 /*0*/ struct sym_actscr go;
1528 * SCRIPTS jump address that deal with data pointers.
1529 * 'savep' points to the position in the script responsible
1530 * for the actual transfer of data.
1531 * It's written on reception of a SAVE_DATA_POINTER message.
1533 u32 savep; /* Jump address to saved data pointer */
1534 u32 lastp; /* SCRIPTS address at end of data */
1535 u32 goalp; /* Not accessed for now from SCRIPTS */
1544 * Data Structure Block
1546 * During execution of a ccb by the script processor, the
1547 * DSA (data structure address) register points to this
1548 * substructure of the ccb.
1553 * Also assumed at offset 0 of the sym_ccb structure.
1555 /*0*/ struct sym_ccbh head;
1558 * Phase mismatch contexts.
1559 * We need two to handle correctly the SAVED DATA POINTER.
1560 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1561 * for address calculation from SCRIPTS.
1567 * Table data for Script
1569 struct sym_tblsel select;
1570 struct sym_tblmove smsg;
1571 struct sym_tblmove smsg_ext;
1572 struct sym_tblmove cmd;
1573 struct sym_tblmove sense;
1574 struct sym_tblmove wresid;
1575 struct sym_tblmove data [SYM_CONF_MAX_SG];
1579 * Our Command Control Block
1583 * This is the data structure which is pointed by the DSA
1584 * register when it is executed by the script processor.
1585 * It must be the first entry.
1587 struct sym_dsb phys;
1590 * Pointer to CAM ccb and related stuff.
1592 union ccb *cam_ccb; /* CAM scsiio ccb */
1593 u8 cdb_buf[16]; /* Copy of CDB */
1594 u8 *sns_bbuf; /* Bounce buffer for sense data */
1595 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1596 int data_len; /* Total data length */
1597 int segments; /* Number of SG segments */
1600 * Miscellaneous status'.
1602 u_char nego_status; /* Negotiation status */
1603 u_char xerr_status; /* Extended error flags */
1604 u32 extra_bytes; /* Extraneous bytes transferred */
1608 * We prepare a message to be sent after selection.
1609 * We may use a second one if the command is rescheduled
1610 * due to CHECK_CONDITION or COMMAND TERMINATED.
1611 * Contents are IDENTIFY and SIMPLE_TAG.
1612 * While negotiating sync or wide transfer,
1613 * a SDTR or WDTR message is appended.
1615 u_char scsi_smsg [12];
1616 u_char scsi_smsg2[12];
1619 * Auto request sense related fields.
1621 u_char sensecmd[6]; /* Request Sense command */
1622 u_char sv_scsi_status; /* Saved SCSI status */
1623 u_char sv_xerr_status; /* Saved extended status */
1624 int sv_resid; /* Saved residual */
1627 * Map for the DMA of user data.
1629 #ifdef FreeBSD_Bus_Dma_Abstraction
1630 void *arg; /* Argument for some callback */
1631 bus_dmamap_t dmamap; /* DMA map for user data */
1633 #define SYM_DMA_NONE 0
1634 #define SYM_DMA_READ 1
1635 #define SYM_DMA_WRITE 2
1640 u32 ccb_ba; /* BUS address of this CCB */
1641 u_short tag; /* Tag for this transfer */
1642 /* NO_TAG means no tag */
1645 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1647 link_ccbq; /* Link to free/busy CCB queue */
1648 u32 startp; /* Initial data pointer */
1649 int ext_sg; /* Extreme data pointer, used */
1650 int ext_ofs; /* to calculate the residual. */
1651 u_char to_abort; /* Want this IO to be aborted */
1654 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1657 * Host Control Block
1662 * Due to poorness of addressing capabilities, earlier
1663 * chips (810, 815, 825) copy part of the data structures
1664 * (CCB, TCB and LCB) in fixed areas.
1666 #ifdef SYM_CONF_GENERIC_SUPPORT
1667 struct sym_ccbh ccb_head;
1668 struct sym_tcbh tcb_head;
1669 struct sym_lcbh lcb_head;
1672 * Idle task and invalid task actions and
1673 * their bus addresses.
1675 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1676 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1679 * Dummy lun table to protect us against target
1680 * returning bad lun number on reselection.
1682 u32 *badluntbl; /* Table physical address */
1683 u32 badlun_sa; /* SCRIPT handler BUS address */
1686 * Bus address of this host control block.
1691 * Bit 32-63 of the on-chip RAM bus address in LE format.
1692 * The START_RAM64 script loads the MMRS and MMWS from this
1698 * Chip and controller indentification.
1700 #ifdef FreeBSD_Bus_Io_Abstraction
1709 * Initial value of some IO register bits.
1710 * These values are assumed to have been set by BIOS, and may
1711 * be used to probe adapter implementation differences.
1713 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1714 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1718 * Actual initial value of IO register bits used by the
1719 * driver. They are loaded at initialisation according to
1720 * features that are to be enabled/disabled.
1722 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1723 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1728 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1731 * Target control block bus address array used by the SCRIPT
1738 * CAM SIM information for this instance.
1740 struct cam_sim *sim;
1741 struct cam_path *path;
1744 * Allocated hardware resources.
1746 #ifdef FreeBSD_Bus_Io_Abstraction
1747 struct resource *irq_res;
1748 struct resource *io_res;
1749 struct resource *mmio_res;
1750 struct resource *ram_res;
1758 * My understanding of PCI is that all agents must share the
1759 * same addressing range and model.
1760 * But some hardware architecture guys provide complex and
1761 * brain-deaded stuff that makes shit.
1762 * This driver only support PCI compliant implementations and
1763 * deals with part of the BUS stuff complexity only to fit O/S
1766 #ifdef FreeBSD_Bus_Io_Abstraction
1767 bus_space_handle_t io_bsh;
1768 bus_space_tag_t io_tag;
1769 bus_space_handle_t mmio_bsh;
1770 bus_space_tag_t mmio_tag;
1771 bus_space_handle_t ram_bsh;
1772 bus_space_tag_t ram_tag;
1778 #ifdef FreeBSD_Bus_Dma_Abstraction
1779 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1780 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1783 * Virtual and physical bus addresses of the chip.
1785 vm_offset_t mmio_va; /* MMIO kernel virtual address */
1786 vm_offset_t mmio_pa; /* MMIO CPU physical address */
1787 vm_offset_t mmio_ba; /* MMIO BUS address */
1788 int mmio_ws; /* MMIO Window size */
1790 vm_offset_t ram_va; /* RAM kernel virtual address */
1791 vm_offset_t ram_pa; /* RAM CPU physical address */
1792 vm_offset_t ram_ba; /* RAM BUS address */
1793 int ram_ws; /* RAM window size */
1794 u32 io_port; /* IO port address */
1797 * SCRIPTS virtual and physical bus addresses.
1798 * 'script' is loaded in the on-chip RAM if present.
1799 * 'scripth' stays in main memory for all chips except the
1800 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1802 u_char *scripta0; /* Copies of script and scripth */
1803 u_char *scriptb0; /* Copies of script and scripth */
1804 vm_offset_t scripta_ba; /* Actual script and scripth */
1805 vm_offset_t scriptb_ba; /* bus addresses. */
1806 vm_offset_t scriptb0_ba;
1807 u_short scripta_sz; /* Actual size of script A */
1808 u_short scriptb_sz; /* Actual size of script B */
1811 * Bus addresses, setup and patch methods for
1812 * the selected firmware.
1814 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1815 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1816 void (*fw_setup)(hcb_p np, struct sym_fw *fw);
1817 void (*fw_patch)(hcb_p np);
1821 * General controller parameters and configuration.
1823 u_short device_id; /* PCI device id */
1824 u_char revision_id; /* PCI device revision id */
1825 u_int features; /* Chip features map */
1826 u_char myaddr; /* SCSI id of the adapter */
1827 u_char maxburst; /* log base 2 of dwords burst */
1828 u_char maxwide; /* Maximum transfer width */
1829 u_char minsync; /* Min sync period factor (ST) */
1830 u_char maxsync; /* Max sync period factor (ST) */
1831 u_char maxoffs; /* Max scsi offset (ST) */
1832 u_char minsync_dt; /* Min sync period factor (DT) */
1833 u_char maxsync_dt; /* Max sync period factor (DT) */
1834 u_char maxoffs_dt; /* Max scsi offset (DT) */
1835 u_char multiplier; /* Clock multiplier (1,2,4) */
1836 u_char clock_divn; /* Number of clock divisors */
1837 u32 clock_khz; /* SCSI clock frequency in KHz */
1838 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1840 * Start queue management.
1841 * It is filled up by the host processor and accessed by the
1842 * SCRIPTS processor in order to start SCSI commands.
1844 volatile /* Prevent code optimizations */
1845 u32 *squeue; /* Start queue virtual address */
1846 u32 squeue_ba; /* Start queue BUS address */
1847 u_short squeueput; /* Next free slot of the queue */
1848 u_short actccbs; /* Number of allocated CCBs */
1851 * Command completion queue.
1852 * It is the same size as the start queue to avoid overflow.
1854 u_short dqueueget; /* Next position to scan */
1855 volatile /* Prevent code optimizations */
1856 u32 *dqueue; /* Completion (done) queue */
1857 u32 dqueue_ba; /* Done queue BUS address */
1860 * Miscellaneous buffers accessed by the scripts-processor.
1861 * They shall be DWORD aligned, because they may be read or
1862 * written with a script command.
1864 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1865 u_char msgin [8]; /* Buffer for MESSAGE IN */
1866 u32 lastmsg; /* Last SCSI message sent */
1867 u_char scratch; /* Scratch for SCSI receive */
1870 * Miscellaneous configuration and status parameters.
1872 u_char usrflags; /* Miscellaneous user flags */
1873 u_char scsi_mode; /* Current SCSI BUS mode */
1874 u_char verbose; /* Verbosity for this controller*/
1875 u32 cache; /* Used for cache test at init. */
1878 * CCB lists and queue.
1880 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1881 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1882 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1885 * During error handling and/or recovery,
1886 * active CCBs that are to be completed with
1887 * error or requeued are moved from the busy_ccbq
1888 * to the comp_ccbq prior to completion.
1890 SYM_QUEHEAD comp_ccbq;
1893 * CAM CCB pending queue.
1895 SYM_QUEHEAD cam_ccbq;
1898 * IMMEDIATE ARBITRATION (IARB) control.
1900 * We keep track in 'last_cp' of the last CCB that has been
1901 * queued to the SCRIPTS processor and clear 'last_cp' when
1902 * this CCB completes. If last_cp is not zero at the moment
1903 * we queue a new CCB, we set a flag in 'last_cp' that is
1904 * used by the SCRIPTS as a hint for setting IARB.
1905 * We donnot set more than 'iarb_max' consecutive hints for
1906 * IARB in order to leave devices a chance to reselect.
1907 * By the way, any non zero value of 'iarb_max' is unfair. :)
1909 #ifdef SYM_CONF_IARB_SUPPORT
1910 u_short iarb_max; /* Max. # consecutive IARB hints*/
1911 u_short iarb_count; /* Actual # of these hints */
1916 * Command abort handling.
1917 * We need to synchronize tightly with the SCRIPTS
1918 * processor in order to handle things correctly.
1920 u_char abrt_msg[4]; /* Message to send buffer */
1921 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1922 struct sym_tblsel abrt_sel; /* Sync params for selection */
1923 u_char istat_sem; /* Tells the chip to stop (SEM) */
1926 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1929 * Return the name of the controller.
1931 static __inline char *sym_name(hcb_p np)
1933 return np->inst_name;
1936 /*--------------------------------------------------------------------------*/
1937 /*------------------------------ FIRMWARES ---------------------------------*/
1938 /*--------------------------------------------------------------------------*/
1941 * This stuff will be moved to a separate source file when
1942 * the driver will be broken into several source modules.
1946 * Macros used for all firmwares.
1948 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1949 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1950 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1951 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1954 #ifdef SYM_CONF_GENERIC_SUPPORT
1956 * Allocate firmware #1 script area.
1958 #define SYM_FWA_SCR sym_fw1a_scr
1959 #define SYM_FWB_SCR sym_fw1b_scr
1960 #include <dev/sym/sym_fw1.h>
1961 struct sym_fwa_ofs sym_fw1a_ofs = {
1962 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1964 struct sym_fwb_ofs sym_fw1b_ofs = {
1965 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1969 #endif /* SYM_CONF_GENERIC_SUPPORT */
1972 * Allocate firmware #2 script area.
1974 #define SYM_FWA_SCR sym_fw2a_scr
1975 #define SYM_FWB_SCR sym_fw2b_scr
1976 #include <dev/sym/sym_fw2.h>
1977 struct sym_fwa_ofs sym_fw2a_ofs = {
1978 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1980 struct sym_fwb_ofs sym_fw2b_ofs = {
1981 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1982 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1983 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1993 #ifdef SYM_CONF_GENERIC_SUPPORT
1995 * Patch routine for firmware #1.
1998 sym_fw1_patch(hcb_p np)
2000 struct sym_fw1a_scr *scripta0;
2001 struct sym_fw1b_scr *scriptb0;
2003 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
2004 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2007 * Remove LED support if not needed.
2009 if (!(np->features & FE_LED0)) {
2010 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
2011 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
2012 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
2015 #ifdef SYM_CONF_IARB_SUPPORT
2017 * If user does not want to use IMMEDIATE ARBITRATION
2018 * when we are reselected while attempting to arbitrate,
2019 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2021 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2022 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2025 * Patch some data in SCRIPTS.
2026 * - start and done queue initial bus address.
2027 * - target bus address table bus address.
2029 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
2030 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
2031 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
2033 #endif /* SYM_CONF_GENERIC_SUPPORT */
2036 * Patch routine for firmware #2.
2039 sym_fw2_patch(hcb_p np)
2041 struct sym_fw2a_scr *scripta0;
2042 struct sym_fw2b_scr *scriptb0;
2044 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2045 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2048 * Remove LED support if not needed.
2050 if (!(np->features & FE_LED0)) {
2051 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
2052 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
2053 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
2056 #ifdef SYM_CONF_IARB_SUPPORT
2058 * If user does not want to use IMMEDIATE ARBITRATION
2059 * when we are reselected while attempting to arbitrate,
2060 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2062 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2063 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2066 * Patch some variable in SCRIPTS.
2067 * - start and done queue initial bus address.
2068 * - target bus address table bus address.
2070 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
2071 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
2072 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
2075 * Remove the load of SCNTL4 on reselection if not a C10.
2077 if (!(np->features & FE_C10)) {
2078 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
2079 scripta0->resel_scntl4[1] = cpu_to_scr(0);
2083 * Remove a couple of work-arounds specific to C1010 if
2084 * they are not desirable. See `sym_fw2.h' for more details.
2086 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
2087 np->revision_id < 0x1 &&
2088 np->pciclk_khz < 60000)) {
2089 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
2090 scripta0->datao_phase[1] = cpu_to_scr(0);
2092 if (!(np->device_id == PCI_ID_LSI53C1010 &&
2093 /* np->revision_id < 0xff */ 1)) {
2094 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
2095 scripta0->sel_done[1] = cpu_to_scr(0);
2099 * Patch some other variables in SCRIPTS.
2100 * These ones are loaded by the SCRIPTS processor.
2102 scriptb0->pm0_data_addr[0] =
2103 cpu_to_scr(np->scripta_ba +
2104 offsetof(struct sym_fw2a_scr, pm0_data));
2105 scriptb0->pm1_data_addr[0] =
2106 cpu_to_scr(np->scripta_ba +
2107 offsetof(struct sym_fw2a_scr, pm1_data));
2111 * Fill the data area in scripts.
2112 * To be done for all firmwares.
2115 sym_fw_fill_data (u32 *in, u32 *out)
2119 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
2120 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
2121 *in++ = offsetof (struct sym_dsb, data[i]);
2122 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
2123 *out++ = offsetof (struct sym_dsb, data[i]);
2128 * Setup useful script bus addresses.
2129 * To be done for all firmwares.
2132 sym_fw_setup_bus_addresses(hcb_p np, struct sym_fw *fw)
2139 * Build the bus address table for script A
2140 * from the script A offset table.
2142 po = (u_short *) fw->a_ofs;
2143 pa = (u32 *) &np->fwa_bas;
2144 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
2145 pa[i] = np->scripta_ba + po[i];
2148 * Same for script B.
2150 po = (u_short *) fw->b_ofs;
2151 pa = (u32 *) &np->fwb_bas;
2152 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
2153 pa[i] = np->scriptb_ba + po[i];
2156 #ifdef SYM_CONF_GENERIC_SUPPORT
2158 * Setup routine for firmware #1.
2161 sym_fw1_setup(hcb_p np, struct sym_fw *fw)
2163 struct sym_fw1a_scr *scripta0;
2164 struct sym_fw1b_scr *scriptb0;
2166 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
2167 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2170 * Fill variable parts in scripts.
2172 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2175 * Setup bus addresses used from the C code..
2177 sym_fw_setup_bus_addresses(np, fw);
2179 #endif /* SYM_CONF_GENERIC_SUPPORT */
2182 * Setup routine for firmware #2.
2185 sym_fw2_setup(hcb_p np, struct sym_fw *fw)
2187 struct sym_fw2a_scr *scripta0;
2188 struct sym_fw2b_scr *scriptb0;
2190 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2191 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2194 * Fill variable parts in scripts.
2196 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2199 * Setup bus addresses used from the C code..
2201 sym_fw_setup_bus_addresses(np, fw);
2205 * Allocate firmware descriptors.
2207 #ifdef SYM_CONF_GENERIC_SUPPORT
2208 static struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2209 #endif /* SYM_CONF_GENERIC_SUPPORT */
2210 static struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2213 * Find the most appropriate firmware for a chip.
2215 static struct sym_fw *
2216 sym_find_firmware(struct sym_pci_chip *chip)
2218 if (chip->features & FE_LDSTR)
2220 #ifdef SYM_CONF_GENERIC_SUPPORT
2221 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2229 * Bind a script to physical addresses.
2231 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2233 u32 opcode, new, old, tmp1, tmp2;
2238 end = start + len/4;
2245 * If we forget to change the length
2246 * in scripts, a field will be
2247 * padded with 0. This is an illegal
2251 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2252 sym_name(np), (int) (cur-start));
2259 * We use the bogus value 0xf00ff00f ;-)
2260 * to reserve data area in SCRIPTS.
2262 if (opcode == SCR_DATA_ZERO) {
2267 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2268 printf ("%d: <%x>\n", (int) (cur-start),
2272 * We don't have to decode ALL commands
2274 switch (opcode >> 28) {
2277 * LOAD / STORE DSA relative, don't relocate.
2283 * LOAD / STORE absolute.
2289 * COPY has TWO arguments.
2294 if ((tmp1 ^ tmp2) & 3) {
2295 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2296 sym_name(np), (int) (cur-start));
2300 * If PREFETCH feature not enabled, remove
2301 * the NO FLUSH bit if present.
2303 if ((opcode & SCR_NO_FLUSH) &&
2304 !(np->features & FE_PFEN)) {
2305 opcode = (opcode & ~SCR_NO_FLUSH);
2310 * MOVE/CHMOV (absolute address)
2312 if (!(np->features & FE_WIDE))
2313 opcode = (opcode | OPC_MOVE);
2318 * MOVE/CHMOV (table indirect)
2320 if (!(np->features & FE_WIDE))
2321 opcode = (opcode | OPC_MOVE);
2327 * dont't relocate if relative :-)
2329 if (opcode & 0x00800000)
2331 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2348 * Scriptify:) the opcode.
2350 *cur++ = cpu_to_scr(opcode);
2353 * If no relocation, assume 1 argument
2354 * and just scriptize:) it.
2357 *cur = cpu_to_scr(*cur);
2363 * Otherwise performs all needed relocations.
2368 switch (old & RELOC_MASK) {
2369 case RELOC_REGISTER:
2370 new = (old & ~RELOC_MASK) + np->mmio_ba;
2373 new = (old & ~RELOC_MASK) + np->scripta_ba;
2376 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2379 new = (old & ~RELOC_MASK) + np->hcb_ba;
2383 * Don't relocate a 0 address.
2384 * They are mostly used for patched or
2385 * script self-modified areas.
2394 panic("sym_fw_bind_script: "
2395 "weird relocation %x\n", old);
2399 *cur++ = cpu_to_scr(new);
2404 /*--------------------------------------------------------------------------*/
2405 /*--------------------------- END OF FIRMARES -----------------------------*/
2406 /*--------------------------------------------------------------------------*/
2409 * Function prototypes.
2411 static void sym_save_initial_setting (hcb_p np);
2412 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2413 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2414 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2415 static void sym_chip_reset (hcb_p np);
2416 static void sym_soft_reset (hcb_p np);
2417 static void sym_start_reset (hcb_p np);
2418 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2419 static int sym_wakeup_done (hcb_p np);
2420 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2421 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2422 static void sym_init (hcb_p np, int reason);
2423 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2425 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2426 u_char div, u_char fak);
2427 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2428 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2429 u_char per, u_char wide, u_char div, u_char fak);
2430 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2431 u_char per, u_char wide, u_char div, u_char fak);
2432 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2433 static void sym_intr (void *arg);
2434 static void sym_poll (struct cam_sim *sim);
2435 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2436 static void sym_int_sto (hcb_p np);
2437 static void sym_int_udc (hcb_p np);
2438 static void sym_int_sbmc (hcb_p np);
2439 static void sym_int_par (hcb_p np, u_short sist);
2440 static void sym_int_ma (hcb_p np);
2441 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2443 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2444 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2445 static void sym_sir_task_recovery (hcb_p np, int num);
2446 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2447 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2448 static int sym_compute_residual (hcb_p np, ccb_p cp);
2449 static int sym_show_msg (u_char * msg);
2450 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2451 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2452 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2453 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2454 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2455 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2456 static void sym_int_sir (hcb_p np);
2457 static void sym_free_ccb (hcb_p np, ccb_p cp);
2458 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2459 static ccb_p sym_alloc_ccb (hcb_p np);
2460 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2461 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2462 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2463 static int sym_snooptest (hcb_p np);
2464 static void sym_selectclock(hcb_p np, u_char scntl3);
2465 static void sym_getclock (hcb_p np, int mult);
2466 static int sym_getpciclock (hcb_p np);
2467 static void sym_complete_ok (hcb_p np, ccb_p cp);
2468 static void sym_complete_error (hcb_p np, ccb_p cp);
2469 static void sym_timeout (void *arg);
2470 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2471 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2472 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2473 static void sym_action1 (struct cam_sim *sim, union ccb *ccb);
2474 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2475 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2477 #ifdef FreeBSD_Bus_Dma_Abstraction
2478 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2479 bus_dma_segment_t *psegs, int nsegs);
2481 static int sym_scatter_virtual (hcb_p np, ccb_p cp, vm_offset_t vaddr,
2483 static int sym_scatter_sg_virtual (hcb_p np, ccb_p cp,
2484 bus_dma_segment_t *psegs, int nsegs);
2485 static int sym_scatter_physical (hcb_p np, ccb_p cp, vm_offset_t paddr,
2488 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2489 bus_dma_segment_t *psegs, int nsegs);
2490 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2491 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2492 struct ccb_trans_settings *cts);
2493 static void sym_update_dflags(hcb_p np, u_char *flags,
2494 struct ccb_trans_settings *cts);
2496 #ifdef FreeBSD_Bus_Io_Abstraction
2497 static struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2498 static int sym_pci_probe (device_t dev);
2499 static int sym_pci_attach (device_t dev);
2501 static struct sym_pci_chip *sym_find_pci_chip (pcici_t tag);
2502 static const char *sym_pci_probe (pcici_t tag, pcidi_t type);
2503 static void sym_pci_attach (pcici_t tag, int unit);
2504 static int sym_pci_attach2 (pcici_t tag, int unit);
2507 static void sym_pci_free (hcb_p np);
2508 static int sym_cam_attach (hcb_p np);
2509 static void sym_cam_free (hcb_p np);
2511 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2512 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2513 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2516 * Print something which allows to retrieve the controler type,
2517 * unit, target, lun concerned by a kernel message.
2519 static void PRINT_TARGET (hcb_p np, int target)
2521 printf ("%s:%d:", sym_name(np), target);
2524 static void PRINT_LUN(hcb_p np, int target, int lun)
2526 printf ("%s:%d:%d:", sym_name(np), target, lun);
2529 static void PRINT_ADDR (ccb_p cp)
2531 if (cp && cp->cam_ccb)
2532 xpt_print_path(cp->cam_ccb->ccb_h.path);
2536 * Take into account this ccb in the freeze count.
2538 static void sym_freeze_cam_ccb(union ccb *ccb)
2540 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2541 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2542 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2543 xpt_freeze_devq(ccb->ccb_h.path, 1);
2549 * Set the status field of a CAM CCB.
2551 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2553 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2554 ccb->ccb_h.status |= status;
2558 * Get the status field of a CAM CCB.
2560 static __inline int sym_get_cam_status(union ccb *ccb)
2562 return ccb->ccb_h.status & CAM_STATUS_MASK;
2566 * Enqueue a CAM CCB.
2568 static void sym_enqueue_cam_ccb(hcb_p np, union ccb *ccb)
2570 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2571 ccb->ccb_h.status = CAM_REQ_INPROG;
2573 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb,
2574 ccb->ccb_h.timeout*hz/1000);
2575 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2576 ccb->ccb_h.sym_hcb_ptr = np;
2578 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2582 * Complete a pending CAM CCB.
2584 static void sym_xpt_done(hcb_p np, union ccb *ccb)
2586 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2587 untimeout(sym_timeout, (caddr_t) ccb, ccb->ccb_h.timeout_ch);
2588 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2589 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2590 ccb->ccb_h.sym_hcb_ptr = 0;
2592 if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2593 sym_freeze_cam_ccb(ccb);
2597 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2599 sym_set_cam_status(ccb, cam_status);
2600 sym_xpt_done(np, ccb);
2604 * SYMBIOS chip clock divisor table.
2606 * Divisors are multiplied by 10,000,000 in order to make
2607 * calculations more simple.
2610 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2613 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2614 * 128 transfers. All chips support at least 16 transfers
2615 * bursts. The 825A, 875 and 895 chips support bursts of up
2616 * to 128 transfers and the 895A and 896 support bursts of up
2617 * to 64 transfers. All other chips support up to 16
2620 * For PCI 32 bit data transfers each transfer is a DWORD.
2621 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2623 * We use log base 2 (burst length) as internal code, with
2624 * value 0 meaning "burst disabled".
2628 * Burst length from burst code.
2630 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2633 * Burst code from io register bits.
2635 #define burst_code(dmode, ctest4, ctest5) \
2636 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2639 * Set initial io register bits from burst code.
2641 static __inline void sym_init_burst(hcb_p np, u_char bc)
2643 np->rv_ctest4 &= ~0x80;
2644 np->rv_dmode &= ~(0x3 << 6);
2645 np->rv_ctest5 &= ~0x4;
2648 np->rv_ctest4 |= 0x80;
2652 np->rv_dmode |= ((bc & 0x3) << 6);
2653 np->rv_ctest5 |= (bc & 0x4);
2659 * Print out the list of targets that have some flag disabled by user.
2661 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2666 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2667 if (i == np->myaddr)
2669 if (np->target[i].usrflags & mask) {
2671 printf("%s: %s disabled for targets",
2681 * Save initial settings of some IO registers.
2682 * Assumed to have been set by BIOS.
2683 * We cannot reset the chip prior to reading the
2684 * IO registers, since informations will be lost.
2685 * Since the SCRIPTS processor may be running, this
2686 * is not safe on paper, but it seems to work quite
2689 static void sym_save_initial_setting (hcb_p np)
2691 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2692 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2693 np->sv_dmode = INB(nc_dmode) & 0xce;
2694 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2695 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2696 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2697 np->sv_gpcntl = INB(nc_gpcntl);
2698 np->sv_stest1 = INB(nc_stest1);
2699 np->sv_stest2 = INB(nc_stest2) & 0x20;
2700 np->sv_stest4 = INB(nc_stest4);
2701 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2702 np->sv_scntl4 = INB(nc_scntl4);
2703 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2706 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2710 * Prepare io register values used by sym_init() according
2711 * to selected and supported features.
2713 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2722 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2725 * Get the frequency of the chip's clock.
2727 if (np->features & FE_QUAD)
2729 else if (np->features & FE_DBLR)
2734 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2735 np->clock_khz *= np->multiplier;
2737 if (np->clock_khz != 40000)
2738 sym_getclock(np, np->multiplier);
2741 * Divisor to be used for async (timer pre-scaler).
2743 i = np->clock_divn - 1;
2745 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2750 np->rv_scntl3 = i+1;
2753 * The C1010 uses hardwired divisors for async.
2754 * So, we just throw away, the async. divisor.:-)
2756 if (np->features & FE_C10)
2760 * Minimum synchronous period factor supported by the chip.
2761 * Btw, 'period' is in tenths of nanoseconds.
2763 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2764 if (period <= 250) np->minsync = 10;
2765 else if (period <= 303) np->minsync = 11;
2766 else if (period <= 500) np->minsync = 12;
2767 else np->minsync = (period + 40 - 1) / 40;
2770 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2772 if (np->minsync < 25 &&
2773 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2775 else if (np->minsync < 12 &&
2776 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2780 * Maximum synchronous period factor supported by the chip.
2782 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2783 np->maxsync = period > 2540 ? 254 : period / 10;
2786 * If chip is a C1010, guess the sync limits in DT mode.
2788 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2789 if (np->clock_khz == 160000) {
2791 np->maxsync_dt = 50;
2792 np->maxoffs_dt = 62;
2797 * 64 bit addressing (895A/896/1010) ?
2799 if (np->features & FE_DAC)
2800 #if BITS_PER_LONG > 32
2801 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2803 np->rv_ccntl1 |= (DDAC);
2807 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2809 if (np->features & FE_NOPM)
2810 np->rv_ccntl0 |= (ENPMJ);
2814 * In dual channel mode, contention occurs if internal cycles
2815 * are used. Disable internal cycles.
2817 if (np->device_id == PCI_ID_LSI53C1010 &&
2818 np->revision_id < 0x2)
2819 np->rv_ccntl0 |= DILS;
2822 * Select burst length (dwords)
2824 burst_max = SYM_SETUP_BURST_ORDER;
2825 if (burst_max == 255)
2826 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2830 if (burst_max > np->maxburst)
2831 burst_max = np->maxburst;
2834 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2835 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2836 * based transactions on LOAD/STORE instructions. So we have
2837 * to prevent these chips from using such PCI transactions in
2838 * this driver. The generic ncr driver that does not use
2839 * LOAD/STORE instructions does not need this work-around.
2841 if ((np->device_id == PCI_ID_SYM53C810 &&
2842 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2843 (np->device_id == PCI_ID_SYM53C860 &&
2844 np->revision_id <= 0x1))
2845 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2848 * Select all supported special features.
2849 * If we are using on-board RAM for scripts, prefetch (PFEN)
2850 * does not help, but burst op fetch (BOF) does.
2851 * Disabling PFEN makes sure BOF will be used.
2853 if (np->features & FE_ERL)
2854 np->rv_dmode |= ERL; /* Enable Read Line */
2855 if (np->features & FE_BOF)
2856 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2857 if (np->features & FE_ERMP)
2858 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2860 if ((np->features & FE_PFEN) && !np->ram_ba)
2862 if (np->features & FE_PFEN)
2864 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2865 if (np->features & FE_CLSE)
2866 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2867 if (np->features & FE_WRIE)
2868 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2869 if (np->features & FE_DFS)
2870 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2875 if (SYM_SETUP_PCI_PARITY)
2876 np->rv_ctest4 |= MPEE; /* Master parity checking */
2877 if (SYM_SETUP_SCSI_PARITY)
2878 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2881 * Get parity checking, host ID and verbose mode from NVRAM
2884 sym_nvram_setup_host (np, nvram);
2887 * Get SCSI addr of host adapter (set by bios?).
2889 if (np->myaddr == 255) {
2890 np->myaddr = INB(nc_scid) & 0x07;
2892 np->myaddr = SYM_SETUP_HOST_ID;
2896 * Prepare initial io register bits for burst length
2898 sym_init_burst(np, burst_max);
2901 * Set SCSI BUS mode.
2902 * - LVD capable chips (895/895A/896/1010) report the
2903 * current BUS mode through the STEST4 IO register.
2904 * - For previous generation chips (825/825A/875),
2905 * user has to tell us how to check against HVD,
2906 * since a 100% safe algorithm is not possible.
2908 np->scsi_mode = SMODE_SE;
2909 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2910 np->scsi_mode = (np->sv_stest4 & SMODE);
2911 else if (np->features & FE_DIFF) {
2912 if (SYM_SETUP_SCSI_DIFF == 1) {
2913 if (np->sv_scntl3) {
2914 if (np->sv_stest2 & 0x20)
2915 np->scsi_mode = SMODE_HVD;
2917 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2918 if (!(INB(nc_gpreg) & 0x08))
2919 np->scsi_mode = SMODE_HVD;
2922 else if (SYM_SETUP_SCSI_DIFF == 2)
2923 np->scsi_mode = SMODE_HVD;
2925 if (np->scsi_mode == SMODE_HVD)
2926 np->rv_stest2 |= 0x20;
2929 * Set LED support from SCRIPTS.
2930 * Ignore this feature for boards known to use a
2931 * specific GPIO wiring and for the 895A, 896
2932 * and 1010 that drive the LED directly.
2934 if ((SYM_SETUP_SCSI_LED ||
2935 (nvram->type == SYM_SYMBIOS_NVRAM ||
2936 (nvram->type == SYM_TEKRAM_NVRAM &&
2937 np->device_id == PCI_ID_SYM53C895))) &&
2938 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2939 np->features |= FE_LED0;
2944 switch(SYM_SETUP_IRQ_MODE & 3) {
2946 np->rv_dcntl |= IRQM;
2949 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2956 * Configure targets according to driver setup.
2957 * If NVRAM present get targets setup from NVRAM.
2959 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2960 tcb_p tp = &np->target[i];
2962 #ifdef FreeBSD_New_Tran_Settings
2963 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2964 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2966 tp->tinfo.user.period = np->minsync;
2967 tp->tinfo.user.offset = np->maxoffs;
2968 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2969 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2970 tp->usrtags = SYM_SETUP_MAX_TAG;
2972 sym_nvram_setup_target (np, i, nvram);
2975 * For now, guess PPR/DT support from the period
2978 if (np->features & FE_ULTRA3) {
2979 if (tp->tinfo.user.period <= 9 &&
2980 tp->tinfo.user.width == BUS_16_BIT) {
2981 tp->tinfo.user.options |= PPR_OPT_DT;
2982 tp->tinfo.user.offset = np->maxoffs_dt;
2983 #ifdef FreeBSD_New_Tran_Settings
2984 tp->tinfo.user.spi_version = 3;
2990 tp->usrflags &= ~SYM_TAGS_ENABLED;
2994 * Let user know about the settings.
2997 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2998 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2999 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
3001 (np->features & FE_ULTRA3) ? 80 :
3002 (np->features & FE_ULTRA2) ? 40 :
3003 (np->features & FE_ULTRA) ? 20 : 10,
3004 sym_scsi_bus_mode(np->scsi_mode),
3005 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
3007 * Tell him more on demand.
3010 printf("%s: %s IRQ line driver%s\n",
3012 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3013 np->ram_ba ? ", using on-chip SRAM" : "");
3014 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
3015 if (np->features & FE_NOPM)
3016 printf("%s: handling phase mismatch from SCRIPTS.\n",
3022 if (sym_verbose > 1) {
3023 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3024 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3025 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3026 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3028 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3029 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3030 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3031 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3034 * Let user be aware of targets that have some disable flags set.
3036 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
3038 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
3045 * Prepare the next negotiation message if needed.
3047 * Fill in the part of message buffer that contains the
3048 * negotiation and the nego_status field of the CCB.
3049 * Returns the size of the message in bytes.
3052 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
3054 tcb_p tp = &np->target[cp->target];
3058 * Early C1010 chips need a work-around for DT
3059 * data transfer to work.
3061 if (!(np->features & FE_U3EN))
3062 tp->tinfo.goal.options = 0;
3064 * negotiate using PPR ?
3066 if (tp->tinfo.goal.options & PPR_OPT_MASK)
3069 * negotiate wide transfers ?
3071 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
3074 * negotiate synchronous transfers?
3076 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
3077 tp->tinfo.current.offset != tp->tinfo.goal.offset)
3082 msgptr[msglen++] = M_EXTENDED;
3083 msgptr[msglen++] = 3;
3084 msgptr[msglen++] = M_X_SYNC_REQ;
3085 msgptr[msglen++] = tp->tinfo.goal.period;
3086 msgptr[msglen++] = tp->tinfo.goal.offset;
3089 msgptr[msglen++] = M_EXTENDED;
3090 msgptr[msglen++] = 2;
3091 msgptr[msglen++] = M_X_WIDE_REQ;
3092 msgptr[msglen++] = tp->tinfo.goal.width;
3095 msgptr[msglen++] = M_EXTENDED;
3096 msgptr[msglen++] = 6;
3097 msgptr[msglen++] = M_X_PPR_REQ;
3098 msgptr[msglen++] = tp->tinfo.goal.period;
3099 msgptr[msglen++] = 0;
3100 msgptr[msglen++] = tp->tinfo.goal.offset;
3101 msgptr[msglen++] = tp->tinfo.goal.width;
3102 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
3106 cp->nego_status = nego;
3109 tp->nego_cp = cp; /* Keep track a nego will be performed */
3110 if (DEBUG_FLAGS & DEBUG_NEGO) {
3111 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
3112 nego == NS_WIDE ? "wide msgout" :
3113 "ppr msgout", msgptr);
3121 * Insert a job into the start queue.
3123 static void sym_put_start_queue(hcb_p np, ccb_p cp)
3127 #ifdef SYM_CONF_IARB_SUPPORT
3129 * If the previously queued CCB is not yet done,
3130 * set the IARB hint. The SCRIPTS will go with IARB
3131 * for this job when starting the previous one.
3132 * We leave devices a chance to win arbitration by
3133 * not using more than 'iarb_max' consecutive
3134 * immediate arbitrations.
3136 if (np->last_cp && np->iarb_count < np->iarb_max) {
3137 np->last_cp->host_flags |= HF_HINT_IARB;
3146 * Insert first the idle task and then our job.
3147 * The MB should ensure proper ordering.
3149 qidx = np->squeueput + 2;
3150 if (qidx >= MAX_QUEUE*2) qidx = 0;
3152 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
3154 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
3156 np->squeueput = qidx;
3158 if (DEBUG_FLAGS & DEBUG_QUEUE)
3159 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
3162 * Script processor may be waiting for reselect.
3166 OUTB (nc_istat, SIGP|np->istat_sem);
3171 * Soft reset the chip.
3173 * Raising SRST when the chip is running may cause
3174 * problems on dual function chips (see below).
3175 * On the other hand, LVD devices need some delay
3176 * to settle and report actual BUS mode in STEST4.
3178 static void sym_chip_reset (hcb_p np)
3180 OUTB (nc_istat, SRST);
3183 UDELAY(2000); /* For BUS MODE to settle */
3187 * Soft reset the chip.
3189 * Some 896 and 876 chip revisions may hang-up if we set
3190 * the SRST (soft reset) bit at the wrong time when SCRIPTS
3192 * So, we need to abort the current operation prior to
3193 * soft resetting the chip.
3195 static void sym_soft_reset (hcb_p np)
3200 OUTB (nc_istat, CABRT);
3201 for (i = 1000000 ; i ; --i) {
3202 istat = INB (nc_istat);
3214 printf("%s: unable to abort current chip operation.\n",
3216 sym_chip_reset (np);
3220 * Start reset process.
3222 * The interrupt handler will reinitialize the chip.
3224 static void sym_start_reset(hcb_p np)
3226 (void) sym_reset_scsi_bus(np, 1);
3229 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3234 sym_soft_reset(np); /* Soft reset the chip */
3236 OUTW (nc_sien, RST);
3238 * Enable Tolerant, reset IRQD if present and
3239 * properly set IRQ mode, prior to resetting the bus.
3241 OUTB (nc_stest3, TE);
3242 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3243 OUTB (nc_scntl1, CRST);
3246 if (!SYM_SETUP_SCSI_BUS_CHECK)
3249 * Check for no terminators or SCSI bus shorts to ground.
3250 * Read SCSI data bus, data parity bits and control signals.
3251 * We are expecting RESET to be TRUE and other signals to be
3254 term = INB(nc_sstat0);
3255 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3256 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3257 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3258 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3259 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3261 if (!(np->features & FE_WIDE))
3264 if (term != (2<<7)) {
3265 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3267 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3268 "0x%lx, expecting 0x%lx\n",
3270 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3271 (u_long)term, (u_long)(2<<7));
3272 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3276 OUTB (nc_scntl1, 0);
3282 * The chip may have completed jobs. Look at the DONE QUEUE.
3284 * On architectures that may reorder LOAD/STORE operations,
3285 * a memory barrier may be needed after the reading of the
3286 * so-called `flag' and prior to dealing with the data.
3288 static int sym_wakeup_done (hcb_p np)
3297 dsa = scr_to_cpu(np->dqueue[i]);
3301 if ((i = i+2) >= MAX_QUEUE*2)
3304 cp = sym_ccb_from_dsa(np, dsa);
3307 sym_complete_ok (np, cp);
3311 printf ("%s: bad DSA (%x) in done queue.\n",
3312 sym_name(np), (u_int) dsa);
3320 * Complete all active CCBs with error.
3321 * Used on CHIP/SCSI RESET.
3323 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3326 * Move all active CCBs to the COMP queue
3327 * and flush this queue.
3329 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3330 sym_que_init(&np->busy_ccbq);
3331 sym_flush_comp_queue(np, cam_status);
3338 * 0: initialisation.
3339 * 1: SCSI BUS RESET delivered or received.
3340 * 2: SCSI BUS MODE changed.
3342 static void sym_init (hcb_p np, int reason)
3348 * Reset chip if asked, otherwise just clear fifos.
3353 OUTB (nc_stest3, TE|CSF);
3354 OUTONB (nc_ctest3, CLF);
3360 phys = np->squeue_ba;
3361 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3362 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3363 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3365 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3368 * Start at first entry.
3375 phys = np->dqueue_ba;
3376 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3378 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3380 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3383 * Start at first entry.
3388 * Install patches in scripts.
3389 * This also let point to first position the start
3390 * and done queue pointers used from SCRIPTS.
3395 * Wakeup all pending jobs.
3397 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3402 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3403 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3405 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3406 /* full arb., ena parity, par->ATN */
3407 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3409 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3411 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3412 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3413 OUTB (nc_istat , SIGP ); /* Signal Process */
3414 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3415 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3417 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3418 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3419 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3421 /* Extended Sreq/Sack filtering not supported on the C10 */
3422 if (np->features & FE_C10)
3423 OUTB (nc_stest2, np->rv_stest2);
3425 OUTB (nc_stest2, EXT|np->rv_stest2);
3427 OUTB (nc_stest3, TE); /* TolerANT enable */
3428 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3431 * For now, disable AIP generation on C1010-66.
3433 if (np->device_id == PCI_ID_LSI53C1010_2)
3434 OUTB (nc_aipcntl1, DISAIP);
3438 * Errant SGE's when in narrow. Write bits 4 & 5 of
3439 * STEST1 register to disable SGE. We probably should do
3440 * that from SCRIPTS for each selection/reselection, but
3441 * I just don't want. :)
3443 if (np->device_id == PCI_ID_LSI53C1010 &&
3444 /* np->revision_id < 0xff */ 1)
3445 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3448 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3449 * Disable overlapped arbitration for some dual function devices,
3450 * regardless revision id (kind of post-chip-design feature. ;-))
3452 if (np->device_id == PCI_ID_SYM53C875)
3453 OUTB (nc_ctest0, (1<<5));
3454 else if (np->device_id == PCI_ID_SYM53C896)
3455 np->rv_ccntl0 |= DPR;
3458 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3459 * and/or hardware phase mismatch, since only such chips
3460 * seem to support those IO registers.
3462 if (np->features & (FE_DAC|FE_NOPM)) {
3463 OUTB (nc_ccntl0, np->rv_ccntl0);
3464 OUTB (nc_ccntl1, np->rv_ccntl1);
3468 * If phase mismatch handled by scripts (895A/896/1010),
3469 * set PM jump addresses.
3471 if (np->features & FE_NOPM) {
3472 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3473 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3477 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3478 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3480 if (np->features & FE_LED0)
3481 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3482 else if (np->features & FE_LEDC)
3483 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3488 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3489 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3492 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3493 * Try to eat the spurious SBMC interrupt that may occur when
3494 * we reset the chip but not the SCSI BUS (at initialization).
3496 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3497 OUTONW (nc_sien, SBMC);
3502 np->scsi_mode = INB (nc_stest4) & SMODE;
3506 * Fill in target structure.
3507 * Reinitialize usrsync.
3508 * Reinitialize usrwide.
3509 * Prepare sync negotiation according to actual SCSI bus mode.
3511 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3512 tcb_p tp = &np->target[i];
3516 tp->head.wval = np->rv_scntl3;
3519 tp->tinfo.current.period = 0;
3520 tp->tinfo.current.offset = 0;
3521 tp->tinfo.current.width = BUS_8_BIT;
3522 tp->tinfo.current.options = 0;
3526 * Download SCSI SCRIPTS to on-chip RAM if present,
3527 * and start script processor.
3530 if (sym_verbose > 1)
3531 printf ("%s: Downloading SCSI SCRIPTS.\n",
3533 if (np->ram_ws == 8192) {
3534 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3535 OUTL (nc_mmws, np->scr_ram_seg);
3536 OUTL (nc_mmrs, np->scr_ram_seg);
3537 OUTL (nc_sfs, np->scr_ram_seg);
3538 phys = SCRIPTB_BA (np, start64);
3541 phys = SCRIPTA_BA (np, init);
3542 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3545 phys = SCRIPTA_BA (np, init);
3549 OUTL (nc_dsa, np->hcb_ba);
3553 * Notify the XPT about the RESET condition.
3556 xpt_async(AC_BUS_RESET, np->path, NULL);
3560 * Get clock factor and sync divisor for a given
3561 * synchronous factor period.
3564 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3566 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3567 int div = np->clock_divn; /* Number of divisors supported */
3568 u32 fak; /* Sync factor in sxfer */
3569 u32 per; /* Period in tenths of ns */
3570 u32 kpc; /* (per * clk) */
3574 * Compute the synchronous period in tenths of nano-seconds
3576 if (dt && sfac <= 9) per = 125;
3577 else if (sfac <= 10) per = 250;
3578 else if (sfac == 11) per = 303;
3579 else if (sfac == 12) per = 500;
3580 else per = 40 * sfac;
3588 * For earliest C10 revision 0, we cannot use extra
3589 * clocks for the setting of the SCSI clocking.
3590 * Note that this limits the lowest sync data transfer
3591 * to 5 Mega-transfers per second and may result in
3592 * using higher clock divisors.
3595 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3597 * Look for the lowest clock divisor that allows an
3598 * output speed not faster than the period.
3602 if (kpc > (div_10M[div] << 2)) {
3607 fak = 0; /* No extra clocks */
3608 if (div == np->clock_divn) { /* Are we too fast ? */
3618 * Look for the greatest clock divisor that allows an
3619 * input speed faster than the period.
3622 if (kpc >= (div_10M[div] << 2)) break;
3625 * Calculate the lowest clock factor that allows an output
3626 * speed not faster than the period, and the max output speed.
3627 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3628 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3631 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3632 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3635 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3636 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3640 * Check against our hardware limits, or bugs :).
3642 if (fak < 0) {fak = 0; ret = -1;}
3643 if (fak > 2) {fak = 2; ret = -1;}
3646 * Compute and return sync parameters.
3655 * Tell the SCSI layer about the new transfer parameters.
3658 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3660 struct ccb_trans_settings cts;
3661 struct cam_path *path;
3663 tcb_p tp = &np->target[target];
3665 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3667 if (sts != CAM_REQ_CMP)
3670 bzero(&cts, sizeof(cts));
3672 #ifdef FreeBSD_New_Tran_Settings
3673 #define cts__scsi (cts.proto_specific.scsi)
3674 #define cts__spi (cts.xport_specific.spi)
3676 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3677 cts.protocol = PROTO_SCSI;
3678 cts.transport = XPORT_SPI;
3679 cts.protocol_version = tp->tinfo.current.scsi_version;
3680 cts.transport_version = tp->tinfo.current.spi_version;
3682 cts__spi.valid = spi_valid;
3683 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3684 cts__spi.sync_period = tp->tinfo.current.period;
3685 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3686 cts__spi.sync_offset = tp->tinfo.current.offset;
3687 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3688 cts__spi.bus_width = tp->tinfo.current.width;
3689 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3690 cts__spi.ppr_options = tp->tinfo.current.options;
3694 cts.valid = spi_valid;
3695 if (spi_valid & CCB_TRANS_SYNC_RATE_VALID)
3696 cts.sync_period = tp->tinfo.current.period;
3697 if (spi_valid & CCB_TRANS_SYNC_OFFSET_VALID)
3698 cts.sync_offset = tp->tinfo.current.offset;
3699 if (spi_valid & CCB_TRANS_BUS_WIDTH_VALID)
3700 cts.bus_width = tp->tinfo.current.width;
3702 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3703 xpt_async(AC_TRANSFER_NEG, path, &cts);
3704 xpt_free_path(path);
3707 #ifdef FreeBSD_New_Tran_Settings
3708 #define SYM_SPI_VALID_WDTR \
3709 CTS_SPI_VALID_BUS_WIDTH | \
3710 CTS_SPI_VALID_SYNC_RATE | \
3711 CTS_SPI_VALID_SYNC_OFFSET
3712 #define SYM_SPI_VALID_SDTR \
3713 CTS_SPI_VALID_SYNC_RATE | \
3714 CTS_SPI_VALID_SYNC_OFFSET
3715 #define SYM_SPI_VALID_PPR \
3716 CTS_SPI_VALID_PPR_OPTIONS | \
3717 CTS_SPI_VALID_BUS_WIDTH | \
3718 CTS_SPI_VALID_SYNC_RATE | \
3719 CTS_SPI_VALID_SYNC_OFFSET
3721 #define SYM_SPI_VALID_WDTR \
3722 CCB_TRANS_BUS_WIDTH_VALID | \
3723 CCB_TRANS_SYNC_RATE_VALID | \
3724 CCB_TRANS_SYNC_OFFSET_VALID
3725 #define SYM_SPI_VALID_SDTR \
3726 CCB_TRANS_SYNC_RATE_VALID | \
3727 CCB_TRANS_SYNC_OFFSET_VALID
3728 #define SYM_SPI_VALID_PPR \
3729 CCB_TRANS_BUS_WIDTH_VALID | \
3730 CCB_TRANS_SYNC_RATE_VALID | \
3731 CCB_TRANS_SYNC_OFFSET_VALID
3735 * We received a WDTR.
3736 * Let everything be aware of the changes.
3738 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3740 tcb_p tp = &np->target[cp->target];
3742 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3745 * Tell the SCSI layer about the new transfer parameters.
3747 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3748 tp->tinfo.current.offset = 0;
3749 tp->tinfo.current.period = 0;
3750 tp->tinfo.current.options = 0;
3752 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3756 * We received a SDTR.
3757 * Let everything be aware of the changes.
3760 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3762 tcb_p tp = &np->target[cp->target];
3763 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3765 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3768 * Tell the SCSI layer about the new transfer parameters.
3770 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3771 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3772 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3774 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3778 * We received a PPR.
3779 * Let everything be aware of the changes.
3781 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3782 u_char per, u_char wide, u_char div, u_char fak)
3784 tcb_p tp = &np->target[cp->target];
3786 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3789 * Tell the SCSI layer about the new transfer parameters.
3791 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3792 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3793 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3794 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3796 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3800 * Switch trans mode for current job and it's target.
3802 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3803 u_char per, u_char wide, u_char div, u_char fak)
3808 u_char target = INB (nc_sdid) & 0x0f;
3809 u_char sval, wval, uval;
3816 assert (target == (cp->target & 0xf));
3817 tp = &np->target[target];
3819 sval = tp->head.sval;
3820 wval = tp->head.wval;
3821 uval = tp->head.uval;
3824 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3825 sval, wval, uval, np->rv_scntl3);
3830 if (!(np->features & FE_C10))
3831 sval = (sval & ~0x1f) | ofs;
3833 sval = (sval & ~0x3f) | ofs;
3836 * Set the sync divisor and extra clock factor.
3839 wval = (wval & ~0x70) | ((div+1) << 4);
3840 if (!(np->features & FE_C10))
3841 sval = (sval & ~0xe0) | (fak << 5);
3843 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3844 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3845 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3850 * Set the bus width.
3857 * Set misc. ultra enable bits.
3859 if (np->features & FE_C10) {
3860 uval = uval & ~(U3EN|AIPCKEN);
3862 assert(np->features & FE_U3EN);
3867 wval = wval & ~ULTRA;
3868 if (per <= 12) wval |= ULTRA;
3872 * Stop there if sync parameters are unchanged.
3874 if (tp->head.sval == sval &&
3875 tp->head.wval == wval &&
3876 tp->head.uval == uval)
3878 tp->head.sval = sval;
3879 tp->head.wval = wval;
3880 tp->head.uval = uval;
3883 * Disable extended Sreq/Sack filtering if per < 50.
3884 * Not supported on the C1010.
3886 if (per < 50 && !(np->features & FE_C10))
3887 OUTOFFB (nc_stest2, EXT);
3890 * set actual value and sync_status
3892 OUTB (nc_sxfer, tp->head.sval);
3893 OUTB (nc_scntl3, tp->head.wval);
3895 if (np->features & FE_C10) {
3896 OUTB (nc_scntl4, tp->head.uval);
3900 * patch ALL busy ccbs of this target.
3902 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3903 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3904 if (cp->target != target)
3906 cp->phys.select.sel_scntl3 = tp->head.wval;
3907 cp->phys.select.sel_sxfer = tp->head.sval;
3908 if (np->features & FE_C10) {
3909 cp->phys.select.sel_scntl4 = tp->head.uval;
3915 * log message for real hard errors
3917 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3918 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3920 * exception register:
3925 * so: control lines as driven by chip.
3926 * si: control lines as seen by chip.
3927 * sd: scsi data lines as seen by chip.
3930 * sxfer: (see the manual)
3931 * scntl3: (see the manual)
3933 * current script command:
3934 * dsp: script address (relative to start of script).
3935 * dbc: first word of script command.
3937 * First 24 register of the chip:
3940 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3946 u_char *script_base;
3951 if (dsp > np->scripta_ba &&
3952 dsp <= np->scripta_ba + np->scripta_sz) {
3953 script_ofs = dsp - np->scripta_ba;
3954 script_size = np->scripta_sz;
3955 script_base = (u_char *) np->scripta0;
3956 script_name = "scripta";
3958 else if (np->scriptb_ba < dsp &&
3959 dsp <= np->scriptb_ba + np->scriptb_sz) {
3960 script_ofs = dsp - np->scriptb_ba;
3961 script_size = np->scriptb_sz;
3962 script_base = (u_char *) np->scriptb0;
3963 script_name = "scriptb";
3968 script_name = "mem";
3971 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3972 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3973 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3974 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3975 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3976 (unsigned)INL (nc_dbc));
3978 if (((script_ofs & 3) == 0) &&
3979 (unsigned)script_ofs < script_size) {
3980 printf ("%s: script cmd = %08x\n", sym_name(np),
3981 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3984 printf ("%s: regdump:", sym_name(np));
3986 printf (" %02x", (unsigned)INB_OFF(i));
3990 * PCI BUS error, read the PCI ststus register.
3992 if (dstat & (MDPE|BF)) {
3994 #ifdef FreeBSD_Bus_Io_Abstraction
3995 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3997 pci_sts = pci_cfgread(np->pci_tag, PCIR_STATUS, 2);
3999 if (pci_sts & 0xf900) {
4000 #ifdef FreeBSD_Bus_Io_Abstraction
4001 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
4003 pci_cfgwrite(np->pci_tag, PCIR_STATUS, pci_sts, 2);
4005 printf("%s: PCI STATUS = 0x%04x\n",
4006 sym_name(np), pci_sts & 0xf900);
4012 * chip interrupt handler
4014 * In normal situations, interrupt conditions occur one at
4015 * a time. But when something bad happens on the SCSI BUS,
4016 * the chip may raise several interrupt flags before
4017 * stopping and interrupting the CPU. The additionnal
4018 * interrupt flags are stacked in some extra registers
4019 * after the SIP and/or DIP flag has been raised in the
4020 * ISTAT. After the CPU has read the interrupt condition
4021 * flag from SIST or DSTAT, the chip unstacks the other
4022 * interrupt flags and sets the corresponding bits in
4023 * SIST or DSTAT. Since the chip starts stacking once the
4024 * SIP or DIP flag is set, there is a small window of time
4025 * where the stacking does not occur.
4027 * Typically, multiple interrupt conditions may happen in
4028 * the following situations:
4030 * - SCSI parity error + Phase mismatch (PAR|MA)
4031 * When an parity error is detected in input phase
4032 * and the device switches to msg-in phase inside a
4034 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
4035 * When a stupid device does not want to handle the
4036 * recovery of an SCSI parity error.
4037 * - Some combinations of STO, PAR, UDC, ...
4038 * When using non compliant SCSI stuff, when user is
4039 * doing non compliant hot tampering on the BUS, when
4040 * something really bad happens to a device, etc ...
4042 * The heuristic suggested by SYMBIOS to handle
4043 * multiple interrupts is to try unstacking all
4044 * interrupts conditions and to handle them on some
4045 * priority based on error severity.
4046 * This will work when the unstacking has been
4047 * successful, but we cannot be 100 % sure of that,
4048 * since the CPU may have been faster to unstack than
4049 * the chip is able to stack. Hmmm ... But it seems that
4050 * such a situation is very unlikely to happen.
4052 * If this happen, for example STO caught by the CPU
4053 * then UDC happenning before the CPU have restarted
4054 * the SCRIPTS, the driver may wrongly complete the
4055 * same command on UDC, since the SCRIPTS didn't restart
4056 * and the DSA still points to the same command.
4057 * We avoid this situation by setting the DSA to an
4058 * invalid value when the CCB is completed and before
4059 * restarting the SCRIPTS.
4061 * Another issue is that we need some section of our
4062 * recovery procedures to be somehow uninterruptible but
4063 * the SCRIPTS processor does not provides such a
4064 * feature. For this reason, we handle recovery preferently
4065 * from the C code and check against some SCRIPTS critical
4066 * sections from the C code.
4068 * Hopefully, the interrupt handling of the driver is now
4069 * able to resist to weird BUS error conditions, but donnot
4070 * ask me for any guarantee that it will never fail. :-)
4071 * Use at your own decision and risk.
4074 static void sym_intr1 (hcb_p np)
4076 u_char istat, istatc;
4081 * interrupt on the fly ?
4083 * A `dummy read' is needed to ensure that the
4084 * clear of the INTF flag reaches the device
4085 * before the scanning of the DONE queue.
4087 istat = INB (nc_istat);
4089 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
4090 istat = INB (nc_istat); /* DUMMY READ */
4091 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
4092 (void)sym_wakeup_done (np);
4095 if (!(istat & (SIP|DIP)))
4098 #if 0 /* We should never get this one */
4100 OUTB (nc_istat, CABRT);
4104 * PAR and MA interrupts may occur at the same time,
4105 * and we need to know of both in order to handle
4106 * this situation properly. We try to unstack SCSI
4107 * interrupts for that reason. BTW, I dislike a LOT
4108 * such a loop inside the interrupt routine.
4109 * Even if DMA interrupt stacking is very unlikely to
4110 * happen, we also try unstacking these ones, since
4111 * this has no performance impact.
4118 sist |= INW (nc_sist);
4120 dstat |= INB (nc_dstat);
4121 istatc = INB (nc_istat);
4123 } while (istatc & (SIP|DIP));
4125 if (DEBUG_FLAGS & DEBUG_TINY)
4126 printf ("<%d|%x:%x|%x:%x>",
4129 (unsigned)INL(nc_dsp),
4130 (unsigned)INL(nc_dbc));
4132 * On paper, a memory barrier may be needed here.
4133 * And since we are paranoid ... :)
4138 * First, interrupts we want to service cleanly.
4140 * Phase mismatch (MA) is the most frequent interrupt
4141 * for chip earlier than the 896 and so we have to service
4142 * it as quickly as possible.
4143 * A SCSI parity error (PAR) may be combined with a phase
4144 * mismatch condition (MA).
4145 * Programmed interrupts (SIR) are used to call the C code
4147 * The single step interrupt (SSI) is not used in this
4150 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
4151 !(dstat & (MDPE|BF|ABRT|IID))) {
4152 if (sist & PAR) sym_int_par (np, sist);
4153 else if (sist & MA) sym_int_ma (np);
4154 else if (dstat & SIR) sym_int_sir (np);
4155 else if (dstat & SSI) OUTONB_STD ();
4156 else goto unknown_int;
4161 * Now, interrupts that donnot happen in normal
4162 * situations and that we may need to recover from.
4164 * On SCSI RESET (RST), we reset everything.
4165 * On SCSI BUS MODE CHANGE (SBMC), we complete all
4166 * active CCBs with RESET status, prepare all devices
4167 * for negotiating again and restart the SCRIPTS.
4168 * On STO and UDC, we complete the CCB with the corres-
4169 * ponding status and restart the SCRIPTS.
4172 xpt_print_path(np->path);
4173 printf("SCSI BUS reset detected.\n");
4178 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4179 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4181 if (!(sist & (GEN|HTH|SGE)) &&
4182 !(dstat & (MDPE|BF|ABRT|IID))) {
4183 if (sist & SBMC) sym_int_sbmc (np);
4184 else if (sist & STO) sym_int_sto (np);
4185 else if (sist & UDC) sym_int_udc (np);
4186 else goto unknown_int;
4191 * Now, interrupts we are not able to recover cleanly.
4193 * Log message for hard errors.
4197 sym_log_hard_error(np, sist, dstat);
4199 if ((sist & (GEN|HTH|SGE)) ||
4200 (dstat & (MDPE|BF|ABRT|IID))) {
4201 sym_start_reset(np);
4207 * We just miss the cause of the interrupt. :(
4208 * Print a message. The timeout will do the real work.
4210 printf( "%s: unknown interrupt(s) ignored, "
4211 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
4212 sym_name(np), istat, dstat, sist);
4215 static void sym_intr(void *arg)
4217 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
4218 sym_intr1((hcb_p) arg);
4219 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
4223 static void sym_poll(struct cam_sim *sim)
4226 sym_intr(cam_sim_softc(sim));
4232 * generic recovery from scsi interrupt
4234 * The doc says that when the chip gets an SCSI interrupt,
4235 * it tries to stop in an orderly fashion, by completing
4236 * an instruction fetch that had started or by flushing
4237 * the DMA fifo for a write to memory that was executing.
4238 * Such a fashion is not enough to know if the instruction
4239 * that was just before the current DSP value has been
4242 * There are some small SCRIPTS sections that deal with
4243 * the start queue and the done queue that may break any
4244 * assomption from the C code if we are interrupted
4245 * inside, so we reset if this happens. Btw, since these
4246 * SCRIPTS sections are executed while the SCRIPTS hasn't
4247 * started SCSI operations, it is very unlikely to happen.
4249 * All the driver data structures are supposed to be
4250 * allocated from the same 4 GB memory window, so there
4251 * is a 1 to 1 relationship between DSA and driver data
4252 * structures. Since we are careful :) to invalidate the
4253 * DSA when we complete a command or when the SCRIPTS
4254 * pushes a DSA into a queue, we can trust it when it
4257 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4259 u32 dsp = INL (nc_dsp);
4260 u32 dsa = INL (nc_dsa);
4261 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4264 * If we haven't been interrupted inside the SCRIPTS
4265 * critical pathes, we can safely restart the SCRIPTS
4266 * and trust the DSA value if it matches a CCB.
4268 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4269 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4270 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4271 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4272 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4273 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4274 (!(dsp > SCRIPTA_BA (np, done) &&
4275 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4276 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4277 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4279 * If we have a CCB, let the SCRIPTS call us back for
4280 * the handling of the error with SCRATCHA filled with
4281 * STARTPOS. This way, we will be able to freeze the
4282 * device queue and requeue awaiting IOs.
4285 cp->host_status = hsts;
4286 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4289 * Otherwise just restart the SCRIPTS.
4292 OUTL (nc_dsa, 0xffffff);
4293 OUTL_DSP (SCRIPTA_BA (np, start));
4302 sym_start_reset(np);
4306 * chip exception handler for selection timeout
4308 void sym_int_sto (hcb_p np)
4310 u32 dsp = INL (nc_dsp);
4312 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4314 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4315 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4317 sym_start_reset(np);
4321 * chip exception handler for unexpected disconnect
4323 void sym_int_udc (hcb_p np)
4325 printf ("%s: unexpected disconnect\n", sym_name(np));
4326 sym_recover_scsi_int(np, HS_UNEXPECTED);
4330 * chip exception handler for SCSI bus mode change
4332 * spi2-r12 11.2.3 says a transceiver mode change must
4333 * generate a reset event and a device that detects a reset
4334 * event shall initiate a hard reset. It says also that a
4335 * device that detects a mode change shall set data transfer
4336 * mode to eight bit asynchronous, etc...
4337 * So, just reinitializing all except chip should be enough.
4339 static void sym_int_sbmc (hcb_p np)
4341 u_char scsi_mode = INB (nc_stest4) & SMODE;
4346 xpt_print_path(np->path);
4347 printf("SCSI BUS mode change from %s to %s.\n",
4348 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4351 * Should suspend command processing for a few seconds and
4352 * reinitialize all except the chip.
4358 * chip exception handler for SCSI parity error.
4360 * When the chip detects a SCSI parity error and is
4361 * currently executing a (CH)MOV instruction, it does
4362 * not interrupt immediately, but tries to finish the
4363 * transfer of the current scatter entry before
4364 * interrupting. The following situations may occur:
4366 * - The complete scatter entry has been transferred
4367 * without the device having changed phase.
4368 * The chip will then interrupt with the DSP pointing
4369 * to the instruction that follows the MOV.
4371 * - A phase mismatch occurs before the MOV finished
4372 * and phase errors are to be handled by the C code.
4373 * The chip will then interrupt with both PAR and MA
4376 * - A phase mismatch occurs before the MOV finished and
4377 * phase errors are to be handled by SCRIPTS.
4378 * The chip will load the DSP with the phase mismatch
4379 * JUMP address and interrupt the host processor.
4381 static void sym_int_par (hcb_p np, u_short sist)
4383 u_char hsts = INB (HS_PRT);
4384 u32 dsp = INL (nc_dsp);
4385 u32 dbc = INL (nc_dbc);
4386 u32 dsa = INL (nc_dsa);
4387 u_char sbcl = INB (nc_sbcl);
4388 u_char cmd = dbc >> 24;
4389 int phase = cmd & 7;
4390 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4392 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4393 sym_name(np), hsts, dbc, sbcl);
4396 * Check that the chip is connected to the SCSI BUS.
4398 if (!(INB (nc_scntl1) & ISCON)) {
4399 sym_recover_scsi_int(np, HS_UNEXPECTED);
4404 * If the nexus is not clearly identified, reset the bus.
4405 * We will try to do better later.
4411 * Check instruction was a MOV, direction was INPUT and
4414 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4418 * Keep track of the parity error.
4420 OUTONB (HF_PRT, HF_EXT_ERR);
4421 cp->xerr_status |= XE_PARITY_ERR;
4424 * Prepare the message to send to the device.
4426 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4429 * If the old phase was DATA IN phase, we have to deal with
4430 * the 3 situations described above.
4431 * For other input phases (MSG IN and STATUS), the device
4432 * must resend the whole thing that failed parity checking
4433 * or signal error. So, jumping to dispatcher should be OK.
4435 if (phase == 1 || phase == 5) {
4436 /* Phase mismatch handled by SCRIPTS */
4437 if (dsp == SCRIPTB_BA (np, pm_handle))
4439 /* Phase mismatch handled by the C code */
4442 /* No phase mismatch occurred */
4444 OUTL (nc_temp, dsp);
4445 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4449 OUTL_DSP (SCRIPTA_BA (np, clrack));
4453 sym_start_reset(np);
4458 * chip exception handler for phase errors.
4460 * We have to construct a new transfer descriptor,
4461 * to transfer the rest of the current block.
4463 static void sym_int_ma (hcb_p np)
4476 u_char hflags, hflags0;
4485 rest = dbc & 0xffffff;
4489 * locate matching cp if any.
4491 cp = sym_ccb_from_dsa(np, dsa);
4494 * Donnot take into account dma fifo and various buffers in
4495 * INPUT phase since the chip flushes everything before
4496 * raising the MA interrupt for interrupted INPUT phases.
4497 * For DATA IN phase, we will check for the SWIDE later.
4499 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4502 if (np->features & FE_DFBC)
4503 delta = INW (nc_dfbc);
4508 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4510 dfifo = INL(nc_dfifo);
4513 * Calculate remaining bytes in DMA fifo.
4514 * (CTEST5 = dfifo >> 16)
4516 if (dfifo & (DFS << 16))
4517 delta = ((((dfifo >> 8) & 0x300) |
4518 (dfifo & 0xff)) - rest) & 0x3ff;
4520 delta = ((dfifo & 0xff) - rest) & 0x7f;
4524 * The data in the dma fifo has not been transfered to
4525 * the target -> add the amount to the rest
4526 * and clear the data.
4527 * Check the sstat2 register in case of wide transfer.
4530 ss0 = INB (nc_sstat0);
4531 if (ss0 & OLF) rest++;
4532 if (!(np->features & FE_C10))
4533 if (ss0 & ORF) rest++;
4534 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4535 ss2 = INB (nc_sstat2);
4536 if (ss2 & OLF1) rest++;
4537 if (!(np->features & FE_C10))
4538 if (ss2 & ORF1) rest++;
4544 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4545 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4549 * log the information
4551 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4552 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4553 (unsigned) rest, (unsigned) delta);
4556 * try to find the interrupted script command,
4557 * and the address at which to continue.
4561 if (dsp > np->scripta_ba &&
4562 dsp <= np->scripta_ba + np->scripta_sz) {
4563 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4566 else if (dsp > np->scriptb_ba &&
4567 dsp <= np->scriptb_ba + np->scriptb_sz) {
4568 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4573 * log the information
4575 if (DEBUG_FLAGS & DEBUG_PHASE) {
4576 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4577 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4581 printf ("%s: interrupted SCRIPT address not found.\n",
4587 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4593 * get old startaddress and old length.
4595 oadr = scr_to_cpu(vdsp[1]);
4597 if (cmd & 0x10) { /* Table indirect */
4598 tblp = (u32 *) ((char*) &cp->phys + oadr);
4599 olen = scr_to_cpu(tblp[0]);
4600 oadr = scr_to_cpu(tblp[1]);
4603 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4606 if (DEBUG_FLAGS & DEBUG_PHASE) {
4607 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4608 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4615 * check cmd against assumed interrupted script command.
4616 * If dt data phase, the MOVE instruction hasn't bit 4 of
4619 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4621 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4622 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4628 * if old phase not dataphase, leave here.
4632 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4633 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4634 (unsigned)oadr, (unsigned)rest);
4635 goto unexpected_phase;
4639 * Choose the correct PM save area.
4641 * Look at the PM_SAVE SCRIPT if you want to understand
4642 * this stuff. The equivalent code is implemented in
4643 * SCRIPTS for the 895A, 896 and 1010 that are able to
4644 * handle PM from the SCRIPTS processor.
4646 hflags0 = INB (HF_PRT);
4649 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4650 if (hflags & HF_IN_PM0)
4651 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4652 else if (hflags & HF_IN_PM1)
4653 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4655 if (hflags & HF_DP_SAVED)
4656 hflags ^= HF_ACT_PM;
4659 if (!(hflags & HF_ACT_PM)) {
4661 newcmd = SCRIPTA_BA (np, pm0_data);
4665 newcmd = SCRIPTA_BA (np, pm1_data);
4668 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4669 if (hflags != hflags0)
4670 OUTB (HF_PRT, hflags);
4673 * fillin the phase mismatch context
4675 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4676 pm->sg.size = cpu_to_scr(rest);
4677 pm->ret = cpu_to_scr(nxtdsp);
4680 * If we have a SWIDE,
4681 * - prepare the address to write the SWIDE from SCRIPTS,
4682 * - compute the SCRIPTS address to restart from,
4683 * - move current data pointer context by one byte.
4685 nxtdsp = SCRIPTA_BA (np, dispatch);
4686 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4687 (INB (nc_scntl2) & WSR)) {
4691 * Set up the table indirect for the MOVE
4692 * of the residual byte and adjust the data
4695 tmp = scr_to_cpu(pm->sg.addr);
4696 cp->phys.wresid.addr = cpu_to_scr(tmp);
4697 pm->sg.addr = cpu_to_scr(tmp + 1);
4698 tmp = scr_to_cpu(pm->sg.size);
4699 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4700 pm->sg.size = cpu_to_scr(tmp - 1);
4703 * If only the residual byte is to be moved,
4704 * no PM context is needed.
4706 if ((tmp&0xffffff) == 1)
4710 * Prepare the address of SCRIPTS that will
4711 * move the residual byte to memory.
4713 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4716 if (DEBUG_FLAGS & DEBUG_PHASE) {
4718 printf ("PM %x %x %x / %x %x %x.\n",
4719 hflags0, hflags, newcmd,
4720 (unsigned)scr_to_cpu(pm->sg.addr),
4721 (unsigned)scr_to_cpu(pm->sg.size),
4722 (unsigned)scr_to_cpu(pm->ret));
4726 * Restart the SCRIPTS processor.
4728 OUTL (nc_temp, newcmd);
4733 * Unexpected phase changes that occurs when the current phase
4734 * is not a DATA IN or DATA OUT phase are due to error conditions.
4735 * Such event may only happen when the SCRIPTS is using a
4736 * multibyte SCSI MOVE.
4738 * Phase change Some possible cause
4740 * COMMAND --> MSG IN SCSI parity error detected by target.
4741 * COMMAND --> STATUS Bad command or refused by target.
4742 * MSG OUT --> MSG IN Message rejected by target.
4743 * MSG OUT --> COMMAND Bogus target that discards extended
4744 * negotiation messages.
4746 * The code below does not care of the new phase and so
4747 * trusts the target. Why to annoy it ?
4748 * If the interrupted phase is COMMAND phase, we restart at
4750 * If a target does not get all the messages after selection,
4751 * the code assumes blindly that the target discards extended
4752 * messages and clears the negotiation status.
4753 * If the target does not want all our response to negotiation,
4754 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4755 * bloat for such a should_not_happen situation).
4756 * In all other situation, we reset the BUS.
4757 * Are these assumptions reasonnable ? (Wait and see ...)
4764 case 2: /* COMMAND phase */
4765 nxtdsp = SCRIPTA_BA (np, dispatch);
4768 case 3: /* STATUS phase */
4769 nxtdsp = SCRIPTA_BA (np, dispatch);
4772 case 6: /* MSG OUT phase */
4774 * If the device may want to use untagged when we want
4775 * tagged, we prepare an IDENTIFY without disc. granted,
4776 * since we will not be able to handle reselect.
4777 * Otherwise, we just don't care.
4779 if (dsp == SCRIPTA_BA (np, send_ident)) {
4780 if (cp->tag != NO_TAG && olen - rest <= 3) {
4781 cp->host_status = HS_BUSY;
4782 np->msgout[0] = M_IDENTIFY | cp->lun;
4783 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4786 nxtdsp = SCRIPTB_BA (np, ident_break);
4788 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4789 dsp == SCRIPTB_BA (np, send_sdtr) ||
4790 dsp == SCRIPTB_BA (np, send_ppr)) {
4791 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4795 case 7: /* MSG IN phase */
4796 nxtdsp = SCRIPTA_BA (np, clrack);
4807 sym_start_reset(np);
4811 * Dequeue from the START queue all CCBs that match
4812 * a given target/lun/task condition (-1 means all),
4813 * and move them from the BUSY queue to the COMP queue
4814 * with CAM_REQUEUE_REQ status condition.
4815 * This function is used during error handling/recovery.
4816 * It is called with SCRIPTS not running.
4819 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4825 * Make sure the starting index is within range.
4827 assert((i >= 0) && (i < 2*MAX_QUEUE));
4830 * Walk until end of START queue and dequeue every job
4831 * that matches the target/lun/task condition.
4834 while (i != np->squeueput) {
4835 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4837 #ifdef SYM_CONF_IARB_SUPPORT
4838 /* Forget hints for IARB, they may be no longer relevant */
4839 cp->host_flags &= ~HF_HINT_IARB;
4841 if ((target == -1 || cp->target == target) &&
4842 (lun == -1 || cp->lun == lun) &&
4843 (task == -1 || cp->tag == task)) {
4844 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4845 sym_remque(&cp->link_ccbq);
4846 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4850 np->squeue[j] = np->squeue[i];
4851 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4853 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4855 if (i != j) /* Copy back the idle task if needed */
4856 np->squeue[j] = np->squeue[i];
4857 np->squeueput = j; /* Update our current start queue pointer */
4863 * Complete all CCBs queued to the COMP queue.
4865 * These CCBs are assumed:
4866 * - Not to be referenced either by devices or
4867 * SCRIPTS-related queues and datas.
4868 * - To have to be completed with an error condition
4871 * The device queue freeze count is incremented
4872 * for each CCB that does not prevent this.
4873 * This function is called when all CCBs involved
4874 * in error handling/recovery have been reaped.
4877 sym_flush_comp_queue(hcb_p np, int cam_status)
4882 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
4884 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4885 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4886 /* Leave quiet CCBs waiting for resources */
4887 if (cp->host_status == HS_WAIT)
4891 sym_set_cam_status(ccb, cam_status);
4892 sym_free_ccb(np, cp);
4893 sym_freeze_cam_ccb(ccb);
4894 sym_xpt_done(np, ccb);
4899 * chip handler for bad SCSI status condition
4901 * In case of bad SCSI status, we unqueue all the tasks
4902 * currently queued to the controller but not yet started
4903 * and then restart the SCRIPTS processor immediately.
4905 * QUEUE FULL and BUSY conditions are handled the same way.
4906 * Basically all the not yet started tasks are requeued in
4907 * device queue and the queue is frozen until a completion.
4909 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4910 * the CCB of the failed command to prepare a REQUEST SENSE
4911 * SCSI command and queue it to the controller queue.
4913 * SCRATCHA is assumed to have been loaded with STARTPOS
4914 * before the SCRIPTS called the C code.
4916 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4918 tcb_p tp = &np->target[cp->target];
4920 u_char s_status = cp->ssss_status;
4921 u_char h_flags = cp->host_flags;
4927 * Compute the index of the next job to start from SCRIPTS.
4929 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4932 * The last CCB queued used for IARB hint may be
4933 * no longer relevant. Forget it.
4935 #ifdef SYM_CONF_IARB_SUPPORT
4941 * Now deal with the SCSI status.
4946 if (sym_verbose >= 2) {
4948 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4950 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4951 sym_complete_error (np, cp);
4956 * If we get an SCSI error when requesting sense, give up.
4958 if (h_flags & HF_SENSE) {
4959 sym_complete_error (np, cp);
4964 * Dequeue all queued CCBs for that device not yet started,
4965 * and restart the SCRIPTS processor immediately.
4967 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4968 OUTL_DSP (SCRIPTA_BA (np, start));
4971 * Save some info of the actual IO.
4972 * Compute the data residual.
4974 cp->sv_scsi_status = cp->ssss_status;
4975 cp->sv_xerr_status = cp->xerr_status;
4976 cp->sv_resid = sym_compute_residual(np, cp);
4979 * Prepare all needed data structures for
4980 * requesting sense data.
4986 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4990 * If we are currently using anything different from
4991 * async. 8 bit data transfers with that target,
4992 * start a negotiation, since the device may want
4993 * to report us a UNIT ATTENTION condition due to
4994 * a cause we currently ignore, and we donnot want
4995 * to be stuck with WIDE and/or SYNC data transfer.
4997 * cp->nego_status is filled by sym_prepare_nego().
4999 cp->nego_status = 0;
5001 if (tp->tinfo.current.options & PPR_OPT_MASK)
5003 else if (tp->tinfo.current.width != BUS_8_BIT)
5005 else if (tp->tinfo.current.offset != 0)
5009 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
5011 * Message table indirect structure.
5013 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
5014 cp->phys.smsg.size = cpu_to_scr(msglen);
5019 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
5020 cp->phys.cmd.size = cpu_to_scr(6);
5023 * patch requested size into sense command
5025 cp->sensecmd[0] = 0x03;
5026 cp->sensecmd[1] = cp->lun << 5;
5027 #ifdef FreeBSD_New_Tran_Settings
5028 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
5029 cp->sensecmd[1] = 0;
5031 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
5032 cp->data_len = SYM_SNS_BBUF_LEN;
5037 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
5038 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
5039 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
5042 * requeue the command.
5044 startp = SCRIPTB_BA (np, sdata_in);
5046 cp->phys.head.savep = cpu_to_scr(startp);
5047 cp->phys.head.goalp = cpu_to_scr(startp + 16);
5048 cp->phys.head.lastp = cpu_to_scr(startp);
5049 cp->startp = cpu_to_scr(startp);
5051 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
5052 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5053 cp->ssss_status = S_ILLEGAL;
5054 cp->host_flags = (HF_SENSE|HF_DATA_IN);
5055 cp->xerr_status = 0;
5056 cp->extra_bytes = 0;
5058 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
5061 * Requeue the command.
5063 sym_put_start_queue(np, cp);
5066 * Give back to upper layer everything we have dequeued.
5068 sym_flush_comp_queue(np, 0);
5074 * After a device has accepted some management message
5075 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
5076 * a device signals a UNIT ATTENTION condition, some
5077 * tasks are thrown away by the device. We are required
5078 * to reflect that on our tasks list since the device
5079 * will never complete these tasks.
5081 * This function move from the BUSY queue to the COMP
5082 * queue all disconnected CCBs for a given target that
5083 * match the following criteria:
5084 * - lun=-1 means any logical UNIT otherwise a given one.
5085 * - task=-1 means any task, otherwise a given one.
5088 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
5090 SYM_QUEHEAD qtmp, *qp;
5095 * Move the entire BUSY queue to our temporary queue.
5097 sym_que_init(&qtmp);
5098 sym_que_splice(&np->busy_ccbq, &qtmp);
5099 sym_que_init(&np->busy_ccbq);
5102 * Put all CCBs that matches our criteria into
5103 * the COMP queue and put back other ones into
5106 while ((qp = sym_remque_head(&qtmp)) != 0) {
5108 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5110 if (cp->host_status != HS_DISCONNECT ||
5111 cp->target != target ||
5112 (lun != -1 && cp->lun != lun) ||
5114 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
5115 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
5118 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
5120 /* Preserve the software timeout condition */
5121 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
5122 sym_set_cam_status(ccb, cam_status);
5125 printf("XXXX TASK @%p CLEARED\n", cp);
5132 * chip handler for TASKS recovery
5134 * We cannot safely abort a command, while the SCRIPTS
5135 * processor is running, since we just would be in race
5138 * As long as we have tasks to abort, we keep the SEM
5139 * bit set in the ISTAT. When this bit is set, the
5140 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
5141 * each time it enters the scheduler.
5143 * If we have to reset a target, clear tasks of a unit,
5144 * or to perform the abort of a disconnected job, we
5145 * restart the SCRIPTS for selecting the target. Once
5146 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
5147 * If it loses arbitration, the SCRIPTS will interrupt again
5148 * the next time it will enter its scheduler, and so on ...
5150 * On SIR_TARGET_SELECTED, we scan for the more
5151 * appropriate thing to do:
5153 * - If nothing, we just sent a M_ABORT message to the
5154 * target to get rid of the useless SCSI bus ownership.
5155 * According to the specs, no tasks shall be affected.
5156 * - If the target is to be reset, we send it a M_RESET
5158 * - If a logical UNIT is to be cleared , we send the
5159 * IDENTIFY(lun) + M_ABORT.
5160 * - If an untagged task is to be aborted, we send the
5161 * IDENTIFY(lun) + M_ABORT.
5162 * - If a tagged task is to be aborted, we send the
5163 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
5165 * Once our 'kiss of death' :) message has been accepted
5166 * by the target, the SCRIPTS interrupts again
5167 * (SIR_ABORT_SENT). On this interrupt, we complete
5168 * all the CCBs that should have been aborted by the
5169 * target according to our message.
5171 static void sym_sir_task_recovery(hcb_p np, int num)
5176 int target=-1, lun=-1, task;
5181 * The SCRIPTS processor stopped before starting
5182 * the next command in order to allow us to perform
5183 * some task recovery.
5185 case SIR_SCRIPT_STOPPED:
5187 * Do we have any target to reset or unit to clear ?
5189 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5190 tp = &np->target[i];
5192 (tp->lun0p && tp->lun0p->to_clear)) {
5198 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5199 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5209 * If not, walk the busy queue for any
5210 * disconnected CCB to be aborted.
5213 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5214 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
5215 if (cp->host_status != HS_DISCONNECT)
5218 target = cp->target;
5225 * If some target is to be selected,
5226 * prepare and start the selection.
5229 tp = &np->target[target];
5230 np->abrt_sel.sel_id = target;
5231 np->abrt_sel.sel_scntl3 = tp->head.wval;
5232 np->abrt_sel.sel_sxfer = tp->head.sval;
5233 OUTL(nc_dsa, np->hcb_ba);
5234 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
5239 * Now look for a CCB to abort that haven't started yet.
5240 * Btw, the SCRIPTS processor is still stopped, so
5241 * we are not in race.
5245 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5246 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5247 if (cp->host_status != HS_BUSY &&
5248 cp->host_status != HS_NEGOTIATE)
5252 #ifdef SYM_CONF_IARB_SUPPORT
5254 * If we are using IMMEDIATE ARBITRATION, we donnot
5255 * want to cancel the last queued CCB, since the
5256 * SCRIPTS may have anticipated the selection.
5258 if (cp == np->last_cp) {
5263 i = 1; /* Means we have found some */
5268 * We are done, so we donnot need
5269 * to synchronize with the SCRIPTS anylonger.
5270 * Remove the SEM flag from the ISTAT.
5273 OUTB (nc_istat, SIGP);
5277 * Compute index of next position in the start
5278 * queue the SCRIPTS intends to start and dequeue
5279 * all CCBs for that device that haven't been started.
5281 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5282 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5285 * Make sure at least our IO to abort has been dequeued.
5287 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5290 * Keep track in cam status of the reason of the abort.
5292 if (cp->to_abort == 2)
5293 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5295 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5298 * Complete with error everything that we have dequeued.
5300 sym_flush_comp_queue(np, 0);
5303 * The SCRIPTS processor has selected a target
5304 * we may have some manual recovery to perform for.
5306 case SIR_TARGET_SELECTED:
5307 target = (INB (nc_sdid) & 0xf);
5308 tp = &np->target[target];
5310 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5313 * If the target is to be reset, prepare a
5314 * M_RESET message and clear the to_reset flag
5315 * since we donnot expect this operation to fail.
5318 np->abrt_msg[0] = M_RESET;
5319 np->abrt_tbl.size = 1;
5325 * Otherwise, look for some logical unit to be cleared.
5327 if (tp->lun0p && tp->lun0p->to_clear)
5329 else if (tp->lunmp) {
5330 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5331 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5339 * If a logical unit is to be cleared, prepare
5340 * an IDENTIFY(lun) + ABORT MESSAGE.
5343 lcb_p lp = sym_lp(np, tp, lun);
5344 lp->to_clear = 0; /* We donnot expect to fail here */
5345 np->abrt_msg[0] = M_IDENTIFY | lun;
5346 np->abrt_msg[1] = M_ABORT;
5347 np->abrt_tbl.size = 2;
5352 * Otherwise, look for some disconnected job to
5353 * abort for this target.
5357 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5358 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5359 if (cp->host_status != HS_DISCONNECT)
5361 if (cp->target != target)
5365 i = 1; /* Means we have some */
5370 * If we have none, probably since the device has
5371 * completed the command before we won abitration,
5372 * send a M_ABORT message without IDENTIFY.
5373 * According to the specs, the device must just
5374 * disconnect the BUS and not abort any task.
5377 np->abrt_msg[0] = M_ABORT;
5378 np->abrt_tbl.size = 1;
5383 * We have some task to abort.
5384 * Set the IDENTIFY(lun)
5386 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5389 * If we want to abort an untagged command, we
5390 * will send a IDENTIFY + M_ABORT.
5391 * Otherwise (tagged command), we will send
5392 * a IDENTITFY + task attributes + ABORT TAG.
5394 if (cp->tag == NO_TAG) {
5395 np->abrt_msg[1] = M_ABORT;
5396 np->abrt_tbl.size = 2;
5399 np->abrt_msg[1] = cp->scsi_smsg[1];
5400 np->abrt_msg[2] = cp->scsi_smsg[2];
5401 np->abrt_msg[3] = M_ABORT_TAG;
5402 np->abrt_tbl.size = 4;
5405 * Keep track of software timeout condition, since the
5406 * peripheral driver may not count retries on abort
5407 * conditions not due to timeout.
5409 if (cp->to_abort == 2)
5410 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5411 cp->to_abort = 0; /* We donnot expect to fail here */
5415 * The target has accepted our message and switched
5416 * to BUS FREE phase as we expected.
5418 case SIR_ABORT_SENT:
5419 target = (INB (nc_sdid) & 0xf);
5420 tp = &np->target[target];
5423 ** If we didn't abort anything, leave here.
5425 if (np->abrt_msg[0] == M_ABORT)
5429 * If we sent a M_RESET, then a hardware reset has
5430 * been performed by the target.
5431 * - Reset everything to async 8 bit
5432 * - Tell ourself to negotiate next time :-)
5433 * - Prepare to clear all disconnected CCBs for
5434 * this target from our task list (lun=task=-1)
5438 if (np->abrt_msg[0] == M_RESET) {
5440 tp->head.wval = np->rv_scntl3;
5442 tp->tinfo.current.period = 0;
5443 tp->tinfo.current.offset = 0;
5444 tp->tinfo.current.width = BUS_8_BIT;
5445 tp->tinfo.current.options = 0;
5449 * Otherwise, check for the LUN and TASK(s)
5450 * concerned by the cancelation.
5451 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5452 * or an ABORT message :-)
5455 lun = np->abrt_msg[0] & 0x3f;
5456 if (np->abrt_msg[1] == M_ABORT_TAG)
5457 task = np->abrt_msg[2];
5461 * Complete all the CCBs the device should have
5462 * aborted due to our 'kiss of death' message.
5464 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5465 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5466 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5467 sym_flush_comp_queue(np, 0);
5470 * If we sent a BDR, make uper layer aware of that.
5472 if (np->abrt_msg[0] == M_RESET)
5473 xpt_async(AC_SENT_BDR, np->path, NULL);
5478 * Print to the log the message we intend to send.
5480 if (num == SIR_TARGET_SELECTED) {
5481 PRINT_TARGET(np, target);
5482 sym_printl_hex("control msgout:", np->abrt_msg,
5484 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5488 * Let the SCRIPTS processor continue.
5494 * Gerard's alchemy:) that deals with with the data
5495 * pointer for both MDP and the residual calculation.
5497 * I didn't want to bloat the code by more than 200
5498 * lignes for the handling of both MDP and the residual.
5499 * This has been achieved by using a data pointer
5500 * representation consisting in an index in the data
5501 * array (dp_sg) and a negative offset (dp_ofs) that
5502 * have the following meaning:
5504 * - dp_sg = SYM_CONF_MAX_SG
5505 * we are at the end of the data script.
5506 * - dp_sg < SYM_CONF_MAX_SG
5507 * dp_sg points to the next entry of the scatter array
5508 * we want to transfer.
5510 * dp_ofs represents the residual of bytes of the
5511 * previous entry scatter entry we will send first.
5513 * no residual to send first.
5515 * The function sym_evaluate_dp() accepts an arbitray
5516 * offset (basically from the MDP message) and returns
5517 * the corresponding values of dp_sg and dp_ofs.
5520 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5523 int dp_ofs, dp_sg, dp_sgmin;
5528 * Compute the resulted data pointer in term of a script
5529 * address within some DATA script and a signed byte offset.
5533 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5535 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5541 dp_scr = scr_to_cpu(pm->ret);
5542 dp_ofs -= scr_to_cpu(pm->sg.size);
5546 * If we are auto-sensing, then we are done.
5548 if (cp->host_flags & HF_SENSE) {
5554 * Deduce the index of the sg entry.
5555 * Keep track of the index of the first valid entry.
5556 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5559 tmp = scr_to_cpu(cp->phys.head.goalp);
5560 dp_sg = SYM_CONF_MAX_SG;
5562 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5563 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5566 * Move to the sg entry the data pointer belongs to.
5568 * If we are inside the data area, we expect result to be:
5571 * dp_ofs = 0 and dp_sg is the index of the sg entry
5572 * the data pointer belongs to (or the end of the data)
5574 * dp_ofs < 0 and dp_sg is the index of the sg entry
5575 * the data pointer belongs to + 1.
5579 while (dp_sg > dp_sgmin) {
5581 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5582 n = dp_ofs + (tmp & 0xffffff);
5590 else if (dp_ofs > 0) {
5591 while (dp_sg < SYM_CONF_MAX_SG) {
5592 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5593 dp_ofs -= (tmp & 0xffffff);
5601 * Make sure the data pointer is inside the data area.
5602 * If not, return some error.
5604 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5606 else if (dp_sg > SYM_CONF_MAX_SG ||
5607 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5611 * Save the extreme pointer if needed.
5613 if (dp_sg > cp->ext_sg ||
5614 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5616 cp->ext_ofs = dp_ofs;
5630 * chip handler for MODIFY DATA POINTER MESSAGE
5632 * We also call this function on IGNORE WIDE RESIDUE
5633 * messages that do not match a SWIDE full condition.
5634 * Btw, we assume in that situation that such a message
5635 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5638 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5641 u32 dp_scr = INL (nc_temp);
5649 * Not supported for auto-sense.
5651 if (cp->host_flags & HF_SENSE)
5655 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5656 * to the resulted data pointer.
5658 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5663 * And our alchemy:) allows to easily calculate the data
5664 * script address we want to return for the next data phase.
5666 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5667 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5670 * If offset / scatter entry is zero we donnot need
5671 * a context for the new current data pointer.
5679 * Get a context for the new current data pointer.
5681 hflags = INB (HF_PRT);
5683 if (hflags & HF_DP_SAVED)
5684 hflags ^= HF_ACT_PM;
5686 if (!(hflags & HF_ACT_PM)) {
5688 dp_scr = SCRIPTA_BA (np, pm0_data);
5692 dp_scr = SCRIPTA_BA (np, pm1_data);
5695 hflags &= ~(HF_DP_SAVED);
5697 OUTB (HF_PRT, hflags);
5700 * Set up the new current data pointer.
5701 * ofs < 0 there, and for the next data phase, we
5702 * want to transfer part of the data of the sg entry
5703 * corresponding to index dp_sg-1 prior to returning
5704 * to the main data script.
5706 pm->ret = cpu_to_scr(dp_ret);
5707 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5708 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5709 pm->sg.addr = cpu_to_scr(tmp);
5710 pm->sg.size = cpu_to_scr(-dp_ofs);
5713 OUTL (nc_temp, dp_scr);
5714 OUTL_DSP (SCRIPTA_BA (np, clrack));
5718 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5723 * chip calculation of the data residual.
5725 * As I used to say, the requirement of data residual
5726 * in SCSI is broken, useless and cannot be achieved
5727 * without huge complexity.
5728 * But most OSes and even the official CAM require it.
5729 * When stupidity happens to be so widely spread inside
5730 * a community, it gets hard to convince.
5732 * Anyway, I don't care, since I am not going to use
5733 * any software that considers this data residual as
5734 * a relevant information. :)
5737 static int sym_compute_residual(hcb_p np, ccb_p cp)
5739 int dp_sg, dp_sgmin, resid = 0;
5743 * Check for some data lost or just thrown away.
5744 * We are not required to be quite accurate in this
5745 * situation. Btw, if we are odd for output and the
5746 * device claims some more data, it may well happen
5747 * than our residual be zero. :-)
5749 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5750 if (cp->xerr_status & XE_EXTRA_DATA)
5751 resid -= cp->extra_bytes;
5752 if (cp->xerr_status & XE_SODL_UNRUN)
5754 if (cp->xerr_status & XE_SWIDE_OVRUN)
5759 * If all data has been transferred,
5760 * there is no residual.
5762 if (cp->phys.head.lastp == cp->phys.head.goalp)
5766 * If no data transfer occurs, or if the data
5767 * pointer is weird, return full residual.
5769 if (cp->startp == cp->phys.head.lastp ||
5770 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5772 return cp->data_len;
5776 * If we were auto-sensing, then we are done.
5778 if (cp->host_flags & HF_SENSE) {
5783 * We are now full comfortable in the computation
5784 * of the data residual (2's complement).
5786 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5787 resid = -cp->ext_ofs;
5788 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5789 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5790 resid += (tmp & 0xffffff);
5794 * Hopefully, the result is not too wrong.
5800 * Print out the content of a SCSI message.
5803 static int sym_show_msg (u_char * msg)
5807 if (*msg==M_EXTENDED) {
5809 if (i-1>msg[1]) break;
5810 printf ("-%x",msg[i]);
5813 } else if ((*msg & 0xf0) == 0x20) {
5814 printf ("-%x",msg[1]);
5820 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5824 printf ("%s: ", label);
5826 (void) sym_show_msg (msg);
5831 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5833 * When we try to negotiate, we append the negotiation message
5834 * to the identify and (maybe) simple tag message.
5835 * The host status field is set to HS_NEGOTIATE to mark this
5838 * If the target doesn't answer this message immediately
5839 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5840 * will be raised eventually.
5841 * The handler removes the HS_NEGOTIATE status, and sets the
5842 * negotiated value to the default (async / nowide).
5844 * If we receive a matching answer immediately, we check it
5845 * for validity, and set the values.
5847 * If we receive a Reject message immediately, we assume the
5848 * negotiation has failed, and fall back to standard values.
5850 * If we receive a negotiation message while not in HS_NEGOTIATE
5851 * state, it's a target initiated negotiation. We prepare a
5852 * (hopefully) valid answer, set our parameters, and send back
5853 * this answer to the target.
5855 * If the target doesn't fetch the answer (no message out phase),
5856 * we assume the negotiation has failed, and fall back to default
5857 * settings (SIR_NEGO_PROTO interrupt).
5859 * When we set the values, we adjust them in all ccbs belonging
5860 * to this target, in the controller's register, and in the "phys"
5861 * field of the controller's struct sym_hcb.
5865 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5867 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5869 u_char chg, ofs, per, fak, div;
5873 * Synchronous request message received.
5875 if (DEBUG_FLAGS & DEBUG_NEGO) {
5876 sym_print_msg(cp, "sync msgin", np->msgin);
5880 * request or answer ?
5882 if (INB (HS_PRT) == HS_NEGOTIATE) {
5883 OUTB (HS_PRT, HS_BUSY);
5884 if (cp->nego_status && cp->nego_status != NS_SYNC)
5890 * get requested values.
5897 * check values against our limits.
5900 if (ofs > np->maxoffs)
5901 {chg = 1; ofs = np->maxoffs;}
5903 if (ofs > tp->tinfo.user.offset)
5904 {chg = 1; ofs = tp->tinfo.user.offset;}
5909 if (per < np->minsync)
5910 {chg = 1; per = np->minsync;}
5912 if (per < tp->tinfo.user.period)
5913 {chg = 1; per = tp->tinfo.user.period;}
5918 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5921 if (DEBUG_FLAGS & DEBUG_NEGO) {
5923 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5924 ofs, per, div, fak, chg);
5928 * This was an answer message
5931 if (chg) /* Answer wasn't acceptable. */
5933 sym_setsync (np, cp, ofs, per, div, fak);
5934 OUTL_DSP (SCRIPTA_BA (np, clrack));
5939 * It was a request. Set value and
5940 * prepare an answer message
5942 sym_setsync (np, cp, ofs, per, div, fak);
5944 np->msgout[0] = M_EXTENDED;
5946 np->msgout[2] = M_X_SYNC_REQ;
5947 np->msgout[3] = per;
5948 np->msgout[4] = ofs;
5950 cp->nego_status = NS_SYNC;
5952 if (DEBUG_FLAGS & DEBUG_NEGO) {
5953 sym_print_msg(cp, "sync msgout", np->msgout);
5956 np->msgin [0] = M_NOOP;
5958 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5961 sym_setsync (np, cp, 0, 0, 0, 0);
5962 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5966 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5968 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5970 u_char chg, ofs, per, fak, dt, div, wide;
5974 * Synchronous request message received.
5976 if (DEBUG_FLAGS & DEBUG_NEGO) {
5977 sym_print_msg(cp, "ppr msgin", np->msgin);
5981 * get requested values.
5986 wide = np->msgin[6];
5987 dt = np->msgin[7] & PPR_OPT_DT;
5990 * request or answer ?
5992 if (INB (HS_PRT) == HS_NEGOTIATE) {
5993 OUTB (HS_PRT, HS_BUSY);
5994 if (cp->nego_status && cp->nego_status != NS_PPR)
6000 * check values against our limits.
6002 if (wide > np->maxwide)
6003 {chg = 1; wide = np->maxwide;}
6004 if (!wide || !(np->features & FE_ULTRA3))
6007 if (wide > tp->tinfo.user.width)
6008 {chg = 1; wide = tp->tinfo.user.width;}
6011 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
6014 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
6018 if (ofs > np->maxoffs_dt)
6019 {chg = 1; ofs = np->maxoffs_dt;}
6021 else if (ofs > np->maxoffs)
6022 {chg = 1; ofs = np->maxoffs;}
6024 if (ofs > tp->tinfo.user.offset)
6025 {chg = 1; ofs = tp->tinfo.user.offset;}
6031 if (per < np->minsync_dt)
6032 {chg = 1; per = np->minsync_dt;}
6034 else if (per < np->minsync)
6035 {chg = 1; per = np->minsync;}
6037 if (per < tp->tinfo.user.period)
6038 {chg = 1; per = tp->tinfo.user.period;}
6043 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
6046 if (DEBUG_FLAGS & DEBUG_NEGO) {
6049 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
6050 dt, ofs, per, wide, div, fak, chg);
6057 if (chg) /* Answer wasn't acceptable */
6059 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6060 OUTL_DSP (SCRIPTA_BA (np, clrack));
6065 * It was a request. Set value and
6066 * prepare an answer message
6068 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6070 np->msgout[0] = M_EXTENDED;
6072 np->msgout[2] = M_X_PPR_REQ;
6073 np->msgout[3] = per;
6075 np->msgout[5] = ofs;
6076 np->msgout[6] = wide;
6079 cp->nego_status = NS_PPR;
6081 if (DEBUG_FLAGS & DEBUG_NEGO) {
6082 sym_print_msg(cp, "ppr msgout", np->msgout);
6085 np->msgin [0] = M_NOOP;
6087 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
6090 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6091 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6093 * If it was a device response that should result in
6094 * ST, we may want to try a legacy negotiation later.
6097 tp->tinfo.goal.options = 0;
6098 tp->tinfo.goal.width = wide;
6099 tp->tinfo.goal.period = per;
6100 tp->tinfo.goal.offset = ofs;
6106 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
6108 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
6114 * Wide request message received.
6116 if (DEBUG_FLAGS & DEBUG_NEGO) {
6117 sym_print_msg(cp, "wide msgin", np->msgin);
6121 * Is it an request from the device?
6123 if (INB (HS_PRT) == HS_NEGOTIATE) {
6124 OUTB (HS_PRT, HS_BUSY);
6125 if (cp->nego_status && cp->nego_status != NS_WIDE)
6131 * get requested values.
6134 wide = np->msgin[3];
6137 * check values against driver limits.
6139 if (wide > np->maxwide)
6140 {chg = 1; wide = np->maxwide;}
6142 if (wide > tp->tinfo.user.width)
6143 {chg = 1; wide = tp->tinfo.user.width;}
6146 if (DEBUG_FLAGS & DEBUG_NEGO) {
6148 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
6152 * This was an answer message
6155 if (chg) /* Answer wasn't acceptable. */
6157 sym_setwide (np, cp, wide);
6160 * Negotiate for SYNC immediately after WIDE response.
6161 * This allows to negotiate for both WIDE and SYNC on
6162 * a single SCSI command (Suggested by Justin Gibbs).
6164 if (tp->tinfo.goal.offset) {
6165 np->msgout[0] = M_EXTENDED;
6167 np->msgout[2] = M_X_SYNC_REQ;
6168 np->msgout[3] = tp->tinfo.goal.period;
6169 np->msgout[4] = tp->tinfo.goal.offset;
6171 if (DEBUG_FLAGS & DEBUG_NEGO) {
6172 sym_print_msg(cp, "sync msgout", np->msgout);
6175 cp->nego_status = NS_SYNC;
6176 OUTB (HS_PRT, HS_NEGOTIATE);
6177 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
6181 OUTL_DSP (SCRIPTA_BA (np, clrack));
6186 * It was a request, set value and
6187 * prepare an answer message
6189 sym_setwide (np, cp, wide);
6191 np->msgout[0] = M_EXTENDED;
6193 np->msgout[2] = M_X_WIDE_REQ;
6194 np->msgout[3] = wide;
6196 np->msgin [0] = M_NOOP;
6198 cp->nego_status = NS_WIDE;
6200 if (DEBUG_FLAGS & DEBUG_NEGO) {
6201 sym_print_msg(cp, "wide msgout", np->msgout);
6204 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
6207 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6211 * Reset SYNC or WIDE to default settings.
6213 * Called when a negotiation does not succeed either
6214 * on rejection or on protocol error.
6216 * If it was a PPR that made problems, we may want to
6217 * try a legacy negotiation later.
6219 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
6222 * any error in negotiation:
6223 * fall back to default mode.
6225 switch (cp->nego_status) {
6228 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6230 tp->tinfo.goal.options = 0;
6231 if (tp->tinfo.goal.period < np->minsync)
6232 tp->tinfo.goal.period = np->minsync;
6233 if (tp->tinfo.goal.offset > np->maxoffs)
6234 tp->tinfo.goal.offset = np->maxoffs;
6238 sym_setsync (np, cp, 0, 0, 0, 0);
6241 sym_setwide (np, cp, 0);
6244 np->msgin [0] = M_NOOP;
6245 np->msgout[0] = M_NOOP;
6246 cp->nego_status = 0;
6250 * chip handler for MESSAGE REJECT received in response to
6251 * a WIDE or SYNCHRONOUS negotiation.
6253 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6255 sym_nego_default(np, tp, cp);
6256 OUTB (HS_PRT, HS_BUSY);
6260 * chip exception handler for programmed interrupts.
6262 void sym_int_sir (hcb_p np)
6264 u_char num = INB (nc_dsps);
6265 u32 dsa = INL (nc_dsa);
6266 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6267 u_char target = INB (nc_sdid) & 0x0f;
6268 tcb_p tp = &np->target[target];
6271 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6275 * Command has been completed with error condition
6276 * or has been auto-sensed.
6278 case SIR_COMPLETE_ERROR:
6279 sym_complete_error(np, cp);
6282 * The C code is currently trying to recover from something.
6283 * Typically, user want to abort some command.
6285 case SIR_SCRIPT_STOPPED:
6286 case SIR_TARGET_SELECTED:
6287 case SIR_ABORT_SENT:
6288 sym_sir_task_recovery(np, num);
6291 * The device didn't go to MSG OUT phase after having
6292 * been selected with ATN. We donnot want to handle
6295 case SIR_SEL_ATN_NO_MSG_OUT:
6296 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6297 sym_name (np), target);
6300 * The device didn't switch to MSG IN phase after
6301 * having reseleted the initiator.
6303 case SIR_RESEL_NO_MSG_IN:
6304 printf ("%s:%d: No MSG IN phase after reselection.\n",
6305 sym_name (np), target);
6308 * After reselection, the device sent a message that wasn't
6311 case SIR_RESEL_NO_IDENTIFY:
6312 printf ("%s:%d: No IDENTIFY after reselection.\n",
6313 sym_name (np), target);
6316 * The device reselected a LUN we donnot know about.
6318 case SIR_RESEL_BAD_LUN:
6319 np->msgout[0] = M_RESET;
6322 * The device reselected for an untagged nexus and we
6325 case SIR_RESEL_BAD_I_T_L:
6326 np->msgout[0] = M_ABORT;
6329 * The device reselected for a tagged nexus that we donnot
6332 case SIR_RESEL_BAD_I_T_L_Q:
6333 np->msgout[0] = M_ABORT_TAG;
6336 * The SCRIPTS let us know that the device has grabbed
6337 * our message and will abort the job.
6339 case SIR_RESEL_ABORTED:
6340 np->lastmsg = np->msgout[0];
6341 np->msgout[0] = M_NOOP;
6342 printf ("%s:%d: message %x sent on bad reselection.\n",
6343 sym_name (np), target, np->lastmsg);
6346 * The SCRIPTS let us know that a message has been
6347 * successfully sent to the device.
6349 case SIR_MSG_OUT_DONE:
6350 np->lastmsg = np->msgout[0];
6351 np->msgout[0] = M_NOOP;
6352 /* Should we really care of that */
6353 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6355 cp->xerr_status &= ~XE_PARITY_ERR;
6356 if (!cp->xerr_status)
6357 OUTOFFB (HF_PRT, HF_EXT_ERR);
6362 * The device didn't send a GOOD SCSI status.
6363 * We may have some work to do prior to allow
6364 * the SCRIPTS processor to continue.
6366 case SIR_BAD_SCSI_STATUS:
6369 sym_sir_bad_scsi_status(np, num, cp);
6372 * We are asked by the SCRIPTS to prepare a
6375 case SIR_REJECT_TO_SEND:
6376 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6377 np->msgout[0] = M_REJECT;
6380 * We have been ODD at the end of a DATA IN
6381 * transfer and the device didn't send a
6382 * IGNORE WIDE RESIDUE message.
6383 * It is a data overrun condition.
6385 case SIR_SWIDE_OVERRUN:
6387 OUTONB (HF_PRT, HF_EXT_ERR);
6388 cp->xerr_status |= XE_SWIDE_OVRUN;
6392 * We have been ODD at the end of a DATA OUT
6394 * It is a data underrun condition.
6396 case SIR_SODL_UNDERRUN:
6398 OUTONB (HF_PRT, HF_EXT_ERR);
6399 cp->xerr_status |= XE_SODL_UNRUN;
6403 * The device wants us to tranfer more data than
6404 * expected or in the wrong direction.
6405 * The number of extra bytes is in scratcha.
6406 * It is a data overrun condition.
6408 case SIR_DATA_OVERRUN:
6410 OUTONB (HF_PRT, HF_EXT_ERR);
6411 cp->xerr_status |= XE_EXTRA_DATA;
6412 cp->extra_bytes += INL (nc_scratcha);
6416 * The device switched to an illegal phase (4/5).
6420 OUTONB (HF_PRT, HF_EXT_ERR);
6421 cp->xerr_status |= XE_BAD_PHASE;
6425 * We received a message.
6427 case SIR_MSG_RECEIVED:
6430 switch (np->msgin [0]) {
6432 * We received an extended message.
6433 * We handle MODIFY DATA POINTER, SDTR, WDTR
6434 * and reject all other extended messages.
6437 switch (np->msgin [2]) {
6439 if (DEBUG_FLAGS & DEBUG_POINTER)
6440 sym_print_msg(cp,"modify DP",np->msgin);
6441 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6442 (np->msgin[5]<<8) + (np->msgin[6]);
6443 sym_modify_dp(np, tp, cp, tmp);
6446 sym_sync_nego(np, tp, cp);
6449 sym_ppr_nego(np, tp, cp);
6452 sym_wide_nego(np, tp, cp);
6459 * We received a 1/2 byte message not handled from SCRIPTS.
6460 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6461 * RESIDUE messages that haven't been anticipated by
6462 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6463 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6466 if (DEBUG_FLAGS & DEBUG_POINTER)
6467 sym_print_msg(cp,"ign wide residue", np->msgin);
6468 sym_modify_dp(np, tp, cp, -1);
6471 if (INB (HS_PRT) == HS_NEGOTIATE)
6472 sym_nego_rejected(np, tp, cp);
6475 printf ("M_REJECT received (%x:%x).\n",
6476 scr_to_cpu(np->lastmsg), np->msgout[0]);
6485 * We received an unknown message.
6486 * Ignore all MSG IN phases and reject it.
6489 sym_print_msg(cp, "WEIRD message received", np->msgin);
6490 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6493 * Negotiation failed.
6494 * Target does not send us the reply.
6495 * Remove the HS_NEGOTIATE status.
6497 case SIR_NEGO_FAILED:
6498 OUTB (HS_PRT, HS_BUSY);
6500 * Negotiation failed.
6501 * Target does not want answer message.
6503 case SIR_NEGO_PROTO:
6504 sym_nego_default(np, tp, cp);
6512 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6515 OUTL_DSP (SCRIPTA_BA (np, clrack));
6522 * Acquire a control block
6524 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6526 tcb_p tp = &np->target[tn];
6527 lcb_p lp = sym_lp(np, tp, ln);
6528 u_short tag = NO_TAG;
6530 ccb_p cp = (ccb_p) 0;
6533 * Look for a free CCB
6535 if (sym_que_empty(&np->free_ccbq))
6536 (void) sym_alloc_ccb(np);
6537 qp = sym_remque_head(&np->free_ccbq);
6540 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6543 * If the LCB is not yet available and the LUN
6544 * has been probed ok, try to allocate the LCB.
6546 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6547 lp = sym_alloc_lcb(np, tn, ln);
6553 * If the LCB is not available here, then the
6554 * logical unit is not yet discovered. For those
6555 * ones only accept 1 SCSI IO per logical unit,
6556 * since we cannot allow disconnections.
6559 if (!sym_is_bit(tp->busy0_map, ln))
6560 sym_set_bit(tp->busy0_map, ln);
6565 * If we have been asked for a tagged command.
6569 * Debugging purpose.
6571 assert(lp->busy_itl == 0);
6573 * Allocate resources for tags if not yet.
6576 sym_alloc_lcb_tags(np, tn, ln);
6581 * Get a tag for this SCSI IO and set up
6582 * the CCB bus address for reselection,
6583 * and count it for this LUN.
6584 * Toggle reselect path to tagged.
6586 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6587 tag = lp->cb_tags[lp->ia_tag];
6588 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6590 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6593 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6599 * This command will not be tagged.
6600 * If we already have either a tagged or untagged
6601 * one, refuse to overlap this untagged one.
6605 * Debugging purpose.
6607 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6609 * Count this nexus for this LUN.
6610 * Set up the CCB bus address for reselection.
6611 * Toggle reselect path to untagged.
6613 if (++lp->busy_itl == 1) {
6614 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6616 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6623 * Put the CCB into the busy queue.
6625 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6628 * Remember all informations needed to free this CCB.
6635 if (DEBUG_FLAGS & DEBUG_TAGS) {
6636 PRINT_LUN(np, tn, ln);
6637 printf ("ccb @%p using tag %d.\n", cp, tag);
6643 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6648 * Release one control block
6650 static void sym_free_ccb (hcb_p np, ccb_p cp)
6652 tcb_p tp = &np->target[cp->target];
6653 lcb_p lp = sym_lp(np, tp, cp->lun);
6655 if (DEBUG_FLAGS & DEBUG_TAGS) {
6656 PRINT_LUN(np, cp->target, cp->lun);
6657 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6665 * If tagged, release the tag, set the relect path
6667 if (cp->tag != NO_TAG) {
6669 * Free the tag value.
6671 lp->cb_tags[lp->if_tag] = cp->tag;
6672 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6675 * Make the reselect path invalid,
6676 * and uncount this CCB.
6678 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6680 } else { /* Untagged */
6682 * Make the reselect path invalid,
6683 * and uncount this CCB.
6685 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6689 * If no JOB active, make the LUN reselect path invalid.
6691 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6693 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6696 * Otherwise, we only accept 1 IO per LUN.
6697 * Clear the bit that keeps track of this IO.
6700 sym_clr_bit(tp->busy0_map, cp->lun);
6703 * We donnot queue more than 1 ccb per target
6704 * with negotiation at any time. If this ccb was
6705 * used for negotiation, clear this info in the tcb.
6707 if (cp == tp->nego_cp)
6710 #ifdef SYM_CONF_IARB_SUPPORT
6712 * If we just complete the last queued CCB,
6713 * clear this info that is no longer relevant.
6715 if (cp == np->last_cp)
6719 #ifdef FreeBSD_Bus_Dma_Abstraction
6721 * Unmap user data from DMA map if needed.
6723 if (cp->dmamapped) {
6724 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6730 * Make this CCB available.
6733 cp->host_status = HS_IDLE;
6734 sym_remque(&cp->link_ccbq);
6735 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6739 * Allocate a CCB from memory and initialize its fixed part.
6741 static ccb_p sym_alloc_ccb(hcb_p np)
6747 * Prevent from allocating more CCBs than we can
6748 * queue to the controller.
6750 if (np->actccbs >= SYM_CONF_MAX_START)
6754 * Allocate memory for this CCB.
6756 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6761 * Allocate a bounce buffer for sense data.
6763 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6768 * Allocate a map for the DMA of user data.
6770 #ifdef FreeBSD_Bus_Dma_Abstraction
6771 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6780 * Compute the bus address of this ccb.
6782 cp->ccb_ba = vtobus(cp);
6785 * Insert this ccb into the hashed list.
6787 hcode = CCB_HASH_CODE(cp->ccb_ba);
6788 cp->link_ccbh = np->ccbh[hcode];
6789 np->ccbh[hcode] = cp;
6792 * Initialyze the start and restart actions.
6794 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6795 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6798 * Initilialyze some other fields.
6800 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6803 * Chain into free ccb queue.
6805 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6811 sym_mfree_dma(cp->sns_bbuf,SYM_SNS_BBUF_LEN,"SNS_BBUF");
6812 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6818 * Look up a CCB from a DSA value.
6820 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6825 hcode = CCB_HASH_CODE(dsa);
6826 cp = np->ccbh[hcode];
6828 if (cp->ccb_ba == dsa)
6837 * Target control block initialisation.
6838 * Nothing important to do at the moment.
6840 static void sym_init_tcb (hcb_p np, u_char tn)
6843 * Check some alignments required by the chip.
6845 assert (((offsetof(struct sym_reg, nc_sxfer) ^
6846 offsetof(struct sym_tcb, head.sval)) &3) == 0);
6847 assert (((offsetof(struct sym_reg, nc_scntl3) ^
6848 offsetof(struct sym_tcb, head.wval)) &3) == 0);
6852 * Lun control block allocation and initialization.
6854 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6856 tcb_p tp = &np->target[tn];
6857 lcb_p lp = sym_lp(np, tp, ln);
6860 * Already done, just return.
6865 * Check against some race.
6867 assert(!sym_is_bit(tp->busy0_map, ln));
6870 * Initialize the target control block if not yet.
6872 sym_init_tcb (np, tn);
6875 * Allocate the LCB bus address array.
6876 * Compute the bus address of this table.
6878 if (ln && !tp->luntbl) {
6881 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6884 for (i = 0 ; i < 64 ; i++)
6885 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6886 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6890 * Allocate the table of pointers for LUN(s) > 0, if needed.
6892 if (ln && !tp->lunmp) {
6893 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6901 * Make it available to the chip.
6903 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6908 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6912 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6916 * Let the itl task point to error handling.
6918 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6921 * Set the reselect pattern to our default. :)
6923 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6926 * Set user capabilities.
6928 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6935 * Allocate LCB resources for tagged command queuing.
6937 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6939 tcb_p tp = &np->target[tn];
6940 lcb_p lp = sym_lp(np, tp, ln);
6944 * If LCB not available, try to allocate it.
6946 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6950 * Allocate the task table and and the tag allocation
6951 * circular buffer. We want both or none.
6953 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6956 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6958 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6964 * Initialize the task table with invalid entries.
6966 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6967 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6970 * Fill up the tag buffer with tag numbers.
6972 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6976 * Make the task table available to SCRIPTS,
6977 * And accept tagged commands now.
6979 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6987 * Test the pci bus snoop logic :-(
6989 * Has to be called with interrupts disabled.
6991 #ifndef SYM_CONF_IOMAPPED
6992 static int sym_regtest (hcb_p np)
6994 register volatile u32 data;
6996 * chip registers may NOT be cached.
6997 * write 0xffffffff to a read only register area,
6998 * and try to read it back.
7001 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
7002 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
7004 if (data == 0xffffffff) {
7006 if ((data & 0xe2f0fffd) != 0x02000080) {
7008 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7016 static int sym_snooptest (hcb_p np)
7018 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
7020 #ifndef SYM_CONF_IOMAPPED
7021 err |= sym_regtest (np);
7022 if (err) return (err);
7026 * Enable Master Parity Checking as we intend
7027 * to enable it for normal operations.
7029 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
7033 pc = SCRIPTB0_BA (np, snooptest);
7037 * Set memory and register.
7039 np->cache = cpu_to_scr(host_wr);
7040 OUTL (nc_temp, sym_wr);
7042 * Start script (exchange values)
7044 OUTL (nc_dsa, np->hcb_ba);
7047 * Wait 'til done (with timeout)
7049 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
7050 if (INB(nc_istat) & (INTF|SIP|DIP))
7052 if (i>=SYM_SNOOP_TIMEOUT) {
7053 printf ("CACHE TEST FAILED: timeout.\n");
7057 * Check for fatal DMA errors.
7059 dstat = INB (nc_dstat);
7060 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
7061 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
7062 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
7063 "DISABLING MASTER DATA PARITY CHECKING.\n",
7065 np->rv_ctest4 &= ~MPEE;
7069 if (dstat & (MDPE|BF|IID)) {
7070 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
7074 * Save termination position.
7078 * Read memory and register.
7080 host_rd = scr_to_cpu(np->cache);
7081 sym_rd = INL (nc_scratcha);
7082 sym_bk = INL (nc_temp);
7085 * Check termination position.
7087 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
7088 printf ("CACHE TEST FAILED: script execution failed.\n");
7089 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
7090 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
7091 (u_long) SCRIPTB0_BA (np, snoopend) +8);
7097 if (host_wr != sym_rd) {
7098 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
7099 (int) host_wr, (int) sym_rd);
7102 if (host_rd != sym_wr) {
7103 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
7104 (int) sym_wr, (int) host_rd);
7107 if (sym_bk != sym_wr) {
7108 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
7109 (int) sym_wr, (int) sym_bk);
7117 * Determine the chip's clock frequency.
7119 * This is essential for the negotiation of the synchronous
7122 * Note: we have to return the correct value.
7123 * THERE IS NO SAFE DEFAULT VALUE.
7125 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7126 * 53C860 and 53C875 rev. 1 support fast20 transfers but
7127 * do not have a clock doubler and so are provided with a
7128 * 80 MHz clock. All other fast20 boards incorporate a doubler
7129 * and so should be delivered with a 40 MHz clock.
7130 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
7131 * clock and provide a clock quadrupler (160 Mhz).
7135 * Select SCSI clock frequency
7137 static void sym_selectclock(hcb_p np, u_char scntl3)
7140 * If multiplier not present or not selected, leave here.
7142 if (np->multiplier <= 1) {
7143 OUTB(nc_scntl3, scntl3);
7147 if (sym_verbose >= 2)
7148 printf ("%s: enabling clock multiplier\n", sym_name(np));
7150 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7152 * Wait for the LCKFRQ bit to be set if supported by the chip.
7153 * Otherwise wait 20 micro-seconds.
7155 if (np->features & FE_LCKFRQ) {
7157 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7160 printf("%s: the chip cannot lock the frequency\n",
7164 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7165 OUTB(nc_scntl3, scntl3);
7166 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7167 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7171 * calculate SCSI clock frequency (in KHz)
7173 static unsigned getfreq (hcb_p np, int gen)
7175 unsigned int ms = 0;
7179 * Measure GEN timer delay in order
7180 * to calculate SCSI clock frequency
7182 * This code will never execute too
7183 * many loop iterations (if DELAY is
7184 * reasonably correct). It could get
7185 * too low a delay (too high a freq.)
7186 * if the CPU is slow executing the
7187 * loop for some reason (an NMI, for
7188 * example). For this reason we will
7189 * if multiple measurements are to be
7190 * performed trust the higher delay
7191 * (lower frequency returned).
7193 OUTW (nc_sien , 0); /* mask all scsi interrupts */
7194 (void) INW (nc_sist); /* clear pending scsi interrupt */
7195 OUTB (nc_dien , 0); /* mask all dma interrupts */
7196 (void) INW (nc_sist); /* another one, just to be sure :) */
7197 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7198 OUTB (nc_stime1, 0); /* disable general purpose timer */
7199 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7200 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
7201 UDELAY (1000); /* count ms */
7202 OUTB (nc_stime1, 0); /* disable general purpose timer */
7204 * set prescaler to divide by whatever 0 means
7205 * 0 ought to choose divide by 2, but appears
7206 * to set divide by 3.5 mode in my 53c810 ...
7208 OUTB (nc_scntl3, 0);
7211 * adjust for prescaler, and convert into KHz
7213 f = ms ? ((1 << gen) * 4340) / ms : 0;
7215 if (sym_verbose >= 2)
7216 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
7217 sym_name(np), gen, ms, f);
7222 static unsigned sym_getfreq (hcb_p np)
7227 (void) getfreq (np, gen); /* throw away first result */
7228 f1 = getfreq (np, gen);
7229 f2 = getfreq (np, gen);
7230 if (f1 > f2) f1 = f2; /* trust lower result */
7235 * Get/probe chip SCSI clock frequency
7237 static void sym_getclock (hcb_p np, int mult)
7239 unsigned char scntl3 = np->sv_scntl3;
7240 unsigned char stest1 = np->sv_stest1;
7244 * For the C10 core, assume 40 MHz.
7246 if (np->features & FE_C10) {
7247 np->multiplier = mult;
7248 np->clock_khz = 40000 * mult;
7255 * True with 875/895/896/895A with clock multiplier selected
7257 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7258 if (sym_verbose >= 2)
7259 printf ("%s: clock multiplier found\n", sym_name(np));
7260 np->multiplier = mult;
7264 * If multiplier not found or scntl3 not 7,5,3,
7265 * reset chip and get frequency from general purpose timer.
7266 * Otherwise trust scntl3 BIOS setting.
7268 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7269 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7270 f1 = sym_getfreq (np);
7273 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7275 if (f1 < 45000) f1 = 40000;
7276 else if (f1 < 55000) f1 = 50000;
7279 if (f1 < 80000 && mult > 1) {
7280 if (sym_verbose >= 2)
7281 printf ("%s: clock multiplier assumed\n",
7283 np->multiplier = mult;
7286 if ((scntl3 & 7) == 3) f1 = 40000;
7287 else if ((scntl3 & 7) == 5) f1 = 80000;
7290 f1 /= np->multiplier;
7294 * Compute controller synchronous parameters.
7296 f1 *= np->multiplier;
7301 * Get/probe PCI clock frequency
7303 static int sym_getpciclock (hcb_p np)
7308 * For the C1010-33, this doesn't work.
7309 * For the C1010-66, this will be tested when I'll have
7310 * such a beast to play with.
7312 if (!(np->features & FE_C10)) {
7313 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7314 f = (int) sym_getfreq (np);
7315 OUTB (nc_stest1, 0);
7322 /*============= DRIVER ACTION/COMPLETION ====================*/
7325 * Print something that tells about extended errors.
7327 static void sym_print_xerr(ccb_p cp, int x_status)
7329 if (x_status & XE_PARITY_ERR) {
7331 printf ("unrecovered SCSI parity error.\n");
7333 if (x_status & XE_EXTRA_DATA) {
7335 printf ("extraneous data discarded.\n");
7337 if (x_status & XE_BAD_PHASE) {
7339 printf ("illegal scsi phase (4/5).\n");
7341 if (x_status & XE_SODL_UNRUN) {
7343 printf ("ODD transfer in DATA OUT phase.\n");
7345 if (x_status & XE_SWIDE_OVRUN) {
7347 printf ("ODD transfer in DATA IN phase.\n");
7352 * Choose the more appropriate CAM status if
7353 * the IO encountered an extended error.
7355 static int sym_xerr_cam_status(int cam_status, int x_status)
7358 if (x_status & XE_PARITY_ERR)
7359 cam_status = CAM_UNCOR_PARITY;
7360 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7361 cam_status = CAM_DATA_RUN_ERR;
7362 else if (x_status & XE_BAD_PHASE)
7363 cam_status = CAM_REQ_CMP_ERR;
7365 cam_status = CAM_REQ_CMP_ERR;
7371 * Complete execution of a SCSI command with extented
7372 * error, SCSI status error, or having been auto-sensed.
7374 * The SCRIPTS processor is not running there, so we
7375 * can safely access IO registers and remove JOBs from
7377 * SCRATCHA is assumed to have been loaded with STARTPOS
7378 * before the SCRIPTS called the C code.
7380 static void sym_complete_error (hcb_p np, ccb_p cp)
7382 struct ccb_scsiio *csio;
7387 * Paranoid check. :)
7389 if (!cp || !cp->cam_ccb)
7392 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7393 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7394 cp->host_status, cp->ssss_status, cp->host_flags,
7395 cp->target, cp->lun);
7400 * Get CAM command pointer.
7402 csio = &cp->cam_ccb->csio;
7405 * Check for extended errors.
7407 if (cp->xerr_status) {
7409 sym_print_xerr(cp, cp->xerr_status);
7410 if (cp->host_status == HS_COMPLETE)
7411 cp->host_status = HS_COMP_ERR;
7415 * Calculate the residual.
7417 csio->sense_resid = 0;
7418 csio->resid = sym_compute_residual(np, cp);
7420 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7421 csio->resid = 0; /* throw them away. :) */
7425 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7426 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7427 csio->sense_resid = csio->resid; /* Swap residuals */
7428 csio->resid = cp->sv_resid;
7430 if (sym_verbose && cp->sv_xerr_status)
7431 sym_print_xerr(cp, cp->sv_xerr_status);
7432 if (cp->host_status == HS_COMPLETE &&
7433 cp->ssss_status == S_GOOD &&
7434 cp->xerr_status == 0) {
7435 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7436 cp->sv_xerr_status);
7437 cam_status |= CAM_AUTOSNS_VALID;
7439 * Bounce back the sense data to user and
7442 bzero(&csio->sense_data, csio->sense_len);
7443 bcopy(cp->sns_bbuf, &csio->sense_data,
7444 MIN(csio->sense_len, SYM_SNS_BBUF_LEN));
7445 csio->sense_resid += csio->sense_len;
7446 csio->sense_resid -= SYM_SNS_BBUF_LEN;
7449 * If the device reports a UNIT ATTENTION condition
7450 * due to a RESET condition, we should consider all
7451 * disconnect CCBs for this unit as aborted.
7455 p = (u_char *) csio->sense_data;
7456 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7457 sym_clear_tasks(np, CAM_REQ_ABORTED,
7458 cp->target,cp->lun, -1);
7463 cam_status = CAM_AUTOSENSE_FAIL;
7465 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7466 csio->scsi_status = cp->ssss_status;
7467 cam_status = CAM_SCSI_STATUS_ERROR;
7469 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7470 cam_status = CAM_SEL_TIMEOUT;
7471 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7472 cam_status = CAM_UNEXP_BUSFREE;
7473 else { /* Extended error */
7476 printf ("COMMAND FAILED (%x %x %x).\n",
7477 cp->host_status, cp->ssss_status,
7480 csio->scsi_status = cp->ssss_status;
7482 * Set the most appropriate value for CAM status.
7484 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7489 * Dequeue all queued CCBs for that device
7490 * not yet started by SCRIPTS.
7492 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7493 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7496 * Restart the SCRIPTS processor.
7498 OUTL_DSP (SCRIPTA_BA (np, start));
7500 #ifdef FreeBSD_Bus_Dma_Abstraction
7502 * Synchronize DMA map if needed.
7504 if (cp->dmamapped) {
7505 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7506 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7507 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7511 * Add this one to the COMP queue.
7512 * Complete all those commands with either error
7513 * or requeue condition.
7515 sym_set_cam_status((union ccb *) csio, cam_status);
7516 sym_remque(&cp->link_ccbq);
7517 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7518 sym_flush_comp_queue(np, 0);
7522 * Complete execution of a successful SCSI command.
7524 * Only successful commands go to the DONE queue,
7525 * since we need to have the SCRIPTS processor
7526 * stopped on any error condition.
7527 * The SCRIPTS processor is running while we are
7528 * completing successful commands.
7530 static void sym_complete_ok (hcb_p np, ccb_p cp)
7532 struct ccb_scsiio *csio;
7537 * Paranoid check. :)
7539 if (!cp || !cp->cam_ccb)
7541 assert (cp->host_status == HS_COMPLETE);
7544 * Get command, target and lun pointers.
7546 csio = &cp->cam_ccb->csio;
7547 tp = &np->target[cp->target];
7548 lp = sym_lp(np, tp, cp->lun);
7551 * Assume device discovered on first success.
7554 sym_set_bit(tp->lun_map, cp->lun);
7557 * If all data have been transferred, given than no
7558 * extended error did occur, there is no residual.
7561 if (cp->phys.head.lastp != cp->phys.head.goalp)
7562 csio->resid = sym_compute_residual(np, cp);
7565 * Wrong transfer residuals may be worse than just always
7566 * returning zero. User can disable this feature from
7567 * sym_conf.h. Residual support is enabled by default.
7569 if (!SYM_CONF_RESIDUAL_SUPPORT)
7572 #ifdef FreeBSD_Bus_Dma_Abstraction
7574 * Synchronize DMA map if needed.
7576 if (cp->dmamapped) {
7577 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7578 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7579 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7583 * Set status and complete the command.
7585 csio->scsi_status = cp->ssss_status;
7586 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7587 sym_free_ccb (np, cp);
7588 sym_xpt_done(np, (union ccb *) csio);
7592 * Our timeout handler.
7594 static void sym_timeout1(void *arg)
7596 union ccb *ccb = (union ccb *) arg;
7597 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7600 * Check that the CAM CCB is still queued.
7605 switch(ccb->ccb_h.func_code) {
7607 (void) sym_abort_scsiio(np, ccb, 1);
7614 static void sym_timeout(void *arg)
7624 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7630 * Look up our CCB control block.
7633 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7634 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7635 if (cp2->cam_ccb == ccb) {
7640 if (!cp || cp->host_status == HS_WAIT)
7644 * If a previous abort didn't succeed in time,
7645 * perform a BUS reset.
7648 sym_reset_scsi_bus(np, 1);
7653 * Mark the CCB for abort and allow time for.
7655 cp->to_abort = timed_out ? 2 : 1;
7656 ccb->ccb_h.timeout_ch = timeout(sym_timeout, (caddr_t) ccb, 10*hz);
7659 * Tell the SCRIPTS processor to stop and synchronize with us.
7661 np->istat_sem = SEM;
7662 OUTB (nc_istat, SIGP|SEM);
7667 * Reset a SCSI device (all LUNs of a target).
7669 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7672 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7674 if (ccb_h->target_id == np->myaddr ||
7675 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7676 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7677 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7681 tp = &np->target[ccb_h->target_id];
7684 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7686 np->istat_sem = SEM;
7687 OUTB (nc_istat, SIGP|SEM);
7692 * SIM action entry point.
7694 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7697 sym_action1(sim, ccb);
7701 static void sym_action1(struct cam_sim *sim, union ccb *ccb)
7708 u_char idmsg, *msgptr;
7710 struct ccb_scsiio *csio;
7711 struct ccb_hdr *ccb_h;
7713 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7716 * Retrieve our controller data structure.
7718 np = (hcb_p) cam_sim_softc(sim);
7721 * The common case is SCSI IO.
7722 * We deal with other ones elsewhere.
7724 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7725 sym_action2(sim, ccb);
7729 ccb_h = &csio->ccb_h;
7732 * Work around races.
7734 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7740 * Minimal checkings, so that we will not
7741 * go outside our tables.
7743 if (ccb_h->target_id == np->myaddr ||
7744 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7745 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7746 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7751 * Retreive the target and lun descriptors.
7753 tp = &np->target[ccb_h->target_id];
7754 lp = sym_lp(np, tp, ccb_h->target_lun);
7757 * Complete the 1st INQUIRY command with error
7758 * condition if the device is flagged NOSCAN
7759 * at BOOT in the NVRAM. This may speed up
7760 * the boot and maintain coherency with BIOS
7761 * device numbering. Clearing the flag allows
7762 * user to rescan skipped devices later.
7763 * We also return error for devices not flagged
7764 * for SCAN LUNS in the NVRAM since some mono-lun
7765 * devices behave badly when asked for some non
7766 * zero LUN. Btw, this is an absolute hack.:-)
7768 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7769 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7770 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7771 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7772 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7773 ccb_h->target_lun != 0)) {
7774 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7775 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7781 * Get a control block for this IO.
7783 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7784 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7786 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7791 * Keep track of the IO in our CCB.
7796 * Build the IDENTIFY message.
7798 idmsg = M_IDENTIFY | cp->lun;
7799 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7802 msgptr = cp->scsi_smsg;
7804 msgptr[msglen++] = idmsg;
7807 * Build the tag message if present.
7809 if (cp->tag != NO_TAG) {
7810 u_char order = csio->tag_action;
7818 order = M_SIMPLE_TAG;
7820 msgptr[msglen++] = order;
7823 * For less than 128 tags, actual tags are numbered
7824 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7825 * with devices that have problems with #TAG 0 or too
7826 * great #TAG numbers. For more tags (up to 256),
7827 * we use directly our tag number.
7829 #if SYM_CONF_MAX_TASK > (512/4)
7830 msgptr[msglen++] = cp->tag;
7832 msgptr[msglen++] = (cp->tag << 1) + 1;
7837 * Build a negotiation message if needed.
7838 * (nego_status is filled by sym_prepare_nego())
7840 cp->nego_status = 0;
7841 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7842 tp->tinfo.current.period != tp->tinfo.goal.period ||
7843 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7844 tp->tinfo.current.options != tp->tinfo.goal.options) {
7845 if (!tp->nego_cp && lp)
7846 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7856 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7857 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7862 cp->phys.select.sel_id = cp->target;
7863 cp->phys.select.sel_scntl3 = tp->head.wval;
7864 cp->phys.select.sel_sxfer = tp->head.sval;
7865 cp->phys.select.sel_scntl4 = tp->head.uval;
7870 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7871 cp->phys.smsg.size = cpu_to_scr(msglen);
7876 if (sym_setup_cdb(np, csio, cp) < 0) {
7877 sym_free_ccb(np, cp);
7878 sym_xpt_done(np, ccb);
7885 #if 0 /* Provision */
7886 cp->actualquirks = tp->quirks;
7888 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7889 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7890 cp->ssss_status = S_ILLEGAL;
7891 cp->xerr_status = 0;
7893 cp->extra_bytes = 0;
7896 * extreme data pointer.
7897 * shall be positive, so -1 is lower than lowest.:)
7903 * Build the data descriptor block
7906 sym_setup_data_and_start(np, csio, cp);
7910 * Setup buffers and pointers that address the CDB.
7911 * I bet, physical CDBs will never be used on the planet,
7912 * since they can be bounced without significant overhead.
7914 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7916 struct ccb_hdr *ccb_h;
7920 ccb_h = &csio->ccb_h;
7923 * CDB is 16 bytes max.
7925 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7926 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7929 cmd_len = csio->cdb_len;
7931 if (ccb_h->flags & CAM_CDB_POINTER) {
7932 /* CDB is a pointer */
7933 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7934 /* CDB pointer is virtual */
7935 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7936 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7938 /* CDB pointer is physical */
7940 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7942 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7947 /* CDB is in the CAM ccb (buffer) */
7948 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7949 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7952 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7953 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7959 * Set up data pointers used by SCRIPTS.
7961 static void __inline
7962 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7967 * No segments means no data.
7973 * Set the data pointer.
7977 goalp = SCRIPTA_BA (np, data_out2) + 8;
7978 lastp = goalp - 8 - (cp->segments * (2*4));
7981 cp->host_flags |= HF_DATA_IN;
7982 goalp = SCRIPTA_BA (np, data_in2) + 8;
7983 lastp = goalp - 8 - (cp->segments * (2*4));
7987 lastp = goalp = SCRIPTB_BA (np, no_data);
7991 cp->phys.head.lastp = cpu_to_scr(lastp);
7992 cp->phys.head.goalp = cpu_to_scr(goalp);
7993 cp->phys.head.savep = cpu_to_scr(lastp);
7994 cp->startp = cp->phys.head.savep;
7998 #ifdef FreeBSD_Bus_Dma_Abstraction
8000 * Call back routine for the DMA map service.
8001 * If bounce buffers are used (why ?), we may sleep and then
8002 * be called there in another context.
8005 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
8016 np = (hcb_p) cp->arg;
8019 * Deal with weird races.
8021 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
8025 * Deal with weird errors.
8029 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
8034 * Build the data descriptor for the chip.
8038 /* 896 rev 1 requires to be careful about boundaries */
8039 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
8040 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
8042 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
8044 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8050 * Synchronize the DMA map only if we have
8051 * actually mapped the data.
8053 if (cp->dmamapped) {
8054 bus_dmamap_sync(np->data_dmat, cp->dmamap,
8055 (bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
8056 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
8060 * Set host status to busy state.
8061 * May have been set back to HS_WAIT to avoid a race.
8063 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
8066 * Set data pointers.
8068 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
8071 * Enqueue this IO in our pending queue.
8073 sym_enqueue_cam_ccb(np, ccb);
8076 * When `#ifed 1', the code below makes the driver
8077 * panic on the first attempt to write to a SCSI device.
8078 * It is the first test we want to do after a driver
8079 * change that does not seem obviously safe. :)
8082 switch (cp->cdb_buf[0]) {
8083 case 0x0A: case 0x2A: case 0xAA:
8084 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
8092 * Activate this job.
8094 sym_put_start_queue(np, cp);
8099 sym_free_ccb(np, cp);
8100 sym_xpt_done(np, ccb);
8105 * How complex it gets to deal with the data in CAM.
8106 * The Bus Dma stuff makes things still more complex.
8109 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8111 struct ccb_hdr *ccb_h;
8114 ccb_h = &csio->ccb_h;
8117 * Now deal with the data.
8119 cp->data_len = csio->dxfer_len;
8123 * No direction means no data.
8125 dir = (ccb_h->flags & CAM_DIR_MASK);
8126 if (dir == CAM_DIR_NONE) {
8127 sym_execute_ccb(cp, NULL, 0, 0);
8131 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8133 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8134 /* Buffer is virtual */
8137 cp->dmamapped = (dir == CAM_DIR_IN) ?
8138 SYM_DMA_READ : SYM_DMA_WRITE;
8140 retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
8141 csio->data_ptr, csio->dxfer_len,
8142 sym_execute_ccb, cp, 0);
8143 if (retv == EINPROGRESS) {
8144 cp->host_status = HS_WAIT;
8145 xpt_freeze_simq(np->sim, 1);
8146 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
8150 /* Buffer is physical */
8151 struct bus_dma_segment seg;
8153 seg.ds_addr = (bus_addr_t) csio->data_ptr;
8154 sym_execute_ccb(cp, &seg, 1, 0);
8157 /* Scatter/gather list */
8158 struct bus_dma_segment *segs;
8160 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8161 /* The SG list pointer is physical */
8162 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8166 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8167 /* SG buffer pointers are virtual */
8168 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8172 /* SG buffer pointers are physical */
8173 segs = (struct bus_dma_segment *)csio->data_ptr;
8174 sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
8178 sym_free_ccb(np, cp);
8179 sym_xpt_done(np, (union ccb *) csio);
8183 * Move the scatter list to our data block.
8186 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
8187 bus_dma_segment_t *psegs, int nsegs)
8189 struct sym_tblmove *data;
8190 bus_dma_segment_t *psegs2;
8192 if (nsegs > SYM_CONF_MAX_SG)
8195 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
8196 psegs2 = &psegs[nsegs-1];
8197 cp->segments = nsegs;
8200 data->addr = cpu_to_scr(psegs2->ds_addr);
8201 data->size = cpu_to_scr(psegs2->ds_len);
8202 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8203 printf ("%s scatter: paddr=%lx len=%ld\n",
8204 sym_name(np), (long) psegs2->ds_addr,
8205 (long) psegs2->ds_len);
8207 if (psegs2 != psegs) {
8217 #else /* FreeBSD_Bus_Dma_Abstraction */
8220 * How complex it gets to deal with the data in CAM.
8221 * Variant without the Bus Dma Abstraction option.
8224 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8226 struct ccb_hdr *ccb_h;
8229 ccb_h = &csio->ccb_h;
8232 * Now deal with the data.
8238 * No direction means no data.
8240 dir = (ccb_h->flags & CAM_DIR_MASK);
8241 if (dir == CAM_DIR_NONE)
8244 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8246 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8247 /* Buffer is virtual */
8248 retv = sym_scatter_virtual(np, cp,
8249 (vm_offset_t) csio->data_ptr,
8250 (vm_size_t) csio->dxfer_len);
8252 /* Buffer is physical */
8253 retv = sym_scatter_physical(np, cp,
8254 (vm_offset_t) csio->data_ptr,
8255 (vm_size_t) csio->dxfer_len);
8258 /* Scatter/gather list */
8260 struct bus_dma_segment *segs;
8261 segs = (struct bus_dma_segment *)csio->data_ptr;
8262 nsegs = csio->sglist_cnt;
8264 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8265 /* The SG list pointer is physical */
8266 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8269 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8270 /* SG buffer pointers are virtual */
8271 retv = sym_scatter_sg_virtual(np, cp, segs, nsegs);
8273 /* SG buffer pointers are physical */
8274 retv = sym_scatter_sg_physical(np, cp, segs, nsegs);
8278 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8284 * Set data pointers.
8286 sym_setup_data_pointers(np, cp, dir);
8289 * Enqueue this IO in our pending queue.
8291 sym_enqueue_cam_ccb(np, (union ccb *) csio);
8294 * Activate this job.
8296 sym_put_start_queue(np, cp);
8299 * Command is successfully queued.
8303 sym_free_ccb(np, cp);
8304 sym_xpt_done(np, (union ccb *) csio);
8308 * Scatter a virtual buffer into bus addressable chunks.
8311 sym_scatter_virtual(hcb_p np, ccb_p cp, vm_offset_t vaddr, vm_size_t len)
8317 cp->data_len += len;
8321 s = SYM_CONF_MAX_SG - 1 - cp->segments;
8323 while (n && s >= 0) {
8324 pn = (pe - 1) & ~PAGE_MASK;
8330 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8331 printf ("%s scatter: va=%lx pa=%lx siz=%ld\n",
8332 sym_name(np), pn, (u_long) vtobus(pn), k);
8334 cp->phys.data[s].addr = cpu_to_scr(vtobus(pn));
8335 cp->phys.data[s].size = cpu_to_scr(k);
8340 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8346 * Scatter a SG list with virtual addresses into bus addressable chunks.
8349 sym_scatter_sg_virtual(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8353 for (i = nsegs - 1 ; i >= 0 ; --i) {
8354 retv = sym_scatter_virtual(np, cp,
8355 psegs[i].ds_addr, psegs[i].ds_len);
8363 * Scatter a physical buffer into bus addressable chunks.
8366 sym_scatter_physical(hcb_p np, ccb_p cp, vm_offset_t paddr, vm_size_t len)
8368 struct bus_dma_segment seg;
8370 seg.ds_addr = paddr;
8372 return sym_scatter_sg_physical(np, cp, &seg, 1);
8375 #endif /* FreeBSD_Bus_Dma_Abstraction */
8378 * Scatter a SG list with physical addresses into bus addressable chunks.
8379 * We need to ensure 16MB boundaries not to be crossed during DMA of
8380 * each segment, due to some chips being flawed.
8382 #define BOUND_MASK ((1UL<<24)-1)
8384 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8390 #ifndef FreeBSD_Bus_Dma_Abstraction
8391 s = SYM_CONF_MAX_SG - 1 - cp->segments;
8393 s = SYM_CONF_MAX_SG - 1;
8396 ps = psegs[t].ds_addr;
8397 pe = ps + psegs[t].ds_len;
8400 pn = (pe - 1) & ~BOUND_MASK;
8404 if (DEBUG_FLAGS & DEBUG_SCATTER) {
8405 printf ("%s scatter: paddr=%lx len=%ld\n",
8406 sym_name(np), pn, k);
8408 cp->phys.data[s].addr = cpu_to_scr(pn);
8409 cp->phys.data[s].size = cpu_to_scr(k);
8410 #ifndef FreeBSD_Bus_Dma_Abstraction
8417 ps = psegs[t].ds_addr;
8418 pe = ps + psegs[t].ds_len;
8424 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8426 return t >= 0 ? -1 : 0;
8431 * SIM action for non performance critical stuff.
8433 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8438 struct ccb_hdr *ccb_h;
8441 * Retrieve our controller data structure.
8443 np = (hcb_p) cam_sim_softc(sim);
8445 ccb_h = &ccb->ccb_h;
8447 switch (ccb_h->func_code) {
8448 case XPT_SET_TRAN_SETTINGS:
8450 struct ccb_trans_settings *cts;
8453 tp = &np->target[ccb_h->target_id];
8456 * Update SPI transport settings in TARGET control block.
8457 * Update SCSI device settings in LUN control block.
8459 lp = sym_lp(np, tp, ccb_h->target_lun);
8460 #ifdef FreeBSD_New_Tran_Settings
8461 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8463 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8465 sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8467 sym_update_dflags(np, &lp->current_flags, cts);
8469 #ifdef FreeBSD_New_Tran_Settings
8470 if (cts->type == CTS_TYPE_USER_SETTINGS) {
8472 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
8474 sym_update_trans(np, tp, &tp->tinfo.user, cts);
8476 sym_update_dflags(np, &lp->user_flags, cts);
8479 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8482 case XPT_GET_TRAN_SETTINGS:
8484 struct ccb_trans_settings *cts;
8485 struct sym_trans *tip;
8489 tp = &np->target[ccb_h->target_id];
8490 lp = sym_lp(np, tp, ccb_h->target_lun);
8492 #ifdef FreeBSD_New_Tran_Settings
8493 #define cts__scsi (&cts->proto_specific.scsi)
8494 #define cts__spi (&cts->xport_specific.spi)
8495 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8496 tip = &tp->tinfo.current;
8497 dflags = lp ? lp->current_flags : 0;
8500 tip = &tp->tinfo.user;
8501 dflags = lp ? lp->user_flags : tp->usrflags;
8504 cts->protocol = PROTO_SCSI;
8505 cts->transport = XPORT_SPI;
8506 cts->protocol_version = tip->scsi_version;
8507 cts->transport_version = tip->spi_version;
8509 cts__spi->sync_period = tip->period;
8510 cts__spi->sync_offset = tip->offset;
8511 cts__spi->bus_width = tip->width;
8512 cts__spi->ppr_options = tip->options;
8514 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8515 | CTS_SPI_VALID_SYNC_OFFSET
8516 | CTS_SPI_VALID_BUS_WIDTH
8517 | CTS_SPI_VALID_PPR_OPTIONS;
8519 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8520 if (dflags & SYM_DISC_ENABLED)
8521 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8522 cts__spi->valid |= CTS_SPI_VALID_DISC;
8524 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8525 if (dflags & SYM_TAGS_ENABLED)
8526 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8527 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8531 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8532 tip = &tp->tinfo.current;
8533 dflags = lp ? lp->current_flags : 0;
8536 tip = &tp->tinfo.user;
8537 dflags = lp ? lp->user_flags : tp->usrflags;
8540 cts->sync_period = tip->period;
8541 cts->sync_offset = tip->offset;
8542 cts->bus_width = tip->width;
8544 cts->valid = CCB_TRANS_SYNC_RATE_VALID
8545 | CCB_TRANS_SYNC_OFFSET_VALID
8546 | CCB_TRANS_BUS_WIDTH_VALID;
8548 cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
8550 if (dflags & SYM_DISC_ENABLED)
8551 cts->flags |= CCB_TRANS_DISC_ENB;
8553 if (dflags & SYM_TAGS_ENABLED)
8554 cts->flags |= CCB_TRANS_TAG_ENB;
8556 cts->valid |= CCB_TRANS_DISC_VALID;
8557 cts->valid |= CCB_TRANS_TQ_VALID;
8559 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8562 case XPT_CALC_GEOMETRY:
8564 struct ccb_calc_geometry *ccg;
8566 u32 secs_per_cylinder;
8570 * Silly DOS geometry.
8573 size_mb = ccg->volume_size
8574 / ((1024L * 1024L) / ccg->block_size);
8577 if (size_mb > 1024 && extended) {
8579 ccg->secs_per_track = 63;
8582 ccg->secs_per_track = 32;
8584 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
8585 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
8586 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8591 struct ccb_pathinq *cpi = &ccb->cpi;
8592 cpi->version_num = 1;
8593 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8594 if ((np->features & FE_WIDE) != 0)
8595 cpi->hba_inquiry |= PI_WIDE_16;
8596 cpi->target_sprt = 0;
8598 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8599 cpi->hba_misc |= PIM_SCANHILO;
8600 if (np->usrflags & SYM_AVOID_BUS_RESET)
8601 cpi->hba_misc |= PIM_NOBUSRESET;
8602 cpi->hba_eng_cnt = 0;
8603 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8604 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8605 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8606 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8607 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8608 cpi->bus_id = cam_sim_bus(sim);
8609 cpi->initiator_id = np->myaddr;
8610 cpi->base_transfer_speed = 3300;
8611 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8612 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8613 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8614 cpi->unit_number = cam_sim_unit(sim);
8616 #ifdef FreeBSD_New_Tran_Settings
8617 cpi->protocol = PROTO_SCSI;
8618 cpi->protocol_version = SCSI_REV_2;
8619 cpi->transport = XPORT_SPI;
8620 cpi->transport_version = 2;
8621 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8622 if (np->features & FE_ULTRA3) {
8623 cpi->transport_version = 3;
8624 cpi->xport_specific.spi.ppr_options =
8625 SID_SPI_CLOCK_DT_ST;
8628 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8633 union ccb *abort_ccb = ccb->cab.abort_ccb;
8634 switch(abort_ccb->ccb_h.func_code) {
8636 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8637 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8641 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8648 sym_reset_dev(np, ccb);
8653 sym_reset_scsi_bus(np, 0);
8655 xpt_print_path(np->path);
8656 printf("SCSI BUS reset delivered.\n");
8659 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8662 case XPT_ACCEPT_TARGET_IO:
8663 case XPT_CONT_TARGET_IO:
8665 case XPT_NOTIFY_ACK:
8666 case XPT_IMMED_NOTIFY:
8669 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8675 * Asynchronous notification handler.
8678 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8681 struct cam_sim *sim;
8688 sim = (struct cam_sim *) cb_arg;
8689 np = (hcb_p) cam_sim_softc(sim);
8692 case AC_LOST_DEVICE:
8693 tn = xpt_path_target_id(path);
8694 if (tn >= SYM_CONF_MAX_TARGET)
8697 tp = &np->target[tn];
8701 tp->head.wval = np->rv_scntl3;
8704 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8705 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8706 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8707 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8718 * Update transfer settings of a target.
8720 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8721 struct ccb_trans_settings *cts)
8726 #ifdef FreeBSD_New_Tran_Settings
8727 #define cts__spi (&cts->xport_specific.spi)
8728 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8729 tip->width = cts__spi->bus_width;
8730 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8731 tip->offset = cts__spi->sync_offset;
8732 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8733 tip->period = cts__spi->sync_period;
8734 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8735 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8736 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8737 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8738 tip->scsi_version = cts->protocol_version;
8739 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8740 cts->transport_version != XPORT_VERSION_UNKNOWN)
8741 tip->spi_version = cts->transport_version;
8744 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
8745 tip->width = cts->bus_width;
8746 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
8747 tip->offset = cts->sync_offset;
8748 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
8749 tip->period = cts->sync_period;
8752 * Scale against driver configuration limits.
8754 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8755 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8756 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8759 * Scale against actual controller BUS width.
8761 if (tip->width > np->maxwide)
8762 tip->width = np->maxwide;
8764 #ifdef FreeBSD_New_Tran_Settings
8766 * Only accept DT if controller supports and SYNC/WIDE asked.
8768 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8769 !(tip->width == BUS_16_BIT && tip->offset)) {
8770 tip->options &= ~PPR_OPT_DT;
8774 * For now, only assume DT if period <= 9, BUS 16 and offset != 0.
8777 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3) &&
8778 tip->period <= 9 && tip->width == BUS_16_BIT && tip->offset) {
8779 tip->options |= PPR_OPT_DT;
8784 * Scale period factor and offset against controller limits.
8786 if (tip->options & PPR_OPT_DT) {
8787 if (tip->period < np->minsync_dt)
8788 tip->period = np->minsync_dt;
8789 if (tip->period > np->maxsync_dt)
8790 tip->period = np->maxsync_dt;
8791 if (tip->offset > np->maxoffs_dt)
8792 tip->offset = np->maxoffs_dt;
8795 if (tip->period < np->minsync)
8796 tip->period = np->minsync;
8797 if (tip->period > np->maxsync)
8798 tip->period = np->maxsync;
8799 if (tip->offset > np->maxoffs)
8800 tip->offset = np->maxoffs;
8805 * Update flags for a device (logical unit).
8808 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8810 #ifdef FreeBSD_New_Tran_Settings
8811 #define cts__scsi (&cts->proto_specific.scsi)
8812 #define cts__spi (&cts->xport_specific.spi)
8813 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8814 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8815 *flags |= SYM_DISC_ENABLED;
8817 *flags &= ~SYM_DISC_ENABLED;
8820 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8821 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8822 *flags |= SYM_TAGS_ENABLED;
8824 *flags &= ~SYM_TAGS_ENABLED;
8829 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
8830 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
8831 *flags |= SYM_DISC_ENABLED;
8833 *flags &= ~SYM_DISC_ENABLED;
8836 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
8837 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
8838 *flags |= SYM_TAGS_ENABLED;
8840 *flags &= ~SYM_TAGS_ENABLED;
8846 /*============= DRIVER INITIALISATION ==================*/
8848 #ifdef FreeBSD_Bus_Io_Abstraction
8850 static device_method_t sym_pci_methods[] = {
8851 DEVMETHOD(device_probe, sym_pci_probe),
8852 DEVMETHOD(device_attach, sym_pci_attach),
8856 static driver_t sym_pci_driver = {
8859 sizeof(struct sym_hcb)
8862 static devclass_t sym_devclass;
8864 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, 0, 0);
8866 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
8868 static u_long sym_unit;
8870 static struct pci_device sym_pci_driver = {
8878 #if __FreeBSD_version >= 400000
8879 COMPAT_PCI_DRIVER (sym, sym_pci_driver);
8881 DATA_SET (pcidevice_set, sym_pci_driver);
8884 #endif /* FreeBSD_Bus_Io_Abstraction */
8886 static struct sym_pci_chip sym_pci_dev_table[] = {
8887 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8890 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8891 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8895 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8896 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8899 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8902 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8903 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8905 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8906 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8908 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8909 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8911 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8912 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8915 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8916 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8919 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8920 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8923 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8924 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8927 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8928 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8929 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8933 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8934 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8938 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8939 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8940 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8942 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8943 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8944 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8946 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8947 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8948 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8951 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8952 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8953 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8956 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8957 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8958 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8961 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8962 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8963 FE_RAM|FE_IO256|FE_LEDC}
8966 #define sym_pci_num_devs \
8967 (sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
8970 * Look up the chip table.
8972 * Return a pointer to the chip entry if found,
8975 static struct sym_pci_chip *
8976 #ifdef FreeBSD_Bus_Io_Abstraction
8977 sym_find_pci_chip(device_t dev)
8979 sym_find_pci_chip(pcici_t pci_tag)
8982 struct sym_pci_chip *chip;
8987 #ifdef FreeBSD_Bus_Io_Abstraction
8988 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8991 device_id = pci_get_device(dev);
8992 revision = pci_get_revid(dev);
8994 if (pci_cfgread(pci_tag, PCIR_VENDOR, 2) != PCI_VENDOR_NCR)
8997 device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
8998 revision = pci_cfgread(pci_tag, PCIR_REVID, 1);
9001 for (i = 0; i < sym_pci_num_devs; i++) {
9002 chip = &sym_pci_dev_table[i];
9003 if (device_id != chip->device_id)
9005 if (revision > chip->revision_id)
9014 * Tell upper layer if the chip is supported.
9016 #ifdef FreeBSD_Bus_Io_Abstraction
9018 sym_pci_probe(device_t dev)
9020 struct sym_pci_chip *chip;
9022 chip = sym_find_pci_chip(dev);
9023 if (chip && sym_find_firmware(chip)) {
9024 device_set_desc(dev, chip->name);
9025 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)? -2000 : 0;
9029 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
9031 sym_pci_probe(pcici_t pci_tag, pcidi_t type)
9033 struct sym_pci_chip *chip;
9035 chip = sym_find_pci_chip(pci_tag);
9036 if (chip && sym_find_firmware(chip)) {
9038 /* Only claim chips we are allowed to take precedence over the ncr */
9039 if (!(chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP))
9050 * Attach a sym53c8xx device.
9052 #ifdef FreeBSD_Bus_Io_Abstraction
9054 sym_pci_attach(device_t dev)
9057 sym_pci_attach(pcici_t pci_tag, int unit)
9059 int err = sym_pci_attach2(pci_tag, unit);
9061 printf("sym: failed to attach unit %d - err=%d.\n", unit, err);
9064 sym_pci_attach2(pcici_t pci_tag, int unit)
9067 struct sym_pci_chip *chip;
9070 struct sym_hcb *np = 0;
9071 struct sym_nvram nvram;
9072 struct sym_fw *fw = 0;
9074 #ifdef FreeBSD_Bus_Dma_Abstraction
9075 bus_dma_tag_t bus_dmat;
9078 * I expected to be told about a parent
9079 * DMA tag, but didn't find any.
9085 * Only probed devices should be attached.
9086 * We just enjoy being paranoid. :)
9088 #ifdef FreeBSD_Bus_Io_Abstraction
9089 chip = sym_find_pci_chip(dev);
9091 chip = sym_find_pci_chip(pci_tag);
9093 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
9097 * Allocate immediately the host control block,
9098 * since we are only expecting to succeed. :)
9099 * We keep track in the HCB of all the resources that
9100 * are to be released on error.
9102 #ifdef FreeBSD_Bus_Dma_Abstraction
9103 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
9105 np->bus_dmat = bus_dmat;
9109 np = sym_calloc_dma(sizeof(*np), "HCB");
9115 * Copy some useful infos to the HCB.
9117 np->hcb_ba = vtobus(np);
9118 np->verbose = bootverbose;
9119 #ifdef FreeBSD_Bus_Io_Abstraction
9121 np->unit = device_get_unit(dev);
9122 np->device_id = pci_get_device(dev);
9123 np->revision_id = pci_get_revid(dev);
9125 np->pci_tag = pci_tag;
9127 np->device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
9128 np->revision_id = pci_cfgread(pci_tag, PCIR_REVID, 1);
9130 np->features = chip->features;
9131 np->clock_divn = chip->nr_divisor;
9132 np->maxoffs = chip->offset_max;
9133 np->maxburst = chip->burst_max;
9134 np->scripta_sz = fw->a_size;
9135 np->scriptb_sz = fw->b_size;
9136 np->fw_setup = fw->setup;
9137 np->fw_patch = fw->patch;
9138 np->fw_name = fw->name;
9143 snprintf(np->inst_name, sizeof(np->inst_name), "sym%d", np->unit);
9146 * Initialyze the CCB free and busy queues.
9148 sym_que_init(&np->free_ccbq);
9149 sym_que_init(&np->busy_ccbq);
9150 sym_que_init(&np->comp_ccbq);
9151 sym_que_init(&np->cam_ccbq);
9154 * Allocate a tag for the DMA of user data.
9156 #ifdef FreeBSD_Bus_Dma_Abstraction
9157 if (bus_dma_tag_create(np->bus_dmat, 1, (1<<24),
9158 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
9160 BUS_SPACE_MAXSIZE, SYM_CONF_MAX_SG,
9161 (1<<24), 0, &np->data_dmat)) {
9162 device_printf(dev, "failed to create DMA tag.\n");
9167 * Read and apply some fix-ups to the PCI COMMAND
9168 * register. We want the chip to be enabled for:
9170 * - PCI parity checking (reporting would also be fine)
9171 * - Write And Invalidate.
9173 #ifdef FreeBSD_Bus_Io_Abstraction
9174 command = pci_read_config(dev, PCIR_COMMAND, 2);
9176 command = pci_cfgread(pci_tag, PCIR_COMMAND, 2);
9178 command |= PCIM_CMD_BUSMASTEREN;
9179 command |= PCIM_CMD_PERRESPEN;
9180 command |= /* PCIM_CMD_MWIEN */ 0x0010;
9181 #ifdef FreeBSD_Bus_Io_Abstraction
9182 pci_write_config(dev, PCIR_COMMAND, command, 2);
9184 pci_cfgwrite(pci_tag, PCIR_COMMAND, command, 2);
9188 * Let the device know about the cache line size,
9189 * if it doesn't yet.
9191 #ifdef FreeBSD_Bus_Io_Abstraction
9192 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
9194 cachelnsz = pci_cfgread(pci_tag, PCIR_CACHELNSZ, 1);
9198 #ifdef FreeBSD_Bus_Io_Abstraction
9199 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
9201 pci_cfgwrite(pci_tag, PCIR_CACHELNSZ, cachelnsz, 1);
9206 * Alloc/get/map/retrieve everything that deals with MMIO.
9208 #ifdef FreeBSD_Bus_Io_Abstraction
9209 if ((command & PCIM_CMD_MEMEN) != 0) {
9210 int regs_id = SYM_PCI_MMIO;
9211 np->mmio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, ®s_id,
9212 0, ~0, 1, RF_ACTIVE);
9214 if (!np->mmio_res) {
9215 device_printf(dev, "failed to allocate MMIO resources\n");
9218 np->mmio_bsh = rman_get_bushandle(np->mmio_res);
9219 np->mmio_tag = rman_get_bustag(np->mmio_res);
9220 np->mmio_pa = rman_get_start(np->mmio_res);
9221 np->mmio_va = (vm_offset_t) rman_get_virtual(np->mmio_res);
9222 np->mmio_ba = np->mmio_pa;
9224 if ((command & PCIM_CMD_MEMEN) != 0) {
9225 vm_offset_t vaddr, paddr;
9226 if (!pci_map_mem(pci_tag, SYM_PCI_MMIO, &vaddr, &paddr)) {
9227 printf("%s: failed to map MMIO window\n", sym_name(np));
9230 np->mmio_va = vaddr;
9231 np->mmio_pa = paddr;
9232 np->mmio_ba = paddr;
9239 #ifdef FreeBSD_Bus_Io_Abstraction
9241 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &i,
9242 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
9244 device_printf(dev, "failed to allocate IRQ resource\n");
9249 #ifdef SYM_CONF_IOMAPPED
9251 * User want us to use normal IO with PCI.
9252 * Alloc/get/map/retrieve everything that deals with IO.
9254 #ifdef FreeBSD_Bus_Io_Abstraction
9255 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9256 int regs_id = SYM_PCI_IO;
9257 np->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, ®s_id,
9258 0, ~0, 1, RF_ACTIVE);
9261 device_printf(dev, "failed to allocate IO resources\n");
9264 np->io_bsh = rman_get_bushandle(np->io_res);
9265 np->io_tag = rman_get_bustag(np->io_res);
9266 np->io_port = rman_get_start(np->io_res);
9268 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9270 if (!pci_map_port (pci_tag, SYM_PCI_IO, &io_port)) {
9271 printf("%s: failed to map IO window\n", sym_name(np));
9274 np->io_port = io_port;
9278 #endif /* SYM_CONF_IOMAPPED */
9281 * If the chip has RAM.
9282 * Alloc/get/map/retrieve the corresponding resources.
9284 if ((np->features & (FE_RAM|FE_RAM8K)) &&
9285 (command & PCIM_CMD_MEMEN) != 0) {
9286 #ifdef FreeBSD_Bus_Io_Abstraction
9287 int regs_id = SYM_PCI_RAM;
9288 if (np->features & FE_64BIT)
9289 regs_id = SYM_PCI_RAM64;
9290 np->ram_res = bus_alloc_resource(dev, SYS_RES_MEMORY, ®s_id,
9291 0, ~0, 1, RF_ACTIVE);
9293 device_printf(dev,"failed to allocate RAM resources\n");
9296 np->ram_id = regs_id;
9297 np->ram_bsh = rman_get_bushandle(np->ram_res);
9298 np->ram_tag = rman_get_bustag(np->ram_res);
9299 np->ram_pa = rman_get_start(np->ram_res);
9300 np->ram_va = (vm_offset_t) rman_get_virtual(np->ram_res);
9301 np->ram_ba = np->ram_pa;
9303 vm_offset_t vaddr, paddr;
9304 int regs_id = SYM_PCI_RAM;
9305 if (np->features & FE_64BIT)
9306 regs_id = SYM_PCI_RAM64;
9307 if (!pci_map_mem(pci_tag, regs_id, &vaddr, &paddr)) {
9308 printf("%s: failed to map RAM window\n", sym_name(np));
9318 * Save setting of some IO registers, so we will
9319 * be able to probe specific implementations.
9321 sym_save_initial_setting (np);
9324 * Reset the chip now, since it has been reported
9325 * that SCSI clock calibration may not work properly
9326 * if the chip is currently active.
9328 sym_chip_reset (np);
9331 * Try to read the user set-up.
9333 (void) sym_read_nvram(np, &nvram);
9336 * Prepare controller and devices settings, according
9337 * to chip features, user set-up and driver set-up.
9339 (void) sym_prepare_setting(np, &nvram);
9342 * Check the PCI clock frequency.
9343 * Must be performed after prepare_setting since it destroys
9344 * STEST1 that is used to probe for the clock doubler.
9346 i = sym_getpciclock(np);
9348 #ifdef FreeBSD_Bus_Io_Abstraction
9349 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
9351 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
9356 * Allocate the start queue.
9358 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
9361 np->squeue_ba = vtobus(np->squeue);
9364 * Allocate the done queue.
9366 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
9369 np->dqueue_ba = vtobus(np->dqueue);
9372 * Allocate the target bus address array.
9374 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
9377 np->targtbl_ba = vtobus(np->targtbl);
9380 * Allocate SCRIPTS areas.
9382 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
9383 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
9384 if (!np->scripta0 || !np->scriptb0)
9388 * Allocate some CCB. We need at least ONE.
9390 if (!sym_alloc_ccb(np))
9394 * Calculate BUS addresses where we are going
9395 * to load the SCRIPTS.
9397 np->scripta_ba = vtobus(np->scripta0);
9398 np->scriptb_ba = vtobus(np->scriptb0);
9399 np->scriptb0_ba = np->scriptb_ba;
9402 np->scripta_ba = np->ram_ba;
9403 if (np->features & FE_RAM8K) {
9405 np->scriptb_ba = np->scripta_ba + 4096;
9406 #if BITS_PER_LONG > 32
9407 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
9415 * Copy scripts to controller instance.
9417 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
9418 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
9421 * Setup variable parts in scripts and compute
9422 * scripts bus addresses used from the C code.
9424 np->fw_setup(np, fw);
9427 * Bind SCRIPTS with physical addresses usable by the
9428 * SCRIPTS processor (as seen from the BUS = BUS addresses).
9430 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
9431 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
9433 #ifdef SYM_CONF_IARB_SUPPORT
9435 * If user wants IARB to be set when we win arbitration
9436 * and have other jobs, compute the max number of consecutive
9437 * settings of IARB hints before we leave devices a chance to
9438 * arbitrate for reselection.
9440 #ifdef SYM_SETUP_IARB_MAX
9441 np->iarb_max = SYM_SETUP_IARB_MAX;
9448 * Prepare the idle and invalid task actions.
9450 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9451 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9452 np->idletask_ba = vtobus(&np->idletask);
9454 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9455 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9456 np->notask_ba = vtobus(&np->notask);
9458 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9459 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9460 np->bad_itl_ba = vtobus(&np->bad_itl);
9462 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
9463 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
9464 np->bad_itlq_ba = vtobus(&np->bad_itlq);
9467 * Allocate and prepare the lun JUMP table that is used
9468 * for a target prior the probing of devices (bad lun table).
9469 * A private table will be allocated for the target on the
9470 * first INQUIRY response received.
9472 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
9476 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
9477 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
9478 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
9481 * Prepare the bus address array that contains the bus
9482 * address of each target control block.
9483 * For now, assume all logical units are wrong. :)
9485 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
9486 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
9487 np->target[i].head.luntbl_sa =
9488 cpu_to_scr(vtobus(np->badluntbl));
9489 np->target[i].head.lun0_sa =
9490 cpu_to_scr(vtobus(&np->badlun_sa));
9494 * Now check the cache handling of the pci chipset.
9496 if (sym_snooptest (np)) {
9497 #ifdef FreeBSD_Bus_Io_Abstraction
9498 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
9500 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
9506 * Now deal with CAM.
9507 * Hopefully, we will succeed with that one.:)
9509 if (!sym_cam_attach(np))
9513 * Sigh! we are done.
9519 * We will try to free all the resources we have
9520 * allocated, but if we are a boot device, this
9521 * will not help that much.;)
9530 * Free everything that have been allocated for this device.
9532 static void sym_pci_free(hcb_p np)
9542 * First free CAM resources.
9549 * Now every should be quiet for us to
9550 * free other resources.
9552 #ifdef FreeBSD_Bus_Io_Abstraction
9554 bus_release_resource(np->device, SYS_RES_MEMORY,
9555 np->ram_id, np->ram_res);
9557 bus_release_resource(np->device, SYS_RES_MEMORY,
9558 SYM_PCI_MMIO, np->mmio_res);
9560 bus_release_resource(np->device, SYS_RES_IOPORT,
9561 SYM_PCI_IO, np->io_res);
9563 bus_release_resource(np->device, SYS_RES_IRQ,
9568 * It seems there is no means to free MMIO resources.
9573 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
9575 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
9577 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
9579 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
9581 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
9582 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
9583 #ifdef FreeBSD_Bus_Dma_Abstraction
9584 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
9586 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
9587 sym_mfree_dma(cp, sizeof(*cp), "CCB");
9591 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
9593 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
9594 tp = &np->target[target];
9595 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
9596 lp = sym_lp(np, tp, lun);
9600 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
9603 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
9605 sym_mfree_dma(lp, sizeof(*lp), "LCB");
9607 #if SYM_CONF_MAX_LUN > 1
9609 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
9614 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
9615 #ifdef FreeBSD_Bus_Dma_Abstraction
9617 bus_dma_tag_destroy(np->data_dmat);
9619 sym_mfree_dma(np, sizeof(*np), "HCB");
9623 * Allocate CAM resources and register a bus to CAM.
9625 int sym_cam_attach(hcb_p np)
9627 struct cam_devq *devq = 0;
9628 struct cam_sim *sim = 0;
9629 struct cam_path *path = 0;
9630 struct ccb_setasync csa;
9636 * Establish our interrupt handler.
9638 #ifdef FreeBSD_Bus_Io_Abstraction
9639 err = bus_setup_intr(np->device, np->irq_res,
9640 INTR_TYPE_CAM | INTR_ENTROPY, sym_intr, np,
9643 device_printf(np->device, "bus_setup_intr() failed: %d\n",
9649 if (!pci_map_int (np->pci_tag, sym_intr, np, &cam_imask)) {
9650 printf("%s: failed to map interrupt\n", sym_name(np));
9656 * Create the device queue for our sym SIM.
9658 devq = cam_simq_alloc(SYM_CONF_MAX_START);
9663 * Construct our SIM entry.
9665 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np, np->unit,
9666 1, SYM_SETUP_MAX_TAG, devq);
9671 if (xpt_bus_register(sim, 0) != CAM_SUCCESS)
9676 if (xpt_create_path(&path, 0,
9677 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
9678 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
9684 * Hmmm... This should be useful, but I donnot want to
9687 #if __FreeBSD_version < 400000
9689 #ifdef FreeBSD_Bus_Io_Abstraction
9690 alpha_register_pci_scsi(pci_get_bus(np->device),
9691 pci_get_slot(np->device), np->sim);
9693 alpha_register_pci_scsi(pci_tag->bus, pci_tag->slot, np->sim);
9699 * Establish our async notification handler.
9701 xpt_setup_ccb(&csa.ccb_h, np->path, 5);
9702 csa.ccb_h.func_code = XPT_SASYNC_CB;
9703 csa.event_enable = AC_LOST_DEVICE;
9704 csa.callback = sym_async;
9705 csa.callback_arg = np->sim;
9706 xpt_action((union ccb *)&csa);
9709 * Start the chip now, without resetting the BUS, since
9710 * it seems that this must stay under control of CAM.
9711 * With LVD/SE capable chips and BUS in SE mode, we may
9712 * get a spurious SMBC interrupt.
9720 cam_sim_free(sim, FALSE);
9722 cam_simq_free(devq);
9731 * Free everything that deals with CAM.
9733 void sym_cam_free(hcb_p np)
9735 #ifdef FreeBSD_Bus_Io_Abstraction
9737 bus_teardown_intr(np->device, np->irq_res, np->intr);
9739 /* pci_unmap_int(np->pci_tag); */ /* Does nothing */
9743 xpt_bus_deregister(cam_sim_path(np->sim));
9744 cam_sim_free(np->sim, /*free_devq*/ TRUE);
9747 xpt_free_path(np->path);
9750 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9753 * Get host setup from NVRAM.
9755 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9757 #ifdef SYM_CONF_NVRAM_SUPPORT
9759 * Get parity checking, host ID, verbose mode
9760 * and miscellaneous host flags from NVRAM.
9762 switch(nvram->type) {
9763 case SYM_SYMBIOS_NVRAM:
9764 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9765 np->rv_scntl0 &= ~0x0a;
9766 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9767 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9769 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9770 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9771 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9772 np->usrflags |= SYM_AVOID_BUS_RESET;
9774 case SYM_TEKRAM_NVRAM:
9775 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9784 * Get target setup from NVRAM.
9786 #ifdef SYM_CONF_NVRAM_SUPPORT
9787 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9788 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9792 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9794 #ifdef SYM_CONF_NVRAM_SUPPORT
9796 case SYM_SYMBIOS_NVRAM:
9797 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9799 case SYM_TEKRAM_NVRAM:
9800 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9808 #ifdef SYM_CONF_NVRAM_SUPPORT
9810 * Get target set-up from Symbios format NVRAM.
9813 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9815 tcb_p tp = &np->target[target];
9816 Symbios_target *tn = &nvram->target[target];
9818 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9819 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9821 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9823 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9824 tp->usrflags &= ~SYM_DISC_ENABLED;
9825 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9826 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9827 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9828 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9832 * Get target set-up from Tekram format NVRAM.
9835 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9837 tcb_p tp = &np->target[target];
9838 struct Tekram_target *tn = &nvram->target[target];
9841 if (tn->flags & TEKRAM_SYNC_NEGO) {
9842 i = tn->sync_index & 0xf;
9843 tp->tinfo.user.period = Tekram_sync[i];
9846 tp->tinfo.user.width =
9847 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9849 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9850 tp->usrtags = 2 << nvram->max_tags_index;
9853 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9854 tp->usrflags |= SYM_DISC_ENABLED;
9856 /* If any device does not support parity, we will not use this option */
9857 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9858 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9861 #ifdef SYM_CONF_DEBUG_NVRAM
9863 * Dump Symbios format NVRAM for debugging purpose.
9865 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9869 /* display Symbios nvram host data */
9870 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9871 sym_name(np), nvram->host_id & 0x0f,
9872 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9873 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9874 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9875 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9876 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9877 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9879 /* display Symbios nvram drive data */
9880 for (i = 0 ; i < 15 ; i++) {
9881 struct Symbios_target *tn = &nvram->target[i];
9882 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9884 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9885 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9886 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9887 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9889 tn->sync_period / 4,
9895 * Dump TEKRAM format NVRAM for debugging purpose.
9897 static u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9898 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9900 int i, tags, boot_delay;
9903 /* display Tekram nvram host data */
9904 tags = 2 << nvram->max_tags_index;
9906 if (nvram->boot_delay_index < 6)
9907 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9908 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9910 case 0: rem = ""; break;
9911 case 1: rem = " REMOVABLE=boot device"; break;
9912 case 2: rem = " REMOVABLE=all"; break;
9915 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9916 sym_name(np), nvram->host_id & 0x0f,
9917 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9918 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9919 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9920 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9921 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9922 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9923 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9924 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9925 rem, boot_delay, tags);
9927 /* display Tekram nvram drive data */
9928 for (i = 0; i <= 15; i++) {
9930 struct Tekram_target *tn = &nvram->target[i];
9931 j = tn->sync_index & 0xf;
9932 sync = Tekram_sync[j];
9933 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9935 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9936 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9937 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9938 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9939 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9940 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9944 #endif /* SYM_CONF_DEBUG_NVRAM */
9945 #endif /* SYM_CONF_NVRAM_SUPPORT */
9949 * Try reading Symbios or Tekram NVRAM
9951 #ifdef SYM_CONF_NVRAM_SUPPORT
9952 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9953 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9956 int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9958 #ifdef SYM_CONF_NVRAM_SUPPORT
9960 * Try to read SYMBIOS nvram.
9961 * Try to read TEKRAM nvram if Symbios nvram not found.
9963 if (SYM_SETUP_SYMBIOS_NVRAM &&
9964 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9965 nvp->type = SYM_SYMBIOS_NVRAM;
9966 #ifdef SYM_CONF_DEBUG_NVRAM
9967 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9970 else if (SYM_SETUP_TEKRAM_NVRAM &&
9971 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9972 nvp->type = SYM_TEKRAM_NVRAM;
9973 #ifdef SYM_CONF_DEBUG_NVRAM
9974 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9986 #ifdef SYM_CONF_NVRAM_SUPPORT
9988 * 24C16 EEPROM reading.
9990 * GPOI0 - data in/data out
9992 * Symbios NVRAM wiring now also used by Tekram.
10001 * Set/clear data/clock bit in GPIO0
10003 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
10009 *gpreg |= write_bit;
10022 OUTB (nc_gpreg, *gpreg);
10027 * Send START condition to NVRAM to wake it up.
10029 static void S24C16_start(hcb_p np, u_char *gpreg)
10031 S24C16_set_bit(np, 1, gpreg, SET_BIT);
10032 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10033 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
10034 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
10038 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
10040 static void S24C16_stop(hcb_p np, u_char *gpreg)
10042 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10043 S24C16_set_bit(np, 1, gpreg, SET_BIT);
10047 * Read or write a bit to the NVRAM,
10048 * read if GPIO0 input else write if GPIO0 output
10050 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
10053 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
10054 S24C16_set_bit(np, 0, gpreg, SET_CLK);
10056 *read_bit = INB (nc_gpreg);
10057 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
10058 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
10062 * Output an ACK to the NVRAM after reading,
10063 * change GPIO0 to output and when done back to an input
10065 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
10068 OUTB (nc_gpcntl, *gpcntl & 0xfe);
10069 S24C16_do_bit(np, 0, write_bit, gpreg);
10070 OUTB (nc_gpcntl, *gpcntl);
10074 * Input an ACK from NVRAM after writing,
10075 * change GPIO0 to input and when done back to an output
10077 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
10080 OUTB (nc_gpcntl, *gpcntl | 0x01);
10081 S24C16_do_bit(np, read_bit, 1, gpreg);
10082 OUTB (nc_gpcntl, *gpcntl);
10086 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
10087 * GPIO0 must already be set as an output
10089 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
10090 u_char *gpreg, u_char *gpcntl)
10094 for (x = 0; x < 8; x++)
10095 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
10097 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
10101 * READ a byte from the NVRAM and then send an ACK to say we have got it,
10102 * GPIO0 must already be set as an input
10104 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
10105 u_char *gpreg, u_char *gpcntl)
10111 for (x = 0; x < 8; x++) {
10112 S24C16_do_bit(np, &read_bit, 1, gpreg);
10113 *read_data |= ((read_bit & 0x01) << (7 - x));
10116 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
10120 * Read 'len' bytes starting at 'offset'.
10122 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
10124 u_char gpcntl, gpreg;
10125 u_char old_gpcntl, old_gpreg;
10130 /* save current state of GPCNTL and GPREG */
10131 old_gpreg = INB (nc_gpreg);
10132 old_gpcntl = INB (nc_gpcntl);
10133 gpcntl = old_gpcntl & 0x1c;
10135 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
10136 OUTB (nc_gpreg, old_gpreg);
10137 OUTB (nc_gpcntl, gpcntl);
10139 /* this is to set NVRAM into a known state with GPIO0/1 both low */
10141 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
10142 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
10144 /* now set NVRAM inactive with GPIO0/1 both high */
10145 S24C16_stop(np, &gpreg);
10147 /* activate NVRAM */
10148 S24C16_start(np, &gpreg);
10150 /* write device code and random address MSB */
10151 S24C16_write_byte(np, &ack_data,
10152 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10153 if (ack_data & 0x01)
10156 /* write random address LSB */
10157 S24C16_write_byte(np, &ack_data,
10158 offset & 0xff, &gpreg, &gpcntl);
10159 if (ack_data & 0x01)
10162 /* regenerate START state to set up for reading */
10163 S24C16_start(np, &gpreg);
10165 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
10166 S24C16_write_byte(np, &ack_data,
10167 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10168 if (ack_data & 0x01)
10171 /* now set up GPIO0 for inputting data */
10173 OUTB (nc_gpcntl, gpcntl);
10175 /* input all requested data - only part of total NVRAM */
10176 for (x = 0; x < len; x++)
10177 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
10179 /* finally put NVRAM back in inactive mode */
10181 OUTB (nc_gpcntl, gpcntl);
10182 S24C16_stop(np, &gpreg);
10185 /* return GPIO0/1 to original states after having accessed NVRAM */
10186 OUTB (nc_gpcntl, old_gpcntl);
10187 OUTB (nc_gpreg, old_gpreg);
10192 #undef SET_BIT /* 0 */
10193 #undef CLR_BIT /* 1 */
10194 #undef SET_CLK /* 2 */
10195 #undef CLR_CLK /* 3 */
10198 * Try reading Symbios NVRAM.
10201 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
10203 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
10204 u_char *data = (u_char *) nvram;
10205 int len = sizeof(*nvram);
10209 /* probe the 24c16 and read the SYMBIOS 24c16 area */
10210 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
10213 /* check valid NVRAM signature, verify byte count and checksum */
10214 if (nvram->type != 0 ||
10215 bcmp(nvram->trailer, Symbios_trailer, 6) ||
10216 nvram->byte_count != len - 12)
10219 /* verify checksum */
10220 for (x = 6, csum = 0; x < len - 6; x++)
10222 if (csum != nvram->checksum)
10229 * 93C46 EEPROM reading.
10234 * GPIO4 - chip select
10240 * Pulse clock bit in GPIO0
10242 static void T93C46_Clk(hcb_p np, u_char *gpreg)
10244 OUTB (nc_gpreg, *gpreg | 0x04);
10246 OUTB (nc_gpreg, *gpreg);
10250 * Read bit from NVRAM
10252 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
10255 T93C46_Clk(np, gpreg);
10256 *read_bit = INB (nc_gpreg);
10260 * Write bit to GPIO0
10262 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
10264 if (write_bit & 0x01)
10271 OUTB (nc_gpreg, *gpreg);
10274 T93C46_Clk(np, gpreg);
10278 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
10280 static void T93C46_Stop(hcb_p np, u_char *gpreg)
10283 OUTB (nc_gpreg, *gpreg);
10286 T93C46_Clk(np, gpreg);
10290 * Send read command and address to NVRAM
10292 static void T93C46_Send_Command(hcb_p np, u_short write_data,
10293 u_char *read_bit, u_char *gpreg)
10297 /* send 9 bits, start bit (1), command (2), address (6) */
10298 for (x = 0; x < 9; x++)
10299 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
10301 *read_bit = INB (nc_gpreg);
10305 * READ 2 bytes from the NVRAM
10307 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
10313 for (x = 0; x < 16; x++) {
10314 T93C46_Read_Bit(np, &read_bit, gpreg);
10316 if (read_bit & 0x01)
10317 *nvram_data |= (0x01 << (15 - x));
10319 *nvram_data &= ~(0x01 << (15 - x));
10324 * Read Tekram NvRAM data.
10326 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
10331 for (x = 0; x < len; x++) {
10333 /* output read command and address */
10334 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
10335 if (read_bit & 0x01)
10336 return 1; /* Bad */
10337 T93C46_Read_Word(np, &data[x], gpreg);
10338 T93C46_Stop(np, gpreg);
10345 * Try reading 93C46 Tekram NVRAM.
10347 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
10349 u_char gpcntl, gpreg;
10350 u_char old_gpcntl, old_gpreg;
10353 /* save current state of GPCNTL and GPREG */
10354 old_gpreg = INB (nc_gpreg);
10355 old_gpcntl = INB (nc_gpcntl);
10357 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
10359 gpreg = old_gpreg & 0xe9;
10360 OUTB (nc_gpreg, gpreg);
10361 gpcntl = (old_gpcntl & 0xe9) | 0x09;
10362 OUTB (nc_gpcntl, gpcntl);
10364 /* input all of NVRAM, 64 words */
10365 retv = T93C46_Read_Data(np, (u_short *) nvram,
10366 sizeof(*nvram) / sizeof(short), &gpreg);
10368 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
10369 OUTB (nc_gpcntl, old_gpcntl);
10370 OUTB (nc_gpreg, old_gpreg);
10376 * Try reading Tekram NVRAM.
10379 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
10381 u_char *data = (u_char *) nvram;
10382 int len = sizeof(*nvram);
10386 switch (np->device_id) {
10387 case PCI_ID_SYM53C885:
10388 case PCI_ID_SYM53C895:
10389 case PCI_ID_SYM53C896:
10390 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10393 case PCI_ID_SYM53C875:
10394 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10399 x = sym_read_T93C46_nvram(np, nvram);
10405 /* verify checksum */
10406 for (x = 0, csum = 0; x < len - 1; x += 2)
10407 csum += data[x] + (data[x+1] << 8);
10408 if (csum != 0x1234)
10414 #endif /* SYM_CONF_NVRAM_SUPPORT */