2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
65 #include <sys/param.h>
68 * Driver configuration options.
71 #include <dev/sym/sym_conf.h>
73 #include <sys/systm.h>
74 #include <sys/malloc.h>
75 #include <sys/endian.h>
76 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/module.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
87 #include <machine/bus.h>
88 #include <machine/resource.h>
91 #include <dev/ofw/openfirm.h>
92 #include <machine/ofw_machdep.h>
98 #include <cam/cam_ccb.h>
99 #include <cam/cam_sim.h>
100 #include <cam/cam_xpt_sim.h>
101 #include <cam/cam_debug.h>
103 #include <cam/scsi/scsi_all.h>
104 #include <cam/scsi/scsi_message.h>
106 /* Short and quite clear integer types */
111 typedef u_int16_t u16;
112 typedef u_int32_t u32;
115 * Driver definitions.
117 #include <dev/sym/sym_defs.h>
118 #include <dev/sym/sym_fw.h>
121 * IA32 architecture does not reorder STORES and prevents
122 * LOADS from passing STORES. It is called `program order'
123 * by Intel and allows device drivers to deal with memory
124 * ordering by only ensuring that the code is not reordered
125 * by the compiler when ordering is required.
126 * Other architectures implement a weaker ordering that
127 * requires memory barriers (and also IO barriers when they
128 * make sense) to be used.
130 #if defined __i386__ || defined __amd64__
131 #define MEMORY_BARRIER() do { ; } while(0)
132 #elif defined __powerpc__
133 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
134 #elif defined __ia64__
135 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
136 #elif defined __sparc64__
137 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
139 #error "Not supported platform"
143 * A la VMS/CAM-3 queue management.
145 typedef struct sym_quehead {
146 struct sym_quehead *flink; /* Forward pointer */
147 struct sym_quehead *blink; /* Backward pointer */
150 #define sym_que_init(ptr) do { \
151 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
154 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
156 return (head->flink == head) ? NULL : head->flink;
159 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
161 return (head->blink == head) ? NULL : head->blink;
164 static __inline void __sym_que_add(struct sym_quehead * new,
165 struct sym_quehead * blink,
166 struct sym_quehead * flink)
174 static __inline void __sym_que_del(struct sym_quehead * blink,
175 struct sym_quehead * flink)
177 flink->blink = blink;
178 blink->flink = flink;
181 static __inline int sym_que_empty(struct sym_quehead *head)
183 return head->flink == head;
186 static __inline void sym_que_splice(struct sym_quehead *list,
187 struct sym_quehead *head)
189 struct sym_quehead *first = list->flink;
192 struct sym_quehead *last = list->blink;
193 struct sym_quehead *at = head->flink;
203 #define sym_que_entry(ptr, type, member) \
204 ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
206 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
208 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
210 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
212 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
214 struct sym_quehead *elem = head->flink;
217 __sym_que_del(head, elem->flink);
223 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
225 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
227 struct sym_quehead *elem = head->blink;
230 __sym_que_del(elem->blink, head);
237 * This one may be useful.
239 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
240 for (qp = (head)->flink; qp != (head); qp = qp->flink)
242 * FreeBSD does not offer our kind of queue in the CAM CCB.
243 * So, we have to cast.
245 #define sym_qptr(p) ((struct sym_quehead *) (p))
248 * Simple bitmap operations.
250 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
251 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
252 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
255 * Number of tasks per device we want to handle.
257 #if SYM_CONF_MAX_TAG_ORDER > 8
258 #error "more than 256 tags per logical unit not allowed."
260 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
263 * Donnot use more tasks that we can handle.
265 #ifndef SYM_CONF_MAX_TAG
266 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
268 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
269 #undef SYM_CONF_MAX_TAG
270 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
274 * This one means 'NO TAG for this job'
279 * Number of SCSI targets.
281 #if SYM_CONF_MAX_TARGET > 16
282 #error "more than 16 targets not allowed."
286 * Number of logical units per target.
288 #if SYM_CONF_MAX_LUN > 64
289 #error "more than 64 logical units per target not allowed."
293 * Asynchronous pre-scaler (ns). Shall be 40 for
294 * the SCSI timings to be compliant.
296 #define SYM_CONF_MIN_ASYNC (40)
299 * Number of entries in the START and DONE queues.
301 * We limit to 1 PAGE in order to succeed allocation of
302 * these queues. Each entry is 8 bytes long (2 DWORDS).
304 #ifdef SYM_CONF_MAX_START
305 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
307 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
308 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
311 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
312 #undef SYM_CONF_MAX_QUEUE
313 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
314 #undef SYM_CONF_MAX_START
315 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
319 * For this one, we want a short name :-)
321 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
324 * Active debugging tags and verbosity.
326 #define DEBUG_ALLOC (0x0001)
327 #define DEBUG_PHASE (0x0002)
328 #define DEBUG_POLL (0x0004)
329 #define DEBUG_QUEUE (0x0008)
330 #define DEBUG_RESULT (0x0010)
331 #define DEBUG_SCATTER (0x0020)
332 #define DEBUG_SCRIPT (0x0040)
333 #define DEBUG_TINY (0x0080)
334 #define DEBUG_TIMING (0x0100)
335 #define DEBUG_NEGO (0x0200)
336 #define DEBUG_TAGS (0x0400)
337 #define DEBUG_POINTER (0x0800)
340 static int sym_debug = 0;
341 #define DEBUG_FLAGS sym_debug
343 /* #define DEBUG_FLAGS (0x0631) */
344 #define DEBUG_FLAGS (0x0000)
347 #define sym_verbose (np->verbose)
350 * Insert a delay in micro-seconds and milli-seconds.
352 static void UDELAY(int us) { DELAY(us); }
353 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
356 * Simple power of two buddy-like allocator.
358 * This simple code is not intended to be fast, but to
359 * provide power of 2 aligned memory allocations.
360 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
361 * this allocator allows simple and fast address calculations
362 * from the SCRIPTS code. In addition, cache line alignment
363 * is guaranteed for power of 2 cache line size.
365 * This allocator has been developed for the Linux sym53c8xx
366 * driver, since this O/S does not provide naturally aligned
368 * It has the advantage of allowing the driver to use private
369 * pages of memory that will be useful if we ever need to deal
370 * with IO MMUs for PCI.
372 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
373 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
375 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
378 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
379 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
380 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
382 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
383 #define free_pages(p) free((p), M_DEVBUF)
385 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
387 typedef struct m_link { /* Link between free memory chunks */
391 typedef struct m_vtob { /* Virtual to Bus address translation */
393 bus_dmamap_t dmamap; /* Map for this chunk */
394 m_addr_t vaddr; /* Virtual address */
395 m_addr_t baddr; /* Bus physical address */
397 /* Hash this stuff a bit to speed up translations */
398 #define VTOB_HASH_SHIFT 5
399 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
400 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
401 #define VTOB_HASH_CODE(m) \
402 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
404 typedef struct m_pool { /* Memory pool of a given kind */
405 bus_dma_tag_t dev_dmat; /* Identifies the pool */
406 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
407 m_addr_t (*getp)(struct m_pool *);
408 #ifdef MEMO_FREE_UNUSED
409 void (*freep)(struct m_pool *, m_addr_t);
411 #define M_GETP() mp->getp(mp)
412 #define M_FREEP(p) mp->freep(mp, p)
414 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
416 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
419 static void *___sym_malloc(m_pool_s *mp, int size)
422 int s = (1 << MEMO_SHIFT);
427 if (size > MEMO_CLUSTER_SIZE)
437 if (s == MEMO_CLUSTER_SIZE) {
438 h[j].next = (m_link_s *) M_GETP();
440 h[j].next->next = NULL;
446 a = (m_addr_t) h[j].next;
448 h[j].next = h[j].next->next;
452 h[j].next = (m_link_s *) (a+s);
453 h[j].next->next = NULL;
457 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
462 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
465 int s = (1 << MEMO_SHIFT);
471 printf("___sym_mfree(%p, %d)\n", ptr, size);
474 if (size > MEMO_CLUSTER_SIZE)
485 #ifdef MEMO_FREE_UNUSED
486 if (s == MEMO_CLUSTER_SIZE) {
493 while (q->next && q->next != (m_link_s *) b) {
497 ((m_link_s *) a)->next = h[i].next;
498 h[i].next = (m_link_s *) a;
501 q->next = q->next->next;
508 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
512 p = ___sym_malloc(mp, size);
514 if (DEBUG_FLAGS & DEBUG_ALLOC)
515 printf ("new %-10s[%4d] @%p.\n", name, size, p);
519 else if (uflags & MEMO_WARN)
520 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
525 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
527 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
529 if (DEBUG_FLAGS & DEBUG_ALLOC)
530 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
532 ___sym_mfree(mp, ptr, size);
537 * Default memory pool we donnot need to involve in DMA.
540 * With the `bus dma abstraction', we use a separate pool for
541 * memory we donnot need to involve in DMA.
543 static m_addr_t ___mp0_getp(m_pool_s *mp)
545 m_addr_t m = (m_addr_t) get_pages();
551 #ifdef MEMO_FREE_UNUSED
552 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
559 #ifdef MEMO_FREE_UNUSED
560 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
562 static m_pool_s mp0 = {0, 0, ___mp0_getp};
566 * Actual memory allocation routine for non-DMAed memory.
568 static void *sym_calloc(int size, char *name)
572 m = __sym_calloc(&mp0, size, name);
578 * Actual memory allocation routine for non-DMAed memory.
580 static void sym_mfree(void *ptr, int size, char *name)
583 __sym_mfree(&mp0, ptr, size, name);
591 * With `bus dma abstraction', we use a separate pool per parent
592 * BUS handle. A reverse table (hashed) is maintained for virtual
593 * to BUS address translation.
595 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
598 baddr = (bus_addr_t *)arg;
599 *baddr = segs->ds_addr;
602 static m_addr_t ___dma_getp(m_pool_s *mp)
606 bus_addr_t baddr = 0;
608 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
612 if (bus_dmamem_alloc(mp->dmat, &vaddr,
613 BUS_DMA_COHERENT | BUS_DMA_WAITOK, &vbp->dmamap))
615 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
616 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, BUS_DMA_NOWAIT);
618 int hc = VTOB_HASH_CODE(vaddr);
619 vbp->vaddr = (m_addr_t) vaddr;
620 vbp->baddr = (m_addr_t) baddr;
621 vbp->next = mp->vtob[hc];
624 return (m_addr_t) vaddr;
628 bus_dmamap_unload(mp->dmat, vbp->dmamap);
630 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
633 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
634 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
639 #ifdef MEMO_FREE_UNUSED
640 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
642 m_vtob_s **vbpp, *vbp;
643 int hc = VTOB_HASH_CODE(m);
645 vbpp = &mp->vtob[hc];
646 while (*vbpp && (*vbpp)->vaddr != m)
647 vbpp = &(*vbpp)->next;
650 *vbpp = (*vbpp)->next;
651 bus_dmamap_unload(mp->dmat, vbp->dmamap);
652 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
653 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
654 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
660 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
663 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
667 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
671 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
673 mp->dev_dmat = dev_dmat;
674 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
675 BUS_SPACE_MAXADDR_32BIT,
677 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
678 MEMO_CLUSTER_SIZE, 0,
679 NULL, NULL, &mp->dmat)) {
680 mp->getp = ___dma_getp;
681 #ifdef MEMO_FREE_UNUSED
682 mp->freep = ___dma_freep;
690 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
694 #ifdef MEMO_FREE_UNUSED
695 static void ___del_dma_pool(m_pool_s *p)
697 struct m_pool **pp = &mp0.next;
699 while (*pp && *pp != p)
703 bus_dma_tag_destroy(p->dmat);
704 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
709 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
715 mp = ___get_dma_pool(dev_dmat);
717 mp = ___cre_dma_pool(dev_dmat);
719 m = __sym_calloc(mp, size, name);
720 #ifdef MEMO_FREE_UNUSED
730 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
735 mp = ___get_dma_pool(dev_dmat);
737 __sym_mfree(mp, m, size, name);
738 #ifdef MEMO_FREE_UNUSED
745 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
748 int hc = VTOB_HASH_CODE(m);
750 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
753 mp = ___get_dma_pool(dev_dmat);
756 while (vp && (m_addr_t) vp->vaddr != a)
761 panic("sym: VTOBUS FAILED!\n");
762 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
766 * Verbs for DMAable memory handling.
767 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
770 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
771 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
772 #define _sym_mfree_dma(np, p, s, n) \
773 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
774 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
775 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
776 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
777 #define vtobus(p) _vtobus(np, p)
780 * Print a buffer in hexadecimal format.
782 static void sym_printb_hex (u_char *p, int n)
785 printf (" %x", *p++);
789 * Same with a label at beginning and .\n at end.
791 static void sym_printl_hex (char *label, u_char *p, int n)
793 printf ("%s", label);
794 sym_printb_hex (p, n);
799 * Return a string for SCSI BUS mode.
801 static const char *sym_scsi_bus_mode(int mode)
804 case SMODE_HVD: return "HVD";
805 case SMODE_SE: return "SE";
806 case SMODE_LVD: return "LVD";
812 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
814 #ifdef SYM_CONF_NVRAM_SUPPORT
815 static const u_char Tekram_sync[16] =
816 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
820 * Union of supported NVRAM formats.
824 #define SYM_SYMBIOS_NVRAM (1)
825 #define SYM_TEKRAM_NVRAM (2)
826 #ifdef SYM_CONF_NVRAM_SUPPORT
828 Symbios_nvram Symbios;
835 * This one is hopefully useless, but actually useful. :-)
838 #define assert(expression) { \
839 if (!(expression)) { \
841 "assertion \"%s\" failed: file \"%s\", line %d\n", \
843 __FILE__, __LINE__); \
849 * Some provision for a possible big endian mode supported by
850 * Symbios chips (never seen, by the way).
851 * For now, this stuff does not deserve any comments. :)
853 #define sym_offb(o) (o)
854 #define sym_offw(o) (o)
857 * Some provision for support for BIG ENDIAN CPU.
859 #define cpu_to_scr(dw) htole32(dw)
860 #define scr_to_cpu(dw) le32toh(dw)
863 * Access to the chip IO registers and on-chip RAM.
864 * We use the `bus space' interface under FreeBSD-4 and
865 * later kernel versions.
867 #if defined(SYM_CONF_IOMAPPED)
869 #define INB_OFF(o) bus_read_1(np->io_res, (o))
870 #define INW_OFF(o) bus_read_2(np->io_res, (o))
871 #define INL_OFF(o) bus_read_4(np->io_res, (o))
873 #define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))
874 #define OUTW_OFF(o, v) bus_write_2(np->io_res, (o), (v))
875 #define OUTL_OFF(o, v) bus_write_4(np->io_res, (o), (v))
877 #else /* Memory mapped IO */
879 #define INB_OFF(o) bus_read_1(np->mmio_res, (o))
880 #define INW_OFF(o) bus_read_2(np->mmio_res, (o))
881 #define INL_OFF(o) bus_read_4(np->mmio_res, (o))
883 #define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))
884 #define OUTW_OFF(o, v) bus_write_2(np->mmio_res, (o), (v))
885 #define OUTL_OFF(o, v) bus_write_4(np->mmio_res, (o), (v))
887 #endif /* SYM_CONF_IOMAPPED */
889 #define OUTRAM_OFF(o, a, l) \
890 bus_write_region_1(np->ram_res, (o), (a), (l))
893 * Common definitions for both bus space and legacy IO methods.
895 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
896 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
897 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
899 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
900 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
901 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
903 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
904 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
905 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
906 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
907 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
908 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
911 * We normally want the chip to have a consistent view
912 * of driver internal data structures when we restart it.
915 #define OUTL_DSP(v) \
918 OUTL (nc_dsp, (v)); \
921 #define OUTONB_STD() \
924 OUTONB (nc_dcntl, (STD|NOCOM)); \
928 * Command control block states.
932 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
933 #define HS_DISCONNECT (3) /* Disconnected by target */
934 #define HS_WAIT (4) /* waiting for resource */
936 #define HS_DONEMASK (0x80)
937 #define HS_COMPLETE (4|HS_DONEMASK)
938 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
939 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
940 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
943 * Software Interrupt Codes
945 #define SIR_BAD_SCSI_STATUS (1)
946 #define SIR_SEL_ATN_NO_MSG_OUT (2)
947 #define SIR_MSG_RECEIVED (3)
948 #define SIR_MSG_WEIRD (4)
949 #define SIR_NEGO_FAILED (5)
950 #define SIR_NEGO_PROTO (6)
951 #define SIR_SCRIPT_STOPPED (7)
952 #define SIR_REJECT_TO_SEND (8)
953 #define SIR_SWIDE_OVERRUN (9)
954 #define SIR_SODL_UNDERRUN (10)
955 #define SIR_RESEL_NO_MSG_IN (11)
956 #define SIR_RESEL_NO_IDENTIFY (12)
957 #define SIR_RESEL_BAD_LUN (13)
958 #define SIR_TARGET_SELECTED (14)
959 #define SIR_RESEL_BAD_I_T_L (15)
960 #define SIR_RESEL_BAD_I_T_L_Q (16)
961 #define SIR_ABORT_SENT (17)
962 #define SIR_RESEL_ABORTED (18)
963 #define SIR_MSG_OUT_DONE (19)
964 #define SIR_COMPLETE_ERROR (20)
965 #define SIR_DATA_OVERRUN (21)
966 #define SIR_BAD_PHASE (22)
970 * Extended error bit codes.
971 * xerr_status field of struct sym_ccb.
973 #define XE_EXTRA_DATA (1) /* unexpected data phase */
974 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
975 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
976 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
977 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
980 * Negotiation status.
981 * nego_status field of struct sym_ccb.
988 * A CCB hashed table is used to retrieve CCB address
991 #define CCB_HASH_SHIFT 8
992 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
993 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
994 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
999 #define SYM_DISC_ENABLED (1)
1000 #define SYM_TAGS_ENABLED (1<<1)
1001 #define SYM_SCAN_BOOT_DISABLED (1<<2)
1002 #define SYM_SCAN_LUNS_DISABLED (1<<3)
1005 * Host adapter miscellaneous flags.
1007 #define SYM_AVOID_BUS_RESET (1)
1008 #define SYM_SCAN_TARGETS_HILO (1<<1)
1012 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1013 * saving the DATA POINTER then reselects and terminates the IO.
1014 * On reselection, the automatic RESTORE DATA POINTER makes the
1015 * CURRENT DATA POINTER not point at the end of the IO.
1016 * This behaviour just breaks our calculation of the residual.
1017 * For now, we just force an AUTO SAVE on disconnection and will
1018 * fix that in a further driver version.
1020 #define SYM_QUIRK_AUTOSAVE 1
1025 #define SYM_LOCK() mtx_lock(&np->mtx)
1026 #define SYM_LOCK_ASSERT(_what) mtx_assert(&np->mtx, (_what))
1027 #define SYM_LOCK_DESTROY() mtx_destroy(&np->mtx)
1028 #define SYM_LOCK_INIT() mtx_init(&np->mtx, "sym_lock", NULL, MTX_DEF)
1029 #define SYM_LOCK_INITIALIZED() mtx_initialized(&np->mtx)
1030 #define SYM_UNLOCK() mtx_unlock(&np->mtx)
1032 #define SYM_SNOOP_TIMEOUT (10000000)
1033 #define SYM_PCI_IO PCIR_BAR(0)
1034 #define SYM_PCI_MMIO PCIR_BAR(1)
1035 #define SYM_PCI_RAM PCIR_BAR(2)
1036 #define SYM_PCI_RAM64 PCIR_BAR(3)
1039 * Back-pointer from the CAM CCB to our data structures.
1041 #define sym_hcb_ptr spriv_ptr0
1042 /* #define sym_ccb_ptr spriv_ptr1 */
1045 * We mostly have to deal with pointers.
1046 * Thus these typedef's.
1048 typedef struct sym_tcb *tcb_p;
1049 typedef struct sym_lcb *lcb_p;
1050 typedef struct sym_ccb *ccb_p;
1051 typedef struct sym_hcb *hcb_p;
1054 * Gather negotiable parameters value
1062 u8 options; /* PPR options */
1066 struct sym_trans current;
1067 struct sym_trans goal;
1068 struct sym_trans user;
1071 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1072 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1075 * Global TCB HEADER.
1077 * Due to lack of indirect addressing on earlier NCR chips,
1078 * this substructure is copied from the TCB to a global
1079 * address after selection.
1080 * For SYMBIOS chips that support LOAD/STORE this copy is
1081 * not needed and thus not performed.
1085 * Scripts bus addresses of LUN table accessed from scripts.
1086 * LUN #0 is a special case, since multi-lun devices are rare,
1087 * and we we want to speed-up the general case and not waste
1090 u32 luntbl_sa; /* bus address of this table */
1091 u32 lun0_sa; /* bus address of LCB #0 */
1093 * Actual SYNC/WIDE IO registers value for this target.
1094 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1095 * so have alignment constraints.
1097 /*0*/ u_char uval; /* -> SCNTL4 register */
1098 /*1*/ u_char sval; /* -> SXFER io register */
1099 /*2*/ u_char filler1;
1100 /*3*/ u_char wval; /* -> SCNTL3 io register */
1104 * Target Control Block
1109 * Assumed at offset 0.
1111 /*0*/ struct sym_tcbh head;
1114 * LUN table used by the SCRIPTS processor.
1115 * An array of bus addresses is used on reselection.
1117 u32 *luntbl; /* LCBs bus address table */
1120 * LUN table used by the C code.
1122 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1123 #if SYM_CONF_MAX_LUN > 1
1124 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1128 * Bitmap that tells about LUNs that succeeded at least
1129 * 1 IO and therefore assumed to be a real device.
1130 * Avoid useless allocation of the LCB structure.
1132 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1135 * Bitmap that tells about LUNs that haven't yet an LCB
1136 * allocated (not discovered or LCB allocation failed).
1138 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1141 * Transfer capabilities (SIP)
1143 struct sym_tinfo tinfo;
1146 * Keep track of the CCB used for the negotiation in order
1147 * to ensure that only 1 negotiation is queued at a time.
1149 ccb_p nego_cp; /* CCB used for the nego */
1152 * Set when we want to reset the device.
1157 * Other user settable limits and options.
1158 * These limits are read from the NVRAM if present.
1165 * Global LCB HEADER.
1167 * Due to lack of indirect addressing on earlier NCR chips,
1168 * this substructure is copied from the LCB to a global
1169 * address after selection.
1170 * For SYMBIOS chips that support LOAD/STORE this copy is
1171 * not needed and thus not performed.
1175 * SCRIPTS address jumped by SCRIPTS on reselection.
1176 * For not probed logical units, this address points to
1177 * SCRIPTS that deal with bad LU handling (must be at
1178 * offset zero of the LCB for that reason).
1183 * Task (bus address of a CCB) read from SCRIPTS that points
1184 * to the unique ITL nexus allowed to be disconnected.
1189 * Task table bus address (read from SCRIPTS).
1195 * Logical Unit Control Block
1200 * Assumed at offset 0.
1202 /*0*/ struct sym_lcbh head;
1205 * Task table read from SCRIPTS that contains pointers to
1206 * ITLQ nexuses. The bus address read from SCRIPTS is
1207 * inside the header.
1209 u32 *itlq_tbl; /* Kernel virtual address */
1212 * Busy CCBs management.
1214 u_short busy_itlq; /* Number of busy tagged CCBs */
1215 u_short busy_itl; /* Number of busy untagged CCBs */
1218 * Circular tag allocation buffer.
1220 u_short ia_tag; /* Tag allocation index */
1221 u_short if_tag; /* Tag release index */
1222 u_char *cb_tags; /* Circular tags buffer */
1225 * Set when we want to clear all tasks.
1233 u_char current_flags;
1237 * Action from SCRIPTS on a task.
1238 * Is part of the CCB, but is also used separately to plug
1239 * error handling action to perform from SCRIPTS.
1242 u32 start; /* Jumped by SCRIPTS after selection */
1243 u32 restart; /* Jumped by SCRIPTS on relection */
1247 * Phase mismatch context.
1249 * It is part of the CCB and is used as parameters for the
1250 * DATA pointer. We need two contexts to handle correctly the
1251 * SAVED DATA POINTER.
1254 struct sym_tblmove sg; /* Updated interrupted SG block */
1255 u32 ret; /* SCRIPT return address */
1259 * LUN control block lookup.
1260 * We use a direct pointer for LUN #0, and a table of
1261 * pointers which is only allocated for devices that support
1264 #if SYM_CONF_MAX_LUN <= 1
1265 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1267 #define sym_lp(np, tp, lun) \
1268 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1272 * Status are used by the host and the script processor.
1274 * The last four bytes (status[4]) are copied to the
1275 * scratchb register (declared as scr0..scr3) just after the
1276 * select/reselect, and copied back just after disconnecting.
1277 * Inside the script the XX_REG are used.
1281 * Last four bytes (script)
1285 #define HS_PRT nc_scr1
1287 #define SS_PRT nc_scr2
1289 #define HF_PRT nc_scr3
1292 * Last four bytes (host)
1294 #define actualquirks phys.head.status[0]
1295 #define host_status phys.head.status[1]
1296 #define ssss_status phys.head.status[2]
1297 #define host_flags phys.head.status[3]
1302 #define HF_IN_PM0 1u
1303 #define HF_IN_PM1 (1u<<1)
1304 #define HF_ACT_PM (1u<<2)
1305 #define HF_DP_SAVED (1u<<3)
1306 #define HF_SENSE (1u<<4)
1307 #define HF_EXT_ERR (1u<<5)
1308 #define HF_DATA_IN (1u<<6)
1309 #ifdef SYM_CONF_IARB_SUPPORT
1310 #define HF_HINT_IARB (1u<<7)
1314 * Global CCB HEADER.
1316 * Due to lack of indirect addressing on earlier NCR chips,
1317 * this substructure is copied from the ccb to a global
1318 * address after selection (or reselection) and copied back
1319 * before disconnect.
1320 * For SYMBIOS chips that support LOAD/STORE this copy is
1321 * not needed and thus not performed.
1325 * Start and restart SCRIPTS addresses (must be at 0).
1327 /*0*/ struct sym_actscr go;
1330 * SCRIPTS jump address that deal with data pointers.
1331 * 'savep' points to the position in the script responsible
1332 * for the actual transfer of data.
1333 * It's written on reception of a SAVE_DATA_POINTER message.
1335 u32 savep; /* Jump address to saved data pointer */
1336 u32 lastp; /* SCRIPTS address at end of data */
1337 u32 goalp; /* Not accessed for now from SCRIPTS */
1346 * Data Structure Block
1348 * During execution of a ccb by the script processor, the
1349 * DSA (data structure address) register points to this
1350 * substructure of the ccb.
1355 * Also assumed at offset 0 of the sym_ccb structure.
1357 /*0*/ struct sym_ccbh head;
1360 * Phase mismatch contexts.
1361 * We need two to handle correctly the SAVED DATA POINTER.
1362 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1363 * for address calculation from SCRIPTS.
1369 * Table data for Script
1371 struct sym_tblsel select;
1372 struct sym_tblmove smsg;
1373 struct sym_tblmove smsg_ext;
1374 struct sym_tblmove cmd;
1375 struct sym_tblmove sense;
1376 struct sym_tblmove wresid;
1377 struct sym_tblmove data [SYM_CONF_MAX_SG];
1381 * Our Command Control Block
1385 * This is the data structure which is pointed by the DSA
1386 * register when it is executed by the script processor.
1387 * It must be the first entry.
1389 struct sym_dsb phys;
1392 * Pointer to CAM ccb and related stuff.
1394 struct callout ch; /* callout handle */
1395 union ccb *cam_ccb; /* CAM scsiio ccb */
1396 u8 cdb_buf[16]; /* Copy of CDB */
1397 u8 *sns_bbuf; /* Bounce buffer for sense data */
1398 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1399 int data_len; /* Total data length */
1400 int segments; /* Number of SG segments */
1403 * Miscellaneous status'.
1405 u_char nego_status; /* Negotiation status */
1406 u_char xerr_status; /* Extended error flags */
1407 u32 extra_bytes; /* Extraneous bytes transferred */
1411 * We prepare a message to be sent after selection.
1412 * We may use a second one if the command is rescheduled
1413 * due to CHECK_CONDITION or COMMAND TERMINATED.
1414 * Contents are IDENTIFY and SIMPLE_TAG.
1415 * While negotiating sync or wide transfer,
1416 * a SDTR or WDTR message is appended.
1418 u_char scsi_smsg [12];
1419 u_char scsi_smsg2[12];
1422 * Auto request sense related fields.
1424 u_char sensecmd[6]; /* Request Sense command */
1425 u_char sv_scsi_status; /* Saved SCSI status */
1426 u_char sv_xerr_status; /* Saved extended status */
1427 int sv_resid; /* Saved residual */
1430 * Map for the DMA of user data.
1432 void *arg; /* Argument for some callback */
1433 bus_dmamap_t dmamap; /* DMA map for user data */
1435 #define SYM_DMA_NONE 0
1436 #define SYM_DMA_READ 1
1437 #define SYM_DMA_WRITE 2
1441 u32 ccb_ba; /* BUS address of this CCB */
1442 u_short tag; /* Tag for this transfer */
1443 /* NO_TAG means no tag */
1446 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1448 link_ccbq; /* Link to free/busy CCB queue */
1449 u32 startp; /* Initial data pointer */
1450 int ext_sg; /* Extreme data pointer, used */
1451 int ext_ofs; /* to calculate the residual. */
1452 u_char to_abort; /* Want this IO to be aborted */
1455 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1458 * Host Control Block
1465 * Due to poorness of addressing capabilities, earlier
1466 * chips (810, 815, 825) copy part of the data structures
1467 * (CCB, TCB and LCB) in fixed areas.
1469 #ifdef SYM_CONF_GENERIC_SUPPORT
1470 struct sym_ccbh ccb_head;
1471 struct sym_tcbh tcb_head;
1472 struct sym_lcbh lcb_head;
1475 * Idle task and invalid task actions and
1476 * their bus addresses.
1478 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1479 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1482 * Dummy lun table to protect us against target
1483 * returning bad lun number on reselection.
1485 u32 *badluntbl; /* Table physical address */
1486 u32 badlun_sa; /* SCRIPT handler BUS address */
1489 * Bus address of this host control block.
1494 * Bit 32-63 of the on-chip RAM bus address in LE format.
1495 * The START_RAM64 script loads the MMRS and MMWS from this
1501 * Chip and controller indentification.
1506 * Initial value of some IO register bits.
1507 * These values are assumed to have been set by BIOS, and may
1508 * be used to probe adapter implementation differences.
1510 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1511 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1515 * Actual initial value of IO register bits used by the
1516 * driver. They are loaded at initialisation according to
1517 * features that are to be enabled/disabled.
1519 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1520 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1526 struct sym_tcb *target;
1528 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1532 * Target control block bus address array used by the SCRIPT
1539 * CAM SIM information for this instance.
1541 struct cam_sim *sim;
1542 struct cam_path *path;
1545 * Allocated hardware resources.
1547 struct resource *irq_res;
1548 struct resource *io_res;
1549 struct resource *mmio_res;
1550 struct resource *ram_res;
1557 * My understanding of PCI is that all agents must share the
1558 * same addressing range and model.
1559 * But some hardware architecture guys provide complex and
1560 * brain-deaded stuff that makes shit.
1561 * This driver only support PCI compliant implementations and
1562 * deals with part of the BUS stuff complexity only to fit O/S
1569 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1570 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1572 * BUS addresses of the chip
1574 vm_offset_t mmio_ba; /* MMIO BUS address */
1575 int mmio_ws; /* MMIO Window size */
1577 vm_offset_t ram_ba; /* RAM BUS address */
1578 int ram_ws; /* RAM window size */
1581 * SCRIPTS virtual and physical bus addresses.
1582 * 'script' is loaded in the on-chip RAM if present.
1583 * 'scripth' stays in main memory for all chips except the
1584 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1586 u_char *scripta0; /* Copies of script and scripth */
1587 u_char *scriptb0; /* Copies of script and scripth */
1588 vm_offset_t scripta_ba; /* Actual script and scripth */
1589 vm_offset_t scriptb_ba; /* bus addresses. */
1590 vm_offset_t scriptb0_ba;
1591 u_short scripta_sz; /* Actual size of script A */
1592 u_short scriptb_sz; /* Actual size of script B */
1595 * Bus addresses, setup and patch methods for
1596 * the selected firmware.
1598 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1599 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1600 void (*fw_setup)(hcb_p np, const struct sym_fw *fw);
1601 void (*fw_patch)(hcb_p np);
1602 const char *fw_name;
1605 * General controller parameters and configuration.
1607 u_short device_id; /* PCI device id */
1608 u_char revision_id; /* PCI device revision id */
1609 u_int features; /* Chip features map */
1610 u_char myaddr; /* SCSI id of the adapter */
1611 u_char maxburst; /* log base 2 of dwords burst */
1612 u_char maxwide; /* Maximum transfer width */
1613 u_char minsync; /* Min sync period factor (ST) */
1614 u_char maxsync; /* Max sync period factor (ST) */
1615 u_char maxoffs; /* Max scsi offset (ST) */
1616 u_char minsync_dt; /* Min sync period factor (DT) */
1617 u_char maxsync_dt; /* Max sync period factor (DT) */
1618 u_char maxoffs_dt; /* Max scsi offset (DT) */
1619 u_char multiplier; /* Clock multiplier (1,2,4) */
1620 u_char clock_divn; /* Number of clock divisors */
1621 u32 clock_khz; /* SCSI clock frequency in KHz */
1622 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1624 * Start queue management.
1625 * It is filled up by the host processor and accessed by the
1626 * SCRIPTS processor in order to start SCSI commands.
1628 volatile /* Prevent code optimizations */
1629 u32 *squeue; /* Start queue virtual address */
1630 u32 squeue_ba; /* Start queue BUS address */
1631 u_short squeueput; /* Next free slot of the queue */
1632 u_short actccbs; /* Number of allocated CCBs */
1635 * Command completion queue.
1636 * It is the same size as the start queue to avoid overflow.
1638 u_short dqueueget; /* Next position to scan */
1639 volatile /* Prevent code optimizations */
1640 u32 *dqueue; /* Completion (done) queue */
1641 u32 dqueue_ba; /* Done queue BUS address */
1644 * Miscellaneous buffers accessed by the scripts-processor.
1645 * They shall be DWORD aligned, because they may be read or
1646 * written with a script command.
1648 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1649 u_char msgin [8]; /* Buffer for MESSAGE IN */
1650 u32 lastmsg; /* Last SCSI message sent */
1651 u_char scratch; /* Scratch for SCSI receive */
1654 * Miscellaneous configuration and status parameters.
1656 u_char usrflags; /* Miscellaneous user flags */
1657 u_char scsi_mode; /* Current SCSI BUS mode */
1658 u_char verbose; /* Verbosity for this controller*/
1659 u32 cache; /* Used for cache test at init. */
1662 * CCB lists and queue.
1664 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1665 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1666 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1669 * During error handling and/or recovery,
1670 * active CCBs that are to be completed with
1671 * error or requeued are moved from the busy_ccbq
1672 * to the comp_ccbq prior to completion.
1674 SYM_QUEHEAD comp_ccbq;
1677 * CAM CCB pending queue.
1679 SYM_QUEHEAD cam_ccbq;
1682 * IMMEDIATE ARBITRATION (IARB) control.
1684 * We keep track in 'last_cp' of the last CCB that has been
1685 * queued to the SCRIPTS processor and clear 'last_cp' when
1686 * this CCB completes. If last_cp is not zero at the moment
1687 * we queue a new CCB, we set a flag in 'last_cp' that is
1688 * used by the SCRIPTS as a hint for setting IARB.
1689 * We donnot set more than 'iarb_max' consecutive hints for
1690 * IARB in order to leave devices a chance to reselect.
1691 * By the way, any non zero value of 'iarb_max' is unfair. :)
1693 #ifdef SYM_CONF_IARB_SUPPORT
1694 u_short iarb_max; /* Max. # consecutive IARB hints*/
1695 u_short iarb_count; /* Actual # of these hints */
1700 * Command abort handling.
1701 * We need to synchronize tightly with the SCRIPTS
1702 * processor in order to handle things correctly.
1704 u_char abrt_msg[4]; /* Message to send buffer */
1705 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1706 struct sym_tblsel abrt_sel; /* Sync params for selection */
1707 u_char istat_sem; /* Tells the chip to stop (SEM) */
1710 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1713 * Return the name of the controller.
1715 static __inline const char *sym_name(hcb_p np)
1717 return device_get_nameunit(np->device);
1720 /*--------------------------------------------------------------------------*/
1721 /*------------------------------ FIRMWARES ---------------------------------*/
1722 /*--------------------------------------------------------------------------*/
1725 * This stuff will be moved to a separate source file when
1726 * the driver will be broken into several source modules.
1730 * Macros used for all firmwares.
1732 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1733 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1734 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1735 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1737 #ifdef SYM_CONF_GENERIC_SUPPORT
1739 * Allocate firmware #1 script area.
1741 #define SYM_FWA_SCR sym_fw1a_scr
1742 #define SYM_FWB_SCR sym_fw1b_scr
1743 #include <dev/sym/sym_fw1.h>
1744 static const struct sym_fwa_ofs sym_fw1a_ofs = {
1745 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1747 static const struct sym_fwb_ofs sym_fw1b_ofs = {
1748 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1752 #endif /* SYM_CONF_GENERIC_SUPPORT */
1755 * Allocate firmware #2 script area.
1757 #define SYM_FWA_SCR sym_fw2a_scr
1758 #define SYM_FWB_SCR sym_fw2b_scr
1759 #include <dev/sym/sym_fw2.h>
1760 static const struct sym_fwa_ofs sym_fw2a_ofs = {
1761 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1763 static const struct sym_fwb_ofs sym_fw2b_ofs = {
1764 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1765 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1766 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1776 #ifdef SYM_CONF_GENERIC_SUPPORT
1778 * Patch routine for firmware #1.
1781 sym_fw1_patch(hcb_p np)
1783 struct sym_fw1a_scr *scripta0;
1784 struct sym_fw1b_scr *scriptb0;
1786 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1787 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1790 * Remove LED support if not needed.
1792 if (!(np->features & FE_LED0)) {
1793 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1794 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1795 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1798 #ifdef SYM_CONF_IARB_SUPPORT
1800 * If user does not want to use IMMEDIATE ARBITRATION
1801 * when we are reselected while attempting to arbitrate,
1802 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1804 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1805 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1808 * Patch some data in SCRIPTS.
1809 * - start and done queue initial bus address.
1810 * - target bus address table bus address.
1812 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1813 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1814 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1816 #endif /* SYM_CONF_GENERIC_SUPPORT */
1819 * Patch routine for firmware #2.
1822 sym_fw2_patch(hcb_p np)
1824 struct sym_fw2a_scr *scripta0;
1825 struct sym_fw2b_scr *scriptb0;
1827 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1828 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1831 * Remove LED support if not needed.
1833 if (!(np->features & FE_LED0)) {
1834 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1835 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1836 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1839 #ifdef SYM_CONF_IARB_SUPPORT
1841 * If user does not want to use IMMEDIATE ARBITRATION
1842 * when we are reselected while attempting to arbitrate,
1843 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1845 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1846 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1849 * Patch some variable in SCRIPTS.
1850 * - start and done queue initial bus address.
1851 * - target bus address table bus address.
1853 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1854 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1855 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1858 * Remove the load of SCNTL4 on reselection if not a C10.
1860 if (!(np->features & FE_C10)) {
1861 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1862 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1866 * Remove a couple of work-arounds specific to C1010 if
1867 * they are not desirable. See `sym_fw2.h' for more details.
1869 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1870 np->revision_id < 0x1 &&
1871 np->pciclk_khz < 60000)) {
1872 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1873 scripta0->datao_phase[1] = cpu_to_scr(0);
1875 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1876 /* np->revision_id < 0xff */ 1)) {
1877 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1878 scripta0->sel_done[1] = cpu_to_scr(0);
1882 * Patch some other variables in SCRIPTS.
1883 * These ones are loaded by the SCRIPTS processor.
1885 scriptb0->pm0_data_addr[0] =
1886 cpu_to_scr(np->scripta_ba +
1887 offsetof(struct sym_fw2a_scr, pm0_data));
1888 scriptb0->pm1_data_addr[0] =
1889 cpu_to_scr(np->scripta_ba +
1890 offsetof(struct sym_fw2a_scr, pm1_data));
1894 * Fill the data area in scripts.
1895 * To be done for all firmwares.
1898 sym_fw_fill_data (u32 *in, u32 *out)
1902 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1903 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1904 *in++ = offsetof (struct sym_dsb, data[i]);
1905 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1906 *out++ = offsetof (struct sym_dsb, data[i]);
1911 * Setup useful script bus addresses.
1912 * To be done for all firmwares.
1915 sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw)
1922 * Build the bus address table for script A
1923 * from the script A offset table.
1925 po = (const u_short *) fw->a_ofs;
1926 pa = (u32 *) &np->fwa_bas;
1927 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1928 pa[i] = np->scripta_ba + po[i];
1931 * Same for script B.
1933 po = (const u_short *) fw->b_ofs;
1934 pa = (u32 *) &np->fwb_bas;
1935 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1936 pa[i] = np->scriptb_ba + po[i];
1939 #ifdef SYM_CONF_GENERIC_SUPPORT
1941 * Setup routine for firmware #1.
1944 sym_fw1_setup(hcb_p np, const struct sym_fw *fw)
1946 struct sym_fw1a_scr *scripta0;
1948 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1951 * Fill variable parts in scripts.
1953 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1956 * Setup bus addresses used from the C code..
1958 sym_fw_setup_bus_addresses(np, fw);
1960 #endif /* SYM_CONF_GENERIC_SUPPORT */
1963 * Setup routine for firmware #2.
1966 sym_fw2_setup(hcb_p np, const struct sym_fw *fw)
1968 struct sym_fw2a_scr *scripta0;
1970 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1973 * Fill variable parts in scripts.
1975 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1978 * Setup bus addresses used from the C code..
1980 sym_fw_setup_bus_addresses(np, fw);
1984 * Allocate firmware descriptors.
1986 #ifdef SYM_CONF_GENERIC_SUPPORT
1987 static const struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
1988 #endif /* SYM_CONF_GENERIC_SUPPORT */
1989 static const struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
1992 * Find the most appropriate firmware for a chip.
1994 static const struct sym_fw *
1995 sym_find_firmware(const struct sym_pci_chip *chip)
1997 if (chip->features & FE_LDSTR)
1999 #ifdef SYM_CONF_GENERIC_SUPPORT
2000 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2008 * Bind a script to physical addresses.
2010 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2012 u32 opcode, new, old, tmp1, tmp2;
2017 end = start + len/4;
2024 * If we forget to change the length
2025 * in scripts, a field will be
2026 * padded with 0. This is an illegal
2030 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2031 sym_name(np), (int) (cur-start));
2038 * We use the bogus value 0xf00ff00f ;-)
2039 * to reserve data area in SCRIPTS.
2041 if (opcode == SCR_DATA_ZERO) {
2046 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2047 printf ("%d: <%x>\n", (int) (cur-start),
2051 * We don't have to decode ALL commands
2053 switch (opcode >> 28) {
2056 * LOAD / STORE DSA relative, don't relocate.
2062 * LOAD / STORE absolute.
2068 * COPY has TWO arguments.
2073 if ((tmp1 ^ tmp2) & 3) {
2074 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2075 sym_name(np), (int) (cur-start));
2079 * If PREFETCH feature not enabled, remove
2080 * the NO FLUSH bit if present.
2082 if ((opcode & SCR_NO_FLUSH) &&
2083 !(np->features & FE_PFEN)) {
2084 opcode = (opcode & ~SCR_NO_FLUSH);
2089 * MOVE/CHMOV (absolute address)
2091 if (!(np->features & FE_WIDE))
2092 opcode = (opcode | OPC_MOVE);
2097 * MOVE/CHMOV (table indirect)
2099 if (!(np->features & FE_WIDE))
2100 opcode = (opcode | OPC_MOVE);
2106 * dont't relocate if relative :-)
2108 if (opcode & 0x00800000)
2110 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2127 * Scriptify:) the opcode.
2129 *cur++ = cpu_to_scr(opcode);
2132 * If no relocation, assume 1 argument
2133 * and just scriptize:) it.
2136 *cur = cpu_to_scr(*cur);
2142 * Otherwise performs all needed relocations.
2147 switch (old & RELOC_MASK) {
2148 case RELOC_REGISTER:
2149 new = (old & ~RELOC_MASK) + np->mmio_ba;
2152 new = (old & ~RELOC_MASK) + np->scripta_ba;
2155 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2158 new = (old & ~RELOC_MASK) + np->hcb_ba;
2162 * Don't relocate a 0 address.
2163 * They are mostly used for patched or
2164 * script self-modified areas.
2173 panic("sym_fw_bind_script: "
2174 "weird relocation %x\n", old);
2178 *cur++ = cpu_to_scr(new);
2183 /*---------------------------------------------------------------------------*/
2184 /*--------------------------- END OF FIRMWARES -----------------------------*/
2185 /*---------------------------------------------------------------------------*/
2188 * Function prototypes.
2190 static void sym_save_initial_setting (hcb_p np);
2191 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2192 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2193 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2194 static void sym_chip_reset (hcb_p np);
2195 static void sym_soft_reset (hcb_p np);
2196 static void sym_start_reset (hcb_p np);
2197 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2198 static int sym_wakeup_done (hcb_p np);
2199 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2200 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2201 static void sym_init (hcb_p np, int reason);
2202 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2204 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2205 u_char div, u_char fak);
2206 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2207 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2208 u_char per, u_char wide, u_char div, u_char fak);
2209 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2210 u_char per, u_char wide, u_char div, u_char fak);
2211 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2212 static void sym_intr (void *arg);
2213 static void sym_poll (struct cam_sim *sim);
2214 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2215 static void sym_int_sto (hcb_p np);
2216 static void sym_int_udc (hcb_p np);
2217 static void sym_int_sbmc (hcb_p np);
2218 static void sym_int_par (hcb_p np, u_short sist);
2219 static void sym_int_ma (hcb_p np);
2220 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2222 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2223 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2224 static void sym_sir_task_recovery (hcb_p np, int num);
2225 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2226 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2227 static int sym_compute_residual (hcb_p np, ccb_p cp);
2228 static int sym_show_msg (u_char * msg);
2229 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2230 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2231 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2232 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2233 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2234 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2235 static void sym_int_sir (hcb_p np);
2236 static void sym_free_ccb (hcb_p np, ccb_p cp);
2237 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2238 static ccb_p sym_alloc_ccb (hcb_p np);
2239 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2240 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2241 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2242 static int sym_snooptest (hcb_p np);
2243 static void sym_selectclock(hcb_p np, u_char scntl3);
2244 static void sym_getclock (hcb_p np, int mult);
2245 static int sym_getpciclock (hcb_p np);
2246 static void sym_complete_ok (hcb_p np, ccb_p cp);
2247 static void sym_complete_error (hcb_p np, ccb_p cp);
2248 static void sym_callout (void *arg);
2249 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2250 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2251 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2252 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2253 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2255 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2256 bus_dma_segment_t *psegs, int nsegs);
2257 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2258 bus_dma_segment_t *psegs, int nsegs);
2259 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2260 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2261 struct ccb_trans_settings *cts);
2262 static void sym_update_dflags(hcb_p np, u_char *flags,
2263 struct ccb_trans_settings *cts);
2265 static const struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2266 static int sym_pci_probe (device_t dev);
2267 static int sym_pci_attach (device_t dev);
2269 static void sym_pci_free (hcb_p np);
2270 static int sym_cam_attach (hcb_p np);
2271 static void sym_cam_free (hcb_p np);
2273 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2274 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2275 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2278 * Print something which allows to retrieve the controller type,
2279 * unit, target, lun concerned by a kernel message.
2281 static void PRINT_TARGET (hcb_p np, int target)
2283 printf ("%s:%d:", sym_name(np), target);
2286 static void PRINT_LUN(hcb_p np, int target, int lun)
2288 printf ("%s:%d:%d:", sym_name(np), target, lun);
2291 static void PRINT_ADDR (ccb_p cp)
2293 if (cp && cp->cam_ccb)
2294 xpt_print_path(cp->cam_ccb->ccb_h.path);
2298 * Take into account this ccb in the freeze count.
2300 static void sym_freeze_cam_ccb(union ccb *ccb)
2302 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2303 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2304 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2305 xpt_freeze_devq(ccb->ccb_h.path, 1);
2311 * Set the status field of a CAM CCB.
2313 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2315 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2316 ccb->ccb_h.status |= status;
2320 * Get the status field of a CAM CCB.
2322 static __inline int sym_get_cam_status(union ccb *ccb)
2324 return ccb->ccb_h.status & CAM_STATUS_MASK;
2328 * Enqueue a CAM CCB.
2330 static void sym_enqueue_cam_ccb(ccb_p cp)
2336 np = (hcb_p) cp->arg;
2338 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2339 ccb->ccb_h.status = CAM_REQ_INPROG;
2341 callout_reset(&cp->ch, ccb->ccb_h.timeout * hz / 1000, sym_callout,
2343 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2344 ccb->ccb_h.sym_hcb_ptr = np;
2346 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2350 * Complete a pending CAM CCB.
2352 static void _sym_xpt_done(hcb_p np, union ccb *ccb)
2354 SYM_LOCK_ASSERT(MA_OWNED);
2356 KASSERT((ccb->ccb_h.status & CAM_SIM_QUEUED) == 0,
2357 ("%s: status=CAM_SIM_QUEUED", __func__));
2359 if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2360 sym_freeze_cam_ccb(ccb);
2364 static void sym_xpt_done(hcb_p np, union ccb *ccb, ccb_p cp)
2366 SYM_LOCK_ASSERT(MA_OWNED);
2368 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2369 callout_stop(&cp->ch);
2370 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2371 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2372 ccb->ccb_h.sym_hcb_ptr = NULL;
2374 _sym_xpt_done(np, ccb);
2377 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2379 SYM_LOCK_ASSERT(MA_OWNED);
2381 sym_set_cam_status(ccb, cam_status);
2382 _sym_xpt_done(np, ccb);
2386 * SYMBIOS chip clock divisor table.
2388 * Divisors are multiplied by 10,000,000 in order to make
2389 * calculations more simple.
2392 static const u32 div_10M[] =
2393 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2396 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2397 * 128 transfers. All chips support at least 16 transfers
2398 * bursts. The 825A, 875 and 895 chips support bursts of up
2399 * to 128 transfers and the 895A and 896 support bursts of up
2400 * to 64 transfers. All other chips support up to 16
2403 * For PCI 32 bit data transfers each transfer is a DWORD.
2404 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2406 * We use log base 2 (burst length) as internal code, with
2407 * value 0 meaning "burst disabled".
2411 * Burst length from burst code.
2413 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2416 * Burst code from io register bits.
2418 #define burst_code(dmode, ctest4, ctest5) \
2419 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2422 * Set initial io register bits from burst code.
2424 static __inline void sym_init_burst(hcb_p np, u_char bc)
2426 np->rv_ctest4 &= ~0x80;
2427 np->rv_dmode &= ~(0x3 << 6);
2428 np->rv_ctest5 &= ~0x4;
2431 np->rv_ctest4 |= 0x80;
2435 np->rv_dmode |= ((bc & 0x3) << 6);
2436 np->rv_ctest5 |= (bc & 0x4);
2441 * Print out the list of targets that have some flag disabled by user.
2443 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2448 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2449 if (i == np->myaddr)
2451 if (np->target[i].usrflags & mask) {
2453 printf("%s: %s disabled for targets",
2463 * Save initial settings of some IO registers.
2464 * Assumed to have been set by BIOS.
2465 * We cannot reset the chip prior to reading the
2466 * IO registers, since informations will be lost.
2467 * Since the SCRIPTS processor may be running, this
2468 * is not safe on paper, but it seems to work quite
2471 static void sym_save_initial_setting (hcb_p np)
2473 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2474 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2475 np->sv_dmode = INB(nc_dmode) & 0xce;
2476 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2477 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2478 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2479 np->sv_gpcntl = INB(nc_gpcntl);
2480 np->sv_stest1 = INB(nc_stest1);
2481 np->sv_stest2 = INB(nc_stest2) & 0x20;
2482 np->sv_stest4 = INB(nc_stest4);
2483 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2484 np->sv_scntl4 = INB(nc_scntl4);
2485 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2488 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2492 * Prepare io register values used by sym_init() according
2493 * to selected and supported features.
2495 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2504 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2507 * Get the frequency of the chip's clock.
2509 if (np->features & FE_QUAD)
2511 else if (np->features & FE_DBLR)
2516 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2517 np->clock_khz *= np->multiplier;
2519 if (np->clock_khz != 40000)
2520 sym_getclock(np, np->multiplier);
2523 * Divisor to be used for async (timer pre-scaler).
2525 i = np->clock_divn - 1;
2527 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2532 np->rv_scntl3 = i+1;
2535 * The C1010 uses hardwired divisors for async.
2536 * So, we just throw away, the async. divisor.:-)
2538 if (np->features & FE_C10)
2542 * Minimum synchronous period factor supported by the chip.
2543 * Btw, 'period' is in tenths of nanoseconds.
2545 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2546 if (period <= 250) np->minsync = 10;
2547 else if (period <= 303) np->minsync = 11;
2548 else if (period <= 500) np->minsync = 12;
2549 else np->minsync = (period + 40 - 1) / 40;
2552 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2554 if (np->minsync < 25 &&
2555 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2557 else if (np->minsync < 12 &&
2558 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2562 * Maximum synchronous period factor supported by the chip.
2564 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2565 np->maxsync = period > 2540 ? 254 : period / 10;
2568 * If chip is a C1010, guess the sync limits in DT mode.
2570 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2571 if (np->clock_khz == 160000) {
2573 np->maxsync_dt = 50;
2574 np->maxoffs_dt = 62;
2579 * 64 bit addressing (895A/896/1010) ?
2581 if (np->features & FE_DAC)
2583 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2585 np->rv_ccntl1 |= (DDAC);
2589 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2591 if (np->features & FE_NOPM)
2592 np->rv_ccntl0 |= (ENPMJ);
2596 * In dual channel mode, contention occurs if internal cycles
2597 * are used. Disable internal cycles.
2599 if (np->device_id == PCI_ID_LSI53C1010 &&
2600 np->revision_id < 0x2)
2601 np->rv_ccntl0 |= DILS;
2604 * Select burst length (dwords)
2606 burst_max = SYM_SETUP_BURST_ORDER;
2607 if (burst_max == 255)
2608 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2612 if (burst_max > np->maxburst)
2613 burst_max = np->maxburst;
2616 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2617 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2618 * based transactions on LOAD/STORE instructions. So we have
2619 * to prevent these chips from using such PCI transactions in
2620 * this driver. The generic ncr driver that does not use
2621 * LOAD/STORE instructions does not need this work-around.
2623 if ((np->device_id == PCI_ID_SYM53C810 &&
2624 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2625 (np->device_id == PCI_ID_SYM53C860 &&
2626 np->revision_id <= 0x1))
2627 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2630 * Select all supported special features.
2631 * If we are using on-board RAM for scripts, prefetch (PFEN)
2632 * does not help, but burst op fetch (BOF) does.
2633 * Disabling PFEN makes sure BOF will be used.
2635 if (np->features & FE_ERL)
2636 np->rv_dmode |= ERL; /* Enable Read Line */
2637 if (np->features & FE_BOF)
2638 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2639 if (np->features & FE_ERMP)
2640 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2642 if ((np->features & FE_PFEN) && !np->ram_ba)
2644 if (np->features & FE_PFEN)
2646 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2647 if (np->features & FE_CLSE)
2648 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2649 if (np->features & FE_WRIE)
2650 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2651 if (np->features & FE_DFS)
2652 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2657 if (SYM_SETUP_PCI_PARITY)
2658 np->rv_ctest4 |= MPEE; /* Master parity checking */
2659 if (SYM_SETUP_SCSI_PARITY)
2660 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2663 * Get parity checking, host ID and verbose mode from NVRAM
2666 sym_nvram_setup_host (np, nvram);
2668 np->myaddr = OF_getscsinitid(np->device);
2672 * Get SCSI addr of host adapter (set by bios?).
2674 if (np->myaddr == 255) {
2675 np->myaddr = INB(nc_scid) & 0x07;
2677 np->myaddr = SYM_SETUP_HOST_ID;
2681 * Prepare initial io register bits for burst length
2683 sym_init_burst(np, burst_max);
2686 * Set SCSI BUS mode.
2687 * - LVD capable chips (895/895A/896/1010) report the
2688 * current BUS mode through the STEST4 IO register.
2689 * - For previous generation chips (825/825A/875),
2690 * user has to tell us how to check against HVD,
2691 * since a 100% safe algorithm is not possible.
2693 np->scsi_mode = SMODE_SE;
2694 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2695 np->scsi_mode = (np->sv_stest4 & SMODE);
2696 else if (np->features & FE_DIFF) {
2697 if (SYM_SETUP_SCSI_DIFF == 1) {
2698 if (np->sv_scntl3) {
2699 if (np->sv_stest2 & 0x20)
2700 np->scsi_mode = SMODE_HVD;
2702 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2703 if (!(INB(nc_gpreg) & 0x08))
2704 np->scsi_mode = SMODE_HVD;
2707 else if (SYM_SETUP_SCSI_DIFF == 2)
2708 np->scsi_mode = SMODE_HVD;
2710 if (np->scsi_mode == SMODE_HVD)
2711 np->rv_stest2 |= 0x20;
2714 * Set LED support from SCRIPTS.
2715 * Ignore this feature for boards known to use a
2716 * specific GPIO wiring and for the 895A, 896
2717 * and 1010 that drive the LED directly.
2719 if ((SYM_SETUP_SCSI_LED ||
2720 (nvram->type == SYM_SYMBIOS_NVRAM ||
2721 (nvram->type == SYM_TEKRAM_NVRAM &&
2722 np->device_id == PCI_ID_SYM53C895))) &&
2723 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2724 np->features |= FE_LED0;
2729 switch(SYM_SETUP_IRQ_MODE & 3) {
2731 np->rv_dcntl |= IRQM;
2734 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2741 * Configure targets according to driver setup.
2742 * If NVRAM present get targets setup from NVRAM.
2744 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2745 tcb_p tp = &np->target[i];
2747 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2748 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2749 tp->tinfo.user.period = np->minsync;
2750 if (np->features & FE_ULTRA3)
2751 tp->tinfo.user.period = np->minsync_dt;
2752 tp->tinfo.user.offset = np->maxoffs;
2753 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2754 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2755 tp->usrtags = SYM_SETUP_MAX_TAG;
2757 sym_nvram_setup_target (np, i, nvram);
2760 * For now, guess PPR/DT support from the period
2763 if (np->features & FE_ULTRA3) {
2764 if (tp->tinfo.user.period <= 9 &&
2765 tp->tinfo.user.width == BUS_16_BIT) {
2766 tp->tinfo.user.options |= PPR_OPT_DT;
2767 tp->tinfo.user.offset = np->maxoffs_dt;
2768 tp->tinfo.user.spi_version = 3;
2773 tp->usrflags &= ~SYM_TAGS_ENABLED;
2777 * Let user know about the settings.
2780 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2781 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2782 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2784 (np->features & FE_ULTRA3) ? 80 :
2785 (np->features & FE_ULTRA2) ? 40 :
2786 (np->features & FE_ULTRA) ? 20 : 10,
2787 sym_scsi_bus_mode(np->scsi_mode),
2788 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2790 * Tell him more on demand.
2793 printf("%s: %s IRQ line driver%s\n",
2795 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2796 np->ram_ba ? ", using on-chip SRAM" : "");
2797 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2798 if (np->features & FE_NOPM)
2799 printf("%s: handling phase mismatch from SCRIPTS.\n",
2805 if (sym_verbose > 1) {
2806 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2807 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2808 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2809 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2811 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2812 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2813 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2814 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2817 * Let user be aware of targets that have some disable flags set.
2819 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2821 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2828 * Prepare the next negotiation message if needed.
2830 * Fill in the part of message buffer that contains the
2831 * negotiation and the nego_status field of the CCB.
2832 * Returns the size of the message in bytes.
2834 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2836 tcb_p tp = &np->target[cp->target];
2840 * Early C1010 chips need a work-around for DT
2841 * data transfer to work.
2843 if (!(np->features & FE_U3EN))
2844 tp->tinfo.goal.options = 0;
2846 * negotiate using PPR ?
2848 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2851 * negotiate wide transfers ?
2853 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2856 * negotiate synchronous transfers?
2858 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2859 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2864 msgptr[msglen++] = M_EXTENDED;
2865 msgptr[msglen++] = 3;
2866 msgptr[msglen++] = M_X_SYNC_REQ;
2867 msgptr[msglen++] = tp->tinfo.goal.period;
2868 msgptr[msglen++] = tp->tinfo.goal.offset;
2871 msgptr[msglen++] = M_EXTENDED;
2872 msgptr[msglen++] = 2;
2873 msgptr[msglen++] = M_X_WIDE_REQ;
2874 msgptr[msglen++] = tp->tinfo.goal.width;
2877 msgptr[msglen++] = M_EXTENDED;
2878 msgptr[msglen++] = 6;
2879 msgptr[msglen++] = M_X_PPR_REQ;
2880 msgptr[msglen++] = tp->tinfo.goal.period;
2881 msgptr[msglen++] = 0;
2882 msgptr[msglen++] = tp->tinfo.goal.offset;
2883 msgptr[msglen++] = tp->tinfo.goal.width;
2884 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2888 cp->nego_status = nego;
2891 tp->nego_cp = cp; /* Keep track a nego will be performed */
2892 if (DEBUG_FLAGS & DEBUG_NEGO) {
2893 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2894 nego == NS_WIDE ? "wide msgout" :
2895 "ppr msgout", msgptr);
2903 * Insert a job into the start queue.
2905 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2909 #ifdef SYM_CONF_IARB_SUPPORT
2911 * If the previously queued CCB is not yet done,
2912 * set the IARB hint. The SCRIPTS will go with IARB
2913 * for this job when starting the previous one.
2914 * We leave devices a chance to win arbitration by
2915 * not using more than 'iarb_max' consecutive
2916 * immediate arbitrations.
2918 if (np->last_cp && np->iarb_count < np->iarb_max) {
2919 np->last_cp->host_flags |= HF_HINT_IARB;
2928 * Insert first the idle task and then our job.
2929 * The MB should ensure proper ordering.
2931 qidx = np->squeueput + 2;
2932 if (qidx >= MAX_QUEUE*2) qidx = 0;
2934 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2936 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2938 np->squeueput = qidx;
2940 if (DEBUG_FLAGS & DEBUG_QUEUE)
2941 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2944 * Script processor may be waiting for reselect.
2948 OUTB (nc_istat, SIGP|np->istat_sem);
2952 * Soft reset the chip.
2954 * Raising SRST when the chip is running may cause
2955 * problems on dual function chips (see below).
2956 * On the other hand, LVD devices need some delay
2957 * to settle and report actual BUS mode in STEST4.
2959 static void sym_chip_reset (hcb_p np)
2961 OUTB (nc_istat, SRST);
2964 UDELAY(2000); /* For BUS MODE to settle */
2968 * Soft reset the chip.
2970 * Some 896 and 876 chip revisions may hang-up if we set
2971 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2973 * So, we need to abort the current operation prior to
2974 * soft resetting the chip.
2976 static void sym_soft_reset (hcb_p np)
2981 OUTB (nc_istat, CABRT);
2982 for (i = 1000000 ; i ; --i) {
2983 istat = INB (nc_istat);
2995 printf("%s: unable to abort current chip operation.\n",
2997 sym_chip_reset (np);
3001 * Start reset process.
3003 * The interrupt handler will reinitialize the chip.
3005 static void sym_start_reset(hcb_p np)
3007 (void) sym_reset_scsi_bus(np, 1);
3010 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3015 sym_soft_reset(np); /* Soft reset the chip */
3017 OUTW (nc_sien, RST);
3019 * Enable Tolerant, reset IRQD if present and
3020 * properly set IRQ mode, prior to resetting the bus.
3022 OUTB (nc_stest3, TE);
3023 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3024 OUTB (nc_scntl1, CRST);
3027 if (!SYM_SETUP_SCSI_BUS_CHECK)
3030 * Check for no terminators or SCSI bus shorts to ground.
3031 * Read SCSI data bus, data parity bits and control signals.
3032 * We are expecting RESET to be TRUE and other signals to be
3035 term = INB(nc_sstat0);
3036 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3037 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3038 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3039 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3040 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3042 if (!(np->features & FE_WIDE))
3045 if (term != (2<<7)) {
3046 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3048 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3049 "0x%lx, expecting 0x%lx\n",
3051 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3052 (u_long)term, (u_long)(2<<7));
3053 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3057 OUTB (nc_scntl1, 0);
3063 * The chip may have completed jobs. Look at the DONE QUEUE.
3065 * On architectures that may reorder LOAD/STORE operations,
3066 * a memory barrier may be needed after the reading of the
3067 * so-called `flag' and prior to dealing with the data.
3069 static int sym_wakeup_done (hcb_p np)
3075 SYM_LOCK_ASSERT(MA_OWNED);
3080 dsa = scr_to_cpu(np->dqueue[i]);
3084 if ((i = i+2) >= MAX_QUEUE*2)
3087 cp = sym_ccb_from_dsa(np, dsa);
3090 sym_complete_ok (np, cp);
3094 printf ("%s: bad DSA (%x) in done queue.\n",
3095 sym_name(np), (u_int) dsa);
3103 * Complete all active CCBs with error.
3104 * Used on CHIP/SCSI RESET.
3106 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3109 * Move all active CCBs to the COMP queue
3110 * and flush this queue.
3112 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3113 sym_que_init(&np->busy_ccbq);
3114 sym_flush_comp_queue(np, cam_status);
3121 * 0: initialisation.
3122 * 1: SCSI BUS RESET delivered or received.
3123 * 2: SCSI BUS MODE changed.
3125 static void sym_init (hcb_p np, int reason)
3130 SYM_LOCK_ASSERT(MA_OWNED);
3133 * Reset chip if asked, otherwise just clear fifos.
3138 OUTB (nc_stest3, TE|CSF);
3139 OUTONB (nc_ctest3, CLF);
3145 phys = np->squeue_ba;
3146 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3147 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3148 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3150 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3153 * Start at first entry.
3160 phys = np->dqueue_ba;
3161 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3163 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3165 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3168 * Start at first entry.
3173 * Install patches in scripts.
3174 * This also let point to first position the start
3175 * and done queue pointers used from SCRIPTS.
3180 * Wakeup all pending jobs.
3182 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3187 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3188 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3190 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3191 /* full arb., ena parity, par->ATN */
3192 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3194 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3196 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3197 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3198 OUTB (nc_istat , SIGP ); /* Signal Process */
3199 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3200 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3202 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3203 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3204 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3206 /* Extended Sreq/Sack filtering not supported on the C10 */
3207 if (np->features & FE_C10)
3208 OUTB (nc_stest2, np->rv_stest2);
3210 OUTB (nc_stest2, EXT|np->rv_stest2);
3212 OUTB (nc_stest3, TE); /* TolerANT enable */
3213 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3216 * For now, disable AIP generation on C1010-66.
3218 if (np->device_id == PCI_ID_LSI53C1010_2)
3219 OUTB (nc_aipcntl1, DISAIP);
3223 * Errant SGE's when in narrow. Write bits 4 & 5 of
3224 * STEST1 register to disable SGE. We probably should do
3225 * that from SCRIPTS for each selection/reselection, but
3226 * I just don't want. :)
3228 if (np->device_id == PCI_ID_LSI53C1010 &&
3229 /* np->revision_id < 0xff */ 1)
3230 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3233 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3234 * Disable overlapped arbitration for some dual function devices,
3235 * regardless revision id (kind of post-chip-design feature. ;-))
3237 if (np->device_id == PCI_ID_SYM53C875)
3238 OUTB (nc_ctest0, (1<<5));
3239 else if (np->device_id == PCI_ID_SYM53C896)
3240 np->rv_ccntl0 |= DPR;
3243 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3244 * and/or hardware phase mismatch, since only such chips
3245 * seem to support those IO registers.
3247 if (np->features & (FE_DAC|FE_NOPM)) {
3248 OUTB (nc_ccntl0, np->rv_ccntl0);
3249 OUTB (nc_ccntl1, np->rv_ccntl1);
3253 * If phase mismatch handled by scripts (895A/896/1010),
3254 * set PM jump addresses.
3256 if (np->features & FE_NOPM) {
3257 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3258 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3262 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3263 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3265 if (np->features & FE_LED0)
3266 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3267 else if (np->features & FE_LEDC)
3268 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3273 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3274 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3277 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3278 * Try to eat the spurious SBMC interrupt that may occur when
3279 * we reset the chip but not the SCSI BUS (at initialization).
3281 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3282 OUTONW (nc_sien, SBMC);
3287 np->scsi_mode = INB (nc_stest4) & SMODE;
3291 * Fill in target structure.
3292 * Reinitialize usrsync.
3293 * Reinitialize usrwide.
3294 * Prepare sync negotiation according to actual SCSI bus mode.
3296 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3297 tcb_p tp = &np->target[i];
3301 tp->head.wval = np->rv_scntl3;
3304 tp->tinfo.current.period = 0;
3305 tp->tinfo.current.offset = 0;
3306 tp->tinfo.current.width = BUS_8_BIT;
3307 tp->tinfo.current.options = 0;
3311 * Download SCSI SCRIPTS to on-chip RAM if present,
3312 * and start script processor.
3315 if (sym_verbose > 1)
3316 printf ("%s: Downloading SCSI SCRIPTS.\n",
3318 if (np->ram_ws == 8192) {
3319 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3320 OUTL (nc_mmws, np->scr_ram_seg);
3321 OUTL (nc_mmrs, np->scr_ram_seg);
3322 OUTL (nc_sfs, np->scr_ram_seg);
3323 phys = SCRIPTB_BA (np, start64);
3326 phys = SCRIPTA_BA (np, init);
3327 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3330 phys = SCRIPTA_BA (np, init);
3334 OUTL (nc_dsa, np->hcb_ba);
3338 * Notify the XPT about the RESET condition.
3341 xpt_async(AC_BUS_RESET, np->path, NULL);
3345 * Get clock factor and sync divisor for a given
3346 * synchronous factor period.
3349 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3351 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3352 int div = np->clock_divn; /* Number of divisors supported */
3353 u32 fak; /* Sync factor in sxfer */
3354 u32 per; /* Period in tenths of ns */
3355 u32 kpc; /* (per * clk) */
3359 * Compute the synchronous period in tenths of nano-seconds
3361 if (dt && sfac <= 9) per = 125;
3362 else if (sfac <= 10) per = 250;
3363 else if (sfac == 11) per = 303;
3364 else if (sfac == 12) per = 500;
3365 else per = 40 * sfac;
3373 * For earliest C10 revision 0, we cannot use extra
3374 * clocks for the setting of the SCSI clocking.
3375 * Note that this limits the lowest sync data transfer
3376 * to 5 Mega-transfers per second and may result in
3377 * using higher clock divisors.
3380 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3382 * Look for the lowest clock divisor that allows an
3383 * output speed not faster than the period.
3387 if (kpc > (div_10M[div] << 2)) {
3392 fak = 0; /* No extra clocks */
3393 if (div == np->clock_divn) { /* Are we too fast ? */
3403 * Look for the greatest clock divisor that allows an
3404 * input speed faster than the period.
3407 if (kpc >= (div_10M[div] << 2)) break;
3410 * Calculate the lowest clock factor that allows an output
3411 * speed not faster than the period, and the max output speed.
3412 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3413 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3416 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3417 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3420 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3421 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3425 * Check against our hardware limits, or bugs :).
3427 if (fak < 0) {fak = 0; ret = -1;}
3428 if (fak > 2) {fak = 2; ret = -1;}
3431 * Compute and return sync parameters.
3440 * Tell the SCSI layer about the new transfer parameters.
3443 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3445 struct ccb_trans_settings cts;
3446 struct cam_path *path;
3448 tcb_p tp = &np->target[target];
3450 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3452 if (sts != CAM_REQ_CMP)
3455 bzero(&cts, sizeof(cts));
3457 #define cts__scsi (cts.proto_specific.scsi)
3458 #define cts__spi (cts.xport_specific.spi)
3460 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3461 cts.protocol = PROTO_SCSI;
3462 cts.transport = XPORT_SPI;
3463 cts.protocol_version = tp->tinfo.current.scsi_version;
3464 cts.transport_version = tp->tinfo.current.spi_version;
3466 cts__spi.valid = spi_valid;
3467 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3468 cts__spi.sync_period = tp->tinfo.current.period;
3469 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3470 cts__spi.sync_offset = tp->tinfo.current.offset;
3471 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3472 cts__spi.bus_width = tp->tinfo.current.width;
3473 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3474 cts__spi.ppr_options = tp->tinfo.current.options;
3477 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3478 xpt_async(AC_TRANSFER_NEG, path, &cts);
3479 xpt_free_path(path);
3482 #define SYM_SPI_VALID_WDTR \
3483 CTS_SPI_VALID_BUS_WIDTH | \
3484 CTS_SPI_VALID_SYNC_RATE | \
3485 CTS_SPI_VALID_SYNC_OFFSET
3486 #define SYM_SPI_VALID_SDTR \
3487 CTS_SPI_VALID_SYNC_RATE | \
3488 CTS_SPI_VALID_SYNC_OFFSET
3489 #define SYM_SPI_VALID_PPR \
3490 CTS_SPI_VALID_PPR_OPTIONS | \
3491 CTS_SPI_VALID_BUS_WIDTH | \
3492 CTS_SPI_VALID_SYNC_RATE | \
3493 CTS_SPI_VALID_SYNC_OFFSET
3496 * We received a WDTR.
3497 * Let everything be aware of the changes.
3499 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3501 tcb_p tp = &np->target[cp->target];
3503 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3506 * Tell the SCSI layer about the new transfer parameters.
3508 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3509 tp->tinfo.current.offset = 0;
3510 tp->tinfo.current.period = 0;
3511 tp->tinfo.current.options = 0;
3513 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3517 * We received a SDTR.
3518 * Let everything be aware of the changes.
3521 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3523 tcb_p tp = &np->target[cp->target];
3524 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3526 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3529 * Tell the SCSI layer about the new transfer parameters.
3531 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3532 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3533 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3535 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3539 * We received a PPR.
3540 * Let everything be aware of the changes.
3542 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3543 u_char per, u_char wide, u_char div, u_char fak)
3545 tcb_p tp = &np->target[cp->target];
3547 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3550 * Tell the SCSI layer about the new transfer parameters.
3552 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3553 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3554 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3555 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3557 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3561 * Switch trans mode for current job and it's target.
3563 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3564 u_char per, u_char wide, u_char div, u_char fak)
3569 u_char target = INB (nc_sdid) & 0x0f;
3570 u_char sval, wval, uval;
3577 assert (target == (cp->target & 0xf));
3578 tp = &np->target[target];
3580 sval = tp->head.sval;
3581 wval = tp->head.wval;
3582 uval = tp->head.uval;
3585 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3586 sval, wval, uval, np->rv_scntl3);
3591 if (!(np->features & FE_C10))
3592 sval = (sval & ~0x1f) | ofs;
3594 sval = (sval & ~0x3f) | ofs;
3597 * Set the sync divisor and extra clock factor.
3600 wval = (wval & ~0x70) | ((div+1) << 4);
3601 if (!(np->features & FE_C10))
3602 sval = (sval & ~0xe0) | (fak << 5);
3604 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3605 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3606 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3611 * Set the bus width.
3618 * Set misc. ultra enable bits.
3620 if (np->features & FE_C10) {
3621 uval = uval & ~(U3EN|AIPCKEN);
3623 assert(np->features & FE_U3EN);
3628 wval = wval & ~ULTRA;
3629 if (per <= 12) wval |= ULTRA;
3633 * Stop there if sync parameters are unchanged.
3635 if (tp->head.sval == sval &&
3636 tp->head.wval == wval &&
3637 tp->head.uval == uval)
3639 tp->head.sval = sval;
3640 tp->head.wval = wval;
3641 tp->head.uval = uval;
3644 * Disable extended Sreq/Sack filtering if per < 50.
3645 * Not supported on the C1010.
3647 if (per < 50 && !(np->features & FE_C10))
3648 OUTOFFB (nc_stest2, EXT);
3651 * set actual value and sync_status
3653 OUTB (nc_sxfer, tp->head.sval);
3654 OUTB (nc_scntl3, tp->head.wval);
3656 if (np->features & FE_C10) {
3657 OUTB (nc_scntl4, tp->head.uval);
3661 * patch ALL busy ccbs of this target.
3663 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3664 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3665 if (cp->target != target)
3667 cp->phys.select.sel_scntl3 = tp->head.wval;
3668 cp->phys.select.sel_sxfer = tp->head.sval;
3669 if (np->features & FE_C10) {
3670 cp->phys.select.sel_scntl4 = tp->head.uval;
3676 * log message for real hard errors
3678 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3679 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3681 * exception register:
3686 * so: control lines as driven by chip.
3687 * si: control lines as seen by chip.
3688 * sd: scsi data lines as seen by chip.
3691 * sxfer: (see the manual)
3692 * scntl3: (see the manual)
3694 * current script command:
3695 * dsp: script address (relative to start of script).
3696 * dbc: first word of script command.
3698 * First 24 register of the chip:
3701 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3707 u_char *script_base;
3712 if (dsp > np->scripta_ba &&
3713 dsp <= np->scripta_ba + np->scripta_sz) {
3714 script_ofs = dsp - np->scripta_ba;
3715 script_size = np->scripta_sz;
3716 script_base = (u_char *) np->scripta0;
3717 script_name = "scripta";
3719 else if (np->scriptb_ba < dsp &&
3720 dsp <= np->scriptb_ba + np->scriptb_sz) {
3721 script_ofs = dsp - np->scriptb_ba;
3722 script_size = np->scriptb_sz;
3723 script_base = (u_char *) np->scriptb0;
3724 script_name = "scriptb";
3729 script_name = "mem";
3732 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3733 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3734 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3735 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3736 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3737 (unsigned)INL (nc_dbc));
3739 if (((script_ofs & 3) == 0) &&
3740 (unsigned)script_ofs < script_size) {
3741 printf ("%s: script cmd = %08x\n", sym_name(np),
3742 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3745 printf ("%s: regdump:", sym_name(np));
3747 printf (" %02x", (unsigned)INB_OFF(i));
3751 * PCI BUS error, read the PCI ststus register.
3753 if (dstat & (MDPE|BF)) {
3755 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3756 if (pci_sts & 0xf900) {
3757 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3758 printf("%s: PCI STATUS = 0x%04x\n",
3759 sym_name(np), pci_sts & 0xf900);
3765 * chip interrupt handler
3767 * In normal situations, interrupt conditions occur one at
3768 * a time. But when something bad happens on the SCSI BUS,
3769 * the chip may raise several interrupt flags before
3770 * stopping and interrupting the CPU. The additionnal
3771 * interrupt flags are stacked in some extra registers
3772 * after the SIP and/or DIP flag has been raised in the
3773 * ISTAT. After the CPU has read the interrupt condition
3774 * flag from SIST or DSTAT, the chip unstacks the other
3775 * interrupt flags and sets the corresponding bits in
3776 * SIST or DSTAT. Since the chip starts stacking once the
3777 * SIP or DIP flag is set, there is a small window of time
3778 * where the stacking does not occur.
3780 * Typically, multiple interrupt conditions may happen in
3781 * the following situations:
3783 * - SCSI parity error + Phase mismatch (PAR|MA)
3784 * When a parity error is detected in input phase
3785 * and the device switches to msg-in phase inside a
3787 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3788 * When a stupid device does not want to handle the
3789 * recovery of an SCSI parity error.
3790 * - Some combinations of STO, PAR, UDC, ...
3791 * When using non compliant SCSI stuff, when user is
3792 * doing non compliant hot tampering on the BUS, when
3793 * something really bad happens to a device, etc ...
3795 * The heuristic suggested by SYMBIOS to handle
3796 * multiple interrupts is to try unstacking all
3797 * interrupts conditions and to handle them on some
3798 * priority based on error severity.
3799 * This will work when the unstacking has been
3800 * successful, but we cannot be 100 % sure of that,
3801 * since the CPU may have been faster to unstack than
3802 * the chip is able to stack. Hmmm ... But it seems that
3803 * such a situation is very unlikely to happen.
3805 * If this happen, for example STO caught by the CPU
3806 * then UDC happenning before the CPU have restarted
3807 * the SCRIPTS, the driver may wrongly complete the
3808 * same command on UDC, since the SCRIPTS didn't restart
3809 * and the DSA still points to the same command.
3810 * We avoid this situation by setting the DSA to an
3811 * invalid value when the CCB is completed and before
3812 * restarting the SCRIPTS.
3814 * Another issue is that we need some section of our
3815 * recovery procedures to be somehow uninterruptible but
3816 * the SCRIPTS processor does not provides such a
3817 * feature. For this reason, we handle recovery preferently
3818 * from the C code and check against some SCRIPTS critical
3819 * sections from the C code.
3821 * Hopefully, the interrupt handling of the driver is now
3822 * able to resist to weird BUS error conditions, but donnot
3823 * ask me for any guarantee that it will never fail. :-)
3824 * Use at your own decision and risk.
3826 static void sym_intr1 (hcb_p np)
3828 u_char istat, istatc;
3832 SYM_LOCK_ASSERT(MA_OWNED);
3835 * interrupt on the fly ?
3837 * A `dummy read' is needed to ensure that the
3838 * clear of the INTF flag reaches the device
3839 * before the scanning of the DONE queue.
3841 istat = INB (nc_istat);
3843 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3844 istat = INB (nc_istat); /* DUMMY READ */
3845 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3846 (void)sym_wakeup_done (np);
3849 if (!(istat & (SIP|DIP)))
3852 #if 0 /* We should never get this one */
3854 OUTB (nc_istat, CABRT);
3858 * PAR and MA interrupts may occur at the same time,
3859 * and we need to know of both in order to handle
3860 * this situation properly. We try to unstack SCSI
3861 * interrupts for that reason. BTW, I dislike a LOT
3862 * such a loop inside the interrupt routine.
3863 * Even if DMA interrupt stacking is very unlikely to
3864 * happen, we also try unstacking these ones, since
3865 * this has no performance impact.
3872 sist |= INW (nc_sist);
3874 dstat |= INB (nc_dstat);
3875 istatc = INB (nc_istat);
3877 } while (istatc & (SIP|DIP));
3879 if (DEBUG_FLAGS & DEBUG_TINY)
3880 printf ("<%d|%x:%x|%x:%x>",
3883 (unsigned)INL(nc_dsp),
3884 (unsigned)INL(nc_dbc));
3886 * On paper, a memory barrier may be needed here.
3887 * And since we are paranoid ... :)
3892 * First, interrupts we want to service cleanly.
3894 * Phase mismatch (MA) is the most frequent interrupt
3895 * for chip earlier than the 896 and so we have to service
3896 * it as quickly as possible.
3897 * A SCSI parity error (PAR) may be combined with a phase
3898 * mismatch condition (MA).
3899 * Programmed interrupts (SIR) are used to call the C code
3901 * The single step interrupt (SSI) is not used in this
3904 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3905 !(dstat & (MDPE|BF|ABRT|IID))) {
3906 if (sist & PAR) sym_int_par (np, sist);
3907 else if (sist & MA) sym_int_ma (np);
3908 else if (dstat & SIR) sym_int_sir (np);
3909 else if (dstat & SSI) OUTONB_STD ();
3910 else goto unknown_int;
3915 * Now, interrupts that donnot happen in normal
3916 * situations and that we may need to recover from.
3918 * On SCSI RESET (RST), we reset everything.
3919 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3920 * active CCBs with RESET status, prepare all devices
3921 * for negotiating again and restart the SCRIPTS.
3922 * On STO and UDC, we complete the CCB with the corres-
3923 * ponding status and restart the SCRIPTS.
3926 xpt_print_path(np->path);
3927 printf("SCSI BUS reset detected.\n");
3932 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3933 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3935 if (!(sist & (GEN|HTH|SGE)) &&
3936 !(dstat & (MDPE|BF|ABRT|IID))) {
3937 if (sist & SBMC) sym_int_sbmc (np);
3938 else if (sist & STO) sym_int_sto (np);
3939 else if (sist & UDC) sym_int_udc (np);
3940 else goto unknown_int;
3945 * Now, interrupts we are not able to recover cleanly.
3947 * Log message for hard errors.
3951 sym_log_hard_error(np, sist, dstat);
3953 if ((sist & (GEN|HTH|SGE)) ||
3954 (dstat & (MDPE|BF|ABRT|IID))) {
3955 sym_start_reset(np);
3961 * We just miss the cause of the interrupt. :(
3962 * Print a message. The timeout will do the real work.
3964 printf( "%s: unknown interrupt(s) ignored, "
3965 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
3966 sym_name(np), istat, dstat, sist);
3969 static void sym_intr(void *arg)
3975 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3976 sym_intr1((hcb_p) arg);
3977 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
3982 static void sym_poll(struct cam_sim *sim)
3984 sym_intr1(cam_sim_softc(sim));
3988 * generic recovery from scsi interrupt
3990 * The doc says that when the chip gets an SCSI interrupt,
3991 * it tries to stop in an orderly fashion, by completing
3992 * an instruction fetch that had started or by flushing
3993 * the DMA fifo for a write to memory that was executing.
3994 * Such a fashion is not enough to know if the instruction
3995 * that was just before the current DSP value has been
3998 * There are some small SCRIPTS sections that deal with
3999 * the start queue and the done queue that may break any
4000 * assomption from the C code if we are interrupted
4001 * inside, so we reset if this happens. Btw, since these
4002 * SCRIPTS sections are executed while the SCRIPTS hasn't
4003 * started SCSI operations, it is very unlikely to happen.
4005 * All the driver data structures are supposed to be
4006 * allocated from the same 4 GB memory window, so there
4007 * is a 1 to 1 relationship between DSA and driver data
4008 * structures. Since we are careful :) to invalidate the
4009 * DSA when we complete a command or when the SCRIPTS
4010 * pushes a DSA into a queue, we can trust it when it
4013 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4015 u32 dsp = INL (nc_dsp);
4016 u32 dsa = INL (nc_dsa);
4017 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4020 * If we haven't been interrupted inside the SCRIPTS
4021 * critical pathes, we can safely restart the SCRIPTS
4022 * and trust the DSA value if it matches a CCB.
4024 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4025 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4026 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4027 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4028 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4029 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4030 (!(dsp > SCRIPTA_BA (np, done) &&
4031 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4032 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4033 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4035 * If we have a CCB, let the SCRIPTS call us back for
4036 * the handling of the error with SCRATCHA filled with
4037 * STARTPOS. This way, we will be able to freeze the
4038 * device queue and requeue awaiting IOs.
4041 cp->host_status = hsts;
4042 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4045 * Otherwise just restart the SCRIPTS.
4048 OUTL (nc_dsa, 0xffffff);
4049 OUTL_DSP (SCRIPTA_BA (np, start));
4058 sym_start_reset(np);
4062 * chip exception handler for selection timeout
4064 static void sym_int_sto (hcb_p np)
4066 u32 dsp = INL (nc_dsp);
4068 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4070 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4071 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4073 sym_start_reset(np);
4077 * chip exception handler for unexpected disconnect
4079 static void sym_int_udc (hcb_p np)
4081 printf ("%s: unexpected disconnect\n", sym_name(np));
4082 sym_recover_scsi_int(np, HS_UNEXPECTED);
4086 * chip exception handler for SCSI bus mode change
4088 * spi2-r12 11.2.3 says a transceiver mode change must
4089 * generate a reset event and a device that detects a reset
4090 * event shall initiate a hard reset. It says also that a
4091 * device that detects a mode change shall set data transfer
4092 * mode to eight bit asynchronous, etc...
4093 * So, just reinitializing all except chip should be enough.
4095 static void sym_int_sbmc (hcb_p np)
4097 u_char scsi_mode = INB (nc_stest4) & SMODE;
4102 xpt_print_path(np->path);
4103 printf("SCSI BUS mode change from %s to %s.\n",
4104 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4107 * Should suspend command processing for a few seconds and
4108 * reinitialize all except the chip.
4114 * chip exception handler for SCSI parity error.
4116 * When the chip detects a SCSI parity error and is
4117 * currently executing a (CH)MOV instruction, it does
4118 * not interrupt immediately, but tries to finish the
4119 * transfer of the current scatter entry before
4120 * interrupting. The following situations may occur:
4122 * - The complete scatter entry has been transferred
4123 * without the device having changed phase.
4124 * The chip will then interrupt with the DSP pointing
4125 * to the instruction that follows the MOV.
4127 * - A phase mismatch occurs before the MOV finished
4128 * and phase errors are to be handled by the C code.
4129 * The chip will then interrupt with both PAR and MA
4132 * - A phase mismatch occurs before the MOV finished and
4133 * phase errors are to be handled by SCRIPTS.
4134 * The chip will load the DSP with the phase mismatch
4135 * JUMP address and interrupt the host processor.
4137 static void sym_int_par (hcb_p np, u_short sist)
4139 u_char hsts = INB (HS_PRT);
4140 u32 dsp = INL (nc_dsp);
4141 u32 dbc = INL (nc_dbc);
4142 u32 dsa = INL (nc_dsa);
4143 u_char sbcl = INB (nc_sbcl);
4144 u_char cmd = dbc >> 24;
4145 int phase = cmd & 7;
4146 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4148 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4149 sym_name(np), hsts, dbc, sbcl);
4152 * Check that the chip is connected to the SCSI BUS.
4154 if (!(INB (nc_scntl1) & ISCON)) {
4155 sym_recover_scsi_int(np, HS_UNEXPECTED);
4160 * If the nexus is not clearly identified, reset the bus.
4161 * We will try to do better later.
4167 * Check instruction was a MOV, direction was INPUT and
4170 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4174 * Keep track of the parity error.
4176 OUTONB (HF_PRT, HF_EXT_ERR);
4177 cp->xerr_status |= XE_PARITY_ERR;
4180 * Prepare the message to send to the device.
4182 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4185 * If the old phase was DATA IN phase, we have to deal with
4186 * the 3 situations described above.
4187 * For other input phases (MSG IN and STATUS), the device
4188 * must resend the whole thing that failed parity checking
4189 * or signal error. So, jumping to dispatcher should be OK.
4191 if (phase == 1 || phase == 5) {
4192 /* Phase mismatch handled by SCRIPTS */
4193 if (dsp == SCRIPTB_BA (np, pm_handle))
4195 /* Phase mismatch handled by the C code */
4198 /* No phase mismatch occurred */
4200 OUTL (nc_temp, dsp);
4201 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4205 OUTL_DSP (SCRIPTA_BA (np, clrack));
4209 sym_start_reset(np);
4213 * chip exception handler for phase errors.
4215 * We have to construct a new transfer descriptor,
4216 * to transfer the rest of the current block.
4218 static void sym_int_ma (hcb_p np)
4231 u_char hflags, hflags0;
4240 rest = dbc & 0xffffff;
4244 * locate matching cp if any.
4246 cp = sym_ccb_from_dsa(np, dsa);
4249 * Donnot take into account dma fifo and various buffers in
4250 * INPUT phase since the chip flushes everything before
4251 * raising the MA interrupt for interrupted INPUT phases.
4252 * For DATA IN phase, we will check for the SWIDE later.
4254 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4257 if (np->features & FE_DFBC)
4258 delta = INW (nc_dfbc);
4263 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4265 dfifo = INL(nc_dfifo);
4268 * Calculate remaining bytes in DMA fifo.
4269 * (CTEST5 = dfifo >> 16)
4271 if (dfifo & (DFS << 16))
4272 delta = ((((dfifo >> 8) & 0x300) |
4273 (dfifo & 0xff)) - rest) & 0x3ff;
4275 delta = ((dfifo & 0xff) - rest) & 0x7f;
4279 * The data in the dma fifo has not been transferred to
4280 * the target -> add the amount to the rest
4281 * and clear the data.
4282 * Check the sstat2 register in case of wide transfer.
4285 ss0 = INB (nc_sstat0);
4286 if (ss0 & OLF) rest++;
4287 if (!(np->features & FE_C10))
4288 if (ss0 & ORF) rest++;
4289 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4290 ss2 = INB (nc_sstat2);
4291 if (ss2 & OLF1) rest++;
4292 if (!(np->features & FE_C10))
4293 if (ss2 & ORF1) rest++;
4299 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4300 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4304 * log the information
4306 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4307 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4308 (unsigned) rest, (unsigned) delta);
4311 * try to find the interrupted script command,
4312 * and the address at which to continue.
4316 if (dsp > np->scripta_ba &&
4317 dsp <= np->scripta_ba + np->scripta_sz) {
4318 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4321 else if (dsp > np->scriptb_ba &&
4322 dsp <= np->scriptb_ba + np->scriptb_sz) {
4323 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4328 * log the information
4330 if (DEBUG_FLAGS & DEBUG_PHASE) {
4331 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4332 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4336 printf ("%s: interrupted SCRIPT address not found.\n",
4342 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4348 * get old startaddress and old length.
4350 oadr = scr_to_cpu(vdsp[1]);
4352 if (cmd & 0x10) { /* Table indirect */
4353 tblp = (u32 *) ((char*) &cp->phys + oadr);
4354 olen = scr_to_cpu(tblp[0]);
4355 oadr = scr_to_cpu(tblp[1]);
4358 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4361 if (DEBUG_FLAGS & DEBUG_PHASE) {
4362 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4363 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4370 * check cmd against assumed interrupted script command.
4371 * If dt data phase, the MOVE instruction hasn't bit 4 of
4374 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4376 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4377 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4383 * if old phase not dataphase, leave here.
4387 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4388 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4389 (unsigned)oadr, (unsigned)rest);
4390 goto unexpected_phase;
4394 * Choose the correct PM save area.
4396 * Look at the PM_SAVE SCRIPT if you want to understand
4397 * this stuff. The equivalent code is implemented in
4398 * SCRIPTS for the 895A, 896 and 1010 that are able to
4399 * handle PM from the SCRIPTS processor.
4401 hflags0 = INB (HF_PRT);
4404 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4405 if (hflags & HF_IN_PM0)
4406 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4407 else if (hflags & HF_IN_PM1)
4408 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4410 if (hflags & HF_DP_SAVED)
4411 hflags ^= HF_ACT_PM;
4414 if (!(hflags & HF_ACT_PM)) {
4416 newcmd = SCRIPTA_BA (np, pm0_data);
4420 newcmd = SCRIPTA_BA (np, pm1_data);
4423 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4424 if (hflags != hflags0)
4425 OUTB (HF_PRT, hflags);
4428 * fillin the phase mismatch context
4430 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4431 pm->sg.size = cpu_to_scr(rest);
4432 pm->ret = cpu_to_scr(nxtdsp);
4435 * If we have a SWIDE,
4436 * - prepare the address to write the SWIDE from SCRIPTS,
4437 * - compute the SCRIPTS address to restart from,
4438 * - move current data pointer context by one byte.
4440 nxtdsp = SCRIPTA_BA (np, dispatch);
4441 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4442 (INB (nc_scntl2) & WSR)) {
4446 * Set up the table indirect for the MOVE
4447 * of the residual byte and adjust the data
4450 tmp = scr_to_cpu(pm->sg.addr);
4451 cp->phys.wresid.addr = cpu_to_scr(tmp);
4452 pm->sg.addr = cpu_to_scr(tmp + 1);
4453 tmp = scr_to_cpu(pm->sg.size);
4454 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4455 pm->sg.size = cpu_to_scr(tmp - 1);
4458 * If only the residual byte is to be moved,
4459 * no PM context is needed.
4461 if ((tmp&0xffffff) == 1)
4465 * Prepare the address of SCRIPTS that will
4466 * move the residual byte to memory.
4468 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4471 if (DEBUG_FLAGS & DEBUG_PHASE) {
4473 printf ("PM %x %x %x / %x %x %x.\n",
4474 hflags0, hflags, newcmd,
4475 (unsigned)scr_to_cpu(pm->sg.addr),
4476 (unsigned)scr_to_cpu(pm->sg.size),
4477 (unsigned)scr_to_cpu(pm->ret));
4481 * Restart the SCRIPTS processor.
4483 OUTL (nc_temp, newcmd);
4488 * Unexpected phase changes that occurs when the current phase
4489 * is not a DATA IN or DATA OUT phase are due to error conditions.
4490 * Such event may only happen when the SCRIPTS is using a
4491 * multibyte SCSI MOVE.
4493 * Phase change Some possible cause
4495 * COMMAND --> MSG IN SCSI parity error detected by target.
4496 * COMMAND --> STATUS Bad command or refused by target.
4497 * MSG OUT --> MSG IN Message rejected by target.
4498 * MSG OUT --> COMMAND Bogus target that discards extended
4499 * negotiation messages.
4501 * The code below does not care of the new phase and so
4502 * trusts the target. Why to annoy it ?
4503 * If the interrupted phase is COMMAND phase, we restart at
4505 * If a target does not get all the messages after selection,
4506 * the code assumes blindly that the target discards extended
4507 * messages and clears the negotiation status.
4508 * If the target does not want all our response to negotiation,
4509 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4510 * bloat for such a should_not_happen situation).
4511 * In all other situation, we reset the BUS.
4512 * Are these assumptions reasonnable ? (Wait and see ...)
4519 case 2: /* COMMAND phase */
4520 nxtdsp = SCRIPTA_BA (np, dispatch);
4523 case 3: /* STATUS phase */
4524 nxtdsp = SCRIPTA_BA (np, dispatch);
4527 case 6: /* MSG OUT phase */
4529 * If the device may want to use untagged when we want
4530 * tagged, we prepare an IDENTIFY without disc. granted,
4531 * since we will not be able to handle reselect.
4532 * Otherwise, we just don't care.
4534 if (dsp == SCRIPTA_BA (np, send_ident)) {
4535 if (cp->tag != NO_TAG && olen - rest <= 3) {
4536 cp->host_status = HS_BUSY;
4537 np->msgout[0] = M_IDENTIFY | cp->lun;
4538 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4541 nxtdsp = SCRIPTB_BA (np, ident_break);
4543 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4544 dsp == SCRIPTB_BA (np, send_sdtr) ||
4545 dsp == SCRIPTB_BA (np, send_ppr)) {
4546 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4550 case 7: /* MSG IN phase */
4551 nxtdsp = SCRIPTA_BA (np, clrack);
4562 sym_start_reset(np);
4566 * Dequeue from the START queue all CCBs that match
4567 * a given target/lun/task condition (-1 means all),
4568 * and move them from the BUSY queue to the COMP queue
4569 * with CAM_REQUEUE_REQ status condition.
4570 * This function is used during error handling/recovery.
4571 * It is called with SCRIPTS not running.
4574 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4580 * Make sure the starting index is within range.
4582 assert((i >= 0) && (i < 2*MAX_QUEUE));
4585 * Walk until end of START queue and dequeue every job
4586 * that matches the target/lun/task condition.
4589 while (i != np->squeueput) {
4590 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4592 #ifdef SYM_CONF_IARB_SUPPORT
4593 /* Forget hints for IARB, they may be no longer relevant */
4594 cp->host_flags &= ~HF_HINT_IARB;
4596 if ((target == -1 || cp->target == target) &&
4597 (lun == -1 || cp->lun == lun) &&
4598 (task == -1 || cp->tag == task)) {
4599 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4600 sym_remque(&cp->link_ccbq);
4601 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4605 np->squeue[j] = np->squeue[i];
4606 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4608 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4610 if (i != j) /* Copy back the idle task if needed */
4611 np->squeue[j] = np->squeue[i];
4612 np->squeueput = j; /* Update our current start queue pointer */
4618 * Complete all CCBs queued to the COMP queue.
4620 * These CCBs are assumed:
4621 * - Not to be referenced either by devices or
4622 * SCRIPTS-related queues and datas.
4623 * - To have to be completed with an error condition
4626 * The device queue freeze count is incremented
4627 * for each CCB that does not prevent this.
4628 * This function is called when all CCBs involved
4629 * in error handling/recovery have been reaped.
4632 sym_flush_comp_queue(hcb_p np, int cam_status)
4637 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
4639 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4640 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4641 /* Leave quiet CCBs waiting for resources */
4642 if (cp->host_status == HS_WAIT)
4646 sym_set_cam_status(ccb, cam_status);
4647 sym_freeze_cam_ccb(ccb);
4648 sym_xpt_done(np, ccb, cp);
4649 sym_free_ccb(np, cp);
4654 * chip handler for bad SCSI status condition
4656 * In case of bad SCSI status, we unqueue all the tasks
4657 * currently queued to the controller but not yet started
4658 * and then restart the SCRIPTS processor immediately.
4660 * QUEUE FULL and BUSY conditions are handled the same way.
4661 * Basically all the not yet started tasks are requeued in
4662 * device queue and the queue is frozen until a completion.
4664 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4665 * the CCB of the failed command to prepare a REQUEST SENSE
4666 * SCSI command and queue it to the controller queue.
4668 * SCRATCHA is assumed to have been loaded with STARTPOS
4669 * before the SCRIPTS called the C code.
4671 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4673 tcb_p tp = &np->target[cp->target];
4675 u_char s_status = cp->ssss_status;
4676 u_char h_flags = cp->host_flags;
4681 SYM_LOCK_ASSERT(MA_OWNED);
4684 * Compute the index of the next job to start from SCRIPTS.
4686 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4689 * The last CCB queued used for IARB hint may be
4690 * no longer relevant. Forget it.
4692 #ifdef SYM_CONF_IARB_SUPPORT
4698 * Now deal with the SCSI status.
4703 if (sym_verbose >= 2) {
4705 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4707 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4708 sym_complete_error (np, cp);
4713 * If we get an SCSI error when requesting sense, give up.
4715 if (h_flags & HF_SENSE) {
4716 sym_complete_error (np, cp);
4721 * Dequeue all queued CCBs for that device not yet started,
4722 * and restart the SCRIPTS processor immediately.
4724 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4725 OUTL_DSP (SCRIPTA_BA (np, start));
4728 * Save some info of the actual IO.
4729 * Compute the data residual.
4731 cp->sv_scsi_status = cp->ssss_status;
4732 cp->sv_xerr_status = cp->xerr_status;
4733 cp->sv_resid = sym_compute_residual(np, cp);
4736 * Prepare all needed data structures for
4737 * requesting sense data.
4743 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4747 * If we are currently using anything different from
4748 * async. 8 bit data transfers with that target,
4749 * start a negotiation, since the device may want
4750 * to report us a UNIT ATTENTION condition due to
4751 * a cause we currently ignore, and we donnot want
4752 * to be stuck with WIDE and/or SYNC data transfer.
4754 * cp->nego_status is filled by sym_prepare_nego().
4756 cp->nego_status = 0;
4758 if (tp->tinfo.current.options & PPR_OPT_MASK)
4760 else if (tp->tinfo.current.width != BUS_8_BIT)
4762 else if (tp->tinfo.current.offset != 0)
4766 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4768 * Message table indirect structure.
4770 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4771 cp->phys.smsg.size = cpu_to_scr(msglen);
4776 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4777 cp->phys.cmd.size = cpu_to_scr(6);
4780 * patch requested size into sense command
4782 cp->sensecmd[0] = 0x03;
4783 cp->sensecmd[1] = cp->lun << 5;
4784 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4785 cp->sensecmd[1] = 0;
4786 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4787 cp->data_len = SYM_SNS_BBUF_LEN;
4792 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4793 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4794 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4797 * requeue the command.
4799 startp = SCRIPTB_BA (np, sdata_in);
4801 cp->phys.head.savep = cpu_to_scr(startp);
4802 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4803 cp->phys.head.lastp = cpu_to_scr(startp);
4804 cp->startp = cpu_to_scr(startp);
4806 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4807 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4808 cp->ssss_status = S_ILLEGAL;
4809 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4810 cp->xerr_status = 0;
4811 cp->extra_bytes = 0;
4813 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4816 * Requeue the command.
4818 sym_put_start_queue(np, cp);
4821 * Give back to upper layer everything we have dequeued.
4823 sym_flush_comp_queue(np, 0);
4829 * After a device has accepted some management message
4830 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4831 * a device signals a UNIT ATTENTION condition, some
4832 * tasks are thrown away by the device. We are required
4833 * to reflect that on our tasks list since the device
4834 * will never complete these tasks.
4836 * This function move from the BUSY queue to the COMP
4837 * queue all disconnected CCBs for a given target that
4838 * match the following criteria:
4839 * - lun=-1 means any logical UNIT otherwise a given one.
4840 * - task=-1 means any task, otherwise a given one.
4843 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4845 SYM_QUEHEAD qtmp, *qp;
4850 * Move the entire BUSY queue to our temporary queue.
4852 sym_que_init(&qtmp);
4853 sym_que_splice(&np->busy_ccbq, &qtmp);
4854 sym_que_init(&np->busy_ccbq);
4857 * Put all CCBs that matches our criteria into
4858 * the COMP queue and put back other ones into
4861 while ((qp = sym_remque_head(&qtmp)) != NULL) {
4863 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4865 if (cp->host_status != HS_DISCONNECT ||
4866 cp->target != target ||
4867 (lun != -1 && cp->lun != lun) ||
4869 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4870 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4873 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4875 /* Preserve the software timeout condition */
4876 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4877 sym_set_cam_status(ccb, cam_status);
4880 printf("XXXX TASK @%p CLEARED\n", cp);
4887 * chip handler for TASKS recovery
4889 * We cannot safely abort a command, while the SCRIPTS
4890 * processor is running, since we just would be in race
4893 * As long as we have tasks to abort, we keep the SEM
4894 * bit set in the ISTAT. When this bit is set, the
4895 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4896 * each time it enters the scheduler.
4898 * If we have to reset a target, clear tasks of a unit,
4899 * or to perform the abort of a disconnected job, we
4900 * restart the SCRIPTS for selecting the target. Once
4901 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4902 * If it loses arbitration, the SCRIPTS will interrupt again
4903 * the next time it will enter its scheduler, and so on ...
4905 * On SIR_TARGET_SELECTED, we scan for the more
4906 * appropriate thing to do:
4908 * - If nothing, we just sent a M_ABORT message to the
4909 * target to get rid of the useless SCSI bus ownership.
4910 * According to the specs, no tasks shall be affected.
4911 * - If the target is to be reset, we send it a M_RESET
4913 * - If a logical UNIT is to be cleared , we send the
4914 * IDENTIFY(lun) + M_ABORT.
4915 * - If an untagged task is to be aborted, we send the
4916 * IDENTIFY(lun) + M_ABORT.
4917 * - If a tagged task is to be aborted, we send the
4918 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4920 * Once our 'kiss of death' :) message has been accepted
4921 * by the target, the SCRIPTS interrupts again
4922 * (SIR_ABORT_SENT). On this interrupt, we complete
4923 * all the CCBs that should have been aborted by the
4924 * target according to our message.
4926 static void sym_sir_task_recovery(hcb_p np, int num)
4931 int target=-1, lun=-1, task;
4936 * The SCRIPTS processor stopped before starting
4937 * the next command in order to allow us to perform
4938 * some task recovery.
4940 case SIR_SCRIPT_STOPPED:
4942 * Do we have any target to reset or unit to clear ?
4944 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4945 tp = &np->target[i];
4947 (tp->lun0p && tp->lun0p->to_clear)) {
4953 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4954 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
4964 * If not, walk the busy queue for any
4965 * disconnected CCB to be aborted.
4968 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4969 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
4970 if (cp->host_status != HS_DISCONNECT)
4973 target = cp->target;
4980 * If some target is to be selected,
4981 * prepare and start the selection.
4984 tp = &np->target[target];
4985 np->abrt_sel.sel_id = target;
4986 np->abrt_sel.sel_scntl3 = tp->head.wval;
4987 np->abrt_sel.sel_sxfer = tp->head.sval;
4988 OUTL(nc_dsa, np->hcb_ba);
4989 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
4994 * Now look for a CCB to abort that haven't started yet.
4995 * Btw, the SCRIPTS processor is still stopped, so
4996 * we are not in race.
5000 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5001 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5002 if (cp->host_status != HS_BUSY &&
5003 cp->host_status != HS_NEGOTIATE)
5007 #ifdef SYM_CONF_IARB_SUPPORT
5009 * If we are using IMMEDIATE ARBITRATION, we donnot
5010 * want to cancel the last queued CCB, since the
5011 * SCRIPTS may have anticipated the selection.
5013 if (cp == np->last_cp) {
5018 i = 1; /* Means we have found some */
5023 * We are done, so we donnot need
5024 * to synchronize with the SCRIPTS anylonger.
5025 * Remove the SEM flag from the ISTAT.
5028 OUTB (nc_istat, SIGP);
5032 * Compute index of next position in the start
5033 * queue the SCRIPTS intends to start and dequeue
5034 * all CCBs for that device that haven't been started.
5036 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5037 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5040 * Make sure at least our IO to abort has been dequeued.
5042 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5045 * Keep track in cam status of the reason of the abort.
5047 if (cp->to_abort == 2)
5048 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5050 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5053 * Complete with error everything that we have dequeued.
5055 sym_flush_comp_queue(np, 0);
5058 * The SCRIPTS processor has selected a target
5059 * we may have some manual recovery to perform for.
5061 case SIR_TARGET_SELECTED:
5062 target = (INB (nc_sdid) & 0xf);
5063 tp = &np->target[target];
5065 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5068 * If the target is to be reset, prepare a
5069 * M_RESET message and clear the to_reset flag
5070 * since we donnot expect this operation to fail.
5073 np->abrt_msg[0] = M_RESET;
5074 np->abrt_tbl.size = 1;
5080 * Otherwise, look for some logical unit to be cleared.
5082 if (tp->lun0p && tp->lun0p->to_clear)
5084 else if (tp->lunmp) {
5085 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5086 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5094 * If a logical unit is to be cleared, prepare
5095 * an IDENTIFY(lun) + ABORT MESSAGE.
5098 lcb_p lp = sym_lp(np, tp, lun);
5099 lp->to_clear = 0; /* We donnot expect to fail here */
5100 np->abrt_msg[0] = M_IDENTIFY | lun;
5101 np->abrt_msg[1] = M_ABORT;
5102 np->abrt_tbl.size = 2;
5107 * Otherwise, look for some disconnected job to
5108 * abort for this target.
5112 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5113 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5114 if (cp->host_status != HS_DISCONNECT)
5116 if (cp->target != target)
5120 i = 1; /* Means we have some */
5125 * If we have none, probably since the device has
5126 * completed the command before we won abitration,
5127 * send a M_ABORT message without IDENTIFY.
5128 * According to the specs, the device must just
5129 * disconnect the BUS and not abort any task.
5132 np->abrt_msg[0] = M_ABORT;
5133 np->abrt_tbl.size = 1;
5138 * We have some task to abort.
5139 * Set the IDENTIFY(lun)
5141 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5144 * If we want to abort an untagged command, we
5145 * will send an IDENTIFY + M_ABORT.
5146 * Otherwise (tagged command), we will send
5147 * an IDENTIFY + task attributes + ABORT TAG.
5149 if (cp->tag == NO_TAG) {
5150 np->abrt_msg[1] = M_ABORT;
5151 np->abrt_tbl.size = 2;
5154 np->abrt_msg[1] = cp->scsi_smsg[1];
5155 np->abrt_msg[2] = cp->scsi_smsg[2];
5156 np->abrt_msg[3] = M_ABORT_TAG;
5157 np->abrt_tbl.size = 4;
5160 * Keep track of software timeout condition, since the
5161 * peripheral driver may not count retries on abort
5162 * conditions not due to timeout.
5164 if (cp->to_abort == 2)
5165 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5166 cp->to_abort = 0; /* We donnot expect to fail here */
5170 * The target has accepted our message and switched
5171 * to BUS FREE phase as we expected.
5173 case SIR_ABORT_SENT:
5174 target = (INB (nc_sdid) & 0xf);
5175 tp = &np->target[target];
5178 ** If we didn't abort anything, leave here.
5180 if (np->abrt_msg[0] == M_ABORT)
5184 * If we sent a M_RESET, then a hardware reset has
5185 * been performed by the target.
5186 * - Reset everything to async 8 bit
5187 * - Tell ourself to negotiate next time :-)
5188 * - Prepare to clear all disconnected CCBs for
5189 * this target from our task list (lun=task=-1)
5193 if (np->abrt_msg[0] == M_RESET) {
5195 tp->head.wval = np->rv_scntl3;
5197 tp->tinfo.current.period = 0;
5198 tp->tinfo.current.offset = 0;
5199 tp->tinfo.current.width = BUS_8_BIT;
5200 tp->tinfo.current.options = 0;
5204 * Otherwise, check for the LUN and TASK(s)
5205 * concerned by the cancelation.
5206 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5207 * or an ABORT message :-)
5210 lun = np->abrt_msg[0] & 0x3f;
5211 if (np->abrt_msg[1] == M_ABORT_TAG)
5212 task = np->abrt_msg[2];
5216 * Complete all the CCBs the device should have
5217 * aborted due to our 'kiss of death' message.
5219 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5220 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5221 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5222 sym_flush_comp_queue(np, 0);
5225 * If we sent a BDR, make uper layer aware of that.
5227 if (np->abrt_msg[0] == M_RESET)
5228 xpt_async(AC_SENT_BDR, np->path, NULL);
5233 * Print to the log the message we intend to send.
5235 if (num == SIR_TARGET_SELECTED) {
5236 PRINT_TARGET(np, target);
5237 sym_printl_hex("control msgout:", np->abrt_msg,
5239 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5243 * Let the SCRIPTS processor continue.
5249 * Gerard's alchemy:) that deals with with the data
5250 * pointer for both MDP and the residual calculation.
5252 * I didn't want to bloat the code by more than 200
5253 * lignes for the handling of both MDP and the residual.
5254 * This has been achieved by using a data pointer
5255 * representation consisting in an index in the data
5256 * array (dp_sg) and a negative offset (dp_ofs) that
5257 * have the following meaning:
5259 * - dp_sg = SYM_CONF_MAX_SG
5260 * we are at the end of the data script.
5261 * - dp_sg < SYM_CONF_MAX_SG
5262 * dp_sg points to the next entry of the scatter array
5263 * we want to transfer.
5265 * dp_ofs represents the residual of bytes of the
5266 * previous entry scatter entry we will send first.
5268 * no residual to send first.
5270 * The function sym_evaluate_dp() accepts an arbitray
5271 * offset (basically from the MDP message) and returns
5272 * the corresponding values of dp_sg and dp_ofs.
5274 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5277 int dp_ofs, dp_sg, dp_sgmin;
5282 * Compute the resulted data pointer in term of a script
5283 * address within some DATA script and a signed byte offset.
5287 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5289 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5295 dp_scr = scr_to_cpu(pm->ret);
5296 dp_ofs -= scr_to_cpu(pm->sg.size);
5300 * If we are auto-sensing, then we are done.
5302 if (cp->host_flags & HF_SENSE) {
5308 * Deduce the index of the sg entry.
5309 * Keep track of the index of the first valid entry.
5310 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5313 tmp = scr_to_cpu(cp->phys.head.goalp);
5314 dp_sg = SYM_CONF_MAX_SG;
5316 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5317 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5320 * Move to the sg entry the data pointer belongs to.
5322 * If we are inside the data area, we expect result to be:
5325 * dp_ofs = 0 and dp_sg is the index of the sg entry
5326 * the data pointer belongs to (or the end of the data)
5328 * dp_ofs < 0 and dp_sg is the index of the sg entry
5329 * the data pointer belongs to + 1.
5333 while (dp_sg > dp_sgmin) {
5335 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5336 n = dp_ofs + (tmp & 0xffffff);
5344 else if (dp_ofs > 0) {
5345 while (dp_sg < SYM_CONF_MAX_SG) {
5346 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5347 dp_ofs -= (tmp & 0xffffff);
5355 * Make sure the data pointer is inside the data area.
5356 * If not, return some error.
5358 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5360 else if (dp_sg > SYM_CONF_MAX_SG ||
5361 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5365 * Save the extreme pointer if needed.
5367 if (dp_sg > cp->ext_sg ||
5368 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5370 cp->ext_ofs = dp_ofs;
5384 * chip handler for MODIFY DATA POINTER MESSAGE
5386 * We also call this function on IGNORE WIDE RESIDUE
5387 * messages that do not match a SWIDE full condition.
5388 * Btw, we assume in that situation that such a message
5389 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5391 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5394 u32 dp_scr = INL (nc_temp);
5402 * Not supported for auto-sense.
5404 if (cp->host_flags & HF_SENSE)
5408 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5409 * to the resulted data pointer.
5411 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5416 * And our alchemy:) allows to easily calculate the data
5417 * script address we want to return for the next data phase.
5419 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5420 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5423 * If offset / scatter entry is zero we donnot need
5424 * a context for the new current data pointer.
5432 * Get a context for the new current data pointer.
5434 hflags = INB (HF_PRT);
5436 if (hflags & HF_DP_SAVED)
5437 hflags ^= HF_ACT_PM;
5439 if (!(hflags & HF_ACT_PM)) {
5441 dp_scr = SCRIPTA_BA (np, pm0_data);
5445 dp_scr = SCRIPTA_BA (np, pm1_data);
5448 hflags &= ~(HF_DP_SAVED);
5450 OUTB (HF_PRT, hflags);
5453 * Set up the new current data pointer.
5454 * ofs < 0 there, and for the next data phase, we
5455 * want to transfer part of the data of the sg entry
5456 * corresponding to index dp_sg-1 prior to returning
5457 * to the main data script.
5459 pm->ret = cpu_to_scr(dp_ret);
5460 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5461 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5462 pm->sg.addr = cpu_to_scr(tmp);
5463 pm->sg.size = cpu_to_scr(-dp_ofs);
5466 OUTL (nc_temp, dp_scr);
5467 OUTL_DSP (SCRIPTA_BA (np, clrack));
5471 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5475 * chip calculation of the data residual.
5477 * As I used to say, the requirement of data residual
5478 * in SCSI is broken, useless and cannot be achieved
5479 * without huge complexity.
5480 * But most OSes and even the official CAM require it.
5481 * When stupidity happens to be so widely spread inside
5482 * a community, it gets hard to convince.
5484 * Anyway, I don't care, since I am not going to use
5485 * any software that considers this data residual as
5486 * a relevant information. :)
5488 static int sym_compute_residual(hcb_p np, ccb_p cp)
5490 int dp_sg, dp_sgmin, resid = 0;
5494 * Check for some data lost or just thrown away.
5495 * We are not required to be quite accurate in this
5496 * situation. Btw, if we are odd for output and the
5497 * device claims some more data, it may well happen
5498 * than our residual be zero. :-)
5500 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5501 if (cp->xerr_status & XE_EXTRA_DATA)
5502 resid -= cp->extra_bytes;
5503 if (cp->xerr_status & XE_SODL_UNRUN)
5505 if (cp->xerr_status & XE_SWIDE_OVRUN)
5510 * If all data has been transferred,
5511 * there is no residual.
5513 if (cp->phys.head.lastp == cp->phys.head.goalp)
5517 * If no data transfer occurs, or if the data
5518 * pointer is weird, return full residual.
5520 if (cp->startp == cp->phys.head.lastp ||
5521 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5523 return cp->data_len;
5527 * If we were auto-sensing, then we are done.
5529 if (cp->host_flags & HF_SENSE) {
5534 * We are now full comfortable in the computation
5535 * of the data residual (2's complement).
5537 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5538 resid = -cp->ext_ofs;
5539 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5540 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5541 resid += (tmp & 0xffffff);
5545 * Hopefully, the result is not too wrong.
5551 * Print out the content of a SCSI message.
5553 static int sym_show_msg (u_char * msg)
5557 if (*msg==M_EXTENDED) {
5559 if (i-1>msg[1]) break;
5560 printf ("-%x",msg[i]);
5563 } else if ((*msg & 0xf0) == 0x20) {
5564 printf ("-%x",msg[1]);
5570 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5574 printf ("%s: ", label);
5576 (void) sym_show_msg (msg);
5581 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5583 * When we try to negotiate, we append the negotiation message
5584 * to the identify and (maybe) simple tag message.
5585 * The host status field is set to HS_NEGOTIATE to mark this
5588 * If the target doesn't answer this message immediately
5589 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5590 * will be raised eventually.
5591 * The handler removes the HS_NEGOTIATE status, and sets the
5592 * negotiated value to the default (async / nowide).
5594 * If we receive a matching answer immediately, we check it
5595 * for validity, and set the values.
5597 * If we receive a Reject message immediately, we assume the
5598 * negotiation has failed, and fall back to standard values.
5600 * If we receive a negotiation message while not in HS_NEGOTIATE
5601 * state, it's a target initiated negotiation. We prepare a
5602 * (hopefully) valid answer, set our parameters, and send back
5603 * this answer to the target.
5605 * If the target doesn't fetch the answer (no message out phase),
5606 * we assume the negotiation has failed, and fall back to default
5607 * settings (SIR_NEGO_PROTO interrupt).
5609 * When we set the values, we adjust them in all ccbs belonging
5610 * to this target, in the controller's register, and in the "phys"
5611 * field of the controller's struct sym_hcb.
5615 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5617 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5619 u_char chg, ofs, per, fak, div;
5623 * Synchronous request message received.
5625 if (DEBUG_FLAGS & DEBUG_NEGO) {
5626 sym_print_msg(cp, "sync msgin", np->msgin);
5630 * request or answer ?
5632 if (INB (HS_PRT) == HS_NEGOTIATE) {
5633 OUTB (HS_PRT, HS_BUSY);
5634 if (cp->nego_status && cp->nego_status != NS_SYNC)
5640 * get requested values.
5647 * check values against our limits.
5650 if (ofs > np->maxoffs)
5651 {chg = 1; ofs = np->maxoffs;}
5653 if (ofs > tp->tinfo.user.offset)
5654 {chg = 1; ofs = tp->tinfo.user.offset;}
5659 if (per < np->minsync)
5660 {chg = 1; per = np->minsync;}
5662 if (per < tp->tinfo.user.period)
5663 {chg = 1; per = tp->tinfo.user.period;}
5668 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5671 if (DEBUG_FLAGS & DEBUG_NEGO) {
5673 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5674 ofs, per, div, fak, chg);
5678 * This was an answer message
5681 if (chg) /* Answer wasn't acceptable. */
5683 sym_setsync (np, cp, ofs, per, div, fak);
5684 OUTL_DSP (SCRIPTA_BA (np, clrack));
5689 * It was a request. Set value and
5690 * prepare an answer message
5692 sym_setsync (np, cp, ofs, per, div, fak);
5694 np->msgout[0] = M_EXTENDED;
5696 np->msgout[2] = M_X_SYNC_REQ;
5697 np->msgout[3] = per;
5698 np->msgout[4] = ofs;
5700 cp->nego_status = NS_SYNC;
5702 if (DEBUG_FLAGS & DEBUG_NEGO) {
5703 sym_print_msg(cp, "sync msgout", np->msgout);
5706 np->msgin [0] = M_NOOP;
5708 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5711 sym_setsync (np, cp, 0, 0, 0, 0);
5712 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5716 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5718 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5720 u_char chg, ofs, per, fak, dt, div, wide;
5724 * Synchronous request message received.
5726 if (DEBUG_FLAGS & DEBUG_NEGO) {
5727 sym_print_msg(cp, "ppr msgin", np->msgin);
5731 * get requested values.
5736 wide = np->msgin[6];
5737 dt = np->msgin[7] & PPR_OPT_DT;
5740 * request or answer ?
5742 if (INB (HS_PRT) == HS_NEGOTIATE) {
5743 OUTB (HS_PRT, HS_BUSY);
5744 if (cp->nego_status && cp->nego_status != NS_PPR)
5750 * check values against our limits.
5752 if (wide > np->maxwide)
5753 {chg = 1; wide = np->maxwide;}
5754 if (!wide || !(np->features & FE_ULTRA3))
5757 if (wide > tp->tinfo.user.width)
5758 {chg = 1; wide = tp->tinfo.user.width;}
5761 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5764 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5768 if (ofs > np->maxoffs_dt)
5769 {chg = 1; ofs = np->maxoffs_dt;}
5771 else if (ofs > np->maxoffs)
5772 {chg = 1; ofs = np->maxoffs;}
5774 if (ofs > tp->tinfo.user.offset)
5775 {chg = 1; ofs = tp->tinfo.user.offset;}
5781 if (per < np->minsync_dt)
5782 {chg = 1; per = np->minsync_dt;}
5784 else if (per < np->minsync)
5785 {chg = 1; per = np->minsync;}
5787 if (per < tp->tinfo.user.period)
5788 {chg = 1; per = tp->tinfo.user.period;}
5793 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5796 if (DEBUG_FLAGS & DEBUG_NEGO) {
5799 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5800 dt, ofs, per, wide, div, fak, chg);
5807 if (chg) /* Answer wasn't acceptable */
5809 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5810 OUTL_DSP (SCRIPTA_BA (np, clrack));
5815 * It was a request. Set value and
5816 * prepare an answer message
5818 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5820 np->msgout[0] = M_EXTENDED;
5822 np->msgout[2] = M_X_PPR_REQ;
5823 np->msgout[3] = per;
5825 np->msgout[5] = ofs;
5826 np->msgout[6] = wide;
5829 cp->nego_status = NS_PPR;
5831 if (DEBUG_FLAGS & DEBUG_NEGO) {
5832 sym_print_msg(cp, "ppr msgout", np->msgout);
5835 np->msgin [0] = M_NOOP;
5837 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5840 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5841 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5843 * If it was a device response that should result in
5844 * ST, we may want to try a legacy negotiation later.
5847 tp->tinfo.goal.options = 0;
5848 tp->tinfo.goal.width = wide;
5849 tp->tinfo.goal.period = per;
5850 tp->tinfo.goal.offset = ofs;
5855 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5857 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5863 * Wide request message received.
5865 if (DEBUG_FLAGS & DEBUG_NEGO) {
5866 sym_print_msg(cp, "wide msgin", np->msgin);
5870 * Is it a request from the device?
5872 if (INB (HS_PRT) == HS_NEGOTIATE) {
5873 OUTB (HS_PRT, HS_BUSY);
5874 if (cp->nego_status && cp->nego_status != NS_WIDE)
5880 * get requested values.
5883 wide = np->msgin[3];
5886 * check values against driver limits.
5888 if (wide > np->maxwide)
5889 {chg = 1; wide = np->maxwide;}
5891 if (wide > tp->tinfo.user.width)
5892 {chg = 1; wide = tp->tinfo.user.width;}
5895 if (DEBUG_FLAGS & DEBUG_NEGO) {
5897 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5901 * This was an answer message
5904 if (chg) /* Answer wasn't acceptable. */
5906 sym_setwide (np, cp, wide);
5909 * Negotiate for SYNC immediately after WIDE response.
5910 * This allows to negotiate for both WIDE and SYNC on
5911 * a single SCSI command (Suggested by Justin Gibbs).
5913 if (tp->tinfo.goal.offset) {
5914 np->msgout[0] = M_EXTENDED;
5916 np->msgout[2] = M_X_SYNC_REQ;
5917 np->msgout[3] = tp->tinfo.goal.period;
5918 np->msgout[4] = tp->tinfo.goal.offset;
5920 if (DEBUG_FLAGS & DEBUG_NEGO) {
5921 sym_print_msg(cp, "sync msgout", np->msgout);
5924 cp->nego_status = NS_SYNC;
5925 OUTB (HS_PRT, HS_NEGOTIATE);
5926 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5930 OUTL_DSP (SCRIPTA_BA (np, clrack));
5935 * It was a request, set value and
5936 * prepare an answer message
5938 sym_setwide (np, cp, wide);
5940 np->msgout[0] = M_EXTENDED;
5942 np->msgout[2] = M_X_WIDE_REQ;
5943 np->msgout[3] = wide;
5945 np->msgin [0] = M_NOOP;
5947 cp->nego_status = NS_WIDE;
5949 if (DEBUG_FLAGS & DEBUG_NEGO) {
5950 sym_print_msg(cp, "wide msgout", np->msgout);
5953 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
5956 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5960 * Reset SYNC or WIDE to default settings.
5962 * Called when a negotiation does not succeed either
5963 * on rejection or on protocol error.
5965 * If it was a PPR that made problems, we may want to
5966 * try a legacy negotiation later.
5968 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
5971 * any error in negotiation:
5972 * fall back to default mode.
5974 switch (cp->nego_status) {
5977 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5979 tp->tinfo.goal.options = 0;
5980 if (tp->tinfo.goal.period < np->minsync)
5981 tp->tinfo.goal.period = np->minsync;
5982 if (tp->tinfo.goal.offset > np->maxoffs)
5983 tp->tinfo.goal.offset = np->maxoffs;
5987 sym_setsync (np, cp, 0, 0, 0, 0);
5990 sym_setwide (np, cp, 0);
5993 np->msgin [0] = M_NOOP;
5994 np->msgout[0] = M_NOOP;
5995 cp->nego_status = 0;
5999 * chip handler for MESSAGE REJECT received in response to
6000 * a WIDE or SYNCHRONOUS negotiation.
6002 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6004 sym_nego_default(np, tp, cp);
6005 OUTB (HS_PRT, HS_BUSY);
6009 * chip exception handler for programmed interrupts.
6011 static void sym_int_sir (hcb_p np)
6013 u_char num = INB (nc_dsps);
6014 u32 dsa = INL (nc_dsa);
6015 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6016 u_char target = INB (nc_sdid) & 0x0f;
6017 tcb_p tp = &np->target[target];
6020 SYM_LOCK_ASSERT(MA_OWNED);
6022 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6026 * Command has been completed with error condition
6027 * or has been auto-sensed.
6029 case SIR_COMPLETE_ERROR:
6030 sym_complete_error(np, cp);
6033 * The C code is currently trying to recover from something.
6034 * Typically, user want to abort some command.
6036 case SIR_SCRIPT_STOPPED:
6037 case SIR_TARGET_SELECTED:
6038 case SIR_ABORT_SENT:
6039 sym_sir_task_recovery(np, num);
6042 * The device didn't go to MSG OUT phase after having
6043 * been selected with ATN. We donnot want to handle
6046 case SIR_SEL_ATN_NO_MSG_OUT:
6047 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6048 sym_name (np), target);
6051 * The device didn't switch to MSG IN phase after
6052 * having reseleted the initiator.
6054 case SIR_RESEL_NO_MSG_IN:
6055 printf ("%s:%d: No MSG IN phase after reselection.\n",
6056 sym_name (np), target);
6059 * After reselection, the device sent a message that wasn't
6062 case SIR_RESEL_NO_IDENTIFY:
6063 printf ("%s:%d: No IDENTIFY after reselection.\n",
6064 sym_name (np), target);
6067 * The device reselected a LUN we donnot know about.
6069 case SIR_RESEL_BAD_LUN:
6070 np->msgout[0] = M_RESET;
6073 * The device reselected for an untagged nexus and we
6076 case SIR_RESEL_BAD_I_T_L:
6077 np->msgout[0] = M_ABORT;
6080 * The device reselected for a tagged nexus that we donnot
6083 case SIR_RESEL_BAD_I_T_L_Q:
6084 np->msgout[0] = M_ABORT_TAG;
6087 * The SCRIPTS let us know that the device has grabbed
6088 * our message and will abort the job.
6090 case SIR_RESEL_ABORTED:
6091 np->lastmsg = np->msgout[0];
6092 np->msgout[0] = M_NOOP;
6093 printf ("%s:%d: message %x sent on bad reselection.\n",
6094 sym_name (np), target, np->lastmsg);
6097 * The SCRIPTS let us know that a message has been
6098 * successfully sent to the device.
6100 case SIR_MSG_OUT_DONE:
6101 np->lastmsg = np->msgout[0];
6102 np->msgout[0] = M_NOOP;
6103 /* Should we really care of that */
6104 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6106 cp->xerr_status &= ~XE_PARITY_ERR;
6107 if (!cp->xerr_status)
6108 OUTOFFB (HF_PRT, HF_EXT_ERR);
6113 * The device didn't send a GOOD SCSI status.
6114 * We may have some work to do prior to allow
6115 * the SCRIPTS processor to continue.
6117 case SIR_BAD_SCSI_STATUS:
6120 sym_sir_bad_scsi_status(np, num, cp);
6123 * We are asked by the SCRIPTS to prepare a
6126 case SIR_REJECT_TO_SEND:
6127 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6128 np->msgout[0] = M_REJECT;
6131 * We have been ODD at the end of a DATA IN
6132 * transfer and the device didn't send a
6133 * IGNORE WIDE RESIDUE message.
6134 * It is a data overrun condition.
6136 case SIR_SWIDE_OVERRUN:
6138 OUTONB (HF_PRT, HF_EXT_ERR);
6139 cp->xerr_status |= XE_SWIDE_OVRUN;
6143 * We have been ODD at the end of a DATA OUT
6145 * It is a data underrun condition.
6147 case SIR_SODL_UNDERRUN:
6149 OUTONB (HF_PRT, HF_EXT_ERR);
6150 cp->xerr_status |= XE_SODL_UNRUN;
6154 * The device wants us to tranfer more data than
6155 * expected or in the wrong direction.
6156 * The number of extra bytes is in scratcha.
6157 * It is a data overrun condition.
6159 case SIR_DATA_OVERRUN:
6161 OUTONB (HF_PRT, HF_EXT_ERR);
6162 cp->xerr_status |= XE_EXTRA_DATA;
6163 cp->extra_bytes += INL (nc_scratcha);
6167 * The device switched to an illegal phase (4/5).
6171 OUTONB (HF_PRT, HF_EXT_ERR);
6172 cp->xerr_status |= XE_BAD_PHASE;
6176 * We received a message.
6178 case SIR_MSG_RECEIVED:
6181 switch (np->msgin [0]) {
6183 * We received an extended message.
6184 * We handle MODIFY DATA POINTER, SDTR, WDTR
6185 * and reject all other extended messages.
6188 switch (np->msgin [2]) {
6190 if (DEBUG_FLAGS & DEBUG_POINTER)
6191 sym_print_msg(cp,"modify DP",np->msgin);
6192 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6193 (np->msgin[5]<<8) + (np->msgin[6]);
6194 sym_modify_dp(np, tp, cp, tmp);
6197 sym_sync_nego(np, tp, cp);
6200 sym_ppr_nego(np, tp, cp);
6203 sym_wide_nego(np, tp, cp);
6210 * We received a 1/2 byte message not handled from SCRIPTS.
6211 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6212 * RESIDUE messages that haven't been anticipated by
6213 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6214 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6217 if (DEBUG_FLAGS & DEBUG_POINTER)
6218 sym_print_msg(cp,"ign wide residue", np->msgin);
6219 sym_modify_dp(np, tp, cp, -1);
6222 if (INB (HS_PRT) == HS_NEGOTIATE)
6223 sym_nego_rejected(np, tp, cp);
6226 printf ("M_REJECT received (%x:%x).\n",
6227 scr_to_cpu(np->lastmsg), np->msgout[0]);
6236 * We received an unknown message.
6237 * Ignore all MSG IN phases and reject it.
6240 sym_print_msg(cp, "WEIRD message received", np->msgin);
6241 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6244 * Negotiation failed.
6245 * Target does not send us the reply.
6246 * Remove the HS_NEGOTIATE status.
6248 case SIR_NEGO_FAILED:
6249 OUTB (HS_PRT, HS_BUSY);
6251 * Negotiation failed.
6252 * Target does not want answer message.
6254 case SIR_NEGO_PROTO:
6255 sym_nego_default(np, tp, cp);
6263 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6266 OUTL_DSP (SCRIPTA_BA (np, clrack));
6273 * Acquire a control block
6275 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6277 tcb_p tp = &np->target[tn];
6278 lcb_p lp = sym_lp(np, tp, ln);
6279 u_short tag = NO_TAG;
6281 ccb_p cp = (ccb_p) NULL;
6284 * Look for a free CCB
6286 if (sym_que_empty(&np->free_ccbq))
6288 qp = sym_remque_head(&np->free_ccbq);
6291 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6294 * If the LCB is not yet available and the LUN
6295 * has been probed ok, try to allocate the LCB.
6297 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6298 lp = sym_alloc_lcb(np, tn, ln);
6304 * If the LCB is not available here, then the
6305 * logical unit is not yet discovered. For those
6306 * ones only accept 1 SCSI IO per logical unit,
6307 * since we cannot allow disconnections.
6310 if (!sym_is_bit(tp->busy0_map, ln))
6311 sym_set_bit(tp->busy0_map, ln);
6316 * If we have been asked for a tagged command.
6320 * Debugging purpose.
6322 assert(lp->busy_itl == 0);
6324 * Allocate resources for tags if not yet.
6327 sym_alloc_lcb_tags(np, tn, ln);
6332 * Get a tag for this SCSI IO and set up
6333 * the CCB bus address for reselection,
6334 * and count it for this LUN.
6335 * Toggle reselect path to tagged.
6337 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6338 tag = lp->cb_tags[lp->ia_tag];
6339 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6341 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6344 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6350 * This command will not be tagged.
6351 * If we already have either a tagged or untagged
6352 * one, refuse to overlap this untagged one.
6356 * Debugging purpose.
6358 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6360 * Count this nexus for this LUN.
6361 * Set up the CCB bus address for reselection.
6362 * Toggle reselect path to untagged.
6364 if (++lp->busy_itl == 1) {
6365 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6367 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6374 * Put the CCB into the busy queue.
6376 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6379 * Remember all informations needed to free this CCB.
6386 if (DEBUG_FLAGS & DEBUG_TAGS) {
6387 PRINT_LUN(np, tn, ln);
6388 printf ("ccb @%p using tag %d.\n", cp, tag);
6394 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6399 * Release one control block
6401 static void sym_free_ccb (hcb_p np, ccb_p cp)
6403 tcb_p tp = &np->target[cp->target];
6404 lcb_p lp = sym_lp(np, tp, cp->lun);
6406 if (DEBUG_FLAGS & DEBUG_TAGS) {
6407 PRINT_LUN(np, cp->target, cp->lun);
6408 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6416 * If tagged, release the tag, set the relect path
6418 if (cp->tag != NO_TAG) {
6420 * Free the tag value.
6422 lp->cb_tags[lp->if_tag] = cp->tag;
6423 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6426 * Make the reselect path invalid,
6427 * and uncount this CCB.
6429 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6431 } else { /* Untagged */
6433 * Make the reselect path invalid,
6434 * and uncount this CCB.
6436 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6440 * If no JOB active, make the LUN reselect path invalid.
6442 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6444 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6447 * Otherwise, we only accept 1 IO per LUN.
6448 * Clear the bit that keeps track of this IO.
6451 sym_clr_bit(tp->busy0_map, cp->lun);
6454 * We donnot queue more than 1 ccb per target
6455 * with negotiation at any time. If this ccb was
6456 * used for negotiation, clear this info in the tcb.
6458 if (cp == tp->nego_cp)
6461 #ifdef SYM_CONF_IARB_SUPPORT
6463 * If we just complete the last queued CCB,
6464 * clear this info that is no longer relevant.
6466 if (cp == np->last_cp)
6471 * Unmap user data from DMA map if needed.
6473 if (cp->dmamapped) {
6474 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6479 * Make this CCB available.
6482 cp->host_status = HS_IDLE;
6483 sym_remque(&cp->link_ccbq);
6484 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6488 * Allocate a CCB from memory and initialize its fixed part.
6490 static ccb_p sym_alloc_ccb(hcb_p np)
6495 SYM_LOCK_ASSERT(MA_NOTOWNED);
6498 * Prevent from allocating more CCBs than we can
6499 * queue to the controller.
6501 if (np->actccbs >= SYM_CONF_MAX_START)
6505 * Allocate memory for this CCB.
6507 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6512 * Allocate a bounce buffer for sense data.
6514 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6519 * Allocate a map for the DMA of user data.
6521 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6529 * Initialize the callout.
6531 callout_init(&cp->ch, 1);
6534 * Compute the bus address of this ccb.
6536 cp->ccb_ba = vtobus(cp);
6539 * Insert this ccb into the hashed list.
6541 hcode = CCB_HASH_CODE(cp->ccb_ba);
6542 cp->link_ccbh = np->ccbh[hcode];
6543 np->ccbh[hcode] = cp;
6546 * Initialize the start and restart actions.
6548 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6549 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6552 * Initilialyze some other fields.
6554 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6557 * Chain into free ccb queue.
6559 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6564 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
6565 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6570 * Look up a CCB from a DSA value.
6572 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6577 hcode = CCB_HASH_CODE(dsa);
6578 cp = np->ccbh[hcode];
6580 if (cp->ccb_ba == dsa)
6589 * Target control block initialisation.
6590 * Nothing important to do at the moment.
6592 static void sym_init_tcb (hcb_p np, u_char tn)
6595 * Check some alignments required by the chip.
6597 assert (((offsetof(struct sym_reg, nc_sxfer) ^
6598 offsetof(struct sym_tcb, head.sval)) &3) == 0);
6599 assert (((offsetof(struct sym_reg, nc_scntl3) ^
6600 offsetof(struct sym_tcb, head.wval)) &3) == 0);
6604 * Lun control block allocation and initialization.
6606 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6608 tcb_p tp = &np->target[tn];
6609 lcb_p lp = sym_lp(np, tp, ln);
6612 * Already done, just return.
6617 * Check against some race.
6619 assert(!sym_is_bit(tp->busy0_map, ln));
6622 * Initialize the target control block if not yet.
6624 sym_init_tcb (np, tn);
6627 * Allocate the LCB bus address array.
6628 * Compute the bus address of this table.
6630 if (ln && !tp->luntbl) {
6633 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6636 for (i = 0 ; i < 64 ; i++)
6637 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6638 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6642 * Allocate the table of pointers for LUN(s) > 0, if needed.
6644 if (ln && !tp->lunmp) {
6645 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6653 * Make it available to the chip.
6655 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6660 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6664 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6668 * Let the itl task point to error handling.
6670 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6673 * Set the reselect pattern to our default. :)
6675 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6678 * Set user capabilities.
6680 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6687 * Allocate LCB resources for tagged command queuing.
6689 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6691 tcb_p tp = &np->target[tn];
6692 lcb_p lp = sym_lp(np, tp, ln);
6696 * If LCB not available, try to allocate it.
6698 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6702 * Allocate the task table and and the tag allocation
6703 * circular buffer. We want both or none.
6705 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6708 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6710 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6716 * Initialize the task table with invalid entries.
6718 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6719 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6722 * Fill up the tag buffer with tag numbers.
6724 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6728 * Make the task table available to SCRIPTS,
6729 * And accept tagged commands now.
6731 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6735 * Test the pci bus snoop logic :-(
6737 * Has to be called with interrupts disabled.
6739 #ifndef SYM_CONF_IOMAPPED
6740 static int sym_regtest (hcb_p np)
6742 register volatile u32 data;
6744 * chip registers may NOT be cached.
6745 * write 0xffffffff to a read only register area,
6746 * and try to read it back.
6749 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6750 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6752 if (data == 0xffffffff) {
6754 if ((data & 0xe2f0fffd) != 0x02000080) {
6756 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6764 static int sym_snooptest (hcb_p np)
6766 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6768 #ifndef SYM_CONF_IOMAPPED
6769 err |= sym_regtest (np);
6770 if (err) return (err);
6774 * Enable Master Parity Checking as we intend
6775 * to enable it for normal operations.
6777 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6781 pc = SCRIPTB0_BA (np, snooptest);
6785 * Set memory and register.
6787 np->cache = cpu_to_scr(host_wr);
6788 OUTL (nc_temp, sym_wr);
6790 * Start script (exchange values)
6792 OUTL (nc_dsa, np->hcb_ba);
6795 * Wait 'til done (with timeout)
6797 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6798 if (INB(nc_istat) & (INTF|SIP|DIP))
6800 if (i>=SYM_SNOOP_TIMEOUT) {
6801 printf ("CACHE TEST FAILED: timeout.\n");
6805 * Check for fatal DMA errors.
6807 dstat = INB (nc_dstat);
6808 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6809 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6810 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6811 "DISABLING MASTER DATA PARITY CHECKING.\n",
6813 np->rv_ctest4 &= ~MPEE;
6817 if (dstat & (MDPE|BF|IID)) {
6818 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6822 * Save termination position.
6826 * Read memory and register.
6828 host_rd = scr_to_cpu(np->cache);
6829 sym_rd = INL (nc_scratcha);
6830 sym_bk = INL (nc_temp);
6833 * Check termination position.
6835 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6836 printf ("CACHE TEST FAILED: script execution failed.\n");
6837 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6838 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6839 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6845 if (host_wr != sym_rd) {
6846 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6847 (int) host_wr, (int) sym_rd);
6850 if (host_rd != sym_wr) {
6851 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6852 (int) sym_wr, (int) host_rd);
6855 if (sym_bk != sym_wr) {
6856 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6857 (int) sym_wr, (int) sym_bk);
6865 * Determine the chip's clock frequency.
6867 * This is essential for the negotiation of the synchronous
6870 * Note: we have to return the correct value.
6871 * THERE IS NO SAFE DEFAULT VALUE.
6873 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6874 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6875 * do not have a clock doubler and so are provided with a
6876 * 80 MHz clock. All other fast20 boards incorporate a doubler
6877 * and so should be delivered with a 40 MHz clock.
6878 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6879 * clock and provide a clock quadrupler (160 Mhz).
6883 * Select SCSI clock frequency
6885 static void sym_selectclock(hcb_p np, u_char scntl3)
6888 * If multiplier not present or not selected, leave here.
6890 if (np->multiplier <= 1) {
6891 OUTB(nc_scntl3, scntl3);
6895 if (sym_verbose >= 2)
6896 printf ("%s: enabling clock multiplier\n", sym_name(np));
6898 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6900 * Wait for the LCKFRQ bit to be set if supported by the chip.
6901 * Otherwise wait 20 micro-seconds.
6903 if (np->features & FE_LCKFRQ) {
6905 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6908 printf("%s: the chip cannot lock the frequency\n",
6912 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6913 OUTB(nc_scntl3, scntl3);
6914 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6915 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6919 * calculate SCSI clock frequency (in KHz)
6921 static unsigned getfreq (hcb_p np, int gen)
6923 unsigned int ms = 0;
6927 * Measure GEN timer delay in order
6928 * to calculate SCSI clock frequency
6930 * This code will never execute too
6931 * many loop iterations (if DELAY is
6932 * reasonably correct). It could get
6933 * too low a delay (too high a freq.)
6934 * if the CPU is slow executing the
6935 * loop for some reason (an NMI, for
6936 * example). For this reason we will
6937 * if multiple measurements are to be
6938 * performed trust the higher delay
6939 * (lower frequency returned).
6941 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6942 (void) INW (nc_sist); /* clear pending scsi interrupt */
6943 OUTB (nc_dien , 0); /* mask all dma interrupts */
6944 (void) INW (nc_sist); /* another one, just to be sure :) */
6945 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6946 OUTB (nc_stime1, 0); /* disable general purpose timer */
6947 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6948 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6949 UDELAY (1000); /* count ms */
6950 OUTB (nc_stime1, 0); /* disable general purpose timer */
6952 * set prescaler to divide by whatever 0 means
6953 * 0 ought to choose divide by 2, but appears
6954 * to set divide by 3.5 mode in my 53c810 ...
6956 OUTB (nc_scntl3, 0);
6959 * adjust for prescaler, and convert into KHz
6961 f = ms ? ((1 << gen) * 4340) / ms : 0;
6963 if (sym_verbose >= 2)
6964 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
6965 sym_name(np), gen, ms, f);
6970 static unsigned sym_getfreq (hcb_p np)
6975 (void) getfreq (np, gen); /* throw away first result */
6976 f1 = getfreq (np, gen);
6977 f2 = getfreq (np, gen);
6978 if (f1 > f2) f1 = f2; /* trust lower result */
6983 * Get/probe chip SCSI clock frequency
6985 static void sym_getclock (hcb_p np, int mult)
6987 unsigned char scntl3 = np->sv_scntl3;
6988 unsigned char stest1 = np->sv_stest1;
6992 * For the C10 core, assume 40 MHz.
6994 if (np->features & FE_C10) {
6995 np->multiplier = mult;
6996 np->clock_khz = 40000 * mult;
7003 * True with 875/895/896/895A with clock multiplier selected
7005 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7006 if (sym_verbose >= 2)
7007 printf ("%s: clock multiplier found\n", sym_name(np));
7008 np->multiplier = mult;
7012 * If multiplier not found or scntl3 not 7,5,3,
7013 * reset chip and get frequency from general purpose timer.
7014 * Otherwise trust scntl3 BIOS setting.
7016 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7017 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
7018 f1 = sym_getfreq (np);
7021 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7023 if (f1 < 45000) f1 = 40000;
7024 else if (f1 < 55000) f1 = 50000;
7027 if (f1 < 80000 && mult > 1) {
7028 if (sym_verbose >= 2)
7029 printf ("%s: clock multiplier assumed\n",
7031 np->multiplier = mult;
7034 if ((scntl3 & 7) == 3) f1 = 40000;
7035 else if ((scntl3 & 7) == 5) f1 = 80000;
7038 f1 /= np->multiplier;
7042 * Compute controller synchronous parameters.
7044 f1 *= np->multiplier;
7049 * Get/probe PCI clock frequency
7051 static int sym_getpciclock (hcb_p np)
7056 * For the C1010-33, this doesn't work.
7057 * For the C1010-66, this will be tested when I'll have
7058 * such a beast to play with.
7060 if (!(np->features & FE_C10)) {
7061 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7062 f = (int) sym_getfreq (np);
7063 OUTB (nc_stest1, 0);
7070 /*============= DRIVER ACTION/COMPLETION ====================*/
7073 * Print something that tells about extended errors.
7075 static void sym_print_xerr(ccb_p cp, int x_status)
7077 if (x_status & XE_PARITY_ERR) {
7079 printf ("unrecovered SCSI parity error.\n");
7081 if (x_status & XE_EXTRA_DATA) {
7083 printf ("extraneous data discarded.\n");
7085 if (x_status & XE_BAD_PHASE) {
7087 printf ("illegal scsi phase (4/5).\n");
7089 if (x_status & XE_SODL_UNRUN) {
7091 printf ("ODD transfer in DATA OUT phase.\n");
7093 if (x_status & XE_SWIDE_OVRUN) {
7095 printf ("ODD transfer in DATA IN phase.\n");
7100 * Choose the more appropriate CAM status if
7101 * the IO encountered an extended error.
7103 static int sym_xerr_cam_status(int cam_status, int x_status)
7106 if (x_status & XE_PARITY_ERR)
7107 cam_status = CAM_UNCOR_PARITY;
7108 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7109 cam_status = CAM_DATA_RUN_ERR;
7110 else if (x_status & XE_BAD_PHASE)
7111 cam_status = CAM_REQ_CMP_ERR;
7113 cam_status = CAM_REQ_CMP_ERR;
7119 * Complete execution of a SCSI command with extented
7120 * error, SCSI status error, or having been auto-sensed.
7122 * The SCRIPTS processor is not running there, so we
7123 * can safely access IO registers and remove JOBs from
7125 * SCRATCHA is assumed to have been loaded with STARTPOS
7126 * before the SCRIPTS called the C code.
7128 static void sym_complete_error (hcb_p np, ccb_p cp)
7130 struct ccb_scsiio *csio;
7132 int i, sense_returned;
7134 SYM_LOCK_ASSERT(MA_OWNED);
7137 * Paranoid check. :)
7139 if (!cp || !cp->cam_ccb)
7142 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7143 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7144 cp->host_status, cp->ssss_status, cp->host_flags,
7145 cp->target, cp->lun);
7150 * Get CAM command pointer.
7152 csio = &cp->cam_ccb->csio;
7155 * Check for extended errors.
7157 if (cp->xerr_status) {
7159 sym_print_xerr(cp, cp->xerr_status);
7160 if (cp->host_status == HS_COMPLETE)
7161 cp->host_status = HS_COMP_ERR;
7165 * Calculate the residual.
7167 csio->sense_resid = 0;
7168 csio->resid = sym_compute_residual(np, cp);
7170 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7171 csio->resid = 0; /* throw them away. :) */
7175 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7176 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7177 csio->sense_resid = csio->resid; /* Swap residuals */
7178 csio->resid = cp->sv_resid;
7180 if (sym_verbose && cp->sv_xerr_status)
7181 sym_print_xerr(cp, cp->sv_xerr_status);
7182 if (cp->host_status == HS_COMPLETE &&
7183 cp->ssss_status == S_GOOD &&
7184 cp->xerr_status == 0) {
7185 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7186 cp->sv_xerr_status);
7187 cam_status |= CAM_AUTOSNS_VALID;
7189 * Bounce back the sense data to user and
7192 bzero(&csio->sense_data, sizeof(csio->sense_data));
7193 sense_returned = SYM_SNS_BBUF_LEN - csio->sense_resid;
7194 if (sense_returned < csio->sense_len)
7195 csio->sense_resid = csio->sense_len -
7198 csio->sense_resid = 0;
7199 bcopy(cp->sns_bbuf, &csio->sense_data,
7200 MIN(csio->sense_len, sense_returned));
7203 * If the device reports a UNIT ATTENTION condition
7204 * due to a RESET condition, we should consider all
7205 * disconnect CCBs for this unit as aborted.
7209 p = (u_char *) csio->sense_data;
7210 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7211 sym_clear_tasks(np, CAM_REQ_ABORTED,
7212 cp->target,cp->lun, -1);
7217 cam_status = CAM_AUTOSENSE_FAIL;
7219 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7220 csio->scsi_status = cp->ssss_status;
7221 cam_status = CAM_SCSI_STATUS_ERROR;
7223 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7224 cam_status = CAM_SEL_TIMEOUT;
7225 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7226 cam_status = CAM_UNEXP_BUSFREE;
7227 else { /* Extended error */
7230 printf ("COMMAND FAILED (%x %x %x).\n",
7231 cp->host_status, cp->ssss_status,
7234 csio->scsi_status = cp->ssss_status;
7236 * Set the most appropriate value for CAM status.
7238 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7243 * Dequeue all queued CCBs for that device
7244 * not yet started by SCRIPTS.
7246 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7247 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7250 * Restart the SCRIPTS processor.
7252 OUTL_DSP (SCRIPTA_BA (np, start));
7255 * Synchronize DMA map if needed.
7257 if (cp->dmamapped) {
7258 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7259 (cp->dmamapped == SYM_DMA_READ ?
7260 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7263 * Add this one to the COMP queue.
7264 * Complete all those commands with either error
7265 * or requeue condition.
7267 sym_set_cam_status((union ccb *) csio, cam_status);
7268 sym_remque(&cp->link_ccbq);
7269 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7270 sym_flush_comp_queue(np, 0);
7274 * Complete execution of a successful SCSI command.
7276 * Only successful commands go to the DONE queue,
7277 * since we need to have the SCRIPTS processor
7278 * stopped on any error condition.
7279 * The SCRIPTS processor is running while we are
7280 * completing successful commands.
7282 static void sym_complete_ok (hcb_p np, ccb_p cp)
7284 struct ccb_scsiio *csio;
7288 SYM_LOCK_ASSERT(MA_OWNED);
7291 * Paranoid check. :)
7293 if (!cp || !cp->cam_ccb)
7295 assert (cp->host_status == HS_COMPLETE);
7298 * Get command, target and lun pointers.
7300 csio = &cp->cam_ccb->csio;
7301 tp = &np->target[cp->target];
7302 lp = sym_lp(np, tp, cp->lun);
7305 * Assume device discovered on first success.
7308 sym_set_bit(tp->lun_map, cp->lun);
7311 * If all data have been transferred, given than no
7312 * extended error did occur, there is no residual.
7315 if (cp->phys.head.lastp != cp->phys.head.goalp)
7316 csio->resid = sym_compute_residual(np, cp);
7319 * Wrong transfer residuals may be worse than just always
7320 * returning zero. User can disable this feature from
7321 * sym_conf.h. Residual support is enabled by default.
7323 if (!SYM_CONF_RESIDUAL_SUPPORT)
7327 * Synchronize DMA map if needed.
7329 if (cp->dmamapped) {
7330 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7331 (cp->dmamapped == SYM_DMA_READ ?
7332 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7335 * Set status and complete the command.
7337 csio->scsi_status = cp->ssss_status;
7338 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7339 sym_xpt_done(np, (union ccb *) csio, cp);
7340 sym_free_ccb(np, cp);
7344 * Our callout handler
7346 static void sym_callout(void *arg)
7348 union ccb *ccb = (union ccb *) arg;
7349 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7352 * Check that the CAM CCB is still queued.
7359 switch(ccb->ccb_h.func_code) {
7361 (void) sym_abort_scsiio(np, ccb, 1);
7373 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7378 SYM_LOCK_ASSERT(MA_OWNED);
7381 * Look up our CCB control block.
7384 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7385 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7386 if (cp2->cam_ccb == ccb) {
7391 if (!cp || cp->host_status == HS_WAIT)
7395 * If a previous abort didn't succeed in time,
7396 * perform a BUS reset.
7399 sym_reset_scsi_bus(np, 1);
7404 * Mark the CCB for abort and allow time for.
7406 cp->to_abort = timed_out ? 2 : 1;
7407 callout_reset(&cp->ch, 10 * hz, sym_callout, (caddr_t) ccb);
7410 * Tell the SCRIPTS processor to stop and synchronize with us.
7412 np->istat_sem = SEM;
7413 OUTB (nc_istat, SIGP|SEM);
7418 * Reset a SCSI device (all LUNs of a target).
7420 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7423 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7425 SYM_LOCK_ASSERT(MA_OWNED);
7427 if (ccb_h->target_id == np->myaddr ||
7428 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7429 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7430 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7434 tp = &np->target[ccb_h->target_id];
7437 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7439 np->istat_sem = SEM;
7440 OUTB (nc_istat, SIGP|SEM);
7444 * SIM action entry point.
7446 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7453 u_char idmsg, *msgptr;
7455 struct ccb_scsiio *csio;
7456 struct ccb_hdr *ccb_h;
7458 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7461 * Retrieve our controller data structure.
7463 np = (hcb_p) cam_sim_softc(sim);
7465 SYM_LOCK_ASSERT(MA_OWNED);
7468 * The common case is SCSI IO.
7469 * We deal with other ones elsewhere.
7471 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7472 sym_action2(sim, ccb);
7476 ccb_h = &csio->ccb_h;
7479 * Work around races.
7481 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7487 * Minimal checkings, so that we will not
7488 * go outside our tables.
7490 if (ccb_h->target_id == np->myaddr ||
7491 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7492 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7493 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7498 * Retrieve the target and lun descriptors.
7500 tp = &np->target[ccb_h->target_id];
7501 lp = sym_lp(np, tp, ccb_h->target_lun);
7504 * Complete the 1st INQUIRY command with error
7505 * condition if the device is flagged NOSCAN
7506 * at BOOT in the NVRAM. This may speed up
7507 * the boot and maintain coherency with BIOS
7508 * device numbering. Clearing the flag allows
7509 * user to rescan skipped devices later.
7510 * We also return error for devices not flagged
7511 * for SCAN LUNS in the NVRAM since some mono-lun
7512 * devices behave badly when asked for some non
7513 * zero LUN. Btw, this is an absolute hack.:-)
7515 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7516 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7517 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7518 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7519 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7520 ccb_h->target_lun != 0)) {
7521 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7522 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7528 * Get a control block for this IO.
7530 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7531 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7533 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7538 * Keep track of the IO in our CCB.
7543 * Build the IDENTIFY message.
7545 idmsg = M_IDENTIFY | cp->lun;
7546 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7549 msgptr = cp->scsi_smsg;
7551 msgptr[msglen++] = idmsg;
7554 * Build the tag message if present.
7556 if (cp->tag != NO_TAG) {
7557 u_char order = csio->tag_action;
7565 order = M_SIMPLE_TAG;
7567 msgptr[msglen++] = order;
7570 * For less than 128 tags, actual tags are numbered
7571 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7572 * with devices that have problems with #TAG 0 or too
7573 * great #TAG numbers. For more tags (up to 256),
7574 * we use directly our tag number.
7576 #if SYM_CONF_MAX_TASK > (512/4)
7577 msgptr[msglen++] = cp->tag;
7579 msgptr[msglen++] = (cp->tag << 1) + 1;
7584 * Build a negotiation message if needed.
7585 * (nego_status is filled by sym_prepare_nego())
7587 cp->nego_status = 0;
7588 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7589 tp->tinfo.current.period != tp->tinfo.goal.period ||
7590 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7591 tp->tinfo.current.options != tp->tinfo.goal.options) {
7592 if (!tp->nego_cp && lp)
7593 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7603 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7604 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7609 cp->phys.select.sel_id = cp->target;
7610 cp->phys.select.sel_scntl3 = tp->head.wval;
7611 cp->phys.select.sel_sxfer = tp->head.sval;
7612 cp->phys.select.sel_scntl4 = tp->head.uval;
7617 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7618 cp->phys.smsg.size = cpu_to_scr(msglen);
7623 if (sym_setup_cdb(np, csio, cp) < 0) {
7624 sym_xpt_done(np, ccb, cp);
7625 sym_free_ccb(np, cp);
7632 #if 0 /* Provision */
7633 cp->actualquirks = tp->quirks;
7635 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7636 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7637 cp->ssss_status = S_ILLEGAL;
7638 cp->xerr_status = 0;
7640 cp->extra_bytes = 0;
7643 * extreme data pointer.
7644 * shall be positive, so -1 is lower than lowest.:)
7650 * Build the data descriptor block
7653 sym_setup_data_and_start(np, csio, cp);
7657 * Setup buffers and pointers that address the CDB.
7658 * I bet, physical CDBs will never be used on the planet,
7659 * since they can be bounced without significant overhead.
7661 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7663 struct ccb_hdr *ccb_h;
7667 SYM_LOCK_ASSERT(MA_OWNED);
7669 ccb_h = &csio->ccb_h;
7672 * CDB is 16 bytes max.
7674 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7675 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7678 cmd_len = csio->cdb_len;
7680 if (ccb_h->flags & CAM_CDB_POINTER) {
7681 /* CDB is a pointer */
7682 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7683 /* CDB pointer is virtual */
7684 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7685 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7687 /* CDB pointer is physical */
7689 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7691 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7696 /* CDB is in the CAM ccb (buffer) */
7697 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7698 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7701 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7702 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7708 * Set up data pointers used by SCRIPTS.
7710 static void __inline
7711 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7715 SYM_LOCK_ASSERT(MA_OWNED);
7718 * No segments means no data.
7724 * Set the data pointer.
7728 goalp = SCRIPTA_BA (np, data_out2) + 8;
7729 lastp = goalp - 8 - (cp->segments * (2*4));
7732 cp->host_flags |= HF_DATA_IN;
7733 goalp = SCRIPTA_BA (np, data_in2) + 8;
7734 lastp = goalp - 8 - (cp->segments * (2*4));
7738 lastp = goalp = SCRIPTB_BA (np, no_data);
7742 cp->phys.head.lastp = cpu_to_scr(lastp);
7743 cp->phys.head.goalp = cpu_to_scr(goalp);
7744 cp->phys.head.savep = cpu_to_scr(lastp);
7745 cp->startp = cp->phys.head.savep;
7749 * Call back routine for the DMA map service.
7750 * If bounce buffers are used (why ?), we may sleep and then
7751 * be called there in another context.
7754 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7762 np = (hcb_p) cp->arg;
7764 SYM_LOCK_ASSERT(MA_OWNED);
7767 * Deal with weird races.
7769 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7773 * Deal with weird errors.
7777 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7782 * Build the data descriptor for the chip.
7786 /* 896 rev 1 requires to be careful about boundaries */
7787 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7788 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7790 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7792 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7798 * Synchronize the DMA map only if we have
7799 * actually mapped the data.
7801 if (cp->dmamapped) {
7802 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7803 (cp->dmamapped == SYM_DMA_READ ?
7804 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7808 * Set host status to busy state.
7809 * May have been set back to HS_WAIT to avoid a race.
7811 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7814 * Set data pointers.
7816 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7819 * Enqueue this IO in our pending queue.
7821 sym_enqueue_cam_ccb(cp);
7824 * When `#ifed 1', the code below makes the driver
7825 * panic on the first attempt to write to a SCSI device.
7826 * It is the first test we want to do after a driver
7827 * change that does not seem obviously safe. :)
7830 switch (cp->cdb_buf[0]) {
7831 case 0x0A: case 0x2A: case 0xAA:
7832 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7840 * Activate this job.
7842 sym_put_start_queue(np, cp);
7845 sym_xpt_done(np, ccb, cp);
7846 sym_free_ccb(np, cp);
7850 * How complex it gets to deal with the data in CAM.
7851 * The Bus Dma stuff makes things still more complex.
7854 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7856 struct ccb_hdr *ccb_h;
7859 SYM_LOCK_ASSERT(MA_OWNED);
7861 ccb_h = &csio->ccb_h;
7864 * Now deal with the data.
7866 cp->data_len = csio->dxfer_len;
7870 * No direction means no data.
7872 dir = (ccb_h->flags & CAM_DIR_MASK);
7873 if (dir == CAM_DIR_NONE) {
7874 sym_execute_ccb(cp, NULL, 0, 0);
7878 if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
7880 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
7881 /* Buffer is virtual */
7882 cp->dmamapped = (dir == CAM_DIR_IN) ?
7883 SYM_DMA_READ : SYM_DMA_WRITE;
7884 retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
7885 csio->data_ptr, csio->dxfer_len,
7886 sym_execute_ccb, cp, 0);
7887 if (retv == EINPROGRESS) {
7888 cp->host_status = HS_WAIT;
7889 xpt_freeze_simq(np->sim, 1);
7890 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7893 /* Buffer is physical */
7894 struct bus_dma_segment seg;
7896 seg.ds_addr = (bus_addr_t) csio->data_ptr;
7897 sym_execute_ccb(cp, &seg, 1, 0);
7900 /* Scatter/gather list */
7901 struct bus_dma_segment *segs;
7903 if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
7904 /* The SG list pointer is physical */
7905 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7909 if (!(ccb_h->flags & CAM_DATA_PHYS)) {
7910 /* SG buffer pointers are virtual */
7911 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7915 /* SG buffer pointers are physical */
7916 segs = (struct bus_dma_segment *)csio->data_ptr;
7917 sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
7921 sym_xpt_done(np, (union ccb *) csio, cp);
7922 sym_free_ccb(np, cp);
7926 * Move the scatter list to our data block.
7929 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7930 bus_dma_segment_t *psegs, int nsegs)
7932 struct sym_tblmove *data;
7933 bus_dma_segment_t *psegs2;
7935 SYM_LOCK_ASSERT(MA_OWNED);
7937 if (nsegs > SYM_CONF_MAX_SG)
7940 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7941 psegs2 = &psegs[nsegs-1];
7942 cp->segments = nsegs;
7945 data->addr = cpu_to_scr(psegs2->ds_addr);
7946 data->size = cpu_to_scr(psegs2->ds_len);
7947 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7948 printf ("%s scatter: paddr=%lx len=%ld\n",
7949 sym_name(np), (long) psegs2->ds_addr,
7950 (long) psegs2->ds_len);
7952 if (psegs2 != psegs) {
7963 * Scatter a SG list with physical addresses into bus addressable chunks.
7966 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
7972 SYM_LOCK_ASSERT(MA_OWNED);
7974 s = SYM_CONF_MAX_SG - 1;
7976 ps = psegs[t].ds_addr;
7977 pe = ps + psegs[t].ds_len;
7980 pn = (pe - 1) & ~(SYM_CONF_DMA_BOUNDARY - 1);
7984 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7985 printf ("%s scatter: paddr=%lx len=%ld\n",
7986 sym_name(np), pn, k);
7988 cp->phys.data[s].addr = cpu_to_scr(pn);
7989 cp->phys.data[s].size = cpu_to_scr(k);
7994 ps = psegs[t].ds_addr;
7995 pe = ps + psegs[t].ds_len;
8001 cp->segments = SYM_CONF_MAX_SG - 1 - s;
8003 return t >= 0 ? -1 : 0;
8007 * SIM action for non performance critical stuff.
8009 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8011 union ccb *abort_ccb;
8012 struct ccb_hdr *ccb_h;
8013 struct ccb_pathinq *cpi;
8014 struct ccb_trans_settings *cts;
8015 struct sym_trans *tip;
8022 * Retrieve our controller data structure.
8024 np = (hcb_p) cam_sim_softc(sim);
8026 SYM_LOCK_ASSERT(MA_OWNED);
8028 ccb_h = &ccb->ccb_h;
8030 switch (ccb_h->func_code) {
8031 case XPT_SET_TRAN_SETTINGS:
8033 tp = &np->target[ccb_h->target_id];
8036 * Update SPI transport settings in TARGET control block.
8037 * Update SCSI device settings in LUN control block.
8039 lp = sym_lp(np, tp, ccb_h->target_lun);
8040 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8041 sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8043 sym_update_dflags(np, &lp->current_flags, cts);
8045 if (cts->type == CTS_TYPE_USER_SETTINGS) {
8046 sym_update_trans(np, tp, &tp->tinfo.user, cts);
8048 sym_update_dflags(np, &lp->user_flags, cts);
8051 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8053 case XPT_GET_TRAN_SETTINGS:
8055 tp = &np->target[ccb_h->target_id];
8056 lp = sym_lp(np, tp, ccb_h->target_lun);
8058 #define cts__scsi (&cts->proto_specific.scsi)
8059 #define cts__spi (&cts->xport_specific.spi)
8060 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8061 tip = &tp->tinfo.current;
8062 dflags = lp ? lp->current_flags : 0;
8065 tip = &tp->tinfo.user;
8066 dflags = lp ? lp->user_flags : tp->usrflags;
8069 cts->protocol = PROTO_SCSI;
8070 cts->transport = XPORT_SPI;
8071 cts->protocol_version = tip->scsi_version;
8072 cts->transport_version = tip->spi_version;
8074 cts__spi->sync_period = tip->period;
8075 cts__spi->sync_offset = tip->offset;
8076 cts__spi->bus_width = tip->width;
8077 cts__spi->ppr_options = tip->options;
8079 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8080 | CTS_SPI_VALID_SYNC_OFFSET
8081 | CTS_SPI_VALID_BUS_WIDTH
8082 | CTS_SPI_VALID_PPR_OPTIONS;
8084 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8085 if (dflags & SYM_DISC_ENABLED)
8086 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8087 cts__spi->valid |= CTS_SPI_VALID_DISC;
8089 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8090 if (dflags & SYM_TAGS_ENABLED)
8091 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8092 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8095 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8097 case XPT_CALC_GEOMETRY:
8098 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8099 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8103 cpi->version_num = 1;
8104 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8105 if ((np->features & FE_WIDE) != 0)
8106 cpi->hba_inquiry |= PI_WIDE_16;
8107 cpi->target_sprt = 0;
8109 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8110 cpi->hba_misc |= PIM_SCANHILO;
8111 if (np->usrflags & SYM_AVOID_BUS_RESET)
8112 cpi->hba_misc |= PIM_NOBUSRESET;
8113 cpi->hba_eng_cnt = 0;
8114 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8115 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8116 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8117 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8118 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8119 cpi->bus_id = cam_sim_bus(sim);
8120 cpi->initiator_id = np->myaddr;
8121 cpi->base_transfer_speed = 3300;
8122 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8123 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8124 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8125 cpi->unit_number = cam_sim_unit(sim);
8127 cpi->protocol = PROTO_SCSI;
8128 cpi->protocol_version = SCSI_REV_2;
8129 cpi->transport = XPORT_SPI;
8130 cpi->transport_version = 2;
8131 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8132 if (np->features & FE_ULTRA3) {
8133 cpi->transport_version = 3;
8134 cpi->xport_specific.spi.ppr_options =
8135 SID_SPI_CLOCK_DT_ST;
8137 cpi->maxio = SYM_CONF_MAX_SG * PAGE_SIZE;
8138 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8141 abort_ccb = ccb->cab.abort_ccb;
8142 switch(abort_ccb->ccb_h.func_code) {
8144 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8145 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8149 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8154 sym_reset_dev(np, ccb);
8157 sym_reset_scsi_bus(np, 0);
8159 xpt_print_path(np->path);
8160 printf("SCSI BUS reset delivered.\n");
8163 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8165 case XPT_ACCEPT_TARGET_IO:
8166 case XPT_CONT_TARGET_IO:
8168 case XPT_NOTIFY_ACK:
8169 case XPT_IMMED_NOTIFY:
8172 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8178 * Asynchronous notification handler.
8181 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8184 struct cam_sim *sim;
8188 sim = (struct cam_sim *) cb_arg;
8189 np = (hcb_p) cam_sim_softc(sim);
8191 SYM_LOCK_ASSERT(MA_OWNED);
8194 case AC_LOST_DEVICE:
8195 tn = xpt_path_target_id(path);
8196 if (tn >= SYM_CONF_MAX_TARGET)
8199 tp = &np->target[tn];
8203 tp->head.wval = np->rv_scntl3;
8206 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8207 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8208 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8209 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8218 * Update transfer settings of a target.
8220 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8221 struct ccb_trans_settings *cts)
8223 SYM_LOCK_ASSERT(MA_OWNED);
8228 #define cts__spi (&cts->xport_specific.spi)
8229 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8230 tip->width = cts__spi->bus_width;
8231 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8232 tip->offset = cts__spi->sync_offset;
8233 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8234 tip->period = cts__spi->sync_period;
8235 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8236 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8237 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8238 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8239 tip->scsi_version = cts->protocol_version;
8240 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8241 cts->transport_version != XPORT_VERSION_UNKNOWN)
8242 tip->spi_version = cts->transport_version;
8245 * Scale against driver configuration limits.
8247 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8248 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8249 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8252 * Scale against actual controller BUS width.
8254 if (tip->width > np->maxwide)
8255 tip->width = np->maxwide;
8258 * Only accept DT if controller supports and SYNC/WIDE asked.
8260 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8261 !(tip->width == BUS_16_BIT && tip->offset)) {
8262 tip->options &= ~PPR_OPT_DT;
8266 * Scale period factor and offset against controller limits.
8268 if (tip->options & PPR_OPT_DT) {
8269 if (tip->period < np->minsync_dt)
8270 tip->period = np->minsync_dt;
8271 if (tip->period > np->maxsync_dt)
8272 tip->period = np->maxsync_dt;
8273 if (tip->offset > np->maxoffs_dt)
8274 tip->offset = np->maxoffs_dt;
8277 if (tip->period < np->minsync)
8278 tip->period = np->minsync;
8279 if (tip->period > np->maxsync)
8280 tip->period = np->maxsync;
8281 if (tip->offset > np->maxoffs)
8282 tip->offset = np->maxoffs;
8287 * Update flags for a device (logical unit).
8290 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8292 SYM_LOCK_ASSERT(MA_OWNED);
8294 #define cts__scsi (&cts->proto_specific.scsi)
8295 #define cts__spi (&cts->xport_specific.spi)
8296 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8297 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8298 *flags |= SYM_DISC_ENABLED;
8300 *flags &= ~SYM_DISC_ENABLED;
8303 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8304 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8305 *flags |= SYM_TAGS_ENABLED;
8307 *flags &= ~SYM_TAGS_ENABLED;
8313 /*============= DRIVER INITIALISATION ==================*/
8315 static device_method_t sym_pci_methods[] = {
8316 DEVMETHOD(device_probe, sym_pci_probe),
8317 DEVMETHOD(device_attach, sym_pci_attach),
8321 static driver_t sym_pci_driver = {
8327 static devclass_t sym_devclass;
8329 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, NULL, NULL);
8330 MODULE_DEPEND(sym, cam, 1, 1, 1);
8331 MODULE_DEPEND(sym, pci, 1, 1, 1);
8333 static const struct sym_pci_chip sym_pci_dev_table[] = {
8334 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8337 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8338 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8342 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8343 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8346 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8349 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8350 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8352 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8353 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8355 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8356 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8358 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8359 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8362 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8363 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8366 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8367 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8370 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8371 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8374 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8375 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8376 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8380 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8381 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8385 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8386 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8387 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8389 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8390 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8391 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8393 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8394 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8395 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8398 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8399 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8400 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8403 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8404 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8405 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8408 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8409 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8410 FE_RAM|FE_IO256|FE_LEDC}
8414 * Look up the chip table.
8416 * Return a pointer to the chip entry if found,
8419 static const struct sym_pci_chip *
8420 sym_find_pci_chip(device_t dev)
8422 const struct sym_pci_chip *chip;
8427 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8430 device_id = pci_get_device(dev);
8431 revision = pci_get_revid(dev);
8433 for (i = 0; i < nitems(sym_pci_dev_table); i++) {
8434 chip = &sym_pci_dev_table[i];
8435 if (device_id != chip->device_id)
8437 if (revision > chip->revision_id)
8446 * Tell upper layer if the chip is supported.
8449 sym_pci_probe(device_t dev)
8451 const struct sym_pci_chip *chip;
8453 chip = sym_find_pci_chip(dev);
8454 if (chip && sym_find_firmware(chip)) {
8455 device_set_desc(dev, chip->name);
8456 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8457 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8463 * Attach a sym53c8xx device.
8466 sym_pci_attach(device_t dev)
8468 const struct sym_pci_chip *chip;
8471 struct sym_hcb *np = NULL;
8472 struct sym_nvram nvram;
8473 const struct sym_fw *fw = NULL;
8475 bus_dma_tag_t bus_dmat;
8477 bus_dmat = bus_get_dma_tag(dev);
8480 * Only probed devices should be attached.
8481 * We just enjoy being paranoid. :)
8483 chip = sym_find_pci_chip(dev);
8484 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8488 * Allocate immediately the host control block,
8489 * since we are only expecting to succeed. :)
8490 * We keep track in the HCB of all the resources that
8491 * are to be released on error.
8493 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8495 np->bus_dmat = bus_dmat;
8498 device_set_softc(dev, np);
8503 * Copy some useful infos to the HCB.
8505 np->hcb_ba = vtobus(np);
8506 np->verbose = bootverbose;
8508 np->device_id = pci_get_device(dev);
8509 np->revision_id = pci_get_revid(dev);
8510 np->features = chip->features;
8511 np->clock_divn = chip->nr_divisor;
8512 np->maxoffs = chip->offset_max;
8513 np->maxburst = chip->burst_max;
8514 np->scripta_sz = fw->a_size;
8515 np->scriptb_sz = fw->b_size;
8516 np->fw_setup = fw->setup;
8517 np->fw_patch = fw->patch;
8518 np->fw_name = fw->name;
8521 np->target = sym_calloc_dma(SYM_CONF_MAX_TARGET * sizeof(*(np->target)),
8528 * Initialize the CCB free and busy queues.
8530 sym_que_init(&np->free_ccbq);
8531 sym_que_init(&np->busy_ccbq);
8532 sym_que_init(&np->comp_ccbq);
8533 sym_que_init(&np->cam_ccbq);
8536 * Allocate a tag for the DMA of user data.
8538 if (bus_dma_tag_create(np->bus_dmat, 1, SYM_CONF_DMA_BOUNDARY,
8539 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
8540 BUS_SPACE_MAXSIZE_32BIT, SYM_CONF_MAX_SG, SYM_CONF_DMA_BOUNDARY,
8541 0, busdma_lock_mutex, &np->mtx, &np->data_dmat)) {
8542 device_printf(dev, "failed to create DMA tag.\n");
8547 * Read and apply some fix-ups to the PCI COMMAND
8548 * register. We want the chip to be enabled for:
8550 * - PCI parity checking (reporting would also be fine)
8551 * - Write And Invalidate.
8553 command = pci_read_config(dev, PCIR_COMMAND, 2);
8554 command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_PERRESPEN |
8556 pci_write_config(dev, PCIR_COMMAND, command, 2);
8559 * Let the device know about the cache line size,
8560 * if it doesn't yet.
8562 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8565 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8569 * Alloc/get/map/retrieve everything that deals with MMIO.
8571 if ((command & PCIM_CMD_MEMEN) != 0) {
8572 int regs_id = SYM_PCI_MMIO;
8573 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8574 ®s_id, RF_ACTIVE);
8576 if (!np->mmio_res) {
8577 device_printf(dev, "failed to allocate MMIO resources\n");
8580 np->mmio_ba = rman_get_start(np->mmio_res);
8586 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8587 RF_ACTIVE | RF_SHAREABLE);
8589 device_printf(dev, "failed to allocate IRQ resource\n");
8593 #ifdef SYM_CONF_IOMAPPED
8595 * User want us to use normal IO with PCI.
8596 * Alloc/get/map/retrieve everything that deals with IO.
8598 if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
8599 int regs_id = SYM_PCI_IO;
8600 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
8601 ®s_id, RF_ACTIVE);
8604 device_printf(dev, "failed to allocate IO resources\n");
8608 #endif /* SYM_CONF_IOMAPPED */
8611 * If the chip has RAM.
8612 * Alloc/get/map/retrieve the corresponding resources.
8614 if ((np->features & (FE_RAM|FE_RAM8K)) &&
8615 (command & PCIM_CMD_MEMEN) != 0) {
8616 int regs_id = SYM_PCI_RAM;
8617 if (np->features & FE_64BIT)
8618 regs_id = SYM_PCI_RAM64;
8619 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8620 ®s_id, RF_ACTIVE);
8622 device_printf(dev,"failed to allocate RAM resources\n");
8625 np->ram_id = regs_id;
8626 np->ram_ba = rman_get_start(np->ram_res);
8630 * Save setting of some IO registers, so we will
8631 * be able to probe specific implementations.
8633 sym_save_initial_setting (np);
8636 * Reset the chip now, since it has been reported
8637 * that SCSI clock calibration may not work properly
8638 * if the chip is currently active.
8640 sym_chip_reset (np);
8643 * Try to read the user set-up.
8645 (void) sym_read_nvram(np, &nvram);
8648 * Prepare controller and devices settings, according
8649 * to chip features, user set-up and driver set-up.
8651 (void) sym_prepare_setting(np, &nvram);
8654 * Check the PCI clock frequency.
8655 * Must be performed after prepare_setting since it destroys
8656 * STEST1 that is used to probe for the clock doubler.
8658 i = sym_getpciclock(np);
8660 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8663 * Allocate the start queue.
8665 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8668 np->squeue_ba = vtobus(np->squeue);
8671 * Allocate the done queue.
8673 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8676 np->dqueue_ba = vtobus(np->dqueue);
8679 * Allocate the target bus address array.
8681 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8684 np->targtbl_ba = vtobus(np->targtbl);
8687 * Allocate SCRIPTS areas.
8689 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8690 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8691 if (!np->scripta0 || !np->scriptb0)
8695 * Allocate the CCBs. We need at least ONE.
8697 for (i = 0; sym_alloc_ccb(np) != NULL; i++)
8703 * Calculate BUS addresses where we are going
8704 * to load the SCRIPTS.
8706 np->scripta_ba = vtobus(np->scripta0);
8707 np->scriptb_ba = vtobus(np->scriptb0);
8708 np->scriptb0_ba = np->scriptb_ba;
8711 np->scripta_ba = np->ram_ba;
8712 if (np->features & FE_RAM8K) {
8714 np->scriptb_ba = np->scripta_ba + 4096;
8716 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8724 * Copy scripts to controller instance.
8726 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8727 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8730 * Setup variable parts in scripts and compute
8731 * scripts bus addresses used from the C code.
8733 np->fw_setup(np, fw);
8736 * Bind SCRIPTS with physical addresses usable by the
8737 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8739 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8740 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8742 #ifdef SYM_CONF_IARB_SUPPORT
8744 * If user wants IARB to be set when we win arbitration
8745 * and have other jobs, compute the max number of consecutive
8746 * settings of IARB hints before we leave devices a chance to
8747 * arbitrate for reselection.
8749 #ifdef SYM_SETUP_IARB_MAX
8750 np->iarb_max = SYM_SETUP_IARB_MAX;
8757 * Prepare the idle and invalid task actions.
8759 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8760 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8761 np->idletask_ba = vtobus(&np->idletask);
8763 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8764 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8765 np->notask_ba = vtobus(&np->notask);
8767 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8768 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8769 np->bad_itl_ba = vtobus(&np->bad_itl);
8771 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8772 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8773 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8776 * Allocate and prepare the lun JUMP table that is used
8777 * for a target prior the probing of devices (bad lun table).
8778 * A private table will be allocated for the target on the
8779 * first INQUIRY response received.
8781 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8785 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8786 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8787 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8790 * Prepare the bus address array that contains the bus
8791 * address of each target control block.
8792 * For now, assume all logical units are wrong. :)
8794 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8795 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8796 np->target[i].head.luntbl_sa =
8797 cpu_to_scr(vtobus(np->badluntbl));
8798 np->target[i].head.lun0_sa =
8799 cpu_to_scr(vtobus(&np->badlun_sa));
8803 * Now check the cache handling of the pci chipset.
8805 if (sym_snooptest (np)) {
8806 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8811 * Now deal with CAM.
8812 * Hopefully, we will succeed with that one.:)
8814 if (!sym_cam_attach(np))
8818 * Sigh! we are done.
8824 * We will try to free all the resources we have
8825 * allocated, but if we are a boot device, this
8826 * will not help that much.;)
8835 * Free everything that have been allocated for this device.
8837 static void sym_pci_free(hcb_p np)
8846 * First free CAM resources.
8851 * Now every should be quiet for us to
8852 * free other resources.
8855 bus_release_resource(np->device, SYS_RES_MEMORY,
8856 np->ram_id, np->ram_res);
8858 bus_release_resource(np->device, SYS_RES_MEMORY,
8859 SYM_PCI_MMIO, np->mmio_res);
8861 bus_release_resource(np->device, SYS_RES_IOPORT,
8862 SYM_PCI_IO, np->io_res);
8864 bus_release_resource(np->device, SYS_RES_IRQ,
8868 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
8870 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
8872 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
8874 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
8876 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
8877 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
8878 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
8879 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
8880 sym_mfree_dma(cp, sizeof(*cp), "CCB");
8884 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
8886 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
8887 tp = &np->target[target];
8888 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
8889 lp = sym_lp(np, tp, lun);
8893 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
8896 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
8898 sym_mfree_dma(lp, sizeof(*lp), "LCB");
8900 #if SYM_CONF_MAX_LUN > 1
8902 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
8908 sym_mfree_dma(np->target,
8909 SYM_CONF_MAX_TARGET * sizeof(*(np->target)), "TARGET");
8912 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
8914 bus_dma_tag_destroy(np->data_dmat);
8915 if (SYM_LOCK_INITIALIZED() != 0)
8917 device_set_softc(np->device, NULL);
8918 sym_mfree_dma(np, sizeof(*np), "HCB");
8922 * Allocate CAM resources and register a bus to CAM.
8924 static int sym_cam_attach(hcb_p np)
8926 struct cam_devq *devq = NULL;
8927 struct cam_sim *sim = NULL;
8928 struct cam_path *path = NULL;
8932 * Establish our interrupt handler.
8934 err = bus_setup_intr(np->device, np->irq_res,
8935 INTR_ENTROPY | INTR_MPSAFE | INTR_TYPE_CAM,
8936 NULL, sym_intr, np, &np->intr);
8938 device_printf(np->device, "bus_setup_intr() failed: %d\n",
8944 * Create the device queue for our sym SIM.
8946 devq = cam_simq_alloc(SYM_CONF_MAX_START);
8951 * Construct our SIM entry.
8953 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np,
8954 device_get_unit(np->device),
8955 &np->mtx, 1, SYM_SETUP_MAX_TAG, devq);
8961 if (xpt_bus_register(sim, np->device, 0) != CAM_SUCCESS)
8965 if (xpt_create_path(&path, 0,
8966 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
8967 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
8973 * Establish our async notification handler.
8975 if (xpt_register_async(AC_LOST_DEVICE, sym_async, sim, path) !=
8980 * Start the chip now, without resetting the BUS, since
8981 * it seems that this must stay under control of CAM.
8982 * With LVD/SE capable chips and BUS in SE mode, we may
8983 * get a spurious SMBC interrupt.
8992 cam_sim_free(sim, FALSE);
8994 cam_simq_free(devq);
9004 * Free everything that deals with CAM.
9006 static void sym_cam_free(hcb_p np)
9008 SYM_LOCK_ASSERT(MA_NOTOWNED);
9011 bus_teardown_intr(np->device, np->irq_res, np->intr);
9018 xpt_bus_deregister(cam_sim_path(np->sim));
9019 cam_sim_free(np->sim, /*free_devq*/ TRUE);
9023 xpt_free_path(np->path);
9030 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9033 * Get host setup from NVRAM.
9035 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9037 #ifdef SYM_CONF_NVRAM_SUPPORT
9039 * Get parity checking, host ID, verbose mode
9040 * and miscellaneous host flags from NVRAM.
9042 switch(nvram->type) {
9043 case SYM_SYMBIOS_NVRAM:
9044 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9045 np->rv_scntl0 &= ~0x0a;
9046 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9047 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9049 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9050 np->usrflags |= SYM_SCAN_TARGETS_HILO;
9051 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9052 np->usrflags |= SYM_AVOID_BUS_RESET;
9054 case SYM_TEKRAM_NVRAM:
9055 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9064 * Get target setup from NVRAM.
9066 #ifdef SYM_CONF_NVRAM_SUPPORT
9067 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9068 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9072 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9074 #ifdef SYM_CONF_NVRAM_SUPPORT
9076 case SYM_SYMBIOS_NVRAM:
9077 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9079 case SYM_TEKRAM_NVRAM:
9080 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9088 #ifdef SYM_CONF_NVRAM_SUPPORT
9090 * Get target set-up from Symbios format NVRAM.
9093 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9095 tcb_p tp = &np->target[target];
9096 Symbios_target *tn = &nvram->target[target];
9098 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9099 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9101 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9103 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9104 tp->usrflags &= ~SYM_DISC_ENABLED;
9105 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9106 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9107 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9108 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9112 * Get target set-up from Tekram format NVRAM.
9115 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9117 tcb_p tp = &np->target[target];
9118 struct Tekram_target *tn = &nvram->target[target];
9121 if (tn->flags & TEKRAM_SYNC_NEGO) {
9122 i = tn->sync_index & 0xf;
9123 tp->tinfo.user.period = Tekram_sync[i];
9126 tp->tinfo.user.width =
9127 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9129 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9130 tp->usrtags = 2 << nvram->max_tags_index;
9133 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9134 tp->usrflags |= SYM_DISC_ENABLED;
9136 /* If any device does not support parity, we will not use this option */
9137 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9138 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9141 #ifdef SYM_CONF_DEBUG_NVRAM
9143 * Dump Symbios format NVRAM for debugging purpose.
9145 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9149 /* display Symbios nvram host data */
9150 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9151 sym_name(np), nvram->host_id & 0x0f,
9152 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9153 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9154 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9155 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9156 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9157 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9159 /* display Symbios nvram drive data */
9160 for (i = 0 ; i < 15 ; i++) {
9161 struct Symbios_target *tn = &nvram->target[i];
9162 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9164 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9165 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9166 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9167 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9169 tn->sync_period / 4,
9175 * Dump TEKRAM format NVRAM for debugging purpose.
9177 static const u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9178 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9180 int i, tags, boot_delay;
9183 /* display Tekram nvram host data */
9184 tags = 2 << nvram->max_tags_index;
9186 if (nvram->boot_delay_index < 6)
9187 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9188 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9190 case 0: rem = ""; break;
9191 case 1: rem = " REMOVABLE=boot device"; break;
9192 case 2: rem = " REMOVABLE=all"; break;
9195 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9196 sym_name(np), nvram->host_id & 0x0f,
9197 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9198 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9199 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9200 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9201 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9202 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9203 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9204 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9205 rem, boot_delay, tags);
9207 /* display Tekram nvram drive data */
9208 for (i = 0; i <= 15; i++) {
9210 struct Tekram_target *tn = &nvram->target[i];
9211 j = tn->sync_index & 0xf;
9212 sync = Tekram_sync[j];
9213 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9215 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9216 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9217 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9218 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9219 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9220 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9224 #endif /* SYM_CONF_DEBUG_NVRAM */
9225 #endif /* SYM_CONF_NVRAM_SUPPORT */
9228 * Try reading Symbios or Tekram NVRAM
9230 #ifdef SYM_CONF_NVRAM_SUPPORT
9231 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9232 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9235 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9237 #ifdef SYM_CONF_NVRAM_SUPPORT
9239 * Try to read SYMBIOS nvram.
9240 * Try to read TEKRAM nvram if Symbios nvram not found.
9242 if (SYM_SETUP_SYMBIOS_NVRAM &&
9243 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9244 nvp->type = SYM_SYMBIOS_NVRAM;
9245 #ifdef SYM_CONF_DEBUG_NVRAM
9246 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9249 else if (SYM_SETUP_TEKRAM_NVRAM &&
9250 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9251 nvp->type = SYM_TEKRAM_NVRAM;
9252 #ifdef SYM_CONF_DEBUG_NVRAM
9253 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9264 #ifdef SYM_CONF_NVRAM_SUPPORT
9266 * 24C16 EEPROM reading.
9268 * GPOI0 - data in/data out
9270 * Symbios NVRAM wiring now also used by Tekram.
9279 * Set/clear data/clock bit in GPIO0
9281 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9287 *gpreg |= write_bit;
9300 OUTB (nc_gpreg, *gpreg);
9305 * Send START condition to NVRAM to wake it up.
9307 static void S24C16_start(hcb_p np, u_char *gpreg)
9309 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9310 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9311 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9312 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9316 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9318 static void S24C16_stop(hcb_p np, u_char *gpreg)
9320 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9321 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9325 * Read or write a bit to the NVRAM,
9326 * read if GPIO0 input else write if GPIO0 output
9328 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9331 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9332 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9334 *read_bit = INB (nc_gpreg);
9335 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9336 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9340 * Output an ACK to the NVRAM after reading,
9341 * change GPIO0 to output and when done back to an input
9343 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9346 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9347 S24C16_do_bit(np, 0, write_bit, gpreg);
9348 OUTB (nc_gpcntl, *gpcntl);
9352 * Input an ACK from NVRAM after writing,
9353 * change GPIO0 to input and when done back to an output
9355 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9358 OUTB (nc_gpcntl, *gpcntl | 0x01);
9359 S24C16_do_bit(np, read_bit, 1, gpreg);
9360 OUTB (nc_gpcntl, *gpcntl);
9364 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9365 * GPIO0 must already be set as an output
9367 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9368 u_char *gpreg, u_char *gpcntl)
9372 for (x = 0; x < 8; x++)
9373 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9375 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9379 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9380 * GPIO0 must already be set as an input
9382 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9383 u_char *gpreg, u_char *gpcntl)
9389 for (x = 0; x < 8; x++) {
9390 S24C16_do_bit(np, &read_bit, 1, gpreg);
9391 *read_data |= ((read_bit & 0x01) << (7 - x));
9394 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9398 * Read 'len' bytes starting at 'offset'.
9400 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9402 u_char gpcntl, gpreg;
9403 u_char old_gpcntl, old_gpreg;
9408 /* save current state of GPCNTL and GPREG */
9409 old_gpreg = INB (nc_gpreg);
9410 old_gpcntl = INB (nc_gpcntl);
9411 gpcntl = old_gpcntl & 0x1c;
9413 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9414 OUTB (nc_gpreg, old_gpreg);
9415 OUTB (nc_gpcntl, gpcntl);
9417 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9419 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9420 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9422 /* now set NVRAM inactive with GPIO0/1 both high */
9423 S24C16_stop(np, &gpreg);
9425 /* activate NVRAM */
9426 S24C16_start(np, &gpreg);
9428 /* write device code and random address MSB */
9429 S24C16_write_byte(np, &ack_data,
9430 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9431 if (ack_data & 0x01)
9434 /* write random address LSB */
9435 S24C16_write_byte(np, &ack_data,
9436 offset & 0xff, &gpreg, &gpcntl);
9437 if (ack_data & 0x01)
9440 /* regenerate START state to set up for reading */
9441 S24C16_start(np, &gpreg);
9443 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9444 S24C16_write_byte(np, &ack_data,
9445 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9446 if (ack_data & 0x01)
9449 /* now set up GPIO0 for inputting data */
9451 OUTB (nc_gpcntl, gpcntl);
9453 /* input all requested data - only part of total NVRAM */
9454 for (x = 0; x < len; x++)
9455 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9457 /* finally put NVRAM back in inactive mode */
9459 OUTB (nc_gpcntl, gpcntl);
9460 S24C16_stop(np, &gpreg);
9463 /* return GPIO0/1 to original states after having accessed NVRAM */
9464 OUTB (nc_gpcntl, old_gpcntl);
9465 OUTB (nc_gpreg, old_gpreg);
9470 #undef SET_BIT /* 0 */
9471 #undef CLR_BIT /* 1 */
9472 #undef SET_CLK /* 2 */
9473 #undef CLR_CLK /* 3 */
9476 * Try reading Symbios NVRAM.
9479 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9481 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9482 u_char *data = (u_char *) nvram;
9483 int len = sizeof(*nvram);
9487 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9488 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9491 /* check valid NVRAM signature, verify byte count and checksum */
9492 if (nvram->type != 0 ||
9493 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9494 nvram->byte_count != len - 12)
9497 /* verify checksum */
9498 for (x = 6, csum = 0; x < len - 6; x++)
9500 if (csum != nvram->checksum)
9507 * 93C46 EEPROM reading.
9512 * GPIO4 - chip select
9518 * Pulse clock bit in GPIO0
9520 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9522 OUTB (nc_gpreg, *gpreg | 0x04);
9524 OUTB (nc_gpreg, *gpreg);
9528 * Read bit from NVRAM
9530 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9533 T93C46_Clk(np, gpreg);
9534 *read_bit = INB (nc_gpreg);
9538 * Write bit to GPIO0
9540 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9542 if (write_bit & 0x01)
9549 OUTB (nc_gpreg, *gpreg);
9552 T93C46_Clk(np, gpreg);
9556 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9558 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9561 OUTB (nc_gpreg, *gpreg);
9564 T93C46_Clk(np, gpreg);
9568 * Send read command and address to NVRAM
9570 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9571 u_char *read_bit, u_char *gpreg)
9575 /* send 9 bits, start bit (1), command (2), address (6) */
9576 for (x = 0; x < 9; x++)
9577 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9579 *read_bit = INB (nc_gpreg);
9583 * READ 2 bytes from the NVRAM
9585 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9591 for (x = 0; x < 16; x++) {
9592 T93C46_Read_Bit(np, &read_bit, gpreg);
9594 if (read_bit & 0x01)
9595 *nvram_data |= (0x01 << (15 - x));
9597 *nvram_data &= ~(0x01 << (15 - x));
9602 * Read Tekram NvRAM data.
9604 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9609 for (x = 0; x < len; x++) {
9611 /* output read command and address */
9612 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9613 if (read_bit & 0x01)
9615 T93C46_Read_Word(np, &data[x], gpreg);
9616 T93C46_Stop(np, gpreg);
9623 * Try reading 93C46 Tekram NVRAM.
9625 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9627 u_char gpcntl, gpreg;
9628 u_char old_gpcntl, old_gpreg;
9631 /* save current state of GPCNTL and GPREG */
9632 old_gpreg = INB (nc_gpreg);
9633 old_gpcntl = INB (nc_gpcntl);
9635 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9637 gpreg = old_gpreg & 0xe9;
9638 OUTB (nc_gpreg, gpreg);
9639 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9640 OUTB (nc_gpcntl, gpcntl);
9642 /* input all of NVRAM, 64 words */
9643 retv = T93C46_Read_Data(np, (u_short *) nvram,
9644 sizeof(*nvram) / sizeof(short), &gpreg);
9646 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9647 OUTB (nc_gpcntl, old_gpcntl);
9648 OUTB (nc_gpreg, old_gpreg);
9654 * Try reading Tekram NVRAM.
9657 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9659 u_char *data = (u_char *) nvram;
9660 int len = sizeof(*nvram);
9664 switch (np->device_id) {
9665 case PCI_ID_SYM53C885:
9666 case PCI_ID_SYM53C895:
9667 case PCI_ID_SYM53C896:
9668 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9671 case PCI_ID_SYM53C875:
9672 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9677 x = sym_read_T93C46_nvram(np, nvram);
9683 /* verify checksum */
9684 for (x = 0, csum = 0; x < len - 1; x += 2)
9685 csum += data[x] + (data[x+1] << 8);
9692 #endif /* SYM_CONF_NVRAM_SUPPORT */