2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
65 #include <sys/param.h>
68 * Driver configuration options.
71 #include <dev/sym/sym_conf.h>
73 #include <sys/systm.h>
74 #include <sys/malloc.h>
75 #include <sys/endian.h>
76 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/module.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
87 #include <machine/bus.h>
88 #include <machine/resource.h>
89 #include <machine/atomic.h>
92 #include <dev/ofw/openfirm.h>
93 #include <machine/ofw_machdep.h>
99 #include <cam/cam_ccb.h>
100 #include <cam/cam_sim.h>
101 #include <cam/cam_xpt_sim.h>
102 #include <cam/cam_debug.h>
104 #include <cam/scsi/scsi_all.h>
105 #include <cam/scsi/scsi_message.h>
107 /* Short and quite clear integer types */
112 typedef u_int16_t u16;
113 typedef u_int32_t u32;
116 * Driver definitions.
118 #include <dev/sym/sym_defs.h>
119 #include <dev/sym/sym_fw.h>
122 * IA32 architecture does not reorder STORES and prevents
123 * LOADS from passing STORES. It is called `program order'
124 * by Intel and allows device drivers to deal with memory
125 * ordering by only ensuring that the code is not reordered
126 * by the compiler when ordering is required.
127 * Other architectures implement a weaker ordering that
128 * requires memory barriers (and also IO barriers when they
129 * make sense) to be used.
131 #if defined __i386__ || defined __amd64__
132 #define MEMORY_BARRIER() do { ; } while(0)
133 #elif defined __powerpc__
134 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
135 #elif defined __sparc64__
136 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
137 #elif defined __arm__
138 #define MEMORY_BARRIER() dmb()
139 #elif defined __aarch64__
140 #define MEMORY_BARRIER() dmb(sy)
141 #elif defined __riscv__
142 #define MEMORY_BARRIER() fence()
144 #error "Not supported platform"
148 * A la VMS/CAM-3 queue management.
150 typedef struct sym_quehead {
151 struct sym_quehead *flink; /* Forward pointer */
152 struct sym_quehead *blink; /* Backward pointer */
155 #define sym_que_init(ptr) do { \
156 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
159 static __inline void __sym_que_add(struct sym_quehead * new,
160 struct sym_quehead * blink,
161 struct sym_quehead * flink)
169 static __inline void __sym_que_del(struct sym_quehead * blink,
170 struct sym_quehead * flink)
172 flink->blink = blink;
173 blink->flink = flink;
176 static __inline int sym_que_empty(struct sym_quehead *head)
178 return head->flink == head;
181 static __inline void sym_que_splice(struct sym_quehead *list,
182 struct sym_quehead *head)
184 struct sym_quehead *first = list->flink;
187 struct sym_quehead *last = list->blink;
188 struct sym_quehead *at = head->flink;
198 #define sym_que_entry(ptr, type, member) \
199 ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
201 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
203 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
205 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
207 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
209 struct sym_quehead *elem = head->flink;
212 __sym_que_del(head, elem->flink);
218 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
221 * This one may be useful.
223 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
224 for (qp = (head)->flink; qp != (head); qp = qp->flink)
226 * FreeBSD does not offer our kind of queue in the CAM CCB.
227 * So, we have to cast.
229 #define sym_qptr(p) ((struct sym_quehead *) (p))
232 * Simple bitmap operations.
234 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
235 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
236 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
239 * Number of tasks per device we want to handle.
241 #if SYM_CONF_MAX_TAG_ORDER > 8
242 #error "more than 256 tags per logical unit not allowed."
244 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
247 * Donnot use more tasks that we can handle.
249 #ifndef SYM_CONF_MAX_TAG
250 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
252 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
253 #undef SYM_CONF_MAX_TAG
254 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
258 * This one means 'NO TAG for this job'
263 * Number of SCSI targets.
265 #if SYM_CONF_MAX_TARGET > 16
266 #error "more than 16 targets not allowed."
270 * Number of logical units per target.
272 #if SYM_CONF_MAX_LUN > 64
273 #error "more than 64 logical units per target not allowed."
277 * Asynchronous pre-scaler (ns). Shall be 40 for
278 * the SCSI timings to be compliant.
280 #define SYM_CONF_MIN_ASYNC (40)
283 * Number of entries in the START and DONE queues.
285 * We limit to 1 PAGE in order to succeed allocation of
286 * these queues. Each entry is 8 bytes long (2 DWORDS).
288 #ifdef SYM_CONF_MAX_START
289 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
291 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
292 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
295 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
296 #undef SYM_CONF_MAX_QUEUE
297 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
298 #undef SYM_CONF_MAX_START
299 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
303 * For this one, we want a short name :-)
305 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
308 * Active debugging tags and verbosity.
310 #define DEBUG_ALLOC (0x0001)
311 #define DEBUG_PHASE (0x0002)
312 #define DEBUG_POLL (0x0004)
313 #define DEBUG_QUEUE (0x0008)
314 #define DEBUG_RESULT (0x0010)
315 #define DEBUG_SCATTER (0x0020)
316 #define DEBUG_SCRIPT (0x0040)
317 #define DEBUG_TINY (0x0080)
318 #define DEBUG_TIMING (0x0100)
319 #define DEBUG_NEGO (0x0200)
320 #define DEBUG_TAGS (0x0400)
321 #define DEBUG_POINTER (0x0800)
324 static int sym_debug = 0;
325 #define DEBUG_FLAGS sym_debug
327 /* #define DEBUG_FLAGS (0x0631) */
328 #define DEBUG_FLAGS (0x0000)
331 #define sym_verbose (np->verbose)
334 * Insert a delay in micro-seconds and milli-seconds.
336 static void UDELAY(int us) { DELAY(us); }
337 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
340 * Simple power of two buddy-like allocator.
342 * This simple code is not intended to be fast, but to
343 * provide power of 2 aligned memory allocations.
344 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
345 * this allocator allows simple and fast address calculations
346 * from the SCRIPTS code. In addition, cache line alignment
347 * is guaranteed for power of 2 cache line size.
349 * This allocator has been developed for the Linux sym53c8xx
350 * driver, since this O/S does not provide naturally aligned
352 * It has the advantage of allowing the driver to use private
353 * pages of memory that will be useful if we ever need to deal
354 * with IO MMUs for PCI.
356 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
357 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
359 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
362 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
363 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
364 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
366 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
367 #define free_pages(p) free((p), M_DEVBUF)
369 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
371 typedef struct m_link { /* Link between free memory chunks */
375 typedef struct m_vtob { /* Virtual to Bus address translation */
377 bus_dmamap_t dmamap; /* Map for this chunk */
378 m_addr_t vaddr; /* Virtual address */
379 m_addr_t baddr; /* Bus physical address */
381 /* Hash this stuff a bit to speed up translations */
382 #define VTOB_HASH_SHIFT 5
383 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
384 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
385 #define VTOB_HASH_CODE(m) \
386 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
388 typedef struct m_pool { /* Memory pool of a given kind */
389 bus_dma_tag_t dev_dmat; /* Identifies the pool */
390 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
391 m_addr_t (*getp)(struct m_pool *);
392 #ifdef MEMO_FREE_UNUSED
393 void (*freep)(struct m_pool *, m_addr_t);
395 #define M_GETP() mp->getp(mp)
396 #define M_FREEP(p) mp->freep(mp, p)
398 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
400 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
403 static void *___sym_malloc(m_pool_s *mp, int size)
406 int s = (1 << MEMO_SHIFT);
411 if (size > MEMO_CLUSTER_SIZE)
421 if (s == MEMO_CLUSTER_SIZE) {
422 h[j].next = (m_link_s *) M_GETP();
424 h[j].next->next = NULL;
430 a = (m_addr_t) h[j].next;
432 h[j].next = h[j].next->next;
436 h[j].next = (m_link_s *) (a+s);
437 h[j].next->next = NULL;
441 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
446 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
449 int s = (1 << MEMO_SHIFT);
455 printf("___sym_mfree(%p, %d)\n", ptr, size);
458 if (size > MEMO_CLUSTER_SIZE)
469 #ifdef MEMO_FREE_UNUSED
470 if (s == MEMO_CLUSTER_SIZE) {
477 while (q->next && q->next != (m_link_s *) b) {
481 ((m_link_s *) a)->next = h[i].next;
482 h[i].next = (m_link_s *) a;
485 q->next = q->next->next;
492 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
496 p = ___sym_malloc(mp, size);
498 if (DEBUG_FLAGS & DEBUG_ALLOC)
499 printf ("new %-10s[%4d] @%p.\n", name, size, p);
503 else if (uflags & MEMO_WARN)
504 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
509 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
511 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
513 if (DEBUG_FLAGS & DEBUG_ALLOC)
514 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
516 ___sym_mfree(mp, ptr, size);
521 * Default memory pool we donnot need to involve in DMA.
524 * With the `bus dma abstraction', we use a separate pool for
525 * memory we donnot need to involve in DMA.
527 static m_addr_t ___mp0_getp(m_pool_s *mp)
529 m_addr_t m = (m_addr_t) get_pages();
535 #ifdef MEMO_FREE_UNUSED
536 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
543 #ifdef MEMO_FREE_UNUSED
544 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
546 static m_pool_s mp0 = {0, 0, ___mp0_getp};
550 * Actual memory allocation routine for non-DMAed memory.
552 static void *sym_calloc(int size, char *name)
556 m = __sym_calloc(&mp0, size, name);
562 * Actual memory allocation routine for non-DMAed memory.
564 static void sym_mfree(void *ptr, int size, char *name)
567 __sym_mfree(&mp0, ptr, size, name);
575 * With `bus dma abstraction', we use a separate pool per parent
576 * BUS handle. A reverse table (hashed) is maintained for virtual
577 * to BUS address translation.
579 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg __unused,
584 KASSERT(nseg == 1, ("%s: too many DMA segments (%d)", __func__, nseg));
586 baddr = (bus_addr_t *)arg;
590 *baddr = segs->ds_addr;
593 static m_addr_t ___dma_getp(m_pool_s *mp)
597 bus_addr_t baddr = 0;
599 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
603 if (bus_dmamem_alloc(mp->dmat, &vaddr,
604 BUS_DMA_COHERENT | BUS_DMA_WAITOK, &vbp->dmamap))
606 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
607 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, BUS_DMA_NOWAIT);
609 int hc = VTOB_HASH_CODE(vaddr);
610 vbp->vaddr = (m_addr_t) vaddr;
611 vbp->baddr = (m_addr_t) baddr;
612 vbp->next = mp->vtob[hc];
615 return (m_addr_t) vaddr;
619 bus_dmamap_unload(mp->dmat, vbp->dmamap);
621 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
623 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
627 #ifdef MEMO_FREE_UNUSED
628 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
630 m_vtob_s **vbpp, *vbp;
631 int hc = VTOB_HASH_CODE(m);
633 vbpp = &mp->vtob[hc];
634 while (*vbpp && (*vbpp)->vaddr != m)
635 vbpp = &(*vbpp)->next;
638 *vbpp = (*vbpp)->next;
639 bus_dmamap_unload(mp->dmat, vbp->dmamap);
640 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
641 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
647 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
650 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
654 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
658 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
660 mp->dev_dmat = dev_dmat;
661 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
662 BUS_SPACE_MAXADDR_32BIT,
664 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
665 MEMO_CLUSTER_SIZE, 0,
666 NULL, NULL, &mp->dmat)) {
667 mp->getp = ___dma_getp;
668 #ifdef MEMO_FREE_UNUSED
669 mp->freep = ___dma_freep;
677 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
681 #ifdef MEMO_FREE_UNUSED
682 static void ___del_dma_pool(m_pool_s *p)
684 struct m_pool **pp = &mp0.next;
686 while (*pp && *pp != p)
690 bus_dma_tag_destroy(p->dmat);
691 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
696 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
702 mp = ___get_dma_pool(dev_dmat);
704 mp = ___cre_dma_pool(dev_dmat);
706 m = __sym_calloc(mp, size, name);
707 #ifdef MEMO_FREE_UNUSED
717 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
722 mp = ___get_dma_pool(dev_dmat);
724 __sym_mfree(mp, m, size, name);
725 #ifdef MEMO_FREE_UNUSED
732 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
735 int hc = VTOB_HASH_CODE(m);
737 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
740 mp = ___get_dma_pool(dev_dmat);
743 while (vp && (m_addr_t) vp->vaddr != a)
748 panic("sym: VTOBUS FAILED!\n");
749 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
753 * Verbs for DMAable memory handling.
754 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
757 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
758 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
759 #define _sym_mfree_dma(np, p, s, n) \
760 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
761 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
762 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
763 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
764 #define vtobus(p) _vtobus(np, p)
767 * Print a buffer in hexadecimal format.
769 static void sym_printb_hex (u_char *p, int n)
772 printf (" %x", *p++);
776 * Same with a label at beginning and .\n at end.
778 static void sym_printl_hex (char *label, u_char *p, int n)
780 printf ("%s", label);
781 sym_printb_hex (p, n);
786 * Return a string for SCSI BUS mode.
788 static const char *sym_scsi_bus_mode(int mode)
791 case SMODE_HVD: return "HVD";
792 case SMODE_SE: return "SE";
793 case SMODE_LVD: return "LVD";
799 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
801 #ifdef SYM_CONF_NVRAM_SUPPORT
802 static const u_char Tekram_sync[16] =
803 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
807 * Union of supported NVRAM formats.
811 #define SYM_SYMBIOS_NVRAM (1)
812 #define SYM_TEKRAM_NVRAM (2)
813 #ifdef SYM_CONF_NVRAM_SUPPORT
815 Symbios_nvram Symbios;
822 * This one is hopefully useless, but actually useful. :-)
825 #define assert(expression) { \
826 if (!(expression)) { \
828 "assertion \"%s\" failed: file \"%s\", line %d\n", \
830 __FILE__, __LINE__); \
836 * Some provision for a possible big endian mode supported by
837 * Symbios chips (never seen, by the way).
838 * For now, this stuff does not deserve any comments. :)
840 #define sym_offb(o) (o)
841 #define sym_offw(o) (o)
844 * Some provision for support for BIG ENDIAN CPU.
846 #define cpu_to_scr(dw) htole32(dw)
847 #define scr_to_cpu(dw) le32toh(dw)
850 * Access to the chip IO registers and on-chip RAM.
851 * We use the `bus space' interface under FreeBSD-4 and
852 * later kernel versions.
854 #if defined(SYM_CONF_IOMAPPED)
856 #define INB_OFF(o) bus_read_1(np->io_res, (o))
857 #define INW_OFF(o) bus_read_2(np->io_res, (o))
858 #define INL_OFF(o) bus_read_4(np->io_res, (o))
860 #define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))
861 #define OUTW_OFF(o, v) bus_write_2(np->io_res, (o), (v))
862 #define OUTL_OFF(o, v) bus_write_4(np->io_res, (o), (v))
864 #else /* Memory mapped IO */
866 #define INB_OFF(o) bus_read_1(np->mmio_res, (o))
867 #define INW_OFF(o) bus_read_2(np->mmio_res, (o))
868 #define INL_OFF(o) bus_read_4(np->mmio_res, (o))
870 #define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))
871 #define OUTW_OFF(o, v) bus_write_2(np->mmio_res, (o), (v))
872 #define OUTL_OFF(o, v) bus_write_4(np->mmio_res, (o), (v))
874 #endif /* SYM_CONF_IOMAPPED */
876 #define OUTRAM_OFF(o, a, l) \
877 bus_write_region_1(np->ram_res, (o), (a), (l))
880 * Common definitions for both bus space and legacy IO methods.
882 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
883 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
884 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
886 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
887 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
888 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
890 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
891 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
892 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
893 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
894 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
895 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
898 * We normally want the chip to have a consistent view
899 * of driver internal data structures when we restart it.
902 #define OUTL_DSP(v) \
905 OUTL (nc_dsp, (v)); \
908 #define OUTONB_STD() \
911 OUTONB (nc_dcntl, (STD|NOCOM)); \
915 * Command control block states.
919 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
920 #define HS_DISCONNECT (3) /* Disconnected by target */
921 #define HS_WAIT (4) /* waiting for resource */
923 #define HS_DONEMASK (0x80)
924 #define HS_COMPLETE (4|HS_DONEMASK)
925 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
926 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
927 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
930 * Software Interrupt Codes
932 #define SIR_BAD_SCSI_STATUS (1)
933 #define SIR_SEL_ATN_NO_MSG_OUT (2)
934 #define SIR_MSG_RECEIVED (3)
935 #define SIR_MSG_WEIRD (4)
936 #define SIR_NEGO_FAILED (5)
937 #define SIR_NEGO_PROTO (6)
938 #define SIR_SCRIPT_STOPPED (7)
939 #define SIR_REJECT_TO_SEND (8)
940 #define SIR_SWIDE_OVERRUN (9)
941 #define SIR_SODL_UNDERRUN (10)
942 #define SIR_RESEL_NO_MSG_IN (11)
943 #define SIR_RESEL_NO_IDENTIFY (12)
944 #define SIR_RESEL_BAD_LUN (13)
945 #define SIR_TARGET_SELECTED (14)
946 #define SIR_RESEL_BAD_I_T_L (15)
947 #define SIR_RESEL_BAD_I_T_L_Q (16)
948 #define SIR_ABORT_SENT (17)
949 #define SIR_RESEL_ABORTED (18)
950 #define SIR_MSG_OUT_DONE (19)
951 #define SIR_COMPLETE_ERROR (20)
952 #define SIR_DATA_OVERRUN (21)
953 #define SIR_BAD_PHASE (22)
957 * Extended error bit codes.
958 * xerr_status field of struct sym_ccb.
960 #define XE_EXTRA_DATA (1) /* unexpected data phase */
961 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
962 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
963 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
964 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
967 * Negotiation status.
968 * nego_status field of struct sym_ccb.
975 * A CCB hashed table is used to retrieve CCB address
978 #define CCB_HASH_SHIFT 8
979 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
980 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
981 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
986 #define SYM_DISC_ENABLED (1)
987 #define SYM_TAGS_ENABLED (1<<1)
988 #define SYM_SCAN_BOOT_DISABLED (1<<2)
989 #define SYM_SCAN_LUNS_DISABLED (1<<3)
992 * Host adapter miscellaneous flags.
994 #define SYM_AVOID_BUS_RESET (1)
995 #define SYM_SCAN_TARGETS_HILO (1<<1)
999 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1000 * saving the DATA POINTER then reselects and terminates the IO.
1001 * On reselection, the automatic RESTORE DATA POINTER makes the
1002 * CURRENT DATA POINTER not point at the end of the IO.
1003 * This behaviour just breaks our calculation of the residual.
1004 * For now, we just force an AUTO SAVE on disconnection and will
1005 * fix that in a further driver version.
1007 #define SYM_QUIRK_AUTOSAVE 1
1012 #define SYM_LOCK() mtx_lock(&np->mtx)
1013 #define SYM_LOCK_ASSERT(_what) mtx_assert(&np->mtx, (_what))
1014 #define SYM_LOCK_DESTROY() mtx_destroy(&np->mtx)
1015 #define SYM_LOCK_INIT() mtx_init(&np->mtx, "sym_lock", NULL, MTX_DEF)
1016 #define SYM_LOCK_INITIALIZED() mtx_initialized(&np->mtx)
1017 #define SYM_UNLOCK() mtx_unlock(&np->mtx)
1019 #define SYM_SNOOP_TIMEOUT (10000000)
1020 #define SYM_PCI_IO PCIR_BAR(0)
1021 #define SYM_PCI_MMIO PCIR_BAR(1)
1022 #define SYM_PCI_RAM PCIR_BAR(2)
1023 #define SYM_PCI_RAM64 PCIR_BAR(3)
1026 * Back-pointer from the CAM CCB to our data structures.
1028 #define sym_hcb_ptr spriv_ptr0
1029 /* #define sym_ccb_ptr spriv_ptr1 */
1032 * We mostly have to deal with pointers.
1033 * Thus these typedef's.
1035 typedef struct sym_tcb *tcb_p;
1036 typedef struct sym_lcb *lcb_p;
1037 typedef struct sym_ccb *ccb_p;
1038 typedef struct sym_hcb *hcb_p;
1041 * Gather negotiable parameters value
1049 u8 options; /* PPR options */
1053 struct sym_trans current;
1054 struct sym_trans goal;
1055 struct sym_trans user;
1058 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1059 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1062 * Global TCB HEADER.
1064 * Due to lack of indirect addressing on earlier NCR chips,
1065 * this substructure is copied from the TCB to a global
1066 * address after selection.
1067 * For SYMBIOS chips that support LOAD/STORE this copy is
1068 * not needed and thus not performed.
1072 * Scripts bus addresses of LUN table accessed from scripts.
1073 * LUN #0 is a special case, since multi-lun devices are rare,
1074 * and we we want to speed-up the general case and not waste
1077 u32 luntbl_sa; /* bus address of this table */
1078 u32 lun0_sa; /* bus address of LCB #0 */
1080 * Actual SYNC/WIDE IO registers value for this target.
1081 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1082 * so have alignment constraints.
1084 /*0*/ u_char uval; /* -> SCNTL4 register */
1085 /*1*/ u_char sval; /* -> SXFER io register */
1086 /*2*/ u_char filler1;
1087 /*3*/ u_char wval; /* -> SCNTL3 io register */
1091 * Target Control Block
1096 * Assumed at offset 0.
1098 /*0*/ struct sym_tcbh head;
1101 * LUN table used by the SCRIPTS processor.
1102 * An array of bus addresses is used on reselection.
1104 u32 *luntbl; /* LCBs bus address table */
1107 * LUN table used by the C code.
1109 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1110 #if SYM_CONF_MAX_LUN > 1
1111 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1115 * Bitmap that tells about LUNs that succeeded at least
1116 * 1 IO and therefore assumed to be a real device.
1117 * Avoid useless allocation of the LCB structure.
1119 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1122 * Bitmap that tells about LUNs that haven't yet an LCB
1123 * allocated (not discovered or LCB allocation failed).
1125 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1128 * Transfer capabilities (SIP)
1130 struct sym_tinfo tinfo;
1133 * Keep track of the CCB used for the negotiation in order
1134 * to ensure that only 1 negotiation is queued at a time.
1136 ccb_p nego_cp; /* CCB used for the nego */
1139 * Set when we want to reset the device.
1144 * Other user settable limits and options.
1145 * These limits are read from the NVRAM if present.
1152 * Assert some alignments required by the chip.
1154 CTASSERT(((offsetof(struct sym_reg, nc_sxfer) ^
1155 offsetof(struct sym_tcb, head.sval)) &3) == 0);
1156 CTASSERT(((offsetof(struct sym_reg, nc_scntl3) ^
1157 offsetof(struct sym_tcb, head.wval)) &3) == 0);
1160 * Global LCB HEADER.
1162 * Due to lack of indirect addressing on earlier NCR chips,
1163 * this substructure is copied from the LCB to a global
1164 * address after selection.
1165 * For SYMBIOS chips that support LOAD/STORE this copy is
1166 * not needed and thus not performed.
1170 * SCRIPTS address jumped by SCRIPTS on reselection.
1171 * For not probed logical units, this address points to
1172 * SCRIPTS that deal with bad LU handling (must be at
1173 * offset zero of the LCB for that reason).
1178 * Task (bus address of a CCB) read from SCRIPTS that points
1179 * to the unique ITL nexus allowed to be disconnected.
1184 * Task table bus address (read from SCRIPTS).
1190 * Logical Unit Control Block
1195 * Assumed at offset 0.
1197 /*0*/ struct sym_lcbh head;
1200 * Task table read from SCRIPTS that contains pointers to
1201 * ITLQ nexuses. The bus address read from SCRIPTS is
1202 * inside the header.
1204 u32 *itlq_tbl; /* Kernel virtual address */
1207 * Busy CCBs management.
1209 u_short busy_itlq; /* Number of busy tagged CCBs */
1210 u_short busy_itl; /* Number of busy untagged CCBs */
1213 * Circular tag allocation buffer.
1215 u_short ia_tag; /* Tag allocation index */
1216 u_short if_tag; /* Tag release index */
1217 u_char *cb_tags; /* Circular tags buffer */
1220 * Set when we want to clear all tasks.
1228 u_char current_flags;
1232 * Action from SCRIPTS on a task.
1233 * Is part of the CCB, but is also used separately to plug
1234 * error handling action to perform from SCRIPTS.
1237 u32 start; /* Jumped by SCRIPTS after selection */
1238 u32 restart; /* Jumped by SCRIPTS on relection */
1242 * Phase mismatch context.
1244 * It is part of the CCB and is used as parameters for the
1245 * DATA pointer. We need two contexts to handle correctly the
1246 * SAVED DATA POINTER.
1249 struct sym_tblmove sg; /* Updated interrupted SG block */
1250 u32 ret; /* SCRIPT return address */
1254 * LUN control block lookup.
1255 * We use a direct pointer for LUN #0, and a table of
1256 * pointers which is only allocated for devices that support
1259 #if SYM_CONF_MAX_LUN <= 1
1260 #define sym_lp(tp, lun) (!lun) ? (tp)->lun0p : 0
1262 #define sym_lp(tp, lun) \
1263 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1267 * Status are used by the host and the script processor.
1269 * The last four bytes (status[4]) are copied to the
1270 * scratchb register (declared as scr0..scr3) just after the
1271 * select/reselect, and copied back just after disconnecting.
1272 * Inside the script the XX_REG are used.
1276 * Last four bytes (script)
1280 #define HS_PRT nc_scr1
1282 #define SS_PRT nc_scr2
1284 #define HF_PRT nc_scr3
1287 * Last four bytes (host)
1289 #define actualquirks phys.head.status[0]
1290 #define host_status phys.head.status[1]
1291 #define ssss_status phys.head.status[2]
1292 #define host_flags phys.head.status[3]
1297 #define HF_IN_PM0 1u
1298 #define HF_IN_PM1 (1u<<1)
1299 #define HF_ACT_PM (1u<<2)
1300 #define HF_DP_SAVED (1u<<3)
1301 #define HF_SENSE (1u<<4)
1302 #define HF_EXT_ERR (1u<<5)
1303 #define HF_DATA_IN (1u<<6)
1304 #ifdef SYM_CONF_IARB_SUPPORT
1305 #define HF_HINT_IARB (1u<<7)
1309 * Global CCB HEADER.
1311 * Due to lack of indirect addressing on earlier NCR chips,
1312 * this substructure is copied from the ccb to a global
1313 * address after selection (or reselection) and copied back
1314 * before disconnect.
1315 * For SYMBIOS chips that support LOAD/STORE this copy is
1316 * not needed and thus not performed.
1320 * Start and restart SCRIPTS addresses (must be at 0).
1322 /*0*/ struct sym_actscr go;
1325 * SCRIPTS jump address that deal with data pointers.
1326 * 'savep' points to the position in the script responsible
1327 * for the actual transfer of data.
1328 * It's written on reception of a SAVE_DATA_POINTER message.
1330 u32 savep; /* Jump address to saved data pointer */
1331 u32 lastp; /* SCRIPTS address at end of data */
1332 u32 goalp; /* Not accessed for now from SCRIPTS */
1341 * Data Structure Block
1343 * During execution of a ccb by the script processor, the
1344 * DSA (data structure address) register points to this
1345 * substructure of the ccb.
1350 * Also assumed at offset 0 of the sym_ccb structure.
1352 /*0*/ struct sym_ccbh head;
1355 * Phase mismatch contexts.
1356 * We need two to handle correctly the SAVED DATA POINTER.
1357 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1358 * for address calculation from SCRIPTS.
1364 * Table data for Script
1366 struct sym_tblsel select;
1367 struct sym_tblmove smsg;
1368 struct sym_tblmove smsg_ext;
1369 struct sym_tblmove cmd;
1370 struct sym_tblmove sense;
1371 struct sym_tblmove wresid;
1372 struct sym_tblmove data [SYM_CONF_MAX_SG];
1376 * Our Command Control Block
1380 * This is the data structure which is pointed by the DSA
1381 * register when it is executed by the script processor.
1382 * It must be the first entry.
1384 struct sym_dsb phys;
1387 * Pointer to CAM ccb and related stuff.
1389 struct callout ch; /* callout handle */
1390 union ccb *cam_ccb; /* CAM scsiio ccb */
1391 u8 cdb_buf[16]; /* Copy of CDB */
1392 u8 *sns_bbuf; /* Bounce buffer for sense data */
1393 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1394 int data_len; /* Total data length */
1395 int segments; /* Number of SG segments */
1398 * Miscellaneous status'.
1400 u_char nego_status; /* Negotiation status */
1401 u_char xerr_status; /* Extended error flags */
1402 u32 extra_bytes; /* Extraneous bytes transferred */
1406 * We prepare a message to be sent after selection.
1407 * We may use a second one if the command is rescheduled
1408 * due to CHECK_CONDITION or COMMAND TERMINATED.
1409 * Contents are IDENTIFY and SIMPLE_TAG.
1410 * While negotiating sync or wide transfer,
1411 * a SDTR or WDTR message is appended.
1413 u_char scsi_smsg [12];
1414 u_char scsi_smsg2[12];
1417 * Auto request sense related fields.
1419 u_char sensecmd[6]; /* Request Sense command */
1420 u_char sv_scsi_status; /* Saved SCSI status */
1421 u_char sv_xerr_status; /* Saved extended status */
1422 int sv_resid; /* Saved residual */
1425 * Map for the DMA of user data.
1427 void *arg; /* Argument for some callback */
1428 bus_dmamap_t dmamap; /* DMA map for user data */
1430 #define SYM_DMA_NONE 0
1431 #define SYM_DMA_READ 1
1432 #define SYM_DMA_WRITE 2
1436 u32 ccb_ba; /* BUS address of this CCB */
1437 u_short tag; /* Tag for this transfer */
1438 /* NO_TAG means no tag */
1441 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1443 link_ccbq; /* Link to free/busy CCB queue */
1444 u32 startp; /* Initial data pointer */
1445 int ext_sg; /* Extreme data pointer, used */
1446 int ext_ofs; /* to calculate the residual. */
1447 u_char to_abort; /* Want this IO to be aborted */
1450 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1453 * Host Control Block
1460 * Due to poorness of addressing capabilities, earlier
1461 * chips (810, 815, 825) copy part of the data structures
1462 * (CCB, TCB and LCB) in fixed areas.
1464 #ifdef SYM_CONF_GENERIC_SUPPORT
1465 struct sym_ccbh ccb_head;
1466 struct sym_tcbh tcb_head;
1467 struct sym_lcbh lcb_head;
1470 * Idle task and invalid task actions and
1471 * their bus addresses.
1473 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1474 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1477 * Dummy lun table to protect us against target
1478 * returning bad lun number on reselection.
1480 u32 *badluntbl; /* Table physical address */
1481 u32 badlun_sa; /* SCRIPT handler BUS address */
1484 * Bus address of this host control block.
1489 * Bit 32-63 of the on-chip RAM bus address in LE format.
1490 * The START_RAM64 script loads the MMRS and MMWS from this
1496 * Chip and controller indentification.
1501 * Initial value of some IO register bits.
1502 * These values are assumed to have been set by BIOS, and may
1503 * be used to probe adapter implementation differences.
1505 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1506 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1510 * Actual initial value of IO register bits used by the
1511 * driver. They are loaded at initialisation according to
1512 * features that are to be enabled/disabled.
1514 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1515 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1521 struct sym_tcb *target;
1523 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1527 * Target control block bus address array used by the SCRIPT
1534 * CAM SIM information for this instance.
1536 struct cam_sim *sim;
1537 struct cam_path *path;
1540 * Allocated hardware resources.
1542 struct resource *irq_res;
1543 struct resource *io_res;
1544 struct resource *mmio_res;
1545 struct resource *ram_res;
1552 * My understanding of PCI is that all agents must share the
1553 * same addressing range and model.
1554 * But some hardware architecture guys provide complex and
1555 * brain-deaded stuff that makes shit.
1556 * This driver only support PCI compliant implementations and
1557 * deals with part of the BUS stuff complexity only to fit O/S
1564 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1565 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1567 * BUS addresses of the chip
1569 vm_offset_t mmio_ba; /* MMIO BUS address */
1570 int mmio_ws; /* MMIO Window size */
1572 vm_offset_t ram_ba; /* RAM BUS address */
1573 int ram_ws; /* RAM window size */
1576 * SCRIPTS virtual and physical bus addresses.
1577 * 'script' is loaded in the on-chip RAM if present.
1578 * 'scripth' stays in main memory for all chips except the
1579 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1581 u_char *scripta0; /* Copies of script and scripth */
1582 u_char *scriptb0; /* Copies of script and scripth */
1583 vm_offset_t scripta_ba; /* Actual script and scripth */
1584 vm_offset_t scriptb_ba; /* bus addresses. */
1585 vm_offset_t scriptb0_ba;
1586 u_short scripta_sz; /* Actual size of script A */
1587 u_short scriptb_sz; /* Actual size of script B */
1590 * Bus addresses, setup and patch methods for
1591 * the selected firmware.
1593 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1594 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1595 void (*fw_setup)(hcb_p np, const struct sym_fw *fw);
1596 void (*fw_patch)(hcb_p np);
1597 const char *fw_name;
1600 * General controller parameters and configuration.
1602 u_short device_id; /* PCI device id */
1603 u_char revision_id; /* PCI device revision id */
1604 u_int features; /* Chip features map */
1605 u_char myaddr; /* SCSI id of the adapter */
1606 u_char maxburst; /* log base 2 of dwords burst */
1607 u_char maxwide; /* Maximum transfer width */
1608 u_char minsync; /* Min sync period factor (ST) */
1609 u_char maxsync; /* Max sync period factor (ST) */
1610 u_char maxoffs; /* Max scsi offset (ST) */
1611 u_char minsync_dt; /* Min sync period factor (DT) */
1612 u_char maxsync_dt; /* Max sync period factor (DT) */
1613 u_char maxoffs_dt; /* Max scsi offset (DT) */
1614 u_char multiplier; /* Clock multiplier (1,2,4) */
1615 u_char clock_divn; /* Number of clock divisors */
1616 u32 clock_khz; /* SCSI clock frequency in KHz */
1617 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1619 * Start queue management.
1620 * It is filled up by the host processor and accessed by the
1621 * SCRIPTS processor in order to start SCSI commands.
1623 volatile /* Prevent code optimizations */
1624 u32 *squeue; /* Start queue virtual address */
1625 u32 squeue_ba; /* Start queue BUS address */
1626 u_short squeueput; /* Next free slot of the queue */
1627 u_short actccbs; /* Number of allocated CCBs */
1630 * Command completion queue.
1631 * It is the same size as the start queue to avoid overflow.
1633 u_short dqueueget; /* Next position to scan */
1634 volatile /* Prevent code optimizations */
1635 u32 *dqueue; /* Completion (done) queue */
1636 u32 dqueue_ba; /* Done queue BUS address */
1639 * Miscellaneous buffers accessed by the scripts-processor.
1640 * They shall be DWORD aligned, because they may be read or
1641 * written with a script command.
1643 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1644 u_char msgin [8]; /* Buffer for MESSAGE IN */
1645 u32 lastmsg; /* Last SCSI message sent */
1646 u_char scratch; /* Scratch for SCSI receive */
1649 * Miscellaneous configuration and status parameters.
1651 u_char usrflags; /* Miscellaneous user flags */
1652 u_char scsi_mode; /* Current SCSI BUS mode */
1653 u_char verbose; /* Verbosity for this controller*/
1654 u32 cache; /* Used for cache test at init. */
1657 * CCB lists and queue.
1659 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1660 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1661 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1664 * During error handling and/or recovery,
1665 * active CCBs that are to be completed with
1666 * error or requeued are moved from the busy_ccbq
1667 * to the comp_ccbq prior to completion.
1669 SYM_QUEHEAD comp_ccbq;
1672 * CAM CCB pending queue.
1674 SYM_QUEHEAD cam_ccbq;
1677 * IMMEDIATE ARBITRATION (IARB) control.
1679 * We keep track in 'last_cp' of the last CCB that has been
1680 * queued to the SCRIPTS processor and clear 'last_cp' when
1681 * this CCB completes. If last_cp is not zero at the moment
1682 * we queue a new CCB, we set a flag in 'last_cp' that is
1683 * used by the SCRIPTS as a hint for setting IARB.
1684 * We donnot set more than 'iarb_max' consecutive hints for
1685 * IARB in order to leave devices a chance to reselect.
1686 * By the way, any non zero value of 'iarb_max' is unfair. :)
1688 #ifdef SYM_CONF_IARB_SUPPORT
1689 u_short iarb_max; /* Max. # consecutive IARB hints*/
1690 u_short iarb_count; /* Actual # of these hints */
1695 * Command abort handling.
1696 * We need to synchronize tightly with the SCRIPTS
1697 * processor in order to handle things correctly.
1699 u_char abrt_msg[4]; /* Message to send buffer */
1700 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1701 struct sym_tblsel abrt_sel; /* Sync params for selection */
1702 u_char istat_sem; /* Tells the chip to stop (SEM) */
1705 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1708 * Return the name of the controller.
1710 static __inline const char *sym_name(hcb_p np)
1712 return device_get_nameunit(np->device);
1715 /*--------------------------------------------------------------------------*/
1716 /*------------------------------ FIRMWARES ---------------------------------*/
1717 /*--------------------------------------------------------------------------*/
1720 * This stuff will be moved to a separate source file when
1721 * the driver will be broken into several source modules.
1725 * Macros used for all firmwares.
1727 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1728 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1729 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1730 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1732 #ifdef SYM_CONF_GENERIC_SUPPORT
1734 * Allocate firmware #1 script area.
1736 #define SYM_FWA_SCR sym_fw1a_scr
1737 #define SYM_FWB_SCR sym_fw1b_scr
1738 #include <dev/sym/sym_fw1.h>
1739 static const struct sym_fwa_ofs sym_fw1a_ofs = {
1740 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1742 static const struct sym_fwb_ofs sym_fw1b_ofs = {
1743 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1747 #endif /* SYM_CONF_GENERIC_SUPPORT */
1750 * Allocate firmware #2 script area.
1752 #define SYM_FWA_SCR sym_fw2a_scr
1753 #define SYM_FWB_SCR sym_fw2b_scr
1754 #include <dev/sym/sym_fw2.h>
1755 static const struct sym_fwa_ofs sym_fw2a_ofs = {
1756 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1758 static const struct sym_fwb_ofs sym_fw2b_ofs = {
1759 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1760 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1761 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1771 #ifdef SYM_CONF_GENERIC_SUPPORT
1773 * Patch routine for firmware #1.
1776 sym_fw1_patch(hcb_p np)
1778 struct sym_fw1a_scr *scripta0;
1779 struct sym_fw1b_scr *scriptb0;
1781 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1782 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1785 * Remove LED support if not needed.
1787 if (!(np->features & FE_LED0)) {
1788 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1789 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1790 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1793 #ifdef SYM_CONF_IARB_SUPPORT
1795 * If user does not want to use IMMEDIATE ARBITRATION
1796 * when we are reselected while attempting to arbitrate,
1797 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1799 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1800 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1803 * Patch some data in SCRIPTS.
1804 * - start and done queue initial bus address.
1805 * - target bus address table bus address.
1807 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1808 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1809 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1811 #endif /* SYM_CONF_GENERIC_SUPPORT */
1814 * Patch routine for firmware #2.
1817 sym_fw2_patch(hcb_p np)
1819 struct sym_fw2a_scr *scripta0;
1820 struct sym_fw2b_scr *scriptb0;
1822 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1823 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1826 * Remove LED support if not needed.
1828 if (!(np->features & FE_LED0)) {
1829 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1830 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1831 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1834 #ifdef SYM_CONF_IARB_SUPPORT
1836 * If user does not want to use IMMEDIATE ARBITRATION
1837 * when we are reselected while attempting to arbitrate,
1838 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1840 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1841 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1844 * Patch some variable in SCRIPTS.
1845 * - start and done queue initial bus address.
1846 * - target bus address table bus address.
1848 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1849 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1850 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1853 * Remove the load of SCNTL4 on reselection if not a C10.
1855 if (!(np->features & FE_C10)) {
1856 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1857 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1861 * Remove a couple of work-arounds specific to C1010 if
1862 * they are not desirable. See `sym_fw2.h' for more details.
1864 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1865 np->revision_id < 0x1 &&
1866 np->pciclk_khz < 60000)) {
1867 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1868 scripta0->datao_phase[1] = cpu_to_scr(0);
1870 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1871 /* np->revision_id < 0xff */ 1)) {
1872 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1873 scripta0->sel_done[1] = cpu_to_scr(0);
1877 * Patch some other variables in SCRIPTS.
1878 * These ones are loaded by the SCRIPTS processor.
1880 scriptb0->pm0_data_addr[0] =
1881 cpu_to_scr(np->scripta_ba +
1882 offsetof(struct sym_fw2a_scr, pm0_data));
1883 scriptb0->pm1_data_addr[0] =
1884 cpu_to_scr(np->scripta_ba +
1885 offsetof(struct sym_fw2a_scr, pm1_data));
1889 * Fill the data area in scripts.
1890 * To be done for all firmwares.
1893 sym_fw_fill_data (u32 *in, u32 *out)
1897 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1898 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1899 *in++ = offsetof (struct sym_dsb, data[i]);
1900 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1901 *out++ = offsetof (struct sym_dsb, data[i]);
1906 * Setup useful script bus addresses.
1907 * To be done for all firmwares.
1910 sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw)
1917 * Build the bus address table for script A
1918 * from the script A offset table.
1920 po = (const u_short *) fw->a_ofs;
1921 pa = (u32 *) &np->fwa_bas;
1922 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1923 pa[i] = np->scripta_ba + po[i];
1926 * Same for script B.
1928 po = (const u_short *) fw->b_ofs;
1929 pa = (u32 *) &np->fwb_bas;
1930 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1931 pa[i] = np->scriptb_ba + po[i];
1934 #ifdef SYM_CONF_GENERIC_SUPPORT
1936 * Setup routine for firmware #1.
1939 sym_fw1_setup(hcb_p np, const struct sym_fw *fw)
1941 struct sym_fw1a_scr *scripta0;
1943 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1946 * Fill variable parts in scripts.
1948 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1951 * Setup bus addresses used from the C code..
1953 sym_fw_setup_bus_addresses(np, fw);
1955 #endif /* SYM_CONF_GENERIC_SUPPORT */
1958 * Setup routine for firmware #2.
1961 sym_fw2_setup(hcb_p np, const struct sym_fw *fw)
1963 struct sym_fw2a_scr *scripta0;
1965 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1968 * Fill variable parts in scripts.
1970 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1973 * Setup bus addresses used from the C code..
1975 sym_fw_setup_bus_addresses(np, fw);
1979 * Allocate firmware descriptors.
1981 #ifdef SYM_CONF_GENERIC_SUPPORT
1982 static const struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
1983 #endif /* SYM_CONF_GENERIC_SUPPORT */
1984 static const struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
1987 * Find the most appropriate firmware for a chip.
1989 static const struct sym_fw *
1990 sym_find_firmware(const struct sym_pci_chip *chip)
1992 if (chip->features & FE_LDSTR)
1994 #ifdef SYM_CONF_GENERIC_SUPPORT
1995 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2003 * Bind a script to physical addresses.
2005 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2007 u32 opcode, new, old, tmp1, tmp2;
2012 end = start + len/4;
2019 * If we forget to change the length
2020 * in scripts, a field will be
2021 * padded with 0. This is an illegal
2025 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2026 sym_name(np), (int) (cur-start));
2033 * We use the bogus value 0xf00ff00f ;-)
2034 * to reserve data area in SCRIPTS.
2036 if (opcode == SCR_DATA_ZERO) {
2041 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2042 printf ("%d: <%x>\n", (int) (cur-start),
2046 * We don't have to decode ALL commands
2048 switch (opcode >> 28) {
2051 * LOAD / STORE DSA relative, don't relocate.
2057 * LOAD / STORE absolute.
2063 * COPY has TWO arguments.
2068 if ((tmp1 ^ tmp2) & 3) {
2069 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2070 sym_name(np), (int) (cur-start));
2074 * If PREFETCH feature not enabled, remove
2075 * the NO FLUSH bit if present.
2077 if ((opcode & SCR_NO_FLUSH) &&
2078 !(np->features & FE_PFEN)) {
2079 opcode = (opcode & ~SCR_NO_FLUSH);
2084 * MOVE/CHMOV (absolute address)
2086 if (!(np->features & FE_WIDE))
2087 opcode = (opcode | OPC_MOVE);
2092 * MOVE/CHMOV (table indirect)
2094 if (!(np->features & FE_WIDE))
2095 opcode = (opcode | OPC_MOVE);
2101 * dont't relocate if relative :-)
2103 if (opcode & 0x00800000)
2105 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2122 * Scriptify:) the opcode.
2124 *cur++ = cpu_to_scr(opcode);
2127 * If no relocation, assume 1 argument
2128 * and just scriptize:) it.
2131 *cur = cpu_to_scr(*cur);
2137 * Otherwise performs all needed relocations.
2142 switch (old & RELOC_MASK) {
2143 case RELOC_REGISTER:
2144 new = (old & ~RELOC_MASK) + np->mmio_ba;
2147 new = (old & ~RELOC_MASK) + np->scripta_ba;
2150 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2153 new = (old & ~RELOC_MASK) + np->hcb_ba;
2157 * Don't relocate a 0 address.
2158 * They are mostly used for patched or
2159 * script self-modified areas.
2168 panic("sym_fw_bind_script: "
2169 "weird relocation %x\n", old);
2173 *cur++ = cpu_to_scr(new);
2178 /*---------------------------------------------------------------------------*/
2179 /*--------------------------- END OF FIRMWARES -----------------------------*/
2180 /*---------------------------------------------------------------------------*/
2183 * Function prototypes.
2185 static void sym_save_initial_setting (hcb_p np);
2186 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2187 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2188 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2189 static void sym_chip_reset (hcb_p np);
2190 static void sym_soft_reset (hcb_p np);
2191 static void sym_start_reset (hcb_p np);
2192 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2193 static int sym_wakeup_done (hcb_p np);
2194 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2195 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2196 static void sym_init (hcb_p np, int reason);
2197 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2199 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2200 u_char div, u_char fak);
2201 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2202 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2203 u_char per, u_char wide, u_char div, u_char fak);
2204 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2205 u_char per, u_char wide, u_char div, u_char fak);
2206 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2207 static void sym_intr (void *arg);
2208 static void sym_poll (struct cam_sim *sim);
2209 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2210 static void sym_int_sto (hcb_p np);
2211 static void sym_int_udc (hcb_p np);
2212 static void sym_int_sbmc (hcb_p np);
2213 static void sym_int_par (hcb_p np, u_short sist);
2214 static void sym_int_ma (hcb_p np);
2215 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2217 static void sym_sir_bad_scsi_status (hcb_p np, ccb_p cp);
2218 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2219 static void sym_sir_task_recovery (hcb_p np, int num);
2220 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2221 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs);
2222 static int sym_compute_residual (hcb_p np, ccb_p cp);
2223 static int sym_show_msg (u_char * msg);
2224 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2225 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2226 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2227 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2228 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2229 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2230 static void sym_int_sir (hcb_p np);
2231 static void sym_free_ccb (hcb_p np, ccb_p cp);
2232 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2233 static ccb_p sym_alloc_ccb (hcb_p np);
2234 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2235 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2236 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2237 static int sym_snooptest (hcb_p np);
2238 static void sym_selectclock(hcb_p np, u_char scntl3);
2239 static void sym_getclock (hcb_p np, int mult);
2240 static int sym_getpciclock (hcb_p np);
2241 static void sym_complete_ok (hcb_p np, ccb_p cp);
2242 static void sym_complete_error (hcb_p np, ccb_p cp);
2243 static void sym_callout (void *arg);
2244 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2245 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2246 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2247 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2248 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2250 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2251 bus_dma_segment_t *psegs, int nsegs);
2252 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2253 bus_dma_segment_t *psegs, int nsegs);
2254 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2255 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
2256 struct ccb_trans_settings *cts);
2257 static void sym_update_dflags(hcb_p np, u_char *flags,
2258 struct ccb_trans_settings *cts);
2260 static const struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2261 static int sym_pci_probe (device_t dev);
2262 static int sym_pci_attach (device_t dev);
2264 static void sym_pci_free (hcb_p np);
2265 static int sym_cam_attach (hcb_p np);
2266 static void sym_cam_free (hcb_p np);
2268 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2269 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2270 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2273 * Print something which allows to retrieve the controller type,
2274 * unit, target, lun concerned by a kernel message.
2276 static void PRINT_TARGET (hcb_p np, int target)
2278 printf ("%s:%d:", sym_name(np), target);
2281 static void PRINT_LUN(hcb_p np, int target, int lun)
2283 printf ("%s:%d:%d:", sym_name(np), target, lun);
2286 static void PRINT_ADDR (ccb_p cp)
2288 if (cp && cp->cam_ccb)
2289 xpt_print_path(cp->cam_ccb->ccb_h.path);
2293 * Take into account this ccb in the freeze count.
2295 static void sym_freeze_cam_ccb(union ccb *ccb)
2297 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2298 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2299 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2300 xpt_freeze_devq(ccb->ccb_h.path, 1);
2306 * Set the status field of a CAM CCB.
2308 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2310 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2311 ccb->ccb_h.status |= status;
2315 * Get the status field of a CAM CCB.
2317 static __inline int sym_get_cam_status(union ccb *ccb)
2319 return ccb->ccb_h.status & CAM_STATUS_MASK;
2323 * Enqueue a CAM CCB.
2325 static void sym_enqueue_cam_ccb(ccb_p cp)
2331 np = (hcb_p) cp->arg;
2333 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2334 ccb->ccb_h.status = CAM_REQ_INPROG;
2336 callout_reset_sbt(&cp->ch, SBT_1MS * ccb->ccb_h.timeout, 0, sym_callout,
2338 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2339 ccb->ccb_h.sym_hcb_ptr = np;
2341 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2345 * Complete a pending CAM CCB.
2348 static void sym_xpt_done(hcb_p np, union ccb *ccb, ccb_p cp)
2351 SYM_LOCK_ASSERT(MA_OWNED);
2353 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2354 callout_stop(&cp->ch);
2355 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2356 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2357 ccb->ccb_h.sym_hcb_ptr = NULL;
2362 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2365 SYM_LOCK_ASSERT(MA_OWNED);
2367 sym_set_cam_status(ccb, cam_status);
2372 * SYMBIOS chip clock divisor table.
2374 * Divisors are multiplied by 10,000,000 in order to make
2375 * calculations more simple.
2378 static const u32 div_10M[] =
2379 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2382 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2383 * 128 transfers. All chips support at least 16 transfers
2384 * bursts. The 825A, 875 and 895 chips support bursts of up
2385 * to 128 transfers and the 895A and 896 support bursts of up
2386 * to 64 transfers. All other chips support up to 16
2389 * For PCI 32 bit data transfers each transfer is a DWORD.
2390 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2392 * We use log base 2 (burst length) as internal code, with
2393 * value 0 meaning "burst disabled".
2397 * Burst length from burst code.
2399 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2402 * Burst code from io register bits.
2404 #define burst_code(dmode, ctest4, ctest5) \
2405 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2408 * Set initial io register bits from burst code.
2410 static __inline void sym_init_burst(hcb_p np, u_char bc)
2412 np->rv_ctest4 &= ~0x80;
2413 np->rv_dmode &= ~(0x3 << 6);
2414 np->rv_ctest5 &= ~0x4;
2417 np->rv_ctest4 |= 0x80;
2421 np->rv_dmode |= ((bc & 0x3) << 6);
2422 np->rv_ctest5 |= (bc & 0x4);
2427 * Print out the list of targets that have some flag disabled by user.
2429 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2434 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2435 if (i == np->myaddr)
2437 if (np->target[i].usrflags & mask) {
2439 printf("%s: %s disabled for targets",
2449 * Save initial settings of some IO registers.
2450 * Assumed to have been set by BIOS.
2451 * We cannot reset the chip prior to reading the
2452 * IO registers, since informations will be lost.
2453 * Since the SCRIPTS processor may be running, this
2454 * is not safe on paper, but it seems to work quite
2457 static void sym_save_initial_setting (hcb_p np)
2459 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2460 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2461 np->sv_dmode = INB(nc_dmode) & 0xce;
2462 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2463 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2464 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2465 np->sv_gpcntl = INB(nc_gpcntl);
2466 np->sv_stest1 = INB(nc_stest1);
2467 np->sv_stest2 = INB(nc_stest2) & 0x20;
2468 np->sv_stest4 = INB(nc_stest4);
2469 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2470 np->sv_scntl4 = INB(nc_scntl4);
2471 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2474 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2478 * Prepare io register values used by sym_init() according
2479 * to selected and supported features.
2481 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2490 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2493 * Get the frequency of the chip's clock.
2495 if (np->features & FE_QUAD)
2497 else if (np->features & FE_DBLR)
2502 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2503 np->clock_khz *= np->multiplier;
2505 if (np->clock_khz != 40000)
2506 sym_getclock(np, np->multiplier);
2509 * Divisor to be used for async (timer pre-scaler).
2511 i = np->clock_divn - 1;
2513 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2518 np->rv_scntl3 = i+1;
2521 * The C1010 uses hardwired divisors for async.
2522 * So, we just throw away, the async. divisor.:-)
2524 if (np->features & FE_C10)
2528 * Minimum synchronous period factor supported by the chip.
2529 * Btw, 'period' is in tenths of nanoseconds.
2531 period = howmany(4 * div_10M[0], np->clock_khz);
2532 if (period <= 250) np->minsync = 10;
2533 else if (period <= 303) np->minsync = 11;
2534 else if (period <= 500) np->minsync = 12;
2535 else np->minsync = howmany(period, 40);
2538 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2540 if (np->minsync < 25 &&
2541 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2543 else if (np->minsync < 12 &&
2544 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2548 * Maximum synchronous period factor supported by the chip.
2550 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2551 np->maxsync = period > 2540 ? 254 : period / 10;
2554 * If chip is a C1010, guess the sync limits in DT mode.
2556 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2557 if (np->clock_khz == 160000) {
2559 np->maxsync_dt = 50;
2560 np->maxoffs_dt = 62;
2565 * 64 bit addressing (895A/896/1010) ?
2567 if (np->features & FE_DAC)
2569 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2571 np->rv_ccntl1 |= (DDAC);
2575 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2577 if (np->features & FE_NOPM)
2578 np->rv_ccntl0 |= (ENPMJ);
2582 * In dual channel mode, contention occurs if internal cycles
2583 * are used. Disable internal cycles.
2585 if (np->device_id == PCI_ID_LSI53C1010 &&
2586 np->revision_id < 0x2)
2587 np->rv_ccntl0 |= DILS;
2590 * Select burst length (dwords)
2592 burst_max = SYM_SETUP_BURST_ORDER;
2593 if (burst_max == 255)
2594 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2598 if (burst_max > np->maxburst)
2599 burst_max = np->maxburst;
2602 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2603 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2604 * based transactions on LOAD/STORE instructions. So we have
2605 * to prevent these chips from using such PCI transactions in
2606 * this driver. The generic ncr driver that does not use
2607 * LOAD/STORE instructions does not need this work-around.
2609 if ((np->device_id == PCI_ID_SYM53C810 &&
2610 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2611 (np->device_id == PCI_ID_SYM53C860 &&
2612 np->revision_id <= 0x1))
2613 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2616 * Select all supported special features.
2617 * If we are using on-board RAM for scripts, prefetch (PFEN)
2618 * does not help, but burst op fetch (BOF) does.
2619 * Disabling PFEN makes sure BOF will be used.
2621 if (np->features & FE_ERL)
2622 np->rv_dmode |= ERL; /* Enable Read Line */
2623 if (np->features & FE_BOF)
2624 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2625 if (np->features & FE_ERMP)
2626 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2628 if ((np->features & FE_PFEN) && !np->ram_ba)
2630 if (np->features & FE_PFEN)
2632 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2633 if (np->features & FE_CLSE)
2634 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2635 if (np->features & FE_WRIE)
2636 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2637 if (np->features & FE_DFS)
2638 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2643 if (SYM_SETUP_PCI_PARITY)
2644 np->rv_ctest4 |= MPEE; /* Master parity checking */
2645 if (SYM_SETUP_SCSI_PARITY)
2646 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2649 * Get parity checking, host ID and verbose mode from NVRAM
2652 sym_nvram_setup_host (np, nvram);
2654 np->myaddr = OF_getscsinitid(np->device);
2658 * Get SCSI addr of host adapter (set by bios?).
2660 if (np->myaddr == 255) {
2661 np->myaddr = INB(nc_scid) & 0x07;
2663 np->myaddr = SYM_SETUP_HOST_ID;
2667 * Prepare initial io register bits for burst length
2669 sym_init_burst(np, burst_max);
2672 * Set SCSI BUS mode.
2673 * - LVD capable chips (895/895A/896/1010) report the
2674 * current BUS mode through the STEST4 IO register.
2675 * - For previous generation chips (825/825A/875),
2676 * user has to tell us how to check against HVD,
2677 * since a 100% safe algorithm is not possible.
2679 np->scsi_mode = SMODE_SE;
2680 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2681 np->scsi_mode = (np->sv_stest4 & SMODE);
2682 else if (np->features & FE_DIFF) {
2683 if (SYM_SETUP_SCSI_DIFF == 1) {
2684 if (np->sv_scntl3) {
2685 if (np->sv_stest2 & 0x20)
2686 np->scsi_mode = SMODE_HVD;
2688 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2689 if (!(INB(nc_gpreg) & 0x08))
2690 np->scsi_mode = SMODE_HVD;
2693 else if (SYM_SETUP_SCSI_DIFF == 2)
2694 np->scsi_mode = SMODE_HVD;
2696 if (np->scsi_mode == SMODE_HVD)
2697 np->rv_stest2 |= 0x20;
2700 * Set LED support from SCRIPTS.
2701 * Ignore this feature for boards known to use a
2702 * specific GPIO wiring and for the 895A, 896
2703 * and 1010 that drive the LED directly.
2705 if ((SYM_SETUP_SCSI_LED ||
2706 (nvram->type == SYM_SYMBIOS_NVRAM ||
2707 (nvram->type == SYM_TEKRAM_NVRAM &&
2708 np->device_id == PCI_ID_SYM53C895))) &&
2709 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2710 np->features |= FE_LED0;
2715 switch(SYM_SETUP_IRQ_MODE & 3) {
2717 np->rv_dcntl |= IRQM;
2720 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2727 * Configure targets according to driver setup.
2728 * If NVRAM present get targets setup from NVRAM.
2730 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2731 tcb_p tp = &np->target[i];
2733 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2734 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2735 tp->tinfo.user.period = np->minsync;
2736 if (np->features & FE_ULTRA3)
2737 tp->tinfo.user.period = np->minsync_dt;
2738 tp->tinfo.user.offset = np->maxoffs;
2739 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2740 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2741 tp->usrtags = SYM_SETUP_MAX_TAG;
2743 sym_nvram_setup_target (np, i, nvram);
2746 * For now, guess PPR/DT support from the period
2749 if (np->features & FE_ULTRA3) {
2750 if (tp->tinfo.user.period <= 9 &&
2751 tp->tinfo.user.width == BUS_16_BIT) {
2752 tp->tinfo.user.options |= PPR_OPT_DT;
2753 tp->tinfo.user.offset = np->maxoffs_dt;
2754 tp->tinfo.user.spi_version = 3;
2759 tp->usrflags &= ~SYM_TAGS_ENABLED;
2763 * Let user know about the settings.
2766 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2767 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2768 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2770 (np->features & FE_ULTRA3) ? 80 :
2771 (np->features & FE_ULTRA2) ? 40 :
2772 (np->features & FE_ULTRA) ? 20 : 10,
2773 sym_scsi_bus_mode(np->scsi_mode),
2774 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2776 * Tell him more on demand.
2779 printf("%s: %s IRQ line driver%s\n",
2781 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2782 np->ram_ba ? ", using on-chip SRAM" : "");
2783 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2784 if (np->features & FE_NOPM)
2785 printf("%s: handling phase mismatch from SCRIPTS.\n",
2791 if (sym_verbose > 1) {
2792 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2793 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2794 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2795 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2797 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2798 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2799 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2800 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2803 * Let user be aware of targets that have some disable flags set.
2805 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2807 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2814 * Prepare the next negotiation message if needed.
2816 * Fill in the part of message buffer that contains the
2817 * negotiation and the nego_status field of the CCB.
2818 * Returns the size of the message in bytes.
2820 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2822 tcb_p tp = &np->target[cp->target];
2826 * Early C1010 chips need a work-around for DT
2827 * data transfer to work.
2829 if (!(np->features & FE_U3EN))
2830 tp->tinfo.goal.options = 0;
2832 * negotiate using PPR ?
2834 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2837 * negotiate wide transfers ?
2839 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2842 * negotiate synchronous transfers?
2844 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2845 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2850 msgptr[msglen++] = M_EXTENDED;
2851 msgptr[msglen++] = 3;
2852 msgptr[msglen++] = M_X_SYNC_REQ;
2853 msgptr[msglen++] = tp->tinfo.goal.period;
2854 msgptr[msglen++] = tp->tinfo.goal.offset;
2857 msgptr[msglen++] = M_EXTENDED;
2858 msgptr[msglen++] = 2;
2859 msgptr[msglen++] = M_X_WIDE_REQ;
2860 msgptr[msglen++] = tp->tinfo.goal.width;
2863 msgptr[msglen++] = M_EXTENDED;
2864 msgptr[msglen++] = 6;
2865 msgptr[msglen++] = M_X_PPR_REQ;
2866 msgptr[msglen++] = tp->tinfo.goal.period;
2867 msgptr[msglen++] = 0;
2868 msgptr[msglen++] = tp->tinfo.goal.offset;
2869 msgptr[msglen++] = tp->tinfo.goal.width;
2870 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2874 cp->nego_status = nego;
2877 tp->nego_cp = cp; /* Keep track a nego will be performed */
2878 if (DEBUG_FLAGS & DEBUG_NEGO) {
2879 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2880 nego == NS_WIDE ? "wide msgout" :
2881 "ppr msgout", msgptr);
2889 * Insert a job into the start queue.
2891 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2895 #ifdef SYM_CONF_IARB_SUPPORT
2897 * If the previously queued CCB is not yet done,
2898 * set the IARB hint. The SCRIPTS will go with IARB
2899 * for this job when starting the previous one.
2900 * We leave devices a chance to win arbitration by
2901 * not using more than 'iarb_max' consecutive
2902 * immediate arbitrations.
2904 if (np->last_cp && np->iarb_count < np->iarb_max) {
2905 np->last_cp->host_flags |= HF_HINT_IARB;
2914 * Insert first the idle task and then our job.
2915 * The MB should ensure proper ordering.
2917 qidx = np->squeueput + 2;
2918 if (qidx >= MAX_QUEUE*2) qidx = 0;
2920 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2922 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2924 np->squeueput = qidx;
2926 if (DEBUG_FLAGS & DEBUG_QUEUE)
2927 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2930 * Script processor may be waiting for reselect.
2934 OUTB (nc_istat, SIGP|np->istat_sem);
2938 * Soft reset the chip.
2940 * Raising SRST when the chip is running may cause
2941 * problems on dual function chips (see below).
2942 * On the other hand, LVD devices need some delay
2943 * to settle and report actual BUS mode in STEST4.
2945 static void sym_chip_reset (hcb_p np)
2947 OUTB (nc_istat, SRST);
2950 UDELAY(2000); /* For BUS MODE to settle */
2954 * Soft reset the chip.
2956 * Some 896 and 876 chip revisions may hang-up if we set
2957 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2959 * So, we need to abort the current operation prior to
2960 * soft resetting the chip.
2962 static void sym_soft_reset (hcb_p np)
2967 OUTB (nc_istat, CABRT);
2968 for (i = 1000000 ; i ; --i) {
2969 istat = INB (nc_istat);
2981 printf("%s: unable to abort current chip operation.\n",
2983 sym_chip_reset (np);
2987 * Start reset process.
2989 * The interrupt handler will reinitialize the chip.
2991 static void sym_start_reset(hcb_p np)
2993 (void) sym_reset_scsi_bus(np, 1);
2996 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3001 sym_soft_reset(np); /* Soft reset the chip */
3003 OUTW (nc_sien, RST);
3005 * Enable Tolerant, reset IRQD if present and
3006 * properly set IRQ mode, prior to resetting the bus.
3008 OUTB (nc_stest3, TE);
3009 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3010 OUTB (nc_scntl1, CRST);
3013 if (!SYM_SETUP_SCSI_BUS_CHECK)
3016 * Check for no terminators or SCSI bus shorts to ground.
3017 * Read SCSI data bus, data parity bits and control signals.
3018 * We are expecting RESET to be TRUE and other signals to be
3021 term = INB(nc_sstat0);
3022 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3023 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3024 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3025 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3026 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3028 if (!(np->features & FE_WIDE))
3031 if (term != (2<<7)) {
3032 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3034 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3035 "0x%lx, expecting 0x%lx\n",
3037 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3038 (u_long)term, (u_long)(2<<7));
3039 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3043 OUTB (nc_scntl1, 0);
3049 * The chip may have completed jobs. Look at the DONE QUEUE.
3051 * On architectures that may reorder LOAD/STORE operations,
3052 * a memory barrier may be needed after the reading of the
3053 * so-called `flag' and prior to dealing with the data.
3055 static int sym_wakeup_done (hcb_p np)
3061 SYM_LOCK_ASSERT(MA_OWNED);
3066 dsa = scr_to_cpu(np->dqueue[i]);
3070 if ((i = i+2) >= MAX_QUEUE*2)
3073 cp = sym_ccb_from_dsa(np, dsa);
3076 sym_complete_ok (np, cp);
3080 printf ("%s: bad DSA (%x) in done queue.\n",
3081 sym_name(np), (u_int) dsa);
3089 * Complete all active CCBs with error.
3090 * Used on CHIP/SCSI RESET.
3092 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3095 * Move all active CCBs to the COMP queue
3096 * and flush this queue.
3098 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3099 sym_que_init(&np->busy_ccbq);
3100 sym_flush_comp_queue(np, cam_status);
3107 * 0: initialisation.
3108 * 1: SCSI BUS RESET delivered or received.
3109 * 2: SCSI BUS MODE changed.
3111 static void sym_init (hcb_p np, int reason)
3116 SYM_LOCK_ASSERT(MA_OWNED);
3119 * Reset chip if asked, otherwise just clear fifos.
3124 OUTB (nc_stest3, TE|CSF);
3125 OUTONB (nc_ctest3, CLF);
3131 phys = np->squeue_ba;
3132 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3133 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3134 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3136 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3139 * Start at first entry.
3146 phys = np->dqueue_ba;
3147 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3149 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3151 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3154 * Start at first entry.
3159 * Install patches in scripts.
3160 * This also let point to first position the start
3161 * and done queue pointers used from SCRIPTS.
3166 * Wakeup all pending jobs.
3168 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3173 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3174 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3176 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3177 /* full arb., ena parity, par->ATN */
3178 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3180 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3182 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3183 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3184 OUTB (nc_istat , SIGP ); /* Signal Process */
3185 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3186 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3188 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3189 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3190 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3192 /* Extended Sreq/Sack filtering not supported on the C10 */
3193 if (np->features & FE_C10)
3194 OUTB (nc_stest2, np->rv_stest2);
3196 OUTB (nc_stest2, EXT|np->rv_stest2);
3198 OUTB (nc_stest3, TE); /* TolerANT enable */
3199 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3202 * For now, disable AIP generation on C1010-66.
3204 if (np->device_id == PCI_ID_LSI53C1010_2)
3205 OUTB (nc_aipcntl1, DISAIP);
3209 * Errant SGE's when in narrow. Write bits 4 & 5 of
3210 * STEST1 register to disable SGE. We probably should do
3211 * that from SCRIPTS for each selection/reselection, but
3212 * I just don't want. :)
3214 if (np->device_id == PCI_ID_LSI53C1010 &&
3215 /* np->revision_id < 0xff */ 1)
3216 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3219 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3220 * Disable overlapped arbitration for some dual function devices,
3221 * regardless revision id (kind of post-chip-design feature. ;-))
3223 if (np->device_id == PCI_ID_SYM53C875)
3224 OUTB (nc_ctest0, (1<<5));
3225 else if (np->device_id == PCI_ID_SYM53C896)
3226 np->rv_ccntl0 |= DPR;
3229 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3230 * and/or hardware phase mismatch, since only such chips
3231 * seem to support those IO registers.
3233 if (np->features & (FE_DAC|FE_NOPM)) {
3234 OUTB (nc_ccntl0, np->rv_ccntl0);
3235 OUTB (nc_ccntl1, np->rv_ccntl1);
3239 * If phase mismatch handled by scripts (895A/896/1010),
3240 * set PM jump addresses.
3242 if (np->features & FE_NOPM) {
3243 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3244 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3248 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3249 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3251 if (np->features & FE_LED0)
3252 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3253 else if (np->features & FE_LEDC)
3254 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3259 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3260 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3263 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3264 * Try to eat the spurious SBMC interrupt that may occur when
3265 * we reset the chip but not the SCSI BUS (at initialization).
3267 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3268 OUTONW (nc_sien, SBMC);
3273 np->scsi_mode = INB (nc_stest4) & SMODE;
3277 * Fill in target structure.
3278 * Reinitialize usrsync.
3279 * Reinitialize usrwide.
3280 * Prepare sync negotiation according to actual SCSI bus mode.
3282 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3283 tcb_p tp = &np->target[i];
3287 tp->head.wval = np->rv_scntl3;
3290 tp->tinfo.current.period = 0;
3291 tp->tinfo.current.offset = 0;
3292 tp->tinfo.current.width = BUS_8_BIT;
3293 tp->tinfo.current.options = 0;
3297 * Download SCSI SCRIPTS to on-chip RAM if present,
3298 * and start script processor.
3301 if (sym_verbose > 1)
3302 printf ("%s: Downloading SCSI SCRIPTS.\n",
3304 if (np->ram_ws == 8192) {
3305 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3306 OUTL (nc_mmws, np->scr_ram_seg);
3307 OUTL (nc_mmrs, np->scr_ram_seg);
3308 OUTL (nc_sfs, np->scr_ram_seg);
3309 phys = SCRIPTB_BA (np, start64);
3312 phys = SCRIPTA_BA (np, init);
3313 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3316 phys = SCRIPTA_BA (np, init);
3320 OUTL (nc_dsa, np->hcb_ba);
3324 * Notify the XPT about the RESET condition.
3327 xpt_async(AC_BUS_RESET, np->path, NULL);
3331 * Get clock factor and sync divisor for a given
3332 * synchronous factor period.
3335 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3337 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3338 int div = np->clock_divn; /* Number of divisors supported */
3339 u32 fak; /* Sync factor in sxfer */
3340 u32 per; /* Period in tenths of ns */
3341 u32 kpc; /* (per * clk) */
3345 * Compute the synchronous period in tenths of nano-seconds
3347 if (dt && sfac <= 9) per = 125;
3348 else if (sfac <= 10) per = 250;
3349 else if (sfac == 11) per = 303;
3350 else if (sfac == 12) per = 500;
3351 else per = 40 * sfac;
3359 * For earliest C10 revision 0, we cannot use extra
3360 * clocks for the setting of the SCSI clocking.
3361 * Note that this limits the lowest sync data transfer
3362 * to 5 Mega-transfers per second and may result in
3363 * using higher clock divisors.
3366 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3368 * Look for the lowest clock divisor that allows an
3369 * output speed not faster than the period.
3373 if (kpc > (div_10M[div] << 2)) {
3378 fak = 0; /* No extra clocks */
3379 if (div == np->clock_divn) { /* Are we too fast ? */
3389 * Look for the greatest clock divisor that allows an
3390 * input speed faster than the period.
3393 if (kpc >= (div_10M[div] << 2)) break;
3396 * Calculate the lowest clock factor that allows an output
3397 * speed not faster than the period, and the max output speed.
3398 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3399 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3402 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3403 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3406 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3407 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3411 * Check against our hardware limits, or bugs :).
3413 if (fak > 2) {fak = 2; ret = -1;}
3416 * Compute and return sync parameters.
3425 * Tell the SCSI layer about the new transfer parameters.
3428 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3430 struct ccb_trans_settings cts;
3431 struct cam_path *path;
3433 tcb_p tp = &np->target[target];
3435 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3437 if (sts != CAM_REQ_CMP)
3440 bzero(&cts, sizeof(cts));
3442 #define cts__scsi (cts.proto_specific.scsi)
3443 #define cts__spi (cts.xport_specific.spi)
3445 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3446 cts.protocol = PROTO_SCSI;
3447 cts.transport = XPORT_SPI;
3448 cts.protocol_version = tp->tinfo.current.scsi_version;
3449 cts.transport_version = tp->tinfo.current.spi_version;
3451 cts__spi.valid = spi_valid;
3452 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3453 cts__spi.sync_period = tp->tinfo.current.period;
3454 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3455 cts__spi.sync_offset = tp->tinfo.current.offset;
3456 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3457 cts__spi.bus_width = tp->tinfo.current.width;
3458 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3459 cts__spi.ppr_options = tp->tinfo.current.options;
3462 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3463 xpt_async(AC_TRANSFER_NEG, path, &cts);
3464 xpt_free_path(path);
3467 #define SYM_SPI_VALID_WDTR \
3468 CTS_SPI_VALID_BUS_WIDTH | \
3469 CTS_SPI_VALID_SYNC_RATE | \
3470 CTS_SPI_VALID_SYNC_OFFSET
3471 #define SYM_SPI_VALID_SDTR \
3472 CTS_SPI_VALID_SYNC_RATE | \
3473 CTS_SPI_VALID_SYNC_OFFSET
3474 #define SYM_SPI_VALID_PPR \
3475 CTS_SPI_VALID_PPR_OPTIONS | \
3476 CTS_SPI_VALID_BUS_WIDTH | \
3477 CTS_SPI_VALID_SYNC_RATE | \
3478 CTS_SPI_VALID_SYNC_OFFSET
3481 * We received a WDTR.
3482 * Let everything be aware of the changes.
3484 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3486 tcb_p tp = &np->target[cp->target];
3488 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3491 * Tell the SCSI layer about the new transfer parameters.
3493 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3494 tp->tinfo.current.offset = 0;
3495 tp->tinfo.current.period = 0;
3496 tp->tinfo.current.options = 0;
3498 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3502 * We received a SDTR.
3503 * Let everything be aware of the changes.
3506 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3508 tcb_p tp = &np->target[cp->target];
3509 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3511 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3514 * Tell the SCSI layer about the new transfer parameters.
3516 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3517 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3518 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3520 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3524 * We received a PPR.
3525 * Let everything be aware of the changes.
3527 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3528 u_char per, u_char wide, u_char div, u_char fak)
3530 tcb_p tp = &np->target[cp->target];
3532 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3535 * Tell the SCSI layer about the new transfer parameters.
3537 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3538 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3539 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3540 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3542 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3546 * Switch trans mode for current job and it's target.
3548 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3549 u_char per, u_char wide, u_char div, u_char fak)
3554 u_char target = INB (nc_sdid) & 0x0f;
3555 u_char sval, wval, uval;
3562 assert (target == (cp->target & 0xf));
3563 tp = &np->target[target];
3565 sval = tp->head.sval;
3566 wval = tp->head.wval;
3567 uval = tp->head.uval;
3570 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3571 sval, wval, uval, np->rv_scntl3);
3576 if (!(np->features & FE_C10))
3577 sval = (sval & ~0x1f) | ofs;
3579 sval = (sval & ~0x3f) | ofs;
3582 * Set the sync divisor and extra clock factor.
3585 wval = (wval & ~0x70) | ((div+1) << 4);
3586 if (!(np->features & FE_C10))
3587 sval = (sval & ~0xe0) | (fak << 5);
3589 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3590 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3591 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3596 * Set the bus width.
3603 * Set misc. ultra enable bits.
3605 if (np->features & FE_C10) {
3606 uval = uval & ~(U3EN|AIPCKEN);
3608 assert(np->features & FE_U3EN);
3613 wval = wval & ~ULTRA;
3614 if (per <= 12) wval |= ULTRA;
3618 * Stop there if sync parameters are unchanged.
3620 if (tp->head.sval == sval &&
3621 tp->head.wval == wval &&
3622 tp->head.uval == uval)
3624 tp->head.sval = sval;
3625 tp->head.wval = wval;
3626 tp->head.uval = uval;
3629 * Disable extended Sreq/Sack filtering if per < 50.
3630 * Not supported on the C1010.
3632 if (per < 50 && !(np->features & FE_C10))
3633 OUTOFFB (nc_stest2, EXT);
3636 * set actual value and sync_status
3638 OUTB (nc_sxfer, tp->head.sval);
3639 OUTB (nc_scntl3, tp->head.wval);
3641 if (np->features & FE_C10) {
3642 OUTB (nc_scntl4, tp->head.uval);
3646 * patch ALL busy ccbs of this target.
3648 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3649 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3650 if (cp->target != target)
3652 cp->phys.select.sel_scntl3 = tp->head.wval;
3653 cp->phys.select.sel_sxfer = tp->head.sval;
3654 if (np->features & FE_C10) {
3655 cp->phys.select.sel_scntl4 = tp->head.uval;
3661 * log message for real hard errors
3663 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3664 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3666 * exception register:
3671 * so: control lines as driven by chip.
3672 * si: control lines as seen by chip.
3673 * sd: scsi data lines as seen by chip.
3676 * sxfer: (see the manual)
3677 * scntl3: (see the manual)
3679 * current script command:
3680 * dsp: script address (relative to start of script).
3681 * dbc: first word of script command.
3683 * First 24 register of the chip:
3686 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3692 u_char *script_base;
3697 if (dsp > np->scripta_ba &&
3698 dsp <= np->scripta_ba + np->scripta_sz) {
3699 script_ofs = dsp - np->scripta_ba;
3700 script_size = np->scripta_sz;
3701 script_base = (u_char *) np->scripta0;
3702 script_name = "scripta";
3704 else if (np->scriptb_ba < dsp &&
3705 dsp <= np->scriptb_ba + np->scriptb_sz) {
3706 script_ofs = dsp - np->scriptb_ba;
3707 script_size = np->scriptb_sz;
3708 script_base = (u_char *) np->scriptb0;
3709 script_name = "scriptb";
3714 script_name = "mem";
3717 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3718 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3719 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3720 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3721 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3722 (unsigned)INL (nc_dbc));
3724 if (((script_ofs & 3) == 0) &&
3725 (unsigned)script_ofs < script_size) {
3726 printf ("%s: script cmd = %08x\n", sym_name(np),
3727 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3730 printf ("%s: regdump:", sym_name(np));
3732 printf (" %02x", (unsigned)INB_OFF(i));
3736 * PCI BUS error, read the PCI ststus register.
3738 if (dstat & (MDPE|BF)) {
3740 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3741 if (pci_sts & 0xf900) {
3742 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3743 printf("%s: PCI STATUS = 0x%04x\n",
3744 sym_name(np), pci_sts & 0xf900);
3750 * chip interrupt handler
3752 * In normal situations, interrupt conditions occur one at
3753 * a time. But when something bad happens on the SCSI BUS,
3754 * the chip may raise several interrupt flags before
3755 * stopping and interrupting the CPU. The additionnal
3756 * interrupt flags are stacked in some extra registers
3757 * after the SIP and/or DIP flag has been raised in the
3758 * ISTAT. After the CPU has read the interrupt condition
3759 * flag from SIST or DSTAT, the chip unstacks the other
3760 * interrupt flags and sets the corresponding bits in
3761 * SIST or DSTAT. Since the chip starts stacking once the
3762 * SIP or DIP flag is set, there is a small window of time
3763 * where the stacking does not occur.
3765 * Typically, multiple interrupt conditions may happen in
3766 * the following situations:
3768 * - SCSI parity error + Phase mismatch (PAR|MA)
3769 * When a parity error is detected in input phase
3770 * and the device switches to msg-in phase inside a
3772 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3773 * When a stupid device does not want to handle the
3774 * recovery of an SCSI parity error.
3775 * - Some combinations of STO, PAR, UDC, ...
3776 * When using non compliant SCSI stuff, when user is
3777 * doing non compliant hot tampering on the BUS, when
3778 * something really bad happens to a device, etc ...
3780 * The heuristic suggested by SYMBIOS to handle
3781 * multiple interrupts is to try unstacking all
3782 * interrupts conditions and to handle them on some
3783 * priority based on error severity.
3784 * This will work when the unstacking has been
3785 * successful, but we cannot be 100 % sure of that,
3786 * since the CPU may have been faster to unstack than
3787 * the chip is able to stack. Hmmm ... But it seems that
3788 * such a situation is very unlikely to happen.
3790 * If this happen, for example STO caught by the CPU
3791 * then UDC happenning before the CPU have restarted
3792 * the SCRIPTS, the driver may wrongly complete the
3793 * same command on UDC, since the SCRIPTS didn't restart
3794 * and the DSA still points to the same command.
3795 * We avoid this situation by setting the DSA to an
3796 * invalid value when the CCB is completed and before
3797 * restarting the SCRIPTS.
3799 * Another issue is that we need some section of our
3800 * recovery procedures to be somehow uninterruptible but
3801 * the SCRIPTS processor does not provides such a
3802 * feature. For this reason, we handle recovery preferently
3803 * from the C code and check against some SCRIPTS critical
3804 * sections from the C code.
3806 * Hopefully, the interrupt handling of the driver is now
3807 * able to resist to weird BUS error conditions, but donnot
3808 * ask me for any guarantee that it will never fail. :-)
3809 * Use at your own decision and risk.
3811 static void sym_intr1 (hcb_p np)
3813 u_char istat, istatc;
3817 SYM_LOCK_ASSERT(MA_OWNED);
3820 * interrupt on the fly ?
3822 * A `dummy read' is needed to ensure that the
3823 * clear of the INTF flag reaches the device
3824 * before the scanning of the DONE queue.
3826 istat = INB (nc_istat);
3828 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3829 istat = INB (nc_istat); /* DUMMY READ */
3830 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3831 (void)sym_wakeup_done (np);
3834 if (!(istat & (SIP|DIP)))
3837 #if 0 /* We should never get this one */
3839 OUTB (nc_istat, CABRT);
3843 * PAR and MA interrupts may occur at the same time,
3844 * and we need to know of both in order to handle
3845 * this situation properly. We try to unstack SCSI
3846 * interrupts for that reason. BTW, I dislike a LOT
3847 * such a loop inside the interrupt routine.
3848 * Even if DMA interrupt stacking is very unlikely to
3849 * happen, we also try unstacking these ones, since
3850 * this has no performance impact.
3857 sist |= INW (nc_sist);
3859 dstat |= INB (nc_dstat);
3860 istatc = INB (nc_istat);
3862 } while (istatc & (SIP|DIP));
3864 if (DEBUG_FLAGS & DEBUG_TINY)
3865 printf ("<%d|%x:%x|%x:%x>",
3868 (unsigned)INL(nc_dsp),
3869 (unsigned)INL(nc_dbc));
3871 * On paper, a memory barrier may be needed here.
3872 * And since we are paranoid ... :)
3877 * First, interrupts we want to service cleanly.
3879 * Phase mismatch (MA) is the most frequent interrupt
3880 * for chip earlier than the 896 and so we have to service
3881 * it as quickly as possible.
3882 * A SCSI parity error (PAR) may be combined with a phase
3883 * mismatch condition (MA).
3884 * Programmed interrupts (SIR) are used to call the C code
3886 * The single step interrupt (SSI) is not used in this
3889 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3890 !(dstat & (MDPE|BF|ABRT|IID))) {
3891 if (sist & PAR) sym_int_par (np, sist);
3892 else if (sist & MA) sym_int_ma (np);
3893 else if (dstat & SIR) sym_int_sir (np);
3894 else if (dstat & SSI) OUTONB_STD ();
3895 else goto unknown_int;
3900 * Now, interrupts that donnot happen in normal
3901 * situations and that we may need to recover from.
3903 * On SCSI RESET (RST), we reset everything.
3904 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3905 * active CCBs with RESET status, prepare all devices
3906 * for negotiating again and restart the SCRIPTS.
3907 * On STO and UDC, we complete the CCB with the corres-
3908 * ponding status and restart the SCRIPTS.
3911 xpt_print_path(np->path);
3912 printf("SCSI BUS reset detected.\n");
3917 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3918 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3920 if (!(sist & (GEN|HTH|SGE)) &&
3921 !(dstat & (MDPE|BF|ABRT|IID))) {
3922 if (sist & SBMC) sym_int_sbmc (np);
3923 else if (sist & STO) sym_int_sto (np);
3924 else if (sist & UDC) sym_int_udc (np);
3925 else goto unknown_int;
3930 * Now, interrupts we are not able to recover cleanly.
3932 * Log message for hard errors.
3936 sym_log_hard_error(np, sist, dstat);
3938 if ((sist & (GEN|HTH|SGE)) ||
3939 (dstat & (MDPE|BF|ABRT|IID))) {
3940 sym_start_reset(np);
3946 * We just miss the cause of the interrupt. :(
3947 * Print a message. The timeout will do the real work.
3949 printf( "%s: unknown interrupt(s) ignored, "
3950 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
3951 sym_name(np), istat, dstat, sist);
3954 static void sym_intr(void *arg)
3960 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3961 sym_intr1((hcb_p) arg);
3962 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
3967 static void sym_poll(struct cam_sim *sim)
3969 sym_intr1(cam_sim_softc(sim));
3973 * generic recovery from scsi interrupt
3975 * The doc says that when the chip gets an SCSI interrupt,
3976 * it tries to stop in an orderly fashion, by completing
3977 * an instruction fetch that had started or by flushing
3978 * the DMA fifo for a write to memory that was executing.
3979 * Such a fashion is not enough to know if the instruction
3980 * that was just before the current DSP value has been
3983 * There are some small SCRIPTS sections that deal with
3984 * the start queue and the done queue that may break any
3985 * assomption from the C code if we are interrupted
3986 * inside, so we reset if this happens. Btw, since these
3987 * SCRIPTS sections are executed while the SCRIPTS hasn't
3988 * started SCSI operations, it is very unlikely to happen.
3990 * All the driver data structures are supposed to be
3991 * allocated from the same 4 GB memory window, so there
3992 * is a 1 to 1 relationship between DSA and driver data
3993 * structures. Since we are careful :) to invalidate the
3994 * DSA when we complete a command or when the SCRIPTS
3995 * pushes a DSA into a queue, we can trust it when it
3998 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4000 u32 dsp = INL (nc_dsp);
4001 u32 dsa = INL (nc_dsa);
4002 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4005 * If we haven't been interrupted inside the SCRIPTS
4006 * critical paths, we can safely restart the SCRIPTS
4007 * and trust the DSA value if it matches a CCB.
4009 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4010 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4011 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4012 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4013 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4014 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4015 (!(dsp > SCRIPTA_BA (np, done) &&
4016 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4017 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4018 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4020 * If we have a CCB, let the SCRIPTS call us back for
4021 * the handling of the error with SCRATCHA filled with
4022 * STARTPOS. This way, we will be able to freeze the
4023 * device queue and requeue awaiting IOs.
4026 cp->host_status = hsts;
4027 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4030 * Otherwise just restart the SCRIPTS.
4033 OUTL (nc_dsa, 0xffffff);
4034 OUTL_DSP (SCRIPTA_BA (np, start));
4043 sym_start_reset(np);
4047 * chip exception handler for selection timeout
4049 static void sym_int_sto (hcb_p np)
4051 u32 dsp = INL (nc_dsp);
4053 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4055 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4056 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4058 sym_start_reset(np);
4062 * chip exception handler for unexpected disconnect
4064 static void sym_int_udc (hcb_p np)
4066 printf ("%s: unexpected disconnect\n", sym_name(np));
4067 sym_recover_scsi_int(np, HS_UNEXPECTED);
4071 * chip exception handler for SCSI bus mode change
4073 * spi2-r12 11.2.3 says a transceiver mode change must
4074 * generate a reset event and a device that detects a reset
4075 * event shall initiate a hard reset. It says also that a
4076 * device that detects a mode change shall set data transfer
4077 * mode to eight bit asynchronous, etc...
4078 * So, just reinitializing all except chip should be enough.
4080 static void sym_int_sbmc (hcb_p np)
4082 u_char scsi_mode = INB (nc_stest4) & SMODE;
4087 xpt_print_path(np->path);
4088 printf("SCSI BUS mode change from %s to %s.\n",
4089 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4092 * Should suspend command processing for a few seconds and
4093 * reinitialize all except the chip.
4099 * chip exception handler for SCSI parity error.
4101 * When the chip detects a SCSI parity error and is
4102 * currently executing a (CH)MOV instruction, it does
4103 * not interrupt immediately, but tries to finish the
4104 * transfer of the current scatter entry before
4105 * interrupting. The following situations may occur:
4107 * - The complete scatter entry has been transferred
4108 * without the device having changed phase.
4109 * The chip will then interrupt with the DSP pointing
4110 * to the instruction that follows the MOV.
4112 * - A phase mismatch occurs before the MOV finished
4113 * and phase errors are to be handled by the C code.
4114 * The chip will then interrupt with both PAR and MA
4117 * - A phase mismatch occurs before the MOV finished and
4118 * phase errors are to be handled by SCRIPTS.
4119 * The chip will load the DSP with the phase mismatch
4120 * JUMP address and interrupt the host processor.
4122 static void sym_int_par (hcb_p np, u_short sist)
4124 u_char hsts = INB (HS_PRT);
4125 u32 dsp = INL (nc_dsp);
4126 u32 dbc = INL (nc_dbc);
4127 u32 dsa = INL (nc_dsa);
4128 u_char sbcl = INB (nc_sbcl);
4129 u_char cmd = dbc >> 24;
4130 int phase = cmd & 7;
4131 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4133 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4134 sym_name(np), hsts, dbc, sbcl);
4137 * Check that the chip is connected to the SCSI BUS.
4139 if (!(INB (nc_scntl1) & ISCON)) {
4140 sym_recover_scsi_int(np, HS_UNEXPECTED);
4145 * If the nexus is not clearly identified, reset the bus.
4146 * We will try to do better later.
4152 * Check instruction was a MOV, direction was INPUT and
4155 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4159 * Keep track of the parity error.
4161 OUTONB (HF_PRT, HF_EXT_ERR);
4162 cp->xerr_status |= XE_PARITY_ERR;
4165 * Prepare the message to send to the device.
4167 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4170 * If the old phase was DATA IN phase, we have to deal with
4171 * the 3 situations described above.
4172 * For other input phases (MSG IN and STATUS), the device
4173 * must resend the whole thing that failed parity checking
4174 * or signal error. So, jumping to dispatcher should be OK.
4176 if (phase == 1 || phase == 5) {
4177 /* Phase mismatch handled by SCRIPTS */
4178 if (dsp == SCRIPTB_BA (np, pm_handle))
4180 /* Phase mismatch handled by the C code */
4183 /* No phase mismatch occurred */
4185 OUTL (nc_temp, dsp);
4186 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4190 OUTL_DSP (SCRIPTA_BA (np, clrack));
4194 sym_start_reset(np);
4198 * chip exception handler for phase errors.
4200 * We have to construct a new transfer descriptor,
4201 * to transfer the rest of the current block.
4203 static void sym_int_ma (hcb_p np)
4216 u_char hflags, hflags0;
4225 rest = dbc & 0xffffff;
4229 * locate matching cp if any.
4231 cp = sym_ccb_from_dsa(np, dsa);
4234 * Donnot take into account dma fifo and various buffers in
4235 * INPUT phase since the chip flushes everything before
4236 * raising the MA interrupt for interrupted INPUT phases.
4237 * For DATA IN phase, we will check for the SWIDE later.
4239 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4242 if (np->features & FE_DFBC)
4243 delta = INW (nc_dfbc);
4248 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4250 dfifo = INL(nc_dfifo);
4253 * Calculate remaining bytes in DMA fifo.
4254 * (CTEST5 = dfifo >> 16)
4256 if (dfifo & (DFS << 16))
4257 delta = ((((dfifo >> 8) & 0x300) |
4258 (dfifo & 0xff)) - rest) & 0x3ff;
4260 delta = ((dfifo & 0xff) - rest) & 0x7f;
4264 * The data in the dma fifo has not been transferred to
4265 * the target -> add the amount to the rest
4266 * and clear the data.
4267 * Check the sstat2 register in case of wide transfer.
4270 ss0 = INB (nc_sstat0);
4271 if (ss0 & OLF) rest++;
4272 if (!(np->features & FE_C10))
4273 if (ss0 & ORF) rest++;
4274 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4275 ss2 = INB (nc_sstat2);
4276 if (ss2 & OLF1) rest++;
4277 if (!(np->features & FE_C10))
4278 if (ss2 & ORF1) rest++;
4284 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4285 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4289 * log the information
4291 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4292 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4293 (unsigned) rest, (unsigned) delta);
4296 * try to find the interrupted script command,
4297 * and the address at which to continue.
4301 if (dsp > np->scripta_ba &&
4302 dsp <= np->scripta_ba + np->scripta_sz) {
4303 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4306 else if (dsp > np->scriptb_ba &&
4307 dsp <= np->scriptb_ba + np->scriptb_sz) {
4308 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4313 * log the information
4315 if (DEBUG_FLAGS & DEBUG_PHASE) {
4316 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4317 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4321 printf ("%s: interrupted SCRIPT address not found.\n",
4327 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4333 * get old startaddress and old length.
4335 oadr = scr_to_cpu(vdsp[1]);
4337 if (cmd & 0x10) { /* Table indirect */
4338 tblp = (u32 *) ((char*) &cp->phys + oadr);
4339 olen = scr_to_cpu(tblp[0]);
4340 oadr = scr_to_cpu(tblp[1]);
4343 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4346 if (DEBUG_FLAGS & DEBUG_PHASE) {
4347 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4348 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4355 * check cmd against assumed interrupted script command.
4356 * If dt data phase, the MOVE instruction hasn't bit 4 of
4359 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4361 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4362 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4368 * if old phase not dataphase, leave here.
4372 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4373 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4374 (unsigned)oadr, (unsigned)rest);
4375 goto unexpected_phase;
4379 * Choose the correct PM save area.
4381 * Look at the PM_SAVE SCRIPT if you want to understand
4382 * this stuff. The equivalent code is implemented in
4383 * SCRIPTS for the 895A, 896 and 1010 that are able to
4384 * handle PM from the SCRIPTS processor.
4386 hflags0 = INB (HF_PRT);
4389 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4390 if (hflags & HF_IN_PM0)
4391 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4392 else if (hflags & HF_IN_PM1)
4393 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4395 if (hflags & HF_DP_SAVED)
4396 hflags ^= HF_ACT_PM;
4399 if (!(hflags & HF_ACT_PM)) {
4401 newcmd = SCRIPTA_BA (np, pm0_data);
4405 newcmd = SCRIPTA_BA (np, pm1_data);
4408 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4409 if (hflags != hflags0)
4410 OUTB (HF_PRT, hflags);
4413 * fillin the phase mismatch context
4415 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4416 pm->sg.size = cpu_to_scr(rest);
4417 pm->ret = cpu_to_scr(nxtdsp);
4420 * If we have a SWIDE,
4421 * - prepare the address to write the SWIDE from SCRIPTS,
4422 * - compute the SCRIPTS address to restart from,
4423 * - move current data pointer context by one byte.
4425 nxtdsp = SCRIPTA_BA (np, dispatch);
4426 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4427 (INB (nc_scntl2) & WSR)) {
4431 * Set up the table indirect for the MOVE
4432 * of the residual byte and adjust the data
4435 tmp = scr_to_cpu(pm->sg.addr);
4436 cp->phys.wresid.addr = cpu_to_scr(tmp);
4437 pm->sg.addr = cpu_to_scr(tmp + 1);
4438 tmp = scr_to_cpu(pm->sg.size);
4439 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4440 pm->sg.size = cpu_to_scr(tmp - 1);
4443 * If only the residual byte is to be moved,
4444 * no PM context is needed.
4446 if ((tmp&0xffffff) == 1)
4450 * Prepare the address of SCRIPTS that will
4451 * move the residual byte to memory.
4453 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4456 if (DEBUG_FLAGS & DEBUG_PHASE) {
4458 printf ("PM %x %x %x / %x %x %x.\n",
4459 hflags0, hflags, newcmd,
4460 (unsigned)scr_to_cpu(pm->sg.addr),
4461 (unsigned)scr_to_cpu(pm->sg.size),
4462 (unsigned)scr_to_cpu(pm->ret));
4466 * Restart the SCRIPTS processor.
4468 OUTL (nc_temp, newcmd);
4473 * Unexpected phase changes that occurs when the current phase
4474 * is not a DATA IN or DATA OUT phase are due to error conditions.
4475 * Such event may only happen when the SCRIPTS is using a
4476 * multibyte SCSI MOVE.
4478 * Phase change Some possible cause
4480 * COMMAND --> MSG IN SCSI parity error detected by target.
4481 * COMMAND --> STATUS Bad command or refused by target.
4482 * MSG OUT --> MSG IN Message rejected by target.
4483 * MSG OUT --> COMMAND Bogus target that discards extended
4484 * negotiation messages.
4486 * The code below does not care of the new phase and so
4487 * trusts the target. Why to annoy it ?
4488 * If the interrupted phase is COMMAND phase, we restart at
4490 * If a target does not get all the messages after selection,
4491 * the code assumes blindly that the target discards extended
4492 * messages and clears the negotiation status.
4493 * If the target does not want all our response to negotiation,
4494 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4495 * bloat for such a should_not_happen situation).
4496 * In all other situation, we reset the BUS.
4497 * Are these assumptions reasonnable ? (Wait and see ...)
4504 case 2: /* COMMAND phase */
4505 nxtdsp = SCRIPTA_BA (np, dispatch);
4508 case 3: /* STATUS phase */
4509 nxtdsp = SCRIPTA_BA (np, dispatch);
4512 case 6: /* MSG OUT phase */
4514 * If the device may want to use untagged when we want
4515 * tagged, we prepare an IDENTIFY without disc. granted,
4516 * since we will not be able to handle reselect.
4517 * Otherwise, we just don't care.
4519 if (dsp == SCRIPTA_BA (np, send_ident)) {
4520 if (cp->tag != NO_TAG && olen - rest <= 3) {
4521 cp->host_status = HS_BUSY;
4522 np->msgout[0] = M_IDENTIFY | cp->lun;
4523 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4526 nxtdsp = SCRIPTB_BA (np, ident_break);
4528 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4529 dsp == SCRIPTB_BA (np, send_sdtr) ||
4530 dsp == SCRIPTB_BA (np, send_ppr)) {
4531 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4535 case 7: /* MSG IN phase */
4536 nxtdsp = SCRIPTA_BA (np, clrack);
4547 sym_start_reset(np);
4551 * Dequeue from the START queue all CCBs that match
4552 * a given target/lun/task condition (-1 means all),
4553 * and move them from the BUSY queue to the COMP queue
4554 * with CAM_REQUEUE_REQ status condition.
4555 * This function is used during error handling/recovery.
4556 * It is called with SCRIPTS not running.
4559 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4565 * Make sure the starting index is within range.
4567 assert((i >= 0) && (i < 2*MAX_QUEUE));
4570 * Walk until end of START queue and dequeue every job
4571 * that matches the target/lun/task condition.
4574 while (i != np->squeueput) {
4575 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4577 #ifdef SYM_CONF_IARB_SUPPORT
4578 /* Forget hints for IARB, they may be no longer relevant */
4579 cp->host_flags &= ~HF_HINT_IARB;
4581 if ((target == -1 || cp->target == target) &&
4582 (lun == -1 || cp->lun == lun) &&
4583 (task == -1 || cp->tag == task)) {
4584 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4585 sym_remque(&cp->link_ccbq);
4586 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4590 np->squeue[j] = np->squeue[i];
4591 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4593 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4595 if (i != j) /* Copy back the idle task if needed */
4596 np->squeue[j] = np->squeue[i];
4597 np->squeueput = j; /* Update our current start queue pointer */
4603 * Complete all CCBs queued to the COMP queue.
4605 * These CCBs are assumed:
4606 * - Not to be referenced either by devices or
4607 * SCRIPTS-related queues and datas.
4608 * - To have to be completed with an error condition
4611 * The device queue freeze count is incremented
4612 * for each CCB that does not prevent this.
4613 * This function is called when all CCBs involved
4614 * in error handling/recovery have been reaped.
4617 sym_flush_comp_queue(hcb_p np, int cam_status)
4622 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
4624 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4625 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4626 /* Leave quiet CCBs waiting for resources */
4627 if (cp->host_status == HS_WAIT)
4631 sym_set_cam_status(ccb, cam_status);
4632 sym_freeze_cam_ccb(ccb);
4633 sym_xpt_done(np, ccb, cp);
4634 sym_free_ccb(np, cp);
4639 * chip handler for bad SCSI status condition
4641 * In case of bad SCSI status, we unqueue all the tasks
4642 * currently queued to the controller but not yet started
4643 * and then restart the SCRIPTS processor immediately.
4645 * QUEUE FULL and BUSY conditions are handled the same way.
4646 * Basically all the not yet started tasks are requeued in
4647 * device queue and the queue is frozen until a completion.
4649 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4650 * the CCB of the failed command to prepare a REQUEST SENSE
4651 * SCSI command and queue it to the controller queue.
4653 * SCRATCHA is assumed to have been loaded with STARTPOS
4654 * before the SCRIPTS called the C code.
4656 static void sym_sir_bad_scsi_status(hcb_p np, ccb_p cp)
4658 tcb_p tp = &np->target[cp->target];
4660 u_char s_status = cp->ssss_status;
4661 u_char h_flags = cp->host_flags;
4666 SYM_LOCK_ASSERT(MA_OWNED);
4669 * Compute the index of the next job to start from SCRIPTS.
4671 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4674 * The last CCB queued used for IARB hint may be
4675 * no longer relevant. Forget it.
4677 #ifdef SYM_CONF_IARB_SUPPORT
4683 * Now deal with the SCSI status.
4688 if (sym_verbose >= 2) {
4690 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4692 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4693 sym_complete_error (np, cp);
4698 * If we get an SCSI error when requesting sense, give up.
4700 if (h_flags & HF_SENSE) {
4701 sym_complete_error (np, cp);
4706 * Dequeue all queued CCBs for that device not yet started,
4707 * and restart the SCRIPTS processor immediately.
4709 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4710 OUTL_DSP (SCRIPTA_BA (np, start));
4713 * Save some info of the actual IO.
4714 * Compute the data residual.
4716 cp->sv_scsi_status = cp->ssss_status;
4717 cp->sv_xerr_status = cp->xerr_status;
4718 cp->sv_resid = sym_compute_residual(np, cp);
4721 * Prepare all needed data structures for
4722 * requesting sense data.
4728 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4732 * If we are currently using anything different from
4733 * async. 8 bit data transfers with that target,
4734 * start a negotiation, since the device may want
4735 * to report us a UNIT ATTENTION condition due to
4736 * a cause we currently ignore, and we donnot want
4737 * to be stuck with WIDE and/or SYNC data transfer.
4739 * cp->nego_status is filled by sym_prepare_nego().
4741 cp->nego_status = 0;
4743 if (tp->tinfo.current.options & PPR_OPT_MASK)
4745 else if (tp->tinfo.current.width != BUS_8_BIT)
4747 else if (tp->tinfo.current.offset != 0)
4751 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4753 * Message table indirect structure.
4755 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4756 cp->phys.smsg.size = cpu_to_scr(msglen);
4761 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4762 cp->phys.cmd.size = cpu_to_scr(6);
4765 * patch requested size into sense command
4767 cp->sensecmd[0] = 0x03;
4768 cp->sensecmd[1] = cp->lun << 5;
4769 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4770 cp->sensecmd[1] = 0;
4771 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4772 cp->data_len = SYM_SNS_BBUF_LEN;
4777 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4778 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4779 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4782 * requeue the command.
4784 startp = SCRIPTB_BA (np, sdata_in);
4786 cp->phys.head.savep = cpu_to_scr(startp);
4787 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4788 cp->phys.head.lastp = cpu_to_scr(startp);
4789 cp->startp = cpu_to_scr(startp);
4791 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4792 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4793 cp->ssss_status = S_ILLEGAL;
4794 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4795 cp->xerr_status = 0;
4796 cp->extra_bytes = 0;
4798 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4801 * Requeue the command.
4803 sym_put_start_queue(np, cp);
4806 * Give back to upper layer everything we have dequeued.
4808 sym_flush_comp_queue(np, 0);
4814 * After a device has accepted some management message
4815 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4816 * a device signals a UNIT ATTENTION condition, some
4817 * tasks are thrown away by the device. We are required
4818 * to reflect that on our tasks list since the device
4819 * will never complete these tasks.
4821 * This function move from the BUSY queue to the COMP
4822 * queue all disconnected CCBs for a given target that
4823 * match the following criteria:
4824 * - lun=-1 means any logical UNIT otherwise a given one.
4825 * - task=-1 means any task, otherwise a given one.
4828 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4830 SYM_QUEHEAD qtmp, *qp;
4835 * Move the entire BUSY queue to our temporary queue.
4837 sym_que_init(&qtmp);
4838 sym_que_splice(&np->busy_ccbq, &qtmp);
4839 sym_que_init(&np->busy_ccbq);
4842 * Put all CCBs that matches our criteria into
4843 * the COMP queue and put back other ones into
4846 while ((qp = sym_remque_head(&qtmp)) != NULL) {
4848 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4850 if (cp->host_status != HS_DISCONNECT ||
4851 cp->target != target ||
4852 (lun != -1 && cp->lun != lun) ||
4854 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4855 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4858 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4860 /* Preserve the software timeout condition */
4861 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4862 sym_set_cam_status(ccb, cam_status);
4865 printf("XXXX TASK @%p CLEARED\n", cp);
4872 * chip handler for TASKS recovery
4874 * We cannot safely abort a command, while the SCRIPTS
4875 * processor is running, since we just would be in race
4878 * As long as we have tasks to abort, we keep the SEM
4879 * bit set in the ISTAT. When this bit is set, the
4880 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4881 * each time it enters the scheduler.
4883 * If we have to reset a target, clear tasks of a unit,
4884 * or to perform the abort of a disconnected job, we
4885 * restart the SCRIPTS for selecting the target. Once
4886 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4887 * If it loses arbitration, the SCRIPTS will interrupt again
4888 * the next time it will enter its scheduler, and so on ...
4890 * On SIR_TARGET_SELECTED, we scan for the more
4891 * appropriate thing to do:
4893 * - If nothing, we just sent a M_ABORT message to the
4894 * target to get rid of the useless SCSI bus ownership.
4895 * According to the specs, no tasks shall be affected.
4896 * - If the target is to be reset, we send it a M_RESET
4898 * - If a logical UNIT is to be cleared , we send the
4899 * IDENTIFY(lun) + M_ABORT.
4900 * - If an untagged task is to be aborted, we send the
4901 * IDENTIFY(lun) + M_ABORT.
4902 * - If a tagged task is to be aborted, we send the
4903 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4905 * Once our 'kiss of death' :) message has been accepted
4906 * by the target, the SCRIPTS interrupts again
4907 * (SIR_ABORT_SENT). On this interrupt, we complete
4908 * all the CCBs that should have been aborted by the
4909 * target according to our message.
4911 static void sym_sir_task_recovery(hcb_p np, int num)
4916 int target=-1, lun=-1, task;
4921 * The SCRIPTS processor stopped before starting
4922 * the next command in order to allow us to perform
4923 * some task recovery.
4925 case SIR_SCRIPT_STOPPED:
4927 * Do we have any target to reset or unit to clear ?
4929 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4930 tp = &np->target[i];
4932 (tp->lun0p && tp->lun0p->to_clear)) {
4938 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4939 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
4949 * If not, walk the busy queue for any
4950 * disconnected CCB to be aborted.
4953 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4954 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
4955 if (cp->host_status != HS_DISCONNECT)
4958 target = cp->target;
4965 * If some target is to be selected,
4966 * prepare and start the selection.
4969 tp = &np->target[target];
4970 np->abrt_sel.sel_id = target;
4971 np->abrt_sel.sel_scntl3 = tp->head.wval;
4972 np->abrt_sel.sel_sxfer = tp->head.sval;
4973 OUTL(nc_dsa, np->hcb_ba);
4974 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
4979 * Now look for a CCB to abort that haven't started yet.
4980 * Btw, the SCRIPTS processor is still stopped, so
4981 * we are not in race.
4985 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4986 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4987 if (cp->host_status != HS_BUSY &&
4988 cp->host_status != HS_NEGOTIATE)
4992 #ifdef SYM_CONF_IARB_SUPPORT
4994 * If we are using IMMEDIATE ARBITRATION, we donnot
4995 * want to cancel the last queued CCB, since the
4996 * SCRIPTS may have anticipated the selection.
4998 if (cp == np->last_cp) {
5003 i = 1; /* Means we have found some */
5008 * We are done, so we donnot need
5009 * to synchronize with the SCRIPTS anylonger.
5010 * Remove the SEM flag from the ISTAT.
5013 OUTB (nc_istat, SIGP);
5017 * Compute index of next position in the start
5018 * queue the SCRIPTS intends to start and dequeue
5019 * all CCBs for that device that haven't been started.
5021 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5022 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5025 * Make sure at least our IO to abort has been dequeued.
5027 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5030 * Keep track in cam status of the reason of the abort.
5032 if (cp->to_abort == 2)
5033 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5035 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5038 * Complete with error everything that we have dequeued.
5040 sym_flush_comp_queue(np, 0);
5043 * The SCRIPTS processor has selected a target
5044 * we may have some manual recovery to perform for.
5046 case SIR_TARGET_SELECTED:
5047 target = (INB (nc_sdid) & 0xf);
5048 tp = &np->target[target];
5050 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5053 * If the target is to be reset, prepare a
5054 * M_RESET message and clear the to_reset flag
5055 * since we donnot expect this operation to fail.
5058 np->abrt_msg[0] = M_RESET;
5059 np->abrt_tbl.size = 1;
5065 * Otherwise, look for some logical unit to be cleared.
5067 if (tp->lun0p && tp->lun0p->to_clear)
5069 else if (tp->lunmp) {
5070 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5071 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5079 * If a logical unit is to be cleared, prepare
5080 * an IDENTIFY(lun) + ABORT MESSAGE.
5083 lcb_p lp = sym_lp(tp, lun);
5084 lp->to_clear = 0; /* We donnot expect to fail here */
5085 np->abrt_msg[0] = M_IDENTIFY | lun;
5086 np->abrt_msg[1] = M_ABORT;
5087 np->abrt_tbl.size = 2;
5092 * Otherwise, look for some disconnected job to
5093 * abort for this target.
5097 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5098 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5099 if (cp->host_status != HS_DISCONNECT)
5101 if (cp->target != target)
5105 i = 1; /* Means we have some */
5110 * If we have none, probably since the device has
5111 * completed the command before we won abitration,
5112 * send a M_ABORT message without IDENTIFY.
5113 * According to the specs, the device must just
5114 * disconnect the BUS and not abort any task.
5117 np->abrt_msg[0] = M_ABORT;
5118 np->abrt_tbl.size = 1;
5123 * We have some task to abort.
5124 * Set the IDENTIFY(lun)
5126 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5129 * If we want to abort an untagged command, we
5130 * will send an IDENTIFY + M_ABORT.
5131 * Otherwise (tagged command), we will send
5132 * an IDENTIFY + task attributes + ABORT TAG.
5134 if (cp->tag == NO_TAG) {
5135 np->abrt_msg[1] = M_ABORT;
5136 np->abrt_tbl.size = 2;
5139 np->abrt_msg[1] = cp->scsi_smsg[1];
5140 np->abrt_msg[2] = cp->scsi_smsg[2];
5141 np->abrt_msg[3] = M_ABORT_TAG;
5142 np->abrt_tbl.size = 4;
5145 * Keep track of software timeout condition, since the
5146 * peripheral driver may not count retries on abort
5147 * conditions not due to timeout.
5149 if (cp->to_abort == 2)
5150 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5151 cp->to_abort = 0; /* We donnot expect to fail here */
5155 * The target has accepted our message and switched
5156 * to BUS FREE phase as we expected.
5158 case SIR_ABORT_SENT:
5159 target = (INB (nc_sdid) & 0xf);
5160 tp = &np->target[target];
5163 ** If we didn't abort anything, leave here.
5165 if (np->abrt_msg[0] == M_ABORT)
5169 * If we sent a M_RESET, then a hardware reset has
5170 * been performed by the target.
5171 * - Reset everything to async 8 bit
5172 * - Tell ourself to negotiate next time :-)
5173 * - Prepare to clear all disconnected CCBs for
5174 * this target from our task list (lun=task=-1)
5178 if (np->abrt_msg[0] == M_RESET) {
5180 tp->head.wval = np->rv_scntl3;
5182 tp->tinfo.current.period = 0;
5183 tp->tinfo.current.offset = 0;
5184 tp->tinfo.current.width = BUS_8_BIT;
5185 tp->tinfo.current.options = 0;
5189 * Otherwise, check for the LUN and TASK(s)
5190 * concerned by the cancellation.
5191 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5192 * or an ABORT message :-)
5195 lun = np->abrt_msg[0] & 0x3f;
5196 if (np->abrt_msg[1] == M_ABORT_TAG)
5197 task = np->abrt_msg[2];
5201 * Complete all the CCBs the device should have
5202 * aborted due to our 'kiss of death' message.
5204 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5205 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5206 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5207 sym_flush_comp_queue(np, 0);
5210 * If we sent a BDR, make uper layer aware of that.
5212 if (np->abrt_msg[0] == M_RESET)
5213 xpt_async(AC_SENT_BDR, np->path, NULL);
5218 * Print to the log the message we intend to send.
5220 if (num == SIR_TARGET_SELECTED) {
5221 PRINT_TARGET(np, target);
5222 sym_printl_hex("control msgout:", np->abrt_msg,
5224 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5228 * Let the SCRIPTS processor continue.
5234 * Gerard's alchemy:) that deals with with the data
5235 * pointer for both MDP and the residual calculation.
5237 * I didn't want to bloat the code by more than 200
5238 * lignes for the handling of both MDP and the residual.
5239 * This has been achieved by using a data pointer
5240 * representation consisting in an index in the data
5241 * array (dp_sg) and a negative offset (dp_ofs) that
5242 * have the following meaning:
5244 * - dp_sg = SYM_CONF_MAX_SG
5245 * we are at the end of the data script.
5246 * - dp_sg < SYM_CONF_MAX_SG
5247 * dp_sg points to the next entry of the scatter array
5248 * we want to transfer.
5250 * dp_ofs represents the residual of bytes of the
5251 * previous entry scatter entry we will send first.
5253 * no residual to send first.
5255 * The function sym_evaluate_dp() accepts an arbitray
5256 * offset (basically from the MDP message) and returns
5257 * the corresponding values of dp_sg and dp_ofs.
5259 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5262 int dp_ofs, dp_sg, dp_sgmin;
5267 * Compute the resulted data pointer in term of a script
5268 * address within some DATA script and a signed byte offset.
5272 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5274 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5280 dp_scr = scr_to_cpu(pm->ret);
5281 dp_ofs -= scr_to_cpu(pm->sg.size);
5285 * If we are auto-sensing, then we are done.
5287 if (cp->host_flags & HF_SENSE) {
5293 * Deduce the index of the sg entry.
5294 * Keep track of the index of the first valid entry.
5295 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5298 tmp = scr_to_cpu(cp->phys.head.goalp);
5299 dp_sg = SYM_CONF_MAX_SG;
5301 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5302 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5305 * Move to the sg entry the data pointer belongs to.
5307 * If we are inside the data area, we expect result to be:
5310 * dp_ofs = 0 and dp_sg is the index of the sg entry
5311 * the data pointer belongs to (or the end of the data)
5313 * dp_ofs < 0 and dp_sg is the index of the sg entry
5314 * the data pointer belongs to + 1.
5318 while (dp_sg > dp_sgmin) {
5320 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5321 n = dp_ofs + (tmp & 0xffffff);
5329 else if (dp_ofs > 0) {
5330 while (dp_sg < SYM_CONF_MAX_SG) {
5331 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5332 dp_ofs -= (tmp & 0xffffff);
5340 * Make sure the data pointer is inside the data area.
5341 * If not, return some error.
5343 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5345 else if (dp_sg > SYM_CONF_MAX_SG ||
5346 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5350 * Save the extreme pointer if needed.
5352 if (dp_sg > cp->ext_sg ||
5353 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5355 cp->ext_ofs = dp_ofs;
5369 * chip handler for MODIFY DATA POINTER MESSAGE
5371 * We also call this function on IGNORE WIDE RESIDUE
5372 * messages that do not match a SWIDE full condition.
5373 * Btw, we assume in that situation that such a message
5374 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5376 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs)
5379 u32 dp_scr = INL (nc_temp);
5387 * Not supported for auto-sense.
5389 if (cp->host_flags & HF_SENSE)
5393 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5394 * to the resulted data pointer.
5396 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5401 * And our alchemy:) allows to easily calculate the data
5402 * script address we want to return for the next data phase.
5404 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5405 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5408 * If offset / scatter entry is zero we donnot need
5409 * a context for the new current data pointer.
5417 * Get a context for the new current data pointer.
5419 hflags = INB (HF_PRT);
5421 if (hflags & HF_DP_SAVED)
5422 hflags ^= HF_ACT_PM;
5424 if (!(hflags & HF_ACT_PM)) {
5426 dp_scr = SCRIPTA_BA (np, pm0_data);
5430 dp_scr = SCRIPTA_BA (np, pm1_data);
5433 hflags &= ~(HF_DP_SAVED);
5435 OUTB (HF_PRT, hflags);
5438 * Set up the new current data pointer.
5439 * ofs < 0 there, and for the next data phase, we
5440 * want to transfer part of the data of the sg entry
5441 * corresponding to index dp_sg-1 prior to returning
5442 * to the main data script.
5444 pm->ret = cpu_to_scr(dp_ret);
5445 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5446 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5447 pm->sg.addr = cpu_to_scr(tmp);
5448 pm->sg.size = cpu_to_scr(-dp_ofs);
5451 OUTL (nc_temp, dp_scr);
5452 OUTL_DSP (SCRIPTA_BA (np, clrack));
5456 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5460 * chip calculation of the data residual.
5462 * As I used to say, the requirement of data residual
5463 * in SCSI is broken, useless and cannot be achieved
5464 * without huge complexity.
5465 * But most OSes and even the official CAM require it.
5466 * When stupidity happens to be so widely spread inside
5467 * a community, it gets hard to convince.
5469 * Anyway, I don't care, since I am not going to use
5470 * any software that considers this data residual as
5471 * a relevant information. :)
5473 static int sym_compute_residual(hcb_p np, ccb_p cp)
5475 int dp_sg, dp_sgmin, resid = 0;
5479 * Check for some data lost or just thrown away.
5480 * We are not required to be quite accurate in this
5481 * situation. Btw, if we are odd for output and the
5482 * device claims some more data, it may well happen
5483 * than our residual be zero. :-)
5485 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5486 if (cp->xerr_status & XE_EXTRA_DATA)
5487 resid -= cp->extra_bytes;
5488 if (cp->xerr_status & XE_SODL_UNRUN)
5490 if (cp->xerr_status & XE_SWIDE_OVRUN)
5495 * If all data has been transferred,
5496 * there is no residual.
5498 if (cp->phys.head.lastp == cp->phys.head.goalp)
5502 * If no data transfer occurs, or if the data
5503 * pointer is weird, return full residual.
5505 if (cp->startp == cp->phys.head.lastp ||
5506 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5508 return cp->data_len;
5512 * If we were auto-sensing, then we are done.
5514 if (cp->host_flags & HF_SENSE) {
5519 * We are now full comfortable in the computation
5520 * of the data residual (2's complement).
5522 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5523 resid = -cp->ext_ofs;
5524 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5525 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5526 resid += (tmp & 0xffffff);
5530 * Hopefully, the result is not too wrong.
5536 * Print out the content of a SCSI message.
5538 static int sym_show_msg (u_char * msg)
5542 if (*msg==M_EXTENDED) {
5544 if (i-1>msg[1]) break;
5545 printf ("-%x",msg[i]);
5548 } else if ((*msg & 0xf0) == 0x20) {
5549 printf ("-%x",msg[1]);
5555 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5559 printf ("%s: ", label);
5561 (void) sym_show_msg (msg);
5566 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5568 * When we try to negotiate, we append the negotiation message
5569 * to the identify and (maybe) simple tag message.
5570 * The host status field is set to HS_NEGOTIATE to mark this
5573 * If the target doesn't answer this message immediately
5574 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5575 * will be raised eventually.
5576 * The handler removes the HS_NEGOTIATE status, and sets the
5577 * negotiated value to the default (async / nowide).
5579 * If we receive a matching answer immediately, we check it
5580 * for validity, and set the values.
5582 * If we receive a Reject message immediately, we assume the
5583 * negotiation has failed, and fall back to standard values.
5585 * If we receive a negotiation message while not in HS_NEGOTIATE
5586 * state, it's a target initiated negotiation. We prepare a
5587 * (hopefully) valid answer, set our parameters, and send back
5588 * this answer to the target.
5590 * If the target doesn't fetch the answer (no message out phase),
5591 * we assume the negotiation has failed, and fall back to default
5592 * settings (SIR_NEGO_PROTO interrupt).
5594 * When we set the values, we adjust them in all ccbs belonging
5595 * to this target, in the controller's register, and in the "phys"
5596 * field of the controller's struct sym_hcb.
5600 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5602 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5604 u_char chg, ofs, per, fak, div;
5608 * Synchronous request message received.
5610 if (DEBUG_FLAGS & DEBUG_NEGO) {
5611 sym_print_msg(cp, "sync msgin", np->msgin);
5615 * request or answer ?
5617 if (INB (HS_PRT) == HS_NEGOTIATE) {
5618 OUTB (HS_PRT, HS_BUSY);
5619 if (cp->nego_status && cp->nego_status != NS_SYNC)
5625 * get requested values.
5632 * check values against our limits.
5635 if (ofs > np->maxoffs)
5636 {chg = 1; ofs = np->maxoffs;}
5638 if (ofs > tp->tinfo.user.offset)
5639 {chg = 1; ofs = tp->tinfo.user.offset;}
5644 if (per < np->minsync)
5645 {chg = 1; per = np->minsync;}
5647 if (per < tp->tinfo.user.period)
5648 {chg = 1; per = tp->tinfo.user.period;}
5653 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5656 if (DEBUG_FLAGS & DEBUG_NEGO) {
5658 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5659 ofs, per, div, fak, chg);
5663 * This was an answer message
5666 if (chg) /* Answer wasn't acceptable. */
5668 sym_setsync (np, cp, ofs, per, div, fak);
5669 OUTL_DSP (SCRIPTA_BA (np, clrack));
5674 * It was a request. Set value and
5675 * prepare an answer message
5677 sym_setsync (np, cp, ofs, per, div, fak);
5679 np->msgout[0] = M_EXTENDED;
5681 np->msgout[2] = M_X_SYNC_REQ;
5682 np->msgout[3] = per;
5683 np->msgout[4] = ofs;
5685 cp->nego_status = NS_SYNC;
5687 if (DEBUG_FLAGS & DEBUG_NEGO) {
5688 sym_print_msg(cp, "sync msgout", np->msgout);
5691 np->msgin [0] = M_NOOP;
5693 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5696 sym_setsync (np, cp, 0, 0, 0, 0);
5697 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5701 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5703 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5705 u_char chg, ofs, per, fak, dt, div, wide;
5709 * Synchronous request message received.
5711 if (DEBUG_FLAGS & DEBUG_NEGO) {
5712 sym_print_msg(cp, "ppr msgin", np->msgin);
5716 * get requested values.
5721 wide = np->msgin[6];
5722 dt = np->msgin[7] & PPR_OPT_DT;
5725 * request or answer ?
5727 if (INB (HS_PRT) == HS_NEGOTIATE) {
5728 OUTB (HS_PRT, HS_BUSY);
5729 if (cp->nego_status && cp->nego_status != NS_PPR)
5735 * check values against our limits.
5737 if (wide > np->maxwide)
5738 {chg = 1; wide = np->maxwide;}
5739 if (!wide || !(np->features & FE_ULTRA3))
5742 if (wide > tp->tinfo.user.width)
5743 {chg = 1; wide = tp->tinfo.user.width;}
5746 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5749 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5753 if (ofs > np->maxoffs_dt)
5754 {chg = 1; ofs = np->maxoffs_dt;}
5756 else if (ofs > np->maxoffs)
5757 {chg = 1; ofs = np->maxoffs;}
5759 if (ofs > tp->tinfo.user.offset)
5760 {chg = 1; ofs = tp->tinfo.user.offset;}
5766 if (per < np->minsync_dt)
5767 {chg = 1; per = np->minsync_dt;}
5769 else if (per < np->minsync)
5770 {chg = 1; per = np->minsync;}
5772 if (per < tp->tinfo.user.period)
5773 {chg = 1; per = tp->tinfo.user.period;}
5778 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5781 if (DEBUG_FLAGS & DEBUG_NEGO) {
5784 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5785 dt, ofs, per, wide, div, fak, chg);
5792 if (chg) /* Answer wasn't acceptable */
5794 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5795 OUTL_DSP (SCRIPTA_BA (np, clrack));
5800 * It was a request. Set value and
5801 * prepare an answer message
5803 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5805 np->msgout[0] = M_EXTENDED;
5807 np->msgout[2] = M_X_PPR_REQ;
5808 np->msgout[3] = per;
5810 np->msgout[5] = ofs;
5811 np->msgout[6] = wide;
5814 cp->nego_status = NS_PPR;
5816 if (DEBUG_FLAGS & DEBUG_NEGO) {
5817 sym_print_msg(cp, "ppr msgout", np->msgout);
5820 np->msgin [0] = M_NOOP;
5822 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5825 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5826 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5828 * If it was a device response that should result in
5829 * ST, we may want to try a legacy negotiation later.
5832 tp->tinfo.goal.options = 0;
5833 tp->tinfo.goal.width = wide;
5834 tp->tinfo.goal.period = per;
5835 tp->tinfo.goal.offset = ofs;
5840 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5842 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5848 * Wide request message received.
5850 if (DEBUG_FLAGS & DEBUG_NEGO) {
5851 sym_print_msg(cp, "wide msgin", np->msgin);
5855 * Is it a request from the device?
5857 if (INB (HS_PRT) == HS_NEGOTIATE) {
5858 OUTB (HS_PRT, HS_BUSY);
5859 if (cp->nego_status && cp->nego_status != NS_WIDE)
5865 * get requested values.
5868 wide = np->msgin[3];
5871 * check values against driver limits.
5873 if (wide > np->maxwide)
5874 {chg = 1; wide = np->maxwide;}
5876 if (wide > tp->tinfo.user.width)
5877 {chg = 1; wide = tp->tinfo.user.width;}
5880 if (DEBUG_FLAGS & DEBUG_NEGO) {
5882 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5886 * This was an answer message
5889 if (chg) /* Answer wasn't acceptable. */
5891 sym_setwide (np, cp, wide);
5894 * Negotiate for SYNC immediately after WIDE response.
5895 * This allows to negotiate for both WIDE and SYNC on
5896 * a single SCSI command (Suggested by Justin Gibbs).
5898 if (tp->tinfo.goal.offset) {
5899 np->msgout[0] = M_EXTENDED;
5901 np->msgout[2] = M_X_SYNC_REQ;
5902 np->msgout[3] = tp->tinfo.goal.period;
5903 np->msgout[4] = tp->tinfo.goal.offset;
5905 if (DEBUG_FLAGS & DEBUG_NEGO) {
5906 sym_print_msg(cp, "sync msgout", np->msgout);
5909 cp->nego_status = NS_SYNC;
5910 OUTB (HS_PRT, HS_NEGOTIATE);
5911 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5915 OUTL_DSP (SCRIPTA_BA (np, clrack));
5920 * It was a request, set value and
5921 * prepare an answer message
5923 sym_setwide (np, cp, wide);
5925 np->msgout[0] = M_EXTENDED;
5927 np->msgout[2] = M_X_WIDE_REQ;
5928 np->msgout[3] = wide;
5930 np->msgin [0] = M_NOOP;
5932 cp->nego_status = NS_WIDE;
5934 if (DEBUG_FLAGS & DEBUG_NEGO) {
5935 sym_print_msg(cp, "wide msgout", np->msgout);
5938 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
5941 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5945 * Reset SYNC or WIDE to default settings.
5947 * Called when a negotiation does not succeed either
5948 * on rejection or on protocol error.
5950 * If it was a PPR that made problems, we may want to
5951 * try a legacy negotiation later.
5953 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
5956 * any error in negotiation:
5957 * fall back to default mode.
5959 switch (cp->nego_status) {
5962 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5964 tp->tinfo.goal.options = 0;
5965 if (tp->tinfo.goal.period < np->minsync)
5966 tp->tinfo.goal.period = np->minsync;
5967 if (tp->tinfo.goal.offset > np->maxoffs)
5968 tp->tinfo.goal.offset = np->maxoffs;
5972 sym_setsync (np, cp, 0, 0, 0, 0);
5975 sym_setwide (np, cp, 0);
5978 np->msgin [0] = M_NOOP;
5979 np->msgout[0] = M_NOOP;
5980 cp->nego_status = 0;
5984 * chip handler for MESSAGE REJECT received in response to
5985 * a WIDE or SYNCHRONOUS negotiation.
5987 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
5989 sym_nego_default(np, tp, cp);
5990 OUTB (HS_PRT, HS_BUSY);
5994 * chip exception handler for programmed interrupts.
5996 static void sym_int_sir (hcb_p np)
5998 u_char num = INB (nc_dsps);
5999 u32 dsa = INL (nc_dsa);
6000 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6001 u_char target = INB (nc_sdid) & 0x0f;
6002 tcb_p tp = &np->target[target];
6005 SYM_LOCK_ASSERT(MA_OWNED);
6007 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6011 * Command has been completed with error condition
6012 * or has been auto-sensed.
6014 case SIR_COMPLETE_ERROR:
6015 sym_complete_error(np, cp);
6018 * The C code is currently trying to recover from something.
6019 * Typically, user want to abort some command.
6021 case SIR_SCRIPT_STOPPED:
6022 case SIR_TARGET_SELECTED:
6023 case SIR_ABORT_SENT:
6024 sym_sir_task_recovery(np, num);
6027 * The device didn't go to MSG OUT phase after having
6028 * been selected with ATN. We donnot want to handle
6031 case SIR_SEL_ATN_NO_MSG_OUT:
6032 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6033 sym_name (np), target);
6036 * The device didn't switch to MSG IN phase after
6037 * having reseleted the initiator.
6039 case SIR_RESEL_NO_MSG_IN:
6040 printf ("%s:%d: No MSG IN phase after reselection.\n",
6041 sym_name (np), target);
6044 * After reselection, the device sent a message that wasn't
6047 case SIR_RESEL_NO_IDENTIFY:
6048 printf ("%s:%d: No IDENTIFY after reselection.\n",
6049 sym_name (np), target);
6052 * The device reselected a LUN we donnot know about.
6054 case SIR_RESEL_BAD_LUN:
6055 np->msgout[0] = M_RESET;
6058 * The device reselected for an untagged nexus and we
6061 case SIR_RESEL_BAD_I_T_L:
6062 np->msgout[0] = M_ABORT;
6065 * The device reselected for a tagged nexus that we donnot
6068 case SIR_RESEL_BAD_I_T_L_Q:
6069 np->msgout[0] = M_ABORT_TAG;
6072 * The SCRIPTS let us know that the device has grabbed
6073 * our message and will abort the job.
6075 case SIR_RESEL_ABORTED:
6076 np->lastmsg = np->msgout[0];
6077 np->msgout[0] = M_NOOP;
6078 printf ("%s:%d: message %x sent on bad reselection.\n",
6079 sym_name (np), target, np->lastmsg);
6082 * The SCRIPTS let us know that a message has been
6083 * successfully sent to the device.
6085 case SIR_MSG_OUT_DONE:
6086 np->lastmsg = np->msgout[0];
6087 np->msgout[0] = M_NOOP;
6088 /* Should we really care of that */
6089 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6091 cp->xerr_status &= ~XE_PARITY_ERR;
6092 if (!cp->xerr_status)
6093 OUTOFFB (HF_PRT, HF_EXT_ERR);
6098 * The device didn't send a GOOD SCSI status.
6099 * We may have some work to do prior to allow
6100 * the SCRIPTS processor to continue.
6102 case SIR_BAD_SCSI_STATUS:
6105 sym_sir_bad_scsi_status(np, cp);
6108 * We are asked by the SCRIPTS to prepare a
6111 case SIR_REJECT_TO_SEND:
6112 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6113 np->msgout[0] = M_REJECT;
6116 * We have been ODD at the end of a DATA IN
6117 * transfer and the device didn't send a
6118 * IGNORE WIDE RESIDUE message.
6119 * It is a data overrun condition.
6121 case SIR_SWIDE_OVERRUN:
6123 OUTONB (HF_PRT, HF_EXT_ERR);
6124 cp->xerr_status |= XE_SWIDE_OVRUN;
6128 * We have been ODD at the end of a DATA OUT
6130 * It is a data underrun condition.
6132 case SIR_SODL_UNDERRUN:
6134 OUTONB (HF_PRT, HF_EXT_ERR);
6135 cp->xerr_status |= XE_SODL_UNRUN;
6139 * The device wants us to transfer more data than
6140 * expected or in the wrong direction.
6141 * The number of extra bytes is in scratcha.
6142 * It is a data overrun condition.
6144 case SIR_DATA_OVERRUN:
6146 OUTONB (HF_PRT, HF_EXT_ERR);
6147 cp->xerr_status |= XE_EXTRA_DATA;
6148 cp->extra_bytes += INL (nc_scratcha);
6152 * The device switched to an illegal phase (4/5).
6156 OUTONB (HF_PRT, HF_EXT_ERR);
6157 cp->xerr_status |= XE_BAD_PHASE;
6161 * We received a message.
6163 case SIR_MSG_RECEIVED:
6166 switch (np->msgin [0]) {
6168 * We received an extended message.
6169 * We handle MODIFY DATA POINTER, SDTR, WDTR
6170 * and reject all other extended messages.
6173 switch (np->msgin [2]) {
6175 if (DEBUG_FLAGS & DEBUG_POINTER)
6176 sym_print_msg(cp,"modify DP",np->msgin);
6177 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6178 (np->msgin[5]<<8) + (np->msgin[6]);
6179 sym_modify_dp(np, cp, tmp);
6182 sym_sync_nego(np, tp, cp);
6185 sym_ppr_nego(np, tp, cp);
6188 sym_wide_nego(np, tp, cp);
6195 * We received a 1/2 byte message not handled from SCRIPTS.
6196 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6197 * RESIDUE messages that haven't been anticipated by
6198 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6199 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6202 if (DEBUG_FLAGS & DEBUG_POINTER)
6203 sym_print_msg(cp,"ign wide residue", np->msgin);
6204 sym_modify_dp(np, cp, -1);
6207 if (INB (HS_PRT) == HS_NEGOTIATE)
6208 sym_nego_rejected(np, tp, cp);
6211 printf ("M_REJECT received (%x:%x).\n",
6212 scr_to_cpu(np->lastmsg), np->msgout[0]);
6221 * We received an unknown message.
6222 * Ignore all MSG IN phases and reject it.
6225 sym_print_msg(cp, "WEIRD message received", np->msgin);
6226 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6229 * Negotiation failed.
6230 * Target does not send us the reply.
6231 * Remove the HS_NEGOTIATE status.
6233 case SIR_NEGO_FAILED:
6234 OUTB (HS_PRT, HS_BUSY);
6236 * Negotiation failed.
6237 * Target does not want answer message.
6239 case SIR_NEGO_PROTO:
6240 sym_nego_default(np, tp, cp);
6248 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6251 OUTL_DSP (SCRIPTA_BA (np, clrack));
6258 * Acquire a control block
6260 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6262 tcb_p tp = &np->target[tn];
6263 lcb_p lp = sym_lp(tp, ln);
6264 u_short tag = NO_TAG;
6266 ccb_p cp = (ccb_p) NULL;
6269 * Look for a free CCB
6271 if (sym_que_empty(&np->free_ccbq))
6273 qp = sym_remque_head(&np->free_ccbq);
6276 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6279 * If the LCB is not yet available and the LUN
6280 * has been probed ok, try to allocate the LCB.
6282 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6283 lp = sym_alloc_lcb(np, tn, ln);
6289 * If the LCB is not available here, then the
6290 * logical unit is not yet discovered. For those
6291 * ones only accept 1 SCSI IO per logical unit,
6292 * since we cannot allow disconnections.
6295 if (!sym_is_bit(tp->busy0_map, ln))
6296 sym_set_bit(tp->busy0_map, ln);
6301 * If we have been asked for a tagged command.
6305 * Debugging purpose.
6307 assert(lp->busy_itl == 0);
6309 * Allocate resources for tags if not yet.
6312 sym_alloc_lcb_tags(np, tn, ln);
6317 * Get a tag for this SCSI IO and set up
6318 * the CCB bus address for reselection,
6319 * and count it for this LUN.
6320 * Toggle reselect path to tagged.
6322 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6323 tag = lp->cb_tags[lp->ia_tag];
6324 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6326 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6329 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6335 * This command will not be tagged.
6336 * If we already have either a tagged or untagged
6337 * one, refuse to overlap this untagged one.
6341 * Debugging purpose.
6343 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6345 * Count this nexus for this LUN.
6346 * Set up the CCB bus address for reselection.
6347 * Toggle reselect path to untagged.
6349 if (++lp->busy_itl == 1) {
6350 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6352 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6359 * Put the CCB into the busy queue.
6361 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6364 * Remember all informations needed to free this CCB.
6371 if (DEBUG_FLAGS & DEBUG_TAGS) {
6372 PRINT_LUN(np, tn, ln);
6373 printf ("ccb @%p using tag %d.\n", cp, tag);
6379 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6384 * Release one control block
6386 static void sym_free_ccb(hcb_p np, ccb_p cp)
6388 tcb_p tp = &np->target[cp->target];
6389 lcb_p lp = sym_lp(tp, cp->lun);
6391 if (DEBUG_FLAGS & DEBUG_TAGS) {
6392 PRINT_LUN(np, cp->target, cp->lun);
6393 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6401 * If tagged, release the tag, set the relect path
6403 if (cp->tag != NO_TAG) {
6405 * Free the tag value.
6407 lp->cb_tags[lp->if_tag] = cp->tag;
6408 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6411 * Make the reselect path invalid,
6412 * and uncount this CCB.
6414 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6416 } else { /* Untagged */
6418 * Make the reselect path invalid,
6419 * and uncount this CCB.
6421 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6425 * If no JOB active, make the LUN reselect path invalid.
6427 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6429 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6432 * Otherwise, we only accept 1 IO per LUN.
6433 * Clear the bit that keeps track of this IO.
6436 sym_clr_bit(tp->busy0_map, cp->lun);
6439 * We donnot queue more than 1 ccb per target
6440 * with negotiation at any time. If this ccb was
6441 * used for negotiation, clear this info in the tcb.
6443 if (cp == tp->nego_cp)
6446 #ifdef SYM_CONF_IARB_SUPPORT
6448 * If we just complete the last queued CCB,
6449 * clear this info that is no longer relevant.
6451 if (cp == np->last_cp)
6456 * Unmap user data from DMA map if needed.
6458 if (cp->dmamapped) {
6459 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6464 * Make this CCB available.
6467 cp->host_status = HS_IDLE;
6468 sym_remque(&cp->link_ccbq);
6469 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6473 * Allocate a CCB from memory and initialize its fixed part.
6475 static ccb_p sym_alloc_ccb(hcb_p np)
6480 SYM_LOCK_ASSERT(MA_NOTOWNED);
6483 * Prevent from allocating more CCBs than we can
6484 * queue to the controller.
6486 if (np->actccbs >= SYM_CONF_MAX_START)
6490 * Allocate memory for this CCB.
6492 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6497 * Allocate a bounce buffer for sense data.
6499 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6504 * Allocate a map for the DMA of user data.
6506 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6514 * Initialize the callout.
6516 callout_init(&cp->ch, 1);
6519 * Compute the bus address of this ccb.
6521 cp->ccb_ba = vtobus(cp);
6524 * Insert this ccb into the hashed list.
6526 hcode = CCB_HASH_CODE(cp->ccb_ba);
6527 cp->link_ccbh = np->ccbh[hcode];
6528 np->ccbh[hcode] = cp;
6531 * Initialize the start and restart actions.
6533 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6534 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6537 * Initilialyze some other fields.
6539 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6542 * Chain into free ccb queue.
6544 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6549 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
6550 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6555 * Look up a CCB from a DSA value.
6557 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6562 hcode = CCB_HASH_CODE(dsa);
6563 cp = np->ccbh[hcode];
6565 if (cp->ccb_ba == dsa)
6574 * Lun control block allocation and initialization.
6576 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6578 tcb_p tp = &np->target[tn];
6579 lcb_p lp = sym_lp(tp, ln);
6582 * Already done, just return.
6587 * Check against some race.
6589 assert(!sym_is_bit(tp->busy0_map, ln));
6592 * Allocate the LCB bus address array.
6593 * Compute the bus address of this table.
6595 if (ln && !tp->luntbl) {
6598 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6601 for (i = 0 ; i < 64 ; i++)
6602 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6603 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6607 * Allocate the table of pointers for LUN(s) > 0, if needed.
6609 if (ln && !tp->lunmp) {
6610 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6618 * Make it available to the chip.
6620 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6625 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6629 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6633 * Let the itl task point to error handling.
6635 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6638 * Set the reselect pattern to our default. :)
6640 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6643 * Set user capabilities.
6645 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6652 * Allocate LCB resources for tagged command queuing.
6654 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6656 tcb_p tp = &np->target[tn];
6657 lcb_p lp = sym_lp(tp, ln);
6661 * If LCB not available, try to allocate it.
6663 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6667 * Allocate the task table and and the tag allocation
6668 * circular buffer. We want both or none.
6670 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6673 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6675 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6676 lp->itlq_tbl = NULL;
6681 * Initialize the task table with invalid entries.
6683 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6684 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6687 * Fill up the tag buffer with tag numbers.
6689 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6693 * Make the task table available to SCRIPTS,
6694 * And accept tagged commands now.
6696 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6700 * Test the pci bus snoop logic :-(
6702 * Has to be called with interrupts disabled.
6704 #ifndef SYM_CONF_IOMAPPED
6705 static int sym_regtest (hcb_p np)
6707 register volatile u32 data;
6709 * chip registers may NOT be cached.
6710 * write 0xffffffff to a read only register area,
6711 * and try to read it back.
6714 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6715 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6717 if (data == 0xffffffff) {
6719 if ((data & 0xe2f0fffd) != 0x02000080) {
6721 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6729 static int sym_snooptest (hcb_p np)
6731 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6733 #ifndef SYM_CONF_IOMAPPED
6734 err |= sym_regtest (np);
6735 if (err) return (err);
6739 * Enable Master Parity Checking as we intend
6740 * to enable it for normal operations.
6742 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6746 pc = SCRIPTB0_BA (np, snooptest);
6750 * Set memory and register.
6752 np->cache = cpu_to_scr(host_wr);
6753 OUTL (nc_temp, sym_wr);
6755 * Start script (exchange values)
6757 OUTL (nc_dsa, np->hcb_ba);
6760 * Wait 'til done (with timeout)
6762 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6763 if (INB(nc_istat) & (INTF|SIP|DIP))
6765 if (i>=SYM_SNOOP_TIMEOUT) {
6766 printf ("CACHE TEST FAILED: timeout.\n");
6770 * Check for fatal DMA errors.
6772 dstat = INB (nc_dstat);
6773 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6774 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6775 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6776 "DISABLING MASTER DATA PARITY CHECKING.\n",
6778 np->rv_ctest4 &= ~MPEE;
6782 if (dstat & (MDPE|BF|IID)) {
6783 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6787 * Save termination position.
6791 * Read memory and register.
6793 host_rd = scr_to_cpu(np->cache);
6794 sym_rd = INL (nc_scratcha);
6795 sym_bk = INL (nc_temp);
6798 * Check termination position.
6800 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6801 printf ("CACHE TEST FAILED: script execution failed.\n");
6802 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6803 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6804 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6810 if (host_wr != sym_rd) {
6811 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6812 (int) host_wr, (int) sym_rd);
6815 if (host_rd != sym_wr) {
6816 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6817 (int) sym_wr, (int) host_rd);
6820 if (sym_bk != sym_wr) {
6821 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6822 (int) sym_wr, (int) sym_bk);
6830 * Determine the chip's clock frequency.
6832 * This is essential for the negotiation of the synchronous
6835 * Note: we have to return the correct value.
6836 * THERE IS NO SAFE DEFAULT VALUE.
6838 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6839 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6840 * do not have a clock doubler and so are provided with a
6841 * 80 MHz clock. All other fast20 boards incorporate a doubler
6842 * and so should be delivered with a 40 MHz clock.
6843 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6844 * clock and provide a clock quadrupler (160 Mhz).
6848 * Select SCSI clock frequency
6850 static void sym_selectclock(hcb_p np, u_char scntl3)
6853 * If multiplier not present or not selected, leave here.
6855 if (np->multiplier <= 1) {
6856 OUTB(nc_scntl3, scntl3);
6860 if (sym_verbose >= 2)
6861 printf ("%s: enabling clock multiplier\n", sym_name(np));
6863 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6865 * Wait for the LCKFRQ bit to be set if supported by the chip.
6866 * Otherwise wait 20 micro-seconds.
6868 if (np->features & FE_LCKFRQ) {
6870 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6873 printf("%s: the chip cannot lock the frequency\n",
6877 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6878 OUTB(nc_scntl3, scntl3);
6879 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6880 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6884 * calculate SCSI clock frequency (in KHz)
6886 static unsigned getfreq (hcb_p np, int gen)
6888 unsigned int ms = 0;
6892 * Measure GEN timer delay in order
6893 * to calculate SCSI clock frequency
6895 * This code will never execute too
6896 * many loop iterations (if DELAY is
6897 * reasonably correct). It could get
6898 * too low a delay (too high a freq.)
6899 * if the CPU is slow executing the
6900 * loop for some reason (an NMI, for
6901 * example). For this reason we will
6902 * if multiple measurements are to be
6903 * performed trust the higher delay
6904 * (lower frequency returned).
6906 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6907 (void) INW (nc_sist); /* clear pending scsi interrupt */
6908 OUTB (nc_dien , 0); /* mask all dma interrupts */
6909 (void) INW (nc_sist); /* another one, just to be sure :) */
6910 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6911 OUTB (nc_stime1, 0); /* disable general purpose timer */
6912 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6913 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6914 UDELAY (1000); /* count ms */
6915 OUTB (nc_stime1, 0); /* disable general purpose timer */
6917 * set prescaler to divide by whatever 0 means
6918 * 0 ought to choose divide by 2, but appears
6919 * to set divide by 3.5 mode in my 53c810 ...
6921 OUTB (nc_scntl3, 0);
6924 * adjust for prescaler, and convert into KHz
6926 f = ms ? ((1 << gen) * 4340) / ms : 0;
6928 if (sym_verbose >= 2)
6929 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
6930 sym_name(np), gen, ms, f);
6935 static unsigned sym_getfreq (hcb_p np)
6940 (void) getfreq (np, gen); /* throw away first result */
6941 f1 = getfreq (np, gen);
6942 f2 = getfreq (np, gen);
6943 if (f1 > f2) f1 = f2; /* trust lower result */
6948 * Get/probe chip SCSI clock frequency
6950 static void sym_getclock (hcb_p np, int mult)
6952 unsigned char scntl3 = np->sv_scntl3;
6953 unsigned char stest1 = np->sv_stest1;
6957 * For the C10 core, assume 40 MHz.
6959 if (np->features & FE_C10) {
6960 np->multiplier = mult;
6961 np->clock_khz = 40000 * mult;
6968 * True with 875/895/896/895A with clock multiplier selected
6970 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
6971 if (sym_verbose >= 2)
6972 printf ("%s: clock multiplier found\n", sym_name(np));
6973 np->multiplier = mult;
6977 * If multiplier not found or scntl3 not 7,5,3,
6978 * reset chip and get frequency from general purpose timer.
6979 * Otherwise trust scntl3 BIOS setting.
6981 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
6982 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
6983 f1 = sym_getfreq (np);
6986 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
6988 if (f1 < 45000) f1 = 40000;
6989 else if (f1 < 55000) f1 = 50000;
6992 if (f1 < 80000 && mult > 1) {
6993 if (sym_verbose >= 2)
6994 printf ("%s: clock multiplier assumed\n",
6996 np->multiplier = mult;
6999 if ((scntl3 & 7) == 3) f1 = 40000;
7000 else if ((scntl3 & 7) == 5) f1 = 80000;
7003 f1 /= np->multiplier;
7007 * Compute controller synchronous parameters.
7009 f1 *= np->multiplier;
7014 * Get/probe PCI clock frequency
7016 static int sym_getpciclock (hcb_p np)
7021 * For the C1010-33, this doesn't work.
7022 * For the C1010-66, this will be tested when I'll have
7023 * such a beast to play with.
7025 if (!(np->features & FE_C10)) {
7026 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7027 f = (int) sym_getfreq (np);
7028 OUTB (nc_stest1, 0);
7035 /*============= DRIVER ACTION/COMPLETION ====================*/
7038 * Print something that tells about extended errors.
7040 static void sym_print_xerr(ccb_p cp, int x_status)
7042 if (x_status & XE_PARITY_ERR) {
7044 printf ("unrecovered SCSI parity error.\n");
7046 if (x_status & XE_EXTRA_DATA) {
7048 printf ("extraneous data discarded.\n");
7050 if (x_status & XE_BAD_PHASE) {
7052 printf ("illegal scsi phase (4/5).\n");
7054 if (x_status & XE_SODL_UNRUN) {
7056 printf ("ODD transfer in DATA OUT phase.\n");
7058 if (x_status & XE_SWIDE_OVRUN) {
7060 printf ("ODD transfer in DATA IN phase.\n");
7065 * Choose the more appropriate CAM status if
7066 * the IO encountered an extended error.
7068 static int sym_xerr_cam_status(int cam_status, int x_status)
7071 if (x_status & XE_PARITY_ERR)
7072 cam_status = CAM_UNCOR_PARITY;
7073 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7074 cam_status = CAM_DATA_RUN_ERR;
7075 else if (x_status & XE_BAD_PHASE)
7076 cam_status = CAM_REQ_CMP_ERR;
7078 cam_status = CAM_REQ_CMP_ERR;
7084 * Complete execution of a SCSI command with extented
7085 * error, SCSI status error, or having been auto-sensed.
7087 * The SCRIPTS processor is not running there, so we
7088 * can safely access IO registers and remove JOBs from
7090 * SCRATCHA is assumed to have been loaded with STARTPOS
7091 * before the SCRIPTS called the C code.
7093 static void sym_complete_error (hcb_p np, ccb_p cp)
7095 struct ccb_scsiio *csio;
7097 int i, sense_returned;
7099 SYM_LOCK_ASSERT(MA_OWNED);
7102 * Paranoid check. :)
7104 if (!cp || !cp->cam_ccb)
7107 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7108 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7109 cp->host_status, cp->ssss_status, cp->host_flags,
7110 cp->target, cp->lun);
7115 * Get CAM command pointer.
7117 csio = &cp->cam_ccb->csio;
7120 * Check for extended errors.
7122 if (cp->xerr_status) {
7124 sym_print_xerr(cp, cp->xerr_status);
7125 if (cp->host_status == HS_COMPLETE)
7126 cp->host_status = HS_COMP_ERR;
7130 * Calculate the residual.
7132 csio->sense_resid = 0;
7133 csio->resid = sym_compute_residual(np, cp);
7135 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7136 csio->resid = 0; /* throw them away. :) */
7140 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7141 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7142 csio->sense_resid = csio->resid; /* Swap residuals */
7143 csio->resid = cp->sv_resid;
7145 if (sym_verbose && cp->sv_xerr_status)
7146 sym_print_xerr(cp, cp->sv_xerr_status);
7147 if (cp->host_status == HS_COMPLETE &&
7148 cp->ssss_status == S_GOOD &&
7149 cp->xerr_status == 0) {
7150 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7151 cp->sv_xerr_status);
7152 cam_status |= CAM_AUTOSNS_VALID;
7154 * Bounce back the sense data to user and
7157 bzero(&csio->sense_data, sizeof(csio->sense_data));
7158 sense_returned = SYM_SNS_BBUF_LEN - csio->sense_resid;
7159 if (sense_returned < csio->sense_len)
7160 csio->sense_resid = csio->sense_len -
7163 csio->sense_resid = 0;
7164 bcopy(cp->sns_bbuf, &csio->sense_data,
7165 MIN(csio->sense_len, sense_returned));
7168 * If the device reports a UNIT ATTENTION condition
7169 * due to a RESET condition, we should consider all
7170 * disconnect CCBs for this unit as aborted.
7174 p = (u_char *) csio->sense_data;
7175 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7176 sym_clear_tasks(np, CAM_REQ_ABORTED,
7177 cp->target,cp->lun, -1);
7182 cam_status = CAM_AUTOSENSE_FAIL;
7184 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7185 csio->scsi_status = cp->ssss_status;
7186 cam_status = CAM_SCSI_STATUS_ERROR;
7188 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7189 cam_status = CAM_SEL_TIMEOUT;
7190 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7191 cam_status = CAM_UNEXP_BUSFREE;
7192 else { /* Extended error */
7195 printf ("COMMAND FAILED (%x %x %x).\n",
7196 cp->host_status, cp->ssss_status,
7199 csio->scsi_status = cp->ssss_status;
7201 * Set the most appropriate value for CAM status.
7203 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7208 * Dequeue all queued CCBs for that device
7209 * not yet started by SCRIPTS.
7211 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7212 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7215 * Restart the SCRIPTS processor.
7217 OUTL_DSP (SCRIPTA_BA (np, start));
7220 * Synchronize DMA map if needed.
7222 if (cp->dmamapped) {
7223 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7224 (cp->dmamapped == SYM_DMA_READ ?
7225 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7228 * Add this one to the COMP queue.
7229 * Complete all those commands with either error
7230 * or requeue condition.
7232 sym_set_cam_status((union ccb *) csio, cam_status);
7233 sym_remque(&cp->link_ccbq);
7234 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7235 sym_flush_comp_queue(np, 0);
7239 * Complete execution of a successful SCSI command.
7241 * Only successful commands go to the DONE queue,
7242 * since we need to have the SCRIPTS processor
7243 * stopped on any error condition.
7244 * The SCRIPTS processor is running while we are
7245 * completing successful commands.
7247 static void sym_complete_ok (hcb_p np, ccb_p cp)
7249 struct ccb_scsiio *csio;
7253 SYM_LOCK_ASSERT(MA_OWNED);
7256 * Paranoid check. :)
7258 if (!cp || !cp->cam_ccb)
7260 assert (cp->host_status == HS_COMPLETE);
7263 * Get command, target and lun pointers.
7265 csio = &cp->cam_ccb->csio;
7266 tp = &np->target[cp->target];
7267 lp = sym_lp(tp, cp->lun);
7270 * Assume device discovered on first success.
7273 sym_set_bit(tp->lun_map, cp->lun);
7276 * If all data have been transferred, given than no
7277 * extended error did occur, there is no residual.
7280 if (cp->phys.head.lastp != cp->phys.head.goalp)
7281 csio->resid = sym_compute_residual(np, cp);
7284 * Wrong transfer residuals may be worse than just always
7285 * returning zero. User can disable this feature from
7286 * sym_conf.h. Residual support is enabled by default.
7288 if (!SYM_CONF_RESIDUAL_SUPPORT)
7292 * Synchronize DMA map if needed.
7294 if (cp->dmamapped) {
7295 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7296 (cp->dmamapped == SYM_DMA_READ ?
7297 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7300 * Set status and complete the command.
7302 csio->scsi_status = cp->ssss_status;
7303 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7304 sym_xpt_done(np, (union ccb *) csio, cp);
7305 sym_free_ccb(np, cp);
7309 * Our callout handler
7311 static void sym_callout(void *arg)
7313 union ccb *ccb = (union ccb *) arg;
7314 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7317 * Check that the CAM CCB is still queued.
7324 switch(ccb->ccb_h.func_code) {
7326 (void) sym_abort_scsiio(np, ccb, 1);
7338 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7343 SYM_LOCK_ASSERT(MA_OWNED);
7346 * Look up our CCB control block.
7349 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7350 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7351 if (cp2->cam_ccb == ccb) {
7356 if (!cp || cp->host_status == HS_WAIT)
7360 * If a previous abort didn't succeed in time,
7361 * perform a BUS reset.
7364 sym_reset_scsi_bus(np, 1);
7369 * Mark the CCB for abort and allow time for.
7371 cp->to_abort = timed_out ? 2 : 1;
7372 callout_reset(&cp->ch, 10 * hz, sym_callout, (caddr_t) ccb);
7375 * Tell the SCRIPTS processor to stop and synchronize with us.
7377 np->istat_sem = SEM;
7378 OUTB (nc_istat, SIGP|SEM);
7383 * Reset a SCSI device (all LUNs of a target).
7385 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7388 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7390 SYM_LOCK_ASSERT(MA_OWNED);
7392 if (ccb_h->target_id == np->myaddr ||
7393 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7394 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7395 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7399 tp = &np->target[ccb_h->target_id];
7402 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7404 np->istat_sem = SEM;
7405 OUTB (nc_istat, SIGP|SEM);
7409 * SIM action entry point.
7411 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7418 u_char idmsg, *msgptr;
7420 struct ccb_scsiio *csio;
7421 struct ccb_hdr *ccb_h;
7423 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7426 * Retrieve our controller data structure.
7428 np = (hcb_p) cam_sim_softc(sim);
7430 SYM_LOCK_ASSERT(MA_OWNED);
7433 * The common case is SCSI IO.
7434 * We deal with other ones elsewhere.
7436 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7437 sym_action2(sim, ccb);
7441 ccb_h = &csio->ccb_h;
7444 * Work around races.
7446 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7452 * Minimal checkings, so that we will not
7453 * go outside our tables.
7455 if (ccb_h->target_id == np->myaddr ||
7456 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7457 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7458 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7463 * Retrieve the target and lun descriptors.
7465 tp = &np->target[ccb_h->target_id];
7466 lp = sym_lp(tp, ccb_h->target_lun);
7469 * Complete the 1st INQUIRY command with error
7470 * condition if the device is flagged NOSCAN
7471 * at BOOT in the NVRAM. This may speed up
7472 * the boot and maintain coherency with BIOS
7473 * device numbering. Clearing the flag allows
7474 * user to rescan skipped devices later.
7475 * We also return error for devices not flagged
7476 * for SCAN LUNS in the NVRAM since some mono-lun
7477 * devices behave badly when asked for some non
7478 * zero LUN. Btw, this is an absolute hack.:-)
7480 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7481 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7482 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7483 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7484 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7485 ccb_h->target_lun != 0)) {
7486 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7487 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7493 * Get a control block for this IO.
7495 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7496 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7498 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7503 * Keep track of the IO in our CCB.
7508 * Build the IDENTIFY message.
7510 idmsg = M_IDENTIFY | cp->lun;
7511 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7514 msgptr = cp->scsi_smsg;
7516 msgptr[msglen++] = idmsg;
7519 * Build the tag message if present.
7521 if (cp->tag != NO_TAG) {
7522 u_char order = csio->tag_action;
7530 order = M_SIMPLE_TAG;
7532 msgptr[msglen++] = order;
7535 * For less than 128 tags, actual tags are numbered
7536 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7537 * with devices that have problems with #TAG 0 or too
7538 * great #TAG numbers. For more tags (up to 256),
7539 * we use directly our tag number.
7541 #if SYM_CONF_MAX_TASK > (512/4)
7542 msgptr[msglen++] = cp->tag;
7544 msgptr[msglen++] = (cp->tag << 1) + 1;
7549 * Build a negotiation message if needed.
7550 * (nego_status is filled by sym_prepare_nego())
7552 cp->nego_status = 0;
7553 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7554 tp->tinfo.current.period != tp->tinfo.goal.period ||
7555 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7556 tp->tinfo.current.options != tp->tinfo.goal.options) {
7557 if (!tp->nego_cp && lp)
7558 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7568 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7569 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7574 cp->phys.select.sel_id = cp->target;
7575 cp->phys.select.sel_scntl3 = tp->head.wval;
7576 cp->phys.select.sel_sxfer = tp->head.sval;
7577 cp->phys.select.sel_scntl4 = tp->head.uval;
7582 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7583 cp->phys.smsg.size = cpu_to_scr(msglen);
7588 if (sym_setup_cdb(np, csio, cp) < 0) {
7589 sym_xpt_done(np, ccb, cp);
7590 sym_free_ccb(np, cp);
7597 #if 0 /* Provision */
7598 cp->actualquirks = tp->quirks;
7600 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7601 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7602 cp->ssss_status = S_ILLEGAL;
7603 cp->xerr_status = 0;
7605 cp->extra_bytes = 0;
7608 * extreme data pointer.
7609 * shall be positive, so -1 is lower than lowest.:)
7615 * Build the data descriptor block
7618 sym_setup_data_and_start(np, csio, cp);
7622 * Setup buffers and pointers that address the CDB.
7623 * I bet, physical CDBs will never be used on the planet,
7624 * since they can be bounced without significant overhead.
7626 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7628 struct ccb_hdr *ccb_h;
7632 SYM_LOCK_ASSERT(MA_OWNED);
7634 ccb_h = &csio->ccb_h;
7637 * CDB is 16 bytes max.
7639 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7640 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7643 cmd_len = csio->cdb_len;
7645 if (ccb_h->flags & CAM_CDB_POINTER) {
7646 /* CDB is a pointer */
7647 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7648 /* CDB pointer is virtual */
7649 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7650 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7652 /* CDB pointer is physical */
7654 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7656 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7661 /* CDB is in the CAM ccb (buffer) */
7662 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7663 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7666 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7667 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7673 * Set up data pointers used by SCRIPTS.
7675 static void __inline
7676 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7680 SYM_LOCK_ASSERT(MA_OWNED);
7683 * No segments means no data.
7689 * Set the data pointer.
7693 goalp = SCRIPTA_BA (np, data_out2) + 8;
7694 lastp = goalp - 8 - (cp->segments * (2*4));
7697 cp->host_flags |= HF_DATA_IN;
7698 goalp = SCRIPTA_BA (np, data_in2) + 8;
7699 lastp = goalp - 8 - (cp->segments * (2*4));
7703 lastp = goalp = SCRIPTB_BA (np, no_data);
7707 cp->phys.head.lastp = cpu_to_scr(lastp);
7708 cp->phys.head.goalp = cpu_to_scr(goalp);
7709 cp->phys.head.savep = cpu_to_scr(lastp);
7710 cp->startp = cp->phys.head.savep;
7714 * Call back routine for the DMA map service.
7715 * If bounce buffers are used (why ?), we may sleep and then
7716 * be called there in another context.
7719 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7727 np = (hcb_p) cp->arg;
7729 SYM_LOCK_ASSERT(MA_OWNED);
7732 * Deal with weird races.
7734 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7738 * Deal with weird errors.
7742 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7747 * Build the data descriptor for the chip.
7751 /* 896 rev 1 requires to be careful about boundaries */
7752 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7753 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7755 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7757 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7763 * Synchronize the DMA map only if we have
7764 * actually mapped the data.
7766 if (cp->dmamapped) {
7767 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7768 (cp->dmamapped == SYM_DMA_READ ?
7769 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7773 * Set host status to busy state.
7774 * May have been set back to HS_WAIT to avoid a race.
7776 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7779 * Set data pointers.
7781 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7784 * Enqueue this IO in our pending queue.
7786 sym_enqueue_cam_ccb(cp);
7789 * When `#ifed 1', the code below makes the driver
7790 * panic on the first attempt to write to a SCSI device.
7791 * It is the first test we want to do after a driver
7792 * change that does not seem obviously safe. :)
7795 switch (cp->cdb_buf[0]) {
7796 case 0x0A: case 0x2A: case 0xAA:
7797 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7805 * Activate this job.
7807 sym_put_start_queue(np, cp);
7810 sym_xpt_done(np, ccb, cp);
7811 sym_free_ccb(np, cp);
7815 * How complex it gets to deal with the data in CAM.
7816 * The Bus Dma stuff makes things still more complex.
7819 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7821 struct ccb_hdr *ccb_h;
7824 SYM_LOCK_ASSERT(MA_OWNED);
7826 ccb_h = &csio->ccb_h;
7829 * Now deal with the data.
7831 cp->data_len = csio->dxfer_len;
7835 * No direction means no data.
7837 dir = (ccb_h->flags & CAM_DIR_MASK);
7838 if (dir == CAM_DIR_NONE) {
7839 sym_execute_ccb(cp, NULL, 0, 0);
7843 cp->dmamapped = (dir == CAM_DIR_IN) ? SYM_DMA_READ : SYM_DMA_WRITE;
7844 retv = bus_dmamap_load_ccb(np->data_dmat, cp->dmamap,
7845 (union ccb *)csio, sym_execute_ccb, cp, 0);
7846 if (retv == EINPROGRESS) {
7847 cp->host_status = HS_WAIT;
7848 xpt_freeze_simq(np->sim, 1);
7849 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7854 * Move the scatter list to our data block.
7857 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7858 bus_dma_segment_t *psegs, int nsegs)
7860 struct sym_tblmove *data;
7861 bus_dma_segment_t *psegs2;
7863 SYM_LOCK_ASSERT(MA_OWNED);
7865 if (nsegs > SYM_CONF_MAX_SG)
7868 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7869 psegs2 = &psegs[nsegs-1];
7870 cp->segments = nsegs;
7873 data->addr = cpu_to_scr(psegs2->ds_addr);
7874 data->size = cpu_to_scr(psegs2->ds_len);
7875 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7876 printf ("%s scatter: paddr=%lx len=%ld\n",
7877 sym_name(np), (long) psegs2->ds_addr,
7878 (long) psegs2->ds_len);
7880 if (psegs2 != psegs) {
7891 * Scatter a SG list with physical addresses into bus addressable chunks.
7894 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
7900 SYM_LOCK_ASSERT(MA_OWNED);
7902 s = SYM_CONF_MAX_SG - 1;
7904 ps = psegs[t].ds_addr;
7905 pe = ps + psegs[t].ds_len;
7908 pn = rounddown2(pe - 1, SYM_CONF_DMA_BOUNDARY);
7912 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7913 printf ("%s scatter: paddr=%lx len=%ld\n",
7914 sym_name(np), pn, k);
7916 cp->phys.data[s].addr = cpu_to_scr(pn);
7917 cp->phys.data[s].size = cpu_to_scr(k);
7922 ps = psegs[t].ds_addr;
7923 pe = ps + psegs[t].ds_len;
7929 cp->segments = SYM_CONF_MAX_SG - 1 - s;
7931 return t >= 0 ? -1 : 0;
7935 * SIM action for non performance critical stuff.
7937 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
7939 union ccb *abort_ccb;
7940 struct ccb_hdr *ccb_h;
7941 struct ccb_pathinq *cpi;
7942 struct ccb_trans_settings *cts;
7943 struct sym_trans *tip;
7950 * Retrieve our controller data structure.
7952 np = (hcb_p) cam_sim_softc(sim);
7954 SYM_LOCK_ASSERT(MA_OWNED);
7956 ccb_h = &ccb->ccb_h;
7958 switch (ccb_h->func_code) {
7959 case XPT_SET_TRAN_SETTINGS:
7961 tp = &np->target[ccb_h->target_id];
7964 * Update SPI transport settings in TARGET control block.
7965 * Update SCSI device settings in LUN control block.
7967 lp = sym_lp(tp, ccb_h->target_lun);
7968 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7969 sym_update_trans(np, &tp->tinfo.goal, cts);
7971 sym_update_dflags(np, &lp->current_flags, cts);
7973 if (cts->type == CTS_TYPE_USER_SETTINGS) {
7974 sym_update_trans(np, &tp->tinfo.user, cts);
7976 sym_update_dflags(np, &lp->user_flags, cts);
7979 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7981 case XPT_GET_TRAN_SETTINGS:
7983 tp = &np->target[ccb_h->target_id];
7984 lp = sym_lp(tp, ccb_h->target_lun);
7986 #define cts__scsi (&cts->proto_specific.scsi)
7987 #define cts__spi (&cts->xport_specific.spi)
7988 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7989 tip = &tp->tinfo.current;
7990 dflags = lp ? lp->current_flags : 0;
7993 tip = &tp->tinfo.user;
7994 dflags = lp ? lp->user_flags : tp->usrflags;
7997 cts->protocol = PROTO_SCSI;
7998 cts->transport = XPORT_SPI;
7999 cts->protocol_version = tip->scsi_version;
8000 cts->transport_version = tip->spi_version;
8002 cts__spi->sync_period = tip->period;
8003 cts__spi->sync_offset = tip->offset;
8004 cts__spi->bus_width = tip->width;
8005 cts__spi->ppr_options = tip->options;
8007 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8008 | CTS_SPI_VALID_SYNC_OFFSET
8009 | CTS_SPI_VALID_BUS_WIDTH
8010 | CTS_SPI_VALID_PPR_OPTIONS;
8012 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8013 if (dflags & SYM_DISC_ENABLED)
8014 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8015 cts__spi->valid |= CTS_SPI_VALID_DISC;
8017 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8018 if (dflags & SYM_TAGS_ENABLED)
8019 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8020 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8023 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8025 case XPT_CALC_GEOMETRY:
8026 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8027 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8031 cpi->version_num = 1;
8032 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8033 if ((np->features & FE_WIDE) != 0)
8034 cpi->hba_inquiry |= PI_WIDE_16;
8035 cpi->target_sprt = 0;
8036 cpi->hba_misc = PIM_UNMAPPED;
8037 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8038 cpi->hba_misc |= PIM_SCANHILO;
8039 if (np->usrflags & SYM_AVOID_BUS_RESET)
8040 cpi->hba_misc |= PIM_NOBUSRESET;
8041 cpi->hba_eng_cnt = 0;
8042 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8043 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8044 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8045 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8046 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8047 cpi->bus_id = cam_sim_bus(sim);
8048 cpi->initiator_id = np->myaddr;
8049 cpi->base_transfer_speed = 3300;
8050 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8051 strlcpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8052 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8053 cpi->unit_number = cam_sim_unit(sim);
8055 cpi->protocol = PROTO_SCSI;
8056 cpi->protocol_version = SCSI_REV_2;
8057 cpi->transport = XPORT_SPI;
8058 cpi->transport_version = 2;
8059 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8060 if (np->features & FE_ULTRA3) {
8061 cpi->transport_version = 3;
8062 cpi->xport_specific.spi.ppr_options =
8063 SID_SPI_CLOCK_DT_ST;
8065 cpi->maxio = SYM_CONF_MAX_SG * PAGE_SIZE;
8066 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8069 abort_ccb = ccb->cab.abort_ccb;
8070 switch(abort_ccb->ccb_h.func_code) {
8072 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8073 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8077 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8082 sym_reset_dev(np, ccb);
8085 sym_reset_scsi_bus(np, 0);
8087 xpt_print_path(np->path);
8088 printf("SCSI BUS reset delivered.\n");
8091 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8095 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8101 * Asynchronous notification handler.
8104 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *args __unused)
8107 struct cam_sim *sim;
8111 sim = (struct cam_sim *) cb_arg;
8112 np = (hcb_p) cam_sim_softc(sim);
8114 SYM_LOCK_ASSERT(MA_OWNED);
8117 case AC_LOST_DEVICE:
8118 tn = xpt_path_target_id(path);
8119 if (tn >= SYM_CONF_MAX_TARGET)
8122 tp = &np->target[tn];
8126 tp->head.wval = np->rv_scntl3;
8129 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8130 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8131 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8132 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8141 * Update transfer settings of a target.
8143 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
8144 struct ccb_trans_settings *cts)
8147 SYM_LOCK_ASSERT(MA_OWNED);
8152 #define cts__spi (&cts->xport_specific.spi)
8153 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8154 tip->width = cts__spi->bus_width;
8155 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8156 tip->offset = cts__spi->sync_offset;
8157 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8158 tip->period = cts__spi->sync_period;
8159 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8160 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8161 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8162 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8163 tip->scsi_version = cts->protocol_version;
8164 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8165 cts->transport_version != XPORT_VERSION_UNKNOWN)
8166 tip->spi_version = cts->transport_version;
8169 * Scale against driver configuration limits.
8171 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8172 if (tip->period && tip->offset) {
8173 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8174 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8181 * Scale against actual controller BUS width.
8183 if (tip->width > np->maxwide)
8184 tip->width = np->maxwide;
8187 * Only accept DT if controller supports and SYNC/WIDE asked.
8189 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8190 !(tip->width == BUS_16_BIT && tip->offset)) {
8191 tip->options &= ~PPR_OPT_DT;
8195 * Scale period factor and offset against controller limits.
8197 if (tip->offset && tip->period) {
8198 if (tip->options & PPR_OPT_DT) {
8199 if (tip->period < np->minsync_dt)
8200 tip->period = np->minsync_dt;
8201 if (tip->period > np->maxsync_dt)
8202 tip->period = np->maxsync_dt;
8203 if (tip->offset > np->maxoffs_dt)
8204 tip->offset = np->maxoffs_dt;
8207 if (tip->period < np->minsync)
8208 tip->period = np->minsync;
8209 if (tip->period > np->maxsync)
8210 tip->period = np->maxsync;
8211 if (tip->offset > np->maxoffs)
8212 tip->offset = np->maxoffs;
8218 * Update flags for a device (logical unit).
8221 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8224 SYM_LOCK_ASSERT(MA_OWNED);
8226 #define cts__scsi (&cts->proto_specific.scsi)
8227 #define cts__spi (&cts->xport_specific.spi)
8228 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8229 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8230 *flags |= SYM_DISC_ENABLED;
8232 *flags &= ~SYM_DISC_ENABLED;
8235 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8236 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8237 *flags |= SYM_TAGS_ENABLED;
8239 *flags &= ~SYM_TAGS_ENABLED;
8245 /*============= DRIVER INITIALISATION ==================*/
8247 static device_method_t sym_pci_methods[] = {
8248 DEVMETHOD(device_probe, sym_pci_probe),
8249 DEVMETHOD(device_attach, sym_pci_attach),
8253 static driver_t sym_pci_driver = {
8259 static devclass_t sym_devclass;
8261 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, NULL, NULL);
8262 MODULE_DEPEND(sym, cam, 1, 1, 1);
8263 MODULE_DEPEND(sym, pci, 1, 1, 1);
8265 static const struct sym_pci_chip sym_pci_dev_table[] = {
8266 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8269 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8270 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8274 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8275 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8278 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8281 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8282 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8284 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8285 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8287 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8288 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8290 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8291 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8294 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8295 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8298 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8299 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8302 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8303 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8306 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8307 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8308 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8312 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8313 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8317 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8318 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8319 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8321 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8322 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8323 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8325 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8326 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8327 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8330 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8331 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8332 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8335 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8336 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8337 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8340 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8341 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8342 FE_RAM|FE_IO256|FE_LEDC}
8346 * Look up the chip table.
8348 * Return a pointer to the chip entry if found,
8351 static const struct sym_pci_chip *
8352 sym_find_pci_chip(device_t dev)
8354 const struct sym_pci_chip *chip;
8359 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8362 device_id = pci_get_device(dev);
8363 revision = pci_get_revid(dev);
8365 for (i = 0; i < nitems(sym_pci_dev_table); i++) {
8366 chip = &sym_pci_dev_table[i];
8367 if (device_id != chip->device_id)
8369 if (revision > chip->revision_id)
8378 * Tell upper layer if the chip is supported.
8381 sym_pci_probe(device_t dev)
8383 const struct sym_pci_chip *chip;
8385 chip = sym_find_pci_chip(dev);
8386 if (chip && sym_find_firmware(chip)) {
8387 device_set_desc(dev, chip->name);
8388 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8389 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8395 * Attach a sym53c8xx device.
8398 sym_pci_attach(device_t dev)
8400 const struct sym_pci_chip *chip;
8403 struct sym_hcb *np = NULL;
8404 struct sym_nvram nvram;
8405 const struct sym_fw *fw = NULL;
8407 bus_dma_tag_t bus_dmat;
8409 bus_dmat = bus_get_dma_tag(dev);
8412 * Only probed devices should be attached.
8413 * We just enjoy being paranoid. :)
8415 chip = sym_find_pci_chip(dev);
8416 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8420 * Allocate immediately the host control block,
8421 * since we are only expecting to succeed. :)
8422 * We keep track in the HCB of all the resources that
8423 * are to be released on error.
8425 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8427 np->bus_dmat = bus_dmat;
8430 device_set_softc(dev, np);
8435 * Copy some useful infos to the HCB.
8437 np->hcb_ba = vtobus(np);
8438 np->verbose = bootverbose;
8440 np->device_id = pci_get_device(dev);
8441 np->revision_id = pci_get_revid(dev);
8442 np->features = chip->features;
8443 np->clock_divn = chip->nr_divisor;
8444 np->maxoffs = chip->offset_max;
8445 np->maxburst = chip->burst_max;
8446 np->scripta_sz = fw->a_size;
8447 np->scriptb_sz = fw->b_size;
8448 np->fw_setup = fw->setup;
8449 np->fw_patch = fw->patch;
8450 np->fw_name = fw->name;
8453 np->target = sym_calloc_dma(SYM_CONF_MAX_TARGET * sizeof(*(np->target)),
8460 * Initialize the CCB free and busy queues.
8462 sym_que_init(&np->free_ccbq);
8463 sym_que_init(&np->busy_ccbq);
8464 sym_que_init(&np->comp_ccbq);
8465 sym_que_init(&np->cam_ccbq);
8468 * Allocate a tag for the DMA of user data.
8470 if (bus_dma_tag_create(np->bus_dmat, 1, SYM_CONF_DMA_BOUNDARY,
8471 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
8472 BUS_SPACE_MAXSIZE_32BIT, SYM_CONF_MAX_SG, SYM_CONF_DMA_BOUNDARY,
8473 0, busdma_lock_mutex, &np->mtx, &np->data_dmat)) {
8474 device_printf(dev, "failed to create DMA tag.\n");
8479 * Read and apply some fix-ups to the PCI COMMAND
8480 * register. We want the chip to be enabled for:
8482 * - PCI parity checking (reporting would also be fine)
8483 * - Write And Invalidate.
8485 command = pci_read_config(dev, PCIR_COMMAND, 2);
8486 command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_PERRESPEN |
8488 pci_write_config(dev, PCIR_COMMAND, command, 2);
8491 * Let the device know about the cache line size,
8492 * if it doesn't yet.
8494 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8497 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8501 * Alloc/get/map/retrieve everything that deals with MMIO.
8504 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
8506 if (!np->mmio_res) {
8507 device_printf(dev, "failed to allocate MMIO resources\n");
8510 np->mmio_ba = rman_get_start(np->mmio_res);
8516 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8517 RF_ACTIVE | RF_SHAREABLE);
8519 device_printf(dev, "failed to allocate IRQ resource\n");
8523 #ifdef SYM_CONF_IOMAPPED
8525 * User want us to use normal IO with PCI.
8526 * Alloc/get/map/retrieve everything that deals with IO.
8529 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
8531 device_printf(dev, "failed to allocate IO resources\n");
8535 #endif /* SYM_CONF_IOMAPPED */
8538 * If the chip has RAM.
8539 * Alloc/get/map/retrieve the corresponding resources.
8541 if (np->features & (FE_RAM|FE_RAM8K)) {
8542 int regs_id = SYM_PCI_RAM;
8543 if (np->features & FE_64BIT)
8544 regs_id = SYM_PCI_RAM64;
8545 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8546 ®s_id, RF_ACTIVE);
8548 device_printf(dev,"failed to allocate RAM resources\n");
8551 np->ram_id = regs_id;
8552 np->ram_ba = rman_get_start(np->ram_res);
8556 * Save setting of some IO registers, so we will
8557 * be able to probe specific implementations.
8559 sym_save_initial_setting (np);
8562 * Reset the chip now, since it has been reported
8563 * that SCSI clock calibration may not work properly
8564 * if the chip is currently active.
8566 sym_chip_reset (np);
8569 * Try to read the user set-up.
8571 (void) sym_read_nvram(np, &nvram);
8574 * Prepare controller and devices settings, according
8575 * to chip features, user set-up and driver set-up.
8577 (void) sym_prepare_setting(np, &nvram);
8580 * Check the PCI clock frequency.
8581 * Must be performed after prepare_setting since it destroys
8582 * STEST1 that is used to probe for the clock doubler.
8584 i = sym_getpciclock(np);
8586 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8589 * Allocate the start queue.
8591 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8594 np->squeue_ba = vtobus(np->squeue);
8597 * Allocate the done queue.
8599 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8602 np->dqueue_ba = vtobus(np->dqueue);
8605 * Allocate the target bus address array.
8607 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8610 np->targtbl_ba = vtobus(np->targtbl);
8613 * Allocate SCRIPTS areas.
8615 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8616 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8617 if (!np->scripta0 || !np->scriptb0)
8621 * Allocate the CCBs. We need at least ONE.
8623 for (i = 0; sym_alloc_ccb(np) != NULL; i++)
8629 * Calculate BUS addresses where we are going
8630 * to load the SCRIPTS.
8632 np->scripta_ba = vtobus(np->scripta0);
8633 np->scriptb_ba = vtobus(np->scriptb0);
8634 np->scriptb0_ba = np->scriptb_ba;
8637 np->scripta_ba = np->ram_ba;
8638 if (np->features & FE_RAM8K) {
8640 np->scriptb_ba = np->scripta_ba + 4096;
8642 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8650 * Copy scripts to controller instance.
8652 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8653 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8656 * Setup variable parts in scripts and compute
8657 * scripts bus addresses used from the C code.
8659 np->fw_setup(np, fw);
8662 * Bind SCRIPTS with physical addresses usable by the
8663 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8665 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8666 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8668 #ifdef SYM_CONF_IARB_SUPPORT
8670 * If user wants IARB to be set when we win arbitration
8671 * and have other jobs, compute the max number of consecutive
8672 * settings of IARB hints before we leave devices a chance to
8673 * arbitrate for reselection.
8675 #ifdef SYM_SETUP_IARB_MAX
8676 np->iarb_max = SYM_SETUP_IARB_MAX;
8683 * Prepare the idle and invalid task actions.
8685 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8686 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8687 np->idletask_ba = vtobus(&np->idletask);
8689 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8690 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8691 np->notask_ba = vtobus(&np->notask);
8693 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8694 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8695 np->bad_itl_ba = vtobus(&np->bad_itl);
8697 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8698 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8699 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8702 * Allocate and prepare the lun JUMP table that is used
8703 * for a target prior the probing of devices (bad lun table).
8704 * A private table will be allocated for the target on the
8705 * first INQUIRY response received.
8707 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8711 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8712 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8713 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8716 * Prepare the bus address array that contains the bus
8717 * address of each target control block.
8718 * For now, assume all logical units are wrong. :)
8720 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8721 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8722 np->target[i].head.luntbl_sa =
8723 cpu_to_scr(vtobus(np->badluntbl));
8724 np->target[i].head.lun0_sa =
8725 cpu_to_scr(vtobus(&np->badlun_sa));
8729 * Now check the cache handling of the pci chipset.
8731 if (sym_snooptest (np)) {
8732 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8737 * Now deal with CAM.
8738 * Hopefully, we will succeed with that one.:)
8740 if (!sym_cam_attach(np))
8744 * Sigh! we are done.
8750 * We will try to free all the resources we have
8751 * allocated, but if we are a boot device, this
8752 * will not help that much.;)
8761 * Free everything that have been allocated for this device.
8763 static void sym_pci_free(hcb_p np)
8772 * First free CAM resources.
8777 * Now every should be quiet for us to
8778 * free other resources.
8781 bus_release_resource(np->device, SYS_RES_MEMORY,
8782 np->ram_id, np->ram_res);
8784 bus_release_resource(np->device, SYS_RES_MEMORY,
8785 SYM_PCI_MMIO, np->mmio_res);
8787 bus_release_resource(np->device, SYS_RES_IOPORT,
8788 SYM_PCI_IO, np->io_res);
8790 bus_release_resource(np->device, SYS_RES_IRQ,
8794 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
8796 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
8798 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
8800 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
8802 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
8803 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
8804 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
8805 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
8806 sym_mfree_dma(cp, sizeof(*cp), "CCB");
8810 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
8812 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
8813 tp = &np->target[target];
8814 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
8815 lp = sym_lp(tp, lun);
8819 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
8822 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
8824 sym_mfree_dma(lp, sizeof(*lp), "LCB");
8826 #if SYM_CONF_MAX_LUN > 1
8828 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
8834 sym_mfree_dma(np->target,
8835 SYM_CONF_MAX_TARGET * sizeof(*(np->target)), "TARGET");
8838 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
8840 bus_dma_tag_destroy(np->data_dmat);
8841 if (SYM_LOCK_INITIALIZED() != 0)
8843 device_set_softc(np->device, NULL);
8844 sym_mfree_dma(np, sizeof(*np), "HCB");
8848 * Allocate CAM resources and register a bus to CAM.
8850 static int sym_cam_attach(hcb_p np)
8852 struct cam_devq *devq = NULL;
8853 struct cam_sim *sim = NULL;
8854 struct cam_path *path = NULL;
8858 * Establish our interrupt handler.
8860 err = bus_setup_intr(np->device, np->irq_res,
8861 INTR_ENTROPY | INTR_MPSAFE | INTR_TYPE_CAM,
8862 NULL, sym_intr, np, &np->intr);
8864 device_printf(np->device, "bus_setup_intr() failed: %d\n",
8870 * Create the device queue for our sym SIM.
8872 devq = cam_simq_alloc(SYM_CONF_MAX_START);
8877 * Construct our SIM entry.
8879 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np,
8880 device_get_unit(np->device),
8881 &np->mtx, 1, SYM_SETUP_MAX_TAG, devq);
8887 if (xpt_bus_register(sim, np->device, 0) != CAM_SUCCESS)
8892 if (xpt_create_path(&path, NULL,
8893 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
8894 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
8900 * Establish our async notification handler.
8902 if (xpt_register_async(AC_LOST_DEVICE, sym_async, np->sim, path) !=
8907 * Start the chip now, without resetting the BUS, since
8908 * it seems that this must stay under control of CAM.
8909 * With LVD/SE capable chips and BUS in SE mode, we may
8910 * get a spurious SMBC interrupt.
8919 cam_sim_free(sim, FALSE);
8921 cam_simq_free(devq);
8931 * Free everything that deals with CAM.
8933 static void sym_cam_free(hcb_p np)
8936 SYM_LOCK_ASSERT(MA_NOTOWNED);
8939 bus_teardown_intr(np->device, np->irq_res, np->intr);
8946 xpt_bus_deregister(cam_sim_path(np->sim));
8947 cam_sim_free(np->sim, /*free_devq*/ TRUE);
8951 xpt_free_path(np->path);
8958 /*============ OPTIONNAL NVRAM SUPPORT =================*/
8961 * Get host setup from NVRAM.
8963 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
8965 #ifdef SYM_CONF_NVRAM_SUPPORT
8967 * Get parity checking, host ID, verbose mode
8968 * and miscellaneous host flags from NVRAM.
8970 switch(nvram->type) {
8971 case SYM_SYMBIOS_NVRAM:
8972 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
8973 np->rv_scntl0 &= ~0x0a;
8974 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
8975 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
8977 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
8978 np->usrflags |= SYM_SCAN_TARGETS_HILO;
8979 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
8980 np->usrflags |= SYM_AVOID_BUS_RESET;
8982 case SYM_TEKRAM_NVRAM:
8983 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
8992 * Get target setup from NVRAM.
8994 #ifdef SYM_CONF_NVRAM_SUPPORT
8995 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
8996 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9000 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9002 #ifdef SYM_CONF_NVRAM_SUPPORT
9004 case SYM_SYMBIOS_NVRAM:
9005 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9007 case SYM_TEKRAM_NVRAM:
9008 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9016 #ifdef SYM_CONF_NVRAM_SUPPORT
9018 * Get target set-up from Symbios format NVRAM.
9021 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9023 tcb_p tp = &np->target[target];
9024 Symbios_target *tn = &nvram->target[target];
9026 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9027 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9029 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9031 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9032 tp->usrflags &= ~SYM_DISC_ENABLED;
9033 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9034 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9035 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9036 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9040 * Get target set-up from Tekram format NVRAM.
9043 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9045 tcb_p tp = &np->target[target];
9046 struct Tekram_target *tn = &nvram->target[target];
9049 if (tn->flags & TEKRAM_SYNC_NEGO) {
9050 i = tn->sync_index & 0xf;
9051 tp->tinfo.user.period = Tekram_sync[i];
9054 tp->tinfo.user.width =
9055 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9057 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9058 tp->usrtags = 2 << nvram->max_tags_index;
9061 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9062 tp->usrflags |= SYM_DISC_ENABLED;
9064 /* If any device does not support parity, we will not use this option */
9065 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9066 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9069 #ifdef SYM_CONF_DEBUG_NVRAM
9071 * Dump Symbios format NVRAM for debugging purpose.
9073 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9077 /* display Symbios nvram host data */
9078 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9079 sym_name(np), nvram->host_id & 0x0f,
9080 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9081 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9082 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9083 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9084 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9085 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9087 /* display Symbios nvram drive data */
9088 for (i = 0 ; i < 15 ; i++) {
9089 struct Symbios_target *tn = &nvram->target[i];
9090 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9092 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9093 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9094 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9095 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9097 tn->sync_period / 4,
9103 * Dump TEKRAM format NVRAM for debugging purpose.
9105 static const u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9106 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9108 int i, tags, boot_delay;
9111 /* display Tekram nvram host data */
9112 tags = 2 << nvram->max_tags_index;
9114 if (nvram->boot_delay_index < 6)
9115 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9116 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9118 case 0: rem = ""; break;
9119 case 1: rem = " REMOVABLE=boot device"; break;
9120 case 2: rem = " REMOVABLE=all"; break;
9123 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9124 sym_name(np), nvram->host_id & 0x0f,
9125 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9126 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9127 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9128 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9129 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9130 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9131 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9132 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9133 rem, boot_delay, tags);
9135 /* display Tekram nvram drive data */
9136 for (i = 0; i <= 15; i++) {
9138 struct Tekram_target *tn = &nvram->target[i];
9139 j = tn->sync_index & 0xf;
9140 sync = Tekram_sync[j];
9141 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9143 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9144 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9145 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9146 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9147 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9148 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9152 #endif /* SYM_CONF_DEBUG_NVRAM */
9153 #endif /* SYM_CONF_NVRAM_SUPPORT */
9156 * Try reading Symbios or Tekram NVRAM
9158 #ifdef SYM_CONF_NVRAM_SUPPORT
9159 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9160 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9163 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9165 #ifdef SYM_CONF_NVRAM_SUPPORT
9167 * Try to read SYMBIOS nvram.
9168 * Try to read TEKRAM nvram if Symbios nvram not found.
9170 if (SYM_SETUP_SYMBIOS_NVRAM &&
9171 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9172 nvp->type = SYM_SYMBIOS_NVRAM;
9173 #ifdef SYM_CONF_DEBUG_NVRAM
9174 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9177 else if (SYM_SETUP_TEKRAM_NVRAM &&
9178 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9179 nvp->type = SYM_TEKRAM_NVRAM;
9180 #ifdef SYM_CONF_DEBUG_NVRAM
9181 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9192 #ifdef SYM_CONF_NVRAM_SUPPORT
9194 * 24C16 EEPROM reading.
9196 * GPOI0 - data in/data out
9198 * Symbios NVRAM wiring now also used by Tekram.
9207 * Set/clear data/clock bit in GPIO0
9209 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9215 *gpreg |= write_bit;
9228 OUTB (nc_gpreg, *gpreg);
9233 * Send START condition to NVRAM to wake it up.
9235 static void S24C16_start(hcb_p np, u_char *gpreg)
9237 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9238 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9239 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9240 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9244 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9246 static void S24C16_stop(hcb_p np, u_char *gpreg)
9248 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9249 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9253 * Read or write a bit to the NVRAM,
9254 * read if GPIO0 input else write if GPIO0 output
9256 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9259 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9260 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9262 *read_bit = INB (nc_gpreg);
9263 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9264 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9268 * Output an ACK to the NVRAM after reading,
9269 * change GPIO0 to output and when done back to an input
9271 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9274 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9275 S24C16_do_bit(np, 0, write_bit, gpreg);
9276 OUTB (nc_gpcntl, *gpcntl);
9280 * Input an ACK from NVRAM after writing,
9281 * change GPIO0 to input and when done back to an output
9283 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9286 OUTB (nc_gpcntl, *gpcntl | 0x01);
9287 S24C16_do_bit(np, read_bit, 1, gpreg);
9288 OUTB (nc_gpcntl, *gpcntl);
9292 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9293 * GPIO0 must already be set as an output
9295 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9296 u_char *gpreg, u_char *gpcntl)
9300 for (x = 0; x < 8; x++)
9301 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9303 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9307 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9308 * GPIO0 must already be set as an input
9310 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9311 u_char *gpreg, u_char *gpcntl)
9317 for (x = 0; x < 8; x++) {
9318 S24C16_do_bit(np, &read_bit, 1, gpreg);
9319 *read_data |= ((read_bit & 0x01) << (7 - x));
9322 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9326 * Read 'len' bytes starting at 'offset'.
9328 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9330 u_char gpcntl, gpreg;
9331 u_char old_gpcntl, old_gpreg;
9336 /* save current state of GPCNTL and GPREG */
9337 old_gpreg = INB (nc_gpreg);
9338 old_gpcntl = INB (nc_gpcntl);
9339 gpcntl = old_gpcntl & 0x1c;
9341 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9342 OUTB (nc_gpreg, old_gpreg);
9343 OUTB (nc_gpcntl, gpcntl);
9345 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9347 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9348 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9350 /* now set NVRAM inactive with GPIO0/1 both high */
9351 S24C16_stop(np, &gpreg);
9353 /* activate NVRAM */
9354 S24C16_start(np, &gpreg);
9356 /* write device code and random address MSB */
9357 S24C16_write_byte(np, &ack_data,
9358 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9359 if (ack_data & 0x01)
9362 /* write random address LSB */
9363 S24C16_write_byte(np, &ack_data,
9364 offset & 0xff, &gpreg, &gpcntl);
9365 if (ack_data & 0x01)
9368 /* regenerate START state to set up for reading */
9369 S24C16_start(np, &gpreg);
9371 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9372 S24C16_write_byte(np, &ack_data,
9373 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9374 if (ack_data & 0x01)
9377 /* now set up GPIO0 for inputting data */
9379 OUTB (nc_gpcntl, gpcntl);
9381 /* input all requested data - only part of total NVRAM */
9382 for (x = 0; x < len; x++)
9383 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9385 /* finally put NVRAM back in inactive mode */
9387 OUTB (nc_gpcntl, gpcntl);
9388 S24C16_stop(np, &gpreg);
9391 /* return GPIO0/1 to original states after having accessed NVRAM */
9392 OUTB (nc_gpcntl, old_gpcntl);
9393 OUTB (nc_gpreg, old_gpreg);
9398 #undef SET_BIT /* 0 */
9399 #undef CLR_BIT /* 1 */
9400 #undef SET_CLK /* 2 */
9401 #undef CLR_CLK /* 3 */
9404 * Try reading Symbios NVRAM.
9407 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9409 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9410 u_char *data = (u_char *) nvram;
9411 int len = sizeof(*nvram);
9415 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9416 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9419 /* check valid NVRAM signature, verify byte count and checksum */
9420 if (nvram->type != 0 ||
9421 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9422 nvram->byte_count != len - 12)
9425 /* verify checksum */
9426 for (x = 6, csum = 0; x < len - 6; x++)
9428 if (csum != nvram->checksum)
9435 * 93C46 EEPROM reading.
9440 * GPIO4 - chip select
9446 * Pulse clock bit in GPIO0
9448 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9450 OUTB (nc_gpreg, *gpreg | 0x04);
9452 OUTB (nc_gpreg, *gpreg);
9456 * Read bit from NVRAM
9458 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9461 T93C46_Clk(np, gpreg);
9462 *read_bit = INB (nc_gpreg);
9466 * Write bit to GPIO0
9468 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9470 if (write_bit & 0x01)
9477 OUTB (nc_gpreg, *gpreg);
9480 T93C46_Clk(np, gpreg);
9484 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9486 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9489 OUTB (nc_gpreg, *gpreg);
9492 T93C46_Clk(np, gpreg);
9496 * Send read command and address to NVRAM
9498 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9499 u_char *read_bit, u_char *gpreg)
9503 /* send 9 bits, start bit (1), command (2), address (6) */
9504 for (x = 0; x < 9; x++)
9505 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9507 *read_bit = INB (nc_gpreg);
9511 * READ 2 bytes from the NVRAM
9513 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9519 for (x = 0; x < 16; x++) {
9520 T93C46_Read_Bit(np, &read_bit, gpreg);
9522 if (read_bit & 0x01)
9523 *nvram_data |= (0x01 << (15 - x));
9525 *nvram_data &= ~(0x01 << (15 - x));
9530 * Read Tekram NvRAM data.
9532 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9537 for (x = 0; x < len; x++) {
9539 /* output read command and address */
9540 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9541 if (read_bit & 0x01)
9543 T93C46_Read_Word(np, &data[x], gpreg);
9544 T93C46_Stop(np, gpreg);
9551 * Try reading 93C46 Tekram NVRAM.
9553 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9555 u_char gpcntl, gpreg;
9556 u_char old_gpcntl, old_gpreg;
9559 /* save current state of GPCNTL and GPREG */
9560 old_gpreg = INB (nc_gpreg);
9561 old_gpcntl = INB (nc_gpcntl);
9563 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9565 gpreg = old_gpreg & 0xe9;
9566 OUTB (nc_gpreg, gpreg);
9567 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9568 OUTB (nc_gpcntl, gpcntl);
9570 /* input all of NVRAM, 64 words */
9571 retv = T93C46_Read_Data(np, (u_short *) nvram,
9572 sizeof(*nvram) / sizeof(short), &gpreg);
9574 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9575 OUTB (nc_gpcntl, old_gpcntl);
9576 OUTB (nc_gpreg, old_gpreg);
9582 * Try reading Tekram NVRAM.
9585 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9587 u_char *data = (u_char *) nvram;
9588 int len = sizeof(*nvram);
9592 switch (np->device_id) {
9593 case PCI_ID_SYM53C885:
9594 case PCI_ID_SYM53C895:
9595 case PCI_ID_SYM53C896:
9596 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9599 case PCI_ID_SYM53C875:
9600 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9605 x = sym_read_T93C46_nvram(np, nvram);
9611 /* verify checksum */
9612 for (x = 0, csum = 0; x < len - 1; x += 2)
9613 csum += data[x] + (data[x+1] << 8);
9620 #endif /* SYM_CONF_NVRAM_SUPPORT */