2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
65 #include <sys/param.h>
68 * Driver configuration options.
71 #include <dev/sym/sym_conf.h>
73 #include <sys/systm.h>
74 #include <sys/malloc.h>
75 #include <sys/endian.h>
76 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/module.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
87 #include <machine/bus.h>
88 #include <machine/resource.h>
89 #include <machine/atomic.h>
92 #include <dev/ofw/openfirm.h>
93 #include <machine/ofw_machdep.h>
99 #include <cam/cam_ccb.h>
100 #include <cam/cam_sim.h>
101 #include <cam/cam_xpt_sim.h>
102 #include <cam/cam_debug.h>
104 #include <cam/scsi/scsi_all.h>
105 #include <cam/scsi/scsi_message.h>
107 /* Short and quite clear integer types */
112 typedef u_int16_t u16;
113 typedef u_int32_t u32;
116 * Driver definitions.
118 #include <dev/sym/sym_defs.h>
119 #include <dev/sym/sym_fw.h>
122 * IA32 architecture does not reorder STORES and prevents
123 * LOADS from passing STORES. It is called `program order'
124 * by Intel and allows device drivers to deal with memory
125 * ordering by only ensuring that the code is not reordered
126 * by the compiler when ordering is required.
127 * Other architectures implement a weaker ordering that
128 * requires memory barriers (and also IO barriers when they
129 * make sense) to be used.
131 #if defined __i386__ || defined __amd64__
132 #define MEMORY_BARRIER() do { ; } while(0)
133 #elif defined __powerpc__
134 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
135 #elif defined __ia64__
136 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
137 #elif defined __sparc64__
138 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
139 #elif defined __arm__
140 #define MEMORY_BARRIER() dmb()
142 #error "Not supported platform"
146 * A la VMS/CAM-3 queue management.
148 typedef struct sym_quehead {
149 struct sym_quehead *flink; /* Forward pointer */
150 struct sym_quehead *blink; /* Backward pointer */
153 #define sym_que_init(ptr) do { \
154 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
157 static __inline void __sym_que_add(struct sym_quehead * new,
158 struct sym_quehead * blink,
159 struct sym_quehead * flink)
167 static __inline void __sym_que_del(struct sym_quehead * blink,
168 struct sym_quehead * flink)
170 flink->blink = blink;
171 blink->flink = flink;
174 static __inline int sym_que_empty(struct sym_quehead *head)
176 return head->flink == head;
179 static __inline void sym_que_splice(struct sym_quehead *list,
180 struct sym_quehead *head)
182 struct sym_quehead *first = list->flink;
185 struct sym_quehead *last = list->blink;
186 struct sym_quehead *at = head->flink;
196 #define sym_que_entry(ptr, type, member) \
197 ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
199 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
201 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
203 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
205 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
207 struct sym_quehead *elem = head->flink;
210 __sym_que_del(head, elem->flink);
216 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
219 * This one may be useful.
221 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
222 for (qp = (head)->flink; qp != (head); qp = qp->flink)
224 * FreeBSD does not offer our kind of queue in the CAM CCB.
225 * So, we have to cast.
227 #define sym_qptr(p) ((struct sym_quehead *) (p))
230 * Simple bitmap operations.
232 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
233 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
234 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
237 * Number of tasks per device we want to handle.
239 #if SYM_CONF_MAX_TAG_ORDER > 8
240 #error "more than 256 tags per logical unit not allowed."
242 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
245 * Donnot use more tasks that we can handle.
247 #ifndef SYM_CONF_MAX_TAG
248 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
250 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
251 #undef SYM_CONF_MAX_TAG
252 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
256 * This one means 'NO TAG for this job'
261 * Number of SCSI targets.
263 #if SYM_CONF_MAX_TARGET > 16
264 #error "more than 16 targets not allowed."
268 * Number of logical units per target.
270 #if SYM_CONF_MAX_LUN > 64
271 #error "more than 64 logical units per target not allowed."
275 * Asynchronous pre-scaler (ns). Shall be 40 for
276 * the SCSI timings to be compliant.
278 #define SYM_CONF_MIN_ASYNC (40)
281 * Number of entries in the START and DONE queues.
283 * We limit to 1 PAGE in order to succeed allocation of
284 * these queues. Each entry is 8 bytes long (2 DWORDS).
286 #ifdef SYM_CONF_MAX_START
287 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
289 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
290 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
293 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
294 #undef SYM_CONF_MAX_QUEUE
295 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
296 #undef SYM_CONF_MAX_START
297 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
301 * For this one, we want a short name :-)
303 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
306 * Active debugging tags and verbosity.
308 #define DEBUG_ALLOC (0x0001)
309 #define DEBUG_PHASE (0x0002)
310 #define DEBUG_POLL (0x0004)
311 #define DEBUG_QUEUE (0x0008)
312 #define DEBUG_RESULT (0x0010)
313 #define DEBUG_SCATTER (0x0020)
314 #define DEBUG_SCRIPT (0x0040)
315 #define DEBUG_TINY (0x0080)
316 #define DEBUG_TIMING (0x0100)
317 #define DEBUG_NEGO (0x0200)
318 #define DEBUG_TAGS (0x0400)
319 #define DEBUG_POINTER (0x0800)
322 static int sym_debug = 0;
323 #define DEBUG_FLAGS sym_debug
325 /* #define DEBUG_FLAGS (0x0631) */
326 #define DEBUG_FLAGS (0x0000)
329 #define sym_verbose (np->verbose)
332 * Insert a delay in micro-seconds and milli-seconds.
334 static void UDELAY(int us) { DELAY(us); }
335 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
338 * Simple power of two buddy-like allocator.
340 * This simple code is not intended to be fast, but to
341 * provide power of 2 aligned memory allocations.
342 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
343 * this allocator allows simple and fast address calculations
344 * from the SCRIPTS code. In addition, cache line alignment
345 * is guaranteed for power of 2 cache line size.
347 * This allocator has been developed for the Linux sym53c8xx
348 * driver, since this O/S does not provide naturally aligned
350 * It has the advantage of allowing the driver to use private
351 * pages of memory that will be useful if we ever need to deal
352 * with IO MMUs for PCI.
354 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
355 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
357 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
360 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
361 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
362 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
364 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
365 #define free_pages(p) free((p), M_DEVBUF)
367 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
369 typedef struct m_link { /* Link between free memory chunks */
373 typedef struct m_vtob { /* Virtual to Bus address translation */
375 bus_dmamap_t dmamap; /* Map for this chunk */
376 m_addr_t vaddr; /* Virtual address */
377 m_addr_t baddr; /* Bus physical address */
379 /* Hash this stuff a bit to speed up translations */
380 #define VTOB_HASH_SHIFT 5
381 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
382 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
383 #define VTOB_HASH_CODE(m) \
384 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
386 typedef struct m_pool { /* Memory pool of a given kind */
387 bus_dma_tag_t dev_dmat; /* Identifies the pool */
388 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
389 m_addr_t (*getp)(struct m_pool *);
390 #ifdef MEMO_FREE_UNUSED
391 void (*freep)(struct m_pool *, m_addr_t);
393 #define M_GETP() mp->getp(mp)
394 #define M_FREEP(p) mp->freep(mp, p)
396 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
398 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
401 static void *___sym_malloc(m_pool_s *mp, int size)
404 int s = (1 << MEMO_SHIFT);
409 if (size > MEMO_CLUSTER_SIZE)
419 if (s == MEMO_CLUSTER_SIZE) {
420 h[j].next = (m_link_s *) M_GETP();
422 h[j].next->next = NULL;
428 a = (m_addr_t) h[j].next;
430 h[j].next = h[j].next->next;
434 h[j].next = (m_link_s *) (a+s);
435 h[j].next->next = NULL;
439 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
444 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
447 int s = (1 << MEMO_SHIFT);
453 printf("___sym_mfree(%p, %d)\n", ptr, size);
456 if (size > MEMO_CLUSTER_SIZE)
467 #ifdef MEMO_FREE_UNUSED
468 if (s == MEMO_CLUSTER_SIZE) {
475 while (q->next && q->next != (m_link_s *) b) {
479 ((m_link_s *) a)->next = h[i].next;
480 h[i].next = (m_link_s *) a;
483 q->next = q->next->next;
490 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
494 p = ___sym_malloc(mp, size);
496 if (DEBUG_FLAGS & DEBUG_ALLOC)
497 printf ("new %-10s[%4d] @%p.\n", name, size, p);
501 else if (uflags & MEMO_WARN)
502 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
507 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
509 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
511 if (DEBUG_FLAGS & DEBUG_ALLOC)
512 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
514 ___sym_mfree(mp, ptr, size);
519 * Default memory pool we donnot need to involve in DMA.
522 * With the `bus dma abstraction', we use a separate pool for
523 * memory we donnot need to involve in DMA.
525 static m_addr_t ___mp0_getp(m_pool_s *mp)
527 m_addr_t m = (m_addr_t) get_pages();
533 #ifdef MEMO_FREE_UNUSED
534 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
541 #ifdef MEMO_FREE_UNUSED
542 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
544 static m_pool_s mp0 = {0, 0, ___mp0_getp};
548 * Actual memory allocation routine for non-DMAed memory.
550 static void *sym_calloc(int size, char *name)
554 m = __sym_calloc(&mp0, size, name);
560 * Actual memory allocation routine for non-DMAed memory.
562 static void sym_mfree(void *ptr, int size, char *name)
565 __sym_mfree(&mp0, ptr, size, name);
573 * With `bus dma abstraction', we use a separate pool per parent
574 * BUS handle. A reverse table (hashed) is maintained for virtual
575 * to BUS address translation.
577 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg __unused,
582 KASSERT(nseg == 1, ("%s: too many DMA segments (%d)", __func__, nseg));
584 baddr = (bus_addr_t *)arg;
588 *baddr = segs->ds_addr;
591 static m_addr_t ___dma_getp(m_pool_s *mp)
595 bus_addr_t baddr = 0;
597 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
601 if (bus_dmamem_alloc(mp->dmat, &vaddr,
602 BUS_DMA_COHERENT | BUS_DMA_WAITOK, &vbp->dmamap))
604 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
605 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, BUS_DMA_NOWAIT);
607 int hc = VTOB_HASH_CODE(vaddr);
608 vbp->vaddr = (m_addr_t) vaddr;
609 vbp->baddr = (m_addr_t) baddr;
610 vbp->next = mp->vtob[hc];
613 return (m_addr_t) vaddr;
617 bus_dmamap_unload(mp->dmat, vbp->dmamap);
619 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
622 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
623 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
628 #ifdef MEMO_FREE_UNUSED
629 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
631 m_vtob_s **vbpp, *vbp;
632 int hc = VTOB_HASH_CODE(m);
634 vbpp = &mp->vtob[hc];
635 while (*vbpp && (*vbpp)->vaddr != m)
636 vbpp = &(*vbpp)->next;
639 *vbpp = (*vbpp)->next;
640 bus_dmamap_unload(mp->dmat, vbp->dmamap);
641 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
642 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
643 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
649 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
652 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
656 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
660 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
662 mp->dev_dmat = dev_dmat;
663 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
664 BUS_SPACE_MAXADDR_32BIT,
666 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
667 MEMO_CLUSTER_SIZE, 0,
668 NULL, NULL, &mp->dmat)) {
669 mp->getp = ___dma_getp;
670 #ifdef MEMO_FREE_UNUSED
671 mp->freep = ___dma_freep;
679 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
683 #ifdef MEMO_FREE_UNUSED
684 static void ___del_dma_pool(m_pool_s *p)
686 struct m_pool **pp = &mp0.next;
688 while (*pp && *pp != p)
692 bus_dma_tag_destroy(p->dmat);
693 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
698 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
704 mp = ___get_dma_pool(dev_dmat);
706 mp = ___cre_dma_pool(dev_dmat);
708 m = __sym_calloc(mp, size, name);
709 #ifdef MEMO_FREE_UNUSED
719 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
724 mp = ___get_dma_pool(dev_dmat);
726 __sym_mfree(mp, m, size, name);
727 #ifdef MEMO_FREE_UNUSED
734 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
737 int hc = VTOB_HASH_CODE(m);
739 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
742 mp = ___get_dma_pool(dev_dmat);
745 while (vp && (m_addr_t) vp->vaddr != a)
750 panic("sym: VTOBUS FAILED!\n");
751 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
755 * Verbs for DMAable memory handling.
756 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
759 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
760 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
761 #define _sym_mfree_dma(np, p, s, n) \
762 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
763 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
764 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
765 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
766 #define vtobus(p) _vtobus(np, p)
769 * Print a buffer in hexadecimal format.
771 static void sym_printb_hex (u_char *p, int n)
774 printf (" %x", *p++);
778 * Same with a label at beginning and .\n at end.
780 static void sym_printl_hex (char *label, u_char *p, int n)
782 printf ("%s", label);
783 sym_printb_hex (p, n);
788 * Return a string for SCSI BUS mode.
790 static const char *sym_scsi_bus_mode(int mode)
793 case SMODE_HVD: return "HVD";
794 case SMODE_SE: return "SE";
795 case SMODE_LVD: return "LVD";
801 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
803 #ifdef SYM_CONF_NVRAM_SUPPORT
804 static const u_char Tekram_sync[16] =
805 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
809 * Union of supported NVRAM formats.
813 #define SYM_SYMBIOS_NVRAM (1)
814 #define SYM_TEKRAM_NVRAM (2)
815 #ifdef SYM_CONF_NVRAM_SUPPORT
817 Symbios_nvram Symbios;
824 * This one is hopefully useless, but actually useful. :-)
827 #define assert(expression) { \
828 if (!(expression)) { \
830 "assertion \"%s\" failed: file \"%s\", line %d\n", \
832 __FILE__, __LINE__); \
838 * Some provision for a possible big endian mode supported by
839 * Symbios chips (never seen, by the way).
840 * For now, this stuff does not deserve any comments. :)
842 #define sym_offb(o) (o)
843 #define sym_offw(o) (o)
846 * Some provision for support for BIG ENDIAN CPU.
848 #define cpu_to_scr(dw) htole32(dw)
849 #define scr_to_cpu(dw) le32toh(dw)
852 * Access to the chip IO registers and on-chip RAM.
853 * We use the `bus space' interface under FreeBSD-4 and
854 * later kernel versions.
856 #if defined(SYM_CONF_IOMAPPED)
858 #define INB_OFF(o) bus_read_1(np->io_res, (o))
859 #define INW_OFF(o) bus_read_2(np->io_res, (o))
860 #define INL_OFF(o) bus_read_4(np->io_res, (o))
862 #define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))
863 #define OUTW_OFF(o, v) bus_write_2(np->io_res, (o), (v))
864 #define OUTL_OFF(o, v) bus_write_4(np->io_res, (o), (v))
866 #else /* Memory mapped IO */
868 #define INB_OFF(o) bus_read_1(np->mmio_res, (o))
869 #define INW_OFF(o) bus_read_2(np->mmio_res, (o))
870 #define INL_OFF(o) bus_read_4(np->mmio_res, (o))
872 #define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))
873 #define OUTW_OFF(o, v) bus_write_2(np->mmio_res, (o), (v))
874 #define OUTL_OFF(o, v) bus_write_4(np->mmio_res, (o), (v))
876 #endif /* SYM_CONF_IOMAPPED */
878 #define OUTRAM_OFF(o, a, l) \
879 bus_write_region_1(np->ram_res, (o), (a), (l))
882 * Common definitions for both bus space and legacy IO methods.
884 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
885 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
886 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
888 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
889 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
890 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
892 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
893 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
894 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
895 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
896 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
897 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
900 * We normally want the chip to have a consistent view
901 * of driver internal data structures when we restart it.
904 #define OUTL_DSP(v) \
907 OUTL (nc_dsp, (v)); \
910 #define OUTONB_STD() \
913 OUTONB (nc_dcntl, (STD|NOCOM)); \
917 * Command control block states.
921 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
922 #define HS_DISCONNECT (3) /* Disconnected by target */
923 #define HS_WAIT (4) /* waiting for resource */
925 #define HS_DONEMASK (0x80)
926 #define HS_COMPLETE (4|HS_DONEMASK)
927 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
928 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
929 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
932 * Software Interrupt Codes
934 #define SIR_BAD_SCSI_STATUS (1)
935 #define SIR_SEL_ATN_NO_MSG_OUT (2)
936 #define SIR_MSG_RECEIVED (3)
937 #define SIR_MSG_WEIRD (4)
938 #define SIR_NEGO_FAILED (5)
939 #define SIR_NEGO_PROTO (6)
940 #define SIR_SCRIPT_STOPPED (7)
941 #define SIR_REJECT_TO_SEND (8)
942 #define SIR_SWIDE_OVERRUN (9)
943 #define SIR_SODL_UNDERRUN (10)
944 #define SIR_RESEL_NO_MSG_IN (11)
945 #define SIR_RESEL_NO_IDENTIFY (12)
946 #define SIR_RESEL_BAD_LUN (13)
947 #define SIR_TARGET_SELECTED (14)
948 #define SIR_RESEL_BAD_I_T_L (15)
949 #define SIR_RESEL_BAD_I_T_L_Q (16)
950 #define SIR_ABORT_SENT (17)
951 #define SIR_RESEL_ABORTED (18)
952 #define SIR_MSG_OUT_DONE (19)
953 #define SIR_COMPLETE_ERROR (20)
954 #define SIR_DATA_OVERRUN (21)
955 #define SIR_BAD_PHASE (22)
959 * Extended error bit codes.
960 * xerr_status field of struct sym_ccb.
962 #define XE_EXTRA_DATA (1) /* unexpected data phase */
963 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
964 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
965 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
966 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
969 * Negotiation status.
970 * nego_status field of struct sym_ccb.
977 * A CCB hashed table is used to retrieve CCB address
980 #define CCB_HASH_SHIFT 8
981 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
982 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
983 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
988 #define SYM_DISC_ENABLED (1)
989 #define SYM_TAGS_ENABLED (1<<1)
990 #define SYM_SCAN_BOOT_DISABLED (1<<2)
991 #define SYM_SCAN_LUNS_DISABLED (1<<3)
994 * Host adapter miscellaneous flags.
996 #define SYM_AVOID_BUS_RESET (1)
997 #define SYM_SCAN_TARGETS_HILO (1<<1)
1001 * Some devices, for example the CHEETAH 2 LVD, disconnects without
1002 * saving the DATA POINTER then reselects and terminates the IO.
1003 * On reselection, the automatic RESTORE DATA POINTER makes the
1004 * CURRENT DATA POINTER not point at the end of the IO.
1005 * This behaviour just breaks our calculation of the residual.
1006 * For now, we just force an AUTO SAVE on disconnection and will
1007 * fix that in a further driver version.
1009 #define SYM_QUIRK_AUTOSAVE 1
1014 #define SYM_LOCK() mtx_lock(&np->mtx)
1015 #define SYM_LOCK_ASSERT(_what) mtx_assert(&np->mtx, (_what))
1016 #define SYM_LOCK_DESTROY() mtx_destroy(&np->mtx)
1017 #define SYM_LOCK_INIT() mtx_init(&np->mtx, "sym_lock", NULL, MTX_DEF)
1018 #define SYM_LOCK_INITIALIZED() mtx_initialized(&np->mtx)
1019 #define SYM_UNLOCK() mtx_unlock(&np->mtx)
1021 #define SYM_SNOOP_TIMEOUT (10000000)
1022 #define SYM_PCI_IO PCIR_BAR(0)
1023 #define SYM_PCI_MMIO PCIR_BAR(1)
1024 #define SYM_PCI_RAM PCIR_BAR(2)
1025 #define SYM_PCI_RAM64 PCIR_BAR(3)
1028 * Back-pointer from the CAM CCB to our data structures.
1030 #define sym_hcb_ptr spriv_ptr0
1031 /* #define sym_ccb_ptr spriv_ptr1 */
1034 * We mostly have to deal with pointers.
1035 * Thus these typedef's.
1037 typedef struct sym_tcb *tcb_p;
1038 typedef struct sym_lcb *lcb_p;
1039 typedef struct sym_ccb *ccb_p;
1040 typedef struct sym_hcb *hcb_p;
1043 * Gather negotiable parameters value
1051 u8 options; /* PPR options */
1055 struct sym_trans current;
1056 struct sym_trans goal;
1057 struct sym_trans user;
1060 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1061 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1064 * Global TCB HEADER.
1066 * Due to lack of indirect addressing on earlier NCR chips,
1067 * this substructure is copied from the TCB to a global
1068 * address after selection.
1069 * For SYMBIOS chips that support LOAD/STORE this copy is
1070 * not needed and thus not performed.
1074 * Scripts bus addresses of LUN table accessed from scripts.
1075 * LUN #0 is a special case, since multi-lun devices are rare,
1076 * and we we want to speed-up the general case and not waste
1079 u32 luntbl_sa; /* bus address of this table */
1080 u32 lun0_sa; /* bus address of LCB #0 */
1082 * Actual SYNC/WIDE IO registers value for this target.
1083 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1084 * so have alignment constraints.
1086 /*0*/ u_char uval; /* -> SCNTL4 register */
1087 /*1*/ u_char sval; /* -> SXFER io register */
1088 /*2*/ u_char filler1;
1089 /*3*/ u_char wval; /* -> SCNTL3 io register */
1093 * Target Control Block
1098 * Assumed at offset 0.
1100 /*0*/ struct sym_tcbh head;
1103 * LUN table used by the SCRIPTS processor.
1104 * An array of bus addresses is used on reselection.
1106 u32 *luntbl; /* LCBs bus address table */
1109 * LUN table used by the C code.
1111 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1112 #if SYM_CONF_MAX_LUN > 1
1113 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1117 * Bitmap that tells about LUNs that succeeded at least
1118 * 1 IO and therefore assumed to be a real device.
1119 * Avoid useless allocation of the LCB structure.
1121 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1124 * Bitmap that tells about LUNs that haven't yet an LCB
1125 * allocated (not discovered or LCB allocation failed).
1127 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1130 * Transfer capabilities (SIP)
1132 struct sym_tinfo tinfo;
1135 * Keep track of the CCB used for the negotiation in order
1136 * to ensure that only 1 negotiation is queued at a time.
1138 ccb_p nego_cp; /* CCB used for the nego */
1141 * Set when we want to reset the device.
1146 * Other user settable limits and options.
1147 * These limits are read from the NVRAM if present.
1154 * Assert some alignments required by the chip.
1156 CTASSERT(((offsetof(struct sym_reg, nc_sxfer) ^
1157 offsetof(struct sym_tcb, head.sval)) &3) == 0);
1158 CTASSERT(((offsetof(struct sym_reg, nc_scntl3) ^
1159 offsetof(struct sym_tcb, head.wval)) &3) == 0);
1162 * Global LCB HEADER.
1164 * Due to lack of indirect addressing on earlier NCR chips,
1165 * this substructure is copied from the LCB to a global
1166 * address after selection.
1167 * For SYMBIOS chips that support LOAD/STORE this copy is
1168 * not needed and thus not performed.
1172 * SCRIPTS address jumped by SCRIPTS on reselection.
1173 * For not probed logical units, this address points to
1174 * SCRIPTS that deal with bad LU handling (must be at
1175 * offset zero of the LCB for that reason).
1180 * Task (bus address of a CCB) read from SCRIPTS that points
1181 * to the unique ITL nexus allowed to be disconnected.
1186 * Task table bus address (read from SCRIPTS).
1192 * Logical Unit Control Block
1197 * Assumed at offset 0.
1199 /*0*/ struct sym_lcbh head;
1202 * Task table read from SCRIPTS that contains pointers to
1203 * ITLQ nexuses. The bus address read from SCRIPTS is
1204 * inside the header.
1206 u32 *itlq_tbl; /* Kernel virtual address */
1209 * Busy CCBs management.
1211 u_short busy_itlq; /* Number of busy tagged CCBs */
1212 u_short busy_itl; /* Number of busy untagged CCBs */
1215 * Circular tag allocation buffer.
1217 u_short ia_tag; /* Tag allocation index */
1218 u_short if_tag; /* Tag release index */
1219 u_char *cb_tags; /* Circular tags buffer */
1222 * Set when we want to clear all tasks.
1230 u_char current_flags;
1234 * Action from SCRIPTS on a task.
1235 * Is part of the CCB, but is also used separately to plug
1236 * error handling action to perform from SCRIPTS.
1239 u32 start; /* Jumped by SCRIPTS after selection */
1240 u32 restart; /* Jumped by SCRIPTS on relection */
1244 * Phase mismatch context.
1246 * It is part of the CCB and is used as parameters for the
1247 * DATA pointer. We need two contexts to handle correctly the
1248 * SAVED DATA POINTER.
1251 struct sym_tblmove sg; /* Updated interrupted SG block */
1252 u32 ret; /* SCRIPT return address */
1256 * LUN control block lookup.
1257 * We use a direct pointer for LUN #0, and a table of
1258 * pointers which is only allocated for devices that support
1261 #if SYM_CONF_MAX_LUN <= 1
1262 #define sym_lp(tp, lun) (!lun) ? (tp)->lun0p : 0
1264 #define sym_lp(tp, lun) \
1265 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1269 * Status are used by the host and the script processor.
1271 * The last four bytes (status[4]) are copied to the
1272 * scratchb register (declared as scr0..scr3) just after the
1273 * select/reselect, and copied back just after disconnecting.
1274 * Inside the script the XX_REG are used.
1278 * Last four bytes (script)
1282 #define HS_PRT nc_scr1
1284 #define SS_PRT nc_scr2
1286 #define HF_PRT nc_scr3
1289 * Last four bytes (host)
1291 #define actualquirks phys.head.status[0]
1292 #define host_status phys.head.status[1]
1293 #define ssss_status phys.head.status[2]
1294 #define host_flags phys.head.status[3]
1299 #define HF_IN_PM0 1u
1300 #define HF_IN_PM1 (1u<<1)
1301 #define HF_ACT_PM (1u<<2)
1302 #define HF_DP_SAVED (1u<<3)
1303 #define HF_SENSE (1u<<4)
1304 #define HF_EXT_ERR (1u<<5)
1305 #define HF_DATA_IN (1u<<6)
1306 #ifdef SYM_CONF_IARB_SUPPORT
1307 #define HF_HINT_IARB (1u<<7)
1311 * Global CCB HEADER.
1313 * Due to lack of indirect addressing on earlier NCR chips,
1314 * this substructure is copied from the ccb to a global
1315 * address after selection (or reselection) and copied back
1316 * before disconnect.
1317 * For SYMBIOS chips that support LOAD/STORE this copy is
1318 * not needed and thus not performed.
1322 * Start and restart SCRIPTS addresses (must be at 0).
1324 /*0*/ struct sym_actscr go;
1327 * SCRIPTS jump address that deal with data pointers.
1328 * 'savep' points to the position in the script responsible
1329 * for the actual transfer of data.
1330 * It's written on reception of a SAVE_DATA_POINTER message.
1332 u32 savep; /* Jump address to saved data pointer */
1333 u32 lastp; /* SCRIPTS address at end of data */
1334 u32 goalp; /* Not accessed for now from SCRIPTS */
1343 * Data Structure Block
1345 * During execution of a ccb by the script processor, the
1346 * DSA (data structure address) register points to this
1347 * substructure of the ccb.
1352 * Also assumed at offset 0 of the sym_ccb structure.
1354 /*0*/ struct sym_ccbh head;
1357 * Phase mismatch contexts.
1358 * We need two to handle correctly the SAVED DATA POINTER.
1359 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1360 * for address calculation from SCRIPTS.
1366 * Table data for Script
1368 struct sym_tblsel select;
1369 struct sym_tblmove smsg;
1370 struct sym_tblmove smsg_ext;
1371 struct sym_tblmove cmd;
1372 struct sym_tblmove sense;
1373 struct sym_tblmove wresid;
1374 struct sym_tblmove data [SYM_CONF_MAX_SG];
1378 * Our Command Control Block
1382 * This is the data structure which is pointed by the DSA
1383 * register when it is executed by the script processor.
1384 * It must be the first entry.
1386 struct sym_dsb phys;
1389 * Pointer to CAM ccb and related stuff.
1391 struct callout ch; /* callout handle */
1392 union ccb *cam_ccb; /* CAM scsiio ccb */
1393 u8 cdb_buf[16]; /* Copy of CDB */
1394 u8 *sns_bbuf; /* Bounce buffer for sense data */
1395 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1396 int data_len; /* Total data length */
1397 int segments; /* Number of SG segments */
1400 * Miscellaneous status'.
1402 u_char nego_status; /* Negotiation status */
1403 u_char xerr_status; /* Extended error flags */
1404 u32 extra_bytes; /* Extraneous bytes transferred */
1408 * We prepare a message to be sent after selection.
1409 * We may use a second one if the command is rescheduled
1410 * due to CHECK_CONDITION or COMMAND TERMINATED.
1411 * Contents are IDENTIFY and SIMPLE_TAG.
1412 * While negotiating sync or wide transfer,
1413 * a SDTR or WDTR message is appended.
1415 u_char scsi_smsg [12];
1416 u_char scsi_smsg2[12];
1419 * Auto request sense related fields.
1421 u_char sensecmd[6]; /* Request Sense command */
1422 u_char sv_scsi_status; /* Saved SCSI status */
1423 u_char sv_xerr_status; /* Saved extended status */
1424 int sv_resid; /* Saved residual */
1427 * Map for the DMA of user data.
1429 void *arg; /* Argument for some callback */
1430 bus_dmamap_t dmamap; /* DMA map for user data */
1432 #define SYM_DMA_NONE 0
1433 #define SYM_DMA_READ 1
1434 #define SYM_DMA_WRITE 2
1438 u32 ccb_ba; /* BUS address of this CCB */
1439 u_short tag; /* Tag for this transfer */
1440 /* NO_TAG means no tag */
1443 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1445 link_ccbq; /* Link to free/busy CCB queue */
1446 u32 startp; /* Initial data pointer */
1447 int ext_sg; /* Extreme data pointer, used */
1448 int ext_ofs; /* to calculate the residual. */
1449 u_char to_abort; /* Want this IO to be aborted */
1452 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1455 * Host Control Block
1462 * Due to poorness of addressing capabilities, earlier
1463 * chips (810, 815, 825) copy part of the data structures
1464 * (CCB, TCB and LCB) in fixed areas.
1466 #ifdef SYM_CONF_GENERIC_SUPPORT
1467 struct sym_ccbh ccb_head;
1468 struct sym_tcbh tcb_head;
1469 struct sym_lcbh lcb_head;
1472 * Idle task and invalid task actions and
1473 * their bus addresses.
1475 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1476 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1479 * Dummy lun table to protect us against target
1480 * returning bad lun number on reselection.
1482 u32 *badluntbl; /* Table physical address */
1483 u32 badlun_sa; /* SCRIPT handler BUS address */
1486 * Bus address of this host control block.
1491 * Bit 32-63 of the on-chip RAM bus address in LE format.
1492 * The START_RAM64 script loads the MMRS and MMWS from this
1498 * Chip and controller indentification.
1503 * Initial value of some IO register bits.
1504 * These values are assumed to have been set by BIOS, and may
1505 * be used to probe adapter implementation differences.
1507 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1508 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1512 * Actual initial value of IO register bits used by the
1513 * driver. They are loaded at initialisation according to
1514 * features that are to be enabled/disabled.
1516 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1517 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1523 struct sym_tcb *target;
1525 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1529 * Target control block bus address array used by the SCRIPT
1536 * CAM SIM information for this instance.
1538 struct cam_sim *sim;
1539 struct cam_path *path;
1542 * Allocated hardware resources.
1544 struct resource *irq_res;
1545 struct resource *io_res;
1546 struct resource *mmio_res;
1547 struct resource *ram_res;
1554 * My understanding of PCI is that all agents must share the
1555 * same addressing range and model.
1556 * But some hardware architecture guys provide complex and
1557 * brain-deaded stuff that makes shit.
1558 * This driver only support PCI compliant implementations and
1559 * deals with part of the BUS stuff complexity only to fit O/S
1566 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1567 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1569 * BUS addresses of the chip
1571 vm_offset_t mmio_ba; /* MMIO BUS address */
1572 int mmio_ws; /* MMIO Window size */
1574 vm_offset_t ram_ba; /* RAM BUS address */
1575 int ram_ws; /* RAM window size */
1578 * SCRIPTS virtual and physical bus addresses.
1579 * 'script' is loaded in the on-chip RAM if present.
1580 * 'scripth' stays in main memory for all chips except the
1581 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1583 u_char *scripta0; /* Copies of script and scripth */
1584 u_char *scriptb0; /* Copies of script and scripth */
1585 vm_offset_t scripta_ba; /* Actual script and scripth */
1586 vm_offset_t scriptb_ba; /* bus addresses. */
1587 vm_offset_t scriptb0_ba;
1588 u_short scripta_sz; /* Actual size of script A */
1589 u_short scriptb_sz; /* Actual size of script B */
1592 * Bus addresses, setup and patch methods for
1593 * the selected firmware.
1595 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1596 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1597 void (*fw_setup)(hcb_p np, const struct sym_fw *fw);
1598 void (*fw_patch)(hcb_p np);
1599 const char *fw_name;
1602 * General controller parameters and configuration.
1604 u_short device_id; /* PCI device id */
1605 u_char revision_id; /* PCI device revision id */
1606 u_int features; /* Chip features map */
1607 u_char myaddr; /* SCSI id of the adapter */
1608 u_char maxburst; /* log base 2 of dwords burst */
1609 u_char maxwide; /* Maximum transfer width */
1610 u_char minsync; /* Min sync period factor (ST) */
1611 u_char maxsync; /* Max sync period factor (ST) */
1612 u_char maxoffs; /* Max scsi offset (ST) */
1613 u_char minsync_dt; /* Min sync period factor (DT) */
1614 u_char maxsync_dt; /* Max sync period factor (DT) */
1615 u_char maxoffs_dt; /* Max scsi offset (DT) */
1616 u_char multiplier; /* Clock multiplier (1,2,4) */
1617 u_char clock_divn; /* Number of clock divisors */
1618 u32 clock_khz; /* SCSI clock frequency in KHz */
1619 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1621 * Start queue management.
1622 * It is filled up by the host processor and accessed by the
1623 * SCRIPTS processor in order to start SCSI commands.
1625 volatile /* Prevent code optimizations */
1626 u32 *squeue; /* Start queue virtual address */
1627 u32 squeue_ba; /* Start queue BUS address */
1628 u_short squeueput; /* Next free slot of the queue */
1629 u_short actccbs; /* Number of allocated CCBs */
1632 * Command completion queue.
1633 * It is the same size as the start queue to avoid overflow.
1635 u_short dqueueget; /* Next position to scan */
1636 volatile /* Prevent code optimizations */
1637 u32 *dqueue; /* Completion (done) queue */
1638 u32 dqueue_ba; /* Done queue BUS address */
1641 * Miscellaneous buffers accessed by the scripts-processor.
1642 * They shall be DWORD aligned, because they may be read or
1643 * written with a script command.
1645 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1646 u_char msgin [8]; /* Buffer for MESSAGE IN */
1647 u32 lastmsg; /* Last SCSI message sent */
1648 u_char scratch; /* Scratch for SCSI receive */
1651 * Miscellaneous configuration and status parameters.
1653 u_char usrflags; /* Miscellaneous user flags */
1654 u_char scsi_mode; /* Current SCSI BUS mode */
1655 u_char verbose; /* Verbosity for this controller*/
1656 u32 cache; /* Used for cache test at init. */
1659 * CCB lists and queue.
1661 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1662 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1663 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1666 * During error handling and/or recovery,
1667 * active CCBs that are to be completed with
1668 * error or requeued are moved from the busy_ccbq
1669 * to the comp_ccbq prior to completion.
1671 SYM_QUEHEAD comp_ccbq;
1674 * CAM CCB pending queue.
1676 SYM_QUEHEAD cam_ccbq;
1679 * IMMEDIATE ARBITRATION (IARB) control.
1681 * We keep track in 'last_cp' of the last CCB that has been
1682 * queued to the SCRIPTS processor and clear 'last_cp' when
1683 * this CCB completes. If last_cp is not zero at the moment
1684 * we queue a new CCB, we set a flag in 'last_cp' that is
1685 * used by the SCRIPTS as a hint for setting IARB.
1686 * We donnot set more than 'iarb_max' consecutive hints for
1687 * IARB in order to leave devices a chance to reselect.
1688 * By the way, any non zero value of 'iarb_max' is unfair. :)
1690 #ifdef SYM_CONF_IARB_SUPPORT
1691 u_short iarb_max; /* Max. # consecutive IARB hints*/
1692 u_short iarb_count; /* Actual # of these hints */
1697 * Command abort handling.
1698 * We need to synchronize tightly with the SCRIPTS
1699 * processor in order to handle things correctly.
1701 u_char abrt_msg[4]; /* Message to send buffer */
1702 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1703 struct sym_tblsel abrt_sel; /* Sync params for selection */
1704 u_char istat_sem; /* Tells the chip to stop (SEM) */
1707 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1710 * Return the name of the controller.
1712 static __inline const char *sym_name(hcb_p np)
1714 return device_get_nameunit(np->device);
1717 /*--------------------------------------------------------------------------*/
1718 /*------------------------------ FIRMWARES ---------------------------------*/
1719 /*--------------------------------------------------------------------------*/
1722 * This stuff will be moved to a separate source file when
1723 * the driver will be broken into several source modules.
1727 * Macros used for all firmwares.
1729 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1730 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1731 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1732 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1734 #ifdef SYM_CONF_GENERIC_SUPPORT
1736 * Allocate firmware #1 script area.
1738 #define SYM_FWA_SCR sym_fw1a_scr
1739 #define SYM_FWB_SCR sym_fw1b_scr
1740 #include <dev/sym/sym_fw1.h>
1741 static const struct sym_fwa_ofs sym_fw1a_ofs = {
1742 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1744 static const struct sym_fwb_ofs sym_fw1b_ofs = {
1745 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1749 #endif /* SYM_CONF_GENERIC_SUPPORT */
1752 * Allocate firmware #2 script area.
1754 #define SYM_FWA_SCR sym_fw2a_scr
1755 #define SYM_FWB_SCR sym_fw2b_scr
1756 #include <dev/sym/sym_fw2.h>
1757 static const struct sym_fwa_ofs sym_fw2a_ofs = {
1758 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1760 static const struct sym_fwb_ofs sym_fw2b_ofs = {
1761 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1762 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1763 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1773 #ifdef SYM_CONF_GENERIC_SUPPORT
1775 * Patch routine for firmware #1.
1778 sym_fw1_patch(hcb_p np)
1780 struct sym_fw1a_scr *scripta0;
1781 struct sym_fw1b_scr *scriptb0;
1783 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1784 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1787 * Remove LED support if not needed.
1789 if (!(np->features & FE_LED0)) {
1790 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1791 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1792 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1795 #ifdef SYM_CONF_IARB_SUPPORT
1797 * If user does not want to use IMMEDIATE ARBITRATION
1798 * when we are reselected while attempting to arbitrate,
1799 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1801 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1802 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1805 * Patch some data in SCRIPTS.
1806 * - start and done queue initial bus address.
1807 * - target bus address table bus address.
1809 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1810 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1811 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1813 #endif /* SYM_CONF_GENERIC_SUPPORT */
1816 * Patch routine for firmware #2.
1819 sym_fw2_patch(hcb_p np)
1821 struct sym_fw2a_scr *scripta0;
1822 struct sym_fw2b_scr *scriptb0;
1824 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1825 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1828 * Remove LED support if not needed.
1830 if (!(np->features & FE_LED0)) {
1831 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1832 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1833 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1836 #ifdef SYM_CONF_IARB_SUPPORT
1838 * If user does not want to use IMMEDIATE ARBITRATION
1839 * when we are reselected while attempting to arbitrate,
1840 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1842 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1843 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1846 * Patch some variable in SCRIPTS.
1847 * - start and done queue initial bus address.
1848 * - target bus address table bus address.
1850 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1851 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1852 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1855 * Remove the load of SCNTL4 on reselection if not a C10.
1857 if (!(np->features & FE_C10)) {
1858 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1859 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1863 * Remove a couple of work-arounds specific to C1010 if
1864 * they are not desirable. See `sym_fw2.h' for more details.
1866 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1867 np->revision_id < 0x1 &&
1868 np->pciclk_khz < 60000)) {
1869 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1870 scripta0->datao_phase[1] = cpu_to_scr(0);
1872 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1873 /* np->revision_id < 0xff */ 1)) {
1874 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1875 scripta0->sel_done[1] = cpu_to_scr(0);
1879 * Patch some other variables in SCRIPTS.
1880 * These ones are loaded by the SCRIPTS processor.
1882 scriptb0->pm0_data_addr[0] =
1883 cpu_to_scr(np->scripta_ba +
1884 offsetof(struct sym_fw2a_scr, pm0_data));
1885 scriptb0->pm1_data_addr[0] =
1886 cpu_to_scr(np->scripta_ba +
1887 offsetof(struct sym_fw2a_scr, pm1_data));
1891 * Fill the data area in scripts.
1892 * To be done for all firmwares.
1895 sym_fw_fill_data (u32 *in, u32 *out)
1899 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1900 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1901 *in++ = offsetof (struct sym_dsb, data[i]);
1902 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1903 *out++ = offsetof (struct sym_dsb, data[i]);
1908 * Setup useful script bus addresses.
1909 * To be done for all firmwares.
1912 sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw)
1919 * Build the bus address table for script A
1920 * from the script A offset table.
1922 po = (const u_short *) fw->a_ofs;
1923 pa = (u32 *) &np->fwa_bas;
1924 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1925 pa[i] = np->scripta_ba + po[i];
1928 * Same for script B.
1930 po = (const u_short *) fw->b_ofs;
1931 pa = (u32 *) &np->fwb_bas;
1932 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1933 pa[i] = np->scriptb_ba + po[i];
1936 #ifdef SYM_CONF_GENERIC_SUPPORT
1938 * Setup routine for firmware #1.
1941 sym_fw1_setup(hcb_p np, const struct sym_fw *fw)
1943 struct sym_fw1a_scr *scripta0;
1945 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1948 * Fill variable parts in scripts.
1950 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1953 * Setup bus addresses used from the C code..
1955 sym_fw_setup_bus_addresses(np, fw);
1957 #endif /* SYM_CONF_GENERIC_SUPPORT */
1960 * Setup routine for firmware #2.
1963 sym_fw2_setup(hcb_p np, const struct sym_fw *fw)
1965 struct sym_fw2a_scr *scripta0;
1967 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1970 * Fill variable parts in scripts.
1972 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1975 * Setup bus addresses used from the C code..
1977 sym_fw_setup_bus_addresses(np, fw);
1981 * Allocate firmware descriptors.
1983 #ifdef SYM_CONF_GENERIC_SUPPORT
1984 static const struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
1985 #endif /* SYM_CONF_GENERIC_SUPPORT */
1986 static const struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
1989 * Find the most appropriate firmware for a chip.
1991 static const struct sym_fw *
1992 sym_find_firmware(const struct sym_pci_chip *chip)
1994 if (chip->features & FE_LDSTR)
1996 #ifdef SYM_CONF_GENERIC_SUPPORT
1997 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2005 * Bind a script to physical addresses.
2007 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2009 u32 opcode, new, old, tmp1, tmp2;
2014 end = start + len/4;
2021 * If we forget to change the length
2022 * in scripts, a field will be
2023 * padded with 0. This is an illegal
2027 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2028 sym_name(np), (int) (cur-start));
2035 * We use the bogus value 0xf00ff00f ;-)
2036 * to reserve data area in SCRIPTS.
2038 if (opcode == SCR_DATA_ZERO) {
2043 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2044 printf ("%d: <%x>\n", (int) (cur-start),
2048 * We don't have to decode ALL commands
2050 switch (opcode >> 28) {
2053 * LOAD / STORE DSA relative, don't relocate.
2059 * LOAD / STORE absolute.
2065 * COPY has TWO arguments.
2070 if ((tmp1 ^ tmp2) & 3) {
2071 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2072 sym_name(np), (int) (cur-start));
2076 * If PREFETCH feature not enabled, remove
2077 * the NO FLUSH bit if present.
2079 if ((opcode & SCR_NO_FLUSH) &&
2080 !(np->features & FE_PFEN)) {
2081 opcode = (opcode & ~SCR_NO_FLUSH);
2086 * MOVE/CHMOV (absolute address)
2088 if (!(np->features & FE_WIDE))
2089 opcode = (opcode | OPC_MOVE);
2094 * MOVE/CHMOV (table indirect)
2096 if (!(np->features & FE_WIDE))
2097 opcode = (opcode | OPC_MOVE);
2103 * dont't relocate if relative :-)
2105 if (opcode & 0x00800000)
2107 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2124 * Scriptify:) the opcode.
2126 *cur++ = cpu_to_scr(opcode);
2129 * If no relocation, assume 1 argument
2130 * and just scriptize:) it.
2133 *cur = cpu_to_scr(*cur);
2139 * Otherwise performs all needed relocations.
2144 switch (old & RELOC_MASK) {
2145 case RELOC_REGISTER:
2146 new = (old & ~RELOC_MASK) + np->mmio_ba;
2149 new = (old & ~RELOC_MASK) + np->scripta_ba;
2152 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2155 new = (old & ~RELOC_MASK) + np->hcb_ba;
2159 * Don't relocate a 0 address.
2160 * They are mostly used for patched or
2161 * script self-modified areas.
2170 panic("sym_fw_bind_script: "
2171 "weird relocation %x\n", old);
2175 *cur++ = cpu_to_scr(new);
2180 /*---------------------------------------------------------------------------*/
2181 /*--------------------------- END OF FIRMWARES -----------------------------*/
2182 /*---------------------------------------------------------------------------*/
2185 * Function prototypes.
2187 static void sym_save_initial_setting (hcb_p np);
2188 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2189 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2190 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2191 static void sym_chip_reset (hcb_p np);
2192 static void sym_soft_reset (hcb_p np);
2193 static void sym_start_reset (hcb_p np);
2194 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2195 static int sym_wakeup_done (hcb_p np);
2196 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2197 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2198 static void sym_init (hcb_p np, int reason);
2199 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2201 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2202 u_char div, u_char fak);
2203 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2204 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2205 u_char per, u_char wide, u_char div, u_char fak);
2206 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2207 u_char per, u_char wide, u_char div, u_char fak);
2208 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2209 static void sym_intr (void *arg);
2210 static void sym_poll (struct cam_sim *sim);
2211 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2212 static void sym_int_sto (hcb_p np);
2213 static void sym_int_udc (hcb_p np);
2214 static void sym_int_sbmc (hcb_p np);
2215 static void sym_int_par (hcb_p np, u_short sist);
2216 static void sym_int_ma (hcb_p np);
2217 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2219 static void sym_sir_bad_scsi_status (hcb_p np, ccb_p cp);
2220 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2221 static void sym_sir_task_recovery (hcb_p np, int num);
2222 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2223 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs);
2224 static int sym_compute_residual (hcb_p np, ccb_p cp);
2225 static int sym_show_msg (u_char * msg);
2226 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2227 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2228 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2229 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2230 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2231 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2232 static void sym_int_sir (hcb_p np);
2233 static void sym_free_ccb (hcb_p np, ccb_p cp);
2234 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2235 static ccb_p sym_alloc_ccb (hcb_p np);
2236 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2237 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2238 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2239 static int sym_snooptest (hcb_p np);
2240 static void sym_selectclock(hcb_p np, u_char scntl3);
2241 static void sym_getclock (hcb_p np, int mult);
2242 static int sym_getpciclock (hcb_p np);
2243 static void sym_complete_ok (hcb_p np, ccb_p cp);
2244 static void sym_complete_error (hcb_p np, ccb_p cp);
2245 static void sym_callout (void *arg);
2246 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2247 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2248 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2249 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2250 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2252 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2253 bus_dma_segment_t *psegs, int nsegs);
2254 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2255 bus_dma_segment_t *psegs, int nsegs);
2256 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2257 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
2258 struct ccb_trans_settings *cts);
2259 static void sym_update_dflags(hcb_p np, u_char *flags,
2260 struct ccb_trans_settings *cts);
2262 static const struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2263 static int sym_pci_probe (device_t dev);
2264 static int sym_pci_attach (device_t dev);
2266 static void sym_pci_free (hcb_p np);
2267 static int sym_cam_attach (hcb_p np);
2268 static void sym_cam_free (hcb_p np);
2270 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2271 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2272 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2275 * Print something which allows to retrieve the controller type,
2276 * unit, target, lun concerned by a kernel message.
2278 static void PRINT_TARGET (hcb_p np, int target)
2280 printf ("%s:%d:", sym_name(np), target);
2283 static void PRINT_LUN(hcb_p np, int target, int lun)
2285 printf ("%s:%d:%d:", sym_name(np), target, lun);
2288 static void PRINT_ADDR (ccb_p cp)
2290 if (cp && cp->cam_ccb)
2291 xpt_print_path(cp->cam_ccb->ccb_h.path);
2295 * Take into account this ccb in the freeze count.
2297 static void sym_freeze_cam_ccb(union ccb *ccb)
2299 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2300 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2301 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2302 xpt_freeze_devq(ccb->ccb_h.path, 1);
2308 * Set the status field of a CAM CCB.
2310 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2312 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2313 ccb->ccb_h.status |= status;
2317 * Get the status field of a CAM CCB.
2319 static __inline int sym_get_cam_status(union ccb *ccb)
2321 return ccb->ccb_h.status & CAM_STATUS_MASK;
2325 * Enqueue a CAM CCB.
2327 static void sym_enqueue_cam_ccb(ccb_p cp)
2333 np = (hcb_p) cp->arg;
2335 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2336 ccb->ccb_h.status = CAM_REQ_INPROG;
2338 callout_reset(&cp->ch, ccb->ccb_h.timeout * hz / 1000, sym_callout,
2340 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2341 ccb->ccb_h.sym_hcb_ptr = np;
2343 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2347 * Complete a pending CAM CCB.
2350 static void sym_xpt_done(hcb_p np, union ccb *ccb, ccb_p cp)
2353 SYM_LOCK_ASSERT(MA_OWNED);
2355 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2356 callout_stop(&cp->ch);
2357 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2358 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2359 ccb->ccb_h.sym_hcb_ptr = NULL;
2364 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2367 SYM_LOCK_ASSERT(MA_OWNED);
2369 sym_set_cam_status(ccb, cam_status);
2374 * SYMBIOS chip clock divisor table.
2376 * Divisors are multiplied by 10,000,000 in order to make
2377 * calculations more simple.
2380 static const u32 div_10M[] =
2381 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2384 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2385 * 128 transfers. All chips support at least 16 transfers
2386 * bursts. The 825A, 875 and 895 chips support bursts of up
2387 * to 128 transfers and the 895A and 896 support bursts of up
2388 * to 64 transfers. All other chips support up to 16
2391 * For PCI 32 bit data transfers each transfer is a DWORD.
2392 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2394 * We use log base 2 (burst length) as internal code, with
2395 * value 0 meaning "burst disabled".
2399 * Burst length from burst code.
2401 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2404 * Burst code from io register bits.
2406 #define burst_code(dmode, ctest4, ctest5) \
2407 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2410 * Set initial io register bits from burst code.
2412 static __inline void sym_init_burst(hcb_p np, u_char bc)
2414 np->rv_ctest4 &= ~0x80;
2415 np->rv_dmode &= ~(0x3 << 6);
2416 np->rv_ctest5 &= ~0x4;
2419 np->rv_ctest4 |= 0x80;
2423 np->rv_dmode |= ((bc & 0x3) << 6);
2424 np->rv_ctest5 |= (bc & 0x4);
2429 * Print out the list of targets that have some flag disabled by user.
2431 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2436 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2437 if (i == np->myaddr)
2439 if (np->target[i].usrflags & mask) {
2441 printf("%s: %s disabled for targets",
2451 * Save initial settings of some IO registers.
2452 * Assumed to have been set by BIOS.
2453 * We cannot reset the chip prior to reading the
2454 * IO registers, since informations will be lost.
2455 * Since the SCRIPTS processor may be running, this
2456 * is not safe on paper, but it seems to work quite
2459 static void sym_save_initial_setting (hcb_p np)
2461 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2462 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2463 np->sv_dmode = INB(nc_dmode) & 0xce;
2464 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2465 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2466 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2467 np->sv_gpcntl = INB(nc_gpcntl);
2468 np->sv_stest1 = INB(nc_stest1);
2469 np->sv_stest2 = INB(nc_stest2) & 0x20;
2470 np->sv_stest4 = INB(nc_stest4);
2471 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2472 np->sv_scntl4 = INB(nc_scntl4);
2473 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2476 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2480 * Prepare io register values used by sym_init() according
2481 * to selected and supported features.
2483 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2492 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2495 * Get the frequency of the chip's clock.
2497 if (np->features & FE_QUAD)
2499 else if (np->features & FE_DBLR)
2504 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2505 np->clock_khz *= np->multiplier;
2507 if (np->clock_khz != 40000)
2508 sym_getclock(np, np->multiplier);
2511 * Divisor to be used for async (timer pre-scaler).
2513 i = np->clock_divn - 1;
2515 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2520 np->rv_scntl3 = i+1;
2523 * The C1010 uses hardwired divisors for async.
2524 * So, we just throw away, the async. divisor.:-)
2526 if (np->features & FE_C10)
2530 * Minimum synchronous period factor supported by the chip.
2531 * Btw, 'period' is in tenths of nanoseconds.
2533 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2534 if (period <= 250) np->minsync = 10;
2535 else if (period <= 303) np->minsync = 11;
2536 else if (period <= 500) np->minsync = 12;
2537 else np->minsync = (period + 40 - 1) / 40;
2540 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2542 if (np->minsync < 25 &&
2543 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2545 else if (np->minsync < 12 &&
2546 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2550 * Maximum synchronous period factor supported by the chip.
2552 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2553 np->maxsync = period > 2540 ? 254 : period / 10;
2556 * If chip is a C1010, guess the sync limits in DT mode.
2558 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2559 if (np->clock_khz == 160000) {
2561 np->maxsync_dt = 50;
2562 np->maxoffs_dt = 62;
2567 * 64 bit addressing (895A/896/1010) ?
2569 if (np->features & FE_DAC)
2571 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2573 np->rv_ccntl1 |= (DDAC);
2577 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2579 if (np->features & FE_NOPM)
2580 np->rv_ccntl0 |= (ENPMJ);
2584 * In dual channel mode, contention occurs if internal cycles
2585 * are used. Disable internal cycles.
2587 if (np->device_id == PCI_ID_LSI53C1010 &&
2588 np->revision_id < 0x2)
2589 np->rv_ccntl0 |= DILS;
2592 * Select burst length (dwords)
2594 burst_max = SYM_SETUP_BURST_ORDER;
2595 if (burst_max == 255)
2596 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2600 if (burst_max > np->maxburst)
2601 burst_max = np->maxburst;
2604 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2605 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2606 * based transactions on LOAD/STORE instructions. So we have
2607 * to prevent these chips from using such PCI transactions in
2608 * this driver. The generic ncr driver that does not use
2609 * LOAD/STORE instructions does not need this work-around.
2611 if ((np->device_id == PCI_ID_SYM53C810 &&
2612 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2613 (np->device_id == PCI_ID_SYM53C860 &&
2614 np->revision_id <= 0x1))
2615 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2618 * Select all supported special features.
2619 * If we are using on-board RAM for scripts, prefetch (PFEN)
2620 * does not help, but burst op fetch (BOF) does.
2621 * Disabling PFEN makes sure BOF will be used.
2623 if (np->features & FE_ERL)
2624 np->rv_dmode |= ERL; /* Enable Read Line */
2625 if (np->features & FE_BOF)
2626 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2627 if (np->features & FE_ERMP)
2628 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2630 if ((np->features & FE_PFEN) && !np->ram_ba)
2632 if (np->features & FE_PFEN)
2634 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2635 if (np->features & FE_CLSE)
2636 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2637 if (np->features & FE_WRIE)
2638 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2639 if (np->features & FE_DFS)
2640 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2645 if (SYM_SETUP_PCI_PARITY)
2646 np->rv_ctest4 |= MPEE; /* Master parity checking */
2647 if (SYM_SETUP_SCSI_PARITY)
2648 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2651 * Get parity checking, host ID and verbose mode from NVRAM
2654 sym_nvram_setup_host (np, nvram);
2656 np->myaddr = OF_getscsinitid(np->device);
2660 * Get SCSI addr of host adapter (set by bios?).
2662 if (np->myaddr == 255) {
2663 np->myaddr = INB(nc_scid) & 0x07;
2665 np->myaddr = SYM_SETUP_HOST_ID;
2669 * Prepare initial io register bits for burst length
2671 sym_init_burst(np, burst_max);
2674 * Set SCSI BUS mode.
2675 * - LVD capable chips (895/895A/896/1010) report the
2676 * current BUS mode through the STEST4 IO register.
2677 * - For previous generation chips (825/825A/875),
2678 * user has to tell us how to check against HVD,
2679 * since a 100% safe algorithm is not possible.
2681 np->scsi_mode = SMODE_SE;
2682 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2683 np->scsi_mode = (np->sv_stest4 & SMODE);
2684 else if (np->features & FE_DIFF) {
2685 if (SYM_SETUP_SCSI_DIFF == 1) {
2686 if (np->sv_scntl3) {
2687 if (np->sv_stest2 & 0x20)
2688 np->scsi_mode = SMODE_HVD;
2690 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2691 if (!(INB(nc_gpreg) & 0x08))
2692 np->scsi_mode = SMODE_HVD;
2695 else if (SYM_SETUP_SCSI_DIFF == 2)
2696 np->scsi_mode = SMODE_HVD;
2698 if (np->scsi_mode == SMODE_HVD)
2699 np->rv_stest2 |= 0x20;
2702 * Set LED support from SCRIPTS.
2703 * Ignore this feature for boards known to use a
2704 * specific GPIO wiring and for the 895A, 896
2705 * and 1010 that drive the LED directly.
2707 if ((SYM_SETUP_SCSI_LED ||
2708 (nvram->type == SYM_SYMBIOS_NVRAM ||
2709 (nvram->type == SYM_TEKRAM_NVRAM &&
2710 np->device_id == PCI_ID_SYM53C895))) &&
2711 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2712 np->features |= FE_LED0;
2717 switch(SYM_SETUP_IRQ_MODE & 3) {
2719 np->rv_dcntl |= IRQM;
2722 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2729 * Configure targets according to driver setup.
2730 * If NVRAM present get targets setup from NVRAM.
2732 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2733 tcb_p tp = &np->target[i];
2735 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2736 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2737 tp->tinfo.user.period = np->minsync;
2738 if (np->features & FE_ULTRA3)
2739 tp->tinfo.user.period = np->minsync_dt;
2740 tp->tinfo.user.offset = np->maxoffs;
2741 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2742 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2743 tp->usrtags = SYM_SETUP_MAX_TAG;
2745 sym_nvram_setup_target (np, i, nvram);
2748 * For now, guess PPR/DT support from the period
2751 if (np->features & FE_ULTRA3) {
2752 if (tp->tinfo.user.period <= 9 &&
2753 tp->tinfo.user.width == BUS_16_BIT) {
2754 tp->tinfo.user.options |= PPR_OPT_DT;
2755 tp->tinfo.user.offset = np->maxoffs_dt;
2756 tp->tinfo.user.spi_version = 3;
2761 tp->usrflags &= ~SYM_TAGS_ENABLED;
2765 * Let user know about the settings.
2768 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2769 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2770 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2772 (np->features & FE_ULTRA3) ? 80 :
2773 (np->features & FE_ULTRA2) ? 40 :
2774 (np->features & FE_ULTRA) ? 20 : 10,
2775 sym_scsi_bus_mode(np->scsi_mode),
2776 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2778 * Tell him more on demand.
2781 printf("%s: %s IRQ line driver%s\n",
2783 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2784 np->ram_ba ? ", using on-chip SRAM" : "");
2785 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2786 if (np->features & FE_NOPM)
2787 printf("%s: handling phase mismatch from SCRIPTS.\n",
2793 if (sym_verbose > 1) {
2794 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2795 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2796 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2797 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2799 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2800 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2801 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2802 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2805 * Let user be aware of targets that have some disable flags set.
2807 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2809 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2816 * Prepare the next negotiation message if needed.
2818 * Fill in the part of message buffer that contains the
2819 * negotiation and the nego_status field of the CCB.
2820 * Returns the size of the message in bytes.
2822 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2824 tcb_p tp = &np->target[cp->target];
2828 * Early C1010 chips need a work-around for DT
2829 * data transfer to work.
2831 if (!(np->features & FE_U3EN))
2832 tp->tinfo.goal.options = 0;
2834 * negotiate using PPR ?
2836 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2839 * negotiate wide transfers ?
2841 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2844 * negotiate synchronous transfers?
2846 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2847 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2852 msgptr[msglen++] = M_EXTENDED;
2853 msgptr[msglen++] = 3;
2854 msgptr[msglen++] = M_X_SYNC_REQ;
2855 msgptr[msglen++] = tp->tinfo.goal.period;
2856 msgptr[msglen++] = tp->tinfo.goal.offset;
2859 msgptr[msglen++] = M_EXTENDED;
2860 msgptr[msglen++] = 2;
2861 msgptr[msglen++] = M_X_WIDE_REQ;
2862 msgptr[msglen++] = tp->tinfo.goal.width;
2865 msgptr[msglen++] = M_EXTENDED;
2866 msgptr[msglen++] = 6;
2867 msgptr[msglen++] = M_X_PPR_REQ;
2868 msgptr[msglen++] = tp->tinfo.goal.period;
2869 msgptr[msglen++] = 0;
2870 msgptr[msglen++] = tp->tinfo.goal.offset;
2871 msgptr[msglen++] = tp->tinfo.goal.width;
2872 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2876 cp->nego_status = nego;
2879 tp->nego_cp = cp; /* Keep track a nego will be performed */
2880 if (DEBUG_FLAGS & DEBUG_NEGO) {
2881 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2882 nego == NS_WIDE ? "wide msgout" :
2883 "ppr msgout", msgptr);
2891 * Insert a job into the start queue.
2893 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2897 #ifdef SYM_CONF_IARB_SUPPORT
2899 * If the previously queued CCB is not yet done,
2900 * set the IARB hint. The SCRIPTS will go with IARB
2901 * for this job when starting the previous one.
2902 * We leave devices a chance to win arbitration by
2903 * not using more than 'iarb_max' consecutive
2904 * immediate arbitrations.
2906 if (np->last_cp && np->iarb_count < np->iarb_max) {
2907 np->last_cp->host_flags |= HF_HINT_IARB;
2916 * Insert first the idle task and then our job.
2917 * The MB should ensure proper ordering.
2919 qidx = np->squeueput + 2;
2920 if (qidx >= MAX_QUEUE*2) qidx = 0;
2922 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2924 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2926 np->squeueput = qidx;
2928 if (DEBUG_FLAGS & DEBUG_QUEUE)
2929 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2932 * Script processor may be waiting for reselect.
2936 OUTB (nc_istat, SIGP|np->istat_sem);
2940 * Soft reset the chip.
2942 * Raising SRST when the chip is running may cause
2943 * problems on dual function chips (see below).
2944 * On the other hand, LVD devices need some delay
2945 * to settle and report actual BUS mode in STEST4.
2947 static void sym_chip_reset (hcb_p np)
2949 OUTB (nc_istat, SRST);
2952 UDELAY(2000); /* For BUS MODE to settle */
2956 * Soft reset the chip.
2958 * Some 896 and 876 chip revisions may hang-up if we set
2959 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2961 * So, we need to abort the current operation prior to
2962 * soft resetting the chip.
2964 static void sym_soft_reset (hcb_p np)
2969 OUTB (nc_istat, CABRT);
2970 for (i = 1000000 ; i ; --i) {
2971 istat = INB (nc_istat);
2983 printf("%s: unable to abort current chip operation.\n",
2985 sym_chip_reset (np);
2989 * Start reset process.
2991 * The interrupt handler will reinitialize the chip.
2993 static void sym_start_reset(hcb_p np)
2995 (void) sym_reset_scsi_bus(np, 1);
2998 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3003 sym_soft_reset(np); /* Soft reset the chip */
3005 OUTW (nc_sien, RST);
3007 * Enable Tolerant, reset IRQD if present and
3008 * properly set IRQ mode, prior to resetting the bus.
3010 OUTB (nc_stest3, TE);
3011 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3012 OUTB (nc_scntl1, CRST);
3015 if (!SYM_SETUP_SCSI_BUS_CHECK)
3018 * Check for no terminators or SCSI bus shorts to ground.
3019 * Read SCSI data bus, data parity bits and control signals.
3020 * We are expecting RESET to be TRUE and other signals to be
3023 term = INB(nc_sstat0);
3024 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3025 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3026 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3027 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3028 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3030 if (!(np->features & FE_WIDE))
3033 if (term != (2<<7)) {
3034 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3036 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3037 "0x%lx, expecting 0x%lx\n",
3039 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3040 (u_long)term, (u_long)(2<<7));
3041 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3045 OUTB (nc_scntl1, 0);
3051 * The chip may have completed jobs. Look at the DONE QUEUE.
3053 * On architectures that may reorder LOAD/STORE operations,
3054 * a memory barrier may be needed after the reading of the
3055 * so-called `flag' and prior to dealing with the data.
3057 static int sym_wakeup_done (hcb_p np)
3063 SYM_LOCK_ASSERT(MA_OWNED);
3068 dsa = scr_to_cpu(np->dqueue[i]);
3072 if ((i = i+2) >= MAX_QUEUE*2)
3075 cp = sym_ccb_from_dsa(np, dsa);
3078 sym_complete_ok (np, cp);
3082 printf ("%s: bad DSA (%x) in done queue.\n",
3083 sym_name(np), (u_int) dsa);
3091 * Complete all active CCBs with error.
3092 * Used on CHIP/SCSI RESET.
3094 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3097 * Move all active CCBs to the COMP queue
3098 * and flush this queue.
3100 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3101 sym_que_init(&np->busy_ccbq);
3102 sym_flush_comp_queue(np, cam_status);
3109 * 0: initialisation.
3110 * 1: SCSI BUS RESET delivered or received.
3111 * 2: SCSI BUS MODE changed.
3113 static void sym_init (hcb_p np, int reason)
3118 SYM_LOCK_ASSERT(MA_OWNED);
3121 * Reset chip if asked, otherwise just clear fifos.
3126 OUTB (nc_stest3, TE|CSF);
3127 OUTONB (nc_ctest3, CLF);
3133 phys = np->squeue_ba;
3134 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3135 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3136 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3138 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3141 * Start at first entry.
3148 phys = np->dqueue_ba;
3149 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3151 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3153 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3156 * Start at first entry.
3161 * Install patches in scripts.
3162 * This also let point to first position the start
3163 * and done queue pointers used from SCRIPTS.
3168 * Wakeup all pending jobs.
3170 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3175 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3176 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3178 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3179 /* full arb., ena parity, par->ATN */
3180 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3182 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3184 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3185 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3186 OUTB (nc_istat , SIGP ); /* Signal Process */
3187 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3188 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3190 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3191 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3192 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3194 /* Extended Sreq/Sack filtering not supported on the C10 */
3195 if (np->features & FE_C10)
3196 OUTB (nc_stest2, np->rv_stest2);
3198 OUTB (nc_stest2, EXT|np->rv_stest2);
3200 OUTB (nc_stest3, TE); /* TolerANT enable */
3201 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3204 * For now, disable AIP generation on C1010-66.
3206 if (np->device_id == PCI_ID_LSI53C1010_2)
3207 OUTB (nc_aipcntl1, DISAIP);
3211 * Errant SGE's when in narrow. Write bits 4 & 5 of
3212 * STEST1 register to disable SGE. We probably should do
3213 * that from SCRIPTS for each selection/reselection, but
3214 * I just don't want. :)
3216 if (np->device_id == PCI_ID_LSI53C1010 &&
3217 /* np->revision_id < 0xff */ 1)
3218 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3221 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3222 * Disable overlapped arbitration for some dual function devices,
3223 * regardless revision id (kind of post-chip-design feature. ;-))
3225 if (np->device_id == PCI_ID_SYM53C875)
3226 OUTB (nc_ctest0, (1<<5));
3227 else if (np->device_id == PCI_ID_SYM53C896)
3228 np->rv_ccntl0 |= DPR;
3231 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3232 * and/or hardware phase mismatch, since only such chips
3233 * seem to support those IO registers.
3235 if (np->features & (FE_DAC|FE_NOPM)) {
3236 OUTB (nc_ccntl0, np->rv_ccntl0);
3237 OUTB (nc_ccntl1, np->rv_ccntl1);
3241 * If phase mismatch handled by scripts (895A/896/1010),
3242 * set PM jump addresses.
3244 if (np->features & FE_NOPM) {
3245 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3246 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3250 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3251 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3253 if (np->features & FE_LED0)
3254 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3255 else if (np->features & FE_LEDC)
3256 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3261 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3262 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3265 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3266 * Try to eat the spurious SBMC interrupt that may occur when
3267 * we reset the chip but not the SCSI BUS (at initialization).
3269 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3270 OUTONW (nc_sien, SBMC);
3275 np->scsi_mode = INB (nc_stest4) & SMODE;
3279 * Fill in target structure.
3280 * Reinitialize usrsync.
3281 * Reinitialize usrwide.
3282 * Prepare sync negotiation according to actual SCSI bus mode.
3284 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3285 tcb_p tp = &np->target[i];
3289 tp->head.wval = np->rv_scntl3;
3292 tp->tinfo.current.period = 0;
3293 tp->tinfo.current.offset = 0;
3294 tp->tinfo.current.width = BUS_8_BIT;
3295 tp->tinfo.current.options = 0;
3299 * Download SCSI SCRIPTS to on-chip RAM if present,
3300 * and start script processor.
3303 if (sym_verbose > 1)
3304 printf ("%s: Downloading SCSI SCRIPTS.\n",
3306 if (np->ram_ws == 8192) {
3307 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3308 OUTL (nc_mmws, np->scr_ram_seg);
3309 OUTL (nc_mmrs, np->scr_ram_seg);
3310 OUTL (nc_sfs, np->scr_ram_seg);
3311 phys = SCRIPTB_BA (np, start64);
3314 phys = SCRIPTA_BA (np, init);
3315 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3318 phys = SCRIPTA_BA (np, init);
3322 OUTL (nc_dsa, np->hcb_ba);
3326 * Notify the XPT about the RESET condition.
3329 xpt_async(AC_BUS_RESET, np->path, NULL);
3333 * Get clock factor and sync divisor for a given
3334 * synchronous factor period.
3337 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3339 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3340 int div = np->clock_divn; /* Number of divisors supported */
3341 u32 fak; /* Sync factor in sxfer */
3342 u32 per; /* Period in tenths of ns */
3343 u32 kpc; /* (per * clk) */
3347 * Compute the synchronous period in tenths of nano-seconds
3349 if (dt && sfac <= 9) per = 125;
3350 else if (sfac <= 10) per = 250;
3351 else if (sfac == 11) per = 303;
3352 else if (sfac == 12) per = 500;
3353 else per = 40 * sfac;
3361 * For earliest C10 revision 0, we cannot use extra
3362 * clocks for the setting of the SCSI clocking.
3363 * Note that this limits the lowest sync data transfer
3364 * to 5 Mega-transfers per second and may result in
3365 * using higher clock divisors.
3368 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3370 * Look for the lowest clock divisor that allows an
3371 * output speed not faster than the period.
3375 if (kpc > (div_10M[div] << 2)) {
3380 fak = 0; /* No extra clocks */
3381 if (div == np->clock_divn) { /* Are we too fast ? */
3391 * Look for the greatest clock divisor that allows an
3392 * input speed faster than the period.
3395 if (kpc >= (div_10M[div] << 2)) break;
3398 * Calculate the lowest clock factor that allows an output
3399 * speed not faster than the period, and the max output speed.
3400 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3401 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3404 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3405 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3408 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3409 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3413 * Check against our hardware limits, or bugs :).
3415 if (fak > 2) {fak = 2; ret = -1;}
3418 * Compute and return sync parameters.
3427 * Tell the SCSI layer about the new transfer parameters.
3430 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3432 struct ccb_trans_settings cts;
3433 struct cam_path *path;
3435 tcb_p tp = &np->target[target];
3437 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3439 if (sts != CAM_REQ_CMP)
3442 bzero(&cts, sizeof(cts));
3444 #define cts__scsi (cts.proto_specific.scsi)
3445 #define cts__spi (cts.xport_specific.spi)
3447 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3448 cts.protocol = PROTO_SCSI;
3449 cts.transport = XPORT_SPI;
3450 cts.protocol_version = tp->tinfo.current.scsi_version;
3451 cts.transport_version = tp->tinfo.current.spi_version;
3453 cts__spi.valid = spi_valid;
3454 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3455 cts__spi.sync_period = tp->tinfo.current.period;
3456 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3457 cts__spi.sync_offset = tp->tinfo.current.offset;
3458 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3459 cts__spi.bus_width = tp->tinfo.current.width;
3460 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3461 cts__spi.ppr_options = tp->tinfo.current.options;
3464 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3465 xpt_async(AC_TRANSFER_NEG, path, &cts);
3466 xpt_free_path(path);
3469 #define SYM_SPI_VALID_WDTR \
3470 CTS_SPI_VALID_BUS_WIDTH | \
3471 CTS_SPI_VALID_SYNC_RATE | \
3472 CTS_SPI_VALID_SYNC_OFFSET
3473 #define SYM_SPI_VALID_SDTR \
3474 CTS_SPI_VALID_SYNC_RATE | \
3475 CTS_SPI_VALID_SYNC_OFFSET
3476 #define SYM_SPI_VALID_PPR \
3477 CTS_SPI_VALID_PPR_OPTIONS | \
3478 CTS_SPI_VALID_BUS_WIDTH | \
3479 CTS_SPI_VALID_SYNC_RATE | \
3480 CTS_SPI_VALID_SYNC_OFFSET
3483 * We received a WDTR.
3484 * Let everything be aware of the changes.
3486 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3488 tcb_p tp = &np->target[cp->target];
3490 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3493 * Tell the SCSI layer about the new transfer parameters.
3495 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3496 tp->tinfo.current.offset = 0;
3497 tp->tinfo.current.period = 0;
3498 tp->tinfo.current.options = 0;
3500 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3504 * We received a SDTR.
3505 * Let everything be aware of the changes.
3508 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3510 tcb_p tp = &np->target[cp->target];
3511 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3513 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3516 * Tell the SCSI layer about the new transfer parameters.
3518 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3519 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3520 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3522 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3526 * We received a PPR.
3527 * Let everything be aware of the changes.
3529 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3530 u_char per, u_char wide, u_char div, u_char fak)
3532 tcb_p tp = &np->target[cp->target];
3534 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3537 * Tell the SCSI layer about the new transfer parameters.
3539 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3540 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3541 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3542 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3544 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3548 * Switch trans mode for current job and it's target.
3550 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3551 u_char per, u_char wide, u_char div, u_char fak)
3556 u_char target = INB (nc_sdid) & 0x0f;
3557 u_char sval, wval, uval;
3564 assert (target == (cp->target & 0xf));
3565 tp = &np->target[target];
3567 sval = tp->head.sval;
3568 wval = tp->head.wval;
3569 uval = tp->head.uval;
3572 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3573 sval, wval, uval, np->rv_scntl3);
3578 if (!(np->features & FE_C10))
3579 sval = (sval & ~0x1f) | ofs;
3581 sval = (sval & ~0x3f) | ofs;
3584 * Set the sync divisor and extra clock factor.
3587 wval = (wval & ~0x70) | ((div+1) << 4);
3588 if (!(np->features & FE_C10))
3589 sval = (sval & ~0xe0) | (fak << 5);
3591 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3592 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3593 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3598 * Set the bus width.
3605 * Set misc. ultra enable bits.
3607 if (np->features & FE_C10) {
3608 uval = uval & ~(U3EN|AIPCKEN);
3610 assert(np->features & FE_U3EN);
3615 wval = wval & ~ULTRA;
3616 if (per <= 12) wval |= ULTRA;
3620 * Stop there if sync parameters are unchanged.
3622 if (tp->head.sval == sval &&
3623 tp->head.wval == wval &&
3624 tp->head.uval == uval)
3626 tp->head.sval = sval;
3627 tp->head.wval = wval;
3628 tp->head.uval = uval;
3631 * Disable extended Sreq/Sack filtering if per < 50.
3632 * Not supported on the C1010.
3634 if (per < 50 && !(np->features & FE_C10))
3635 OUTOFFB (nc_stest2, EXT);
3638 * set actual value and sync_status
3640 OUTB (nc_sxfer, tp->head.sval);
3641 OUTB (nc_scntl3, tp->head.wval);
3643 if (np->features & FE_C10) {
3644 OUTB (nc_scntl4, tp->head.uval);
3648 * patch ALL busy ccbs of this target.
3650 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3651 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3652 if (cp->target != target)
3654 cp->phys.select.sel_scntl3 = tp->head.wval;
3655 cp->phys.select.sel_sxfer = tp->head.sval;
3656 if (np->features & FE_C10) {
3657 cp->phys.select.sel_scntl4 = tp->head.uval;
3663 * log message for real hard errors
3665 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3666 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3668 * exception register:
3673 * so: control lines as driven by chip.
3674 * si: control lines as seen by chip.
3675 * sd: scsi data lines as seen by chip.
3678 * sxfer: (see the manual)
3679 * scntl3: (see the manual)
3681 * current script command:
3682 * dsp: script address (relative to start of script).
3683 * dbc: first word of script command.
3685 * First 24 register of the chip:
3688 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3694 u_char *script_base;
3699 if (dsp > np->scripta_ba &&
3700 dsp <= np->scripta_ba + np->scripta_sz) {
3701 script_ofs = dsp - np->scripta_ba;
3702 script_size = np->scripta_sz;
3703 script_base = (u_char *) np->scripta0;
3704 script_name = "scripta";
3706 else if (np->scriptb_ba < dsp &&
3707 dsp <= np->scriptb_ba + np->scriptb_sz) {
3708 script_ofs = dsp - np->scriptb_ba;
3709 script_size = np->scriptb_sz;
3710 script_base = (u_char *) np->scriptb0;
3711 script_name = "scriptb";
3716 script_name = "mem";
3719 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3720 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3721 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3722 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3723 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3724 (unsigned)INL (nc_dbc));
3726 if (((script_ofs & 3) == 0) &&
3727 (unsigned)script_ofs < script_size) {
3728 printf ("%s: script cmd = %08x\n", sym_name(np),
3729 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3732 printf ("%s: regdump:", sym_name(np));
3734 printf (" %02x", (unsigned)INB_OFF(i));
3738 * PCI BUS error, read the PCI ststus register.
3740 if (dstat & (MDPE|BF)) {
3742 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3743 if (pci_sts & 0xf900) {
3744 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3745 printf("%s: PCI STATUS = 0x%04x\n",
3746 sym_name(np), pci_sts & 0xf900);
3752 * chip interrupt handler
3754 * In normal situations, interrupt conditions occur one at
3755 * a time. But when something bad happens on the SCSI BUS,
3756 * the chip may raise several interrupt flags before
3757 * stopping and interrupting the CPU. The additionnal
3758 * interrupt flags are stacked in some extra registers
3759 * after the SIP and/or DIP flag has been raised in the
3760 * ISTAT. After the CPU has read the interrupt condition
3761 * flag from SIST or DSTAT, the chip unstacks the other
3762 * interrupt flags and sets the corresponding bits in
3763 * SIST or DSTAT. Since the chip starts stacking once the
3764 * SIP or DIP flag is set, there is a small window of time
3765 * where the stacking does not occur.
3767 * Typically, multiple interrupt conditions may happen in
3768 * the following situations:
3770 * - SCSI parity error + Phase mismatch (PAR|MA)
3771 * When a parity error is detected in input phase
3772 * and the device switches to msg-in phase inside a
3774 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3775 * When a stupid device does not want to handle the
3776 * recovery of an SCSI parity error.
3777 * - Some combinations of STO, PAR, UDC, ...
3778 * When using non compliant SCSI stuff, when user is
3779 * doing non compliant hot tampering on the BUS, when
3780 * something really bad happens to a device, etc ...
3782 * The heuristic suggested by SYMBIOS to handle
3783 * multiple interrupts is to try unstacking all
3784 * interrupts conditions and to handle them on some
3785 * priority based on error severity.
3786 * This will work when the unstacking has been
3787 * successful, but we cannot be 100 % sure of that,
3788 * since the CPU may have been faster to unstack than
3789 * the chip is able to stack. Hmmm ... But it seems that
3790 * such a situation is very unlikely to happen.
3792 * If this happen, for example STO caught by the CPU
3793 * then UDC happenning before the CPU have restarted
3794 * the SCRIPTS, the driver may wrongly complete the
3795 * same command on UDC, since the SCRIPTS didn't restart
3796 * and the DSA still points to the same command.
3797 * We avoid this situation by setting the DSA to an
3798 * invalid value when the CCB is completed and before
3799 * restarting the SCRIPTS.
3801 * Another issue is that we need some section of our
3802 * recovery procedures to be somehow uninterruptible but
3803 * the SCRIPTS processor does not provides such a
3804 * feature. For this reason, we handle recovery preferently
3805 * from the C code and check against some SCRIPTS critical
3806 * sections from the C code.
3808 * Hopefully, the interrupt handling of the driver is now
3809 * able to resist to weird BUS error conditions, but donnot
3810 * ask me for any guarantee that it will never fail. :-)
3811 * Use at your own decision and risk.
3813 static void sym_intr1 (hcb_p np)
3815 u_char istat, istatc;
3819 SYM_LOCK_ASSERT(MA_OWNED);
3822 * interrupt on the fly ?
3824 * A `dummy read' is needed to ensure that the
3825 * clear of the INTF flag reaches the device
3826 * before the scanning of the DONE queue.
3828 istat = INB (nc_istat);
3830 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3831 istat = INB (nc_istat); /* DUMMY READ */
3832 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3833 (void)sym_wakeup_done (np);
3836 if (!(istat & (SIP|DIP)))
3839 #if 0 /* We should never get this one */
3841 OUTB (nc_istat, CABRT);
3845 * PAR and MA interrupts may occur at the same time,
3846 * and we need to know of both in order to handle
3847 * this situation properly. We try to unstack SCSI
3848 * interrupts for that reason. BTW, I dislike a LOT
3849 * such a loop inside the interrupt routine.
3850 * Even if DMA interrupt stacking is very unlikely to
3851 * happen, we also try unstacking these ones, since
3852 * this has no performance impact.
3859 sist |= INW (nc_sist);
3861 dstat |= INB (nc_dstat);
3862 istatc = INB (nc_istat);
3864 } while (istatc & (SIP|DIP));
3866 if (DEBUG_FLAGS & DEBUG_TINY)
3867 printf ("<%d|%x:%x|%x:%x>",
3870 (unsigned)INL(nc_dsp),
3871 (unsigned)INL(nc_dbc));
3873 * On paper, a memory barrier may be needed here.
3874 * And since we are paranoid ... :)
3879 * First, interrupts we want to service cleanly.
3881 * Phase mismatch (MA) is the most frequent interrupt
3882 * for chip earlier than the 896 and so we have to service
3883 * it as quickly as possible.
3884 * A SCSI parity error (PAR) may be combined with a phase
3885 * mismatch condition (MA).
3886 * Programmed interrupts (SIR) are used to call the C code
3888 * The single step interrupt (SSI) is not used in this
3891 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3892 !(dstat & (MDPE|BF|ABRT|IID))) {
3893 if (sist & PAR) sym_int_par (np, sist);
3894 else if (sist & MA) sym_int_ma (np);
3895 else if (dstat & SIR) sym_int_sir (np);
3896 else if (dstat & SSI) OUTONB_STD ();
3897 else goto unknown_int;
3902 * Now, interrupts that donnot happen in normal
3903 * situations and that we may need to recover from.
3905 * On SCSI RESET (RST), we reset everything.
3906 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3907 * active CCBs with RESET status, prepare all devices
3908 * for negotiating again and restart the SCRIPTS.
3909 * On STO and UDC, we complete the CCB with the corres-
3910 * ponding status and restart the SCRIPTS.
3913 xpt_print_path(np->path);
3914 printf("SCSI BUS reset detected.\n");
3919 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3920 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3922 if (!(sist & (GEN|HTH|SGE)) &&
3923 !(dstat & (MDPE|BF|ABRT|IID))) {
3924 if (sist & SBMC) sym_int_sbmc (np);
3925 else if (sist & STO) sym_int_sto (np);
3926 else if (sist & UDC) sym_int_udc (np);
3927 else goto unknown_int;
3932 * Now, interrupts we are not able to recover cleanly.
3934 * Log message for hard errors.
3938 sym_log_hard_error(np, sist, dstat);
3940 if ((sist & (GEN|HTH|SGE)) ||
3941 (dstat & (MDPE|BF|ABRT|IID))) {
3942 sym_start_reset(np);
3948 * We just miss the cause of the interrupt. :(
3949 * Print a message. The timeout will do the real work.
3951 printf( "%s: unknown interrupt(s) ignored, "
3952 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
3953 sym_name(np), istat, dstat, sist);
3956 static void sym_intr(void *arg)
3962 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3963 sym_intr1((hcb_p) arg);
3964 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
3969 static void sym_poll(struct cam_sim *sim)
3971 sym_intr1(cam_sim_softc(sim));
3975 * generic recovery from scsi interrupt
3977 * The doc says that when the chip gets an SCSI interrupt,
3978 * it tries to stop in an orderly fashion, by completing
3979 * an instruction fetch that had started or by flushing
3980 * the DMA fifo for a write to memory that was executing.
3981 * Such a fashion is not enough to know if the instruction
3982 * that was just before the current DSP value has been
3985 * There are some small SCRIPTS sections that deal with
3986 * the start queue and the done queue that may break any
3987 * assomption from the C code if we are interrupted
3988 * inside, so we reset if this happens. Btw, since these
3989 * SCRIPTS sections are executed while the SCRIPTS hasn't
3990 * started SCSI operations, it is very unlikely to happen.
3992 * All the driver data structures are supposed to be
3993 * allocated from the same 4 GB memory window, so there
3994 * is a 1 to 1 relationship between DSA and driver data
3995 * structures. Since we are careful :) to invalidate the
3996 * DSA when we complete a command or when the SCRIPTS
3997 * pushes a DSA into a queue, we can trust it when it
4000 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4002 u32 dsp = INL (nc_dsp);
4003 u32 dsa = INL (nc_dsa);
4004 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4007 * If we haven't been interrupted inside the SCRIPTS
4008 * critical pathes, we can safely restart the SCRIPTS
4009 * and trust the DSA value if it matches a CCB.
4011 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4012 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4013 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4014 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4015 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4016 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4017 (!(dsp > SCRIPTA_BA (np, done) &&
4018 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4019 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4020 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4022 * If we have a CCB, let the SCRIPTS call us back for
4023 * the handling of the error with SCRATCHA filled with
4024 * STARTPOS. This way, we will be able to freeze the
4025 * device queue and requeue awaiting IOs.
4028 cp->host_status = hsts;
4029 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4032 * Otherwise just restart the SCRIPTS.
4035 OUTL (nc_dsa, 0xffffff);
4036 OUTL_DSP (SCRIPTA_BA (np, start));
4045 sym_start_reset(np);
4049 * chip exception handler for selection timeout
4051 static void sym_int_sto (hcb_p np)
4053 u32 dsp = INL (nc_dsp);
4055 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4057 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4058 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4060 sym_start_reset(np);
4064 * chip exception handler for unexpected disconnect
4066 static void sym_int_udc (hcb_p np)
4068 printf ("%s: unexpected disconnect\n", sym_name(np));
4069 sym_recover_scsi_int(np, HS_UNEXPECTED);
4073 * chip exception handler for SCSI bus mode change
4075 * spi2-r12 11.2.3 says a transceiver mode change must
4076 * generate a reset event and a device that detects a reset
4077 * event shall initiate a hard reset. It says also that a
4078 * device that detects a mode change shall set data transfer
4079 * mode to eight bit asynchronous, etc...
4080 * So, just reinitializing all except chip should be enough.
4082 static void sym_int_sbmc (hcb_p np)
4084 u_char scsi_mode = INB (nc_stest4) & SMODE;
4089 xpt_print_path(np->path);
4090 printf("SCSI BUS mode change from %s to %s.\n",
4091 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4094 * Should suspend command processing for a few seconds and
4095 * reinitialize all except the chip.
4101 * chip exception handler for SCSI parity error.
4103 * When the chip detects a SCSI parity error and is
4104 * currently executing a (CH)MOV instruction, it does
4105 * not interrupt immediately, but tries to finish the
4106 * transfer of the current scatter entry before
4107 * interrupting. The following situations may occur:
4109 * - The complete scatter entry has been transferred
4110 * without the device having changed phase.
4111 * The chip will then interrupt with the DSP pointing
4112 * to the instruction that follows the MOV.
4114 * - A phase mismatch occurs before the MOV finished
4115 * and phase errors are to be handled by the C code.
4116 * The chip will then interrupt with both PAR and MA
4119 * - A phase mismatch occurs before the MOV finished and
4120 * phase errors are to be handled by SCRIPTS.
4121 * The chip will load the DSP with the phase mismatch
4122 * JUMP address and interrupt the host processor.
4124 static void sym_int_par (hcb_p np, u_short sist)
4126 u_char hsts = INB (HS_PRT);
4127 u32 dsp = INL (nc_dsp);
4128 u32 dbc = INL (nc_dbc);
4129 u32 dsa = INL (nc_dsa);
4130 u_char sbcl = INB (nc_sbcl);
4131 u_char cmd = dbc >> 24;
4132 int phase = cmd & 7;
4133 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4135 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4136 sym_name(np), hsts, dbc, sbcl);
4139 * Check that the chip is connected to the SCSI BUS.
4141 if (!(INB (nc_scntl1) & ISCON)) {
4142 sym_recover_scsi_int(np, HS_UNEXPECTED);
4147 * If the nexus is not clearly identified, reset the bus.
4148 * We will try to do better later.
4154 * Check instruction was a MOV, direction was INPUT and
4157 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4161 * Keep track of the parity error.
4163 OUTONB (HF_PRT, HF_EXT_ERR);
4164 cp->xerr_status |= XE_PARITY_ERR;
4167 * Prepare the message to send to the device.
4169 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4172 * If the old phase was DATA IN phase, we have to deal with
4173 * the 3 situations described above.
4174 * For other input phases (MSG IN and STATUS), the device
4175 * must resend the whole thing that failed parity checking
4176 * or signal error. So, jumping to dispatcher should be OK.
4178 if (phase == 1 || phase == 5) {
4179 /* Phase mismatch handled by SCRIPTS */
4180 if (dsp == SCRIPTB_BA (np, pm_handle))
4182 /* Phase mismatch handled by the C code */
4185 /* No phase mismatch occurred */
4187 OUTL (nc_temp, dsp);
4188 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4192 OUTL_DSP (SCRIPTA_BA (np, clrack));
4196 sym_start_reset(np);
4200 * chip exception handler for phase errors.
4202 * We have to construct a new transfer descriptor,
4203 * to transfer the rest of the current block.
4205 static void sym_int_ma (hcb_p np)
4218 u_char hflags, hflags0;
4227 rest = dbc & 0xffffff;
4231 * locate matching cp if any.
4233 cp = sym_ccb_from_dsa(np, dsa);
4236 * Donnot take into account dma fifo and various buffers in
4237 * INPUT phase since the chip flushes everything before
4238 * raising the MA interrupt for interrupted INPUT phases.
4239 * For DATA IN phase, we will check for the SWIDE later.
4241 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4244 if (np->features & FE_DFBC)
4245 delta = INW (nc_dfbc);
4250 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4252 dfifo = INL(nc_dfifo);
4255 * Calculate remaining bytes in DMA fifo.
4256 * (CTEST5 = dfifo >> 16)
4258 if (dfifo & (DFS << 16))
4259 delta = ((((dfifo >> 8) & 0x300) |
4260 (dfifo & 0xff)) - rest) & 0x3ff;
4262 delta = ((dfifo & 0xff) - rest) & 0x7f;
4266 * The data in the dma fifo has not been transferred to
4267 * the target -> add the amount to the rest
4268 * and clear the data.
4269 * Check the sstat2 register in case of wide transfer.
4272 ss0 = INB (nc_sstat0);
4273 if (ss0 & OLF) rest++;
4274 if (!(np->features & FE_C10))
4275 if (ss0 & ORF) rest++;
4276 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4277 ss2 = INB (nc_sstat2);
4278 if (ss2 & OLF1) rest++;
4279 if (!(np->features & FE_C10))
4280 if (ss2 & ORF1) rest++;
4286 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4287 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4291 * log the information
4293 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4294 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4295 (unsigned) rest, (unsigned) delta);
4298 * try to find the interrupted script command,
4299 * and the address at which to continue.
4303 if (dsp > np->scripta_ba &&
4304 dsp <= np->scripta_ba + np->scripta_sz) {
4305 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4308 else if (dsp > np->scriptb_ba &&
4309 dsp <= np->scriptb_ba + np->scriptb_sz) {
4310 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4315 * log the information
4317 if (DEBUG_FLAGS & DEBUG_PHASE) {
4318 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4319 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4323 printf ("%s: interrupted SCRIPT address not found.\n",
4329 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4335 * get old startaddress and old length.
4337 oadr = scr_to_cpu(vdsp[1]);
4339 if (cmd & 0x10) { /* Table indirect */
4340 tblp = (u32 *) ((char*) &cp->phys + oadr);
4341 olen = scr_to_cpu(tblp[0]);
4342 oadr = scr_to_cpu(tblp[1]);
4345 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4348 if (DEBUG_FLAGS & DEBUG_PHASE) {
4349 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4350 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4357 * check cmd against assumed interrupted script command.
4358 * If dt data phase, the MOVE instruction hasn't bit 4 of
4361 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4363 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4364 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4370 * if old phase not dataphase, leave here.
4374 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4375 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4376 (unsigned)oadr, (unsigned)rest);
4377 goto unexpected_phase;
4381 * Choose the correct PM save area.
4383 * Look at the PM_SAVE SCRIPT if you want to understand
4384 * this stuff. The equivalent code is implemented in
4385 * SCRIPTS for the 895A, 896 and 1010 that are able to
4386 * handle PM from the SCRIPTS processor.
4388 hflags0 = INB (HF_PRT);
4391 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4392 if (hflags & HF_IN_PM0)
4393 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4394 else if (hflags & HF_IN_PM1)
4395 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4397 if (hflags & HF_DP_SAVED)
4398 hflags ^= HF_ACT_PM;
4401 if (!(hflags & HF_ACT_PM)) {
4403 newcmd = SCRIPTA_BA (np, pm0_data);
4407 newcmd = SCRIPTA_BA (np, pm1_data);
4410 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4411 if (hflags != hflags0)
4412 OUTB (HF_PRT, hflags);
4415 * fillin the phase mismatch context
4417 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4418 pm->sg.size = cpu_to_scr(rest);
4419 pm->ret = cpu_to_scr(nxtdsp);
4422 * If we have a SWIDE,
4423 * - prepare the address to write the SWIDE from SCRIPTS,
4424 * - compute the SCRIPTS address to restart from,
4425 * - move current data pointer context by one byte.
4427 nxtdsp = SCRIPTA_BA (np, dispatch);
4428 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4429 (INB (nc_scntl2) & WSR)) {
4433 * Set up the table indirect for the MOVE
4434 * of the residual byte and adjust the data
4437 tmp = scr_to_cpu(pm->sg.addr);
4438 cp->phys.wresid.addr = cpu_to_scr(tmp);
4439 pm->sg.addr = cpu_to_scr(tmp + 1);
4440 tmp = scr_to_cpu(pm->sg.size);
4441 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4442 pm->sg.size = cpu_to_scr(tmp - 1);
4445 * If only the residual byte is to be moved,
4446 * no PM context is needed.
4448 if ((tmp&0xffffff) == 1)
4452 * Prepare the address of SCRIPTS that will
4453 * move the residual byte to memory.
4455 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4458 if (DEBUG_FLAGS & DEBUG_PHASE) {
4460 printf ("PM %x %x %x / %x %x %x.\n",
4461 hflags0, hflags, newcmd,
4462 (unsigned)scr_to_cpu(pm->sg.addr),
4463 (unsigned)scr_to_cpu(pm->sg.size),
4464 (unsigned)scr_to_cpu(pm->ret));
4468 * Restart the SCRIPTS processor.
4470 OUTL (nc_temp, newcmd);
4475 * Unexpected phase changes that occurs when the current phase
4476 * is not a DATA IN or DATA OUT phase are due to error conditions.
4477 * Such event may only happen when the SCRIPTS is using a
4478 * multibyte SCSI MOVE.
4480 * Phase change Some possible cause
4482 * COMMAND --> MSG IN SCSI parity error detected by target.
4483 * COMMAND --> STATUS Bad command or refused by target.
4484 * MSG OUT --> MSG IN Message rejected by target.
4485 * MSG OUT --> COMMAND Bogus target that discards extended
4486 * negotiation messages.
4488 * The code below does not care of the new phase and so
4489 * trusts the target. Why to annoy it ?
4490 * If the interrupted phase is COMMAND phase, we restart at
4492 * If a target does not get all the messages after selection,
4493 * the code assumes blindly that the target discards extended
4494 * messages and clears the negotiation status.
4495 * If the target does not want all our response to negotiation,
4496 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4497 * bloat for such a should_not_happen situation).
4498 * In all other situation, we reset the BUS.
4499 * Are these assumptions reasonnable ? (Wait and see ...)
4506 case 2: /* COMMAND phase */
4507 nxtdsp = SCRIPTA_BA (np, dispatch);
4510 case 3: /* STATUS phase */
4511 nxtdsp = SCRIPTA_BA (np, dispatch);
4514 case 6: /* MSG OUT phase */
4516 * If the device may want to use untagged when we want
4517 * tagged, we prepare an IDENTIFY without disc. granted,
4518 * since we will not be able to handle reselect.
4519 * Otherwise, we just don't care.
4521 if (dsp == SCRIPTA_BA (np, send_ident)) {
4522 if (cp->tag != NO_TAG && olen - rest <= 3) {
4523 cp->host_status = HS_BUSY;
4524 np->msgout[0] = M_IDENTIFY | cp->lun;
4525 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4528 nxtdsp = SCRIPTB_BA (np, ident_break);
4530 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4531 dsp == SCRIPTB_BA (np, send_sdtr) ||
4532 dsp == SCRIPTB_BA (np, send_ppr)) {
4533 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4537 case 7: /* MSG IN phase */
4538 nxtdsp = SCRIPTA_BA (np, clrack);
4549 sym_start_reset(np);
4553 * Dequeue from the START queue all CCBs that match
4554 * a given target/lun/task condition (-1 means all),
4555 * and move them from the BUSY queue to the COMP queue
4556 * with CAM_REQUEUE_REQ status condition.
4557 * This function is used during error handling/recovery.
4558 * It is called with SCRIPTS not running.
4561 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4567 * Make sure the starting index is within range.
4569 assert((i >= 0) && (i < 2*MAX_QUEUE));
4572 * Walk until end of START queue and dequeue every job
4573 * that matches the target/lun/task condition.
4576 while (i != np->squeueput) {
4577 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4579 #ifdef SYM_CONF_IARB_SUPPORT
4580 /* Forget hints for IARB, they may be no longer relevant */
4581 cp->host_flags &= ~HF_HINT_IARB;
4583 if ((target == -1 || cp->target == target) &&
4584 (lun == -1 || cp->lun == lun) &&
4585 (task == -1 || cp->tag == task)) {
4586 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4587 sym_remque(&cp->link_ccbq);
4588 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4592 np->squeue[j] = np->squeue[i];
4593 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4595 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4597 if (i != j) /* Copy back the idle task if needed */
4598 np->squeue[j] = np->squeue[i];
4599 np->squeueput = j; /* Update our current start queue pointer */
4605 * Complete all CCBs queued to the COMP queue.
4607 * These CCBs are assumed:
4608 * - Not to be referenced either by devices or
4609 * SCRIPTS-related queues and datas.
4610 * - To have to be completed with an error condition
4613 * The device queue freeze count is incremented
4614 * for each CCB that does not prevent this.
4615 * This function is called when all CCBs involved
4616 * in error handling/recovery have been reaped.
4619 sym_flush_comp_queue(hcb_p np, int cam_status)
4624 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
4626 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4627 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4628 /* Leave quiet CCBs waiting for resources */
4629 if (cp->host_status == HS_WAIT)
4633 sym_set_cam_status(ccb, cam_status);
4634 sym_freeze_cam_ccb(ccb);
4635 sym_xpt_done(np, ccb, cp);
4636 sym_free_ccb(np, cp);
4641 * chip handler for bad SCSI status condition
4643 * In case of bad SCSI status, we unqueue all the tasks
4644 * currently queued to the controller but not yet started
4645 * and then restart the SCRIPTS processor immediately.
4647 * QUEUE FULL and BUSY conditions are handled the same way.
4648 * Basically all the not yet started tasks are requeued in
4649 * device queue and the queue is frozen until a completion.
4651 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4652 * the CCB of the failed command to prepare a REQUEST SENSE
4653 * SCSI command and queue it to the controller queue.
4655 * SCRATCHA is assumed to have been loaded with STARTPOS
4656 * before the SCRIPTS called the C code.
4658 static void sym_sir_bad_scsi_status(hcb_p np, ccb_p cp)
4660 tcb_p tp = &np->target[cp->target];
4662 u_char s_status = cp->ssss_status;
4663 u_char h_flags = cp->host_flags;
4668 SYM_LOCK_ASSERT(MA_OWNED);
4671 * Compute the index of the next job to start from SCRIPTS.
4673 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4676 * The last CCB queued used for IARB hint may be
4677 * no longer relevant. Forget it.
4679 #ifdef SYM_CONF_IARB_SUPPORT
4685 * Now deal with the SCSI status.
4690 if (sym_verbose >= 2) {
4692 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4694 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4695 sym_complete_error (np, cp);
4700 * If we get an SCSI error when requesting sense, give up.
4702 if (h_flags & HF_SENSE) {
4703 sym_complete_error (np, cp);
4708 * Dequeue all queued CCBs for that device not yet started,
4709 * and restart the SCRIPTS processor immediately.
4711 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4712 OUTL_DSP (SCRIPTA_BA (np, start));
4715 * Save some info of the actual IO.
4716 * Compute the data residual.
4718 cp->sv_scsi_status = cp->ssss_status;
4719 cp->sv_xerr_status = cp->xerr_status;
4720 cp->sv_resid = sym_compute_residual(np, cp);
4723 * Prepare all needed data structures for
4724 * requesting sense data.
4730 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4734 * If we are currently using anything different from
4735 * async. 8 bit data transfers with that target,
4736 * start a negotiation, since the device may want
4737 * to report us a UNIT ATTENTION condition due to
4738 * a cause we currently ignore, and we donnot want
4739 * to be stuck with WIDE and/or SYNC data transfer.
4741 * cp->nego_status is filled by sym_prepare_nego().
4743 cp->nego_status = 0;
4745 if (tp->tinfo.current.options & PPR_OPT_MASK)
4747 else if (tp->tinfo.current.width != BUS_8_BIT)
4749 else if (tp->tinfo.current.offset != 0)
4753 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4755 * Message table indirect structure.
4757 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4758 cp->phys.smsg.size = cpu_to_scr(msglen);
4763 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4764 cp->phys.cmd.size = cpu_to_scr(6);
4767 * patch requested size into sense command
4769 cp->sensecmd[0] = 0x03;
4770 cp->sensecmd[1] = cp->lun << 5;
4771 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4772 cp->sensecmd[1] = 0;
4773 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4774 cp->data_len = SYM_SNS_BBUF_LEN;
4779 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4780 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4781 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4784 * requeue the command.
4786 startp = SCRIPTB_BA (np, sdata_in);
4788 cp->phys.head.savep = cpu_to_scr(startp);
4789 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4790 cp->phys.head.lastp = cpu_to_scr(startp);
4791 cp->startp = cpu_to_scr(startp);
4793 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4794 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4795 cp->ssss_status = S_ILLEGAL;
4796 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4797 cp->xerr_status = 0;
4798 cp->extra_bytes = 0;
4800 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4803 * Requeue the command.
4805 sym_put_start_queue(np, cp);
4808 * Give back to upper layer everything we have dequeued.
4810 sym_flush_comp_queue(np, 0);
4816 * After a device has accepted some management message
4817 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4818 * a device signals a UNIT ATTENTION condition, some
4819 * tasks are thrown away by the device. We are required
4820 * to reflect that on our tasks list since the device
4821 * will never complete these tasks.
4823 * This function move from the BUSY queue to the COMP
4824 * queue all disconnected CCBs for a given target that
4825 * match the following criteria:
4826 * - lun=-1 means any logical UNIT otherwise a given one.
4827 * - task=-1 means any task, otherwise a given one.
4830 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4832 SYM_QUEHEAD qtmp, *qp;
4837 * Move the entire BUSY queue to our temporary queue.
4839 sym_que_init(&qtmp);
4840 sym_que_splice(&np->busy_ccbq, &qtmp);
4841 sym_que_init(&np->busy_ccbq);
4844 * Put all CCBs that matches our criteria into
4845 * the COMP queue and put back other ones into
4848 while ((qp = sym_remque_head(&qtmp)) != NULL) {
4850 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4852 if (cp->host_status != HS_DISCONNECT ||
4853 cp->target != target ||
4854 (lun != -1 && cp->lun != lun) ||
4856 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4857 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4860 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4862 /* Preserve the software timeout condition */
4863 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4864 sym_set_cam_status(ccb, cam_status);
4867 printf("XXXX TASK @%p CLEARED\n", cp);
4874 * chip handler for TASKS recovery
4876 * We cannot safely abort a command, while the SCRIPTS
4877 * processor is running, since we just would be in race
4880 * As long as we have tasks to abort, we keep the SEM
4881 * bit set in the ISTAT. When this bit is set, the
4882 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4883 * each time it enters the scheduler.
4885 * If we have to reset a target, clear tasks of a unit,
4886 * or to perform the abort of a disconnected job, we
4887 * restart the SCRIPTS for selecting the target. Once
4888 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4889 * If it loses arbitration, the SCRIPTS will interrupt again
4890 * the next time it will enter its scheduler, and so on ...
4892 * On SIR_TARGET_SELECTED, we scan for the more
4893 * appropriate thing to do:
4895 * - If nothing, we just sent a M_ABORT message to the
4896 * target to get rid of the useless SCSI bus ownership.
4897 * According to the specs, no tasks shall be affected.
4898 * - If the target is to be reset, we send it a M_RESET
4900 * - If a logical UNIT is to be cleared , we send the
4901 * IDENTIFY(lun) + M_ABORT.
4902 * - If an untagged task is to be aborted, we send the
4903 * IDENTIFY(lun) + M_ABORT.
4904 * - If a tagged task is to be aborted, we send the
4905 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4907 * Once our 'kiss of death' :) message has been accepted
4908 * by the target, the SCRIPTS interrupts again
4909 * (SIR_ABORT_SENT). On this interrupt, we complete
4910 * all the CCBs that should have been aborted by the
4911 * target according to our message.
4913 static void sym_sir_task_recovery(hcb_p np, int num)
4918 int target=-1, lun=-1, task;
4923 * The SCRIPTS processor stopped before starting
4924 * the next command in order to allow us to perform
4925 * some task recovery.
4927 case SIR_SCRIPT_STOPPED:
4929 * Do we have any target to reset or unit to clear ?
4931 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4932 tp = &np->target[i];
4934 (tp->lun0p && tp->lun0p->to_clear)) {
4940 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4941 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
4951 * If not, walk the busy queue for any
4952 * disconnected CCB to be aborted.
4955 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4956 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
4957 if (cp->host_status != HS_DISCONNECT)
4960 target = cp->target;
4967 * If some target is to be selected,
4968 * prepare and start the selection.
4971 tp = &np->target[target];
4972 np->abrt_sel.sel_id = target;
4973 np->abrt_sel.sel_scntl3 = tp->head.wval;
4974 np->abrt_sel.sel_sxfer = tp->head.sval;
4975 OUTL(nc_dsa, np->hcb_ba);
4976 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
4981 * Now look for a CCB to abort that haven't started yet.
4982 * Btw, the SCRIPTS processor is still stopped, so
4983 * we are not in race.
4987 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4988 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4989 if (cp->host_status != HS_BUSY &&
4990 cp->host_status != HS_NEGOTIATE)
4994 #ifdef SYM_CONF_IARB_SUPPORT
4996 * If we are using IMMEDIATE ARBITRATION, we donnot
4997 * want to cancel the last queued CCB, since the
4998 * SCRIPTS may have anticipated the selection.
5000 if (cp == np->last_cp) {
5005 i = 1; /* Means we have found some */
5010 * We are done, so we donnot need
5011 * to synchronize with the SCRIPTS anylonger.
5012 * Remove the SEM flag from the ISTAT.
5015 OUTB (nc_istat, SIGP);
5019 * Compute index of next position in the start
5020 * queue the SCRIPTS intends to start and dequeue
5021 * all CCBs for that device that haven't been started.
5023 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5024 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5027 * Make sure at least our IO to abort has been dequeued.
5029 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5032 * Keep track in cam status of the reason of the abort.
5034 if (cp->to_abort == 2)
5035 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5037 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5040 * Complete with error everything that we have dequeued.
5042 sym_flush_comp_queue(np, 0);
5045 * The SCRIPTS processor has selected a target
5046 * we may have some manual recovery to perform for.
5048 case SIR_TARGET_SELECTED:
5049 target = (INB (nc_sdid) & 0xf);
5050 tp = &np->target[target];
5052 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5055 * If the target is to be reset, prepare a
5056 * M_RESET message and clear the to_reset flag
5057 * since we donnot expect this operation to fail.
5060 np->abrt_msg[0] = M_RESET;
5061 np->abrt_tbl.size = 1;
5067 * Otherwise, look for some logical unit to be cleared.
5069 if (tp->lun0p && tp->lun0p->to_clear)
5071 else if (tp->lunmp) {
5072 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5073 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5081 * If a logical unit is to be cleared, prepare
5082 * an IDENTIFY(lun) + ABORT MESSAGE.
5085 lcb_p lp = sym_lp(tp, lun);
5086 lp->to_clear = 0; /* We donnot expect to fail here */
5087 np->abrt_msg[0] = M_IDENTIFY | lun;
5088 np->abrt_msg[1] = M_ABORT;
5089 np->abrt_tbl.size = 2;
5094 * Otherwise, look for some disconnected job to
5095 * abort for this target.
5099 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5100 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5101 if (cp->host_status != HS_DISCONNECT)
5103 if (cp->target != target)
5107 i = 1; /* Means we have some */
5112 * If we have none, probably since the device has
5113 * completed the command before we won abitration,
5114 * send a M_ABORT message without IDENTIFY.
5115 * According to the specs, the device must just
5116 * disconnect the BUS and not abort any task.
5119 np->abrt_msg[0] = M_ABORT;
5120 np->abrt_tbl.size = 1;
5125 * We have some task to abort.
5126 * Set the IDENTIFY(lun)
5128 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5131 * If we want to abort an untagged command, we
5132 * will send an IDENTIFY + M_ABORT.
5133 * Otherwise (tagged command), we will send
5134 * an IDENTIFY + task attributes + ABORT TAG.
5136 if (cp->tag == NO_TAG) {
5137 np->abrt_msg[1] = M_ABORT;
5138 np->abrt_tbl.size = 2;
5141 np->abrt_msg[1] = cp->scsi_smsg[1];
5142 np->abrt_msg[2] = cp->scsi_smsg[2];
5143 np->abrt_msg[3] = M_ABORT_TAG;
5144 np->abrt_tbl.size = 4;
5147 * Keep track of software timeout condition, since the
5148 * peripheral driver may not count retries on abort
5149 * conditions not due to timeout.
5151 if (cp->to_abort == 2)
5152 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5153 cp->to_abort = 0; /* We donnot expect to fail here */
5157 * The target has accepted our message and switched
5158 * to BUS FREE phase as we expected.
5160 case SIR_ABORT_SENT:
5161 target = (INB (nc_sdid) & 0xf);
5162 tp = &np->target[target];
5165 ** If we didn't abort anything, leave here.
5167 if (np->abrt_msg[0] == M_ABORT)
5171 * If we sent a M_RESET, then a hardware reset has
5172 * been performed by the target.
5173 * - Reset everything to async 8 bit
5174 * - Tell ourself to negotiate next time :-)
5175 * - Prepare to clear all disconnected CCBs for
5176 * this target from our task list (lun=task=-1)
5180 if (np->abrt_msg[0] == M_RESET) {
5182 tp->head.wval = np->rv_scntl3;
5184 tp->tinfo.current.period = 0;
5185 tp->tinfo.current.offset = 0;
5186 tp->tinfo.current.width = BUS_8_BIT;
5187 tp->tinfo.current.options = 0;
5191 * Otherwise, check for the LUN and TASK(s)
5192 * concerned by the cancelation.
5193 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5194 * or an ABORT message :-)
5197 lun = np->abrt_msg[0] & 0x3f;
5198 if (np->abrt_msg[1] == M_ABORT_TAG)
5199 task = np->abrt_msg[2];
5203 * Complete all the CCBs the device should have
5204 * aborted due to our 'kiss of death' message.
5206 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5207 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5208 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5209 sym_flush_comp_queue(np, 0);
5212 * If we sent a BDR, make uper layer aware of that.
5214 if (np->abrt_msg[0] == M_RESET)
5215 xpt_async(AC_SENT_BDR, np->path, NULL);
5220 * Print to the log the message we intend to send.
5222 if (num == SIR_TARGET_SELECTED) {
5223 PRINT_TARGET(np, target);
5224 sym_printl_hex("control msgout:", np->abrt_msg,
5226 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5230 * Let the SCRIPTS processor continue.
5236 * Gerard's alchemy:) that deals with with the data
5237 * pointer for both MDP and the residual calculation.
5239 * I didn't want to bloat the code by more than 200
5240 * lignes for the handling of both MDP and the residual.
5241 * This has been achieved by using a data pointer
5242 * representation consisting in an index in the data
5243 * array (dp_sg) and a negative offset (dp_ofs) that
5244 * have the following meaning:
5246 * - dp_sg = SYM_CONF_MAX_SG
5247 * we are at the end of the data script.
5248 * - dp_sg < SYM_CONF_MAX_SG
5249 * dp_sg points to the next entry of the scatter array
5250 * we want to transfer.
5252 * dp_ofs represents the residual of bytes of the
5253 * previous entry scatter entry we will send first.
5255 * no residual to send first.
5257 * The function sym_evaluate_dp() accepts an arbitray
5258 * offset (basically from the MDP message) and returns
5259 * the corresponding values of dp_sg and dp_ofs.
5261 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5264 int dp_ofs, dp_sg, dp_sgmin;
5269 * Compute the resulted data pointer in term of a script
5270 * address within some DATA script and a signed byte offset.
5274 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5276 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5282 dp_scr = scr_to_cpu(pm->ret);
5283 dp_ofs -= scr_to_cpu(pm->sg.size);
5287 * If we are auto-sensing, then we are done.
5289 if (cp->host_flags & HF_SENSE) {
5295 * Deduce the index of the sg entry.
5296 * Keep track of the index of the first valid entry.
5297 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5300 tmp = scr_to_cpu(cp->phys.head.goalp);
5301 dp_sg = SYM_CONF_MAX_SG;
5303 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5304 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5307 * Move to the sg entry the data pointer belongs to.
5309 * If we are inside the data area, we expect result to be:
5312 * dp_ofs = 0 and dp_sg is the index of the sg entry
5313 * the data pointer belongs to (or the end of the data)
5315 * dp_ofs < 0 and dp_sg is the index of the sg entry
5316 * the data pointer belongs to + 1.
5320 while (dp_sg > dp_sgmin) {
5322 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5323 n = dp_ofs + (tmp & 0xffffff);
5331 else if (dp_ofs > 0) {
5332 while (dp_sg < SYM_CONF_MAX_SG) {
5333 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5334 dp_ofs -= (tmp & 0xffffff);
5342 * Make sure the data pointer is inside the data area.
5343 * If not, return some error.
5345 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5347 else if (dp_sg > SYM_CONF_MAX_SG ||
5348 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5352 * Save the extreme pointer if needed.
5354 if (dp_sg > cp->ext_sg ||
5355 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5357 cp->ext_ofs = dp_ofs;
5371 * chip handler for MODIFY DATA POINTER MESSAGE
5373 * We also call this function on IGNORE WIDE RESIDUE
5374 * messages that do not match a SWIDE full condition.
5375 * Btw, we assume in that situation that such a message
5376 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5378 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs)
5381 u32 dp_scr = INL (nc_temp);
5389 * Not supported for auto-sense.
5391 if (cp->host_flags & HF_SENSE)
5395 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5396 * to the resulted data pointer.
5398 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5403 * And our alchemy:) allows to easily calculate the data
5404 * script address we want to return for the next data phase.
5406 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5407 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5410 * If offset / scatter entry is zero we donnot need
5411 * a context for the new current data pointer.
5419 * Get a context for the new current data pointer.
5421 hflags = INB (HF_PRT);
5423 if (hflags & HF_DP_SAVED)
5424 hflags ^= HF_ACT_PM;
5426 if (!(hflags & HF_ACT_PM)) {
5428 dp_scr = SCRIPTA_BA (np, pm0_data);
5432 dp_scr = SCRIPTA_BA (np, pm1_data);
5435 hflags &= ~(HF_DP_SAVED);
5437 OUTB (HF_PRT, hflags);
5440 * Set up the new current data pointer.
5441 * ofs < 0 there, and for the next data phase, we
5442 * want to transfer part of the data of the sg entry
5443 * corresponding to index dp_sg-1 prior to returning
5444 * to the main data script.
5446 pm->ret = cpu_to_scr(dp_ret);
5447 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5448 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5449 pm->sg.addr = cpu_to_scr(tmp);
5450 pm->sg.size = cpu_to_scr(-dp_ofs);
5453 OUTL (nc_temp, dp_scr);
5454 OUTL_DSP (SCRIPTA_BA (np, clrack));
5458 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5462 * chip calculation of the data residual.
5464 * As I used to say, the requirement of data residual
5465 * in SCSI is broken, useless and cannot be achieved
5466 * without huge complexity.
5467 * But most OSes and even the official CAM require it.
5468 * When stupidity happens to be so widely spread inside
5469 * a community, it gets hard to convince.
5471 * Anyway, I don't care, since I am not going to use
5472 * any software that considers this data residual as
5473 * a relevant information. :)
5475 static int sym_compute_residual(hcb_p np, ccb_p cp)
5477 int dp_sg, dp_sgmin, resid = 0;
5481 * Check for some data lost or just thrown away.
5482 * We are not required to be quite accurate in this
5483 * situation. Btw, if we are odd for output and the
5484 * device claims some more data, it may well happen
5485 * than our residual be zero. :-)
5487 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5488 if (cp->xerr_status & XE_EXTRA_DATA)
5489 resid -= cp->extra_bytes;
5490 if (cp->xerr_status & XE_SODL_UNRUN)
5492 if (cp->xerr_status & XE_SWIDE_OVRUN)
5497 * If all data has been transferred,
5498 * there is no residual.
5500 if (cp->phys.head.lastp == cp->phys.head.goalp)
5504 * If no data transfer occurs, or if the data
5505 * pointer is weird, return full residual.
5507 if (cp->startp == cp->phys.head.lastp ||
5508 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5510 return cp->data_len;
5514 * If we were auto-sensing, then we are done.
5516 if (cp->host_flags & HF_SENSE) {
5521 * We are now full comfortable in the computation
5522 * of the data residual (2's complement).
5524 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5525 resid = -cp->ext_ofs;
5526 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5527 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5528 resid += (tmp & 0xffffff);
5532 * Hopefully, the result is not too wrong.
5538 * Print out the content of a SCSI message.
5540 static int sym_show_msg (u_char * msg)
5544 if (*msg==M_EXTENDED) {
5546 if (i-1>msg[1]) break;
5547 printf ("-%x",msg[i]);
5550 } else if ((*msg & 0xf0) == 0x20) {
5551 printf ("-%x",msg[1]);
5557 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5561 printf ("%s: ", label);
5563 (void) sym_show_msg (msg);
5568 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5570 * When we try to negotiate, we append the negotiation message
5571 * to the identify and (maybe) simple tag message.
5572 * The host status field is set to HS_NEGOTIATE to mark this
5575 * If the target doesn't answer this message immediately
5576 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5577 * will be raised eventually.
5578 * The handler removes the HS_NEGOTIATE status, and sets the
5579 * negotiated value to the default (async / nowide).
5581 * If we receive a matching answer immediately, we check it
5582 * for validity, and set the values.
5584 * If we receive a Reject message immediately, we assume the
5585 * negotiation has failed, and fall back to standard values.
5587 * If we receive a negotiation message while not in HS_NEGOTIATE
5588 * state, it's a target initiated negotiation. We prepare a
5589 * (hopefully) valid answer, set our parameters, and send back
5590 * this answer to the target.
5592 * If the target doesn't fetch the answer (no message out phase),
5593 * we assume the negotiation has failed, and fall back to default
5594 * settings (SIR_NEGO_PROTO interrupt).
5596 * When we set the values, we adjust them in all ccbs belonging
5597 * to this target, in the controller's register, and in the "phys"
5598 * field of the controller's struct sym_hcb.
5602 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5604 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5606 u_char chg, ofs, per, fak, div;
5610 * Synchronous request message received.
5612 if (DEBUG_FLAGS & DEBUG_NEGO) {
5613 sym_print_msg(cp, "sync msgin", np->msgin);
5617 * request or answer ?
5619 if (INB (HS_PRT) == HS_NEGOTIATE) {
5620 OUTB (HS_PRT, HS_BUSY);
5621 if (cp->nego_status && cp->nego_status != NS_SYNC)
5627 * get requested values.
5634 * check values against our limits.
5637 if (ofs > np->maxoffs)
5638 {chg = 1; ofs = np->maxoffs;}
5640 if (ofs > tp->tinfo.user.offset)
5641 {chg = 1; ofs = tp->tinfo.user.offset;}
5646 if (per < np->minsync)
5647 {chg = 1; per = np->minsync;}
5649 if (per < tp->tinfo.user.period)
5650 {chg = 1; per = tp->tinfo.user.period;}
5655 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5658 if (DEBUG_FLAGS & DEBUG_NEGO) {
5660 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5661 ofs, per, div, fak, chg);
5665 * This was an answer message
5668 if (chg) /* Answer wasn't acceptable. */
5670 sym_setsync (np, cp, ofs, per, div, fak);
5671 OUTL_DSP (SCRIPTA_BA (np, clrack));
5676 * It was a request. Set value and
5677 * prepare an answer message
5679 sym_setsync (np, cp, ofs, per, div, fak);
5681 np->msgout[0] = M_EXTENDED;
5683 np->msgout[2] = M_X_SYNC_REQ;
5684 np->msgout[3] = per;
5685 np->msgout[4] = ofs;
5687 cp->nego_status = NS_SYNC;
5689 if (DEBUG_FLAGS & DEBUG_NEGO) {
5690 sym_print_msg(cp, "sync msgout", np->msgout);
5693 np->msgin [0] = M_NOOP;
5695 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5698 sym_setsync (np, cp, 0, 0, 0, 0);
5699 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5703 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5705 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5707 u_char chg, ofs, per, fak, dt, div, wide;
5711 * Synchronous request message received.
5713 if (DEBUG_FLAGS & DEBUG_NEGO) {
5714 sym_print_msg(cp, "ppr msgin", np->msgin);
5718 * get requested values.
5723 wide = np->msgin[6];
5724 dt = np->msgin[7] & PPR_OPT_DT;
5727 * request or answer ?
5729 if (INB (HS_PRT) == HS_NEGOTIATE) {
5730 OUTB (HS_PRT, HS_BUSY);
5731 if (cp->nego_status && cp->nego_status != NS_PPR)
5737 * check values against our limits.
5739 if (wide > np->maxwide)
5740 {chg = 1; wide = np->maxwide;}
5741 if (!wide || !(np->features & FE_ULTRA3))
5744 if (wide > tp->tinfo.user.width)
5745 {chg = 1; wide = tp->tinfo.user.width;}
5748 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5751 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5755 if (ofs > np->maxoffs_dt)
5756 {chg = 1; ofs = np->maxoffs_dt;}
5758 else if (ofs > np->maxoffs)
5759 {chg = 1; ofs = np->maxoffs;}
5761 if (ofs > tp->tinfo.user.offset)
5762 {chg = 1; ofs = tp->tinfo.user.offset;}
5768 if (per < np->minsync_dt)
5769 {chg = 1; per = np->minsync_dt;}
5771 else if (per < np->minsync)
5772 {chg = 1; per = np->minsync;}
5774 if (per < tp->tinfo.user.period)
5775 {chg = 1; per = tp->tinfo.user.period;}
5780 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5783 if (DEBUG_FLAGS & DEBUG_NEGO) {
5786 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5787 dt, ofs, per, wide, div, fak, chg);
5794 if (chg) /* Answer wasn't acceptable */
5796 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5797 OUTL_DSP (SCRIPTA_BA (np, clrack));
5802 * It was a request. Set value and
5803 * prepare an answer message
5805 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5807 np->msgout[0] = M_EXTENDED;
5809 np->msgout[2] = M_X_PPR_REQ;
5810 np->msgout[3] = per;
5812 np->msgout[5] = ofs;
5813 np->msgout[6] = wide;
5816 cp->nego_status = NS_PPR;
5818 if (DEBUG_FLAGS & DEBUG_NEGO) {
5819 sym_print_msg(cp, "ppr msgout", np->msgout);
5822 np->msgin [0] = M_NOOP;
5824 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5827 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5828 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5830 * If it was a device response that should result in
5831 * ST, we may want to try a legacy negotiation later.
5834 tp->tinfo.goal.options = 0;
5835 tp->tinfo.goal.width = wide;
5836 tp->tinfo.goal.period = per;
5837 tp->tinfo.goal.offset = ofs;
5842 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5844 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5850 * Wide request message received.
5852 if (DEBUG_FLAGS & DEBUG_NEGO) {
5853 sym_print_msg(cp, "wide msgin", np->msgin);
5857 * Is it a request from the device?
5859 if (INB (HS_PRT) == HS_NEGOTIATE) {
5860 OUTB (HS_PRT, HS_BUSY);
5861 if (cp->nego_status && cp->nego_status != NS_WIDE)
5867 * get requested values.
5870 wide = np->msgin[3];
5873 * check values against driver limits.
5875 if (wide > np->maxwide)
5876 {chg = 1; wide = np->maxwide;}
5878 if (wide > tp->tinfo.user.width)
5879 {chg = 1; wide = tp->tinfo.user.width;}
5882 if (DEBUG_FLAGS & DEBUG_NEGO) {
5884 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5888 * This was an answer message
5891 if (chg) /* Answer wasn't acceptable. */
5893 sym_setwide (np, cp, wide);
5896 * Negotiate for SYNC immediately after WIDE response.
5897 * This allows to negotiate for both WIDE and SYNC on
5898 * a single SCSI command (Suggested by Justin Gibbs).
5900 if (tp->tinfo.goal.offset) {
5901 np->msgout[0] = M_EXTENDED;
5903 np->msgout[2] = M_X_SYNC_REQ;
5904 np->msgout[3] = tp->tinfo.goal.period;
5905 np->msgout[4] = tp->tinfo.goal.offset;
5907 if (DEBUG_FLAGS & DEBUG_NEGO) {
5908 sym_print_msg(cp, "sync msgout", np->msgout);
5911 cp->nego_status = NS_SYNC;
5912 OUTB (HS_PRT, HS_NEGOTIATE);
5913 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5917 OUTL_DSP (SCRIPTA_BA (np, clrack));
5922 * It was a request, set value and
5923 * prepare an answer message
5925 sym_setwide (np, cp, wide);
5927 np->msgout[0] = M_EXTENDED;
5929 np->msgout[2] = M_X_WIDE_REQ;
5930 np->msgout[3] = wide;
5932 np->msgin [0] = M_NOOP;
5934 cp->nego_status = NS_WIDE;
5936 if (DEBUG_FLAGS & DEBUG_NEGO) {
5937 sym_print_msg(cp, "wide msgout", np->msgout);
5940 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
5943 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5947 * Reset SYNC or WIDE to default settings.
5949 * Called when a negotiation does not succeed either
5950 * on rejection or on protocol error.
5952 * If it was a PPR that made problems, we may want to
5953 * try a legacy negotiation later.
5955 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
5958 * any error in negotiation:
5959 * fall back to default mode.
5961 switch (cp->nego_status) {
5964 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5966 tp->tinfo.goal.options = 0;
5967 if (tp->tinfo.goal.period < np->minsync)
5968 tp->tinfo.goal.period = np->minsync;
5969 if (tp->tinfo.goal.offset > np->maxoffs)
5970 tp->tinfo.goal.offset = np->maxoffs;
5974 sym_setsync (np, cp, 0, 0, 0, 0);
5977 sym_setwide (np, cp, 0);
5980 np->msgin [0] = M_NOOP;
5981 np->msgout[0] = M_NOOP;
5982 cp->nego_status = 0;
5986 * chip handler for MESSAGE REJECT received in response to
5987 * a WIDE or SYNCHRONOUS negotiation.
5989 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
5991 sym_nego_default(np, tp, cp);
5992 OUTB (HS_PRT, HS_BUSY);
5996 * chip exception handler for programmed interrupts.
5998 static void sym_int_sir (hcb_p np)
6000 u_char num = INB (nc_dsps);
6001 u32 dsa = INL (nc_dsa);
6002 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6003 u_char target = INB (nc_sdid) & 0x0f;
6004 tcb_p tp = &np->target[target];
6007 SYM_LOCK_ASSERT(MA_OWNED);
6009 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6013 * Command has been completed with error condition
6014 * or has been auto-sensed.
6016 case SIR_COMPLETE_ERROR:
6017 sym_complete_error(np, cp);
6020 * The C code is currently trying to recover from something.
6021 * Typically, user want to abort some command.
6023 case SIR_SCRIPT_STOPPED:
6024 case SIR_TARGET_SELECTED:
6025 case SIR_ABORT_SENT:
6026 sym_sir_task_recovery(np, num);
6029 * The device didn't go to MSG OUT phase after having
6030 * been selected with ATN. We donnot want to handle
6033 case SIR_SEL_ATN_NO_MSG_OUT:
6034 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6035 sym_name (np), target);
6038 * The device didn't switch to MSG IN phase after
6039 * having reseleted the initiator.
6041 case SIR_RESEL_NO_MSG_IN:
6042 printf ("%s:%d: No MSG IN phase after reselection.\n",
6043 sym_name (np), target);
6046 * After reselection, the device sent a message that wasn't
6049 case SIR_RESEL_NO_IDENTIFY:
6050 printf ("%s:%d: No IDENTIFY after reselection.\n",
6051 sym_name (np), target);
6054 * The device reselected a LUN we donnot know about.
6056 case SIR_RESEL_BAD_LUN:
6057 np->msgout[0] = M_RESET;
6060 * The device reselected for an untagged nexus and we
6063 case SIR_RESEL_BAD_I_T_L:
6064 np->msgout[0] = M_ABORT;
6067 * The device reselected for a tagged nexus that we donnot
6070 case SIR_RESEL_BAD_I_T_L_Q:
6071 np->msgout[0] = M_ABORT_TAG;
6074 * The SCRIPTS let us know that the device has grabbed
6075 * our message and will abort the job.
6077 case SIR_RESEL_ABORTED:
6078 np->lastmsg = np->msgout[0];
6079 np->msgout[0] = M_NOOP;
6080 printf ("%s:%d: message %x sent on bad reselection.\n",
6081 sym_name (np), target, np->lastmsg);
6084 * The SCRIPTS let us know that a message has been
6085 * successfully sent to the device.
6087 case SIR_MSG_OUT_DONE:
6088 np->lastmsg = np->msgout[0];
6089 np->msgout[0] = M_NOOP;
6090 /* Should we really care of that */
6091 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6093 cp->xerr_status &= ~XE_PARITY_ERR;
6094 if (!cp->xerr_status)
6095 OUTOFFB (HF_PRT, HF_EXT_ERR);
6100 * The device didn't send a GOOD SCSI status.
6101 * We may have some work to do prior to allow
6102 * the SCRIPTS processor to continue.
6104 case SIR_BAD_SCSI_STATUS:
6107 sym_sir_bad_scsi_status(np, cp);
6110 * We are asked by the SCRIPTS to prepare a
6113 case SIR_REJECT_TO_SEND:
6114 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6115 np->msgout[0] = M_REJECT;
6118 * We have been ODD at the end of a DATA IN
6119 * transfer and the device didn't send a
6120 * IGNORE WIDE RESIDUE message.
6121 * It is a data overrun condition.
6123 case SIR_SWIDE_OVERRUN:
6125 OUTONB (HF_PRT, HF_EXT_ERR);
6126 cp->xerr_status |= XE_SWIDE_OVRUN;
6130 * We have been ODD at the end of a DATA OUT
6132 * It is a data underrun condition.
6134 case SIR_SODL_UNDERRUN:
6136 OUTONB (HF_PRT, HF_EXT_ERR);
6137 cp->xerr_status |= XE_SODL_UNRUN;
6141 * The device wants us to tranfer more data than
6142 * expected or in the wrong direction.
6143 * The number of extra bytes is in scratcha.
6144 * It is a data overrun condition.
6146 case SIR_DATA_OVERRUN:
6148 OUTONB (HF_PRT, HF_EXT_ERR);
6149 cp->xerr_status |= XE_EXTRA_DATA;
6150 cp->extra_bytes += INL (nc_scratcha);
6154 * The device switched to an illegal phase (4/5).
6158 OUTONB (HF_PRT, HF_EXT_ERR);
6159 cp->xerr_status |= XE_BAD_PHASE;
6163 * We received a message.
6165 case SIR_MSG_RECEIVED:
6168 switch (np->msgin [0]) {
6170 * We received an extended message.
6171 * We handle MODIFY DATA POINTER, SDTR, WDTR
6172 * and reject all other extended messages.
6175 switch (np->msgin [2]) {
6177 if (DEBUG_FLAGS & DEBUG_POINTER)
6178 sym_print_msg(cp,"modify DP",np->msgin);
6179 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6180 (np->msgin[5]<<8) + (np->msgin[6]);
6181 sym_modify_dp(np, cp, tmp);
6184 sym_sync_nego(np, tp, cp);
6187 sym_ppr_nego(np, tp, cp);
6190 sym_wide_nego(np, tp, cp);
6197 * We received a 1/2 byte message not handled from SCRIPTS.
6198 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6199 * RESIDUE messages that haven't been anticipated by
6200 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6201 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6204 if (DEBUG_FLAGS & DEBUG_POINTER)
6205 sym_print_msg(cp,"ign wide residue", np->msgin);
6206 sym_modify_dp(np, cp, -1);
6209 if (INB (HS_PRT) == HS_NEGOTIATE)
6210 sym_nego_rejected(np, tp, cp);
6213 printf ("M_REJECT received (%x:%x).\n",
6214 scr_to_cpu(np->lastmsg), np->msgout[0]);
6223 * We received an unknown message.
6224 * Ignore all MSG IN phases and reject it.
6227 sym_print_msg(cp, "WEIRD message received", np->msgin);
6228 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6231 * Negotiation failed.
6232 * Target does not send us the reply.
6233 * Remove the HS_NEGOTIATE status.
6235 case SIR_NEGO_FAILED:
6236 OUTB (HS_PRT, HS_BUSY);
6238 * Negotiation failed.
6239 * Target does not want answer message.
6241 case SIR_NEGO_PROTO:
6242 sym_nego_default(np, tp, cp);
6250 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6253 OUTL_DSP (SCRIPTA_BA (np, clrack));
6260 * Acquire a control block
6262 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6264 tcb_p tp = &np->target[tn];
6265 lcb_p lp = sym_lp(tp, ln);
6266 u_short tag = NO_TAG;
6268 ccb_p cp = (ccb_p) NULL;
6271 * Look for a free CCB
6273 if (sym_que_empty(&np->free_ccbq))
6275 qp = sym_remque_head(&np->free_ccbq);
6278 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6281 * If the LCB is not yet available and the LUN
6282 * has been probed ok, try to allocate the LCB.
6284 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6285 lp = sym_alloc_lcb(np, tn, ln);
6291 * If the LCB is not available here, then the
6292 * logical unit is not yet discovered. For those
6293 * ones only accept 1 SCSI IO per logical unit,
6294 * since we cannot allow disconnections.
6297 if (!sym_is_bit(tp->busy0_map, ln))
6298 sym_set_bit(tp->busy0_map, ln);
6303 * If we have been asked for a tagged command.
6307 * Debugging purpose.
6309 assert(lp->busy_itl == 0);
6311 * Allocate resources for tags if not yet.
6314 sym_alloc_lcb_tags(np, tn, ln);
6319 * Get a tag for this SCSI IO and set up
6320 * the CCB bus address for reselection,
6321 * and count it for this LUN.
6322 * Toggle reselect path to tagged.
6324 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6325 tag = lp->cb_tags[lp->ia_tag];
6326 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6328 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6331 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6337 * This command will not be tagged.
6338 * If we already have either a tagged or untagged
6339 * one, refuse to overlap this untagged one.
6343 * Debugging purpose.
6345 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6347 * Count this nexus for this LUN.
6348 * Set up the CCB bus address for reselection.
6349 * Toggle reselect path to untagged.
6351 if (++lp->busy_itl == 1) {
6352 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6354 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6361 * Put the CCB into the busy queue.
6363 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6366 * Remember all informations needed to free this CCB.
6373 if (DEBUG_FLAGS & DEBUG_TAGS) {
6374 PRINT_LUN(np, tn, ln);
6375 printf ("ccb @%p using tag %d.\n", cp, tag);
6381 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6386 * Release one control block
6388 static void sym_free_ccb(hcb_p np, ccb_p cp)
6390 tcb_p tp = &np->target[cp->target];
6391 lcb_p lp = sym_lp(tp, cp->lun);
6393 if (DEBUG_FLAGS & DEBUG_TAGS) {
6394 PRINT_LUN(np, cp->target, cp->lun);
6395 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6403 * If tagged, release the tag, set the relect path
6405 if (cp->tag != NO_TAG) {
6407 * Free the tag value.
6409 lp->cb_tags[lp->if_tag] = cp->tag;
6410 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6413 * Make the reselect path invalid,
6414 * and uncount this CCB.
6416 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6418 } else { /* Untagged */
6420 * Make the reselect path invalid,
6421 * and uncount this CCB.
6423 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6427 * If no JOB active, make the LUN reselect path invalid.
6429 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6431 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6434 * Otherwise, we only accept 1 IO per LUN.
6435 * Clear the bit that keeps track of this IO.
6438 sym_clr_bit(tp->busy0_map, cp->lun);
6441 * We donnot queue more than 1 ccb per target
6442 * with negotiation at any time. If this ccb was
6443 * used for negotiation, clear this info in the tcb.
6445 if (cp == tp->nego_cp)
6448 #ifdef SYM_CONF_IARB_SUPPORT
6450 * If we just complete the last queued CCB,
6451 * clear this info that is no longer relevant.
6453 if (cp == np->last_cp)
6458 * Unmap user data from DMA map if needed.
6460 if (cp->dmamapped) {
6461 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6466 * Make this CCB available.
6469 cp->host_status = HS_IDLE;
6470 sym_remque(&cp->link_ccbq);
6471 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6475 * Allocate a CCB from memory and initialize its fixed part.
6477 static ccb_p sym_alloc_ccb(hcb_p np)
6482 SYM_LOCK_ASSERT(MA_NOTOWNED);
6485 * Prevent from allocating more CCBs than we can
6486 * queue to the controller.
6488 if (np->actccbs >= SYM_CONF_MAX_START)
6492 * Allocate memory for this CCB.
6494 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6499 * Allocate a bounce buffer for sense data.
6501 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6506 * Allocate a map for the DMA of user data.
6508 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6516 * Initialize the callout.
6518 callout_init(&cp->ch, 1);
6521 * Compute the bus address of this ccb.
6523 cp->ccb_ba = vtobus(cp);
6526 * Insert this ccb into the hashed list.
6528 hcode = CCB_HASH_CODE(cp->ccb_ba);
6529 cp->link_ccbh = np->ccbh[hcode];
6530 np->ccbh[hcode] = cp;
6533 * Initialize the start and restart actions.
6535 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6536 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6539 * Initilialyze some other fields.
6541 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6544 * Chain into free ccb queue.
6546 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6551 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
6552 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6557 * Look up a CCB from a DSA value.
6559 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6564 hcode = CCB_HASH_CODE(dsa);
6565 cp = np->ccbh[hcode];
6567 if (cp->ccb_ba == dsa)
6576 * Lun control block allocation and initialization.
6578 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6580 tcb_p tp = &np->target[tn];
6581 lcb_p lp = sym_lp(tp, ln);
6584 * Already done, just return.
6589 * Check against some race.
6591 assert(!sym_is_bit(tp->busy0_map, ln));
6594 * Allocate the LCB bus address array.
6595 * Compute the bus address of this table.
6597 if (ln && !tp->luntbl) {
6600 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6603 for (i = 0 ; i < 64 ; i++)
6604 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6605 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6609 * Allocate the table of pointers for LUN(s) > 0, if needed.
6611 if (ln && !tp->lunmp) {
6612 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6620 * Make it available to the chip.
6622 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6627 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6631 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6635 * Let the itl task point to error handling.
6637 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6640 * Set the reselect pattern to our default. :)
6642 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6645 * Set user capabilities.
6647 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6654 * Allocate LCB resources for tagged command queuing.
6656 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6658 tcb_p tp = &np->target[tn];
6659 lcb_p lp = sym_lp(tp, ln);
6663 * If LCB not available, try to allocate it.
6665 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6669 * Allocate the task table and and the tag allocation
6670 * circular buffer. We want both or none.
6672 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6675 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6677 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6683 * Initialize the task table with invalid entries.
6685 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6686 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6689 * Fill up the tag buffer with tag numbers.
6691 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6695 * Make the task table available to SCRIPTS,
6696 * And accept tagged commands now.
6698 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6702 * Test the pci bus snoop logic :-(
6704 * Has to be called with interrupts disabled.
6706 #ifndef SYM_CONF_IOMAPPED
6707 static int sym_regtest (hcb_p np)
6709 register volatile u32 data;
6711 * chip registers may NOT be cached.
6712 * write 0xffffffff to a read only register area,
6713 * and try to read it back.
6716 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6717 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6719 if (data == 0xffffffff) {
6721 if ((data & 0xe2f0fffd) != 0x02000080) {
6723 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6731 static int sym_snooptest (hcb_p np)
6733 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6735 #ifndef SYM_CONF_IOMAPPED
6736 err |= sym_regtest (np);
6737 if (err) return (err);
6741 * Enable Master Parity Checking as we intend
6742 * to enable it for normal operations.
6744 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6748 pc = SCRIPTB0_BA (np, snooptest);
6752 * Set memory and register.
6754 np->cache = cpu_to_scr(host_wr);
6755 OUTL (nc_temp, sym_wr);
6757 * Start script (exchange values)
6759 OUTL (nc_dsa, np->hcb_ba);
6762 * Wait 'til done (with timeout)
6764 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6765 if (INB(nc_istat) & (INTF|SIP|DIP))
6767 if (i>=SYM_SNOOP_TIMEOUT) {
6768 printf ("CACHE TEST FAILED: timeout.\n");
6772 * Check for fatal DMA errors.
6774 dstat = INB (nc_dstat);
6775 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6776 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6777 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6778 "DISABLING MASTER DATA PARITY CHECKING.\n",
6780 np->rv_ctest4 &= ~MPEE;
6784 if (dstat & (MDPE|BF|IID)) {
6785 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6789 * Save termination position.
6793 * Read memory and register.
6795 host_rd = scr_to_cpu(np->cache);
6796 sym_rd = INL (nc_scratcha);
6797 sym_bk = INL (nc_temp);
6800 * Check termination position.
6802 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6803 printf ("CACHE TEST FAILED: script execution failed.\n");
6804 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6805 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6806 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6812 if (host_wr != sym_rd) {
6813 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6814 (int) host_wr, (int) sym_rd);
6817 if (host_rd != sym_wr) {
6818 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6819 (int) sym_wr, (int) host_rd);
6822 if (sym_bk != sym_wr) {
6823 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6824 (int) sym_wr, (int) sym_bk);
6832 * Determine the chip's clock frequency.
6834 * This is essential for the negotiation of the synchronous
6837 * Note: we have to return the correct value.
6838 * THERE IS NO SAFE DEFAULT VALUE.
6840 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6841 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6842 * do not have a clock doubler and so are provided with a
6843 * 80 MHz clock. All other fast20 boards incorporate a doubler
6844 * and so should be delivered with a 40 MHz clock.
6845 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6846 * clock and provide a clock quadrupler (160 Mhz).
6850 * Select SCSI clock frequency
6852 static void sym_selectclock(hcb_p np, u_char scntl3)
6855 * If multiplier not present or not selected, leave here.
6857 if (np->multiplier <= 1) {
6858 OUTB(nc_scntl3, scntl3);
6862 if (sym_verbose >= 2)
6863 printf ("%s: enabling clock multiplier\n", sym_name(np));
6865 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6867 * Wait for the LCKFRQ bit to be set if supported by the chip.
6868 * Otherwise wait 20 micro-seconds.
6870 if (np->features & FE_LCKFRQ) {
6872 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6875 printf("%s: the chip cannot lock the frequency\n",
6879 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6880 OUTB(nc_scntl3, scntl3);
6881 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6882 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6886 * calculate SCSI clock frequency (in KHz)
6888 static unsigned getfreq (hcb_p np, int gen)
6890 unsigned int ms = 0;
6894 * Measure GEN timer delay in order
6895 * to calculate SCSI clock frequency
6897 * This code will never execute too
6898 * many loop iterations (if DELAY is
6899 * reasonably correct). It could get
6900 * too low a delay (too high a freq.)
6901 * if the CPU is slow executing the
6902 * loop for some reason (an NMI, for
6903 * example). For this reason we will
6904 * if multiple measurements are to be
6905 * performed trust the higher delay
6906 * (lower frequency returned).
6908 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6909 (void) INW (nc_sist); /* clear pending scsi interrupt */
6910 OUTB (nc_dien , 0); /* mask all dma interrupts */
6911 (void) INW (nc_sist); /* another one, just to be sure :) */
6912 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6913 OUTB (nc_stime1, 0); /* disable general purpose timer */
6914 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6915 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6916 UDELAY (1000); /* count ms */
6917 OUTB (nc_stime1, 0); /* disable general purpose timer */
6919 * set prescaler to divide by whatever 0 means
6920 * 0 ought to choose divide by 2, but appears
6921 * to set divide by 3.5 mode in my 53c810 ...
6923 OUTB (nc_scntl3, 0);
6926 * adjust for prescaler, and convert into KHz
6928 f = ms ? ((1 << gen) * 4340) / ms : 0;
6930 if (sym_verbose >= 2)
6931 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
6932 sym_name(np), gen, ms, f);
6937 static unsigned sym_getfreq (hcb_p np)
6942 (void) getfreq (np, gen); /* throw away first result */
6943 f1 = getfreq (np, gen);
6944 f2 = getfreq (np, gen);
6945 if (f1 > f2) f1 = f2; /* trust lower result */
6950 * Get/probe chip SCSI clock frequency
6952 static void sym_getclock (hcb_p np, int mult)
6954 unsigned char scntl3 = np->sv_scntl3;
6955 unsigned char stest1 = np->sv_stest1;
6959 * For the C10 core, assume 40 MHz.
6961 if (np->features & FE_C10) {
6962 np->multiplier = mult;
6963 np->clock_khz = 40000 * mult;
6970 * True with 875/895/896/895A with clock multiplier selected
6972 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
6973 if (sym_verbose >= 2)
6974 printf ("%s: clock multiplier found\n", sym_name(np));
6975 np->multiplier = mult;
6979 * If multiplier not found or scntl3 not 7,5,3,
6980 * reset chip and get frequency from general purpose timer.
6981 * Otherwise trust scntl3 BIOS setting.
6983 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
6984 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
6985 f1 = sym_getfreq (np);
6988 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
6990 if (f1 < 45000) f1 = 40000;
6991 else if (f1 < 55000) f1 = 50000;
6994 if (f1 < 80000 && mult > 1) {
6995 if (sym_verbose >= 2)
6996 printf ("%s: clock multiplier assumed\n",
6998 np->multiplier = mult;
7001 if ((scntl3 & 7) == 3) f1 = 40000;
7002 else if ((scntl3 & 7) == 5) f1 = 80000;
7005 f1 /= np->multiplier;
7009 * Compute controller synchronous parameters.
7011 f1 *= np->multiplier;
7016 * Get/probe PCI clock frequency
7018 static int sym_getpciclock (hcb_p np)
7023 * For the C1010-33, this doesn't work.
7024 * For the C1010-66, this will be tested when I'll have
7025 * such a beast to play with.
7027 if (!(np->features & FE_C10)) {
7028 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7029 f = (int) sym_getfreq (np);
7030 OUTB (nc_stest1, 0);
7037 /*============= DRIVER ACTION/COMPLETION ====================*/
7040 * Print something that tells about extended errors.
7042 static void sym_print_xerr(ccb_p cp, int x_status)
7044 if (x_status & XE_PARITY_ERR) {
7046 printf ("unrecovered SCSI parity error.\n");
7048 if (x_status & XE_EXTRA_DATA) {
7050 printf ("extraneous data discarded.\n");
7052 if (x_status & XE_BAD_PHASE) {
7054 printf ("illegal scsi phase (4/5).\n");
7056 if (x_status & XE_SODL_UNRUN) {
7058 printf ("ODD transfer in DATA OUT phase.\n");
7060 if (x_status & XE_SWIDE_OVRUN) {
7062 printf ("ODD transfer in DATA IN phase.\n");
7067 * Choose the more appropriate CAM status if
7068 * the IO encountered an extended error.
7070 static int sym_xerr_cam_status(int cam_status, int x_status)
7073 if (x_status & XE_PARITY_ERR)
7074 cam_status = CAM_UNCOR_PARITY;
7075 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7076 cam_status = CAM_DATA_RUN_ERR;
7077 else if (x_status & XE_BAD_PHASE)
7078 cam_status = CAM_REQ_CMP_ERR;
7080 cam_status = CAM_REQ_CMP_ERR;
7086 * Complete execution of a SCSI command with extented
7087 * error, SCSI status error, or having been auto-sensed.
7089 * The SCRIPTS processor is not running there, so we
7090 * can safely access IO registers and remove JOBs from
7092 * SCRATCHA is assumed to have been loaded with STARTPOS
7093 * before the SCRIPTS called the C code.
7095 static void sym_complete_error (hcb_p np, ccb_p cp)
7097 struct ccb_scsiio *csio;
7099 int i, sense_returned;
7101 SYM_LOCK_ASSERT(MA_OWNED);
7104 * Paranoid check. :)
7106 if (!cp || !cp->cam_ccb)
7109 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7110 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7111 cp->host_status, cp->ssss_status, cp->host_flags,
7112 cp->target, cp->lun);
7117 * Get CAM command pointer.
7119 csio = &cp->cam_ccb->csio;
7122 * Check for extended errors.
7124 if (cp->xerr_status) {
7126 sym_print_xerr(cp, cp->xerr_status);
7127 if (cp->host_status == HS_COMPLETE)
7128 cp->host_status = HS_COMP_ERR;
7132 * Calculate the residual.
7134 csio->sense_resid = 0;
7135 csio->resid = sym_compute_residual(np, cp);
7137 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7138 csio->resid = 0; /* throw them away. :) */
7142 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7143 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7144 csio->sense_resid = csio->resid; /* Swap residuals */
7145 csio->resid = cp->sv_resid;
7147 if (sym_verbose && cp->sv_xerr_status)
7148 sym_print_xerr(cp, cp->sv_xerr_status);
7149 if (cp->host_status == HS_COMPLETE &&
7150 cp->ssss_status == S_GOOD &&
7151 cp->xerr_status == 0) {
7152 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7153 cp->sv_xerr_status);
7154 cam_status |= CAM_AUTOSNS_VALID;
7156 * Bounce back the sense data to user and
7159 bzero(&csio->sense_data, sizeof(csio->sense_data));
7160 sense_returned = SYM_SNS_BBUF_LEN - csio->sense_resid;
7161 if (sense_returned < csio->sense_len)
7162 csio->sense_resid = csio->sense_len -
7165 csio->sense_resid = 0;
7166 bcopy(cp->sns_bbuf, &csio->sense_data,
7167 MIN(csio->sense_len, sense_returned));
7170 * If the device reports a UNIT ATTENTION condition
7171 * due to a RESET condition, we should consider all
7172 * disconnect CCBs for this unit as aborted.
7176 p = (u_char *) csio->sense_data;
7177 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7178 sym_clear_tasks(np, CAM_REQ_ABORTED,
7179 cp->target,cp->lun, -1);
7184 cam_status = CAM_AUTOSENSE_FAIL;
7186 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7187 csio->scsi_status = cp->ssss_status;
7188 cam_status = CAM_SCSI_STATUS_ERROR;
7190 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7191 cam_status = CAM_SEL_TIMEOUT;
7192 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7193 cam_status = CAM_UNEXP_BUSFREE;
7194 else { /* Extended error */
7197 printf ("COMMAND FAILED (%x %x %x).\n",
7198 cp->host_status, cp->ssss_status,
7201 csio->scsi_status = cp->ssss_status;
7203 * Set the most appropriate value for CAM status.
7205 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7210 * Dequeue all queued CCBs for that device
7211 * not yet started by SCRIPTS.
7213 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7214 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7217 * Restart the SCRIPTS processor.
7219 OUTL_DSP (SCRIPTA_BA (np, start));
7222 * Synchronize DMA map if needed.
7224 if (cp->dmamapped) {
7225 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7226 (cp->dmamapped == SYM_DMA_READ ?
7227 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7230 * Add this one to the COMP queue.
7231 * Complete all those commands with either error
7232 * or requeue condition.
7234 sym_set_cam_status((union ccb *) csio, cam_status);
7235 sym_remque(&cp->link_ccbq);
7236 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7237 sym_flush_comp_queue(np, 0);
7241 * Complete execution of a successful SCSI command.
7243 * Only successful commands go to the DONE queue,
7244 * since we need to have the SCRIPTS processor
7245 * stopped on any error condition.
7246 * The SCRIPTS processor is running while we are
7247 * completing successful commands.
7249 static void sym_complete_ok (hcb_p np, ccb_p cp)
7251 struct ccb_scsiio *csio;
7255 SYM_LOCK_ASSERT(MA_OWNED);
7258 * Paranoid check. :)
7260 if (!cp || !cp->cam_ccb)
7262 assert (cp->host_status == HS_COMPLETE);
7265 * Get command, target and lun pointers.
7267 csio = &cp->cam_ccb->csio;
7268 tp = &np->target[cp->target];
7269 lp = sym_lp(tp, cp->lun);
7272 * Assume device discovered on first success.
7275 sym_set_bit(tp->lun_map, cp->lun);
7278 * If all data have been transferred, given than no
7279 * extended error did occur, there is no residual.
7282 if (cp->phys.head.lastp != cp->phys.head.goalp)
7283 csio->resid = sym_compute_residual(np, cp);
7286 * Wrong transfer residuals may be worse than just always
7287 * returning zero. User can disable this feature from
7288 * sym_conf.h. Residual support is enabled by default.
7290 if (!SYM_CONF_RESIDUAL_SUPPORT)
7294 * Synchronize DMA map if needed.
7296 if (cp->dmamapped) {
7297 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7298 (cp->dmamapped == SYM_DMA_READ ?
7299 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7302 * Set status and complete the command.
7304 csio->scsi_status = cp->ssss_status;
7305 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7306 sym_xpt_done(np, (union ccb *) csio, cp);
7307 sym_free_ccb(np, cp);
7311 * Our callout handler
7313 static void sym_callout(void *arg)
7315 union ccb *ccb = (union ccb *) arg;
7316 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7319 * Check that the CAM CCB is still queued.
7326 switch(ccb->ccb_h.func_code) {
7328 (void) sym_abort_scsiio(np, ccb, 1);
7340 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7345 SYM_LOCK_ASSERT(MA_OWNED);
7348 * Look up our CCB control block.
7351 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7352 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7353 if (cp2->cam_ccb == ccb) {
7358 if (!cp || cp->host_status == HS_WAIT)
7362 * If a previous abort didn't succeed in time,
7363 * perform a BUS reset.
7366 sym_reset_scsi_bus(np, 1);
7371 * Mark the CCB for abort and allow time for.
7373 cp->to_abort = timed_out ? 2 : 1;
7374 callout_reset(&cp->ch, 10 * hz, sym_callout, (caddr_t) ccb);
7377 * Tell the SCRIPTS processor to stop and synchronize with us.
7379 np->istat_sem = SEM;
7380 OUTB (nc_istat, SIGP|SEM);
7385 * Reset a SCSI device (all LUNs of a target).
7387 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7390 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7392 SYM_LOCK_ASSERT(MA_OWNED);
7394 if (ccb_h->target_id == np->myaddr ||
7395 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7396 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7397 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7401 tp = &np->target[ccb_h->target_id];
7404 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7406 np->istat_sem = SEM;
7407 OUTB (nc_istat, SIGP|SEM);
7411 * SIM action entry point.
7413 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7420 u_char idmsg, *msgptr;
7422 struct ccb_scsiio *csio;
7423 struct ccb_hdr *ccb_h;
7425 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7428 * Retrieve our controller data structure.
7430 np = (hcb_p) cam_sim_softc(sim);
7432 SYM_LOCK_ASSERT(MA_OWNED);
7435 * The common case is SCSI IO.
7436 * We deal with other ones elsewhere.
7438 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7439 sym_action2(sim, ccb);
7443 ccb_h = &csio->ccb_h;
7446 * Work around races.
7448 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7454 * Minimal checkings, so that we will not
7455 * go outside our tables.
7457 if (ccb_h->target_id == np->myaddr ||
7458 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7459 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7460 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7465 * Retrieve the target and lun descriptors.
7467 tp = &np->target[ccb_h->target_id];
7468 lp = sym_lp(tp, ccb_h->target_lun);
7471 * Complete the 1st INQUIRY command with error
7472 * condition if the device is flagged NOSCAN
7473 * at BOOT in the NVRAM. This may speed up
7474 * the boot and maintain coherency with BIOS
7475 * device numbering. Clearing the flag allows
7476 * user to rescan skipped devices later.
7477 * We also return error for devices not flagged
7478 * for SCAN LUNS in the NVRAM since some mono-lun
7479 * devices behave badly when asked for some non
7480 * zero LUN. Btw, this is an absolute hack.:-)
7482 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7483 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7484 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7485 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7486 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7487 ccb_h->target_lun != 0)) {
7488 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7489 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7495 * Get a control block for this IO.
7497 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7498 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7500 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7505 * Keep track of the IO in our CCB.
7510 * Build the IDENTIFY message.
7512 idmsg = M_IDENTIFY | cp->lun;
7513 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7516 msgptr = cp->scsi_smsg;
7518 msgptr[msglen++] = idmsg;
7521 * Build the tag message if present.
7523 if (cp->tag != NO_TAG) {
7524 u_char order = csio->tag_action;
7532 order = M_SIMPLE_TAG;
7534 msgptr[msglen++] = order;
7537 * For less than 128 tags, actual tags are numbered
7538 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7539 * with devices that have problems with #TAG 0 or too
7540 * great #TAG numbers. For more tags (up to 256),
7541 * we use directly our tag number.
7543 #if SYM_CONF_MAX_TASK > (512/4)
7544 msgptr[msglen++] = cp->tag;
7546 msgptr[msglen++] = (cp->tag << 1) + 1;
7551 * Build a negotiation message if needed.
7552 * (nego_status is filled by sym_prepare_nego())
7554 cp->nego_status = 0;
7555 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7556 tp->tinfo.current.period != tp->tinfo.goal.period ||
7557 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7558 tp->tinfo.current.options != tp->tinfo.goal.options) {
7559 if (!tp->nego_cp && lp)
7560 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7570 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7571 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7576 cp->phys.select.sel_id = cp->target;
7577 cp->phys.select.sel_scntl3 = tp->head.wval;
7578 cp->phys.select.sel_sxfer = tp->head.sval;
7579 cp->phys.select.sel_scntl4 = tp->head.uval;
7584 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7585 cp->phys.smsg.size = cpu_to_scr(msglen);
7590 if (sym_setup_cdb(np, csio, cp) < 0) {
7591 sym_xpt_done(np, ccb, cp);
7592 sym_free_ccb(np, cp);
7599 #if 0 /* Provision */
7600 cp->actualquirks = tp->quirks;
7602 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7603 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7604 cp->ssss_status = S_ILLEGAL;
7605 cp->xerr_status = 0;
7607 cp->extra_bytes = 0;
7610 * extreme data pointer.
7611 * shall be positive, so -1 is lower than lowest.:)
7617 * Build the data descriptor block
7620 sym_setup_data_and_start(np, csio, cp);
7624 * Setup buffers and pointers that address the CDB.
7625 * I bet, physical CDBs will never be used on the planet,
7626 * since they can be bounced without significant overhead.
7628 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7630 struct ccb_hdr *ccb_h;
7634 SYM_LOCK_ASSERT(MA_OWNED);
7636 ccb_h = &csio->ccb_h;
7639 * CDB is 16 bytes max.
7641 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7642 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7645 cmd_len = csio->cdb_len;
7647 if (ccb_h->flags & CAM_CDB_POINTER) {
7648 /* CDB is a pointer */
7649 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7650 /* CDB pointer is virtual */
7651 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7652 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7654 /* CDB pointer is physical */
7656 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7658 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7663 /* CDB is in the CAM ccb (buffer) */
7664 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7665 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7668 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7669 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7675 * Set up data pointers used by SCRIPTS.
7677 static void __inline
7678 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7682 SYM_LOCK_ASSERT(MA_OWNED);
7685 * No segments means no data.
7691 * Set the data pointer.
7695 goalp = SCRIPTA_BA (np, data_out2) + 8;
7696 lastp = goalp - 8 - (cp->segments * (2*4));
7699 cp->host_flags |= HF_DATA_IN;
7700 goalp = SCRIPTA_BA (np, data_in2) + 8;
7701 lastp = goalp - 8 - (cp->segments * (2*4));
7705 lastp = goalp = SCRIPTB_BA (np, no_data);
7709 cp->phys.head.lastp = cpu_to_scr(lastp);
7710 cp->phys.head.goalp = cpu_to_scr(goalp);
7711 cp->phys.head.savep = cpu_to_scr(lastp);
7712 cp->startp = cp->phys.head.savep;
7716 * Call back routine for the DMA map service.
7717 * If bounce buffers are used (why ?), we may sleep and then
7718 * be called there in another context.
7721 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7729 np = (hcb_p) cp->arg;
7731 SYM_LOCK_ASSERT(MA_OWNED);
7734 * Deal with weird races.
7736 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7740 * Deal with weird errors.
7744 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7749 * Build the data descriptor for the chip.
7753 /* 896 rev 1 requires to be careful about boundaries */
7754 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7755 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7757 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7759 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7765 * Synchronize the DMA map only if we have
7766 * actually mapped the data.
7768 if (cp->dmamapped) {
7769 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7770 (cp->dmamapped == SYM_DMA_READ ?
7771 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7775 * Set host status to busy state.
7776 * May have been set back to HS_WAIT to avoid a race.
7778 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7781 * Set data pointers.
7783 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7786 * Enqueue this IO in our pending queue.
7788 sym_enqueue_cam_ccb(cp);
7791 * When `#ifed 1', the code below makes the driver
7792 * panic on the first attempt to write to a SCSI device.
7793 * It is the first test we want to do after a driver
7794 * change that does not seem obviously safe. :)
7797 switch (cp->cdb_buf[0]) {
7798 case 0x0A: case 0x2A: case 0xAA:
7799 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7807 * Activate this job.
7809 sym_put_start_queue(np, cp);
7812 sym_xpt_done(np, ccb, cp);
7813 sym_free_ccb(np, cp);
7817 * How complex it gets to deal with the data in CAM.
7818 * The Bus Dma stuff makes things still more complex.
7821 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7823 struct ccb_hdr *ccb_h;
7826 SYM_LOCK_ASSERT(MA_OWNED);
7828 ccb_h = &csio->ccb_h;
7831 * Now deal with the data.
7833 cp->data_len = csio->dxfer_len;
7837 * No direction means no data.
7839 dir = (ccb_h->flags & CAM_DIR_MASK);
7840 if (dir == CAM_DIR_NONE) {
7841 sym_execute_ccb(cp, NULL, 0, 0);
7845 cp->dmamapped = (dir == CAM_DIR_IN) ? SYM_DMA_READ : SYM_DMA_WRITE;
7846 retv = bus_dmamap_load_ccb(np->data_dmat, cp->dmamap,
7847 (union ccb *)csio, sym_execute_ccb, cp, 0);
7848 if (retv == EINPROGRESS) {
7849 cp->host_status = HS_WAIT;
7850 xpt_freeze_simq(np->sim, 1);
7851 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7856 * Move the scatter list to our data block.
7859 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7860 bus_dma_segment_t *psegs, int nsegs)
7862 struct sym_tblmove *data;
7863 bus_dma_segment_t *psegs2;
7865 SYM_LOCK_ASSERT(MA_OWNED);
7867 if (nsegs > SYM_CONF_MAX_SG)
7870 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7871 psegs2 = &psegs[nsegs-1];
7872 cp->segments = nsegs;
7875 data->addr = cpu_to_scr(psegs2->ds_addr);
7876 data->size = cpu_to_scr(psegs2->ds_len);
7877 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7878 printf ("%s scatter: paddr=%lx len=%ld\n",
7879 sym_name(np), (long) psegs2->ds_addr,
7880 (long) psegs2->ds_len);
7882 if (psegs2 != psegs) {
7893 * Scatter a SG list with physical addresses into bus addressable chunks.
7896 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
7902 SYM_LOCK_ASSERT(MA_OWNED);
7904 s = SYM_CONF_MAX_SG - 1;
7906 ps = psegs[t].ds_addr;
7907 pe = ps + psegs[t].ds_len;
7910 pn = (pe - 1) & ~(SYM_CONF_DMA_BOUNDARY - 1);
7914 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7915 printf ("%s scatter: paddr=%lx len=%ld\n",
7916 sym_name(np), pn, k);
7918 cp->phys.data[s].addr = cpu_to_scr(pn);
7919 cp->phys.data[s].size = cpu_to_scr(k);
7924 ps = psegs[t].ds_addr;
7925 pe = ps + psegs[t].ds_len;
7931 cp->segments = SYM_CONF_MAX_SG - 1 - s;
7933 return t >= 0 ? -1 : 0;
7937 * SIM action for non performance critical stuff.
7939 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
7941 union ccb *abort_ccb;
7942 struct ccb_hdr *ccb_h;
7943 struct ccb_pathinq *cpi;
7944 struct ccb_trans_settings *cts;
7945 struct sym_trans *tip;
7952 * Retrieve our controller data structure.
7954 np = (hcb_p) cam_sim_softc(sim);
7956 SYM_LOCK_ASSERT(MA_OWNED);
7958 ccb_h = &ccb->ccb_h;
7960 switch (ccb_h->func_code) {
7961 case XPT_SET_TRAN_SETTINGS:
7963 tp = &np->target[ccb_h->target_id];
7966 * Update SPI transport settings in TARGET control block.
7967 * Update SCSI device settings in LUN control block.
7969 lp = sym_lp(tp, ccb_h->target_lun);
7970 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7971 sym_update_trans(np, &tp->tinfo.goal, cts);
7973 sym_update_dflags(np, &lp->current_flags, cts);
7975 if (cts->type == CTS_TYPE_USER_SETTINGS) {
7976 sym_update_trans(np, &tp->tinfo.user, cts);
7978 sym_update_dflags(np, &lp->user_flags, cts);
7981 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7983 case XPT_GET_TRAN_SETTINGS:
7985 tp = &np->target[ccb_h->target_id];
7986 lp = sym_lp(tp, ccb_h->target_lun);
7988 #define cts__scsi (&cts->proto_specific.scsi)
7989 #define cts__spi (&cts->xport_specific.spi)
7990 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7991 tip = &tp->tinfo.current;
7992 dflags = lp ? lp->current_flags : 0;
7995 tip = &tp->tinfo.user;
7996 dflags = lp ? lp->user_flags : tp->usrflags;
7999 cts->protocol = PROTO_SCSI;
8000 cts->transport = XPORT_SPI;
8001 cts->protocol_version = tip->scsi_version;
8002 cts->transport_version = tip->spi_version;
8004 cts__spi->sync_period = tip->period;
8005 cts__spi->sync_offset = tip->offset;
8006 cts__spi->bus_width = tip->width;
8007 cts__spi->ppr_options = tip->options;
8009 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8010 | CTS_SPI_VALID_SYNC_OFFSET
8011 | CTS_SPI_VALID_BUS_WIDTH
8012 | CTS_SPI_VALID_PPR_OPTIONS;
8014 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8015 if (dflags & SYM_DISC_ENABLED)
8016 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8017 cts__spi->valid |= CTS_SPI_VALID_DISC;
8019 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8020 if (dflags & SYM_TAGS_ENABLED)
8021 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8022 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8025 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8027 case XPT_CALC_GEOMETRY:
8028 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8029 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8033 cpi->version_num = 1;
8034 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8035 if ((np->features & FE_WIDE) != 0)
8036 cpi->hba_inquiry |= PI_WIDE_16;
8037 cpi->target_sprt = 0;
8038 cpi->hba_misc = PIM_UNMAPPED;
8039 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8040 cpi->hba_misc |= PIM_SCANHILO;
8041 if (np->usrflags & SYM_AVOID_BUS_RESET)
8042 cpi->hba_misc |= PIM_NOBUSRESET;
8043 cpi->hba_eng_cnt = 0;
8044 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8045 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8046 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8047 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8048 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8049 cpi->bus_id = cam_sim_bus(sim);
8050 cpi->initiator_id = np->myaddr;
8051 cpi->base_transfer_speed = 3300;
8052 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8053 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8054 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8055 cpi->unit_number = cam_sim_unit(sim);
8057 cpi->protocol = PROTO_SCSI;
8058 cpi->protocol_version = SCSI_REV_2;
8059 cpi->transport = XPORT_SPI;
8060 cpi->transport_version = 2;
8061 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8062 if (np->features & FE_ULTRA3) {
8063 cpi->transport_version = 3;
8064 cpi->xport_specific.spi.ppr_options =
8065 SID_SPI_CLOCK_DT_ST;
8067 cpi->maxio = SYM_CONF_MAX_SG * PAGE_SIZE;
8068 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8071 abort_ccb = ccb->cab.abort_ccb;
8072 switch(abort_ccb->ccb_h.func_code) {
8074 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8075 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8079 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8084 sym_reset_dev(np, ccb);
8087 sym_reset_scsi_bus(np, 0);
8089 xpt_print_path(np->path);
8090 printf("SCSI BUS reset delivered.\n");
8093 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8095 case XPT_ACCEPT_TARGET_IO:
8096 case XPT_CONT_TARGET_IO:
8098 case XPT_NOTIFY_ACK:
8099 case XPT_IMMED_NOTIFY:
8102 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8108 * Asynchronous notification handler.
8111 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *args __unused)
8114 struct cam_sim *sim;
8118 sim = (struct cam_sim *) cb_arg;
8119 np = (hcb_p) cam_sim_softc(sim);
8121 SYM_LOCK_ASSERT(MA_OWNED);
8124 case AC_LOST_DEVICE:
8125 tn = xpt_path_target_id(path);
8126 if (tn >= SYM_CONF_MAX_TARGET)
8129 tp = &np->target[tn];
8133 tp->head.wval = np->rv_scntl3;
8136 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8137 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8138 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8139 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8148 * Update transfer settings of a target.
8150 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
8151 struct ccb_trans_settings *cts)
8154 SYM_LOCK_ASSERT(MA_OWNED);
8159 #define cts__spi (&cts->xport_specific.spi)
8160 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8161 tip->width = cts__spi->bus_width;
8162 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8163 tip->offset = cts__spi->sync_offset;
8164 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8165 tip->period = cts__spi->sync_period;
8166 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8167 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8168 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8169 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8170 tip->scsi_version = cts->protocol_version;
8171 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8172 cts->transport_version != XPORT_VERSION_UNKNOWN)
8173 tip->spi_version = cts->transport_version;
8176 * Scale against driver configuration limits.
8178 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8179 if (tip->period && tip->offset) {
8180 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8181 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8188 * Scale against actual controller BUS width.
8190 if (tip->width > np->maxwide)
8191 tip->width = np->maxwide;
8194 * Only accept DT if controller supports and SYNC/WIDE asked.
8196 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8197 !(tip->width == BUS_16_BIT && tip->offset)) {
8198 tip->options &= ~PPR_OPT_DT;
8202 * Scale period factor and offset against controller limits.
8204 if (tip->offset && tip->period) {
8205 if (tip->options & PPR_OPT_DT) {
8206 if (tip->period < np->minsync_dt)
8207 tip->period = np->minsync_dt;
8208 if (tip->period > np->maxsync_dt)
8209 tip->period = np->maxsync_dt;
8210 if (tip->offset > np->maxoffs_dt)
8211 tip->offset = np->maxoffs_dt;
8214 if (tip->period < np->minsync)
8215 tip->period = np->minsync;
8216 if (tip->period > np->maxsync)
8217 tip->period = np->maxsync;
8218 if (tip->offset > np->maxoffs)
8219 tip->offset = np->maxoffs;
8225 * Update flags for a device (logical unit).
8228 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8231 SYM_LOCK_ASSERT(MA_OWNED);
8233 #define cts__scsi (&cts->proto_specific.scsi)
8234 #define cts__spi (&cts->xport_specific.spi)
8235 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8236 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8237 *flags |= SYM_DISC_ENABLED;
8239 *flags &= ~SYM_DISC_ENABLED;
8242 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8243 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8244 *flags |= SYM_TAGS_ENABLED;
8246 *flags &= ~SYM_TAGS_ENABLED;
8252 /*============= DRIVER INITIALISATION ==================*/
8254 static device_method_t sym_pci_methods[] = {
8255 DEVMETHOD(device_probe, sym_pci_probe),
8256 DEVMETHOD(device_attach, sym_pci_attach),
8260 static driver_t sym_pci_driver = {
8266 static devclass_t sym_devclass;
8268 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, NULL, NULL);
8269 MODULE_DEPEND(sym, cam, 1, 1, 1);
8270 MODULE_DEPEND(sym, pci, 1, 1, 1);
8272 static const struct sym_pci_chip sym_pci_dev_table[] = {
8273 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8276 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8277 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8281 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8282 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8285 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8288 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8289 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8291 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8292 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8294 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8295 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8297 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8298 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8301 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8302 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8305 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8306 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8309 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8310 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8313 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8314 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8315 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8319 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8320 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8324 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8325 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8326 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8328 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8329 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8330 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8332 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8333 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8334 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8337 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8338 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8339 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8342 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8343 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8344 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8347 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8348 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8349 FE_RAM|FE_IO256|FE_LEDC}
8353 * Look up the chip table.
8355 * Return a pointer to the chip entry if found,
8358 static const struct sym_pci_chip *
8359 sym_find_pci_chip(device_t dev)
8361 const struct sym_pci_chip *chip;
8366 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8369 device_id = pci_get_device(dev);
8370 revision = pci_get_revid(dev);
8372 for (i = 0; i < nitems(sym_pci_dev_table); i++) {
8373 chip = &sym_pci_dev_table[i];
8374 if (device_id != chip->device_id)
8376 if (revision > chip->revision_id)
8385 * Tell upper layer if the chip is supported.
8388 sym_pci_probe(device_t dev)
8390 const struct sym_pci_chip *chip;
8392 chip = sym_find_pci_chip(dev);
8393 if (chip && sym_find_firmware(chip)) {
8394 device_set_desc(dev, chip->name);
8395 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8396 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8402 * Attach a sym53c8xx device.
8405 sym_pci_attach(device_t dev)
8407 const struct sym_pci_chip *chip;
8410 struct sym_hcb *np = NULL;
8411 struct sym_nvram nvram;
8412 const struct sym_fw *fw = NULL;
8414 bus_dma_tag_t bus_dmat;
8416 bus_dmat = bus_get_dma_tag(dev);
8419 * Only probed devices should be attached.
8420 * We just enjoy being paranoid. :)
8422 chip = sym_find_pci_chip(dev);
8423 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8427 * Allocate immediately the host control block,
8428 * since we are only expecting to succeed. :)
8429 * We keep track in the HCB of all the resources that
8430 * are to be released on error.
8432 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8434 np->bus_dmat = bus_dmat;
8437 device_set_softc(dev, np);
8442 * Copy some useful infos to the HCB.
8444 np->hcb_ba = vtobus(np);
8445 np->verbose = bootverbose;
8447 np->device_id = pci_get_device(dev);
8448 np->revision_id = pci_get_revid(dev);
8449 np->features = chip->features;
8450 np->clock_divn = chip->nr_divisor;
8451 np->maxoffs = chip->offset_max;
8452 np->maxburst = chip->burst_max;
8453 np->scripta_sz = fw->a_size;
8454 np->scriptb_sz = fw->b_size;
8455 np->fw_setup = fw->setup;
8456 np->fw_patch = fw->patch;
8457 np->fw_name = fw->name;
8460 np->target = sym_calloc_dma(SYM_CONF_MAX_TARGET * sizeof(*(np->target)),
8467 * Initialize the CCB free and busy queues.
8469 sym_que_init(&np->free_ccbq);
8470 sym_que_init(&np->busy_ccbq);
8471 sym_que_init(&np->comp_ccbq);
8472 sym_que_init(&np->cam_ccbq);
8475 * Allocate a tag for the DMA of user data.
8477 if (bus_dma_tag_create(np->bus_dmat, 1, SYM_CONF_DMA_BOUNDARY,
8478 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
8479 BUS_SPACE_MAXSIZE_32BIT, SYM_CONF_MAX_SG, SYM_CONF_DMA_BOUNDARY,
8480 0, busdma_lock_mutex, &np->mtx, &np->data_dmat)) {
8481 device_printf(dev, "failed to create DMA tag.\n");
8486 * Read and apply some fix-ups to the PCI COMMAND
8487 * register. We want the chip to be enabled for:
8489 * - PCI parity checking (reporting would also be fine)
8490 * - Write And Invalidate.
8492 command = pci_read_config(dev, PCIR_COMMAND, 2);
8493 command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_PERRESPEN |
8495 pci_write_config(dev, PCIR_COMMAND, command, 2);
8498 * Let the device know about the cache line size,
8499 * if it doesn't yet.
8501 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8504 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8508 * Alloc/get/map/retrieve everything that deals with MMIO.
8511 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
8513 if (!np->mmio_res) {
8514 device_printf(dev, "failed to allocate MMIO resources\n");
8517 np->mmio_ba = rman_get_start(np->mmio_res);
8523 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8524 RF_ACTIVE | RF_SHAREABLE);
8526 device_printf(dev, "failed to allocate IRQ resource\n");
8530 #ifdef SYM_CONF_IOMAPPED
8532 * User want us to use normal IO with PCI.
8533 * Alloc/get/map/retrieve everything that deals with IO.
8536 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
8538 device_printf(dev, "failed to allocate IO resources\n");
8542 #endif /* SYM_CONF_IOMAPPED */
8545 * If the chip has RAM.
8546 * Alloc/get/map/retrieve the corresponding resources.
8548 if (np->features & (FE_RAM|FE_RAM8K)) {
8549 int regs_id = SYM_PCI_RAM;
8550 if (np->features & FE_64BIT)
8551 regs_id = SYM_PCI_RAM64;
8552 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8553 ®s_id, RF_ACTIVE);
8555 device_printf(dev,"failed to allocate RAM resources\n");
8558 np->ram_id = regs_id;
8559 np->ram_ba = rman_get_start(np->ram_res);
8563 * Save setting of some IO registers, so we will
8564 * be able to probe specific implementations.
8566 sym_save_initial_setting (np);
8569 * Reset the chip now, since it has been reported
8570 * that SCSI clock calibration may not work properly
8571 * if the chip is currently active.
8573 sym_chip_reset (np);
8576 * Try to read the user set-up.
8578 (void) sym_read_nvram(np, &nvram);
8581 * Prepare controller and devices settings, according
8582 * to chip features, user set-up and driver set-up.
8584 (void) sym_prepare_setting(np, &nvram);
8587 * Check the PCI clock frequency.
8588 * Must be performed after prepare_setting since it destroys
8589 * STEST1 that is used to probe for the clock doubler.
8591 i = sym_getpciclock(np);
8593 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8596 * Allocate the start queue.
8598 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8601 np->squeue_ba = vtobus(np->squeue);
8604 * Allocate the done queue.
8606 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8609 np->dqueue_ba = vtobus(np->dqueue);
8612 * Allocate the target bus address array.
8614 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8617 np->targtbl_ba = vtobus(np->targtbl);
8620 * Allocate SCRIPTS areas.
8622 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8623 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8624 if (!np->scripta0 || !np->scriptb0)
8628 * Allocate the CCBs. We need at least ONE.
8630 for (i = 0; sym_alloc_ccb(np) != NULL; i++)
8636 * Calculate BUS addresses where we are going
8637 * to load the SCRIPTS.
8639 np->scripta_ba = vtobus(np->scripta0);
8640 np->scriptb_ba = vtobus(np->scriptb0);
8641 np->scriptb0_ba = np->scriptb_ba;
8644 np->scripta_ba = np->ram_ba;
8645 if (np->features & FE_RAM8K) {
8647 np->scriptb_ba = np->scripta_ba + 4096;
8649 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8657 * Copy scripts to controller instance.
8659 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8660 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8663 * Setup variable parts in scripts and compute
8664 * scripts bus addresses used from the C code.
8666 np->fw_setup(np, fw);
8669 * Bind SCRIPTS with physical addresses usable by the
8670 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8672 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8673 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8675 #ifdef SYM_CONF_IARB_SUPPORT
8677 * If user wants IARB to be set when we win arbitration
8678 * and have other jobs, compute the max number of consecutive
8679 * settings of IARB hints before we leave devices a chance to
8680 * arbitrate for reselection.
8682 #ifdef SYM_SETUP_IARB_MAX
8683 np->iarb_max = SYM_SETUP_IARB_MAX;
8690 * Prepare the idle and invalid task actions.
8692 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8693 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8694 np->idletask_ba = vtobus(&np->idletask);
8696 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8697 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8698 np->notask_ba = vtobus(&np->notask);
8700 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8701 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8702 np->bad_itl_ba = vtobus(&np->bad_itl);
8704 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8705 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8706 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8709 * Allocate and prepare the lun JUMP table that is used
8710 * for a target prior the probing of devices (bad lun table).
8711 * A private table will be allocated for the target on the
8712 * first INQUIRY response received.
8714 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8718 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8719 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8720 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8723 * Prepare the bus address array that contains the bus
8724 * address of each target control block.
8725 * For now, assume all logical units are wrong. :)
8727 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8728 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8729 np->target[i].head.luntbl_sa =
8730 cpu_to_scr(vtobus(np->badluntbl));
8731 np->target[i].head.lun0_sa =
8732 cpu_to_scr(vtobus(&np->badlun_sa));
8736 * Now check the cache handling of the pci chipset.
8738 if (sym_snooptest (np)) {
8739 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8744 * Now deal with CAM.
8745 * Hopefully, we will succeed with that one.:)
8747 if (!sym_cam_attach(np))
8751 * Sigh! we are done.
8757 * We will try to free all the resources we have
8758 * allocated, but if we are a boot device, this
8759 * will not help that much.;)
8768 * Free everything that have been allocated for this device.
8770 static void sym_pci_free(hcb_p np)
8779 * First free CAM resources.
8784 * Now every should be quiet for us to
8785 * free other resources.
8788 bus_release_resource(np->device, SYS_RES_MEMORY,
8789 np->ram_id, np->ram_res);
8791 bus_release_resource(np->device, SYS_RES_MEMORY,
8792 SYM_PCI_MMIO, np->mmio_res);
8794 bus_release_resource(np->device, SYS_RES_IOPORT,
8795 SYM_PCI_IO, np->io_res);
8797 bus_release_resource(np->device, SYS_RES_IRQ,
8801 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
8803 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
8805 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
8807 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
8809 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
8810 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
8811 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
8812 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
8813 sym_mfree_dma(cp, sizeof(*cp), "CCB");
8817 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
8819 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
8820 tp = &np->target[target];
8821 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
8822 lp = sym_lp(tp, lun);
8826 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
8829 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
8831 sym_mfree_dma(lp, sizeof(*lp), "LCB");
8833 #if SYM_CONF_MAX_LUN > 1
8835 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
8841 sym_mfree_dma(np->target,
8842 SYM_CONF_MAX_TARGET * sizeof(*(np->target)), "TARGET");
8845 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
8847 bus_dma_tag_destroy(np->data_dmat);
8848 if (SYM_LOCK_INITIALIZED() != 0)
8850 device_set_softc(np->device, NULL);
8851 sym_mfree_dma(np, sizeof(*np), "HCB");
8855 * Allocate CAM resources and register a bus to CAM.
8857 static int sym_cam_attach(hcb_p np)
8859 struct cam_devq *devq = NULL;
8860 struct cam_sim *sim = NULL;
8861 struct cam_path *path = NULL;
8865 * Establish our interrupt handler.
8867 err = bus_setup_intr(np->device, np->irq_res,
8868 INTR_ENTROPY | INTR_MPSAFE | INTR_TYPE_CAM,
8869 NULL, sym_intr, np, &np->intr);
8871 device_printf(np->device, "bus_setup_intr() failed: %d\n",
8877 * Create the device queue for our sym SIM.
8879 devq = cam_simq_alloc(SYM_CONF_MAX_START);
8884 * Construct our SIM entry.
8886 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np,
8887 device_get_unit(np->device),
8888 &np->mtx, 1, SYM_SETUP_MAX_TAG, devq);
8894 if (xpt_bus_register(sim, np->device, 0) != CAM_SUCCESS)
8898 if (xpt_create_path(&path, NULL,
8899 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
8900 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
8906 * Establish our async notification handler.
8908 if (xpt_register_async(AC_LOST_DEVICE, sym_async, sim, path) !=
8913 * Start the chip now, without resetting the BUS, since
8914 * it seems that this must stay under control of CAM.
8915 * With LVD/SE capable chips and BUS in SE mode, we may
8916 * get a spurious SMBC interrupt.
8925 cam_sim_free(sim, FALSE);
8927 cam_simq_free(devq);
8937 * Free everything that deals with CAM.
8939 static void sym_cam_free(hcb_p np)
8942 SYM_LOCK_ASSERT(MA_NOTOWNED);
8945 bus_teardown_intr(np->device, np->irq_res, np->intr);
8952 xpt_bus_deregister(cam_sim_path(np->sim));
8953 cam_sim_free(np->sim, /*free_devq*/ TRUE);
8957 xpt_free_path(np->path);
8964 /*============ OPTIONNAL NVRAM SUPPORT =================*/
8967 * Get host setup from NVRAM.
8969 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
8971 #ifdef SYM_CONF_NVRAM_SUPPORT
8973 * Get parity checking, host ID, verbose mode
8974 * and miscellaneous host flags from NVRAM.
8976 switch(nvram->type) {
8977 case SYM_SYMBIOS_NVRAM:
8978 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
8979 np->rv_scntl0 &= ~0x0a;
8980 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
8981 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
8983 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
8984 np->usrflags |= SYM_SCAN_TARGETS_HILO;
8985 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
8986 np->usrflags |= SYM_AVOID_BUS_RESET;
8988 case SYM_TEKRAM_NVRAM:
8989 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
8998 * Get target setup from NVRAM.
9000 #ifdef SYM_CONF_NVRAM_SUPPORT
9001 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9002 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9006 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9008 #ifdef SYM_CONF_NVRAM_SUPPORT
9010 case SYM_SYMBIOS_NVRAM:
9011 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9013 case SYM_TEKRAM_NVRAM:
9014 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9022 #ifdef SYM_CONF_NVRAM_SUPPORT
9024 * Get target set-up from Symbios format NVRAM.
9027 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9029 tcb_p tp = &np->target[target];
9030 Symbios_target *tn = &nvram->target[target];
9032 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9033 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9035 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9037 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9038 tp->usrflags &= ~SYM_DISC_ENABLED;
9039 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9040 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9041 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9042 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9046 * Get target set-up from Tekram format NVRAM.
9049 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9051 tcb_p tp = &np->target[target];
9052 struct Tekram_target *tn = &nvram->target[target];
9055 if (tn->flags & TEKRAM_SYNC_NEGO) {
9056 i = tn->sync_index & 0xf;
9057 tp->tinfo.user.period = Tekram_sync[i];
9060 tp->tinfo.user.width =
9061 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9063 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9064 tp->usrtags = 2 << nvram->max_tags_index;
9067 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9068 tp->usrflags |= SYM_DISC_ENABLED;
9070 /* If any device does not support parity, we will not use this option */
9071 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9072 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9075 #ifdef SYM_CONF_DEBUG_NVRAM
9077 * Dump Symbios format NVRAM for debugging purpose.
9079 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9083 /* display Symbios nvram host data */
9084 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9085 sym_name(np), nvram->host_id & 0x0f,
9086 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9087 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9088 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9089 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9090 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9091 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9093 /* display Symbios nvram drive data */
9094 for (i = 0 ; i < 15 ; i++) {
9095 struct Symbios_target *tn = &nvram->target[i];
9096 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9098 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9099 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9100 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9101 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9103 tn->sync_period / 4,
9109 * Dump TEKRAM format NVRAM for debugging purpose.
9111 static const u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9112 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9114 int i, tags, boot_delay;
9117 /* display Tekram nvram host data */
9118 tags = 2 << nvram->max_tags_index;
9120 if (nvram->boot_delay_index < 6)
9121 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9122 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9124 case 0: rem = ""; break;
9125 case 1: rem = " REMOVABLE=boot device"; break;
9126 case 2: rem = " REMOVABLE=all"; break;
9129 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9130 sym_name(np), nvram->host_id & 0x0f,
9131 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9132 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9133 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9134 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9135 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9136 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9137 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9138 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9139 rem, boot_delay, tags);
9141 /* display Tekram nvram drive data */
9142 for (i = 0; i <= 15; i++) {
9144 struct Tekram_target *tn = &nvram->target[i];
9145 j = tn->sync_index & 0xf;
9146 sync = Tekram_sync[j];
9147 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9149 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9150 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9151 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9152 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9153 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9154 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9158 #endif /* SYM_CONF_DEBUG_NVRAM */
9159 #endif /* SYM_CONF_NVRAM_SUPPORT */
9162 * Try reading Symbios or Tekram NVRAM
9164 #ifdef SYM_CONF_NVRAM_SUPPORT
9165 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9166 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9169 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9171 #ifdef SYM_CONF_NVRAM_SUPPORT
9173 * Try to read SYMBIOS nvram.
9174 * Try to read TEKRAM nvram if Symbios nvram not found.
9176 if (SYM_SETUP_SYMBIOS_NVRAM &&
9177 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9178 nvp->type = SYM_SYMBIOS_NVRAM;
9179 #ifdef SYM_CONF_DEBUG_NVRAM
9180 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9183 else if (SYM_SETUP_TEKRAM_NVRAM &&
9184 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9185 nvp->type = SYM_TEKRAM_NVRAM;
9186 #ifdef SYM_CONF_DEBUG_NVRAM
9187 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9198 #ifdef SYM_CONF_NVRAM_SUPPORT
9200 * 24C16 EEPROM reading.
9202 * GPOI0 - data in/data out
9204 * Symbios NVRAM wiring now also used by Tekram.
9213 * Set/clear data/clock bit in GPIO0
9215 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9221 *gpreg |= write_bit;
9234 OUTB (nc_gpreg, *gpreg);
9239 * Send START condition to NVRAM to wake it up.
9241 static void S24C16_start(hcb_p np, u_char *gpreg)
9243 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9244 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9245 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9246 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9250 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9252 static void S24C16_stop(hcb_p np, u_char *gpreg)
9254 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9255 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9259 * Read or write a bit to the NVRAM,
9260 * read if GPIO0 input else write if GPIO0 output
9262 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9265 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9266 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9268 *read_bit = INB (nc_gpreg);
9269 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9270 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9274 * Output an ACK to the NVRAM after reading,
9275 * change GPIO0 to output and when done back to an input
9277 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9280 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9281 S24C16_do_bit(np, 0, write_bit, gpreg);
9282 OUTB (nc_gpcntl, *gpcntl);
9286 * Input an ACK from NVRAM after writing,
9287 * change GPIO0 to input and when done back to an output
9289 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9292 OUTB (nc_gpcntl, *gpcntl | 0x01);
9293 S24C16_do_bit(np, read_bit, 1, gpreg);
9294 OUTB (nc_gpcntl, *gpcntl);
9298 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9299 * GPIO0 must already be set as an output
9301 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9302 u_char *gpreg, u_char *gpcntl)
9306 for (x = 0; x < 8; x++)
9307 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9309 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9313 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9314 * GPIO0 must already be set as an input
9316 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9317 u_char *gpreg, u_char *gpcntl)
9323 for (x = 0; x < 8; x++) {
9324 S24C16_do_bit(np, &read_bit, 1, gpreg);
9325 *read_data |= ((read_bit & 0x01) << (7 - x));
9328 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9332 * Read 'len' bytes starting at 'offset'.
9334 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9336 u_char gpcntl, gpreg;
9337 u_char old_gpcntl, old_gpreg;
9342 /* save current state of GPCNTL and GPREG */
9343 old_gpreg = INB (nc_gpreg);
9344 old_gpcntl = INB (nc_gpcntl);
9345 gpcntl = old_gpcntl & 0x1c;
9347 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9348 OUTB (nc_gpreg, old_gpreg);
9349 OUTB (nc_gpcntl, gpcntl);
9351 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9353 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9354 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9356 /* now set NVRAM inactive with GPIO0/1 both high */
9357 S24C16_stop(np, &gpreg);
9359 /* activate NVRAM */
9360 S24C16_start(np, &gpreg);
9362 /* write device code and random address MSB */
9363 S24C16_write_byte(np, &ack_data,
9364 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9365 if (ack_data & 0x01)
9368 /* write random address LSB */
9369 S24C16_write_byte(np, &ack_data,
9370 offset & 0xff, &gpreg, &gpcntl);
9371 if (ack_data & 0x01)
9374 /* regenerate START state to set up for reading */
9375 S24C16_start(np, &gpreg);
9377 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9378 S24C16_write_byte(np, &ack_data,
9379 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9380 if (ack_data & 0x01)
9383 /* now set up GPIO0 for inputting data */
9385 OUTB (nc_gpcntl, gpcntl);
9387 /* input all requested data - only part of total NVRAM */
9388 for (x = 0; x < len; x++)
9389 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9391 /* finally put NVRAM back in inactive mode */
9393 OUTB (nc_gpcntl, gpcntl);
9394 S24C16_stop(np, &gpreg);
9397 /* return GPIO0/1 to original states after having accessed NVRAM */
9398 OUTB (nc_gpcntl, old_gpcntl);
9399 OUTB (nc_gpreg, old_gpreg);
9404 #undef SET_BIT /* 0 */
9405 #undef CLR_BIT /* 1 */
9406 #undef SET_CLK /* 2 */
9407 #undef CLR_CLK /* 3 */
9410 * Try reading Symbios NVRAM.
9413 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9415 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9416 u_char *data = (u_char *) nvram;
9417 int len = sizeof(*nvram);
9421 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9422 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9425 /* check valid NVRAM signature, verify byte count and checksum */
9426 if (nvram->type != 0 ||
9427 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9428 nvram->byte_count != len - 12)
9431 /* verify checksum */
9432 for (x = 6, csum = 0; x < len - 6; x++)
9434 if (csum != nvram->checksum)
9441 * 93C46 EEPROM reading.
9446 * GPIO4 - chip select
9452 * Pulse clock bit in GPIO0
9454 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9456 OUTB (nc_gpreg, *gpreg | 0x04);
9458 OUTB (nc_gpreg, *gpreg);
9462 * Read bit from NVRAM
9464 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9467 T93C46_Clk(np, gpreg);
9468 *read_bit = INB (nc_gpreg);
9472 * Write bit to GPIO0
9474 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9476 if (write_bit & 0x01)
9483 OUTB (nc_gpreg, *gpreg);
9486 T93C46_Clk(np, gpreg);
9490 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9492 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9495 OUTB (nc_gpreg, *gpreg);
9498 T93C46_Clk(np, gpreg);
9502 * Send read command and address to NVRAM
9504 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9505 u_char *read_bit, u_char *gpreg)
9509 /* send 9 bits, start bit (1), command (2), address (6) */
9510 for (x = 0; x < 9; x++)
9511 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9513 *read_bit = INB (nc_gpreg);
9517 * READ 2 bytes from the NVRAM
9519 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9525 for (x = 0; x < 16; x++) {
9526 T93C46_Read_Bit(np, &read_bit, gpreg);
9528 if (read_bit & 0x01)
9529 *nvram_data |= (0x01 << (15 - x));
9531 *nvram_data &= ~(0x01 << (15 - x));
9536 * Read Tekram NvRAM data.
9538 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9543 for (x = 0; x < len; x++) {
9545 /* output read command and address */
9546 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9547 if (read_bit & 0x01)
9549 T93C46_Read_Word(np, &data[x], gpreg);
9550 T93C46_Stop(np, gpreg);
9557 * Try reading 93C46 Tekram NVRAM.
9559 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9561 u_char gpcntl, gpreg;
9562 u_char old_gpcntl, old_gpreg;
9565 /* save current state of GPCNTL and GPREG */
9566 old_gpreg = INB (nc_gpreg);
9567 old_gpcntl = INB (nc_gpcntl);
9569 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9571 gpreg = old_gpreg & 0xe9;
9572 OUTB (nc_gpreg, gpreg);
9573 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9574 OUTB (nc_gpcntl, gpcntl);
9576 /* input all of NVRAM, 64 words */
9577 retv = T93C46_Read_Data(np, (u_short *) nvram,
9578 sizeof(*nvram) / sizeof(short), &gpreg);
9580 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9581 OUTB (nc_gpcntl, old_gpcntl);
9582 OUTB (nc_gpreg, old_gpreg);
9588 * Try reading Tekram NVRAM.
9591 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9593 u_char *data = (u_char *) nvram;
9594 int len = sizeof(*nvram);
9598 switch (np->device_id) {
9599 case PCI_ID_SYM53C885:
9600 case PCI_ID_SYM53C895:
9601 case PCI_ID_SYM53C896:
9602 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9605 case PCI_ID_SYM53C875:
9606 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9611 x = sym_read_T93C46_nvram(np, nvram);
9617 /* verify checksum */
9618 for (x = 0, csum = 0; x < len - 1; x += 2)
9619 csum += data[x] + (data[x+1] << 8);
9626 #endif /* SYM_CONF_NVRAM_SUPPORT */