sys/dev/trm/trm.c

   1 /*
   2  *      O.S   : FreeBSD CAM
   3  *      FILE NAME  : trm.c
   4  *           BY    : C.L. Huang         (ching@tekram.com.tw)
   5  *                   Erich Chen     (erich@tekram.com.tw)
   6  *      Description: Device Driver for Tekram SCSI adapters
   7  *                   DC395U/UW/F ,DC315/U(TRM-S1040)
   8  *                   DC395U2D/U2W(TRM-S2080)
   9  *                   PCI SCSI Bus Master Host Adapter
  10  *                   (SCSI chip set used Tekram ASIC TRM-S1040,TRM-S2080)
  11  */
  12
  13 #include <sys/cdefs.h>
  14 __FBSDID("$FreeBSD$");
  15
  16 /*
  17  *      HISTORY:
  18  *
  19  *      REV#    DATE    NAME            DESCRIPTION
  20  *  1.05   05/01/1999  ERICH CHEN  First released for 3.x.x (CAM)
  21  *  1.06   07/29/1999  ERICH CHEN  Modify for NEW PCI
  22  *  1.07   12/12/1999  ERICH CHEN  Modify for 3.3.x ,DCB no free
  23  *  1.08   06/12/2000  ERICH CHEN  Modify for 4.x.x
  24  *  1.09   11/03/2000  ERICH CHEN  Modify for 4.1.R ,new sim
  25  *  1.10   10/10/2001  Oscar Feng  Fixed CAM rescan hang up bug.
  26  *  1.11   10/13/2001  Oscar Feng  Fixed wrong Async speed display bug.
  27  */
  28
  29 /*-
  30  * (C)Copyright 1995-2001 Tekram Technology Co.,Ltd.
  31  *
  32  * Redistribution and use in source and binary forms, with or without
  33  * modification, are permitted provided that the following conditions
  34  * are met:
  35  * 1. Redistributions of source code must retain the above copyright
  36  *    notice, this list of conditions and the following disclaimer.
  37  * 2. Redistributions in binary form must reproduce the above copyright
  38  *    notice, this list of conditions and the following disclaimer in the
  39  *    documentation and/or other materials provided with the distribution.
  40  * 3. The name of the author may not be used to endorse or promote products
  41  *    derived from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  44  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  45  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  46  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  47  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  48  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  49  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  50  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  51  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  52  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53  *
  54  */
  55
  56 /*
  57  * Imported into FreeBSD source repository, and updated to compile under
  58  * FreeBSD-3.0-DEVELOPMENT, by Stefan Esser <se@FreeBSD.Org>, 1996-12-17
  59  */
  60
  61 /*
  62  * Updated to compile under FreeBSD 5.0-CURRENT by Olivier Houchard
  63  * <doginou@ci0.org>, 2002-03-04
  64  */
  65
  66 #include <sys/param.h>
  67
  68 #include <sys/systm.h>
  69 #include <sys/malloc.h>
  70 #include <sys/queue.h>
  71 #if __FreeBSD_version >= 500000
  72 #include <sys/bio.h>
  73 #endif
  74 #include <sys/buf.h>
  75 #include <sys/bus.h>
  76 #include <sys/kernel.h>
  77 #include <sys/module.h>
  78
  79 #include <vm/vm.h>
  80 #include <vm/pmap.h>
  81
  82 #include <dev/pci/pcivar.h>
  83 #include <dev/pci/pcireg.h>
  84 #include <machine/resource.h>
  85 #include <machine/bus_pio.h>
  86 #include <machine/bus.h>
  87 #include <machine/clock.h>
  88 #include <sys/rman.h>
  89
  90 #include <cam/cam.h>
  91 #include <cam/cam_ccb.h>
  92 #include <cam/cam_sim.h>
  93 #include <cam/cam_xpt_sim.h>
  94 #include <cam/cam_debug.h>
  95
  96 #include <cam/scsi/scsi_all.h>
  97 #include <cam/scsi/scsi_message.h>
  98
  99 #include <dev/trm/trm.h>
 100
 101 #define trm_reg_read8(reg)      bus_space_read_1(pACB->tag, pACB->bsh, reg)
 102 #define trm_reg_read16(reg)     bus_space_read_2(pACB->tag, pACB->bsh, reg)
 103 #define trm_reg_read32(reg)     bus_space_read_4(pACB->tag, pACB->bsh, reg)
 104 #define trm_reg_write8(value,reg)       bus_space_write_1(pACB->tag, pACB->bsh,\
 105                 reg, value)
 106 #define trm_reg_write16(value,reg)      bus_space_write_2(pACB->tag, pACB->bsh,\
 107                 reg, value)
 108 #define trm_reg_write32(value,reg)      bus_space_write_4(pACB->tag, pACB->bsh,\
 109                 reg, value)
 110
 111 #define PCI_Vendor_ID_TEKRAM    0x1DE1
 112 #define PCI_Device_ID_TRM_S1040 0x0391
 113 #define PCI_DEVICEID_TRMS1040   0x03911DE1
 114 #define PCI_DEVICEID_TRMS2080   0x03921DE1
 115
 116 #ifdef trm_DEBUG1
 117 #define TRM_DPRINTF(fmt, arg...) printf("trm: " fmt, ##arg)
 118 #else
 119 #define TRM_DPRINTF(fmt, arg...) {}
 120 #endif /* TRM_DEBUG */
 121
 122 static void     trm_check_eeprom(PNVRAMTYPE pEEpromBuf,PACB pACB);
 123 static void     NVRAM_trm_read_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
 124 static u_int8_t NVRAM_trm_get_data(PACB pACB, u_int8_t bAddr);
 125 static void     NVRAM_trm_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
 126 static void     NVRAM_trm_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData);
 127 static void     NVRAM_trm_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr);
 128 static void     NVRAM_trm_wait_30us(PACB pACB);
 129
 130 static void     trm_Interrupt(void *vpACB);
 131 static void     trm_DataOutPhase0(PACB pACB, PSRB pSRB,
 132                                          u_int16_t * pscsi_status);
 133 static void     trm_DataInPhase0(PACB pACB, PSRB pSRB,
 134                                         u_int16_t * pscsi_status);
 135 static void     trm_CommandPhase0(PACB pACB, PSRB pSRB,
 136                                          u_int16_t * pscsi_status);
 137 static void     trm_StatusPhase0(PACB pACB, PSRB pSRB,
 138                                         u_int16_t * pscsi_status);
 139 static void     trm_MsgOutPhase0(PACB pACB, PSRB pSRB,
 140                                         u_int16_t * pscsi_status);
 141 static void     trm_MsgInPhase0(PACB pACB, PSRB pSRB,
 142                                         u_int16_t * pscsi_status);
 143 static void     trm_DataOutPhase1(PACB pACB, PSRB pSRB,
 144                                          u_int16_t * pscsi_status);
 145 static void     trm_DataInPhase1(PACB pACB, PSRB pSRB,
 146                                         u_int16_t * pscsi_status);
 147 static void     trm_CommandPhase1(PACB pACB, PSRB pSRB,
 148                                          u_int16_t * pscsi_status);
 149 static void     trm_StatusPhase1(PACB pACB, PSRB pSRB,
 150                                         u_int16_t * pscsi_status);
 151 static void     trm_MsgOutPhase1(PACB pACB, PSRB pSRB,
 152                                         u_int16_t * pscsi_status);
 153 static void     trm_MsgInPhase1(PACB pACB, PSRB pSRB,
 154                                         u_int16_t * pscsi_status);
 155 static void     trm_Nop0(PACB pACB, PSRB pSRB, u_int16_t * pscsi_status);
 156 static void     trm_Nop1(PACB pACB, PSRB pSRB, u_int16_t * pscsi_status);
 157 static void     trm_SetXferRate(PACB pACB, PSRB pSRB,PDCB pDCB);
 158 static void     trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir);
 159 static void     trm_Disconnect(PACB pACB);
 160 static void     trm_Reselect(PACB pACB);
 161 static void     trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB);
 162 static void     trm_DoingSRB_Done(PACB pACB);
 163 static void     trm_ScsiRstDetect(PACB pACB);
 164 static void     trm_ResetSCSIBus(PACB pACB);
 165 static void     trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB);
 166 static void     trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB);
 167 static void     trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB);
 168 static void     trm_SendSRB(PACB pACB, PSRB pSRB);
 169 static int      trm_probe(device_t tag);
 170 static int      trm_attach(device_t tag);
 171 static void     trm_reset(PACB pACB);
 172
 173 static u_int16_t        trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB);
 174
 175 static int      trm_initAdapter(PACB pACB, u_int16_t unit);
 176 static void     trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,
 177                                         u_int32_t i, u_int32_t j);
 178 static int      trm_initSRB(PACB pACB);
 179 static void     trm_initACB(PACB pACB, u_int8_t adaptType, u_int16_t unit);
 180 /* CAM SIM entry points */
 181 #define ccb_trmsrb_ptr spriv_ptr0
 182 #define ccb_trmacb_ptr spriv_ptr1
 183 static void     trm_action(struct cam_sim *psim, union ccb *pccb);
 184 static void     trm_poll(struct cam_sim *psim);
 185
 186
 187 static void * trm_SCSI_phase0[] = {
 188         trm_DataOutPhase0,    /* phase:0 */
 189         trm_DataInPhase0,     /* phase:1 */
 190         trm_CommandPhase0,    /* phase:2 */
 191         trm_StatusPhase0,     /* phase:3 */
 192         trm_Nop0,             /* phase:4 */
 193         trm_Nop1,             /* phase:5 */
 194         trm_MsgOutPhase0,     /* phase:6 */
 195         trm_MsgInPhase0,      /* phase:7 */
 196 };
 197
 198 /*
 199  *
 200  *          stateV = (void *) trm_SCSI_phase1[phase]
 201  *
 202  */
 203 static void * trm_SCSI_phase1[] = {
 204         trm_DataOutPhase1,    /* phase:0 */
 205         trm_DataInPhase1,     /* phase:1 */
 206         trm_CommandPhase1,    /* phase:2 */
 207         trm_StatusPhase1,     /* phase:3 */
 208         trm_Nop0,             /* phase:4 */
 209         trm_Nop1,             /* phase:5 */
 210         trm_MsgOutPhase1,     /* phase:6 */
 211         trm_MsgInPhase1,      /* phase:7 */
 212 };
 213
 214
 215 NVRAMTYPE trm_eepromBuf[TRM_MAX_ADAPTER_NUM];
 216 /*
 217  *Fast20:  000   50ns, 20.0 Mbytes/s
 218  *             001       75ns, 13.3 Mbytes/s
 219  *             010      100ns, 10.0 Mbytes/s
 220  *             011      125ns,  8.0 Mbytes/s
 221  *             100      150ns,  6.6 Mbytes/s
 222  *             101      175ns,  5.7 Mbytes/s
 223  *             110      200ns,  5.0 Mbytes/s
 224  *             111      250ns,  4.0 Mbytes/s
 225  *
 226  *Fast40:  000   25ns, 40.0 Mbytes/s
 227  *             001       50ns, 20.0 Mbytes/s
 228  *             010       75ns, 13.3 Mbytes/s
 229  *             011      100ns, 10.0 Mbytes/s
 230  *             100      125ns,  8.0 Mbytes/s
 231  *             101      150ns,  6.6 Mbytes/s
 232  *             110      175ns,  5.7 Mbytes/s
 233  *             111      200ns,  5.0 Mbytes/s
 234  */
 235                                              /* real period: */
 236 u_int8_t dc395x_clock_period[] = {
 237         12,/*  48  ns 20   MB/sec */
 238         18,/*  72  ns 13.3 MB/sec */
 239         25,/* 100  ns 10.0 MB/sec */
 240         31,/* 124  ns  8.0 MB/sec */
 241         37,/* 148  ns  6.6 MB/sec */
 242         43,/* 172  ns  5.7 MB/sec */
 243         50,/* 200  ns  5.0 MB/sec */
 244         62 /* 248  ns  4.0 MB/sec */
 245 };
 246
 247 u_int8_t dc395u2x_clock_period[]={
 248         10,/*  25  ns 40.0 MB/sec */
 249         12,/*  48  ns 20.0 MB/sec */
 250         18,/*  72  ns 13.3 MB/sec */
 251         25,/* 100  ns 10.0 MB/sec */
 252         31,/* 124  ns  8.0 MB/sec */
 253         37,/* 148  ns  6.6 MB/sec */
 254         43,/* 172  ns  5.7 MB/sec */
 255         50,/* 200  ns  5.0 MB/sec */
 256 };
 257
 258 #define  dc395x_tinfo_period           dc395x_clock_period
 259 #define  dc395u2x_tinfo_period         dc395u2x_clock_period
 260
 261 static PSRB
 262 trm_GetSRB(PACB pACB)
 263 {
 264         int     intflag;
 265         PSRB    pSRB;
 266
 267         intflag = splcam();
 268         pSRB = pACB->pFreeSRB;
 269         if (pSRB) {
 270                 pACB->pFreeSRB = pSRB->pNextSRB;
 271                 pSRB->pNextSRB = NULL;
 272         }
 273         splx(intflag);
 274         return (pSRB);
 275 }
 276
 277 static void
 278 trm_RewaitSRB0(PDCB pDCB, PSRB pSRB)
 279 {
 280         PSRB    psrb1;
 281         int     intflag;
 282
 283         intflag = splcam();
 284         if ((psrb1 = pDCB->pWaitingSRB)) {
 285                 pSRB->pNextSRB = psrb1;
 286                 pDCB->pWaitingSRB = pSRB;
 287         } else {
 288                 pSRB->pNextSRB = NULL;
 289                 pDCB->pWaitingSRB = pSRB;
 290                 pDCB->pWaitingLastSRB = pSRB;
 291         }
 292         splx(intflag);
 293 }
 294
 295 static void
 296 trm_RewaitSRB(PDCB pDCB, PSRB pSRB)
 297 {
 298         PSRB    psrb1;
 299         int     intflag;
 300
 301         intflag = splcam();
 302         pDCB->GoingSRBCnt--;
 303         psrb1 = pDCB->pGoingSRB;
 304         if (pSRB == psrb1)
 305                 /*
 306                  * if this SRB is GoingSRB
 307                  * remove this SRB from GoingSRB Q
 308                  */
 309                 pDCB->pGoingSRB = psrb1->pNextSRB;
 310         else {
 311                 /*
 312                  * if this SRB is not current GoingSRB
 313                  * remove this SRB from GoingSRB Q
 314                  */
 315                 while (pSRB != psrb1->pNextSRB)
 316                         psrb1 = psrb1->pNextSRB;
 317                 psrb1->pNextSRB = pSRB->pNextSRB;
 318                 if (pSRB == pDCB->pGoingLastSRB)
 319                         pDCB->pGoingLastSRB = psrb1;
 320         }
 321         if ((psrb1 = pDCB->pWaitingSRB)) {
 322                 /*
 323                  * if WaitingSRB Q is not NULL
 324                  * Q back this SRB into WaitingSRB
 325                  */
 326
 327                 pSRB->pNextSRB = psrb1;
 328                 pDCB->pWaitingSRB = pSRB;
 329         } else {
 330                 pSRB->pNextSRB = NULL;
 331                 pDCB->pWaitingSRB = pSRB;
 332                 pDCB->pWaitingLastSRB = pSRB;
 333         }
 334         splx(intflag);
 335 }
 336
 337 static void
 338 trm_DoWaitingSRB(PACB pACB)
 339 {
 340         int     intflag;
 341         PDCB    ptr, ptr1;
 342         PSRB    pSRB;
 343
 344         intflag = splcam();
 345         if (!(pACB->pActiveDCB) &&
 346             !(pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
 347                 ptr = pACB->pDCBRunRobin;
 348                 if (!ptr) {
 349                         ptr = pACB->pLinkDCB;
 350                         pACB->pDCBRunRobin = ptr;
 351                 }
 352                 ptr1 = ptr;
 353                 for (;ptr1 ;) {
 354                         pACB->pDCBRunRobin = ptr1->pNextDCB;
 355                         if (!(ptr1->MaxActiveCommandCnt > ptr1->GoingSRBCnt)
 356                             || !(pSRB = ptr1->pWaitingSRB)) {
 357                                 if (pACB->pDCBRunRobin == ptr)
 358                                         break;
 359                                 ptr1 = ptr1->pNextDCB;
 360                         } else {
 361                                 if (!trm_StartSCSI(pACB, ptr1, pSRB)) {
 362                                 /*
 363                                  * If trm_StartSCSI return 0 :
 364                                  * current interrupt status is interrupt enable
 365                                  * It's said that SCSI processor is unoccupied
 366                                  */
 367                                         ptr1->GoingSRBCnt++;
 368                                         if (ptr1->pWaitingLastSRB == pSRB) {
 369                                                 ptr1->pWaitingSRB = NULL;
 370                                                 ptr1->pWaitingLastSRB = NULL;
 371                                         } else
 372                                                 ptr1->pWaitingSRB = pSRB->pNextSRB;
 373                                         pSRB->pNextSRB = NULL;
 374                                         if (ptr1->pGoingSRB)
 375                                                 ptr1->pGoingLastSRB->pNextSRB = pSRB;
 376                                         else
 377                                                 ptr1->pGoingSRB = pSRB;
 378                                         ptr1->pGoingLastSRB = pSRB;
 379                                 }
 380                                 break;
 381                         }
 382                 }
 383         }
 384         splx(intflag);
 385         return;
 386 }
 387
 388 static void
 389 trm_SRBwaiting(PDCB pDCB, PSRB pSRB)
 390 {
 391
 392         if (pDCB->pWaitingSRB) {
 393                 pDCB->pWaitingLastSRB->pNextSRB = pSRB;
 394                 pDCB->pWaitingLastSRB = pSRB;
 395                 pSRB->pNextSRB = NULL;
 396         } else {
 397                 pDCB->pWaitingSRB = pSRB;
 398                 pDCB->pWaitingLastSRB = pSRB;
 399         }
 400 }
 401
 402 static u_int32_t
 403 trm_get_sense_bufaddr(PACB pACB, PSRB pSRB)
 404 {
 405         int offset;
 406
 407         offset = pSRB->TagNumber;
 408         return (pACB->sense_busaddr +
 409             (offset * sizeof(struct scsi_sense_data)));
 410 }
 411
 412 static struct scsi_sense_data *
 413 trm_get_sense_buf(PACB pACB, PSRB pSRB)
 414 {
 415         int offset;
 416
 417         offset = pSRB->TagNumber;
 418         return (&pACB->sense_buffers[offset]);
 419 }
 420 static void
 421 trm_ExecuteSRB(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
 422 {
 423         int             flags;
 424         PACB            pACB;
 425         PSRB            pSRB;
 426         union ccb       *ccb;
 427         u_long          totalxferlen=0;
 428
 429         flags = splcam();
 430         pSRB = (PSRB)arg;
 431         ccb = pSRB->pccb;
 432         pACB = (PACB)ccb->ccb_h.ccb_trmacb_ptr;
 433         TRM_DPRINTF("trm_ExecuteSRB..........\n");
 434         if (nseg != 0) {
 435                 PSEG                    psg;
 436                 bus_dma_segment_t       *end_seg;
 437                 int                     op;
 438
 439                 /* Copy the segments into our SG list */
 440                 end_seg = dm_segs + nseg;
 441                 psg = pSRB->pSRBSGL;
 442                 while (dm_segs < end_seg) {
 443                         psg->address = dm_segs->ds_addr;
 444                         psg->length = (u_long)dm_segs->ds_len;
 445                         totalxferlen += dm_segs->ds_len;
 446                         psg++;
 447                         dm_segs++;
 448                 }
 449                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
 450                         op = BUS_DMASYNC_PREREAD;
 451                 } else {
 452                         op = BUS_DMASYNC_PREWRITE;
 453                 }
 454                 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
 455         }
 456         pSRB->RetryCnt = 0;
 457         pSRB->SRBTotalXferLength = totalxferlen;
 458         pSRB->SRBSGCount = nseg;
 459         pSRB->SRBSGIndex = 0;
 460         pSRB->AdaptStatus = 0;
 461         pSRB->TargetStatus = 0;
 462         pSRB->MsgCnt = 0;
 463         pSRB->SRBStatus = 0;
 464         pSRB->SRBFlag = 0;
 465         pSRB->SRBState = 0;
 466         pSRB->ScsiPhase = PH_BUS_FREE; /* SCSI bus free Phase */
 467
 468         if (ccb->ccb_h.status != CAM_REQ_INPROG) {
 469                 if (nseg != 0)
 470                         bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
 471                 pSRB->pNextSRB = pACB->pFreeSRB;
 472                 pACB->pFreeSRB = pSRB;
 473                 xpt_done(ccb);
 474                 splx(flags);
 475                 return;
 476         }
 477         ccb->ccb_h.status |= CAM_SIM_QUEUED;
 478 #if 0
 479         /* XXX Need a timeout handler */
 480         ccb->ccb_h.timeout_ch = timeout(trmtimeout, (caddr_t)srb, (ccb->ccb_h.timeout * hz) / 1000);
 481 #endif
 482         trm_SendSRB(pACB, pSRB);
 483         splx(flags);
 484         return;
 485 }
 486
 487 static void
 488 trm_SendSRB(PACB pACB, PSRB pSRB)
 489 {
 490         PDCB    pDCB;
 491
 492         pDCB = pSRB->pSRBDCB;
 493         if (!(pDCB->MaxActiveCommandCnt > pDCB->GoingSRBCnt) || (pACB->pActiveDCB)
 494             || (pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
 495                 TRM_DPRINTF("pDCB->MaxCommand=%d \n",pDCB->MaxActiveCommandCnt);
 496                 TRM_DPRINTF("pDCB->GoingSRBCnt=%d \n",pDCB->GoingSRBCnt);
 497                 TRM_DPRINTF("pACB->pActiveDCB=%8x \n",(u_int)pACB->pActiveDCB);
 498                 TRM_DPRINTF("pACB->ACBFlag=%x \n",pACB->ACBFlag);
 499                 trm_SRBwaiting(pDCB, pSRB);
 500                 goto SND_EXIT;
 501         }
 502
 503         if (pDCB->pWaitingSRB) {
 504                 trm_SRBwaiting(pDCB, pSRB);
 505                 pSRB = pDCB->pWaitingSRB;
 506                 pDCB->pWaitingSRB = pSRB->pNextSRB;
 507                 pSRB->pNextSRB = NULL;
 508         }
 509
 510         if (!trm_StartSCSI(pACB, pDCB, pSRB)) {
 511         /*
 512          * If trm_StartSCSI return 0 :
 513          * current interrupt status is interrupt enable
 514          * It's said that SCSI processor is unoccupied
 515          */
 516                 pDCB->GoingSRBCnt++; /* stack waiting SRB*/
 517                 if (pDCB->pGoingSRB) {
 518                         pDCB->pGoingLastSRB->pNextSRB = pSRB;
 519                         pDCB->pGoingLastSRB = pSRB;
 520                 } else {
 521                         pDCB->pGoingSRB = pSRB;
 522                         pDCB->pGoingLastSRB = pSRB;
 523                 }
 524         } else {
 525         /*
 526          * If trm_StartSCSI return 1 :
 527          * current interrupt status is interrupt disreenable
 528          * It's said that SCSI processor has more one SRB need to do
 529          */
 530                 trm_RewaitSRB0(pDCB, pSRB);
 531         }
 532 SND_EXIT:
 533         return;
 534 }
 535
 536
 537 static void
 538 trm_action(struct cam_sim *psim, union ccb *pccb)
 539 {
 540         PACB    pACB;
 541         int     actionflags;
 542         u_int   target_id,target_lun;
 543
 544         CAM_DEBUG(pccb->ccb_h.path, CAM_DEBUG_TRACE, ("trm_action\n"));
 545
 546         actionflags = splcam();
 547         pACB = (PACB) cam_sim_softc(psim);
 548         target_id  = pccb->ccb_h.target_id;
 549         target_lun = pccb->ccb_h.target_lun;
 550
 551         switch (pccb->ccb_h.func_code) {
 552                 case XPT_NOOP:
 553                         TRM_DPRINTF(" XPT_NOOP \n");
 554                         pccb->ccb_h.status = CAM_REQ_INVALID;
 555                         xpt_done(pccb);
 556                         break;
 557                 /*
 558                  * Execute the requested I/O operation
 559                  */
 560                 case XPT_SCSI_IO: {
 561                         PDCB                    pDCB = NULL;
 562                         PSRB                    pSRB;
 563                         struct ccb_scsiio       *pcsio;
 564
 565                         pcsio = &pccb->csio;
 566                         TRM_DPRINTF(" XPT_SCSI_IO \n");
 567                         TRM_DPRINTF("trm: target_id= %d target_lun= %d \n"
 568                              ,target_id, target_lun);
 569                         TRM_DPRINTF(
 570                             "pACB->scan_devices[target_id][target_lun]= %d \n"
 571                             ,pACB->scan_devices[target_id][target_lun]);
 572                         if ((pccb->ccb_h.status & CAM_STATUS_MASK) !=
 573                             CAM_REQ_INPROG) {
 574                                 xpt_done(pccb);
 575                                 splx(actionflags);
 576                                 return;
 577                         }
 578                         pDCB = &pACB->DCBarray[target_id][target_lun];
 579                         if (!(pDCB->DCBstatus & DS_IN_QUEUE)) {
 580                                 pACB->scan_devices[target_id][target_lun] = 1;
 581                                 trm_initDCB(pACB, pDCB, pACB->AdapterUnit,
 582                                     target_id, target_lun);
 583                         }
 584                         /*
 585                          * Assign an SRB and connect it with this ccb.
 586                          */
 587                         pSRB = trm_GetSRB(pACB);
 588                         if (!pSRB) {
 589                                 /* Freeze SIMQ */
 590                                 pccb->ccb_h.status = CAM_RESRC_UNAVAIL;
 591                                 xpt_done(pccb);
 592                                 splx(actionflags);
 593                                 return;
 594                         }
 595                         pSRB->pSRBDCB = pDCB;
 596                         pccb->ccb_h.ccb_trmsrb_ptr = pSRB;
 597                         pccb->ccb_h.ccb_trmacb_ptr = pACB;
 598                         pSRB->pccb = pccb;
 599                         pSRB->ScsiCmdLen = pcsio->cdb_len;
 600                         /*
 601                          * move layer of CAM command block to layer of SCSI
 602                          * Request Block for SCSI processor command doing
 603                          */
 604                         if ((pccb->ccb_h.flags & CAM_CDB_POINTER) != 0) {
 605                                 if ((pccb->ccb_h.flags & CAM_CDB_PHYS) == 0) {
 606                                         bcopy(pcsio->cdb_io.cdb_ptr,pSRB->CmdBlock
 607                                             ,pcsio->cdb_len);
 608                                 } else {
 609                                         pccb->ccb_h.status = CAM_REQ_INVALID;
 610                                         pSRB->pNextSRB = pACB->pFreeSRB;
 611                                         pACB->pFreeSRB=  pSRB;
 612                                         xpt_done(pccb);
 613                                         splx(actionflags);
 614                                         return;
 615                                 }
 616                         } else
 617                                 bcopy(pcsio->cdb_io.cdb_bytes,
 618                                     pSRB->CmdBlock, pcsio->cdb_len);
 619                         if ((pccb->ccb_h.flags & CAM_DIR_MASK)
 620                             != CAM_DIR_NONE) {
 621                                 if ((pccb->ccb_h.flags &
 622                                       CAM_SCATTER_VALID) == 0) {
 623                                         if ((pccb->ccb_h.flags
 624                                               & CAM_DATA_PHYS) == 0) {
 625                                                 int vmflags;
 626                                                 int error;
 627
 628                                                 vmflags = splsoftvm();
 629                                                 error = bus_dmamap_load(
 630                                                     pACB->buffer_dmat,
 631                                                     pSRB->dmamap,
 632                                                     pcsio->data_ptr,
 633                                                     pcsio->dxfer_len,
 634                                                     trm_ExecuteSRB,
 635                                                     pSRB,
 636                                                     0);
 637                                                 if (error == EINPROGRESS) {
 638                                                         xpt_freeze_simq(
 639                                                             pACB->psim,
 640                                                             1);
 641                                                         pccb->ccb_h.status |=
 642                                                           CAM_RELEASE_SIMQ;
 643                                                 }
 644                                                 splx(vmflags);
 645                                         } else {
 646                                                 struct bus_dma_segment seg;
 647
 648                                                 /* Pointer to physical buffer */
 649                                                 seg.ds_addr =
 650                                                   (bus_addr_t)pcsio->data_ptr;
 651                                                 seg.ds_len = pcsio->dxfer_len;
 652                                                 trm_ExecuteSRB(pSRB, &seg, 1,
 653                                                     0);
 654                                         }
 655                                 } else {
 656                                         /*  CAM_SCATTER_VALID */
 657                                         struct bus_dma_segment *segs;
 658
 659                                         if ((pccb->ccb_h.flags &
 660                                              CAM_SG_LIST_PHYS) == 0 ||
 661                                              (pccb->ccb_h.flags
 662                                              & CAM_DATA_PHYS) != 0) {
 663                                                 pSRB->pNextSRB = pACB->pFreeSRB;
 664                                                 pACB->pFreeSRB = pSRB;
 665                                                 pccb->ccb_h.status =
 666                                                   CAM_PROVIDE_FAIL;
 667                                                 xpt_done(pccb);
 668                                                 splx(actionflags);
 669                                                 return;
 670                                         }
 671
 672                                         /* cam SG list is physical,
 673                                          *  cam data is virtual
 674                                          */
 675                                         segs = (struct bus_dma_segment *)
 676                                             pcsio->data_ptr;
 677                                         trm_ExecuteSRB(pSRB, segs,
 678                                             pcsio->sglist_cnt, 1);
 679                                 }   /*  CAM_SCATTER_VALID */
 680                         } else
 681                                 trm_ExecuteSRB(pSRB, NULL, 0, 0);
 682                                   }
 683                         break;
 684                 case XPT_GDEV_TYPE:
 685                         TRM_DPRINTF(" XPT_GDEV_TYPE \n");
 686                         pccb->ccb_h.status = CAM_REQ_INVALID;
 687                         xpt_done(pccb);
 688                         break;
 689                 case XPT_GDEVLIST:
 690                         TRM_DPRINTF(" XPT_GDEVLIST \n");
 691                         pccb->ccb_h.status = CAM_REQ_INVALID;
 692                         xpt_done(pccb);
 693                         break;
 694                 /*
 695                  * Path routing inquiry
 696                  * Path Inquiry CCB
 697                  */
 698                 case XPT_PATH_INQ: {
 699                         struct ccb_pathinq *cpi = &pccb->cpi;
 700
 701                         TRM_DPRINTF(" XPT_PATH_INQ \n");
 702                         cpi->version_num = 1;
 703                         cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
 704                         cpi->target_sprt = 0;
 705                         cpi->hba_misc = 0;
 706                         cpi->hba_eng_cnt = 0;
 707                         cpi->max_target = 15 ;
 708                         cpi->max_lun = pACB->max_lun;        /* 7 or 0 */
 709                         cpi->initiator_id = pACB->AdaptSCSIID;
 710                         cpi->bus_id = cam_sim_bus(psim);
 711                         cpi->base_transfer_speed = 3300;
 712                         strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 713                         strncpy(cpi->hba_vid, "Tekram_TRM", HBA_IDLEN);
 714                         strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
 715                         cpi->unit_number = cam_sim_unit(psim);
 716                         cpi->ccb_h.status = CAM_REQ_CMP;
 717                         xpt_done(pccb);
 718                                    }
 719                         break;
 720                 /*
 721                  * Release a frozen SIM queue
 722                  * Release SIM Queue
 723                  */
 724                 case XPT_REL_SIMQ:
 725                         TRM_DPRINTF(" XPT_REL_SIMQ \n");
 726                         pccb->ccb_h.status = CAM_REQ_INVALID;
 727                         xpt_done(pccb);
 728                         break;
 729                 /*
 730                  * Set Asynchronous Callback Parameters
 731                  * Set Asynchronous Callback CCB
 732                  */
 733                 case XPT_SASYNC_CB:
 734                         TRM_DPRINTF(" XPT_SASYNC_CB \n");
 735                         pccb->ccb_h.status = CAM_REQ_INVALID;
 736                         xpt_done(pccb);
 737                         break;
 738                 /*
 739                  * Set device type information
 740                  * Set Device Type CCB
 741                  */
 742                 case XPT_SDEV_TYPE:
 743                         TRM_DPRINTF(" XPT_SDEV_TYPE \n");
 744                         pccb->ccb_h.status = CAM_REQ_INVALID;
 745                         xpt_done(pccb);
 746                         break;
 747                 /*
 748                  * (Re)Scan the SCSI Bus
 749                  * Rescan the given bus, or bus/target/lun
 750                  */
 751                 case XPT_SCAN_BUS:
 752                         TRM_DPRINTF(" XPT_SCAN_BUS \n");
 753                         pccb->ccb_h.status = CAM_REQ_INVALID;
 754                         xpt_done(pccb);
 755                         break;
 756                 /*
 757                  * Get EDT entries matching the given pattern
 758                  */
 759                 case XPT_DEV_MATCH:
 760                         TRM_DPRINTF(" XPT_DEV_MATCH \n");
 761                         pccb->ccb_h.status = CAM_REQ_INVALID;
 762                         xpt_done(pccb);
 763                         break;
 764                 /*
 765                  * Turn on debugging for a bus, target or lun
 766                  */
 767                 case XPT_DEBUG:
 768                         TRM_DPRINTF(" XPT_DEBUG \n");
 769                         pccb->ccb_h.status = CAM_REQ_INVALID;
 770                         xpt_done(pccb);
 771                         break;
 772                         /*
 773                          * XPT_ABORT = 0x10, Abort the specified CCB
 774                          * Abort XPT request CCB
 775                          */
 776                 case XPT_ABORT:
 777                         TRM_DPRINTF(" XPT_ABORT \n");
 778                         pccb->ccb_h.status = CAM_REQ_INVALID;
 779                         xpt_done(pccb);
 780                         break;
 781                 /*
 782                  * Reset the specified SCSI bus
 783                  * Reset SCSI Bus CCB
 784                  */
 785                 case XPT_RESET_BUS: {
 786                         int i;
 787
 788                         TRM_DPRINTF(" XPT_RESET_BUS \n");
 789                         trm_reset(pACB);
 790                         pACB->ACBFlag=0;
 791                         for (i=0; i<500; i++)
 792                                 DELAY(1000);
 793                         pccb->ccb_h.status = CAM_REQ_CMP;
 794                         xpt_done(pccb);
 795                                     }
 796                         break;
 797                 /*
 798                  * Bus Device Reset the specified SCSI device
 799                  * Reset SCSI Device CCB
 800                  */
 801                 case XPT_RESET_DEV:
 802                 /*
 803                  * Don't (yet?) support vendor
 804                  * specific commands.
 805                  */
 806                         TRM_DPRINTF(" XPT_RESET_DEV \n");
 807                         pccb->ccb_h.status = CAM_REQ_INVALID;
 808                         xpt_done(pccb);
 809                         break;
 810                 /*
 811                  * Terminate the I/O process
 812                  * Terminate I/O Process Request CCB
 813                  */
 814                 case XPT_TERM_IO:
 815                         TRM_DPRINTF(" XPT_TERM_IO \n");
 816                         pccb->ccb_h.status = CAM_REQ_INVALID;
 817                         xpt_done(pccb);
 818                         break;
 819                 /*
 820                  * Scan Logical Unit
 821                  */
 822                 case XPT_SCAN_LUN:
 823                         TRM_DPRINTF(" XPT_SCAN_LUN \n");
 824                         pccb->ccb_h.status = CAM_REQ_INVALID;
 825                         xpt_done(pccb);
 826                         break;
 827
 828                 /*
 829                  * Get/Set transfer rate/width/disconnection/tag queueing
 830                  * settings
 831                  * (GET) default/user transfer settings for the target
 832                  */
 833                 case XPT_GET_TRAN_SETTINGS: {
 834                         struct  ccb_trans_settings *cts;
 835                         int     intflag;
 836                         struct  trm_transinfo *tinfo;
 837                         PDCB    pDCB;
 838
 839                         TRM_DPRINTF(" XPT_GET_TRAN_SETTINGS \n");
 840                         cts = &pccb->cts;
 841                         pDCB = &pACB->DCBarray[target_id][target_lun];
 842                         intflag = splcam();
 843                         /*
 844                          * disable interrupt
 845                          */
 846                         if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
 847                                 /* current transfer settings */
 848                                 if (pDCB->tinfo.disc_tag & TRM_CUR_DISCENB)
 849                                         cts->flags = CCB_TRANS_DISC_ENB;
 850                                 else
 851                                         cts->flags = 0;/* no tag & disconnect */
 852                                 if (pDCB->tinfo.disc_tag & TRM_CUR_TAGENB)
 853                                         cts->flags |= CCB_TRANS_TAG_ENB;
 854                                 tinfo = &pDCB->tinfo.current;
 855                                 TRM_DPRINTF("CURRENT:  cts->flags= %2x \n",
 856                                     cts->flags);
 857                         } else {
 858                           /* default(user) transfer settings */
 859                                 if (pDCB->tinfo.disc_tag & TRM_USR_DISCENB)
 860                                         cts->flags = CCB_TRANS_DISC_ENB;
 861                                 else
 862                                         cts->flags = 0;
 863                                 if (pDCB->tinfo.disc_tag & TRM_USR_TAGENB)
 864                                         cts->flags |= CCB_TRANS_TAG_ENB;
 865                                 tinfo = &pDCB->tinfo.user;
 866                                 TRM_DPRINTF("USER: cts->flags= %2x \n",
 867                                         cts->flags);
 868                         }
 869                         cts->sync_period = tinfo->period;
 870                         cts->sync_offset = tinfo->offset;
 871                         cts->bus_width   = tinfo->width;
 872                         TRM_DPRINTF("pDCB->SyncPeriod: %d  \n",
 873                                 pDCB->SyncPeriod);
 874                         TRM_DPRINTF("period: %d  \n", tinfo->period);
 875                         TRM_DPRINTF("offset: %d  \n", tinfo->offset);
 876                         TRM_DPRINTF("width: %d  \n", tinfo->width);
 877
 878                         splx(intflag);
 879                         cts->valid = CCB_TRANS_SYNC_RATE_VALID |
 880                             CCB_TRANS_SYNC_OFFSET_VALID |
 881                             CCB_TRANS_BUS_WIDTH_VALID |
 882                             CCB_TRANS_DISC_VALID |
 883                             CCB_TRANS_TQ_VALID;
 884                         pccb->ccb_h.status = CAM_REQ_CMP;
 885                         xpt_done(pccb);
 886                                             }
 887                         break;
 888                 /*
 889                  * Get/Set transfer rate/width/disconnection/tag queueing
 890                  * settings
 891                  * (Set) transfer rate/width negotiation settings
 892                  */
 893                 case XPT_SET_TRAN_SETTINGS: {
 894                         struct  ccb_trans_settings *cts;
 895                         u_int   update_type;
 896                         int     intflag;
 897                         PDCB    pDCB;
 898
 899                         TRM_DPRINTF(" XPT_SET_TRAN_SETTINGS \n");
 900                         cts = &pccb->cts;
 901                         update_type = 0;
 902                         if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
 903                                 update_type |= TRM_TRANS_GOAL;
 904                         if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
 905                                 update_type |= TRM_TRANS_USER;
 906                         intflag = splcam();
 907                         pDCB = &pACB->DCBarray[target_id][target_lun];
 908
 909                         if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
 910                           /*ccb disc enables */
 911                                 if (update_type & TRM_TRANS_GOAL) {
 912                                         if ((cts->flags & CCB_TRANS_DISC_ENB)
 913                                             != 0)
 914                                                 pDCB->tinfo.disc_tag
 915                                                     |= TRM_CUR_DISCENB;
 916                                         else
 917                                                 pDCB->tinfo.disc_tag &=
 918                                                     ~TRM_CUR_DISCENB;
 919                                 }
 920                                 if (update_type & TRM_TRANS_USER) {
 921                                         if ((cts->flags & CCB_TRANS_DISC_ENB)
 922                                             != 0)
 923                                                 pDCB->tinfo.disc_tag
 924                                                     |= TRM_USR_DISCENB;
 925                                         else
 926                                                 pDCB->tinfo.disc_tag &=
 927                                                     ~TRM_USR_DISCENB;
 928                                 }
 929                         }
 930                         if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
 931                           /* if ccb tag q active */
 932                                 if (update_type & TRM_TRANS_GOAL) {
 933                                         if ((cts->flags & CCB_TRANS_TAG_ENB)
 934                                             != 0)
 935                                                 pDCB->tinfo.disc_tag |=
 936                                                     TRM_CUR_TAGENB;
 937                                         else
 938                                                 pDCB->tinfo.disc_tag &=
 939                                                     ~TRM_CUR_TAGENB;
 940                                 }
 941                                 if (update_type & TRM_TRANS_USER) {
 942                                         if ((cts->flags & CCB_TRANS_TAG_ENB)
 943                                             != 0)
 944                                                 pDCB->tinfo.disc_tag |=
 945                                                     TRM_USR_TAGENB;
 946                                         else
 947                                                 pDCB->tinfo.disc_tag &=
 948                                                     ~TRM_USR_TAGENB;
 949                                 }
 950                         }
 951                         /* Minimum sync period factor   */
 952
 953                         if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
 954                                 /* if ccb sync active */
 955                                 /* TRM-S1040 MinSyncPeriod = 4 clocks/byte */
 956                                 if ((cts->sync_period != 0) &&
 957                                     (cts->sync_period < 125))
 958                                         cts->sync_period = 125;
 959                                 /* 1/(125*4) minsync 2 MByte/sec */
 960                                 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID)
 961                                     != 0) {
 962                                         if (cts->sync_offset == 0)
 963                                                 cts->sync_period = 0;
 964                                         /* TRM-S1040 MaxSyncOffset = 15 bytes*/
 965                                         if (cts->sync_offset > 15)
 966                                                 cts->sync_offset = 15;
 967                                 }
 968                         }
 969                         if ((update_type & TRM_TRANS_USER) != 0) {
 970                                 pDCB->tinfo.user.period = cts->sync_period;
 971                                 pDCB->tinfo.user.offset = cts->sync_offset;
 972                                 pDCB->tinfo.user.width  = cts->bus_width;
 973                         }
 974                         if ((update_type & TRM_TRANS_GOAL) != 0) {
 975                                 pDCB->tinfo.goal.period = cts->sync_period;
 976                                 pDCB->tinfo.goal.offset = cts->sync_offset;
 977                                 pDCB->tinfo.goal.width  = cts->bus_width;
 978                         }
 979                         splx(intflag);
 980                         pccb->ccb_h.status = CAM_REQ_CMP;
 981                         xpt_done(pccb);
 982                         break;
 983                                             }
 984                 /*
 985                  * Calculate the geometry parameters for a device give
 986                  * the sector size and volume size.
 987                  */
 988                 case XPT_CALC_GEOMETRY:
 989                         TRM_DPRINTF(" XPT_CALC_GEOMETRY \n");
 990                         cam_calc_geometry(&pccb->ccg, /*extended*/1);
 991                         xpt_done(pccb);
 992                         break;
 993                 case XPT_ENG_INQ:
 994                         TRM_DPRINTF(" XPT_ENG_INQ \n");
 995                         pccb->ccb_h.status = CAM_REQ_INVALID;
 996                         xpt_done(pccb);
 997                         break;
 998                 /*
 999                  * HBA execute engine request
1000                  * This structure must match SCSIIO size
1001                  */
1002                 case XPT_ENG_EXEC:
1003                         TRM_DPRINTF(" XPT_ENG_EXEC \n");
1004                         pccb->ccb_h.status = CAM_REQ_INVALID;
1005                         xpt_done(pccb);
1006                         break;
1007                 /*
1008                  * XPT_EN_LUN = 0x30, Enable LUN as a target
1009                  * Target mode structures.
1010                  */
1011                 case XPT_EN_LUN:
1012                 /*
1013                  * Don't (yet?) support vendor
1014                  * specific commands.
1015                  */
1016                         TRM_DPRINTF(" XPT_EN_LUN \n");
1017                         pccb->ccb_h.status = CAM_REQ_INVALID;
1018                         xpt_done(pccb);
1019                         break;
1020                 /*
1021                 * Execute target I/O request
1022                 */
1023                 case XPT_TARGET_IO:
1024                 /*
1025                  * Don't (yet?) support vendor
1026                  * specific commands.
1027                  */
1028                         TRM_DPRINTF(" XPT_TARGET_IO \n");
1029                         pccb->ccb_h.status = CAM_REQ_INVALID;
1030                         xpt_done(pccb);
1031                         break;
1032                 /*
1033                  * Accept Host Target Mode CDB
1034                  */
1035                 case XPT_ACCEPT_TARGET_IO:
1036                 /*
1037                  * Don't (yet?) support vendor
1038                  * specific commands.
1039                  */
1040                         TRM_DPRINTF(" XPT_ACCEPT_TARGET_IO \n");
1041                         pccb->ccb_h.status = CAM_REQ_INVALID;
1042                         xpt_done(pccb);
1043                         break;
1044                 /*
1045                  * Continue Host Target I/O Connection
1046                  */
1047                 case XPT_CONT_TARGET_IO:
1048                 /*
1049                  * Don't (yet?) support vendor
1050                  * specific commands.
1051                  */
1052                         TRM_DPRINTF(" XPT_CONT_TARGET_IO \n");
1053                         pccb->ccb_h.status = CAM_REQ_INVALID;
1054                         xpt_done(pccb);
1055                         break;
1056                 /*
1057                  * Notify Host Target driver of event
1058                  */
1059                 case XPT_IMMED_NOTIFY:
1060                         TRM_DPRINTF(" XPT_IMMED_NOTIFY \n");
1061                         pccb->ccb_h.status = CAM_REQ_INVALID;
1062                         xpt_done(pccb);
1063                         break;
1064                 /*
1065                  * Acknowledgement of event
1066                  */
1067                 case XPT_NOTIFY_ACK:
1068                         TRM_DPRINTF(" XPT_NOTIFY_ACK \n");
1069                         pccb->ccb_h.status = CAM_REQ_INVALID;
1070                         xpt_done(pccb);
1071                         break;
1072                 /*
1073                  * XPT_VUNIQUE = 0x80
1074                  */
1075                 case XPT_VUNIQUE:
1076                         pccb->ccb_h.status = CAM_REQ_INVALID;
1077                         xpt_done(pccb);
1078                         break;
1079                 default:
1080                         pccb->ccb_h.status = CAM_REQ_INVALID;
1081                         xpt_done(pccb);
1082                         break;
1083         }
1084         splx(actionflags);
1085 }
1086
1087 static void
1088 trm_poll(struct cam_sim *psim)
1089 {
1090         trm_Interrupt(cam_sim_softc(psim));
1091 }
1092
1093 static void
1094 trm_ResetDevParam(PACB pACB)
1095 {
1096         PDCB            pDCB, pdcb;
1097         PNVRAMTYPE      pEEpromBuf;
1098         u_int8_t        PeriodIndex;
1099
1100         pDCB = pACB->pLinkDCB;
1101         if (pDCB == NULL)
1102                 return;
1103         pdcb = pDCB;
1104         do {
1105                 pDCB->SyncMode  &= ~(SYNC_NEGO_DONE+ WIDE_NEGO_DONE);
1106                 pDCB->SyncPeriod = 0;
1107                 pDCB->SyncOffset = 0;
1108                 pEEpromBuf = &trm_eepromBuf[pACB->AdapterUnit];
1109                 pDCB->DevMode =
1110                   pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarCfg0;
1111                 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
1112                 PeriodIndex =
1113                    pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarPeriod & 0x07;
1114                 if (pACB->AdaptType == 1) /* is U2? */
1115                         pDCB->MaxNegoPeriod = dc395u2x_clock_period[PeriodIndex];
1116                 else
1117                         pDCB->MaxNegoPeriod = dc395x_clock_period[PeriodIndex];
1118                 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
1119                     (pACB->Config & HCC_WIDE_CARD))
1120                         pDCB->SyncMode |= WIDE_NEGO_ENABLE;
1121                 pDCB = pDCB->pNextDCB;
1122         }
1123         while (pdcb != pDCB);
1124 }
1125
1126 static void
1127 trm_RecoverSRB(PACB pACB)
1128 {
1129         PDCB            pDCB, pdcb;
1130         PSRB            psrb, psrb2;
1131         u_int16_t       cnt, i;
1132
1133         pDCB = pACB->pLinkDCB;
1134         if (pDCB == NULL)
1135                 return;
1136         pdcb = pDCB;
1137         do {
1138                 cnt = pdcb->GoingSRBCnt;
1139                 psrb = pdcb->pGoingSRB;
1140                 for (i = 0; i < cnt; i++) {
1141                         psrb2 = psrb;
1142                         psrb = psrb->pNextSRB;
1143                         if (pdcb->pWaitingSRB) {
1144                                 psrb2->pNextSRB = pdcb->pWaitingSRB;
1145                                 pdcb->pWaitingSRB = psrb2;
1146                         } else {
1147                                 pdcb->pWaitingSRB = psrb2;
1148                                 pdcb->pWaitingLastSRB = psrb2;
1149                                 psrb2->pNextSRB = NULL;
1150                         }
1151                 }
1152                 pdcb->GoingSRBCnt = 0;
1153                 pdcb->pGoingSRB = NULL;
1154                 pdcb = pdcb->pNextDCB;
1155         }
1156         while (pdcb != pDCB);
1157 }
1158
1159 static void
1160 trm_reset(PACB pACB)
1161 {
1162         int             intflag;
1163         u_int16_t       i;
1164
1165         TRM_DPRINTF("trm: RESET");
1166         intflag = splcam();
1167         trm_reg_write8(0x00, TRMREG_DMA_INTEN);
1168         trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
1169
1170         trm_ResetSCSIBus(pACB);
1171         for (i = 0; i < 500; i++)
1172                 DELAY(1000);
1173         trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
1174         /* Enable DMA interrupt */
1175         trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
1176         /* Clear DMA FIFO */
1177         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1178         /* Clear SCSI FIFO */
1179         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1180         trm_ResetDevParam(pACB);
1181         trm_DoingSRB_Done(pACB);
1182         pACB->pActiveDCB = NULL;
1183         pACB->ACBFlag = 0;/* RESET_DETECT, RESET_DONE ,RESET_DEV */
1184         trm_DoWaitingSRB(pACB);
1185         /* Tell the XPT layer that a bus reset occured    */
1186         if (pACB->ppath != NULL)
1187                 xpt_async(AC_BUS_RESET, pACB->ppath, NULL);
1188         splx(intflag);
1189         return;
1190 }
1191
1192 static u_int16_t
1193 trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB)
1194 {
1195         u_int16_t       return_code;
1196         u_int8_t        scsicommand, i,command,identify_message;
1197         u_int8_t *      ptr;
1198         union  ccb      *pccb;
1199         struct ccb_scsiio *pcsio;
1200
1201         pccb  = pSRB->pccb;
1202         pcsio = &pccb->csio;
1203
1204         trm_reg_write8(pACB->AdaptSCSIID, TRMREG_SCSI_HOSTID);
1205         trm_reg_write8(pDCB->TargetID, TRMREG_SCSI_TARGETID);
1206         trm_reg_write8(pDCB->SyncPeriod, TRMREG_SCSI_SYNC);
1207         trm_reg_write8(pDCB->SyncOffset, TRMREG_SCSI_OFFSET);
1208         pSRB->ScsiPhase = PH_BUS_FREE;/* initial phase */
1209         /* Flush FIFO */
1210         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1211
1212         identify_message = pDCB->IdentifyMsg;
1213
1214         if ((pSRB->CmdBlock[0] == INQUIRY) ||
1215             (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1216             (pSRB->SRBFlag & AUTO_REQSENSE)) {
1217                 if (((pDCB->SyncMode & WIDE_NEGO_ENABLE) &&
1218                       !(pDCB->SyncMode & WIDE_NEGO_DONE))
1219                 || ((pDCB->SyncMode & SYNC_NEGO_ENABLE) &&
1220                   !(pDCB->SyncMode & SYNC_NEGO_DONE))) {
1221                         if (!(pDCB->IdentifyMsg & 7) ||
1222                             (pSRB->CmdBlock[0] != INQUIRY)) {
1223                                 scsicommand = SCMD_SEL_ATNSTOP;
1224                                 pSRB->SRBState = SRB_MSGOUT;
1225                                 goto polling;
1226                         }
1227                 }
1228         /*
1229         * Send identify message
1230         */
1231                 trm_reg_write8((identify_message & 0xBF) ,TRMREG_SCSI_FIFO);
1232                 scsicommand = SCMD_SEL_ATN;
1233                 pSRB->SRBState = SRB_START_;
1234         } else {
1235                 /* not inquiry,request sense,auto request sense */
1236                 /*
1237                  * Send identify message
1238                  */
1239                 trm_reg_write8(identify_message,TRMREG_SCSI_FIFO);
1240                 scsicommand = SCMD_SEL_ATN;
1241                 pSRB->SRBState = SRB_START_;
1242                 if (pDCB->SyncMode & EN_TAG_QUEUING) {
1243                   /* Send Tag message */
1244                         trm_reg_write8(MSG_SIMPLE_QTAG, TRMREG_SCSI_FIFO);
1245                         trm_reg_write8(pSRB->TagNumber, TRMREG_SCSI_FIFO);
1246                         scsicommand = SCMD_SEL_ATN3;
1247                 }
1248         }
1249 polling:
1250         /*
1251          *       Send CDB ..command block .........
1252          */
1253         if (pSRB->SRBFlag & AUTO_REQSENSE) {
1254                 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1255                 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1256                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1257                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1258                 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1259                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1260         } else {
1261                 ptr = (u_int8_t *) pSRB->CmdBlock;
1262                 for (i = 0; i < pSRB->ScsiCmdLen ; i++) {
1263                         command = *ptr++;
1264                         trm_reg_write8(command,TRMREG_SCSI_FIFO);
1265                 }
1266         }
1267         if (trm_reg_read16(TRMREG_SCSI_STATUS) & SCSIINTERRUPT) {
1268             /*
1269              * If trm_StartSCSI return 1 :
1270              * current interrupt status is interrupt disreenable
1271              * It's said that SCSI processor has more one SRB need to do,
1272              * SCSI processor has been occupied by one SRB.
1273              */
1274                 pSRB->SRBState = SRB_READY;
1275                 return_code = 1;
1276         } else {
1277           /*
1278            * If trm_StartSCSI return 0 :
1279            * current interrupt status is interrupt enable
1280            * It's said that SCSI processor is unoccupied
1281            */
1282                 pSRB->ScsiPhase  = SCSI_NOP1; /* SCSI bus free Phase */
1283                 pACB->pActiveDCB = pDCB;
1284                 pDCB->pActiveSRB = pSRB;
1285                 return_code = 0;
1286                 trm_reg_write16(DO_DATALATCH | DO_HWRESELECT,
1287                     TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
1288                 /*
1289                  * SCSI cammand
1290                  */
1291                 trm_reg_write8(scsicommand,TRMREG_SCSI_COMMAND);
1292         }
1293         return (return_code);
1294 }
1295
1296 static void
1297 trm_Interrupt(vpACB)
1298 void *vpACB;
1299 {
1300         PACB            pACB;
1301         PDCB            pDCB;
1302         PSRB            pSRB;
1303         u_int16_t       phase;
1304         void            (*stateV)(PACB, PSRB, u_int16_t *);
1305         u_int16_t       scsi_status=0;
1306         u_int8_t        scsi_intstatus;
1307
1308         pACB = vpACB;
1309
1310         scsi_status = trm_reg_read16(TRMREG_SCSI_STATUS);
1311         if (!(scsi_status & SCSIINTERRUPT)) {
1312                 TRM_DPRINTF("trm_Interrupt: TRMREG_SCSI_STATUS scsi_status = NULL ,return......");
1313                 return;
1314         }
1315         TRM_DPRINTF("scsi_status=%2x,",scsi_status);
1316
1317         scsi_intstatus = trm_reg_read8(TRMREG_SCSI_INTSTATUS);
1318
1319         TRM_DPRINTF("scsi_intstatus=%2x,",scsi_intstatus);
1320
1321         if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
1322                 trm_Disconnect(pACB);
1323                 return;
1324         }
1325
1326         if (scsi_intstatus & INT_RESELECTED) {
1327                 trm_Reselect(pACB);
1328                 return;
1329         }
1330         if (scsi_intstatus & INT_SCSIRESET) {
1331                 trm_ScsiRstDetect(pACB);
1332                 return;
1333         }
1334
1335         if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
1336                 pDCB = pACB->pActiveDCB;
1337                 KASSERT(pDCB != NULL, ("no active DCB"));
1338                 pSRB = pDCB->pActiveSRB;
1339                 if (pDCB->DCBFlag & ABORT_DEV_)
1340                                 trm_EnableMsgOutAbort1(pACB, pSRB);
1341                 phase = (u_int16_t) pSRB->ScsiPhase;  /* phase: */
1342                 stateV = (void *) trm_SCSI_phase0[phase];
1343                 stateV(pACB, pSRB, &scsi_status);
1344                 pSRB->ScsiPhase = scsi_status & PHASEMASK;
1345                 /* phase:0,1,2,3,4,5,6,7 */
1346                 phase = (u_int16_t) scsi_status & PHASEMASK;
1347                 stateV = (void *) trm_SCSI_phase1[phase];
1348                 stateV(pACB, pSRB, &scsi_status);
1349         }
1350 }
1351
1352 static void
1353 trm_MsgOutPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1354 {
1355
1356         if (pSRB->SRBState & (SRB_UNEXPECT_RESEL+SRB_ABORT_SENT))
1357                 *pscsi_status = PH_BUS_FREE;
1358         /*.. initial phase*/
1359 }
1360
1361 static void
1362 trm_MsgOutPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1363 {
1364         u_int8_t        bval;
1365         u_int16_t       i, cnt;
1366         u_int8_t *      ptr;
1367         PDCB            pDCB;
1368
1369         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1370         pDCB = pACB->pActiveDCB;
1371         if (!(pSRB->SRBState & SRB_MSGOUT)) {
1372                 cnt = pSRB->MsgCnt;
1373                 if (cnt) {
1374                         ptr = (u_int8_t *) pSRB->MsgOutBuf;
1375                         for (i = 0; i < cnt; i++) {
1376                                 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1377                                 ptr++;
1378                         }
1379                         pSRB->MsgCnt = 0;
1380                         if ((pDCB->DCBFlag & ABORT_DEV_) &&
1381                             (pSRB->MsgOutBuf[0] == MSG_ABORT)) {
1382                                 pSRB->SRBState = SRB_ABORT_SENT;
1383                         }
1384                 } else {
1385                         bval = MSG_ABORT;
1386                         if ((pSRB->CmdBlock[0] == INQUIRY) ||
1387                                         (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1388                                         (pSRB->SRBFlag & AUTO_REQSENSE)) {
1389                                 if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1390                                         goto  mop1;
1391                                 }
1392                         }
1393                         trm_reg_write8(bval, TRMREG_SCSI_FIFO);
1394                 }
1395         } else {
1396 mop1:   /* message out phase */
1397                 if (!(pSRB->SRBState & SRB_DO_WIDE_NEGO)
1398                     && (pDCB->SyncMode & WIDE_NEGO_ENABLE)) {
1399                   /*
1400                    * WIDE DATA TRANSFER REQUEST code (03h)
1401                    */
1402                         pDCB->SyncMode &= ~(SYNC_NEGO_DONE | EN_ATN_STOP);
1403                         trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1404                             TRMREG_SCSI_FIFO);
1405                         trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1406                         /* (01h) */
1407                         trm_reg_write8(2,TRMREG_SCSI_FIFO);
1408                         /* Message length (02h) */
1409                         trm_reg_write8(3,TRMREG_SCSI_FIFO);
1410                         /* wide data xfer (03h) */
1411                         trm_reg_write8(1,TRMREG_SCSI_FIFO);
1412                         /* width:0(8bit),1(16bit),2(32bit) */
1413                         pSRB->SRBState |= SRB_DO_WIDE_NEGO;
1414                 } else if (!(pSRB->SRBState & SRB_DO_SYNC_NEGO)
1415                     && (pDCB->SyncMode & SYNC_NEGO_ENABLE)) {
1416                   /*
1417                    * SYNCHRONOUS DATA TRANSFER REQUEST code (01h)
1418                    */
1419                         if (!(pDCB->SyncMode & WIDE_NEGO_DONE))
1420                                 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1421                                                 TRMREG_SCSI_FIFO);
1422                         trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1423                   /* (01h) */
1424                         trm_reg_write8(3,TRMREG_SCSI_FIFO);
1425                   /* Message length (03h) */
1426                         trm_reg_write8(1,TRMREG_SCSI_FIFO);
1427                   /* SYNCHRONOUS DATA TRANSFER REQUEST code (01h) */
1428                         trm_reg_write8(pDCB->MaxNegoPeriod,TRMREG_SCSI_FIFO);
1429                   /* Transfer peeriod factor */
1430                         trm_reg_write8((pACB->AdaptType == 1) ? 31 : 15,
1431                             TRMREG_SCSI_FIFO);
1432                   /* REQ/ACK offset */
1433                         pSRB->SRBState |= SRB_DO_SYNC_NEGO;
1434                 }
1435         }
1436         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1437         /* it's important for atn stop */
1438         /*
1439          * SCSI cammand
1440          */
1441         trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1442 }
1443
1444 static void
1445 trm_CommandPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1446 {
1447
1448 }
1449
1450 static void
1451 trm_CommandPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1452 {
1453         PDCB                    pDCB;
1454         u_int8_t *              ptr;
1455         u_int16_t               i, cnt;
1456         union  ccb              *pccb;
1457         struct ccb_scsiio       *pcsio;
1458
1459         pccb  = pSRB->pccb;
1460         pcsio = &pccb->csio;
1461
1462         trm_reg_write16(DO_CLRATN | DO_CLRFIFO , TRMREG_SCSI_CONTROL);
1463         if (!(pSRB->SRBFlag & AUTO_REQSENSE)) {
1464                 cnt = (u_int16_t) pSRB->ScsiCmdLen;
1465                 ptr = (u_int8_t *) pSRB->CmdBlock;
1466                 for (i = 0; i < cnt; i++) {
1467                         trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1468                         ptr++;
1469                 }
1470         } else {
1471                 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1472                 pDCB = pACB->pActiveDCB;
1473                 /* target id */
1474                 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1475                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1476                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1477                 /* sizeof(struct scsi_sense_data) */
1478                 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1479                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1480         }
1481         pSRB->SRBState = SRB_COMMAND;
1482         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1483         /* it's important for atn stop*/
1484         /*
1485          * SCSI cammand
1486          */
1487         trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1488 }
1489
1490 static void
1491 trm_DataOutPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1492 {
1493         PDCB            pDCB;
1494         u_int8_t        TempDMAstatus,SGIndexTemp;
1495         u_int16_t       scsi_status;
1496         PSEG            pseg;
1497         u_long          TempSRBXferredLength,dLeftCounter=0;
1498
1499         pDCB = pSRB->pSRBDCB;
1500         scsi_status = *pscsi_status;
1501
1502         if (!(pSRB->SRBState & SRB_XFERPAD)) {
1503                 if (scsi_status & PARITYERROR)
1504                         pSRB->SRBStatus |= PARITY_ERROR;
1505                 if (!(scsi_status & SCSIXFERDONE)) {
1506                   /*
1507                    * when data transfer from DMA FIFO to SCSI FIFO
1508                    * if there was some data left in SCSI FIFO
1509                    */
1510                         dLeftCounter = (u_long)
1511                           (trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x3F);
1512                         if (pDCB->SyncPeriod & WIDE_SYNC) {
1513                           /*
1514                            * if WIDE scsi SCSI FIFOCNT unit is word
1515                            * so need to * 2
1516                            */
1517                                 dLeftCounter <<= 1;
1518                         }
1519                 }
1520                 /*
1521                  * caculate all the residue data that not yet tranfered
1522                  * SCSI transfer counter + left in SCSI FIFO data
1523                  *
1524                  * .....TRM_SCSI_COUNTER (24bits)
1525                  * The counter always decrement by one for every SCSI byte
1526                  *transfer.
1527                  * .....TRM_SCSI_FIFOCNT (5bits)
1528                  * The counter is SCSI FIFO offset counter
1529                  */
1530                 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1531                 if (dLeftCounter == 1) {
1532                         dLeftCounter = 0;
1533                         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1534                 }
1535                 if ((dLeftCounter == 0) ||
1536                     (scsi_status & SCSIXFERCNT_2_ZERO)) {
1537                         TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1538                         while (!(TempDMAstatus & DMAXFERCOMP)) {
1539                                 TempDMAstatus =
1540                                   trm_reg_read8(TRMREG_DMA_STATUS);
1541                         }
1542                         pSRB->SRBTotalXferLength = 0;
1543                 } else {
1544                   /* Update SG list             */
1545                   /*
1546                    * if transfer not yet complete
1547                    * there were some data residue in SCSI FIFO or
1548                    * SCSI transfer counter not empty
1549                    */
1550                         if (pSRB->SRBTotalXferLength != dLeftCounter) {
1551                           /*
1552                            * data that had transferred length
1553                            */
1554                                 TempSRBXferredLength =
1555                                   pSRB->SRBTotalXferLength - dLeftCounter;
1556                                 /*
1557                                  * next time to be transferred length
1558                                  */
1559                                 pSRB->SRBTotalXferLength = dLeftCounter;
1560                                 /*
1561                                  * parsing from last time disconnect SRBSGIndex
1562                                  */
1563                                 pseg =
1564                                   pSRB->pSRBSGL + pSRB->SRBSGIndex;
1565                                 for (SGIndexTemp = pSRB->SRBSGIndex;
1566                                     SGIndexTemp < pSRB->SRBSGCount;
1567                                     SGIndexTemp++) {
1568                                         /*
1569                                          * find last time which SG transfer be
1570                                          * disconnect
1571                                          */
1572                                         if (TempSRBXferredLength >=
1573                                             pseg->length)
1574                                                 TempSRBXferredLength -=
1575                                                   pseg->length;
1576                                         else {
1577                                           /*
1578                                            * update last time disconnected SG
1579                                            * list
1580                                            */
1581                                                 pseg->length -=
1582                                                   TempSRBXferredLength;
1583                                                 /* residue data length  */
1584                                                 pseg->address +=
1585                                                   TempSRBXferredLength;
1586                                                 /* residue data pointer */
1587                                                 pSRB->SRBSGIndex = SGIndexTemp;
1588                                                 break;
1589                                         }
1590                                         pseg++;
1591                                 }
1592                         }
1593                 }
1594         }
1595         trm_reg_write8(STOPDMAXFER ,TRMREG_DMA_CONTROL);
1596 }
1597
1598
1599 static void
1600 trm_DataOutPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1601 {
1602         u_int16_t       ioDir;
1603         /*
1604          * do prepare befor transfer when data out phase
1605          */
1606
1607         ioDir = XFERDATAOUT;
1608         trm_DataIO_transfer(pACB, pSRB, ioDir);
1609 }
1610
1611 static void
1612 trm_DataInPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1613 {
1614         u_int8_t        TempDMAstatus, SGIndexTemp;
1615         u_int16_t       scsi_status;
1616         PSEG            pseg;
1617         u_long          TempSRBXferredLength,dLeftCounter = 0;
1618
1619         scsi_status = *pscsi_status;
1620         if (!(pSRB->SRBState & SRB_XFERPAD)) {
1621                 if (scsi_status & PARITYERROR)
1622                         pSRB->SRBStatus |= PARITY_ERROR;
1623                 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1624                 if ((dLeftCounter == 0) || (scsi_status & SCSIXFERCNT_2_ZERO)) {
1625                         TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1626                         while (!(TempDMAstatus & DMAXFERCOMP))
1627                                 TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1628                         pSRB->SRBTotalXferLength = 0;
1629                 } else {
1630                   /*
1631                    * parsing the case:
1632                    * when a transfer not yet complete
1633                    * but be disconnected by uper layer
1634                    * if transfer not yet complete
1635                    * there were some data residue in SCSI FIFO or
1636                    * SCSI transfer counter not empty
1637                    */
1638                   if (pSRB->SRBTotalXferLength != dLeftCounter) {
1639                                 /*
1640                                  * data that had transferred length
1641                                  */
1642                         TempSRBXferredLength =
1643                           pSRB->SRBTotalXferLength - dLeftCounter;
1644                                 /*
1645                                  * next time to be transferred length
1646                                  */
1647                         pSRB->SRBTotalXferLength = dLeftCounter;
1648                                 /*
1649                                  * parsing from last time disconnect SRBSGIndex
1650                                  */
1651                         pseg = pSRB->pSRBSGL + pSRB->SRBSGIndex;
1652                         for (SGIndexTemp = pSRB->SRBSGIndex;
1653                             SGIndexTemp < pSRB->SRBSGCount;
1654                             SGIndexTemp++) {
1655                           /*
1656                            * find last time which SG transfer be disconnect
1657                            */
1658                                 if (TempSRBXferredLength >= pseg->length)
1659                                         TempSRBXferredLength -= pseg->length;
1660                                 else {
1661                                   /*
1662                                    * update last time disconnected SG list
1663                                    */
1664                                         pseg->length -= TempSRBXferredLength;
1665                                         /* residue data length  */
1666                                         pseg->address += TempSRBXferredLength;
1667                                         /* residue data pointer */
1668                                         pSRB->SRBSGIndex = SGIndexTemp;
1669                                         break;
1670                                 }
1671                                 pseg++;
1672                         }
1673                   }
1674                 }
1675         }
1676 }
1677
1678 static void
1679 trm_DataInPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1680 {
1681         u_int16_t       ioDir;
1682         /*
1683          * do prepare befor transfer when data in phase
1684          */
1685
1686         ioDir = XFERDATAIN;
1687         trm_DataIO_transfer(pACB, pSRB, ioDir);
1688 }
1689
1690 static void
1691 trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir)
1692 {
1693         u_int8_t        bval;
1694         PDCB            pDCB;
1695
1696         pDCB = pSRB->pSRBDCB;
1697         if (pSRB->SRBSGIndex < pSRB->SRBSGCount) {
1698                 if (pSRB->SRBTotalXferLength != 0) {
1699                         /*
1700                          * load what physical address of Scatter/Gather list
1701                          table want to be transfer
1702                          */
1703                         TRM_DPRINTF(" SG->address=%8x \n",pSRB->pSRBSGL->address);
1704                         TRM_DPRINTF(" SG->length=%8x \n",pSRB->pSRBSGL->length);
1705                         TRM_DPRINTF(" pDCB->SyncPeriod=%x \n",pDCB->SyncPeriod);
1706                         TRM_DPRINTF(" pSRB->pSRBSGL=%8x \n",(unsigned int)pSRB->pSRBSGL);
1707                         TRM_DPRINTF(" pSRB->SRBSGPhyAddr=%8x \n",pSRB->SRBSGPhyAddr);
1708                         TRM_DPRINTF(" pSRB->SRBSGIndex=%d \n",pSRB->SRBSGIndex);
1709                         TRM_DPRINTF(" pSRB->SRBSGCount=%d \n",pSRB->SRBSGCount);
1710                         TRM_DPRINTF(" pSRB->SRBTotalXferLength=%d \n",pSRB->SRBTotalXferLength);
1711
1712                         pSRB->SRBState = SRB_DATA_XFER;
1713                         trm_reg_write32(0, TRMREG_DMA_XHIGHADDR);
1714                         trm_reg_write32(
1715                             (pSRB->SRBSGPhyAddr +
1716                              ((u_long)pSRB->SRBSGIndex << 3)),
1717                             TRMREG_DMA_XLOWADDR);
1718                         /*
1719                          * load how many bytes in the Scatter/Gather
1720                          * list table
1721                          */
1722                         trm_reg_write32(
1723                             ((u_long)(pSRB->SRBSGCount - pSRB->SRBSGIndex) << 3),
1724                             TRMREG_DMA_XCNT);
1725                         /*
1726                          * load total transfer length (24bits) max value
1727                          * 16Mbyte
1728                          */
1729                         trm_reg_write32(pSRB->SRBTotalXferLength,
1730                             TRMREG_SCSI_COUNTER);
1731                         /* Start DMA transfer */
1732                         trm_reg_write16(ioDir, TRMREG_DMA_COMMAND);
1733                         /* Start SCSI transfer */
1734                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1735                         /* it's important for atn stop */
1736                         /*
1737                          * SCSI cammand
1738                          */
1739                         bval = (ioDir == XFERDATAOUT) ?
1740                           SCMD_DMA_OUT : SCMD_DMA_IN;
1741                         trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1742                 } else {
1743                   /* xfer pad */
1744                         if (pSRB->SRBSGCount) {
1745                                 pSRB->AdaptStatus = H_OVER_UNDER_RUN;
1746                                 pSRB->SRBStatus |= OVER_RUN;
1747                         }
1748                         if (pDCB->SyncPeriod & WIDE_SYNC)
1749                                 trm_reg_write32(2,TRMREG_SCSI_COUNTER);
1750                         else
1751                                 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
1752                         if (ioDir == XFERDATAOUT)
1753                                 trm_reg_write16(0, TRMREG_SCSI_FIFO);
1754                         else
1755                                 trm_reg_read16(TRMREG_SCSI_FIFO);
1756                         pSRB->SRBState |= SRB_XFERPAD;
1757                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1758                         /* it's important for atn stop */
1759                         /*
1760                          * SCSI cammand
1761                          */
1762                         bval = (ioDir == XFERDATAOUT) ?
1763                           SCMD_FIFO_OUT : SCMD_FIFO_IN;
1764                         trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1765                 }
1766         }
1767 }
1768
1769 static void
1770 trm_StatusPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1771 {
1772
1773         pSRB->TargetStatus = trm_reg_read8(TRMREG_SCSI_FIFO);
1774         pSRB->SRBState = SRB_COMPLETED;
1775         *pscsi_status = PH_BUS_FREE;
1776         /*.. initial phase*/
1777         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1778         /* it's important for atn stop */
1779         /*
1780          * SCSI cammand
1781          */
1782         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1783 }
1784
1785
1786
1787 static void
1788 trm_StatusPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1789 {
1790
1791         if (trm_reg_read16(TRMREG_DMA_COMMAND) & 0x0001) {
1792                 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1793                         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1794                 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1795                         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1796         } else {
1797                 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1798                         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1799                 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1800                         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1801         }
1802         pSRB->SRBState = SRB_STATUS;
1803         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1804         /* it's important for atn stop */
1805         /*
1806          * SCSI cammand
1807          */
1808         trm_reg_write8(SCMD_COMP, TRMREG_SCSI_COMMAND);
1809 }
1810
1811 /*
1812  *scsiiom
1813  *       trm_MsgInPhase0: one of trm_SCSI_phase0[] vectors
1814  *            stateV = (void *) trm_SCSI_phase0[phase]
1815  *                         if phase =7
1816  * extended message codes:
1817  *
1818  *   code        description
1819  *
1820  *    02h        Reserved
1821  *    00h        MODIFY DATA  POINTER
1822  *    01h        SYNCHRONOUS DATA TRANSFER REQUEST
1823  *    03h        WIDE DATA TRANSFER REQUEST
1824  * 04h - 7Fh     Reserved
1825  * 80h - FFh     Vendor specific
1826  *
1827  */
1828
1829 static void
1830 trm_MsgInPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1831 {
1832         u_int8_t        message_in_code,bIndex,message_in_tag_id;
1833         PDCB            pDCB;
1834         PSRB            pSRBTemp;
1835
1836         pDCB = pACB->pActiveDCB;
1837
1838         message_in_code = trm_reg_read8(TRMREG_SCSI_FIFO);
1839         if (!(pSRB->SRBState & SRB_EXTEND_MSGIN)) {
1840                 if (message_in_code == MSG_DISCONNECT) {
1841                         pSRB->SRBState = SRB_DISCONNECT;
1842                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1843                         /* it's important for atn stop */
1844                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1845                         /*
1846                          * SCSI command
1847                          */
1848                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1849                         return;
1850                 } else if (message_in_code == MSG_SAVE_PTR) {
1851                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1852                         /* it's important for atn stop */
1853                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1854                         /*
1855                          * SCSI command
1856                          */
1857                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1858                         return;
1859                 } else if ((message_in_code == MSG_EXTENDED) ||
1860                     ((message_in_code >= MSG_SIMPLE_QTAG) &&
1861                      (message_in_code <= MSG_ORDER_QTAG))) {
1862                         pSRB->SRBState |= SRB_EXTEND_MSGIN;
1863                         pSRB->MsgInBuf[0] = message_in_code;
1864                         /* extended message      (01h) */
1865                         pSRB->MsgCnt = 1;
1866                         pSRB->pMsgPtr = &pSRB->MsgInBuf[1];
1867                         /* extended message length (n) */
1868                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1869                         /* it's important for atn stop */
1870                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1871                         /*
1872                          * SCSI command
1873                          */
1874                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1875                         return;
1876                 } else if (message_in_code == MSG_REJECT_) {
1877                         /* Reject message */
1878                         if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1879                           /* do wide nego reject */
1880                                 pDCB = pSRB->pSRBDCB;
1881                                 pDCB->SyncMode |= WIDE_NEGO_DONE;
1882                                 pDCB->SyncMode &= ~(SYNC_NEGO_DONE |
1883                                     EN_ATN_STOP | WIDE_NEGO_ENABLE);
1884                                 pSRB->SRBState &= ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1885                                 if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
1886                                     && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
1887                                   /* Set ATN, in case ATN was clear */
1888                                         pSRB->SRBState |= SRB_MSGOUT;
1889                                         trm_reg_write16(
1890                                             DO_SETATN,
1891                                             TRMREG_SCSI_CONTROL);
1892                                 } else {
1893                                   /* Clear ATN */
1894                                         trm_reg_write16(
1895                                             DO_CLRATN,
1896                                             TRMREG_SCSI_CONTROL);
1897                                 }
1898                         } else if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1899                           /* do sync nego reject */
1900                                 trm_reg_write16(DO_CLRATN,TRMREG_SCSI_CONTROL);
1901                                 if (pSRB->SRBState & SRB_DO_SYNC_NEGO) {
1902                                         pDCB = pSRB->pSRBDCB;
1903                                         pDCB->SyncMode &=
1904                                           ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
1905                                         pDCB->SyncPeriod = 0;
1906                                         pDCB->SyncOffset = 0;
1907                                         /*
1908                                          *
1909                                          *   program SCSI control register
1910                                          *
1911                                          */
1912                                         trm_reg_write8(pDCB->SyncPeriod,
1913                                             TRMREG_SCSI_SYNC);
1914                                         trm_reg_write8(pDCB->SyncOffset,
1915                                             TRMREG_SCSI_OFFSET);
1916                                         trm_SetXferRate(pACB,pSRB,pDCB);
1917                                 }
1918                         }
1919                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1920                         /* it's important for atn stop */
1921                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1922                         /*
1923                          * SCSI command
1924                          */
1925                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1926                         return;
1927                 } else if (message_in_code == MSG_IGNOREWIDE) {
1928                         trm_reg_write32(1, TRMREG_SCSI_COUNTER);
1929                         trm_reg_read8(TRMREG_SCSI_FIFO);
1930                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1931                         /* it's important for atn stop */
1932                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1933                         /*
1934                          * SCSI command
1935                          */
1936                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1937                         return;
1938                 } else {
1939                   /* Restore data pointer message */
1940                   /* Save data pointer message    */
1941                   /* Completion message           */
1942                   /* NOP message                  */
1943                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1944                         /* it's important for atn stop */
1945                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1946                         /*
1947                          * SCSI command
1948                          */
1949                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1950                         return;
1951                 }
1952         } else {
1953           /*
1954            * Parsing incomming extented messages
1955            */
1956                 *pSRB->pMsgPtr = message_in_code;
1957                 pSRB->MsgCnt++;
1958                 pSRB->pMsgPtr++;
1959                 TRM_DPRINTF("pSRB->MsgInBuf[0]=%2x \n ",pSRB->MsgInBuf[0]);
1960                 TRM_DPRINTF("pSRB->MsgInBuf[1]=%2x \n ",pSRB->MsgInBuf[1]);
1961                 TRM_DPRINTF("pSRB->MsgInBuf[2]=%2x \n ",pSRB->MsgInBuf[2]);
1962                 TRM_DPRINTF("pSRB->MsgInBuf[3]=%2x \n ",pSRB->MsgInBuf[3]);
1963                 TRM_DPRINTF("pSRB->MsgInBuf[4]=%2x \n ",pSRB->MsgInBuf[4]);
1964                 if ((pSRB->MsgInBuf[0] >= MSG_SIMPLE_QTAG)
1965                     && (pSRB->MsgInBuf[0] <= MSG_ORDER_QTAG)) {
1966                   /*
1967                    * is QUEUE tag message :
1968                    *
1969                    * byte 0:
1970                    * HEAD    QUEUE TAG (20h)
1971                    * ORDERED QUEUE TAG (21h)
1972                    * SIMPLE  QUEUE TAG (22h)
1973                    * byte 1:
1974                    * Queue tag (00h - FFh)
1975                    */
1976                         if (pSRB->MsgCnt == 2) {
1977                                 pSRB->SRBState = 0;
1978                                 message_in_tag_id = pSRB->MsgInBuf[1];
1979                                 pSRB = pDCB->pGoingSRB;
1980                                 pSRBTemp = pDCB->pGoingLastSRB;
1981                                 if (pSRB) {
1982                                         for (;;) {
1983                                                 if (pSRB->TagNumber !=
1984                                                     message_in_tag_id) {
1985                                                         if (pSRB == pSRBTemp) {
1986                                                                 goto  mingx0;
1987                                                         }
1988                                                         pSRB = pSRB->pNextSRB;
1989                                                 } else
1990                                                         break;
1991                                         }
1992                                         if (pDCB->DCBFlag & ABORT_DEV_) {
1993                                                 pSRB->SRBState = SRB_ABORT_SENT;
1994                                                 trm_EnableMsgOutAbort1(
1995                                                     pACB, pSRB);
1996                                         }
1997                                         if (!(pSRB->SRBState & SRB_DISCONNECT)) {
1998                                                 TRM_DPRINTF("SRB not yet disconnect........ \n ");
1999                                                 goto  mingx0;
2000                                         }
2001                                         pDCB->pActiveSRB = pSRB;
2002                                         pSRB->SRBState = SRB_DATA_XFER;
2003                                 } else {
2004 mingx0:
2005                                         pSRB = &pACB->TmpSRB;
2006                                         pSRB->SRBState = SRB_UNEXPECT_RESEL;
2007                                         pDCB->pActiveSRB = pSRB;
2008                                         pSRB->MsgOutBuf[0] = MSG_ABORT_TAG;
2009                                         trm_EnableMsgOutAbort2(
2010                                             pACB,
2011                                             pSRB);
2012                                 }
2013                         }
2014                         *pscsi_status = PH_BUS_FREE;
2015                         /* .. initial phase */
2016                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2017                         /* it's important for atn stop */
2018                         /*
2019                          * SCSI command
2020                          */
2021                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2022                         return;
2023                 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2024                     (pSRB->MsgInBuf[2] == 3) && (pSRB->MsgCnt == 4)) {
2025                   /*
2026                    * is Wide data xfer Extended message :
2027                    * ======================================
2028                    * WIDE DATA TRANSFER REQUEST
2029                    * ======================================
2030                    * byte 0 :  Extended message (01h)
2031                    * byte 1 :  Extended message length (02h)
2032                    * byte 2 :  WIDE DATA TRANSFER code (03h)
2033                    * byte 3 :  Transfer width exponent
2034                    */
2035                         pDCB = pSRB->pSRBDCB;
2036                         pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_WIDE_NEGO);
2037                         if ((pSRB->MsgInBuf[1] != 2)) {
2038                           /* Length is wrong, reject it  */
2039                                 pDCB->SyncMode &=
2040                                   ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
2041                                 pSRB->MsgCnt = 1;
2042                                 pSRB->MsgInBuf[0] = MSG_REJECT_;
2043                                 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2044                                 *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2045                                 /* it's important for atn stop */
2046                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2047                                 /*
2048                                  * SCSI command
2049                                  */
2050                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2051                                 return;
2052                         }
2053                         if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
2054                           /* Do wide negoniation */
2055                                 if (pSRB->MsgInBuf[3] > 2) {
2056                                   /* > 32 bit   */
2057                                   /* reject_msg: */
2058                                         pDCB->SyncMode &=
2059                                           ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
2060                                         pSRB->MsgCnt = 1;
2061                                         pSRB->MsgInBuf[0] = MSG_REJECT_;
2062                                         trm_reg_write16(DO_SETATN,
2063                                             TRMREG_SCSI_CONTROL);
2064                                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2065                                         /* it's important for atn stop */
2066                                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2067                                         /*
2068                                          * SCSI command
2069                                          */
2070                                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2071                                         return;
2072                                 }
2073                                 if (pSRB->MsgInBuf[3] == 2) {
2074                                         pSRB->MsgInBuf[3] = 1;
2075                                         /* do 16 bits   */
2076                                 } else {
2077                                         if (!(pDCB->SyncMode
2078                                               & WIDE_NEGO_DONE)) {
2079                                                 pSRB->SRBState &=
2080                                                   ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
2081                                                 pDCB->SyncMode |=
2082                                                   WIDE_NEGO_DONE;
2083                                                 pDCB->SyncMode &=
2084                                                   ~(SYNC_NEGO_DONE |
2085                                                       EN_ATN_STOP |
2086                                                       WIDE_NEGO_ENABLE);
2087                                                 if (pSRB->MsgInBuf[3] != 0) {
2088                                                   /* is Wide data xfer */
2089                                                         pDCB->SyncPeriod |=
2090                                                           WIDE_SYNC;
2091                                                         pDCB->tinfo.current.width
2092                                                           = MSG_EXT_WDTR_BUS_16_BIT;
2093                                                         pDCB->tinfo.goal.width
2094                                                           = MSG_EXT_WDTR_BUS_16_BIT;
2095                                                 }
2096                                         }
2097                                 }
2098                         } else
2099                                 pSRB->MsgInBuf[3] = 0;
2100                         pSRB->SRBState |= SRB_MSGOUT;
2101                         trm_reg_write16(DO_SETATN,TRMREG_SCSI_CONTROL);
2102                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2103                         /* it's important for atn stop */
2104                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2105                         /*
2106                          * SCSI command
2107                          */
2108                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2109                         return;
2110                 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2111                     (pSRB->MsgInBuf[2] == 1) && (pSRB->MsgCnt == 5)) {
2112                         /*
2113                          * is 8bit transfer Extended message :
2114                          * =================================
2115                          * SYNCHRONOUS DATA TRANSFER REQUEST
2116                          * =================================
2117                          * byte 0 :  Extended message (01h)
2118                          * byte 1 :  Extended message length (03)
2119                          * byte 2 :  SYNCHRONOUS DATA TRANSFER code (01h)
2120                          * byte 3 :  Transfer period factor
2121                          * byte 4 :  REQ/ACK offset
2122                          */
2123                         pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_SYNC_NEGO);
2124                         if ((pSRB->MsgInBuf[1] != 3) ||
2125                             (pSRB->MsgInBuf[2] != 1)) {
2126                           /* reject_msg: */
2127                                 pSRB->MsgCnt = 1;
2128                                 pSRB->MsgInBuf[0] = MSG_REJECT_;
2129                                 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2130                                 *pscsi_status = PH_BUS_FREE;
2131                                 /* .. initial phase */
2132                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2133                                 /* it's important for atn stop */
2134                                 /*
2135                                  * SCSI cammand
2136                                  */
2137                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2138                                 return;
2139                         } else if (!(pSRB->MsgInBuf[3]) || !(pSRB->MsgInBuf[4])) {
2140                                 /* set async */
2141                                 pDCB = pSRB->pSRBDCB;
2142                                 /* disable sync & sync nego */
2143                                 pDCB->SyncMode &=
2144                                   ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
2145                                 pDCB->SyncPeriod = 0;
2146                                 pDCB->SyncOffset = 0;
2147                                 pDCB->tinfo.goal.period = 0;
2148                                 pDCB->tinfo.goal.offset = 0;
2149                                 pDCB->tinfo.current.period = 0;
2150                                 pDCB->tinfo.current.offset = 0;
2151                                 pDCB->tinfo.current.width =
2152                                   MSG_EXT_WDTR_BUS_8_BIT;
2153                                 /*
2154                                  *
2155                                  *   program SCSI control register
2156                                  *
2157                                  */
2158                                 trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2159                                 trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2160                                 trm_SetXferRate(pACB,pSRB,pDCB);
2161                                 *pscsi_status = PH_BUS_FREE;
2162                                 /* .. initial phase */
2163                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2164                                 /* it's important for atn stop */
2165                                 /*
2166                                  * SCSI cammand
2167                                  */
2168                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2169                                 return;
2170                         } else {
2171                                 /* set sync */
2172                                 pDCB = pSRB->pSRBDCB;
2173                                 pDCB->SyncMode |=
2174                                   SYNC_NEGO_ENABLE+SYNC_NEGO_DONE;
2175                                 pDCB->MaxNegoPeriod = pSRB->MsgInBuf[3];
2176                                 /* Transfer period factor */
2177                                 pDCB->SyncOffset = pSRB->MsgInBuf[4];
2178                                 /* REQ/ACK offset */
2179                                 if (pACB->AdaptType == 1) {
2180                                         for(bIndex = 0; bIndex < 7; bIndex++) {
2181                                                 if (pSRB->MsgInBuf[3] <=
2182                                            dc395u2x_clock_period[bIndex]) {
2183                                             pDCB->tinfo.goal.period =
2184                                                 dc395u2x_tinfo_period[bIndex];
2185                                             pDCB->tinfo.current.period =
2186                                                 dc395u2x_tinfo_period[bIndex];
2187                                         pDCB->tinfo.goal.offset =
2188                                             pDCB->SyncOffset;
2189                                         pDCB->tinfo.current.offset =
2190                                             pDCB->SyncOffset;
2191                                         pDCB->SyncPeriod |= (bIndex|LVDS_SYNC);
2192                                         break;
2193                                                 }
2194                                         }
2195                                 } else {
2196                                         for(bIndex = 0; bIndex < 7; bIndex++) {
2197                                                 if (pSRB->MsgInBuf[3] <=
2198                                                  dc395x_clock_period[bIndex]) {
2199                                                    pDCB->tinfo.goal.period =
2200                                                 dc395x_tinfo_period[bIndex];
2201                                                    pDCB->tinfo.current.period =
2202                                                 dc395x_tinfo_period[bIndex];
2203                                                    pDCB->tinfo.goal.offset =
2204                                                 pDCB->SyncOffset;
2205                                                    pDCB->tinfo.current.offset =
2206                                                        pDCB->SyncOffset;
2207                                                    pDCB->SyncPeriod |=
2208                                                        (bIndex|ALT_SYNC);
2209                                                    break;
2210                                                 }
2211                                         }
2212                                 }
2213                                 /*
2214                                  *
2215                                  *   program SCSI control register
2216                                  *
2217                                  */
2218                                 trm_reg_write8(pDCB->SyncPeriod,
2219                                     TRMREG_SCSI_SYNC);
2220                                 trm_reg_write8(pDCB->SyncOffset,
2221                                     TRMREG_SCSI_OFFSET);
2222                                 trm_SetXferRate(pACB,pSRB,pDCB);
2223                                 *pscsi_status=PH_BUS_FREE;/*.. initial phase*/
2224                                 trm_reg_write16(DO_DATALATCH,TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
2225                     /*
2226                     ** SCSI command
2227                     */
2228                                 trm_reg_write8(SCMD_MSGACCEPT,TRMREG_SCSI_COMMAND);
2229                                 return;
2230                         }
2231                 }
2232         *pscsi_status = PH_BUS_FREE;
2233         /* .. initial phase */
2234         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2235         /* it's important for atn stop */
2236         /*
2237          * SCSI cammand
2238          */
2239         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2240         }
2241 }
2242
2243 static void
2244 trm_MsgInPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2245 {
2246
2247         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
2248         trm_reg_write32(1,TRMREG_SCSI_COUNTER);
2249         if (!(pSRB->SRBState & SRB_MSGIN)) {
2250                 pSRB->SRBState &= SRB_DISCONNECT;
2251                 pSRB->SRBState |= SRB_MSGIN;
2252         }
2253         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2254         /* it's important for atn stop*/
2255         /*
2256          * SCSI cammand
2257          */
2258         trm_reg_write8(SCMD_FIFO_IN, TRMREG_SCSI_COMMAND);
2259 }
2260
2261 static void
2262 trm_Nop0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2263 {
2264
2265 }
2266
2267 static void
2268 trm_Nop1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2269 {
2270
2271 }
2272
2273 static void
2274 trm_SetXferRate(PACB pACB,PSRB pSRB, PDCB pDCB)
2275 {
2276         union ccb       *pccb;
2277         struct ccb_trans_settings neg;
2278         u_int16_t       cnt, i;
2279         u_int8_t        bval;
2280         PDCB            pDCBTemp;
2281
2282         /*
2283          * set all lun device's  period , offset
2284          */
2285         TRM_DPRINTF("trm_SetXferRate\n");
2286         pccb = pSRB->pccb;
2287         neg.sync_period = pDCB->tinfo.goal.period;
2288         neg.sync_offset = pDCB->tinfo.goal.offset;
2289         neg.valid = CCB_TRANS_SYNC_RATE_VALID | CCB_TRANS_SYNC_OFFSET_VALID;
2290         xpt_setup_ccb(&neg.ccb_h, pccb->ccb_h.path, /* priority */1);
2291         xpt_async(AC_TRANSFER_NEG, pccb->ccb_h.path, &neg);
2292         if (!(pDCB->IdentifyMsg & 0x07)) {
2293                 pDCBTemp = pACB->pLinkDCB;
2294                 cnt = pACB->DeviceCnt;
2295                 bval = pDCB->TargetID;
2296                 for (i = 0; i < cnt; i++) {
2297                         if (pDCBTemp->TargetID == bval) {
2298                                 pDCBTemp->SyncPeriod = pDCB->SyncPeriod;
2299                                 pDCBTemp->SyncOffset = pDCB->SyncOffset;
2300                                 pDCBTemp->SyncMode = pDCB->SyncMode;
2301                         }
2302                         pDCBTemp = pDCBTemp->pNextDCB;
2303                 }
2304         }
2305         return;
2306 }
2307
2308 /*
2309  * scsiiom
2310  *            trm_Interrupt
2311  *
2312  *
2313  *    ---SCSI bus phase
2314  *
2315  *      PH_DATA_OUT             0x00     Data out phase
2316  *      PH_DATA_IN              0x01     Data in phase
2317  *      PH_COMMAND              0x02     Command phase
2318  *      PH_STATUS               0x03     Status phase
2319  *      PH_BUS_FREE             0x04     Invalid phase used as bus free
2320  *      PH_BUS_FREE             0x05     Invalid phase used as bus free
2321  *      PH_MSG_OUT              0x06     Message out phase
2322  *      PH_MSG_IN               0x07     Message in phase
2323  *
2324  */
2325 static void
2326 trm_Disconnect(PACB pACB)
2327 {
2328         PDCB            pDCB;
2329         PSRB            pSRB, psrb;
2330         u_int16_t       i,j, cnt;
2331         u_int           target_id,target_lun;
2332
2333         TRM_DPRINTF("trm_Disconnect...............\n ");
2334
2335         pDCB = pACB->pActiveDCB;
2336         if (!pDCB) {
2337                 TRM_DPRINTF(" Exception Disconnect DCB=NULL..............\n ");
2338                 j = 400;
2339                 while (--j)
2340                         DELAY(1);
2341                 /* 1 msec */
2342                 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT),
2343                     TRMREG_SCSI_CONTROL);
2344                 return;
2345         }
2346         pSRB = pDCB->pActiveSRB;
2347         /* bug pSRB=0 */
2348         target_id  = pSRB->pccb->ccb_h.target_id;
2349         target_lun = pSRB->pccb->ccb_h.target_lun;
2350         TRM_DPRINTF(":pDCB->pActiveSRB= %8x \n ",(u_int) pDCB->pActiveSRB);
2351         pACB->pActiveDCB = 0;
2352         pSRB->ScsiPhase = PH_BUS_FREE;
2353         /* SCSI bus free Phase */
2354         trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT), TRMREG_SCSI_CONTROL);
2355         if (pSRB->SRBState & SRB_UNEXPECT_RESEL) {
2356                 pSRB->SRBState = 0;
2357                 trm_DoWaitingSRB(pACB);
2358         } else if (pSRB->SRBState & SRB_ABORT_SENT) {
2359                 pDCB->DCBFlag = 0;
2360                 cnt = pDCB->GoingSRBCnt;
2361                 pDCB->GoingSRBCnt = 0;
2362                 pSRB = pDCB->pGoingSRB;
2363                 for (i = 0; i < cnt; i++) {
2364                         psrb = pSRB->pNextSRB;
2365                         pSRB->pNextSRB = pACB->pFreeSRB;
2366                         pACB->pFreeSRB = pSRB;
2367                         pSRB = psrb;
2368                 }
2369                 pDCB->pGoingSRB = 0;
2370                 trm_DoWaitingSRB(pACB);
2371         } else {
2372                 if ((pSRB->SRBState & (SRB_START_+SRB_MSGOUT)) ||
2373                     !(pSRB->SRBState & (SRB_DISCONNECT+SRB_COMPLETED))) {
2374                   /* Selection time out */
2375                         if (!(pACB->scan_devices[target_id][target_lun]) &&
2376                             pSRB->CmdBlock[0] != 0x00 && /* TEST UNIT READY */
2377                             pSRB->CmdBlock[0] != INQUIRY) {
2378                                 pSRB->SRBState = SRB_READY;
2379                                 trm_RewaitSRB(pDCB, pSRB);
2380                         } else {
2381                                 pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
2382                                 goto  disc1;
2383                         }
2384                 } else if (pSRB->SRBState & SRB_DISCONNECT) {
2385                         /*
2386                          * SRB_DISCONNECT
2387                          */
2388                         trm_DoWaitingSRB(pACB);
2389                 } else if (pSRB->SRBState & SRB_COMPLETED) {
2390 disc1:
2391                   /*
2392                    * SRB_COMPLETED
2393                    */
2394                         pDCB->pActiveSRB = 0;
2395                         pSRB->SRBState = SRB_FREE;
2396                         trm_SRBdone(pACB, pDCB, pSRB);
2397                 }
2398         }
2399         return;
2400 }
2401
2402 static void
2403 trm_Reselect(PACB pACB)
2404 {
2405         PDCB            pDCB;
2406         PSRB            pSRB;
2407         u_int16_t       RselTarLunId;
2408
2409         TRM_DPRINTF("trm_Reselect................. \n");
2410         pDCB = pACB->pActiveDCB;
2411         if (pDCB) {
2412           /* Arbitration lost but Reselection win */
2413                 pSRB = pDCB->pActiveSRB;
2414                 pSRB->SRBState = SRB_READY;
2415                 trm_RewaitSRB(pDCB, pSRB);
2416         }
2417         /* Read Reselected Target Id and LUN */
2418         RselTarLunId = trm_reg_read16(TRMREG_SCSI_TARGETID) & 0x1FFF;
2419         pDCB = pACB->pLinkDCB;
2420         while (RselTarLunId != *((u_int16_t *) &pDCB->TargetID)) {
2421           /* get pDCB of the reselect id */
2422                 pDCB = pDCB->pNextDCB;
2423         }
2424
2425         pACB->pActiveDCB = pDCB;
2426         if (pDCB->SyncMode & EN_TAG_QUEUING) {
2427                 pSRB = &pACB->TmpSRB;
2428                 pDCB->pActiveSRB = pSRB;
2429         } else {
2430                 pSRB = pDCB->pActiveSRB;
2431                 if (!pSRB || !(pSRB->SRBState & SRB_DISCONNECT)) {
2432                   /*
2433                    * abort command
2434                    */
2435                         pSRB = &pACB->TmpSRB;
2436                         pSRB->SRBState = SRB_UNEXPECT_RESEL;
2437                         pDCB->pActiveSRB = pSRB;
2438                         trm_EnableMsgOutAbort1(pACB, pSRB);
2439                 } else {
2440                         if (pDCB->DCBFlag & ABORT_DEV_) {
2441                                 pSRB->SRBState = SRB_ABORT_SENT;
2442                                 trm_EnableMsgOutAbort1(pACB, pSRB);
2443                         } else
2444                                 pSRB->SRBState = SRB_DATA_XFER;
2445                 }
2446         }
2447         pSRB->ScsiPhase = PH_BUS_FREE;
2448         /* SCSI bus free Phase */
2449         /*
2450          * Program HA ID, target ID, period and offset
2451          */
2452         trm_reg_write8((u_int8_t) RselTarLunId,TRMREG_SCSI_TARGETID);
2453         /* target ID */
2454         trm_reg_write8(pACB->AdaptSCSIID,TRMREG_SCSI_HOSTID);
2455         /* host   ID */
2456         trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2457         /* period    */
2458         trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2459         /* offset    */
2460         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2461         /* it's important for atn stop*/
2462         /*
2463          * SCSI cammand
2464          */
2465         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2466         /* to rls the /ACK signal */
2467 }
2468
2469 static void
2470 trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB)
2471 {
2472         PSRB                    psrb;
2473         u_int8_t                bval, bval1,status;
2474         union ccb               *pccb;
2475         struct ccb_scsiio       *pcsio;
2476         PSCSI_INQDATA           ptr;
2477         int                     intflag;
2478         u_int                   target_id,target_lun;
2479         PDCB                    pTempDCB;
2480
2481         pccb  = pSRB->pccb;
2482         if (pccb == NULL)
2483                 return;
2484         pcsio = &pccb->csio;
2485         target_id  = pSRB->pccb->ccb_h.target_id;
2486         target_lun = pSRB->pccb->ccb_h.target_lun;
2487         if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
2488                 bus_dmasync_op_t op;
2489                 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
2490                         op = BUS_DMASYNC_POSTREAD;
2491                 else
2492                         op = BUS_DMASYNC_POSTWRITE;
2493                 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
2494                 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
2495         }
2496         /*
2497          *
2498          * target status
2499          *
2500          */
2501         status = pSRB->TargetStatus;
2502         pcsio->scsi_status=SCSI_STAT_GOOD;
2503         pccb->ccb_h.status = CAM_REQ_CMP;
2504         if (pSRB->SRBFlag & AUTO_REQSENSE) {
2505           /*
2506            * status of auto request sense
2507            */
2508                 pSRB->SRBFlag &= ~AUTO_REQSENSE;
2509                 pSRB->AdaptStatus = 0;
2510                 pSRB->TargetStatus = SCSI_STATUS_CHECK_COND;
2511
2512                 if (status == SCSI_STATUS_CHECK_COND) {
2513                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2514                         goto ckc_e;
2515                 }
2516                 *((u_long *) &(pSRB->CmdBlock[0])) = pSRB->Segment0[0];
2517                 *((u_long *) &(pSRB->CmdBlock[4])) = pSRB->Segment0[1];
2518                 pSRB->SRBTotalXferLength = pSRB->Segment1[1];
2519                 pSRB->pSRBSGL->address = pSRB->SgSenseTemp.address;
2520                 pSRB->pSRBSGL->length = pSRB->SgSenseTemp.length;
2521                 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2522                 bcopy(trm_get_sense_buf(pACB, pSRB), &pcsio->sense_data,
2523                     pcsio->sense_len);
2524                 pcsio->ccb_h.status = CAM_SCSI_STATUS_ERROR
2525                     | CAM_AUTOSNS_VALID;
2526                 goto ckc_e;
2527         }
2528         /*
2529          * target status
2530          */
2531         if (status) {
2532                 if (status == SCSI_STATUS_CHECK_COND) {
2533                         if ((pcsio->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) {
2534                           TRM_DPRINTF("trm_RequestSense..................\n");
2535                           trm_RequestSense(pACB, pDCB, pSRB);
2536                           return;
2537                         }
2538                         pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2539                         pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2540                         goto ckc_e;
2541                 } else if (status == SCSI_STAT_QUEUEFULL) {
2542                         bval = (u_int8_t) pDCB->GoingSRBCnt;
2543                         bval--;
2544                         pDCB->MaxActiveCommandCnt = bval;
2545                         trm_RewaitSRB(pDCB, pSRB);
2546                         pSRB->AdaptStatus = 0;
2547                         pSRB->TargetStatus = 0;
2548                         return;
2549                 } else if (status == SCSI_STAT_SEL_TIMEOUT) {
2550                         pSRB->AdaptStatus  = H_SEL_TIMEOUT;
2551                         pSRB->TargetStatus = 0;
2552                         pcsio->scsi_status = SCSI_STAT_SEL_TIMEOUT;
2553                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2554                 } else if (status == SCSI_STAT_BUSY) {
2555                         TRM_DPRINTF("trm: target busy at %s %d\n",
2556                                 __FILE__, __LINE__);
2557                         pcsio->scsi_status = SCSI_STAT_BUSY;
2558                         pccb->ccb_h.status = CAM_SCSI_BUSY;
2559                         return;
2560                   /* The device busy, try again later?    */
2561                 } else if (status == SCSI_STAT_RESCONFLICT) {
2562                         TRM_DPRINTF("trm: target reserved at %s %d\n",
2563                                 __FILE__, __LINE__);
2564                         pcsio->scsi_status = SCSI_STAT_RESCONFLICT;
2565                         pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;     /*XXX*/
2566                         return;
2567                 } else {
2568                         pSRB->AdaptStatus = 0;
2569                         if (pSRB->RetryCnt) {
2570                                 pSRB->RetryCnt--;
2571                                 pSRB->TargetStatus = 0;
2572                                 pSRB->SRBSGIndex = 0;
2573                                 if (trm_StartSCSI(pACB, pDCB, pSRB)) {
2574                                   /*
2575                                    * If trm_StartSCSI return 1 :
2576                                    * current interrupt status is interrupt
2577                                    * disreenable
2578                                    * It's said that SCSI processor has more
2579                                    * one SRB need to do
2580                                    */
2581                                         trm_RewaitSRB(pDCB, pSRB);
2582                                 }
2583                                 return;
2584                         } else {
2585                                 TRM_DPRINTF("trm: driver stuffup at %s %d\n",
2586                                         __FILE__, __LINE__);
2587                                 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2588                         }
2589                 }
2590         } else {
2591         /*
2592          * process initiator status..........................
2593          * Adapter (initiator) status
2594          */
2595                 status = pSRB->AdaptStatus;
2596                 if (status & H_OVER_UNDER_RUN) {
2597                         pSRB->TargetStatus = 0;
2598                         pccb->ccb_h.status = CAM_DATA_RUN_ERR;
2599                         /* Illegal length (over/under run) */
2600                 } else if (pSRB->SRBStatus & PARITY_ERROR) {
2601                         TRM_DPRINTF("trm: driver stuffup %s %d\n",
2602                                 __FILE__, __LINE__);
2603                         pDCB->tinfo.goal.period = 0;
2604                         pDCB->tinfo.goal.offset = 0;
2605                         /* Driver failed to perform operation */
2606                         pccb->ccb_h.status = CAM_UNCOR_PARITY;
2607                 } else {
2608                   /* no error */
2609                         pSRB->AdaptStatus = 0;
2610                         pSRB->TargetStatus = 0;
2611                         pccb->ccb_h.status = CAM_REQ_CMP;
2612                         /* there is no error, (sense is invalid) */
2613                 }
2614         }
2615 ckc_e:
2616         if (pACB->scan_devices[target_id][target_lun]) {
2617           /*
2618            *   if SCSI command in "scan devices" duty
2619            */
2620                 if (pSRB->CmdBlock[0] == TEST_UNIT_READY)
2621                         pACB->scan_devices[target_id][target_lun] = 0;
2622                 /* SCSI command phase :test unit ready */
2623                 else if (pSRB->CmdBlock[0] == INQUIRY) {
2624                   /*
2625                    * SCSI command phase :inquiry scsi device data
2626                    * (type,capacity,manufacture....
2627                    */
2628                         if (pccb->ccb_h.status == CAM_SEL_TIMEOUT)
2629                                 goto NO_DEV;
2630                         ptr = (PSCSI_INQDATA) pcsio->data_ptr;
2631                         /* page fault */
2632                         TRM_DPRINTF("trm_SRBdone..PSCSI_INQDATA:%2x \n",
2633                             ptr->DevType);
2634                         bval1 = ptr->DevType & SCSI_DEVTYPE;
2635                         if (bval1 == SCSI_NODEV) {
2636 NO_DEV:
2637                                 TRM_DPRINTF("trm_SRBdone NO Device:target_id= %d ,target_lun= %d \n",
2638                                     target_id,
2639                                     target_lun);
2640                                 intflag = splcam();
2641                                 pACB->scan_devices[target_id][target_lun] = 0;
2642                                 /* no device set scan device flag =0*/
2643                                 /* pDCB Q link */
2644                                 /* move the head of DCB to tempDCB*/
2645                                 pTempDCB=pACB->pLinkDCB;
2646                                 /* search current DCB for pass link */
2647                                 while (pTempDCB->pNextDCB != pDCB) {
2648                                         pTempDCB = pTempDCB->pNextDCB;
2649                                 }
2650                                 /*
2651                                  * when the current DCB found than connect
2652                                  * current DCB tail
2653                                  */
2654                                 /* to the DCB tail that before current DCB */
2655                                 pTempDCB->pNextDCB = pDCB->pNextDCB;
2656                                 /*
2657                                  * if there was only one DCB ,connect his tail
2658                                  * to his head
2659                                  */
2660                                 if (pACB->pLinkDCB == pDCB)
2661                                         pACB->pLinkDCB = pTempDCB->pNextDCB;
2662                                 if (pACB->pDCBRunRobin == pDCB)
2663                                         pACB->pDCBRunRobin = pTempDCB->pNextDCB;
2664                                 pDCB->DCBstatus &= ~DS_IN_QUEUE;
2665                                 pACB->DeviceCnt--;
2666                                 if (pACB->DeviceCnt == 0) {
2667                                         pACB->pLinkDCB = NULL;
2668                                         pACB->pDCBRunRobin = NULL;
2669                                 }
2670                                 splx(intflag);
2671                         } else {
2672 #ifdef trm_DEBUG1
2673                                 int j;
2674                                 for (j = 0; j < 28; j++) {
2675                                         TRM_DPRINTF("ptr=%2x ",
2676                                                 ((u_int8_t *)ptr)[j]);
2677                                 }
2678 #endif
2679                                 pDCB->DevType = bval1;
2680                                 if (bval1 == SCSI_DASD ||
2681                                     bval1 == SCSI_OPTICAL) {
2682                                         if ((((ptr->Vers & 0x07) >= 2) ||
2683                                               ((ptr->RDF & 0x0F) == 2)) &&
2684                                             (ptr->Flags & SCSI_INQ_CMDQUEUE) &&
2685                                             (pDCB->DevMode & TAG_QUEUING_) &&
2686                                             (pDCB->DevMode & EN_DISCONNECT_)) {
2687                                                 if (pDCB->DevMode &
2688                                                     TAG_QUEUING_) {
2689                                                         pDCB->
2690                                                             MaxActiveCommandCnt =
2691                                                           pACB->TagMaxNum;
2692                                                         pDCB->SyncMode |=
2693                                                           EN_TAG_QUEUING;
2694                                                         pDCB->tinfo.disc_tag |=
2695                                                           TRM_CUR_TAGENB;
2696                                                 } else {
2697                                                         pDCB->SyncMode |=
2698                                                           EN_ATN_STOP;
2699                                                         pDCB->tinfo.disc_tag &=
2700                                                           ~TRM_CUR_TAGENB;
2701                                                 }
2702                                         }
2703                                 }
2704                         }
2705                         /* pSRB->CmdBlock[0] == INQUIRY */
2706                 }
2707                 /* pACB->scan_devices[target_id][target_lun] */
2708         }
2709         intflag = splcam();
2710         /*  ReleaseSRB(pDCB, pSRB); */
2711         if (pSRB == pDCB->pGoingSRB)
2712                 pDCB->pGoingSRB = pSRB->pNextSRB;
2713         else {
2714                 psrb = pDCB->pGoingSRB;
2715                 while (psrb->pNextSRB != pSRB) {
2716                         psrb = psrb->pNextSRB;
2717                 }
2718                 psrb->pNextSRB = pSRB->pNextSRB;
2719                 if (pSRB == pDCB->pGoingLastSRB) {
2720                         pDCB->pGoingLastSRB = psrb;
2721                 }
2722         }
2723         pSRB->pNextSRB = pACB->pFreeSRB;
2724         pACB->pFreeSRB = pSRB;
2725         pDCB->GoingSRBCnt--;
2726         trm_DoWaitingSRB(pACB);
2727
2728         splx(intflag);
2729         /*  Notify cmd done */
2730         xpt_done (pccb);
2731 }
2732
2733 static void
2734 trm_DoingSRB_Done(PACB pACB)
2735 {
2736         PDCB            pDCB, pdcb;
2737         PSRB            psrb, psrb2;
2738         u_int16_t       cnt, i;
2739         union ccb       *pccb;
2740
2741         pDCB = pACB->pLinkDCB;
2742         if (pDCB == NULL)
2743                 return;
2744         pdcb = pDCB;
2745         do {
2746                 cnt = pdcb->GoingSRBCnt;
2747                 psrb = pdcb->pGoingSRB;
2748                 for (i = 0; i < cnt; i++) {
2749                         psrb2 = psrb->pNextSRB;
2750                         pccb = psrb->pccb;
2751                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2752                         /*  ReleaseSRB(pDCB, pSRB); */
2753                         psrb->pNextSRB = pACB->pFreeSRB;
2754                         pACB->pFreeSRB = psrb;
2755                         xpt_done(pccb);
2756                         psrb  = psrb2;
2757                 }
2758                 pdcb->GoingSRBCnt = 0;;
2759                 pdcb->pGoingSRB = NULL;
2760                 pdcb = pdcb->pNextDCB;
2761         }
2762         while (pdcb != pDCB);
2763 }
2764
2765 static void
2766 trm_ResetSCSIBus(PACB pACB)
2767 {
2768         int     intflag;
2769
2770         intflag = splcam();
2771         pACB->ACBFlag |= RESET_DEV;
2772
2773         trm_reg_write16(DO_RSTSCSI,TRMREG_SCSI_CONTROL);
2774         while (!(trm_reg_read16(TRMREG_SCSI_INTSTATUS) & INT_SCSIRESET));
2775         splx(intflag);
2776         return;
2777 }
2778
2779 static void
2780 trm_ScsiRstDetect(PACB pACB)
2781 {
2782         int     intflag;
2783         u_long  wlval;
2784
2785         TRM_DPRINTF("trm_ScsiRstDetect \n");
2786         wlval = 1000;
2787         while (--wlval)
2788                 DELAY(1000);
2789         intflag = splcam();
2790         trm_reg_write8(STOPDMAXFER,TRMREG_DMA_CONTROL);
2791
2792         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
2793
2794         if (pACB->ACBFlag & RESET_DEV)
2795                 pACB->ACBFlag |= RESET_DONE;
2796         else {
2797                 pACB->ACBFlag |= RESET_DETECT;
2798                 trm_ResetDevParam(pACB);
2799                 /*      trm_DoingSRB_Done(pACB); ???? */
2800                 trm_RecoverSRB(pACB);
2801                 pACB->pActiveDCB = NULL;
2802                 pACB->ACBFlag = 0;
2803                 trm_DoWaitingSRB(pACB);
2804         }
2805         splx(intflag);
2806         return;
2807 }
2808
2809 static void
2810 trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB)
2811 {
2812         union ccb               *pccb;
2813         struct ccb_scsiio       *pcsio;
2814
2815         pccb  = pSRB->pccb;
2816         pcsio = &pccb->csio;
2817
2818         pSRB->SRBFlag |= AUTO_REQSENSE;
2819         pSRB->Segment0[0] = *((u_long *) &(pSRB->CmdBlock[0]));
2820         pSRB->Segment0[1] = *((u_long *) &(pSRB->CmdBlock[4]));
2821         pSRB->Segment1[0] = (u_long) ((pSRB->ScsiCmdLen << 8) +
2822             pSRB->SRBSGCount);
2823         pSRB->Segment1[1] = pSRB->SRBTotalXferLength; /* ?????????? */
2824
2825         /* $$$$$$ Status of initiator/target $$$$$$$$ */
2826         pSRB->AdaptStatus = 0;
2827         pSRB->TargetStatus = 0;
2828         /* $$$$$$ Status of initiator/target $$$$$$$$ */
2829
2830         pSRB->SRBTotalXferLength = sizeof(pcsio->sense_data);
2831         pSRB->SgSenseTemp.address = pSRB->pSRBSGL->address;
2832         pSRB->SgSenseTemp.length  = pSRB->pSRBSGL->length;
2833         pSRB->pSRBSGL->address = trm_get_sense_bufaddr(pACB, pSRB);
2834         pSRB->pSRBSGL->length = (u_long) sizeof(struct scsi_sense_data);
2835         pSRB->SRBSGCount = 1;
2836         pSRB->SRBSGIndex = 0;
2837
2838         *((u_long *) &(pSRB->CmdBlock[0])) = 0x00000003;
2839         pSRB->CmdBlock[1] = pDCB->IdentifyMsg << 5;
2840         *((u_int16_t *) &(pSRB->CmdBlock[4])) = pcsio->sense_len;
2841         pSRB->ScsiCmdLen = 6;
2842
2843         if (trm_StartSCSI(pACB, pDCB, pSRB))
2844            /*
2845             * If trm_StartSCSI return 1 :
2846             * current interrupt status is interrupt disreenable
2847             * It's said that SCSI processor has more one SRB need to do
2848             */
2849                 trm_RewaitSRB(pDCB, pSRB);
2850 }
2851
2852 static void
2853 trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB)
2854 {
2855
2856         pSRB->MsgCnt = 1;
2857         trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2858 }
2859
2860 static void
2861 trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB)
2862 {
2863
2864         pSRB->MsgOutBuf[0] = MSG_ABORT;
2865         trm_EnableMsgOutAbort2(pACB, pSRB);
2866 }
2867
2868 static void
2869 trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,u_int32_t i,u_int32_t j)
2870 {
2871         PNVRAMTYPE      pEEpromBuf;
2872         u_int8_t        bval,PeriodIndex;
2873         u_int           target_id,target_lun;
2874         PDCB            pTempDCB;
2875         int             intflag;
2876
2877         target_id  = i;
2878         target_lun = j;
2879
2880         /*
2881          *  Using the lun 0 device to init other DCB first, if the device
2882          *  has been initialized.
2883          *  I don't want init sync arguments one by one, it is the same.
2884          */
2885         if (target_lun != 0 &&
2886             (pACB->DCBarray[target_id][0].DCBstatus & DS_IN_QUEUE))
2887                 bcopy(&pACB->DCBarray[target_id][0], pDCB,
2888                     sizeof(TRM_DCB));
2889         intflag = splcam();
2890         if (pACB->pLinkDCB == 0) {
2891                 pACB->pLinkDCB = pDCB;
2892                 /*
2893                  * RunRobin impersonate the role
2894                  * that let each device had good proportion
2895                  * about SCSI command proceeding
2896                  */
2897                 pACB->pDCBRunRobin = pDCB;
2898                 pDCB->pNextDCB = pDCB;
2899         } else {
2900                 pTempDCB=pACB->pLinkDCB;
2901                 /* search the last nod of DCB link */
2902                 while (pTempDCB->pNextDCB != pACB->pLinkDCB)
2903                         pTempDCB = pTempDCB->pNextDCB;
2904                 /* connect current DCB with last DCB tail */
2905                 pTempDCB->pNextDCB = pDCB;
2906                 /* connect current DCB tail to this DCB Q head */
2907                 pDCB->pNextDCB=pACB->pLinkDCB;
2908         }
2909         splx(intflag);
2910
2911         pACB->DeviceCnt++;
2912         pDCB->TargetID = target_id;
2913         pDCB->TargetLUN =  target_lun;
2914         pDCB->pWaitingSRB = NULL;
2915         pDCB->pGoingSRB = NULL;
2916         pDCB->GoingSRBCnt = 0;
2917         pDCB->pActiveSRB = NULL;
2918         pDCB->MaxActiveCommandCnt = 1;
2919         pDCB->DCBFlag = 0;
2920         pDCB->DCBstatus |= DS_IN_QUEUE;
2921         /* $$$$$$$ */
2922         pEEpromBuf = &trm_eepromBuf[unit];
2923         pDCB->DevMode = pEEpromBuf->NvramTarget[target_id].NvmTarCfg0;
2924         pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
2925         /* $$$$$$$ */
2926         /*
2927          * disconnect enable ?
2928          */
2929         if (pDCB->DevMode & NTC_DO_DISCONNECT) {
2930                 bval = 0xC0;
2931                 pDCB->tinfo.disc_tag |= TRM_USR_DISCENB ;
2932         } else {
2933                 bval = 0x80;
2934                 pDCB->tinfo.disc_tag &= ~(TRM_USR_DISCENB);
2935         }
2936         bval |= target_lun;
2937         pDCB->IdentifyMsg = bval;
2938         if (target_lun != 0 &&
2939             (pACB->DCBarray[target_id][0].DCBstatus & DS_IN_QUEUE))
2940                 return;
2941         /* $$$$$$$ */
2942         /*
2943          * tag Qing enable ?
2944          */
2945         if (pDCB->DevMode & TAG_QUEUING_) {
2946                 pDCB->tinfo.disc_tag |= TRM_USR_TAGENB ;
2947         } else
2948                 pDCB->tinfo.disc_tag &= ~(TRM_USR_TAGENB);
2949         /* $$$$$$$ */
2950         /*
2951          * wide nego ,sync nego enable ?
2952          */
2953         pDCB->SyncPeriod = 0;
2954         pDCB->SyncOffset = 0;
2955         PeriodIndex = pEEpromBuf->NvramTarget[target_id].NvmTarPeriod & 0x07;
2956         if (pACB->AdaptType==1) {/* is U2? */
2957             pDCB->MaxNegoPeriod=dc395u2x_clock_period[ PeriodIndex ];
2958             pDCB->tinfo.user.period=pDCB->MaxNegoPeriod;
2959             pDCB->tinfo.user.offset=(pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 31 : 0;
2960         } else {
2961         pDCB->MaxNegoPeriod=dc395x_clock_period[ PeriodIndex ];
2962             pDCB->tinfo.user.period=pDCB->MaxNegoPeriod;
2963             pDCB->tinfo.user.offset=(pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 15 : 0;
2964         }
2965         pDCB->SyncMode = 0;
2966         if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
2967             (pACB->Config & HCC_WIDE_CARD))
2968                 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
2969         /* enable wide nego */
2970         if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
2971                 pDCB->SyncMode |= SYNC_NEGO_ENABLE;
2972         /* enable sync nego */
2973         /* $$$$$$$ */
2974         /*
2975          *      Fill in tinfo structure.
2976          */
2977         pDCB->tinfo.user.width  = (pDCB->SyncMode & WIDE_NEGO_ENABLE) ?
2978           MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
2979
2980         pDCB->tinfo.current.period = 0;
2981         pDCB->tinfo.current.offset = 0;
2982         pDCB->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
2983 }
2984
2985 static void
2986 trm_srbmapSG(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2987 {
2988         PSRB pSRB;
2989
2990         pSRB=(PSRB) arg;
2991         pSRB->SRBSGPhyAddr=segs->ds_addr;
2992         return;
2993 }
2994
2995 static void
2996 trm_destroySRB(PACB pACB)
2997 {
2998         PSRB pSRB;
2999
3000         pSRB = pACB->pFreeSRB;
3001         while (pSRB) {
3002                 if (pSRB->sg_dmamap) {
3003                         bus_dmamap_unload(pACB->sg_dmat, pSRB->sg_dmamap);
3004                         bus_dmamem_free(pACB->sg_dmat, pSRB->pSRBSGL,
3005                             pSRB->sg_dmamap);
3006                         bus_dmamap_destroy(pACB->sg_dmat, pSRB->sg_dmamap);
3007                 }
3008                 if (pSRB->dmamap)
3009                         bus_dmamap_destroy(pACB->buffer_dmat, pSRB->dmamap);
3010                 pSRB = pSRB->pNextSRB;
3011         }
3012 }
3013
3014 static int
3015 trm_initSRB(PACB pACB)
3016 {
3017         u_int16_t    i;
3018         PSRB    pSRB;
3019         int error;
3020
3021         for (i = 0; i < TRM_MAX_SRB_CNT; i++) {
3022                 pSRB = (PSRB)&pACB->pFreeSRB[i];
3023
3024                 if (bus_dmamem_alloc(pACB->sg_dmat, (void **)&pSRB->pSRBSGL,
3025                     BUS_DMA_NOWAIT, &pSRB->sg_dmamap) !=0 ) {
3026                         return ENXIO;
3027                 }
3028                 bus_dmamap_load(pACB->sg_dmat, pSRB->sg_dmamap, pSRB->pSRBSGL,
3029                     TRM_MAX_SG_LISTENTRY * sizeof(SGentry),
3030                     trm_srbmapSG, pSRB, /*flags*/0);
3031                 if (i != TRM_MAX_SRB_CNT - 1) {
3032                         /*
3033                          * link all SRB
3034                          */
3035                         pSRB->pNextSRB = &pACB->pFreeSRB[i+1];
3036                 } else {
3037                         /*
3038                          * load NULL to NextSRB of the last SRB
3039                          */
3040                         pSRB->pNextSRB = NULL;
3041                 }
3042                 pSRB->TagNumber = i;
3043
3044                 /*
3045                  * Create the dmamap.  This is no longer optional!
3046                  */
3047                 if ((error = bus_dmamap_create(pACB->buffer_dmat, 0,
3048                                                &pSRB->dmamap)) != 0)
3049                         return (error);
3050
3051         }
3052         return (0);
3053 }
3054
3055
3056
3057
3058 static void
3059 trm_initACB(PACB pACB, u_int8_t adaptType, u_int16_t unit)
3060 {
3061         PNVRAMTYPE      pEEpromBuf;
3062
3063         pEEpromBuf = &trm_eepromBuf[unit];
3064         pACB->max_id = 15;
3065
3066         if (pEEpromBuf->NvramChannelCfg & NAC_SCANLUN)
3067                 pACB->max_lun = 7;
3068         else
3069                 pACB->max_lun = 0;
3070
3071         TRM_DPRINTF("trm: pACB->max_id= %d pACB->max_lun= %d \n",
3072             pACB->max_id, pACB->max_lun);
3073         pACB->pLinkDCB = NULL;
3074         pACB->pDCBRunRobin = NULL;
3075         pACB->pActiveDCB = NULL;
3076         pACB->AdapterUnit = (u_int8_t)unit;
3077         pACB->AdaptSCSIID = pEEpromBuf->NvramScsiId;
3078         pACB->AdaptSCSILUN = 0;
3079         pACB->DeviceCnt = 0;
3080         pACB->AdaptType = adaptType;
3081         pACB->TagMaxNum = 2 << pEEpromBuf->NvramMaxTag;
3082         pACB->ACBFlag = 0;
3083         return;
3084 }
3085
3086 static void
3087 NVRAM_trm_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB)
3088 {
3089         u_int8_t        *bpEeprom = (u_int8_t *) pEEpromBuf;
3090         u_int8_t        bAddr;
3091
3092         /* Enable SEEPROM */
3093         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
3094             TRMREG_GEN_CONTROL);
3095         /*
3096          * Write enable
3097          */
3098         NVRAM_trm_write_cmd(pACB, 0x04, 0xFF);
3099         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3100         NVRAM_trm_wait_30us(pACB);
3101         for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++) {
3102                 NVRAM_trm_set_data(pACB, bAddr, *bpEeprom);
3103         }
3104         /*
3105          * Write disable
3106          */
3107         NVRAM_trm_write_cmd(pACB, 0x04, 0x00);
3108         trm_reg_write8(0 , TRMREG_GEN_NVRAM);
3109         NVRAM_trm_wait_30us(pACB);
3110         /* Disable SEEPROM */
3111         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3112             TRMREG_GEN_CONTROL);
3113         return;
3114 }
3115
3116 static void
3117 NVRAM_trm_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData)
3118 {
3119         int             i;
3120         u_int8_t        bSendData;
3121         /*
3122          * Send write command & address
3123          */
3124
3125         NVRAM_trm_write_cmd(pACB, 0x05, bAddr);
3126         /*
3127          * Write data
3128          */
3129         for (i = 0; i < 8; i++, bData <<= 1) {
3130                 bSendData = NVR_SELECT;
3131                 if (bData & 0x80)
3132                   /* Start from bit 7   */
3133                         bSendData |= NVR_BITOUT;
3134                 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3135                 NVRAM_trm_wait_30us(pACB);
3136                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3137                 NVRAM_trm_wait_30us(pACB);
3138         }
3139         trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3140         NVRAM_trm_wait_30us(pACB);
3141         /*
3142          * Disable chip select
3143          */
3144         trm_reg_write8(0 , TRMREG_GEN_NVRAM);
3145         NVRAM_trm_wait_30us(pACB);
3146         trm_reg_write8(NVR_SELECT ,TRMREG_GEN_NVRAM);
3147         NVRAM_trm_wait_30us(pACB);
3148         /*
3149          * Wait for write ready
3150          */
3151         while (1) {
3152                 trm_reg_write8((NVR_SELECT | NVR_CLOCK), TRMREG_GEN_NVRAM);
3153                 NVRAM_trm_wait_30us(pACB);
3154                 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3155                 NVRAM_trm_wait_30us(pACB);
3156                 if (trm_reg_read8(TRMREG_GEN_NVRAM) & NVR_BITIN) {
3157                         break;
3158                 }
3159         }
3160         /*
3161          * Disable chip select
3162          */
3163         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3164         return;
3165 }
3166
3167 static void
3168 NVRAM_trm_read_all(PNVRAMTYPE pEEpromBuf, PACB pACB)
3169 {
3170         u_int8_t        *bpEeprom = (u_int8_t*) pEEpromBuf;
3171         u_int8_t        bAddr;
3172
3173         /*
3174          * Enable SEEPROM
3175          */
3176         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
3177             TRMREG_GEN_CONTROL);
3178         for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++)
3179                 *bpEeprom = NVRAM_trm_get_data(pACB, bAddr);
3180         /*
3181          * Disable SEEPROM
3182          */
3183         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3184             TRMREG_GEN_CONTROL);
3185         return;
3186 }
3187
3188 static u_int8_t
3189 NVRAM_trm_get_data(PACB pACB, u_int8_t bAddr)
3190 {
3191         int             i;
3192         u_int8_t        bReadData, bData = 0;
3193         /*
3194         * Send read command & address
3195         */
3196
3197         NVRAM_trm_write_cmd(pACB, 0x06, bAddr);
3198
3199         for (i = 0; i < 8; i++) {
3200           /*
3201            * Read data
3202            */
3203                 trm_reg_write8((NVR_SELECT | NVR_CLOCK) , TRMREG_GEN_NVRAM);
3204                 NVRAM_trm_wait_30us(pACB);
3205                 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3206                 /*
3207                  * Get data bit while falling edge
3208                  */
3209                 bReadData = trm_reg_read8(TRMREG_GEN_NVRAM);
3210                 bData <<= 1;
3211                 if (bReadData & NVR_BITIN) {
3212                         bData |= 1;
3213                 }
3214                 NVRAM_trm_wait_30us(pACB);
3215         }
3216         /*
3217          * Disable chip select
3218          */
3219         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3220         return (bData);
3221 }
3222
3223 static void
3224 NVRAM_trm_wait_30us(PACB pACB)
3225 {
3226
3227         /*    ScsiPortStallExecution(30);        wait 30 us     */
3228         trm_reg_write8(5, TRMREG_GEN_TIMER);
3229         while (!(trm_reg_read8(TRMREG_GEN_STATUS) & GTIMEOUT));
3230         return;
3231 }
3232
3233 static void
3234 NVRAM_trm_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr)
3235 {
3236         int             i;
3237         u_int8_t        bSendData;
3238
3239         for (i = 0; i < 3; i++, bCmd <<= 1) {
3240           /*
3241            * Program SB+OP code
3242            */
3243                 bSendData = NVR_SELECT;
3244                 if (bCmd & 0x04)
3245                         bSendData |= NVR_BITOUT;
3246                 /* start from bit 2 */
3247                 trm_reg_write8(bSendData, TRMREG_GEN_NVRAM);
3248                 NVRAM_trm_wait_30us(pACB);
3249                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3250                 NVRAM_trm_wait_30us(pACB);
3251         }
3252         for (i = 0; i < 7; i++, bAddr <<= 1) {
3253           /*
3254            * Program address
3255            */
3256                 bSendData = NVR_SELECT;
3257                 if (bAddr & 0x40)
3258                   /* Start from bit 6   */
3259                         bSendData |= NVR_BITOUT;
3260                 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3261                 NVRAM_trm_wait_30us(pACB);
3262                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3263                 NVRAM_trm_wait_30us(pACB);
3264         }
3265         trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3266         NVRAM_trm_wait_30us(pACB);
3267 }
3268
3269 static void
3270 trm_check_eeprom(PNVRAMTYPE pEEpromBuf, PACB pACB)
3271 {
3272         u_int16_t       *wpEeprom = (u_int16_t *) pEEpromBuf;
3273         u_int16_t       wAddr, wCheckSum;
3274         u_long  dAddr, *dpEeprom;
3275
3276         NVRAM_trm_read_all(pEEpromBuf,pACB);
3277         wCheckSum = 0;
3278         for (wAddr = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3279             wAddr < 64; wAddr++, wpEeprom++) {
3280                 wCheckSum += *wpEeprom;
3281         }
3282         if (wCheckSum != 0x1234) {
3283           /*
3284            * Checksum error, load default
3285            */
3286                 pEEpromBuf->NvramSubVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3287                 pEEpromBuf->NvramSubVendorID[1] =
3288                   (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3289                 pEEpromBuf->NvramSubSysID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3290                 pEEpromBuf->NvramSubSysID[1] =
3291                   (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3292                 pEEpromBuf->NvramSubClass = 0x00;
3293                 pEEpromBuf->NvramVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3294                 pEEpromBuf->NvramVendorID[1] =
3295                   (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3296                 pEEpromBuf->NvramDeviceID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3297                 pEEpromBuf->NvramDeviceID[1] =
3298                   (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3299                 pEEpromBuf->NvramReserved = 0x00;
3300
3301                 for (dAddr = 0, dpEeprom = (u_long *) pEEpromBuf->NvramTarget;
3302                     dAddr < 16; dAddr++, dpEeprom++) {
3303                         *dpEeprom = 0x00000077;
3304                         /* NvmTarCfg3,NvmTarCfg2,NvmTarPeriod,NvmTarCfg0 */
3305                 }
3306
3307                 *dpEeprom++ = 0x04000F07;
3308                 /* NvramMaxTag,NvramDelayTime,NvramChannelCfg,NvramScsiId */
3309                 *dpEeprom++ = 0x00000015;
3310                 /* NvramReserved1,NvramBootLun,NvramBootTarget,NvramReserved0 */
3311                 for (dAddr = 0; dAddr < 12; dAddr++, dpEeprom++)
3312                         *dpEeprom = 0x00;
3313                 pEEpromBuf->NvramCheckSum = 0x00;
3314                 for (wAddr = 0, wCheckSum = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3315                     wAddr < 63; wAddr++, wpEeprom++)
3316                         wCheckSum += *wpEeprom;
3317                 *wpEeprom = 0x1234 - wCheckSum;
3318                 NVRAM_trm_write_all(pEEpromBuf,pACB);
3319         }
3320         return;
3321 }
3322 static int
3323 trm_initAdapter(PACB pACB, u_int16_t unit)
3324 {
3325         PNVRAMTYPE      pEEpromBuf;
3326         u_int16_t       wval;
3327         u_int8_t        bval;
3328
3329         pEEpromBuf = &trm_eepromBuf[unit];
3330
3331         /* 250ms selection timeout */
3332         trm_reg_write8(SEL_TIMEOUT, TRMREG_SCSI_TIMEOUT);
3333         /* Mask all the interrupt */
3334         trm_reg_write8(0x00, TRMREG_DMA_INTEN);
3335         trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
3336         /* Reset SCSI module */
3337         trm_reg_write16(DO_RSTMODULE, TRMREG_SCSI_CONTROL);
3338         /* program configuration 0 */
3339         pACB->Config = HCC_AUTOTERM | HCC_PARITY;
3340         if (trm_reg_read8(TRMREG_GEN_STATUS) & WIDESCSI)
3341                 pACB->Config |= HCC_WIDE_CARD;
3342         if (pEEpromBuf->NvramChannelCfg & NAC_POWERON_SCSI_RESET)
3343                 pACB->Config |= HCC_SCSI_RESET;
3344         if (pACB->Config & HCC_PARITY)
3345                 bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
3346         else
3347                 bval = PHASELATCH | INITIATOR | BLOCKRST ;
3348         trm_reg_write8(bval,TRMREG_SCSI_CONFIG0);
3349         /* program configuration 1 */
3350         trm_reg_write8(0x13, TRMREG_SCSI_CONFIG1);
3351         /* program Host ID */
3352         bval = pEEpromBuf->NvramScsiId;
3353         trm_reg_write8(bval, TRMREG_SCSI_HOSTID);
3354         /* set ansynchronous transfer */
3355         trm_reg_write8(0x00, TRMREG_SCSI_OFFSET);
3356         /* Trun LED control off*/
3357         wval = trm_reg_read16(TRMREG_GEN_CONTROL) & 0x7F;
3358         trm_reg_write16(wval, TRMREG_GEN_CONTROL);
3359         /* DMA config */
3360         wval = trm_reg_read16(TRMREG_DMA_CONFIG) | DMA_ENHANCE;
3361         trm_reg_write16(wval, TRMREG_DMA_CONFIG);
3362         /* Clear pending interrupt status */
3363         trm_reg_read8(TRMREG_SCSI_INTSTATUS);
3364         /* Enable SCSI interrupt */
3365         trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
3366         trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
3367         return (0);
3368 }
3369
3370 static void
3371 trm_mapSRB(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3372 {
3373         PACB pACB;
3374
3375         pACB = (PACB)arg;
3376         pACB->srb_physbase = segs->ds_addr;
3377 }
3378
3379 static void
3380 trm_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3381 {
3382         bus_addr_t *baddr;
3383
3384         baddr = (bus_addr_t *)arg;
3385         *baddr = segs->ds_addr;
3386 }
3387
3388 static PACB
3389 trm_init(u_int16_t unit, device_t dev)
3390 {
3391         PACB            pACB;
3392         int             rid = PCIR_BAR(0), i = 0, j = 0;
3393         u_int16_t       adaptType = 0;
3394
3395         pACB = (PACB) device_get_softc(dev);
3396         if (!pACB) {
3397                 printf("trm%d: cannot allocate ACB !\n", unit);
3398                 return (NULL);
3399         }
3400         pACB->iores = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
3401             &rid, RF_ACTIVE);
3402         if (pACB->iores == NULL) {
3403                 printf("trm_init: bus_alloc_resource failed!\n");
3404                 return (NULL);
3405         }
3406         switch (pci_get_devid(dev)) {
3407         case PCI_DEVICEID_TRMS1040:
3408                 adaptType = 0;
3409                 break;
3410         case PCI_DEVICEID_TRMS2080:
3411                 adaptType = 1;
3412                 break;
3413         default:
3414                 printf("trm_init %d: unknown adapter type!\n", unit);
3415                 goto bad;
3416         }
3417         pACB->dev = dev;
3418         pACB->tag = rman_get_bustag(pACB->iores);
3419         pACB->bsh = rman_get_bushandle(pACB->iores);
3420         if (bus_dma_tag_create(
3421         /*parent_dmat*/ pACB->parent_dmat,
3422         /*alignment*/   1,
3423         /*boundary*/    0,
3424         /*lowaddr*/     BUS_SPACE_MAXADDR,
3425         /*highaddr*/    BUS_SPACE_MAXADDR,
3426         /*filter*/      NULL,
3427         /*filterarg*/   NULL,
3428         /*maxsize*/     MAXBSIZE,
3429         /*nsegments*/   TRM_NSEG,
3430         /*maxsegsz*/    TRM_MAXTRANSFER_SIZE,
3431         /*flags*/       BUS_DMA_ALLOCNOW,
3432         /*lockfunc*/    busdma_lock_mutex,
3433         /*lockarg*/     &Giant,
3434         /* dmat */      &pACB->buffer_dmat) != 0)
3435                 goto bad;
3436         /* DMA tag for our ccb structures */
3437         if (bus_dma_tag_create(
3438         /*parent_dmat*/pACB->parent_dmat,
3439         /*alignment*/  1,
3440         /*boundary*/   0,
3441         /*lowaddr*/    BUS_SPACE_MAXADDR,
3442         /*highaddr*/   BUS_SPACE_MAXADDR,
3443         /*filter*/     NULL,
3444         /*filterarg*/  NULL,
3445         /*maxsize*/    TRM_MAX_SRB_CNT * sizeof(TRM_SRB),
3446         /*nsegments*/  1,
3447         /*maxsegsz*/   TRM_MAXTRANSFER_SIZE,
3448         /*flags*/      0,
3449         /*lockfunc*/   busdma_lock_mutex,
3450         /*lockarg*/    &Giant,
3451         /*dmat*/       &pACB->srb_dmat) != 0) {
3452                 printf("trm_init %d: bus_dma_tag_create SRB failure\n", unit);
3453                 goto bad;
3454         }
3455         if (bus_dmamem_alloc(pACB->srb_dmat, (void **)&pACB->pFreeSRB,
3456             BUS_DMA_NOWAIT, &pACB->srb_dmamap) != 0) {
3457                 printf("trm_init %d: bus_dmamem_alloc SRB failure\n", unit);
3458                 goto bad;
3459         }
3460         bus_dmamap_load(pACB->srb_dmat, pACB->srb_dmamap, pACB->pFreeSRB,
3461             TRM_MAX_SRB_CNT * sizeof(TRM_SRB), trm_mapSRB, pACB,
3462             /* flags */0);
3463         /* Create, allocate, and map DMA buffers for autosense data */
3464         if (bus_dma_tag_create(/*parent_dmat*/NULL, /*alignment*/1,
3465             /*boundary*/0,
3466             /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
3467             /*highaddr*/BUS_SPACE_MAXADDR,
3468             /*filter*/NULL, /*filterarg*/NULL,
3469             sizeof(struct scsi_sense_data) * TRM_MAX_SRB_CNT,
3470             /*nsegments*/1,
3471             /*maxsegsz*/TRM_MAXTRANSFER_SIZE,
3472             /*flags*/0, /*lockfunc*/busdma_lock_mutex,
3473             /*lockarg*/&Giant, &pACB->sense_dmat) != 0) {
3474           if (bootverbose)
3475             device_printf(dev, "cannot create sense buffer dmat\n");
3476           goto bad;
3477         }
3478
3479         if (bus_dmamem_alloc(pACB->sense_dmat, (void **)&pACB->sense_buffers,
3480                              BUS_DMA_NOWAIT, &pACB->sense_dmamap) != 0)
3481                 goto bad;
3482
3483         bus_dmamap_load(pACB->sense_dmat, pACB->sense_dmamap,
3484                        pACB->sense_buffers,
3485                        sizeof(struct scsi_sense_data) * TRM_MAX_SRB_CNT,
3486                        trm_dmamap_cb, &pACB->sense_busaddr, /*flags*/0);
3487
3488         trm_check_eeprom(&trm_eepromBuf[unit],pACB);
3489         trm_initACB(pACB, adaptType, unit);
3490         for (i = 0; i < (pACB->max_id + 1); i++) {
3491                 if (pACB->AdaptSCSIID == i)
3492                         continue;
3493                 for(j = 0; j < (pACB->max_lun + 1); j++) {
3494                         pACB->scan_devices[i][j] = 1;
3495                         /* we assume we need to scan all devices */
3496                         trm_initDCB(pACB, &pACB->DCBarray[i][j], unit, i, j);
3497                 }
3498         }
3499         bzero(pACB->pFreeSRB, TRM_MAX_SRB_CNT * sizeof(TRM_SRB));
3500         if (bus_dma_tag_create(
3501                     /*parent_dmat*/NULL,
3502                     /*alignment*/  1,
3503                     /*boundary*/   0,
3504                     /*lowaddr*/    BUS_SPACE_MAXADDR,
3505                     /*highaddr*/   BUS_SPACE_MAXADDR,
3506                     /*filter*/     NULL,
3507                     /*filterarg*/  NULL,
3508                     /*maxsize*/    TRM_MAX_SG_LISTENTRY * sizeof(SGentry),
3509                     /*nsegments*/  1,
3510                     /*maxsegsz*/   TRM_MAXTRANSFER_SIZE,
3511                     /*flags*/      0,
3512                     /*lockfunc*/   busdma_lock_mutex,
3513                     /*lockarg*/    &Giant,
3514                     /*dmat*/       &pACB->sg_dmat) != 0)
3515                 goto bad;
3516
3517         if (trm_initSRB(pACB)) {
3518                 printf("trm_initSRB: error\n");
3519                 goto bad;
3520         }
3521         if (trm_initAdapter(pACB, unit)) {
3522                 printf("trm_initAdapter: initial ERROR\n");
3523                 goto bad;
3524         }
3525         return (pACB);
3526 bad:
3527         if (pACB->iores)
3528                 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
3529                     pACB->iores);
3530         if (pACB->sense_dmamap) {
3531                 bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3532                 bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3533                     pACB->sense_dmamap);
3534                 bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3535         }
3536         if (pACB->sense_dmat)
3537                 bus_dma_tag_destroy(pACB->sense_dmat);
3538         if (pACB->sg_dmat) {
3539                 trm_destroySRB(pACB);
3540                 bus_dma_tag_destroy(pACB->sg_dmat);
3541         }
3542         if (pACB->srb_dmamap) {
3543                 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3544                 bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3545                     pACB->srb_dmamap);
3546                 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3547         }
3548         if (pACB->srb_dmat)
3549                 bus_dma_tag_destroy(pACB->srb_dmat);
3550         if (pACB->buffer_dmat)
3551                 bus_dma_tag_destroy(pACB->buffer_dmat);
3552         return (NULL);
3553 }
3554
3555 static int
3556 trm_attach(device_t dev)
3557 {
3558         struct  cam_devq *device_Q;
3559         u_long  device_id;
3560         PACB    pACB = 0;
3561         int     rid = 0;
3562         int unit = device_get_unit(dev);
3563
3564         device_id = pci_get_devid(dev);
3565         /*
3566          * These cards do not allow memory mapped accesses
3567          */
3568         if ((pACB = trm_init((u_int16_t) unit,
3569             dev)) == NULL) {
3570                 printf("trm%d: trm_init error!\n",unit);
3571                 return (ENXIO);
3572         }
3573         /* After setting up the adapter, map our interrupt */
3574         /*
3575          * Now let the CAM generic SCSI layer find the SCSI devices on the bus
3576          * start queue to reset to the idle loop.
3577          * Create device queue of SIM(s)
3578          * (MAX_START_JOB - 1) : max_sim_transactions
3579          */
3580         pACB->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3581             RF_SHAREABLE | RF_ACTIVE);
3582         if (pACB->irq == NULL ||
3583             bus_setup_intr(dev, pACB->irq,
3584             INTR_TYPE_CAM, trm_Interrupt, pACB, &pACB->ih)) {
3585                 printf("trm%d: register Interrupt handler error!\n", unit);
3586                 goto bad;
3587         }
3588         device_Q = cam_simq_alloc(TRM_MAX_START_JOB);
3589         if (device_Q == NULL){
3590                 printf("trm%d: device_Q == NULL !\n",unit);
3591                 goto bad;
3592         }
3593         /*
3594          * Now tell the generic SCSI layer
3595          * about our bus.
3596          * If this is the xpt layer creating a sim, then it's OK
3597          * to wait for an allocation.
3598          * XXX Should we pass in a flag to indicate that wait is OK?
3599          *
3600          *                    SIM allocation
3601          *
3602          *                 SCSI Interface Modules
3603          * The sim driver creates a sim for each controller.  The sim device
3604          * queue is separately created in order to allow resource sharing betwee
3605          * sims.  For instance, a driver may create one sim for each channel of
3606          * a multi-channel controller and use the same queue for each channel.
3607          * In this way, the queue resources are shared across all the channels
3608          * of the multi-channel controller.
3609          * trm_action     : sim_action_func
3610          * trm_poll       : sim_poll_func
3611          * "trm"        : sim_name ,if sim_name =  "xpt" ..M_DEVBUF,M_WAITOK
3612          * pACB         : *softc    if sim_name <> "xpt" ..M_DEVBUF,M_NOWAIT
3613          * pACB->unit   : unit
3614          * 1            : max_dev_transactions
3615          * MAX_TAGS     : max_tagged_dev_transactions
3616          *
3617          *  *******Construct our first channel SIM entry
3618          */
3619         pACB->psim = cam_sim_alloc(trm_action,
3620             trm_poll,
3621             "trm",
3622             pACB,
3623             unit,
3624             1,
3625             TRM_MAX_TAGS_CMD_QUEUE,
3626             device_Q);
3627         if (pACB->psim == NULL) {
3628                 printf("trm%d: SIM allocate fault !\n",unit);
3629                 cam_simq_free(device_Q);  /* SIM allocate fault*/
3630                 goto bad;
3631         }
3632         if (xpt_bus_register(pACB->psim, 0) != CAM_SUCCESS)  {
3633                 printf("trm%d: xpt_bus_register fault !\n",unit);
3634                 goto bad;
3635         }
3636         if (xpt_create_path(&pACB->ppath,
3637               NULL,
3638               cam_sim_path(pACB->psim),
3639               CAM_TARGET_WILDCARD,
3640               CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3641                 printf("trm%d: xpt_create_path fault !\n",unit);
3642                 xpt_bus_deregister(cam_sim_path(pACB->psim));
3643                 goto bad;
3644         }
3645         return (0);
3646 bad:
3647         if (pACB->iores)
3648                 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
3649                     pACB->iores);
3650         if (pACB->sg_dmat) {
3651                 trm_destroySRB(pACB);
3652                 bus_dma_tag_destroy(pACB->sg_dmat);
3653         }
3654
3655         if (pACB->srb_dmamap) {
3656                 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3657                 bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3658                     pACB->srb_dmamap);
3659                 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3660         }
3661         if (pACB->srb_dmat)
3662                 bus_dma_tag_destroy(pACB->srb_dmat);
3663         if (pACB->sense_dmamap) {
3664                   bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3665                   bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3666                       pACB->sense_dmamap);
3667                   bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3668         }
3669         if (pACB->sense_dmat)
3670                 bus_dma_tag_destroy(pACB->sense_dmat);
3671         if (pACB->buffer_dmat)
3672                 bus_dma_tag_destroy(pACB->buffer_dmat);
3673         if (pACB->ih)
3674                 bus_teardown_intr(dev, pACB->irq, pACB->ih);
3675         if (pACB->irq)
3676                 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3677         if (pACB->psim)
3678                 cam_sim_free(pACB->psim, TRUE);
3679
3680         return (ENXIO);
3681
3682 }
3683
3684 /*
3685 *                  pci_device
3686 *         trm_probe (device_t tag, pcidi_t type)
3687 *
3688 */
3689 static int
3690 trm_probe(device_t dev)
3691 {
3692         switch (pci_get_devid(dev)) {
3693         case PCI_DEVICEID_TRMS1040:
3694                 device_set_desc(dev,
3695                     "Tekram DC395U/UW/F DC315/U Fast20 Wide SCSI Adapter");
3696                 return (BUS_PROBE_DEFAULT);
3697         case PCI_DEVICEID_TRMS2080:
3698                 device_set_desc(dev,
3699                     "Tekram DC395U2D/U2W Fast40 Wide SCSI Adapter");
3700                 return (BUS_PROBE_DEFAULT);
3701         default:
3702                 return (ENXIO);
3703         }
3704 }
3705
3706 static int
3707 trm_detach(device_t dev)
3708 {
3709         PACB pACB = device_get_softc(dev);
3710
3711         bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), pACB->iores);
3712         trm_destroySRB(pACB);
3713         bus_dma_tag_destroy(pACB->sg_dmat);
3714         bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3715         bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3716             pACB->srb_dmamap);
3717         bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3718         bus_dma_tag_destroy(pACB->srb_dmat);
3719         bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3720         bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3721             pACB->sense_dmamap);
3722         bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3723         bus_dma_tag_destroy(pACB->sense_dmat);
3724         bus_dma_tag_destroy(pACB->buffer_dmat);
3725         bus_teardown_intr(dev, pACB->irq, pACB->ih);
3726         bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3727         xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL);
3728         xpt_free_path(pACB->ppath);
3729         xpt_bus_deregister(cam_sim_path(pACB->psim));
3730         cam_sim_free(pACB->psim, TRUE);
3731         return (0);
3732 }
3733 static device_method_t trm_methods[] = {
3734         /* Device interface */
3735         DEVMETHOD(device_probe,         trm_probe),
3736         DEVMETHOD(device_attach,        trm_attach),
3737         DEVMETHOD(device_detach,        trm_detach),
3738         { 0, 0 }
3739 };
3740
3741 static driver_t trm_driver = {
3742         "trm", trm_methods, sizeof(struct _ACB)
3743 };
3744
3745 static devclass_t trm_devclass;
3746 DRIVER_MODULE(trm, pci, trm_driver, trm_devclass, 0, 0);
3747 MODULE_DEPEND(trm, cam, 1, 1, 1);