sys/dev/trm/trm.c

   1 /*
   2  *      O.S   : FreeBSD CAM
   3  *      FILE NAME  : trm.c
   4  *           BY    : C.L. Huang         (ching@tekram.com.tw)
   5  *                   Erich Chen     (erich@tekram.com.tw)
   6  *      Description: Device Driver for Tekram SCSI adapters
   7  *                   DC395U/UW/F ,DC315/U(TRM-S1040)
   8  *                   DC395U2D/U2W(TRM-S2080)
   9  *                   PCI SCSI Bus Master Host Adapter
  10  *                   (SCSI chip set used Tekram ASIC TRM-S1040,TRM-S2080)
  11  */
  12
  13 #include <sys/cdefs.h>
  14 __FBSDID("$FreeBSD$");
  15
  16 /*
  17  *      HISTORY:
  18  *
  19  *      REV#    DATE    NAME            DESCRIPTION
  20  *  1.05   05/01/1999  ERICH CHEN  First released for 3.x.x (CAM)
  21  *  1.06   07/29/1999  ERICH CHEN  Modify for NEW PCI
  22  *  1.07   12/12/1999  ERICH CHEN  Modify for 3.3.x ,DCB no free
  23  *  1.08   06/12/2000  ERICH CHEN  Modify for 4.x.x
  24  *  1.09   11/03/2000  ERICH CHEN  Modify for 4.1.R ,new sim
  25  *  1.10   10/10/2001  Oscar Feng  Fixed CAM rescan hang up bug.
  26  *  1.11   10/13/2001  Oscar Feng  Fixed wrong Async speed display bug.
  27  */
  28
  29 /*-
  30  * (C)Copyright 1995-2001 Tekram Technology Co.,Ltd.
  31  *
  32  * Redistribution and use in source and binary forms, with or without
  33  * modification, are permitted provided that the following conditions
  34  * are met:
  35  * 1. Redistributions of source code must retain the above copyright
  36  *    notice, this list of conditions and the following disclaimer.
  37  * 2. Redistributions in binary form must reproduce the above copyright
  38  *    notice, this list of conditions and the following disclaimer in the
  39  *    documentation and/or other materials provided with the distribution.
  40  * 3. The name of the author may not be used to endorse or promote products
  41  *    derived from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  44  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  45  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  46  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  47  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  48  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  49  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  50  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  51  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  52  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53  *
  54  */
  55
  56 /*
  57  * Imported into FreeBSD source repository, and updated to compile under
  58  * FreeBSD-3.0-DEVELOPMENT, by Stefan Esser <se@FreeBSD.Org>, 1996-12-17
  59  */
  60
  61 /*
  62  * Updated to compile under FreeBSD 5.0-CURRENT by Olivier Houchard
  63  * <doginou@ci0.org>, 2002-03-04
  64  */
  65
  66 #include <sys/param.h>
  67
  68 #include <sys/systm.h>
  69 #include <sys/malloc.h>
  70 #include <sys/queue.h>
  71 #if __FreeBSD_version >= 500000
  72 #include <sys/bio.h>
  73 #endif
  74 #include <sys/buf.h>
  75 #include <sys/bus.h>
  76 #include <sys/kernel.h>
  77 #include <sys/module.h>
  78
  79 #include <vm/vm.h>
  80 #include <vm/pmap.h>
  81
  82 #include <dev/pci/pcivar.h>
  83 #include <dev/pci/pcireg.h>
  84 #include <machine/resource.h>
  85 #include <machine/bus.h>
  86 #include <machine/clock.h>
  87 #include <sys/rman.h>
  88
  89 #include <cam/cam.h>
  90 #include <cam/cam_ccb.h>
  91 #include <cam/cam_sim.h>
  92 #include <cam/cam_xpt_sim.h>
  93 #include <cam/cam_debug.h>
  94
  95 #include <cam/scsi/scsi_all.h>
  96 #include <cam/scsi/scsi_message.h>
  97
  98 #include <dev/trm/trm.h>
  99
 100 #define trm_reg_read8(reg)      bus_space_read_1(pACB->tag, pACB->bsh, reg)
 101 #define trm_reg_read16(reg)     bus_space_read_2(pACB->tag, pACB->bsh, reg)
 102 #define trm_reg_read32(reg)     bus_space_read_4(pACB->tag, pACB->bsh, reg)
 103 #define trm_reg_write8(value,reg)       bus_space_write_1(pACB->tag, pACB->bsh,\
 104                 reg, value)
 105 #define trm_reg_write16(value,reg)      bus_space_write_2(pACB->tag, pACB->bsh,\
 106                 reg, value)
 107 #define trm_reg_write32(value,reg)      bus_space_write_4(pACB->tag, pACB->bsh,\
 108                 reg, value)
 109
 110 #define PCI_Vendor_ID_TEKRAM    0x1DE1
 111 #define PCI_Device_ID_TRM_S1040 0x0391
 112 #define PCI_DEVICEID_TRMS1040   0x03911DE1
 113 #define PCI_DEVICEID_TRMS2080   0x03921DE1
 114
 115 #ifdef trm_DEBUG1
 116 #define TRM_DPRINTF(fmt, arg...) printf("trm: " fmt, ##arg)
 117 #else
 118 #define TRM_DPRINTF(fmt, arg...) {}
 119 #endif /* TRM_DEBUG */
 120
 121 static void     trm_check_eeprom(PNVRAMTYPE pEEpromBuf,PACB pACB);
 122 static void     NVRAM_trm_read_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
 123 static u_int8_t NVRAM_trm_get_data(PACB pACB, u_int8_t bAddr);
 124 static void     NVRAM_trm_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
 125 static void     NVRAM_trm_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData);
 126 static void     NVRAM_trm_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr);
 127 static void     NVRAM_trm_wait_30us(PACB pACB);
 128
 129 static void     trm_Interrupt(void *vpACB);
 130 static void     trm_DataOutPhase0(PACB pACB, PSRB pSRB,
 131                                          u_int16_t * pscsi_status);
 132 static void     trm_DataInPhase0(PACB pACB, PSRB pSRB,
 133                                         u_int16_t * pscsi_status);
 134 static void     trm_CommandPhase0(PACB pACB, PSRB pSRB,
 135                                          u_int16_t * pscsi_status);
 136 static void     trm_StatusPhase0(PACB pACB, PSRB pSRB,
 137                                         u_int16_t * pscsi_status);
 138 static void     trm_MsgOutPhase0(PACB pACB, PSRB pSRB,
 139                                         u_int16_t * pscsi_status);
 140 static void     trm_MsgInPhase0(PACB pACB, PSRB pSRB,
 141                                         u_int16_t * pscsi_status);
 142 static void     trm_DataOutPhase1(PACB pACB, PSRB pSRB,
 143                                          u_int16_t * pscsi_status);
 144 static void     trm_DataInPhase1(PACB pACB, PSRB pSRB,
 145                                         u_int16_t * pscsi_status);
 146 static void     trm_CommandPhase1(PACB pACB, PSRB pSRB,
 147                                          u_int16_t * pscsi_status);
 148 static void     trm_StatusPhase1(PACB pACB, PSRB pSRB,
 149                                         u_int16_t * pscsi_status);
 150 static void     trm_MsgOutPhase1(PACB pACB, PSRB pSRB,
 151                                         u_int16_t * pscsi_status);
 152 static void     trm_MsgInPhase1(PACB pACB, PSRB pSRB,
 153                                         u_int16_t * pscsi_status);
 154 static void     trm_Nop0(PACB pACB, PSRB pSRB, u_int16_t * pscsi_status);
 155 static void     trm_Nop1(PACB pACB, PSRB pSRB, u_int16_t * pscsi_status);
 156 static void     trm_SetXferRate(PACB pACB, PSRB pSRB,PDCB pDCB);
 157 static void     trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir);
 158 static void     trm_Disconnect(PACB pACB);
 159 static void     trm_Reselect(PACB pACB);
 160 static void     trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB);
 161 static void     trm_DoingSRB_Done(PACB pACB);
 162 static void     trm_ScsiRstDetect(PACB pACB);
 163 static void     trm_ResetSCSIBus(PACB pACB);
 164 static void     trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB);
 165 static void     trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB);
 166 static void     trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB);
 167 static void     trm_SendSRB(PACB pACB, PSRB pSRB);
 168 static int      trm_probe(device_t tag);
 169 static int      trm_attach(device_t tag);
 170 static void     trm_reset(PACB pACB);
 171
 172 static u_int16_t        trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB);
 173
 174 static int      trm_initAdapter(PACB pACB, u_int16_t unit);
 175 static void     trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,
 176                                         u_int32_t i, u_int32_t j);
 177 static int      trm_initSRB(PACB pACB);
 178 static void     trm_initACB(PACB pACB, u_int8_t adaptType, u_int16_t unit);
 179 /* CAM SIM entry points */
 180 #define ccb_trmsrb_ptr spriv_ptr0
 181 #define ccb_trmacb_ptr spriv_ptr1
 182 static void     trm_action(struct cam_sim *psim, union ccb *pccb);
 183 static void     trm_poll(struct cam_sim *psim);
 184
 185
 186 static void * trm_SCSI_phase0[] = {
 187         trm_DataOutPhase0,    /* phase:0 */
 188         trm_DataInPhase0,     /* phase:1 */
 189         trm_CommandPhase0,    /* phase:2 */
 190         trm_StatusPhase0,     /* phase:3 */
 191         trm_Nop0,             /* phase:4 */
 192         trm_Nop1,             /* phase:5 */
 193         trm_MsgOutPhase0,     /* phase:6 */
 194         trm_MsgInPhase0,      /* phase:7 */
 195 };
 196
 197 /*
 198  *
 199  *          stateV = (void *) trm_SCSI_phase1[phase]
 200  *
 201  */
 202 static void * trm_SCSI_phase1[] = {
 203         trm_DataOutPhase1,    /* phase:0 */
 204         trm_DataInPhase1,     /* phase:1 */
 205         trm_CommandPhase1,    /* phase:2 */
 206         trm_StatusPhase1,     /* phase:3 */
 207         trm_Nop0,             /* phase:4 */
 208         trm_Nop1,             /* phase:5 */
 209         trm_MsgOutPhase1,     /* phase:6 */
 210         trm_MsgInPhase1,      /* phase:7 */
 211 };
 212
 213
 214 NVRAMTYPE trm_eepromBuf[TRM_MAX_ADAPTER_NUM];
 215 /*
 216  *Fast20:  000   50ns, 20.0 Mbytes/s
 217  *             001       75ns, 13.3 Mbytes/s
 218  *             010      100ns, 10.0 Mbytes/s
 219  *             011      125ns,  8.0 Mbytes/s
 220  *             100      150ns,  6.6 Mbytes/s
 221  *             101      175ns,  5.7 Mbytes/s
 222  *             110      200ns,  5.0 Mbytes/s
 223  *             111      250ns,  4.0 Mbytes/s
 224  *
 225  *Fast40:  000   25ns, 40.0 Mbytes/s
 226  *             001       50ns, 20.0 Mbytes/s
 227  *             010       75ns, 13.3 Mbytes/s
 228  *             011      100ns, 10.0 Mbytes/s
 229  *             100      125ns,  8.0 Mbytes/s
 230  *             101      150ns,  6.6 Mbytes/s
 231  *             110      175ns,  5.7 Mbytes/s
 232  *             111      200ns,  5.0 Mbytes/s
 233  */
 234                                              /* real period: */
 235 u_int8_t dc395x_clock_period[] = {
 236         12,/*  48  ns 20   MB/sec */
 237         18,/*  72  ns 13.3 MB/sec */
 238         25,/* 100  ns 10.0 MB/sec */
 239         31,/* 124  ns  8.0 MB/sec */
 240         37,/* 148  ns  6.6 MB/sec */
 241         43,/* 172  ns  5.7 MB/sec */
 242         50,/* 200  ns  5.0 MB/sec */
 243         62 /* 248  ns  4.0 MB/sec */
 244 };
 245
 246 u_int8_t dc395u2x_clock_period[]={
 247         10,/*  25  ns 40.0 MB/sec */
 248         12,/*  48  ns 20.0 MB/sec */
 249         18,/*  72  ns 13.3 MB/sec */
 250         25,/* 100  ns 10.0 MB/sec */
 251         31,/* 124  ns  8.0 MB/sec */
 252         37,/* 148  ns  6.6 MB/sec */
 253         43,/* 172  ns  5.7 MB/sec */
 254         50,/* 200  ns  5.0 MB/sec */
 255 };
 256
 257 #define  dc395x_tinfo_period           dc395x_clock_period
 258 #define  dc395u2x_tinfo_period         dc395u2x_clock_period
 259
 260 static PSRB
 261 trm_GetSRB(PACB pACB)
 262 {
 263         int     intflag;
 264         PSRB    pSRB;
 265
 266         intflag = splcam();
 267         pSRB = pACB->pFreeSRB;
 268         if (pSRB) {
 269                 pACB->pFreeSRB = pSRB->pNextSRB;
 270                 pSRB->pNextSRB = NULL;
 271         }
 272         splx(intflag);
 273         return (pSRB);
 274 }
 275
 276 static void
 277 trm_RewaitSRB0(PDCB pDCB, PSRB pSRB)
 278 {
 279         PSRB    psrb1;
 280         int     intflag;
 281
 282         intflag = splcam();
 283         if ((psrb1 = pDCB->pWaitingSRB)) {
 284                 pSRB->pNextSRB = psrb1;
 285                 pDCB->pWaitingSRB = pSRB;
 286         } else {
 287                 pSRB->pNextSRB = NULL;
 288                 pDCB->pWaitingSRB = pSRB;
 289                 pDCB->pWaitingLastSRB = pSRB;
 290         }
 291         splx(intflag);
 292 }
 293
 294 static void
 295 trm_RewaitSRB(PDCB pDCB, PSRB pSRB)
 296 {
 297         PSRB    psrb1;
 298         int     intflag;
 299
 300         intflag = splcam();
 301         pDCB->GoingSRBCnt--;
 302         psrb1 = pDCB->pGoingSRB;
 303         if (pSRB == psrb1)
 304                 /*
 305                  * if this SRB is GoingSRB
 306                  * remove this SRB from GoingSRB Q
 307                  */
 308                 pDCB->pGoingSRB = psrb1->pNextSRB;
 309         else {
 310                 /*
 311                  * if this SRB is not current GoingSRB
 312                  * remove this SRB from GoingSRB Q
 313                  */
 314                 while (pSRB != psrb1->pNextSRB)
 315                         psrb1 = psrb1->pNextSRB;
 316                 psrb1->pNextSRB = pSRB->pNextSRB;
 317                 if (pSRB == pDCB->pGoingLastSRB)
 318                         pDCB->pGoingLastSRB = psrb1;
 319         }
 320         if ((psrb1 = pDCB->pWaitingSRB)) {
 321                 /*
 322                  * if WaitingSRB Q is not NULL
 323                  * Q back this SRB into WaitingSRB
 324                  */
 325
 326                 pSRB->pNextSRB = psrb1;
 327                 pDCB->pWaitingSRB = pSRB;
 328         } else {
 329                 pSRB->pNextSRB = NULL;
 330                 pDCB->pWaitingSRB = pSRB;
 331                 pDCB->pWaitingLastSRB = pSRB;
 332         }
 333         splx(intflag);
 334 }
 335
 336 static void
 337 trm_DoWaitingSRB(PACB pACB)
 338 {
 339         int     intflag;
 340         PDCB    ptr, ptr1;
 341         PSRB    pSRB;
 342
 343         intflag = splcam();
 344         if (!(pACB->pActiveDCB) &&
 345             !(pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
 346                 ptr = pACB->pDCBRunRobin;
 347                 if (!ptr) {
 348                         ptr = pACB->pLinkDCB;
 349                         pACB->pDCBRunRobin = ptr;
 350                 }
 351                 ptr1 = ptr;
 352                 for (;ptr1 ;) {
 353                         pACB->pDCBRunRobin = ptr1->pNextDCB;
 354                         if (!(ptr1->MaxActiveCommandCnt > ptr1->GoingSRBCnt)
 355                             || !(pSRB = ptr1->pWaitingSRB)) {
 356                                 if (pACB->pDCBRunRobin == ptr)
 357                                         break;
 358                                 ptr1 = ptr1->pNextDCB;
 359                         } else {
 360                                 if (!trm_StartSCSI(pACB, ptr1, pSRB)) {
 361                                 /*
 362                                  * If trm_StartSCSI return 0 :
 363                                  * current interrupt status is interrupt enable
 364                                  * It's said that SCSI processor is unoccupied
 365                                  */
 366                                         ptr1->GoingSRBCnt++;
 367                                         if (ptr1->pWaitingLastSRB == pSRB) {
 368                                                 ptr1->pWaitingSRB = NULL;
 369                                                 ptr1->pWaitingLastSRB = NULL;
 370                                         } else
 371                                                 ptr1->pWaitingSRB = pSRB->pNextSRB;
 372                                         pSRB->pNextSRB = NULL;
 373                                         if (ptr1->pGoingSRB)
 374                                                 ptr1->pGoingLastSRB->pNextSRB = pSRB;
 375                                         else
 376                                                 ptr1->pGoingSRB = pSRB;
 377                                         ptr1->pGoingLastSRB = pSRB;
 378                                 }
 379                                 break;
 380                         }
 381                 }
 382         }
 383         splx(intflag);
 384         return;
 385 }
 386
 387 static void
 388 trm_SRBwaiting(PDCB pDCB, PSRB pSRB)
 389 {
 390
 391         if (pDCB->pWaitingSRB) {
 392                 pDCB->pWaitingLastSRB->pNextSRB = pSRB;
 393                 pDCB->pWaitingLastSRB = pSRB;
 394                 pSRB->pNextSRB = NULL;
 395         } else {
 396                 pDCB->pWaitingSRB = pSRB;
 397                 pDCB->pWaitingLastSRB = pSRB;
 398         }
 399 }
 400
 401 static u_int32_t
 402 trm_get_sense_bufaddr(PACB pACB, PSRB pSRB)
 403 {
 404         int offset;
 405
 406         offset = pSRB->TagNumber;
 407         return (pACB->sense_busaddr +
 408             (offset * sizeof(struct scsi_sense_data)));
 409 }
 410
 411 static struct scsi_sense_data *
 412 trm_get_sense_buf(PACB pACB, PSRB pSRB)
 413 {
 414         int offset;
 415
 416         offset = pSRB->TagNumber;
 417         return (&pACB->sense_buffers[offset]);
 418 }
 419 static void
 420 trm_ExecuteSRB(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
 421 {
 422         int             flags;
 423         PACB            pACB;
 424         PSRB            pSRB;
 425         union ccb       *ccb;
 426         u_long          totalxferlen=0;
 427
 428         flags = splcam();
 429         pSRB = (PSRB)arg;
 430         ccb = pSRB->pccb;
 431         pACB = (PACB)ccb->ccb_h.ccb_trmacb_ptr;
 432         TRM_DPRINTF("trm_ExecuteSRB..........\n");
 433         if (nseg != 0) {
 434                 PSEG                    psg;
 435                 bus_dma_segment_t       *end_seg;
 436                 int                     op;
 437
 438                 /* Copy the segments into our SG list */
 439                 end_seg = dm_segs + nseg;
 440                 psg = pSRB->pSRBSGL;
 441                 while (dm_segs < end_seg) {
 442                         psg->address = dm_segs->ds_addr;
 443                         psg->length = (u_long)dm_segs->ds_len;
 444                         totalxferlen += dm_segs->ds_len;
 445                         psg++;
 446                         dm_segs++;
 447                 }
 448                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
 449                         op = BUS_DMASYNC_PREREAD;
 450                 } else {
 451                         op = BUS_DMASYNC_PREWRITE;
 452                 }
 453                 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
 454         }
 455         pSRB->RetryCnt = 0;
 456         pSRB->SRBTotalXferLength = totalxferlen;
 457         pSRB->SRBSGCount = nseg;
 458         pSRB->SRBSGIndex = 0;
 459         pSRB->AdaptStatus = 0;
 460         pSRB->TargetStatus = 0;
 461         pSRB->MsgCnt = 0;
 462         pSRB->SRBStatus = 0;
 463         pSRB->SRBFlag = 0;
 464         pSRB->SRBState = 0;
 465         pSRB->ScsiPhase = PH_BUS_FREE; /* SCSI bus free Phase */
 466
 467         if (ccb->ccb_h.status != CAM_REQ_INPROG) {
 468                 if (nseg != 0)
 469                         bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
 470                 pSRB->pNextSRB = pACB->pFreeSRB;
 471                 pACB->pFreeSRB = pSRB;
 472                 xpt_done(ccb);
 473                 splx(flags);
 474                 return;
 475         }
 476         ccb->ccb_h.status |= CAM_SIM_QUEUED;
 477 #if 0
 478         /* XXX Need a timeout handler */
 479         ccb->ccb_h.timeout_ch = timeout(trmtimeout, (caddr_t)srb, (ccb->ccb_h.timeout * hz) / 1000);
 480 #endif
 481         trm_SendSRB(pACB, pSRB);
 482         splx(flags);
 483         return;
 484 }
 485
 486 static void
 487 trm_SendSRB(PACB pACB, PSRB pSRB)
 488 {
 489         PDCB    pDCB;
 490
 491         pDCB = pSRB->pSRBDCB;
 492         if (!(pDCB->MaxActiveCommandCnt > pDCB->GoingSRBCnt) || (pACB->pActiveDCB)
 493             || (pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
 494                 TRM_DPRINTF("pDCB->MaxCommand=%d \n",pDCB->MaxActiveCommandCnt);
 495                 TRM_DPRINTF("pDCB->GoingSRBCnt=%d \n",pDCB->GoingSRBCnt);
 496                 TRM_DPRINTF("pACB->pActiveDCB=%8x \n",(u_int)pACB->pActiveDCB);
 497                 TRM_DPRINTF("pACB->ACBFlag=%x \n",pACB->ACBFlag);
 498                 trm_SRBwaiting(pDCB, pSRB);
 499                 goto SND_EXIT;
 500         }
 501
 502         if (pDCB->pWaitingSRB) {
 503                 trm_SRBwaiting(pDCB, pSRB);
 504                 pSRB = pDCB->pWaitingSRB;
 505                 pDCB->pWaitingSRB = pSRB->pNextSRB;
 506                 pSRB->pNextSRB = NULL;
 507         }
 508
 509         if (!trm_StartSCSI(pACB, pDCB, pSRB)) {
 510         /*
 511          * If trm_StartSCSI return 0 :
 512          * current interrupt status is interrupt enable
 513          * It's said that SCSI processor is unoccupied
 514          */
 515                 pDCB->GoingSRBCnt++; /* stack waiting SRB*/
 516                 if (pDCB->pGoingSRB) {
 517                         pDCB->pGoingLastSRB->pNextSRB = pSRB;
 518                         pDCB->pGoingLastSRB = pSRB;
 519                 } else {
 520                         pDCB->pGoingSRB = pSRB;
 521                         pDCB->pGoingLastSRB = pSRB;
 522                 }
 523         } else {
 524         /*
 525          * If trm_StartSCSI return 1 :
 526          * current interrupt status is interrupt disreenable
 527          * It's said that SCSI processor has more one SRB need to do
 528          */
 529                 trm_RewaitSRB0(pDCB, pSRB);
 530         }
 531 SND_EXIT:
 532         return;
 533 }
 534
 535
 536 static void
 537 trm_action(struct cam_sim *psim, union ccb *pccb)
 538 {
 539         PACB    pACB;
 540         int     actionflags;
 541         u_int   target_id,target_lun;
 542
 543         CAM_DEBUG(pccb->ccb_h.path, CAM_DEBUG_TRACE, ("trm_action\n"));
 544
 545         actionflags = splcam();
 546         pACB = (PACB) cam_sim_softc(psim);
 547         target_id  = pccb->ccb_h.target_id;
 548         target_lun = pccb->ccb_h.target_lun;
 549
 550         switch (pccb->ccb_h.func_code) {
 551                 case XPT_NOOP:
 552                         TRM_DPRINTF(" XPT_NOOP \n");
 553                         pccb->ccb_h.status = CAM_REQ_INVALID;
 554                         xpt_done(pccb);
 555                         break;
 556                 /*
 557                  * Execute the requested I/O operation
 558                  */
 559                 case XPT_SCSI_IO: {
 560                         PDCB                    pDCB = NULL;
 561                         PSRB                    pSRB;
 562                         struct ccb_scsiio       *pcsio;
 563
 564                         pcsio = &pccb->csio;
 565                         TRM_DPRINTF(" XPT_SCSI_IO \n");
 566                         TRM_DPRINTF("trm: target_id= %d target_lun= %d \n"
 567                              ,target_id, target_lun);
 568                         TRM_DPRINTF(
 569                             "pACB->scan_devices[target_id][target_lun]= %d \n"
 570                             ,pACB->scan_devices[target_id][target_lun]);
 571                         if ((pccb->ccb_h.status & CAM_STATUS_MASK) !=
 572                             CAM_REQ_INPROG) {
 573                                 xpt_done(pccb);
 574                                 splx(actionflags);
 575                                 return;
 576                         }
 577                         pDCB = &pACB->DCBarray[target_id][target_lun];
 578                         if (!(pDCB->DCBstatus & DS_IN_QUEUE)) {
 579                                 pACB->scan_devices[target_id][target_lun] = 1;
 580                                 trm_initDCB(pACB, pDCB, pACB->AdapterUnit,
 581                                     target_id, target_lun);
 582                         }
 583                         /*
 584                          * Assign an SRB and connect it with this ccb.
 585                          */
 586                         pSRB = trm_GetSRB(pACB);
 587                         if (!pSRB) {
 588                                 /* Freeze SIMQ */
 589                                 pccb->ccb_h.status = CAM_RESRC_UNAVAIL;
 590                                 xpt_done(pccb);
 591                                 splx(actionflags);
 592                                 return;
 593                         }
 594                         pSRB->pSRBDCB = pDCB;
 595                         pccb->ccb_h.ccb_trmsrb_ptr = pSRB;
 596                         pccb->ccb_h.ccb_trmacb_ptr = pACB;
 597                         pSRB->pccb = pccb;
 598                         pSRB->ScsiCmdLen = pcsio->cdb_len;
 599                         /*
 600                          * move layer of CAM command block to layer of SCSI
 601                          * Request Block for SCSI processor command doing
 602                          */
 603                         if ((pccb->ccb_h.flags & CAM_CDB_POINTER) != 0) {
 604                                 if ((pccb->ccb_h.flags & CAM_CDB_PHYS) == 0) {
 605                                         bcopy(pcsio->cdb_io.cdb_ptr,pSRB->CmdBlock
 606                                             ,pcsio->cdb_len);
 607                                 } else {
 608                                         pccb->ccb_h.status = CAM_REQ_INVALID;
 609                                         pSRB->pNextSRB = pACB->pFreeSRB;
 610                                         pACB->pFreeSRB=  pSRB;
 611                                         xpt_done(pccb);
 612                                         splx(actionflags);
 613                                         return;
 614                                 }
 615                         } else
 616                                 bcopy(pcsio->cdb_io.cdb_bytes,
 617                                     pSRB->CmdBlock, pcsio->cdb_len);
 618                         if ((pccb->ccb_h.flags & CAM_DIR_MASK)
 619                             != CAM_DIR_NONE) {
 620                                 if ((pccb->ccb_h.flags &
 621                                       CAM_SCATTER_VALID) == 0) {
 622                                         if ((pccb->ccb_h.flags
 623                                               & CAM_DATA_PHYS) == 0) {
 624                                                 int vmflags;
 625                                                 int error;
 626
 627                                                 vmflags = splsoftvm();
 628                                                 error = bus_dmamap_load(
 629                                                     pACB->buffer_dmat,
 630                                                     pSRB->dmamap,
 631                                                     pcsio->data_ptr,
 632                                                     pcsio->dxfer_len,
 633                                                     trm_ExecuteSRB,
 634                                                     pSRB,
 635                                                     0);
 636                                                 if (error == EINPROGRESS) {
 637                                                         xpt_freeze_simq(
 638                                                             pACB->psim,
 639                                                             1);
 640                                                         pccb->ccb_h.status |=
 641                                                           CAM_RELEASE_SIMQ;
 642                                                 }
 643                                                 splx(vmflags);
 644                                         } else {
 645                                                 struct bus_dma_segment seg;
 646
 647                                                 /* Pointer to physical buffer */
 648                                                 seg.ds_addr =
 649                                                   (bus_addr_t)pcsio->data_ptr;
 650                                                 seg.ds_len = pcsio->dxfer_len;
 651                                                 trm_ExecuteSRB(pSRB, &seg, 1,
 652                                                     0);
 653                                         }
 654                                 } else {
 655                                         /*  CAM_SCATTER_VALID */
 656                                         struct bus_dma_segment *segs;
 657
 658                                         if ((pccb->ccb_h.flags &
 659                                              CAM_SG_LIST_PHYS) == 0 ||
 660                                              (pccb->ccb_h.flags
 661                                              & CAM_DATA_PHYS) != 0) {
 662                                                 pSRB->pNextSRB = pACB->pFreeSRB;
 663                                                 pACB->pFreeSRB = pSRB;
 664                                                 pccb->ccb_h.status =
 665                                                   CAM_PROVIDE_FAIL;
 666                                                 xpt_done(pccb);
 667                                                 splx(actionflags);
 668                                                 return;
 669                                         }
 670
 671                                         /* cam SG list is physical,
 672                                          *  cam data is virtual
 673                                          */
 674                                         segs = (struct bus_dma_segment *)
 675                                             pcsio->data_ptr;
 676                                         trm_ExecuteSRB(pSRB, segs,
 677                                             pcsio->sglist_cnt, 1);
 678                                 }   /*  CAM_SCATTER_VALID */
 679                         } else
 680                                 trm_ExecuteSRB(pSRB, NULL, 0, 0);
 681                                   }
 682                         break;
 683                 case XPT_GDEV_TYPE:
 684                         TRM_DPRINTF(" XPT_GDEV_TYPE \n");
 685                         pccb->ccb_h.status = CAM_REQ_INVALID;
 686                         xpt_done(pccb);
 687                         break;
 688                 case XPT_GDEVLIST:
 689                         TRM_DPRINTF(" XPT_GDEVLIST \n");
 690                         pccb->ccb_h.status = CAM_REQ_INVALID;
 691                         xpt_done(pccb);
 692                         break;
 693                 /*
 694                  * Path routing inquiry
 695                  * Path Inquiry CCB
 696                  */
 697                 case XPT_PATH_INQ: {
 698                         struct ccb_pathinq *cpi = &pccb->cpi;
 699
 700                         TRM_DPRINTF(" XPT_PATH_INQ \n");
 701                         cpi->version_num = 1;
 702                         cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
 703                         cpi->target_sprt = 0;
 704                         cpi->hba_misc = 0;
 705                         cpi->hba_eng_cnt = 0;
 706                         cpi->max_target = 15 ;
 707                         cpi->max_lun = pACB->max_lun;        /* 7 or 0 */
 708                         cpi->initiator_id = pACB->AdaptSCSIID;
 709                         cpi->bus_id = cam_sim_bus(psim);
 710                         cpi->base_transfer_speed = 3300;
 711                         strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 712                         strncpy(cpi->hba_vid, "Tekram_TRM", HBA_IDLEN);
 713                         strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
 714                         cpi->unit_number = cam_sim_unit(psim);
 715                         cpi->ccb_h.status = CAM_REQ_CMP;
 716                         xpt_done(pccb);
 717                                    }
 718                         break;
 719                 /*
 720                  * Release a frozen SIM queue
 721                  * Release SIM Queue
 722                  */
 723                 case XPT_REL_SIMQ:
 724                         TRM_DPRINTF(" XPT_REL_SIMQ \n");
 725                         pccb->ccb_h.status = CAM_REQ_INVALID;
 726                         xpt_done(pccb);
 727                         break;
 728                 /*
 729                  * Set Asynchronous Callback Parameters
 730                  * Set Asynchronous Callback CCB
 731                  */
 732                 case XPT_SASYNC_CB:
 733                         TRM_DPRINTF(" XPT_SASYNC_CB \n");
 734                         pccb->ccb_h.status = CAM_REQ_INVALID;
 735                         xpt_done(pccb);
 736                         break;
 737                 /*
 738                  * Set device type information
 739                  * Set Device Type CCB
 740                  */
 741                 case XPT_SDEV_TYPE:
 742                         TRM_DPRINTF(" XPT_SDEV_TYPE \n");
 743                         pccb->ccb_h.status = CAM_REQ_INVALID;
 744                         xpt_done(pccb);
 745                         break;
 746                 /*
 747                  * (Re)Scan the SCSI Bus
 748                  * Rescan the given bus, or bus/target/lun
 749                  */
 750                 case XPT_SCAN_BUS:
 751                         TRM_DPRINTF(" XPT_SCAN_BUS \n");
 752                         pccb->ccb_h.status = CAM_REQ_INVALID;
 753                         xpt_done(pccb);
 754                         break;
 755                 /*
 756                  * Get EDT entries matching the given pattern
 757                  */
 758                 case XPT_DEV_MATCH:
 759                         TRM_DPRINTF(" XPT_DEV_MATCH \n");
 760                         pccb->ccb_h.status = CAM_REQ_INVALID;
 761                         xpt_done(pccb);
 762                         break;
 763                 /*
 764                  * Turn on debugging for a bus, target or lun
 765                  */
 766                 case XPT_DEBUG:
 767                         TRM_DPRINTF(" XPT_DEBUG \n");
 768                         pccb->ccb_h.status = CAM_REQ_INVALID;
 769                         xpt_done(pccb);
 770                         break;
 771                         /*
 772                          * XPT_ABORT = 0x10, Abort the specified CCB
 773                          * Abort XPT request CCB
 774                          */
 775                 case XPT_ABORT:
 776                         TRM_DPRINTF(" XPT_ABORT \n");
 777                         pccb->ccb_h.status = CAM_REQ_INVALID;
 778                         xpt_done(pccb);
 779                         break;
 780                 /*
 781                  * Reset the specified SCSI bus
 782                  * Reset SCSI Bus CCB
 783                  */
 784                 case XPT_RESET_BUS: {
 785                         int i;
 786
 787                         TRM_DPRINTF(" XPT_RESET_BUS \n");
 788                         trm_reset(pACB);
 789                         pACB->ACBFlag=0;
 790                         for (i=0; i<500; i++)
 791                                 DELAY(1000);
 792                         pccb->ccb_h.status = CAM_REQ_CMP;
 793                         xpt_done(pccb);
 794                                     }
 795                         break;
 796                 /*
 797                  * Bus Device Reset the specified SCSI device
 798                  * Reset SCSI Device CCB
 799                  */
 800                 case XPT_RESET_DEV:
 801                 /*
 802                  * Don't (yet?) support vendor
 803                  * specific commands.
 804                  */
 805                         TRM_DPRINTF(" XPT_RESET_DEV \n");
 806                         pccb->ccb_h.status = CAM_REQ_INVALID;
 807                         xpt_done(pccb);
 808                         break;
 809                 /*
 810                  * Terminate the I/O process
 811                  * Terminate I/O Process Request CCB
 812                  */
 813                 case XPT_TERM_IO:
 814                         TRM_DPRINTF(" XPT_TERM_IO \n");
 815                         pccb->ccb_h.status = CAM_REQ_INVALID;
 816                         xpt_done(pccb);
 817                         break;
 818                 /*
 819                  * Scan Logical Unit
 820                  */
 821                 case XPT_SCAN_LUN:
 822                         TRM_DPRINTF(" XPT_SCAN_LUN \n");
 823                         pccb->ccb_h.status = CAM_REQ_INVALID;
 824                         xpt_done(pccb);
 825                         break;
 826
 827                 /*
 828                  * Get/Set transfer rate/width/disconnection/tag queueing
 829                  * settings
 830                  * (GET) default/user transfer settings for the target
 831                  */
 832                 case XPT_GET_TRAN_SETTINGS: {
 833                         struct  ccb_trans_settings *cts;
 834                         int     intflag;
 835                         struct  trm_transinfo *tinfo;
 836                         PDCB    pDCB;
 837
 838                         TRM_DPRINTF(" XPT_GET_TRAN_SETTINGS \n");
 839                         cts = &pccb->cts;
 840                         pDCB = &pACB->DCBarray[target_id][target_lun];
 841                         intflag = splcam();
 842                         /*
 843                          * disable interrupt
 844                          */
 845                         if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
 846                                 /* current transfer settings */
 847                                 if (pDCB->tinfo.disc_tag & TRM_CUR_DISCENB)
 848                                         cts->flags = CCB_TRANS_DISC_ENB;
 849                                 else
 850                                         cts->flags = 0;/* no tag & disconnect */
 851                                 if (pDCB->tinfo.disc_tag & TRM_CUR_TAGENB)
 852                                         cts->flags |= CCB_TRANS_TAG_ENB;
 853                                 tinfo = &pDCB->tinfo.current;
 854                                 TRM_DPRINTF("CURRENT:  cts->flags= %2x \n",
 855                                     cts->flags);
 856                         } else {
 857                           /* default(user) transfer settings */
 858                                 if (pDCB->tinfo.disc_tag & TRM_USR_DISCENB)
 859                                         cts->flags = CCB_TRANS_DISC_ENB;
 860                                 else
 861                                         cts->flags = 0;
 862                                 if (pDCB->tinfo.disc_tag & TRM_USR_TAGENB)
 863                                         cts->flags |= CCB_TRANS_TAG_ENB;
 864                                 tinfo = &pDCB->tinfo.user;
 865                                 TRM_DPRINTF("USER: cts->flags= %2x \n",
 866                                         cts->flags);
 867                         }
 868                         cts->sync_period = tinfo->period;
 869                         cts->sync_offset = tinfo->offset;
 870                         cts->bus_width   = tinfo->width;
 871                         TRM_DPRINTF("pDCB->SyncPeriod: %d  \n",
 872                                 pDCB->SyncPeriod);
 873                         TRM_DPRINTF("period: %d  \n", tinfo->period);
 874                         TRM_DPRINTF("offset: %d  \n", tinfo->offset);
 875                         TRM_DPRINTF("width: %d  \n", tinfo->width);
 876
 877                         splx(intflag);
 878                         cts->valid = CCB_TRANS_SYNC_RATE_VALID |
 879                             CCB_TRANS_SYNC_OFFSET_VALID |
 880                             CCB_TRANS_BUS_WIDTH_VALID |
 881                             CCB_TRANS_DISC_VALID |
 882                             CCB_TRANS_TQ_VALID;
 883                         pccb->ccb_h.status = CAM_REQ_CMP;
 884                         xpt_done(pccb);
 885                                             }
 886                         break;
 887                 /*
 888                  * Get/Set transfer rate/width/disconnection/tag queueing
 889                  * settings
 890                  * (Set) transfer rate/width negotiation settings
 891                  */
 892                 case XPT_SET_TRAN_SETTINGS: {
 893                         struct  ccb_trans_settings *cts;
 894                         u_int   update_type;
 895                         int     intflag;
 896                         PDCB    pDCB;
 897
 898                         TRM_DPRINTF(" XPT_SET_TRAN_SETTINGS \n");
 899                         cts = &pccb->cts;
 900                         update_type = 0;
 901                         if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
 902                                 update_type |= TRM_TRANS_GOAL;
 903                         if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
 904                                 update_type |= TRM_TRANS_USER;
 905                         intflag = splcam();
 906                         pDCB = &pACB->DCBarray[target_id][target_lun];
 907
 908                         if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
 909                           /*ccb disc enables */
 910                                 if (update_type & TRM_TRANS_GOAL) {
 911                                         if ((cts->flags & CCB_TRANS_DISC_ENB)
 912                                             != 0)
 913                                                 pDCB->tinfo.disc_tag
 914                                                     |= TRM_CUR_DISCENB;
 915                                         else
 916                                                 pDCB->tinfo.disc_tag &=
 917                                                     ~TRM_CUR_DISCENB;
 918                                 }
 919                                 if (update_type & TRM_TRANS_USER) {
 920                                         if ((cts->flags & CCB_TRANS_DISC_ENB)
 921                                             != 0)
 922                                                 pDCB->tinfo.disc_tag
 923                                                     |= TRM_USR_DISCENB;
 924                                         else
 925                                                 pDCB->tinfo.disc_tag &=
 926                                                     ~TRM_USR_DISCENB;
 927                                 }
 928                         }
 929                         if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
 930                           /* if ccb tag q active */
 931                                 if (update_type & TRM_TRANS_GOAL) {
 932                                         if ((cts->flags & CCB_TRANS_TAG_ENB)
 933                                             != 0)
 934                                                 pDCB->tinfo.disc_tag |=
 935                                                     TRM_CUR_TAGENB;
 936                                         else
 937                                                 pDCB->tinfo.disc_tag &=
 938                                                     ~TRM_CUR_TAGENB;
 939                                 }
 940                                 if (update_type & TRM_TRANS_USER) {
 941                                         if ((cts->flags & CCB_TRANS_TAG_ENB)
 942                                             != 0)
 943                                                 pDCB->tinfo.disc_tag |=
 944                                                     TRM_USR_TAGENB;
 945                                         else
 946                                                 pDCB->tinfo.disc_tag &=
 947                                                     ~TRM_USR_TAGENB;
 948                                 }
 949                         }
 950                         /* Minimum sync period factor   */
 951
 952                         if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
 953                                 /* if ccb sync active */
 954                                 /* TRM-S1040 MinSyncPeriod = 4 clocks/byte */
 955                                 if ((cts->sync_period != 0) &&
 956                                     (cts->sync_period < 125))
 957                                         cts->sync_period = 125;
 958                                 /* 1/(125*4) minsync 2 MByte/sec */
 959                                 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID)
 960                                     != 0) {
 961                                         if (cts->sync_offset == 0)
 962                                                 cts->sync_period = 0;
 963                                         /* TRM-S1040 MaxSyncOffset = 15 bytes*/
 964                                         if (cts->sync_offset > 15)
 965                                                 cts->sync_offset = 15;
 966                                 }
 967                         }
 968                         if ((update_type & TRM_TRANS_USER) != 0) {
 969                                 pDCB->tinfo.user.period = cts->sync_period;
 970                                 pDCB->tinfo.user.offset = cts->sync_offset;
 971                                 pDCB->tinfo.user.width  = cts->bus_width;
 972                         }
 973                         if ((update_type & TRM_TRANS_GOAL) != 0) {
 974                                 pDCB->tinfo.goal.period = cts->sync_period;
 975                                 pDCB->tinfo.goal.offset = cts->sync_offset;
 976                                 pDCB->tinfo.goal.width  = cts->bus_width;
 977                         }
 978                         splx(intflag);
 979                         pccb->ccb_h.status = CAM_REQ_CMP;
 980                         xpt_done(pccb);
 981                         break;
 982                                             }
 983                 /*
 984                  * Calculate the geometry parameters for a device give
 985                  * the sector size and volume size.
 986                  */
 987                 case XPT_CALC_GEOMETRY:
 988                         TRM_DPRINTF(" XPT_CALC_GEOMETRY \n");
 989                         cam_calc_geometry(&pccb->ccg, /*extended*/1);
 990                         xpt_done(pccb);
 991                         break;
 992                 case XPT_ENG_INQ:
 993                         TRM_DPRINTF(" XPT_ENG_INQ \n");
 994                         pccb->ccb_h.status = CAM_REQ_INVALID;
 995                         xpt_done(pccb);
 996                         break;
 997                 /*
 998                  * HBA execute engine request
 999                  * This structure must match SCSIIO size
1000                  */
1001                 case XPT_ENG_EXEC:
1002                         TRM_DPRINTF(" XPT_ENG_EXEC \n");
1003                         pccb->ccb_h.status = CAM_REQ_INVALID;
1004                         xpt_done(pccb);
1005                         break;
1006                 /*
1007                  * XPT_EN_LUN = 0x30, Enable LUN as a target
1008                  * Target mode structures.
1009                  */
1010                 case XPT_EN_LUN:
1011                 /*
1012                  * Don't (yet?) support vendor
1013                  * specific commands.
1014                  */
1015                         TRM_DPRINTF(" XPT_EN_LUN \n");
1016                         pccb->ccb_h.status = CAM_REQ_INVALID;
1017                         xpt_done(pccb);
1018                         break;
1019                 /*
1020                 * Execute target I/O request
1021                 */
1022                 case XPT_TARGET_IO:
1023                 /*
1024                  * Don't (yet?) support vendor
1025                  * specific commands.
1026                  */
1027                         TRM_DPRINTF(" XPT_TARGET_IO \n");
1028                         pccb->ccb_h.status = CAM_REQ_INVALID;
1029                         xpt_done(pccb);
1030                         break;
1031                 /*
1032                  * Accept Host Target Mode CDB
1033                  */
1034                 case XPT_ACCEPT_TARGET_IO:
1035                 /*
1036                  * Don't (yet?) support vendor
1037                  * specific commands.
1038                  */
1039                         TRM_DPRINTF(" XPT_ACCEPT_TARGET_IO \n");
1040                         pccb->ccb_h.status = CAM_REQ_INVALID;
1041                         xpt_done(pccb);
1042                         break;
1043                 /*
1044                  * Continue Host Target I/O Connection
1045                  */
1046                 case XPT_CONT_TARGET_IO:
1047                 /*
1048                  * Don't (yet?) support vendor
1049                  * specific commands.
1050                  */
1051                         TRM_DPRINTF(" XPT_CONT_TARGET_IO \n");
1052                         pccb->ccb_h.status = CAM_REQ_INVALID;
1053                         xpt_done(pccb);
1054                         break;
1055                 /*
1056                  * Notify Host Target driver of event
1057                  */
1058                 case XPT_IMMED_NOTIFY:
1059                         TRM_DPRINTF(" XPT_IMMED_NOTIFY \n");
1060                         pccb->ccb_h.status = CAM_REQ_INVALID;
1061                         xpt_done(pccb);
1062                         break;
1063                 /*
1064                  * Acknowledgement of event
1065                  */
1066                 case XPT_NOTIFY_ACK:
1067                         TRM_DPRINTF(" XPT_NOTIFY_ACK \n");
1068                         pccb->ccb_h.status = CAM_REQ_INVALID;
1069                         xpt_done(pccb);
1070                         break;
1071                 /*
1072                  * XPT_VUNIQUE = 0x80
1073                  */
1074                 case XPT_VUNIQUE:
1075                         pccb->ccb_h.status = CAM_REQ_INVALID;
1076                         xpt_done(pccb);
1077                         break;
1078                 default:
1079                         pccb->ccb_h.status = CAM_REQ_INVALID;
1080                         xpt_done(pccb);
1081                         break;
1082         }
1083         splx(actionflags);
1084 }
1085
1086 static void
1087 trm_poll(struct cam_sim *psim)
1088 {
1089         trm_Interrupt(cam_sim_softc(psim));
1090 }
1091
1092 static void
1093 trm_ResetDevParam(PACB pACB)
1094 {
1095         PDCB            pDCB, pdcb;
1096         PNVRAMTYPE      pEEpromBuf;
1097         u_int8_t        PeriodIndex;
1098
1099         pDCB = pACB->pLinkDCB;
1100         if (pDCB == NULL)
1101                 return;
1102         pdcb = pDCB;
1103         do {
1104                 pDCB->SyncMode  &= ~(SYNC_NEGO_DONE+ WIDE_NEGO_DONE);
1105                 pDCB->SyncPeriod = 0;
1106                 pDCB->SyncOffset = 0;
1107                 pEEpromBuf = &trm_eepromBuf[pACB->AdapterUnit];
1108                 pDCB->DevMode =
1109                   pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarCfg0;
1110                 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
1111                 PeriodIndex =
1112                    pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarPeriod & 0x07;
1113                 if (pACB->AdaptType == 1) /* is U2? */
1114                         pDCB->MaxNegoPeriod = dc395u2x_clock_period[PeriodIndex];
1115                 else
1116                         pDCB->MaxNegoPeriod = dc395x_clock_period[PeriodIndex];
1117                 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
1118                     (pACB->Config & HCC_WIDE_CARD))
1119                         pDCB->SyncMode |= WIDE_NEGO_ENABLE;
1120                 pDCB = pDCB->pNextDCB;
1121         }
1122         while (pdcb != pDCB);
1123 }
1124
1125 static void
1126 trm_RecoverSRB(PACB pACB)
1127 {
1128         PDCB            pDCB, pdcb;
1129         PSRB            psrb, psrb2;
1130         u_int16_t       cnt, i;
1131
1132         pDCB = pACB->pLinkDCB;
1133         if (pDCB == NULL)
1134                 return;
1135         pdcb = pDCB;
1136         do {
1137                 cnt = pdcb->GoingSRBCnt;
1138                 psrb = pdcb->pGoingSRB;
1139                 for (i = 0; i < cnt; i++) {
1140                         psrb2 = psrb;
1141                         psrb = psrb->pNextSRB;
1142                         if (pdcb->pWaitingSRB) {
1143                                 psrb2->pNextSRB = pdcb->pWaitingSRB;
1144                                 pdcb->pWaitingSRB = psrb2;
1145                         } else {
1146                                 pdcb->pWaitingSRB = psrb2;
1147                                 pdcb->pWaitingLastSRB = psrb2;
1148                                 psrb2->pNextSRB = NULL;
1149                         }
1150                 }
1151                 pdcb->GoingSRBCnt = 0;
1152                 pdcb->pGoingSRB = NULL;
1153                 pdcb = pdcb->pNextDCB;
1154         }
1155         while (pdcb != pDCB);
1156 }
1157
1158 static void
1159 trm_reset(PACB pACB)
1160 {
1161         int             intflag;
1162         u_int16_t       i;
1163
1164         TRM_DPRINTF("trm: RESET");
1165         intflag = splcam();
1166         trm_reg_write8(0x00, TRMREG_DMA_INTEN);
1167         trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
1168
1169         trm_ResetSCSIBus(pACB);
1170         for (i = 0; i < 500; i++)
1171                 DELAY(1000);
1172         trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
1173         /* Enable DMA interrupt */
1174         trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
1175         /* Clear DMA FIFO */
1176         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1177         /* Clear SCSI FIFO */
1178         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1179         trm_ResetDevParam(pACB);
1180         trm_DoingSRB_Done(pACB);
1181         pACB->pActiveDCB = NULL;
1182         pACB->ACBFlag = 0;/* RESET_DETECT, RESET_DONE ,RESET_DEV */
1183         trm_DoWaitingSRB(pACB);
1184         /* Tell the XPT layer that a bus reset occured    */
1185         if (pACB->ppath != NULL)
1186                 xpt_async(AC_BUS_RESET, pACB->ppath, NULL);
1187         splx(intflag);
1188         return;
1189 }
1190
1191 static u_int16_t
1192 trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB)
1193 {
1194         u_int16_t       return_code;
1195         u_int8_t        scsicommand, i,command,identify_message;
1196         u_int8_t *      ptr;
1197         union  ccb      *pccb;
1198         struct ccb_scsiio *pcsio;
1199
1200         pccb  = pSRB->pccb;
1201         pcsio = &pccb->csio;
1202
1203         trm_reg_write8(pACB->AdaptSCSIID, TRMREG_SCSI_HOSTID);
1204         trm_reg_write8(pDCB->TargetID, TRMREG_SCSI_TARGETID);
1205         trm_reg_write8(pDCB->SyncPeriod, TRMREG_SCSI_SYNC);
1206         trm_reg_write8(pDCB->SyncOffset, TRMREG_SCSI_OFFSET);
1207         pSRB->ScsiPhase = PH_BUS_FREE;/* initial phase */
1208         /* Flush FIFO */
1209         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1210
1211         identify_message = pDCB->IdentifyMsg;
1212
1213         if ((pSRB->CmdBlock[0] == INQUIRY) ||
1214             (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1215             (pSRB->SRBFlag & AUTO_REQSENSE)) {
1216                 if (((pDCB->SyncMode & WIDE_NEGO_ENABLE) &&
1217                       !(pDCB->SyncMode & WIDE_NEGO_DONE))
1218                 || ((pDCB->SyncMode & SYNC_NEGO_ENABLE) &&
1219                   !(pDCB->SyncMode & SYNC_NEGO_DONE))) {
1220                         if (!(pDCB->IdentifyMsg & 7) ||
1221                             (pSRB->CmdBlock[0] != INQUIRY)) {
1222                                 scsicommand = SCMD_SEL_ATNSTOP;
1223                                 pSRB->SRBState = SRB_MSGOUT;
1224                                 goto polling;
1225                         }
1226                 }
1227         /*
1228         * Send identify message
1229         */
1230                 trm_reg_write8((identify_message & 0xBF) ,TRMREG_SCSI_FIFO);
1231                 scsicommand = SCMD_SEL_ATN;
1232                 pSRB->SRBState = SRB_START_;
1233         } else {
1234                 /* not inquiry,request sense,auto request sense */
1235                 /*
1236                  * Send identify message
1237                  */
1238                 trm_reg_write8(identify_message,TRMREG_SCSI_FIFO);
1239                 scsicommand = SCMD_SEL_ATN;
1240                 pSRB->SRBState = SRB_START_;
1241                 if (pDCB->SyncMode & EN_TAG_QUEUING) {
1242                   /* Send Tag message */
1243                         trm_reg_write8(MSG_SIMPLE_QTAG, TRMREG_SCSI_FIFO);
1244                         trm_reg_write8(pSRB->TagNumber, TRMREG_SCSI_FIFO);
1245                         scsicommand = SCMD_SEL_ATN3;
1246                 }
1247         }
1248 polling:
1249         /*
1250          *       Send CDB ..command block .........
1251          */
1252         if (pSRB->SRBFlag & AUTO_REQSENSE) {
1253                 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1254                 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1255                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1256                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1257                 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1258                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1259         } else {
1260                 ptr = (u_int8_t *) pSRB->CmdBlock;
1261                 for (i = 0; i < pSRB->ScsiCmdLen ; i++) {
1262                         command = *ptr++;
1263                         trm_reg_write8(command,TRMREG_SCSI_FIFO);
1264                 }
1265         }
1266         if (trm_reg_read16(TRMREG_SCSI_STATUS) & SCSIINTERRUPT) {
1267             /*
1268              * If trm_StartSCSI return 1 :
1269              * current interrupt status is interrupt disreenable
1270              * It's said that SCSI processor has more one SRB need to do,
1271              * SCSI processor has been occupied by one SRB.
1272              */
1273                 pSRB->SRBState = SRB_READY;
1274                 return_code = 1;
1275         } else {
1276           /*
1277            * If trm_StartSCSI return 0 :
1278            * current interrupt status is interrupt enable
1279            * It's said that SCSI processor is unoccupied
1280            */
1281                 pSRB->ScsiPhase  = SCSI_NOP1; /* SCSI bus free Phase */
1282                 pACB->pActiveDCB = pDCB;
1283                 pDCB->pActiveSRB = pSRB;
1284                 return_code = 0;
1285                 trm_reg_write16(DO_DATALATCH | DO_HWRESELECT,
1286                     TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
1287                 /*
1288                  * SCSI cammand
1289                  */
1290                 trm_reg_write8(scsicommand,TRMREG_SCSI_COMMAND);
1291         }
1292         return (return_code);
1293 }
1294
1295 static void
1296 trm_Interrupt(vpACB)
1297 void *vpACB;
1298 {
1299         PACB            pACB;
1300         PDCB            pDCB;
1301         PSRB            pSRB;
1302         u_int16_t       phase;
1303         void            (*stateV)(PACB, PSRB, u_int16_t *);
1304         u_int16_t       scsi_status=0;
1305         u_int8_t        scsi_intstatus;
1306
1307         pACB = vpACB;
1308
1309         scsi_status = trm_reg_read16(TRMREG_SCSI_STATUS);
1310         if (!(scsi_status & SCSIINTERRUPT)) {
1311                 TRM_DPRINTF("trm_Interrupt: TRMREG_SCSI_STATUS scsi_status = NULL ,return......");
1312                 return;
1313         }
1314         TRM_DPRINTF("scsi_status=%2x,",scsi_status);
1315
1316         scsi_intstatus = trm_reg_read8(TRMREG_SCSI_INTSTATUS);
1317
1318         TRM_DPRINTF("scsi_intstatus=%2x,",scsi_intstatus);
1319
1320         if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
1321                 trm_Disconnect(pACB);
1322                 return;
1323         }
1324
1325         if (scsi_intstatus & INT_RESELECTED) {
1326                 trm_Reselect(pACB);
1327                 return;
1328         }
1329         if (scsi_intstatus & INT_SCSIRESET) {
1330                 trm_ScsiRstDetect(pACB);
1331                 return;
1332         }
1333
1334         if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
1335                 pDCB = pACB->pActiveDCB;
1336                 KASSERT(pDCB != NULL, ("no active DCB"));
1337                 pSRB = pDCB->pActiveSRB;
1338                 if (pDCB->DCBFlag & ABORT_DEV_)
1339                                 trm_EnableMsgOutAbort1(pACB, pSRB);
1340                 phase = (u_int16_t) pSRB->ScsiPhase;  /* phase: */
1341                 stateV = (void *) trm_SCSI_phase0[phase];
1342                 stateV(pACB, pSRB, &scsi_status);
1343                 pSRB->ScsiPhase = scsi_status & PHASEMASK;
1344                 /* phase:0,1,2,3,4,5,6,7 */
1345                 phase = (u_int16_t) scsi_status & PHASEMASK;
1346                 stateV = (void *) trm_SCSI_phase1[phase];
1347                 stateV(pACB, pSRB, &scsi_status);
1348         }
1349 }
1350
1351 static void
1352 trm_MsgOutPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1353 {
1354
1355         if (pSRB->SRBState & (SRB_UNEXPECT_RESEL+SRB_ABORT_SENT))
1356                 *pscsi_status = PH_BUS_FREE;
1357         /*.. initial phase*/
1358 }
1359
1360 static void
1361 trm_MsgOutPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1362 {
1363         u_int8_t        bval;
1364         u_int16_t       i, cnt;
1365         u_int8_t *      ptr;
1366         PDCB            pDCB;
1367
1368         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1369         pDCB = pACB->pActiveDCB;
1370         if (!(pSRB->SRBState & SRB_MSGOUT)) {
1371                 cnt = pSRB->MsgCnt;
1372                 if (cnt) {
1373                         ptr = (u_int8_t *) pSRB->MsgOutBuf;
1374                         for (i = 0; i < cnt; i++) {
1375                                 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1376                                 ptr++;
1377                         }
1378                         pSRB->MsgCnt = 0;
1379                         if ((pDCB->DCBFlag & ABORT_DEV_) &&
1380                             (pSRB->MsgOutBuf[0] == MSG_ABORT)) {
1381                                 pSRB->SRBState = SRB_ABORT_SENT;
1382                         }
1383                 } else {
1384                         bval = MSG_ABORT;
1385                         if ((pSRB->CmdBlock[0] == INQUIRY) ||
1386                                         (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1387                                         (pSRB->SRBFlag & AUTO_REQSENSE)) {
1388                                 if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1389                                         goto  mop1;
1390                                 }
1391                         }
1392                         trm_reg_write8(bval, TRMREG_SCSI_FIFO);
1393                 }
1394         } else {
1395 mop1:   /* message out phase */
1396                 if (!(pSRB->SRBState & SRB_DO_WIDE_NEGO)
1397                     && (pDCB->SyncMode & WIDE_NEGO_ENABLE)) {
1398                   /*
1399                    * WIDE DATA TRANSFER REQUEST code (03h)
1400                    */
1401                         pDCB->SyncMode &= ~(SYNC_NEGO_DONE | EN_ATN_STOP);
1402                         trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1403                             TRMREG_SCSI_FIFO);
1404                         trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1405                         /* (01h) */
1406                         trm_reg_write8(2,TRMREG_SCSI_FIFO);
1407                         /* Message length (02h) */
1408                         trm_reg_write8(3,TRMREG_SCSI_FIFO);
1409                         /* wide data xfer (03h) */
1410                         trm_reg_write8(1,TRMREG_SCSI_FIFO);
1411                         /* width:0(8bit),1(16bit),2(32bit) */
1412                         pSRB->SRBState |= SRB_DO_WIDE_NEGO;
1413                 } else if (!(pSRB->SRBState & SRB_DO_SYNC_NEGO)
1414                     && (pDCB->SyncMode & SYNC_NEGO_ENABLE)) {
1415                   /*
1416                    * SYNCHRONOUS DATA TRANSFER REQUEST code (01h)
1417                    */
1418                         if (!(pDCB->SyncMode & WIDE_NEGO_DONE))
1419                                 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1420                                                 TRMREG_SCSI_FIFO);
1421                         trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1422                   /* (01h) */
1423                         trm_reg_write8(3,TRMREG_SCSI_FIFO);
1424                   /* Message length (03h) */
1425                         trm_reg_write8(1,TRMREG_SCSI_FIFO);
1426                   /* SYNCHRONOUS DATA TRANSFER REQUEST code (01h) */
1427                         trm_reg_write8(pDCB->MaxNegoPeriod,TRMREG_SCSI_FIFO);
1428                   /* Transfer peeriod factor */
1429                         trm_reg_write8((pACB->AdaptType == 1) ? 31 : 15,
1430                             TRMREG_SCSI_FIFO);
1431                   /* REQ/ACK offset */
1432                         pSRB->SRBState |= SRB_DO_SYNC_NEGO;
1433                 }
1434         }
1435         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1436         /* it's important for atn stop */
1437         /*
1438          * SCSI cammand
1439          */
1440         trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1441 }
1442
1443 static void
1444 trm_CommandPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1445 {
1446
1447 }
1448
1449 static void
1450 trm_CommandPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1451 {
1452         PDCB                    pDCB;
1453         u_int8_t *              ptr;
1454         u_int16_t               i, cnt;
1455         union  ccb              *pccb;
1456         struct ccb_scsiio       *pcsio;
1457
1458         pccb  = pSRB->pccb;
1459         pcsio = &pccb->csio;
1460
1461         trm_reg_write16(DO_CLRATN | DO_CLRFIFO , TRMREG_SCSI_CONTROL);
1462         if (!(pSRB->SRBFlag & AUTO_REQSENSE)) {
1463                 cnt = (u_int16_t) pSRB->ScsiCmdLen;
1464                 ptr = (u_int8_t *) pSRB->CmdBlock;
1465                 for (i = 0; i < cnt; i++) {
1466                         trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1467                         ptr++;
1468                 }
1469         } else {
1470                 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1471                 pDCB = pACB->pActiveDCB;
1472                 /* target id */
1473                 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1474                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1475                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1476                 /* sizeof(struct scsi_sense_data) */
1477                 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1478                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1479         }
1480         pSRB->SRBState = SRB_COMMAND;
1481         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1482         /* it's important for atn stop*/
1483         /*
1484          * SCSI cammand
1485          */
1486         trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1487 }
1488
1489 static void
1490 trm_DataOutPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1491 {
1492         PDCB            pDCB;
1493         u_int8_t        TempDMAstatus,SGIndexTemp;
1494         u_int16_t       scsi_status;
1495         PSEG            pseg;
1496         u_long          TempSRBXferredLength,dLeftCounter=0;
1497
1498         pDCB = pSRB->pSRBDCB;
1499         scsi_status = *pscsi_status;
1500
1501         if (!(pSRB->SRBState & SRB_XFERPAD)) {
1502                 if (scsi_status & PARITYERROR)
1503                         pSRB->SRBStatus |= PARITY_ERROR;
1504                 if (!(scsi_status & SCSIXFERDONE)) {
1505                   /*
1506                    * when data transfer from DMA FIFO to SCSI FIFO
1507                    * if there was some data left in SCSI FIFO
1508                    */
1509                         dLeftCounter = (u_long)
1510                           (trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x3F);
1511                         if (pDCB->SyncPeriod & WIDE_SYNC) {
1512                           /*
1513                            * if WIDE scsi SCSI FIFOCNT unit is word
1514                            * so need to * 2
1515                            */
1516                                 dLeftCounter <<= 1;
1517                         }
1518                 }
1519                 /*
1520                  * caculate all the residue data that not yet tranfered
1521                  * SCSI transfer counter + left in SCSI FIFO data
1522                  *
1523                  * .....TRM_SCSI_COUNTER (24bits)
1524                  * The counter always decrement by one for every SCSI byte
1525                  *transfer.
1526                  * .....TRM_SCSI_FIFOCNT (5bits)
1527                  * The counter is SCSI FIFO offset counter
1528                  */
1529                 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1530                 if (dLeftCounter == 1) {
1531                         dLeftCounter = 0;
1532                         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1533                 }
1534                 if ((dLeftCounter == 0) ||
1535                     (scsi_status & SCSIXFERCNT_2_ZERO)) {
1536                         TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1537                         while (!(TempDMAstatus & DMAXFERCOMP)) {
1538                                 TempDMAstatus =
1539                                   trm_reg_read8(TRMREG_DMA_STATUS);
1540                         }
1541                         pSRB->SRBTotalXferLength = 0;
1542                 } else {
1543                   /* Update SG list             */
1544                   /*
1545                    * if transfer not yet complete
1546                    * there were some data residue in SCSI FIFO or
1547                    * SCSI transfer counter not empty
1548                    */
1549                         if (pSRB->SRBTotalXferLength != dLeftCounter) {
1550                           /*
1551                            * data that had transferred length
1552                            */
1553                                 TempSRBXferredLength =
1554                                   pSRB->SRBTotalXferLength - dLeftCounter;
1555                                 /*
1556                                  * next time to be transferred length
1557                                  */
1558                                 pSRB->SRBTotalXferLength = dLeftCounter;
1559                                 /*
1560                                  * parsing from last time disconnect SRBSGIndex
1561                                  */
1562                                 pseg =
1563                                   pSRB->pSRBSGL + pSRB->SRBSGIndex;
1564                                 for (SGIndexTemp = pSRB->SRBSGIndex;
1565                                     SGIndexTemp < pSRB->SRBSGCount;
1566                                     SGIndexTemp++) {
1567                                         /*
1568                                          * find last time which SG transfer be
1569                                          * disconnect
1570                                          */
1571                                         if (TempSRBXferredLength >=
1572                                             pseg->length)
1573                                                 TempSRBXferredLength -=
1574                                                   pseg->length;
1575                                         else {
1576                                           /*
1577                                            * update last time disconnected SG
1578                                            * list
1579                                            */
1580                                                 pseg->length -=
1581                                                   TempSRBXferredLength;
1582                                                 /* residue data length  */
1583                                                 pseg->address +=
1584                                                   TempSRBXferredLength;
1585                                                 /* residue data pointer */
1586                                                 pSRB->SRBSGIndex = SGIndexTemp;
1587                                                 break;
1588                                         }
1589                                         pseg++;
1590                                 }
1591                         }
1592                 }
1593         }
1594         trm_reg_write8(STOPDMAXFER ,TRMREG_DMA_CONTROL);
1595 }
1596
1597
1598 static void
1599 trm_DataOutPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1600 {
1601         u_int16_t       ioDir;
1602         /*
1603          * do prepare befor transfer when data out phase
1604          */
1605
1606         ioDir = XFERDATAOUT;
1607         trm_DataIO_transfer(pACB, pSRB, ioDir);
1608 }
1609
1610 static void
1611 trm_DataInPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1612 {
1613         u_int8_t        TempDMAstatus, SGIndexTemp;
1614         u_int16_t       scsi_status;
1615         PSEG            pseg;
1616         u_long          TempSRBXferredLength,dLeftCounter = 0;
1617
1618         scsi_status = *pscsi_status;
1619         if (!(pSRB->SRBState & SRB_XFERPAD)) {
1620                 if (scsi_status & PARITYERROR)
1621                         pSRB->SRBStatus |= PARITY_ERROR;
1622                 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1623                 if ((dLeftCounter == 0) || (scsi_status & SCSIXFERCNT_2_ZERO)) {
1624                         TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1625                         while (!(TempDMAstatus & DMAXFERCOMP))
1626                                 TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1627                         pSRB->SRBTotalXferLength = 0;
1628                 } else {
1629                   /*
1630                    * parsing the case:
1631                    * when a transfer not yet complete
1632                    * but be disconnected by uper layer
1633                    * if transfer not yet complete
1634                    * there were some data residue in SCSI FIFO or
1635                    * SCSI transfer counter not empty
1636                    */
1637                   if (pSRB->SRBTotalXferLength != dLeftCounter) {
1638                                 /*
1639                                  * data that had transferred length
1640                                  */
1641                         TempSRBXferredLength =
1642                           pSRB->SRBTotalXferLength - dLeftCounter;
1643                                 /*
1644                                  * next time to be transferred length
1645                                  */
1646                         pSRB->SRBTotalXferLength = dLeftCounter;
1647                                 /*
1648                                  * parsing from last time disconnect SRBSGIndex
1649                                  */
1650                         pseg = pSRB->pSRBSGL + pSRB->SRBSGIndex;
1651                         for (SGIndexTemp = pSRB->SRBSGIndex;
1652                             SGIndexTemp < pSRB->SRBSGCount;
1653                             SGIndexTemp++) {
1654                           /*
1655                            * find last time which SG transfer be disconnect
1656                            */
1657                                 if (TempSRBXferredLength >= pseg->length)
1658                                         TempSRBXferredLength -= pseg->length;
1659                                 else {
1660                                   /*
1661                                    * update last time disconnected SG list
1662                                    */
1663                                         pseg->length -= TempSRBXferredLength;
1664                                         /* residue data length  */
1665                                         pseg->address += TempSRBXferredLength;
1666                                         /* residue data pointer */
1667                                         pSRB->SRBSGIndex = SGIndexTemp;
1668                                         break;
1669                                 }
1670                                 pseg++;
1671                         }
1672                   }
1673                 }
1674         }
1675 }
1676
1677 static void
1678 trm_DataInPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1679 {
1680         u_int16_t       ioDir;
1681         /*
1682          * do prepare befor transfer when data in phase
1683          */
1684
1685         ioDir = XFERDATAIN;
1686         trm_DataIO_transfer(pACB, pSRB, ioDir);
1687 }
1688
1689 static void
1690 trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir)
1691 {
1692         u_int8_t        bval;
1693         PDCB            pDCB;
1694
1695         pDCB = pSRB->pSRBDCB;
1696         if (pSRB->SRBSGIndex < pSRB->SRBSGCount) {
1697                 if (pSRB->SRBTotalXferLength != 0) {
1698                         /*
1699                          * load what physical address of Scatter/Gather list
1700                          table want to be transfer
1701                          */
1702                         TRM_DPRINTF(" SG->address=%8x \n",pSRB->pSRBSGL->address);
1703                         TRM_DPRINTF(" SG->length=%8x \n",pSRB->pSRBSGL->length);
1704                         TRM_DPRINTF(" pDCB->SyncPeriod=%x \n",pDCB->SyncPeriod);
1705                         TRM_DPRINTF(" pSRB->pSRBSGL=%8x \n",(unsigned int)pSRB->pSRBSGL);
1706                         TRM_DPRINTF(" pSRB->SRBSGPhyAddr=%8x \n",pSRB->SRBSGPhyAddr);
1707                         TRM_DPRINTF(" pSRB->SRBSGIndex=%d \n",pSRB->SRBSGIndex);
1708                         TRM_DPRINTF(" pSRB->SRBSGCount=%d \n",pSRB->SRBSGCount);
1709                         TRM_DPRINTF(" pSRB->SRBTotalXferLength=%d \n",pSRB->SRBTotalXferLength);
1710
1711                         pSRB->SRBState = SRB_DATA_XFER;
1712                         trm_reg_write32(0, TRMREG_DMA_XHIGHADDR);
1713                         trm_reg_write32(
1714                             (pSRB->SRBSGPhyAddr +
1715                              ((u_long)pSRB->SRBSGIndex << 3)),
1716                             TRMREG_DMA_XLOWADDR);
1717                         /*
1718                          * load how many bytes in the Scatter/Gather
1719                          * list table
1720                          */
1721                         trm_reg_write32(
1722                             ((u_long)(pSRB->SRBSGCount - pSRB->SRBSGIndex) << 3),
1723                             TRMREG_DMA_XCNT);
1724                         /*
1725                          * load total transfer length (24bits) max value
1726                          * 16Mbyte
1727                          */
1728                         trm_reg_write32(pSRB->SRBTotalXferLength,
1729                             TRMREG_SCSI_COUNTER);
1730                         /* Start DMA transfer */
1731                         trm_reg_write16(ioDir, TRMREG_DMA_COMMAND);
1732                         /* Start SCSI transfer */
1733                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1734                         /* it's important for atn stop */
1735                         /*
1736                          * SCSI cammand
1737                          */
1738                         bval = (ioDir == XFERDATAOUT) ?
1739                           SCMD_DMA_OUT : SCMD_DMA_IN;
1740                         trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1741                 } else {
1742                   /* xfer pad */
1743                         if (pSRB->SRBSGCount) {
1744                                 pSRB->AdaptStatus = H_OVER_UNDER_RUN;
1745                                 pSRB->SRBStatus |= OVER_RUN;
1746                         }
1747                         if (pDCB->SyncPeriod & WIDE_SYNC)
1748                                 trm_reg_write32(2,TRMREG_SCSI_COUNTER);
1749                         else
1750                                 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
1751                         if (ioDir == XFERDATAOUT)
1752                                 trm_reg_write16(0, TRMREG_SCSI_FIFO);
1753                         else
1754                                 trm_reg_read16(TRMREG_SCSI_FIFO);
1755                         pSRB->SRBState |= SRB_XFERPAD;
1756                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1757                         /* it's important for atn stop */
1758                         /*
1759                          * SCSI cammand
1760                          */
1761                         bval = (ioDir == XFERDATAOUT) ?
1762                           SCMD_FIFO_OUT : SCMD_FIFO_IN;
1763                         trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1764                 }
1765         }
1766 }
1767
1768 static void
1769 trm_StatusPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1770 {
1771
1772         pSRB->TargetStatus = trm_reg_read8(TRMREG_SCSI_FIFO);
1773         pSRB->SRBState = SRB_COMPLETED;
1774         *pscsi_status = PH_BUS_FREE;
1775         /*.. initial phase*/
1776         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1777         /* it's important for atn stop */
1778         /*
1779          * SCSI cammand
1780          */
1781         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1782 }
1783
1784
1785
1786 static void
1787 trm_StatusPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1788 {
1789
1790         if (trm_reg_read16(TRMREG_DMA_COMMAND) & 0x0001) {
1791                 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1792                         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1793                 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1794                         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1795         } else {
1796                 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1797                         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1798                 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1799                         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1800         }
1801         pSRB->SRBState = SRB_STATUS;
1802         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1803         /* it's important for atn stop */
1804         /*
1805          * SCSI cammand
1806          */
1807         trm_reg_write8(SCMD_COMP, TRMREG_SCSI_COMMAND);
1808 }
1809
1810 /*
1811  *scsiiom
1812  *       trm_MsgInPhase0: one of trm_SCSI_phase0[] vectors
1813  *            stateV = (void *) trm_SCSI_phase0[phase]
1814  *                         if phase =7
1815  * extended message codes:
1816  *
1817  *   code        description
1818  *
1819  *    02h        Reserved
1820  *    00h        MODIFY DATA  POINTER
1821  *    01h        SYNCHRONOUS DATA TRANSFER REQUEST
1822  *    03h        WIDE DATA TRANSFER REQUEST
1823  * 04h - 7Fh     Reserved
1824  * 80h - FFh     Vendor specific
1825  *
1826  */
1827
1828 static void
1829 trm_MsgInPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1830 {
1831         u_int8_t        message_in_code,bIndex,message_in_tag_id;
1832         PDCB            pDCB;
1833         PSRB            pSRBTemp;
1834
1835         pDCB = pACB->pActiveDCB;
1836
1837         message_in_code = trm_reg_read8(TRMREG_SCSI_FIFO);
1838         if (!(pSRB->SRBState & SRB_EXTEND_MSGIN)) {
1839                 if (message_in_code == MSG_DISCONNECT) {
1840                         pSRB->SRBState = SRB_DISCONNECT;
1841                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1842                         /* it's important for atn stop */
1843                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1844                         /*
1845                          * SCSI command
1846                          */
1847                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1848                         return;
1849                 } else if (message_in_code == MSG_SAVE_PTR) {
1850                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1851                         /* it's important for atn stop */
1852                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1853                         /*
1854                          * SCSI command
1855                          */
1856                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1857                         return;
1858                 } else if ((message_in_code == MSG_EXTENDED) ||
1859                     ((message_in_code >= MSG_SIMPLE_QTAG) &&
1860                      (message_in_code <= MSG_ORDER_QTAG))) {
1861                         pSRB->SRBState |= SRB_EXTEND_MSGIN;
1862                         pSRB->MsgInBuf[0] = message_in_code;
1863                         /* extended message      (01h) */
1864                         pSRB->MsgCnt = 1;
1865                         pSRB->pMsgPtr = &pSRB->MsgInBuf[1];
1866                         /* extended message length (n) */
1867                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1868                         /* it's important for atn stop */
1869                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1870                         /*
1871                          * SCSI command
1872                          */
1873                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1874                         return;
1875                 } else if (message_in_code == MSG_REJECT_) {
1876                         /* Reject message */
1877                         if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1878                           /* do wide nego reject */
1879                                 pDCB = pSRB->pSRBDCB;
1880                                 pDCB->SyncMode |= WIDE_NEGO_DONE;
1881                                 pDCB->SyncMode &= ~(SYNC_NEGO_DONE |
1882                                     EN_ATN_STOP | WIDE_NEGO_ENABLE);
1883                                 pSRB->SRBState &= ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1884                                 if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
1885                                     && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
1886                                   /* Set ATN, in case ATN was clear */
1887                                         pSRB->SRBState |= SRB_MSGOUT;
1888                                         trm_reg_write16(
1889                                             DO_SETATN,
1890                                             TRMREG_SCSI_CONTROL);
1891                                 } else {
1892                                   /* Clear ATN */
1893                                         trm_reg_write16(
1894                                             DO_CLRATN,
1895                                             TRMREG_SCSI_CONTROL);
1896                                 }
1897                         } else if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1898                           /* do sync nego reject */
1899                                 trm_reg_write16(DO_CLRATN,TRMREG_SCSI_CONTROL);
1900                                 if (pSRB->SRBState & SRB_DO_SYNC_NEGO) {
1901                                         pDCB = pSRB->pSRBDCB;
1902                                         pDCB->SyncMode &=
1903                                           ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
1904                                         pDCB->SyncPeriod = 0;
1905                                         pDCB->SyncOffset = 0;
1906                                         /*
1907                                          *
1908                                          *   program SCSI control register
1909                                          *
1910                                          */
1911                                         trm_reg_write8(pDCB->SyncPeriod,
1912                                             TRMREG_SCSI_SYNC);
1913                                         trm_reg_write8(pDCB->SyncOffset,
1914                                             TRMREG_SCSI_OFFSET);
1915                                         trm_SetXferRate(pACB,pSRB,pDCB);
1916                                 }
1917                         }
1918                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1919                         /* it's important for atn stop */
1920                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1921                         /*
1922                          * SCSI command
1923                          */
1924                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1925                         return;
1926                 } else if (message_in_code == MSG_IGNOREWIDE) {
1927                         trm_reg_write32(1, TRMREG_SCSI_COUNTER);
1928                         trm_reg_read8(TRMREG_SCSI_FIFO);
1929                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1930                         /* it's important for atn stop */
1931                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1932                         /*
1933                          * SCSI command
1934                          */
1935                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1936                         return;
1937                 } else {
1938                   /* Restore data pointer message */
1939                   /* Save data pointer message    */
1940                   /* Completion message           */
1941                   /* NOP message                  */
1942                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1943                         /* it's important for atn stop */
1944                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1945                         /*
1946                          * SCSI command
1947                          */
1948                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1949                         return;
1950                 }
1951         } else {
1952           /*
1953            * Parsing incomming extented messages
1954            */
1955                 *pSRB->pMsgPtr = message_in_code;
1956                 pSRB->MsgCnt++;
1957                 pSRB->pMsgPtr++;
1958                 TRM_DPRINTF("pSRB->MsgInBuf[0]=%2x \n ",pSRB->MsgInBuf[0]);
1959                 TRM_DPRINTF("pSRB->MsgInBuf[1]=%2x \n ",pSRB->MsgInBuf[1]);
1960                 TRM_DPRINTF("pSRB->MsgInBuf[2]=%2x \n ",pSRB->MsgInBuf[2]);
1961                 TRM_DPRINTF("pSRB->MsgInBuf[3]=%2x \n ",pSRB->MsgInBuf[3]);
1962                 TRM_DPRINTF("pSRB->MsgInBuf[4]=%2x \n ",pSRB->MsgInBuf[4]);
1963                 if ((pSRB->MsgInBuf[0] >= MSG_SIMPLE_QTAG)
1964                     && (pSRB->MsgInBuf[0] <= MSG_ORDER_QTAG)) {
1965                   /*
1966                    * is QUEUE tag message :
1967                    *
1968                    * byte 0:
1969                    * HEAD    QUEUE TAG (20h)
1970                    * ORDERED QUEUE TAG (21h)
1971                    * SIMPLE  QUEUE TAG (22h)
1972                    * byte 1:
1973                    * Queue tag (00h - FFh)
1974                    */
1975                         if (pSRB->MsgCnt == 2) {
1976                                 pSRB->SRBState = 0;
1977                                 message_in_tag_id = pSRB->MsgInBuf[1];
1978                                 pSRB = pDCB->pGoingSRB;
1979                                 pSRBTemp = pDCB->pGoingLastSRB;
1980                                 if (pSRB) {
1981                                         for (;;) {
1982                                                 if (pSRB->TagNumber !=
1983                                                     message_in_tag_id) {
1984                                                         if (pSRB == pSRBTemp) {
1985                                                                 goto  mingx0;
1986                                                         }
1987                                                         pSRB = pSRB->pNextSRB;
1988                                                 } else
1989                                                         break;
1990                                         }
1991                                         if (pDCB->DCBFlag & ABORT_DEV_) {
1992                                                 pSRB->SRBState = SRB_ABORT_SENT;
1993                                                 trm_EnableMsgOutAbort1(
1994                                                     pACB, pSRB);
1995                                         }
1996                                         if (!(pSRB->SRBState & SRB_DISCONNECT)) {
1997                                                 TRM_DPRINTF("SRB not yet disconnect........ \n ");
1998                                                 goto  mingx0;
1999                                         }
2000                                         pDCB->pActiveSRB = pSRB;
2001                                         pSRB->SRBState = SRB_DATA_XFER;
2002                                 } else {
2003 mingx0:
2004                                         pSRB = &pACB->TmpSRB;
2005                                         pSRB->SRBState = SRB_UNEXPECT_RESEL;
2006                                         pDCB->pActiveSRB = pSRB;
2007                                         pSRB->MsgOutBuf[0] = MSG_ABORT_TAG;
2008                                         trm_EnableMsgOutAbort2(
2009                                             pACB,
2010                                             pSRB);
2011                                 }
2012                         }
2013                         *pscsi_status = PH_BUS_FREE;
2014                         /* .. initial phase */
2015                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2016                         /* it's important for atn stop */
2017                         /*
2018                          * SCSI command
2019                          */
2020                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2021                         return;
2022                 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2023                     (pSRB->MsgInBuf[2] == 3) && (pSRB->MsgCnt == 4)) {
2024                   /*
2025                    * is Wide data xfer Extended message :
2026                    * ======================================
2027                    * WIDE DATA TRANSFER REQUEST
2028                    * ======================================
2029                    * byte 0 :  Extended message (01h)
2030                    * byte 1 :  Extended message length (02h)
2031                    * byte 2 :  WIDE DATA TRANSFER code (03h)
2032                    * byte 3 :  Transfer width exponent
2033                    */
2034                         pDCB = pSRB->pSRBDCB;
2035                         pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_WIDE_NEGO);
2036                         if ((pSRB->MsgInBuf[1] != 2)) {
2037                           /* Length is wrong, reject it  */
2038                                 pDCB->SyncMode &=
2039                                   ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
2040                                 pSRB->MsgCnt = 1;
2041                                 pSRB->MsgInBuf[0] = MSG_REJECT_;
2042                                 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2043                                 *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2044                                 /* it's important for atn stop */
2045                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2046                                 /*
2047                                  * SCSI command
2048                                  */
2049                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2050                                 return;
2051                         }
2052                         if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
2053                           /* Do wide negoniation */
2054                                 if (pSRB->MsgInBuf[3] > 2) {
2055                                   /* > 32 bit   */
2056                                   /* reject_msg: */
2057                                         pDCB->SyncMode &=
2058                                           ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
2059                                         pSRB->MsgCnt = 1;
2060                                         pSRB->MsgInBuf[0] = MSG_REJECT_;
2061                                         trm_reg_write16(DO_SETATN,
2062                                             TRMREG_SCSI_CONTROL);
2063                                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2064                                         /* it's important for atn stop */
2065                                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2066                                         /*
2067                                          * SCSI command
2068                                          */
2069                                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2070                                         return;
2071                                 }
2072                                 if (pSRB->MsgInBuf[3] == 2) {
2073                                         pSRB->MsgInBuf[3] = 1;
2074                                         /* do 16 bits   */
2075                                 } else {
2076                                         if (!(pDCB->SyncMode
2077                                               & WIDE_NEGO_DONE)) {
2078                                                 pSRB->SRBState &=
2079                                                   ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
2080                                                 pDCB->SyncMode |=
2081                                                   WIDE_NEGO_DONE;
2082                                                 pDCB->SyncMode &=
2083                                                   ~(SYNC_NEGO_DONE |
2084                                                       EN_ATN_STOP |
2085                                                       WIDE_NEGO_ENABLE);
2086                                                 if (pSRB->MsgInBuf[3] != 0) {
2087                                                   /* is Wide data xfer */
2088                                                         pDCB->SyncPeriod |=
2089                                                           WIDE_SYNC;
2090                                                         pDCB->tinfo.current.width
2091                                                           = MSG_EXT_WDTR_BUS_16_BIT;
2092                                                         pDCB->tinfo.goal.width
2093                                                           = MSG_EXT_WDTR_BUS_16_BIT;
2094                                                 }
2095                                         }
2096                                 }
2097                         } else
2098                                 pSRB->MsgInBuf[3] = 0;
2099                         pSRB->SRBState |= SRB_MSGOUT;
2100                         trm_reg_write16(DO_SETATN,TRMREG_SCSI_CONTROL);
2101                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2102                         /* it's important for atn stop */
2103                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2104                         /*
2105                          * SCSI command
2106                          */
2107                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2108                         return;
2109                 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2110                     (pSRB->MsgInBuf[2] == 1) && (pSRB->MsgCnt == 5)) {
2111                         /*
2112                          * is 8bit transfer Extended message :
2113                          * =================================
2114                          * SYNCHRONOUS DATA TRANSFER REQUEST
2115                          * =================================
2116                          * byte 0 :  Extended message (01h)
2117                          * byte 1 :  Extended message length (03)
2118                          * byte 2 :  SYNCHRONOUS DATA TRANSFER code (01h)
2119                          * byte 3 :  Transfer period factor
2120                          * byte 4 :  REQ/ACK offset
2121                          */
2122                         pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_SYNC_NEGO);
2123                         if ((pSRB->MsgInBuf[1] != 3) ||
2124                             (pSRB->MsgInBuf[2] != 1)) {
2125                           /* reject_msg: */
2126                                 pSRB->MsgCnt = 1;
2127                                 pSRB->MsgInBuf[0] = MSG_REJECT_;
2128                                 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2129                                 *pscsi_status = PH_BUS_FREE;
2130                                 /* .. initial phase */
2131                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2132                                 /* it's important for atn stop */
2133                                 /*
2134                                  * SCSI cammand
2135                                  */
2136                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2137                                 return;
2138                         } else if (!(pSRB->MsgInBuf[3]) || !(pSRB->MsgInBuf[4])) {
2139                                 /* set async */
2140                                 pDCB = pSRB->pSRBDCB;
2141                                 /* disable sync & sync nego */
2142                                 pDCB->SyncMode &=
2143                                   ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
2144                                 pDCB->SyncPeriod = 0;
2145                                 pDCB->SyncOffset = 0;
2146                                 pDCB->tinfo.goal.period = 0;
2147                                 pDCB->tinfo.goal.offset = 0;
2148                                 pDCB->tinfo.current.period = 0;
2149                                 pDCB->tinfo.current.offset = 0;
2150                                 pDCB->tinfo.current.width =
2151                                   MSG_EXT_WDTR_BUS_8_BIT;
2152                                 /*
2153                                  *
2154                                  *   program SCSI control register
2155                                  *
2156                                  */
2157                                 trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2158                                 trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2159                                 trm_SetXferRate(pACB,pSRB,pDCB);
2160                                 *pscsi_status = PH_BUS_FREE;
2161                                 /* .. initial phase */
2162                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2163                                 /* it's important for atn stop */
2164                                 /*
2165                                  * SCSI cammand
2166                                  */
2167                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2168                                 return;
2169                         } else {
2170                                 /* set sync */
2171                                 pDCB = pSRB->pSRBDCB;
2172                                 pDCB->SyncMode |=
2173                                   SYNC_NEGO_ENABLE+SYNC_NEGO_DONE;
2174                                 pDCB->MaxNegoPeriod = pSRB->MsgInBuf[3];
2175                                 /* Transfer period factor */
2176                                 pDCB->SyncOffset = pSRB->MsgInBuf[4];
2177                                 /* REQ/ACK offset */
2178                                 if (pACB->AdaptType == 1) {
2179                                         for(bIndex = 0; bIndex < 7; bIndex++) {
2180                                                 if (pSRB->MsgInBuf[3] <=
2181                                            dc395u2x_clock_period[bIndex]) {
2182                                             pDCB->tinfo.goal.period =
2183                                                 dc395u2x_tinfo_period[bIndex];
2184                                             pDCB->tinfo.current.period =
2185                                                 dc395u2x_tinfo_period[bIndex];
2186                                         pDCB->tinfo.goal.offset =
2187                                             pDCB->SyncOffset;
2188                                         pDCB->tinfo.current.offset =
2189                                             pDCB->SyncOffset;
2190                                         pDCB->SyncPeriod |= (bIndex|LVDS_SYNC);
2191                                         break;
2192                                                 }
2193                                         }
2194                                 } else {
2195                                         for(bIndex = 0; bIndex < 7; bIndex++) {
2196                                                 if (pSRB->MsgInBuf[3] <=
2197                                                  dc395x_clock_period[bIndex]) {
2198                                                    pDCB->tinfo.goal.period =
2199                                                 dc395x_tinfo_period[bIndex];
2200                                                    pDCB->tinfo.current.period =
2201                                                 dc395x_tinfo_period[bIndex];
2202                                                    pDCB->tinfo.goal.offset =
2203                                                 pDCB->SyncOffset;
2204                                                    pDCB->tinfo.current.offset =
2205                                                        pDCB->SyncOffset;
2206                                                    pDCB->SyncPeriod |=
2207                                                        (bIndex|ALT_SYNC);
2208                                                    break;
2209                                                 }
2210                                         }
2211                                 }
2212                                 /*
2213                                  *
2214                                  *   program SCSI control register
2215                                  *
2216                                  */
2217                                 trm_reg_write8(pDCB->SyncPeriod,
2218                                     TRMREG_SCSI_SYNC);
2219                                 trm_reg_write8(pDCB->SyncOffset,
2220                                     TRMREG_SCSI_OFFSET);
2221                                 trm_SetXferRate(pACB,pSRB,pDCB);
2222                                 *pscsi_status=PH_BUS_FREE;/*.. initial phase*/
2223                                 trm_reg_write16(DO_DATALATCH,TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
2224                     /*
2225                     ** SCSI command
2226                     */
2227                                 trm_reg_write8(SCMD_MSGACCEPT,TRMREG_SCSI_COMMAND);
2228                                 return;
2229                         }
2230                 }
2231         *pscsi_status = PH_BUS_FREE;
2232         /* .. initial phase */
2233         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2234         /* it's important for atn stop */
2235         /*
2236          * SCSI cammand
2237          */
2238         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2239         }
2240 }
2241
2242 static void
2243 trm_MsgInPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2244 {
2245
2246         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
2247         trm_reg_write32(1,TRMREG_SCSI_COUNTER);
2248         if (!(pSRB->SRBState & SRB_MSGIN)) {
2249                 pSRB->SRBState &= SRB_DISCONNECT;
2250                 pSRB->SRBState |= SRB_MSGIN;
2251         }
2252         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2253         /* it's important for atn stop*/
2254         /*
2255          * SCSI cammand
2256          */
2257         trm_reg_write8(SCMD_FIFO_IN, TRMREG_SCSI_COMMAND);
2258 }
2259
2260 static void
2261 trm_Nop0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2262 {
2263
2264 }
2265
2266 static void
2267 trm_Nop1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2268 {
2269
2270 }
2271
2272 static void
2273 trm_SetXferRate(PACB pACB,PSRB pSRB, PDCB pDCB)
2274 {
2275         union ccb       *pccb;
2276         struct ccb_trans_settings neg;
2277         u_int16_t       cnt, i;
2278         u_int8_t        bval;
2279         PDCB            pDCBTemp;
2280
2281         /*
2282          * set all lun device's  period , offset
2283          */
2284         TRM_DPRINTF("trm_SetXferRate\n");
2285         pccb = pSRB->pccb;
2286         neg.sync_period = pDCB->tinfo.goal.period;
2287         neg.sync_offset = pDCB->tinfo.goal.offset;
2288         neg.valid = CCB_TRANS_SYNC_RATE_VALID | CCB_TRANS_SYNC_OFFSET_VALID;
2289         xpt_setup_ccb(&neg.ccb_h, pccb->ccb_h.path, /* priority */1);
2290         xpt_async(AC_TRANSFER_NEG, pccb->ccb_h.path, &neg);
2291         if (!(pDCB->IdentifyMsg & 0x07)) {
2292                 pDCBTemp = pACB->pLinkDCB;
2293                 cnt = pACB->DeviceCnt;
2294                 bval = pDCB->TargetID;
2295                 for (i = 0; i < cnt; i++) {
2296                         if (pDCBTemp->TargetID == bval) {
2297                                 pDCBTemp->SyncPeriod = pDCB->SyncPeriod;
2298                                 pDCBTemp->SyncOffset = pDCB->SyncOffset;
2299                                 pDCBTemp->SyncMode = pDCB->SyncMode;
2300                         }
2301                         pDCBTemp = pDCBTemp->pNextDCB;
2302                 }
2303         }
2304         return;
2305 }
2306
2307 /*
2308  * scsiiom
2309  *            trm_Interrupt
2310  *
2311  *
2312  *    ---SCSI bus phase
2313  *
2314  *      PH_DATA_OUT             0x00     Data out phase
2315  *      PH_DATA_IN              0x01     Data in phase
2316  *      PH_COMMAND              0x02     Command phase
2317  *      PH_STATUS               0x03     Status phase
2318  *      PH_BUS_FREE             0x04     Invalid phase used as bus free
2319  *      PH_BUS_FREE             0x05     Invalid phase used as bus free
2320  *      PH_MSG_OUT              0x06     Message out phase
2321  *      PH_MSG_IN               0x07     Message in phase
2322  *
2323  */
2324 static void
2325 trm_Disconnect(PACB pACB)
2326 {
2327         PDCB            pDCB;
2328         PSRB            pSRB, psrb;
2329         u_int16_t       i,j, cnt;
2330         u_int           target_id,target_lun;
2331
2332         TRM_DPRINTF("trm_Disconnect...............\n ");
2333
2334         pDCB = pACB->pActiveDCB;
2335         if (!pDCB) {
2336                 TRM_DPRINTF(" Exception Disconnect DCB=NULL..............\n ");
2337                 j = 400;
2338                 while (--j)
2339                         DELAY(1);
2340                 /* 1 msec */
2341                 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT),
2342                     TRMREG_SCSI_CONTROL);
2343                 return;
2344         }
2345         pSRB = pDCB->pActiveSRB;
2346         /* bug pSRB=0 */
2347         target_id  = pSRB->pccb->ccb_h.target_id;
2348         target_lun = pSRB->pccb->ccb_h.target_lun;
2349         TRM_DPRINTF(":pDCB->pActiveSRB= %8x \n ",(u_int) pDCB->pActiveSRB);
2350         pACB->pActiveDCB = 0;
2351         pSRB->ScsiPhase = PH_BUS_FREE;
2352         /* SCSI bus free Phase */
2353         trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT), TRMREG_SCSI_CONTROL);
2354         if (pSRB->SRBState & SRB_UNEXPECT_RESEL) {
2355                 pSRB->SRBState = 0;
2356                 trm_DoWaitingSRB(pACB);
2357         } else if (pSRB->SRBState & SRB_ABORT_SENT) {
2358                 pDCB->DCBFlag = 0;
2359                 cnt = pDCB->GoingSRBCnt;
2360                 pDCB->GoingSRBCnt = 0;
2361                 pSRB = pDCB->pGoingSRB;
2362                 for (i = 0; i < cnt; i++) {
2363                         psrb = pSRB->pNextSRB;
2364                         pSRB->pNextSRB = pACB->pFreeSRB;
2365                         pACB->pFreeSRB = pSRB;
2366                         pSRB = psrb;
2367                 }
2368                 pDCB->pGoingSRB = 0;
2369                 trm_DoWaitingSRB(pACB);
2370         } else {
2371                 if ((pSRB->SRBState & (SRB_START_+SRB_MSGOUT)) ||
2372                     !(pSRB->SRBState & (SRB_DISCONNECT+SRB_COMPLETED))) {
2373                   /* Selection time out */
2374                         if (!(pACB->scan_devices[target_id][target_lun]) &&
2375                             pSRB->CmdBlock[0] != 0x00 && /* TEST UNIT READY */
2376                             pSRB->CmdBlock[0] != INQUIRY) {
2377                                 pSRB->SRBState = SRB_READY;
2378                                 trm_RewaitSRB(pDCB, pSRB);
2379                         } else {
2380                                 pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
2381                                 goto  disc1;
2382                         }
2383                 } else if (pSRB->SRBState & SRB_DISCONNECT) {
2384                         /*
2385                          * SRB_DISCONNECT
2386                          */
2387                         trm_DoWaitingSRB(pACB);
2388                 } else if (pSRB->SRBState & SRB_COMPLETED) {
2389 disc1:
2390                   /*
2391                    * SRB_COMPLETED
2392                    */
2393                         pDCB->pActiveSRB = 0;
2394                         pSRB->SRBState = SRB_FREE;
2395                         trm_SRBdone(pACB, pDCB, pSRB);
2396                 }
2397         }
2398         return;
2399 }
2400
2401 static void
2402 trm_Reselect(PACB pACB)
2403 {
2404         PDCB            pDCB;
2405         PSRB            pSRB;
2406         u_int16_t       RselTarLunId;
2407
2408         TRM_DPRINTF("trm_Reselect................. \n");
2409         pDCB = pACB->pActiveDCB;
2410         if (pDCB) {
2411           /* Arbitration lost but Reselection win */
2412                 pSRB = pDCB->pActiveSRB;
2413                 pSRB->SRBState = SRB_READY;
2414                 trm_RewaitSRB(pDCB, pSRB);
2415         }
2416         /* Read Reselected Target Id and LUN */
2417         RselTarLunId = trm_reg_read16(TRMREG_SCSI_TARGETID) & 0x1FFF;
2418         pDCB = pACB->pLinkDCB;
2419         while (RselTarLunId != *((u_int16_t *) &pDCB->TargetID)) {
2420           /* get pDCB of the reselect id */
2421                 pDCB = pDCB->pNextDCB;
2422         }
2423
2424         pACB->pActiveDCB = pDCB;
2425         if (pDCB->SyncMode & EN_TAG_QUEUING) {
2426                 pSRB = &pACB->TmpSRB;
2427                 pDCB->pActiveSRB = pSRB;
2428         } else {
2429                 pSRB = pDCB->pActiveSRB;
2430                 if (!pSRB || !(pSRB->SRBState & SRB_DISCONNECT)) {
2431                   /*
2432                    * abort command
2433                    */
2434                         pSRB = &pACB->TmpSRB;
2435                         pSRB->SRBState = SRB_UNEXPECT_RESEL;
2436                         pDCB->pActiveSRB = pSRB;
2437                         trm_EnableMsgOutAbort1(pACB, pSRB);
2438                 } else {
2439                         if (pDCB->DCBFlag & ABORT_DEV_) {
2440                                 pSRB->SRBState = SRB_ABORT_SENT;
2441                                 trm_EnableMsgOutAbort1(pACB, pSRB);
2442                         } else
2443                                 pSRB->SRBState = SRB_DATA_XFER;
2444                 }
2445         }
2446         pSRB->ScsiPhase = PH_BUS_FREE;
2447         /* SCSI bus free Phase */
2448         /*
2449          * Program HA ID, target ID, period and offset
2450          */
2451         trm_reg_write8((u_int8_t) RselTarLunId,TRMREG_SCSI_TARGETID);
2452         /* target ID */
2453         trm_reg_write8(pACB->AdaptSCSIID,TRMREG_SCSI_HOSTID);
2454         /* host   ID */
2455         trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2456         /* period    */
2457         trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2458         /* offset    */
2459         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2460         /* it's important for atn stop*/
2461         /*
2462          * SCSI cammand
2463          */
2464         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2465         /* to rls the /ACK signal */
2466 }
2467
2468 static void
2469 trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB)
2470 {
2471         PSRB                    psrb;
2472         u_int8_t                bval, bval1,status;
2473         union ccb               *pccb;
2474         struct ccb_scsiio       *pcsio;
2475         PSCSI_INQDATA           ptr;
2476         int                     intflag;
2477         u_int                   target_id,target_lun;
2478         PDCB                    pTempDCB;
2479
2480         pccb  = pSRB->pccb;
2481         if (pccb == NULL)
2482                 return;
2483         pcsio = &pccb->csio;
2484         target_id  = pSRB->pccb->ccb_h.target_id;
2485         target_lun = pSRB->pccb->ccb_h.target_lun;
2486         if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
2487                 bus_dmasync_op_t op;
2488                 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
2489                         op = BUS_DMASYNC_POSTREAD;
2490                 else
2491                         op = BUS_DMASYNC_POSTWRITE;
2492                 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
2493                 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
2494         }
2495         /*
2496          *
2497          * target status
2498          *
2499          */
2500         status = pSRB->TargetStatus;
2501         pcsio->scsi_status=SCSI_STAT_GOOD;
2502         pccb->ccb_h.status = CAM_REQ_CMP;
2503         if (pSRB->SRBFlag & AUTO_REQSENSE) {
2504           /*
2505            * status of auto request sense
2506            */
2507                 pSRB->SRBFlag &= ~AUTO_REQSENSE;
2508                 pSRB->AdaptStatus = 0;
2509                 pSRB->TargetStatus = SCSI_STATUS_CHECK_COND;
2510
2511                 if (status == SCSI_STATUS_CHECK_COND) {
2512                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2513                         goto ckc_e;
2514                 }
2515                 *((u_long *) &(pSRB->CmdBlock[0])) = pSRB->Segment0[0];
2516                 *((u_long *) &(pSRB->CmdBlock[4])) = pSRB->Segment0[1];
2517                 pSRB->SRBTotalXferLength = pSRB->Segment1[1];
2518                 pSRB->pSRBSGL->address = pSRB->SgSenseTemp.address;
2519                 pSRB->pSRBSGL->length = pSRB->SgSenseTemp.length;
2520                 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2521                 bcopy(trm_get_sense_buf(pACB, pSRB), &pcsio->sense_data,
2522                     pcsio->sense_len);
2523                 pcsio->ccb_h.status = CAM_SCSI_STATUS_ERROR
2524                     | CAM_AUTOSNS_VALID;
2525                 goto ckc_e;
2526         }
2527         /*
2528          * target status
2529          */
2530         if (status) {
2531                 if (status == SCSI_STATUS_CHECK_COND) {
2532                         if ((pcsio->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) {
2533                           TRM_DPRINTF("trm_RequestSense..................\n");
2534                           trm_RequestSense(pACB, pDCB, pSRB);
2535                           return;
2536                         }
2537                         pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2538                         pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2539                         goto ckc_e;
2540                 } else if (status == SCSI_STAT_QUEUEFULL) {
2541                         bval = (u_int8_t) pDCB->GoingSRBCnt;
2542                         bval--;
2543                         pDCB->MaxActiveCommandCnt = bval;
2544                         trm_RewaitSRB(pDCB, pSRB);
2545                         pSRB->AdaptStatus = 0;
2546                         pSRB->TargetStatus = 0;
2547                         return;
2548                 } else if (status == SCSI_STAT_SEL_TIMEOUT) {
2549                         pSRB->AdaptStatus  = H_SEL_TIMEOUT;
2550                         pSRB->TargetStatus = 0;
2551                         pcsio->scsi_status = SCSI_STAT_SEL_TIMEOUT;
2552                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2553                 } else if (status == SCSI_STAT_BUSY) {
2554                         TRM_DPRINTF("trm: target busy at %s %d\n",
2555                                 __FILE__, __LINE__);
2556                         pcsio->scsi_status = SCSI_STAT_BUSY;
2557                         pccb->ccb_h.status = CAM_SCSI_BUSY;
2558                         return;
2559                   /* The device busy, try again later?    */
2560                 } else if (status == SCSI_STAT_RESCONFLICT) {
2561                         TRM_DPRINTF("trm: target reserved at %s %d\n",
2562                                 __FILE__, __LINE__);
2563                         pcsio->scsi_status = SCSI_STAT_RESCONFLICT;
2564                         pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;     /*XXX*/
2565                         return;
2566                 } else {
2567                         pSRB->AdaptStatus = 0;
2568                         if (pSRB->RetryCnt) {
2569                                 pSRB->RetryCnt--;
2570                                 pSRB->TargetStatus = 0;
2571                                 pSRB->SRBSGIndex = 0;
2572                                 if (trm_StartSCSI(pACB, pDCB, pSRB)) {
2573                                   /*
2574                                    * If trm_StartSCSI return 1 :
2575                                    * current interrupt status is interrupt
2576                                    * disreenable
2577                                    * It's said that SCSI processor has more
2578                                    * one SRB need to do
2579                                    */
2580                                         trm_RewaitSRB(pDCB, pSRB);
2581                                 }
2582                                 return;
2583                         } else {
2584                                 TRM_DPRINTF("trm: driver stuffup at %s %d\n",
2585                                         __FILE__, __LINE__);
2586                                 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2587                         }
2588                 }
2589         } else {
2590         /*
2591          * process initiator status..........................
2592          * Adapter (initiator) status
2593          */
2594                 status = pSRB->AdaptStatus;
2595                 if (status & H_OVER_UNDER_RUN) {
2596                         pSRB->TargetStatus = 0;
2597                         pccb->ccb_h.status = CAM_DATA_RUN_ERR;
2598                         /* Illegal length (over/under run) */
2599                 } else if (pSRB->SRBStatus & PARITY_ERROR) {
2600                         TRM_DPRINTF("trm: driver stuffup %s %d\n",
2601                                 __FILE__, __LINE__);
2602                         pDCB->tinfo.goal.period = 0;
2603                         pDCB->tinfo.goal.offset = 0;
2604                         /* Driver failed to perform operation */
2605                         pccb->ccb_h.status = CAM_UNCOR_PARITY;
2606                 } else {
2607                   /* no error */
2608                         pSRB->AdaptStatus = 0;
2609                         pSRB->TargetStatus = 0;
2610                         pccb->ccb_h.status = CAM_REQ_CMP;
2611                         /* there is no error, (sense is invalid) */
2612                 }
2613         }
2614 ckc_e:
2615         if (pACB->scan_devices[target_id][target_lun]) {
2616           /*
2617            *   if SCSI command in "scan devices" duty
2618            */
2619                 if (pSRB->CmdBlock[0] == TEST_UNIT_READY)
2620                         pACB->scan_devices[target_id][target_lun] = 0;
2621                 /* SCSI command phase :test unit ready */
2622                 else if (pSRB->CmdBlock[0] == INQUIRY) {
2623                   /*
2624                    * SCSI command phase :inquiry scsi device data
2625                    * (type,capacity,manufacture....
2626                    */
2627                         if (pccb->ccb_h.status == CAM_SEL_TIMEOUT)
2628                                 goto NO_DEV;
2629                         ptr = (PSCSI_INQDATA) pcsio->data_ptr;
2630                         /* page fault */
2631                         TRM_DPRINTF("trm_SRBdone..PSCSI_INQDATA:%2x \n",
2632                             ptr->DevType);
2633                         bval1 = ptr->DevType & SCSI_DEVTYPE;
2634                         if (bval1 == SCSI_NODEV) {
2635 NO_DEV:
2636                                 TRM_DPRINTF("trm_SRBdone NO Device:target_id= %d ,target_lun= %d \n",
2637                                     target_id,
2638                                     target_lun);
2639                                 intflag = splcam();
2640                                 pACB->scan_devices[target_id][target_lun] = 0;
2641                                 /* no device set scan device flag =0*/
2642                                 /* pDCB Q link */
2643                                 /* move the head of DCB to tempDCB*/
2644                                 pTempDCB=pACB->pLinkDCB;
2645                                 /* search current DCB for pass link */
2646                                 while (pTempDCB->pNextDCB != pDCB) {
2647                                         pTempDCB = pTempDCB->pNextDCB;
2648                                 }
2649                                 /*
2650                                  * when the current DCB found than connect
2651                                  * current DCB tail
2652                                  */
2653                                 /* to the DCB tail that before current DCB */
2654                                 pTempDCB->pNextDCB = pDCB->pNextDCB;
2655                                 /*
2656                                  * if there was only one DCB ,connect his tail
2657                                  * to his head
2658                                  */
2659                                 if (pACB->pLinkDCB == pDCB)
2660                                         pACB->pLinkDCB = pTempDCB->pNextDCB;
2661                                 if (pACB->pDCBRunRobin == pDCB)
2662                                         pACB->pDCBRunRobin = pTempDCB->pNextDCB;
2663                                 pDCB->DCBstatus &= ~DS_IN_QUEUE;
2664                                 pACB->DeviceCnt--;
2665                                 if (pACB->DeviceCnt == 0) {
2666                                         pACB->pLinkDCB = NULL;
2667                                         pACB->pDCBRunRobin = NULL;
2668                                 }
2669                                 splx(intflag);
2670                         } else {
2671 #ifdef trm_DEBUG1
2672                                 int j;
2673                                 for (j = 0; j < 28; j++) {
2674                                         TRM_DPRINTF("ptr=%2x ",
2675                                                 ((u_int8_t *)ptr)[j]);
2676                                 }
2677 #endif
2678                                 pDCB->DevType = bval1;
2679                                 if (bval1 == SCSI_DASD ||
2680                                     bval1 == SCSI_OPTICAL) {
2681                                         if ((((ptr->Vers & 0x07) >= 2) ||
2682                                               ((ptr->RDF & 0x0F) == 2)) &&
2683                                             (ptr->Flags & SCSI_INQ_CMDQUEUE) &&
2684                                             (pDCB->DevMode & TAG_QUEUING_) &&
2685                                             (pDCB->DevMode & EN_DISCONNECT_)) {
2686                                                 if (pDCB->DevMode &
2687                                                     TAG_QUEUING_) {
2688                                                         pDCB->
2689                                                             MaxActiveCommandCnt =
2690                                                           pACB->TagMaxNum;
2691                                                         pDCB->SyncMode |=
2692                                                           EN_TAG_QUEUING;
2693                                                         pDCB->tinfo.disc_tag |=
2694                                                           TRM_CUR_TAGENB;
2695                                                 } else {
2696                                                         pDCB->SyncMode |=
2697                                                           EN_ATN_STOP;
2698                                                         pDCB->tinfo.disc_tag &=
2699                                                           ~TRM_CUR_TAGENB;
2700                                                 }
2701                                         }
2702                                 }
2703                         }
2704                         /* pSRB->CmdBlock[0] == INQUIRY */
2705                 }
2706                 /* pACB->scan_devices[target_id][target_lun] */
2707         }
2708         intflag = splcam();
2709         /*  ReleaseSRB(pDCB, pSRB); */
2710         if (pSRB == pDCB->pGoingSRB)
2711                 pDCB->pGoingSRB = pSRB->pNextSRB;
2712         else {
2713                 psrb = pDCB->pGoingSRB;
2714                 while (psrb->pNextSRB != pSRB) {
2715                         psrb = psrb->pNextSRB;
2716                 }
2717                 psrb->pNextSRB = pSRB->pNextSRB;
2718                 if (pSRB == pDCB->pGoingLastSRB) {
2719                         pDCB->pGoingLastSRB = psrb;
2720                 }
2721         }
2722         pSRB->pNextSRB = pACB->pFreeSRB;
2723         pACB->pFreeSRB = pSRB;
2724         pDCB->GoingSRBCnt--;
2725         trm_DoWaitingSRB(pACB);
2726
2727         splx(intflag);
2728         /*  Notify cmd done */
2729         xpt_done (pccb);
2730 }
2731
2732 static void
2733 trm_DoingSRB_Done(PACB pACB)
2734 {
2735         PDCB            pDCB, pdcb;
2736         PSRB            psrb, psrb2;
2737         u_int16_t       cnt, i;
2738         union ccb       *pccb;
2739
2740         pDCB = pACB->pLinkDCB;
2741         if (pDCB == NULL)
2742                 return;
2743         pdcb = pDCB;
2744         do {
2745                 cnt = pdcb->GoingSRBCnt;
2746                 psrb = pdcb->pGoingSRB;
2747                 for (i = 0; i < cnt; i++) {
2748                         psrb2 = psrb->pNextSRB;
2749                         pccb = psrb->pccb;
2750                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2751                         /*  ReleaseSRB(pDCB, pSRB); */
2752                         psrb->pNextSRB = pACB->pFreeSRB;
2753                         pACB->pFreeSRB = psrb;
2754                         xpt_done(pccb);
2755                         psrb  = psrb2;
2756                 }
2757                 pdcb->GoingSRBCnt = 0;;
2758                 pdcb->pGoingSRB = NULL;
2759                 pdcb = pdcb->pNextDCB;
2760         }
2761         while (pdcb != pDCB);
2762 }
2763
2764 static void
2765 trm_ResetSCSIBus(PACB pACB)
2766 {
2767         int     intflag;
2768
2769         intflag = splcam();
2770         pACB->ACBFlag |= RESET_DEV;
2771
2772         trm_reg_write16(DO_RSTSCSI,TRMREG_SCSI_CONTROL);
2773         while (!(trm_reg_read16(TRMREG_SCSI_INTSTATUS) & INT_SCSIRESET));
2774         splx(intflag);
2775         return;
2776 }
2777
2778 static void
2779 trm_ScsiRstDetect(PACB pACB)
2780 {
2781         int     intflag;
2782         u_long  wlval;
2783
2784         TRM_DPRINTF("trm_ScsiRstDetect \n");
2785         wlval = 1000;
2786         while (--wlval)
2787                 DELAY(1000);
2788         intflag = splcam();
2789         trm_reg_write8(STOPDMAXFER,TRMREG_DMA_CONTROL);
2790
2791         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
2792
2793         if (pACB->ACBFlag & RESET_DEV)
2794                 pACB->ACBFlag |= RESET_DONE;
2795         else {
2796                 pACB->ACBFlag |= RESET_DETECT;
2797                 trm_ResetDevParam(pACB);
2798                 /*      trm_DoingSRB_Done(pACB); ???? */
2799                 trm_RecoverSRB(pACB);
2800                 pACB->pActiveDCB = NULL;
2801                 pACB->ACBFlag = 0;
2802                 trm_DoWaitingSRB(pACB);
2803         }
2804         splx(intflag);
2805         return;
2806 }
2807
2808 static void
2809 trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB)
2810 {
2811         union ccb               *pccb;
2812         struct ccb_scsiio       *pcsio;
2813
2814         pccb  = pSRB->pccb;
2815         pcsio = &pccb->csio;
2816
2817         pSRB->SRBFlag |= AUTO_REQSENSE;
2818         pSRB->Segment0[0] = *((u_long *) &(pSRB->CmdBlock[0]));
2819         pSRB->Segment0[1] = *((u_long *) &(pSRB->CmdBlock[4]));
2820         pSRB->Segment1[0] = (u_long) ((pSRB->ScsiCmdLen << 8) +
2821             pSRB->SRBSGCount);
2822         pSRB->Segment1[1] = pSRB->SRBTotalXferLength; /* ?????????? */
2823
2824         /* $$$$$$ Status of initiator/target $$$$$$$$ */
2825         pSRB->AdaptStatus = 0;
2826         pSRB->TargetStatus = 0;
2827         /* $$$$$$ Status of initiator/target $$$$$$$$ */
2828
2829         pSRB->SRBTotalXferLength = sizeof(pcsio->sense_data);
2830         pSRB->SgSenseTemp.address = pSRB->pSRBSGL->address;
2831         pSRB->SgSenseTemp.length  = pSRB->pSRBSGL->length;
2832         pSRB->pSRBSGL->address = trm_get_sense_bufaddr(pACB, pSRB);
2833         pSRB->pSRBSGL->length = (u_long) sizeof(struct scsi_sense_data);
2834         pSRB->SRBSGCount = 1;
2835         pSRB->SRBSGIndex = 0;
2836
2837         *((u_long *) &(pSRB->CmdBlock[0])) = 0x00000003;
2838         pSRB->CmdBlock[1] = pDCB->IdentifyMsg << 5;
2839         *((u_int16_t *) &(pSRB->CmdBlock[4])) = pcsio->sense_len;
2840         pSRB->ScsiCmdLen = 6;
2841
2842         if (trm_StartSCSI(pACB, pDCB, pSRB))
2843            /*
2844             * If trm_StartSCSI return 1 :
2845             * current interrupt status is interrupt disreenable
2846             * It's said that SCSI processor has more one SRB need to do
2847             */
2848                 trm_RewaitSRB(pDCB, pSRB);
2849 }
2850
2851 static void
2852 trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB)
2853 {
2854
2855         pSRB->MsgCnt = 1;
2856         trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2857 }
2858
2859 static void
2860 trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB)
2861 {
2862
2863         pSRB->MsgOutBuf[0] = MSG_ABORT;
2864         trm_EnableMsgOutAbort2(pACB, pSRB);
2865 }
2866
2867 static void
2868 trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,u_int32_t i,u_int32_t j)
2869 {
2870         PNVRAMTYPE      pEEpromBuf;
2871         u_int8_t        bval,PeriodIndex;
2872         u_int           target_id,target_lun;
2873         PDCB            pTempDCB;
2874         int             intflag;
2875
2876         target_id  = i;
2877         target_lun = j;
2878
2879         /*
2880          *  Using the lun 0 device to init other DCB first, if the device
2881          *  has been initialized.
2882          *  I don't want init sync arguments one by one, it is the same.
2883          */
2884         if (target_lun != 0 &&
2885             (pACB->DCBarray[target_id][0].DCBstatus & DS_IN_QUEUE))
2886                 bcopy(&pACB->DCBarray[target_id][0], pDCB,
2887                     sizeof(TRM_DCB));
2888         intflag = splcam();
2889         if (pACB->pLinkDCB == 0) {
2890                 pACB->pLinkDCB = pDCB;
2891                 /*
2892                  * RunRobin impersonate the role
2893                  * that let each device had good proportion
2894                  * about SCSI command proceeding
2895                  */
2896                 pACB->pDCBRunRobin = pDCB;
2897                 pDCB->pNextDCB = pDCB;
2898         } else {
2899                 pTempDCB=pACB->pLinkDCB;
2900                 /* search the last nod of DCB link */
2901                 while (pTempDCB->pNextDCB != pACB->pLinkDCB)
2902                         pTempDCB = pTempDCB->pNextDCB;
2903                 /* connect current DCB with last DCB tail */
2904                 pTempDCB->pNextDCB = pDCB;
2905                 /* connect current DCB tail to this DCB Q head */
2906                 pDCB->pNextDCB=pACB->pLinkDCB;
2907         }
2908         splx(intflag);
2909
2910         pACB->DeviceCnt++;
2911         pDCB->TargetID = target_id;
2912         pDCB->TargetLUN =  target_lun;
2913         pDCB->pWaitingSRB = NULL;
2914         pDCB->pGoingSRB = NULL;
2915         pDCB->GoingSRBCnt = 0;
2916         pDCB->pActiveSRB = NULL;
2917         pDCB->MaxActiveCommandCnt = 1;
2918         pDCB->DCBFlag = 0;
2919         pDCB->DCBstatus |= DS_IN_QUEUE;
2920         /* $$$$$$$ */
2921         pEEpromBuf = &trm_eepromBuf[unit];
2922         pDCB->DevMode = pEEpromBuf->NvramTarget[target_id].NvmTarCfg0;
2923         pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
2924         /* $$$$$$$ */
2925         /*
2926          * disconnect enable ?
2927          */
2928         if (pDCB->DevMode & NTC_DO_DISCONNECT) {
2929                 bval = 0xC0;
2930                 pDCB->tinfo.disc_tag |= TRM_USR_DISCENB ;
2931         } else {
2932                 bval = 0x80;
2933                 pDCB->tinfo.disc_tag &= ~(TRM_USR_DISCENB);
2934         }
2935         bval |= target_lun;
2936         pDCB->IdentifyMsg = bval;
2937         if (target_lun != 0 &&
2938             (pACB->DCBarray[target_id][0].DCBstatus & DS_IN_QUEUE))
2939                 return;
2940         /* $$$$$$$ */
2941         /*
2942          * tag Qing enable ?
2943          */
2944         if (pDCB->DevMode & TAG_QUEUING_) {
2945                 pDCB->tinfo.disc_tag |= TRM_USR_TAGENB ;
2946         } else
2947                 pDCB->tinfo.disc_tag &= ~(TRM_USR_TAGENB);
2948         /* $$$$$$$ */
2949         /*
2950          * wide nego ,sync nego enable ?
2951          */
2952         pDCB->SyncPeriod = 0;
2953         pDCB->SyncOffset = 0;
2954         PeriodIndex = pEEpromBuf->NvramTarget[target_id].NvmTarPeriod & 0x07;
2955         if (pACB->AdaptType==1) {/* is U2? */
2956             pDCB->MaxNegoPeriod=dc395u2x_clock_period[ PeriodIndex ];
2957             pDCB->tinfo.user.period=pDCB->MaxNegoPeriod;
2958             pDCB->tinfo.user.offset=(pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 31 : 0;
2959         } else {
2960         pDCB->MaxNegoPeriod=dc395x_clock_period[ PeriodIndex ];
2961             pDCB->tinfo.user.period=pDCB->MaxNegoPeriod;
2962             pDCB->tinfo.user.offset=(pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 15 : 0;
2963         }
2964         pDCB->SyncMode = 0;
2965         if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
2966             (pACB->Config & HCC_WIDE_CARD))
2967                 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
2968         /* enable wide nego */
2969         if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
2970                 pDCB->SyncMode |= SYNC_NEGO_ENABLE;
2971         /* enable sync nego */
2972         /* $$$$$$$ */
2973         /*
2974          *      Fill in tinfo structure.
2975          */
2976         pDCB->tinfo.user.width  = (pDCB->SyncMode & WIDE_NEGO_ENABLE) ?
2977           MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
2978
2979         pDCB->tinfo.current.period = 0;
2980         pDCB->tinfo.current.offset = 0;
2981         pDCB->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
2982 }
2983
2984 static void
2985 trm_srbmapSG(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2986 {
2987         PSRB pSRB;
2988
2989         pSRB=(PSRB) arg;
2990         pSRB->SRBSGPhyAddr=segs->ds_addr;
2991         return;
2992 }
2993
2994 static void
2995 trm_destroySRB(PACB pACB)
2996 {
2997         PSRB pSRB;
2998
2999         pSRB = pACB->pFreeSRB;
3000         while (pSRB) {
3001                 if (pSRB->sg_dmamap) {
3002                         bus_dmamap_unload(pACB->sg_dmat, pSRB->sg_dmamap);
3003                         bus_dmamem_free(pACB->sg_dmat, pSRB->pSRBSGL,
3004                             pSRB->sg_dmamap);
3005                         bus_dmamap_destroy(pACB->sg_dmat, pSRB->sg_dmamap);
3006                 }
3007                 if (pSRB->dmamap)
3008                         bus_dmamap_destroy(pACB->buffer_dmat, pSRB->dmamap);
3009                 pSRB = pSRB->pNextSRB;
3010         }
3011 }
3012
3013 static int
3014 trm_initSRB(PACB pACB)
3015 {
3016         u_int16_t    i;
3017         PSRB    pSRB;
3018         int error;
3019
3020         for (i = 0; i < TRM_MAX_SRB_CNT; i++) {
3021                 pSRB = (PSRB)&pACB->pFreeSRB[i];
3022
3023                 if (bus_dmamem_alloc(pACB->sg_dmat, (void **)&pSRB->pSRBSGL,
3024                     BUS_DMA_NOWAIT, &pSRB->sg_dmamap) !=0 ) {
3025                         return ENXIO;
3026                 }
3027                 bus_dmamap_load(pACB->sg_dmat, pSRB->sg_dmamap, pSRB->pSRBSGL,
3028                     TRM_MAX_SG_LISTENTRY * sizeof(SGentry),
3029                     trm_srbmapSG, pSRB, /*flags*/0);
3030                 if (i != TRM_MAX_SRB_CNT - 1) {
3031                         /*
3032                          * link all SRB
3033                          */
3034                         pSRB->pNextSRB = &pACB->pFreeSRB[i+1];
3035                 } else {
3036                         /*
3037                          * load NULL to NextSRB of the last SRB
3038                          */
3039                         pSRB->pNextSRB = NULL;
3040                 }
3041                 pSRB->TagNumber = i;
3042
3043                 /*
3044                  * Create the dmamap.  This is no longer optional!
3045                  */
3046                 if ((error = bus_dmamap_create(pACB->buffer_dmat, 0,
3047                                                &pSRB->dmamap)) != 0)
3048                         return (error);
3049
3050         }
3051         return (0);
3052 }
3053
3054
3055
3056
3057 static void
3058 trm_initACB(PACB pACB, u_int8_t adaptType, u_int16_t unit)
3059 {
3060         PNVRAMTYPE      pEEpromBuf;
3061
3062         pEEpromBuf = &trm_eepromBuf[unit];
3063         pACB->max_id = 15;
3064
3065         if (pEEpromBuf->NvramChannelCfg & NAC_SCANLUN)
3066                 pACB->max_lun = 7;
3067         else
3068                 pACB->max_lun = 0;
3069
3070         TRM_DPRINTF("trm: pACB->max_id= %d pACB->max_lun= %d \n",
3071             pACB->max_id, pACB->max_lun);
3072         pACB->pLinkDCB = NULL;
3073         pACB->pDCBRunRobin = NULL;
3074         pACB->pActiveDCB = NULL;
3075         pACB->AdapterUnit = (u_int8_t)unit;
3076         pACB->AdaptSCSIID = pEEpromBuf->NvramScsiId;
3077         pACB->AdaptSCSILUN = 0;
3078         pACB->DeviceCnt = 0;
3079         pACB->AdaptType = adaptType;
3080         pACB->TagMaxNum = 2 << pEEpromBuf->NvramMaxTag;
3081         pACB->ACBFlag = 0;
3082         return;
3083 }
3084
3085 static void
3086 NVRAM_trm_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB)
3087 {
3088         u_int8_t        *bpEeprom = (u_int8_t *) pEEpromBuf;
3089         u_int8_t        bAddr;
3090
3091         /* Enable SEEPROM */
3092         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
3093             TRMREG_GEN_CONTROL);
3094         /*
3095          * Write enable
3096          */
3097         NVRAM_trm_write_cmd(pACB, 0x04, 0xFF);
3098         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3099         NVRAM_trm_wait_30us(pACB);
3100         for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++) {
3101                 NVRAM_trm_set_data(pACB, bAddr, *bpEeprom);
3102         }
3103         /*
3104          * Write disable
3105          */
3106         NVRAM_trm_write_cmd(pACB, 0x04, 0x00);
3107         trm_reg_write8(0 , TRMREG_GEN_NVRAM);
3108         NVRAM_trm_wait_30us(pACB);
3109         /* Disable SEEPROM */
3110         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3111             TRMREG_GEN_CONTROL);
3112         return;
3113 }
3114
3115 static void
3116 NVRAM_trm_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData)
3117 {
3118         int             i;
3119         u_int8_t        bSendData;
3120         /*
3121          * Send write command & address
3122          */
3123
3124         NVRAM_trm_write_cmd(pACB, 0x05, bAddr);
3125         /*
3126          * Write data
3127          */
3128         for (i = 0; i < 8; i++, bData <<= 1) {
3129                 bSendData = NVR_SELECT;
3130                 if (bData & 0x80)
3131                   /* Start from bit 7   */
3132                         bSendData |= NVR_BITOUT;
3133                 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3134                 NVRAM_trm_wait_30us(pACB);
3135                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3136                 NVRAM_trm_wait_30us(pACB);
3137         }
3138         trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3139         NVRAM_trm_wait_30us(pACB);
3140         /*
3141          * Disable chip select
3142          */
3143         trm_reg_write8(0 , TRMREG_GEN_NVRAM);
3144         NVRAM_trm_wait_30us(pACB);
3145         trm_reg_write8(NVR_SELECT ,TRMREG_GEN_NVRAM);
3146         NVRAM_trm_wait_30us(pACB);
3147         /*
3148          * Wait for write ready
3149          */
3150         while (1) {
3151                 trm_reg_write8((NVR_SELECT | NVR_CLOCK), TRMREG_GEN_NVRAM);
3152                 NVRAM_trm_wait_30us(pACB);
3153                 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3154                 NVRAM_trm_wait_30us(pACB);
3155                 if (trm_reg_read8(TRMREG_GEN_NVRAM) & NVR_BITIN) {
3156                         break;
3157                 }
3158         }
3159         /*
3160          * Disable chip select
3161          */
3162         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3163         return;
3164 }
3165
3166 static void
3167 NVRAM_trm_read_all(PNVRAMTYPE pEEpromBuf, PACB pACB)
3168 {
3169         u_int8_t        *bpEeprom = (u_int8_t*) pEEpromBuf;
3170         u_int8_t        bAddr;
3171
3172         /*
3173          * Enable SEEPROM
3174          */
3175         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
3176             TRMREG_GEN_CONTROL);
3177         for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++)
3178                 *bpEeprom = NVRAM_trm_get_data(pACB, bAddr);
3179         /*
3180          * Disable SEEPROM
3181          */
3182         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3183             TRMREG_GEN_CONTROL);
3184         return;
3185 }
3186
3187 static u_int8_t
3188 NVRAM_trm_get_data(PACB pACB, u_int8_t bAddr)
3189 {
3190         int             i;
3191         u_int8_t        bReadData, bData = 0;
3192         /*
3193         * Send read command & address
3194         */
3195
3196         NVRAM_trm_write_cmd(pACB, 0x06, bAddr);
3197
3198         for (i = 0; i < 8; i++) {
3199           /*
3200            * Read data
3201            */
3202                 trm_reg_write8((NVR_SELECT | NVR_CLOCK) , TRMREG_GEN_NVRAM);
3203                 NVRAM_trm_wait_30us(pACB);
3204                 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3205                 /*
3206                  * Get data bit while falling edge
3207                  */
3208                 bReadData = trm_reg_read8(TRMREG_GEN_NVRAM);
3209                 bData <<= 1;
3210                 if (bReadData & NVR_BITIN) {
3211                         bData |= 1;
3212                 }
3213                 NVRAM_trm_wait_30us(pACB);
3214         }
3215         /*
3216          * Disable chip select
3217          */
3218         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3219         return (bData);
3220 }
3221
3222 static void
3223 NVRAM_trm_wait_30us(PACB pACB)
3224 {
3225
3226         /*    ScsiPortStallExecution(30);        wait 30 us     */
3227         trm_reg_write8(5, TRMREG_GEN_TIMER);
3228         while (!(trm_reg_read8(TRMREG_GEN_STATUS) & GTIMEOUT));
3229         return;
3230 }
3231
3232 static void
3233 NVRAM_trm_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr)
3234 {
3235         int             i;
3236         u_int8_t        bSendData;
3237
3238         for (i = 0; i < 3; i++, bCmd <<= 1) {
3239           /*
3240            * Program SB+OP code
3241            */
3242                 bSendData = NVR_SELECT;
3243                 if (bCmd & 0x04)
3244                         bSendData |= NVR_BITOUT;
3245                 /* start from bit 2 */
3246                 trm_reg_write8(bSendData, TRMREG_GEN_NVRAM);
3247                 NVRAM_trm_wait_30us(pACB);
3248                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3249                 NVRAM_trm_wait_30us(pACB);
3250         }
3251         for (i = 0; i < 7; i++, bAddr <<= 1) {
3252           /*
3253            * Program address
3254            */
3255                 bSendData = NVR_SELECT;
3256                 if (bAddr & 0x40)
3257                   /* Start from bit 6   */
3258                         bSendData |= NVR_BITOUT;
3259                 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3260                 NVRAM_trm_wait_30us(pACB);
3261                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3262                 NVRAM_trm_wait_30us(pACB);
3263         }
3264         trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3265         NVRAM_trm_wait_30us(pACB);
3266 }
3267
3268 static void
3269 trm_check_eeprom(PNVRAMTYPE pEEpromBuf, PACB pACB)
3270 {
3271         u_int16_t       *wpEeprom = (u_int16_t *) pEEpromBuf;
3272         u_int16_t       wAddr, wCheckSum;
3273         u_long  dAddr, *dpEeprom;
3274
3275         NVRAM_trm_read_all(pEEpromBuf,pACB);
3276         wCheckSum = 0;
3277         for (wAddr = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3278             wAddr < 64; wAddr++, wpEeprom++) {
3279                 wCheckSum += *wpEeprom;
3280         }
3281         if (wCheckSum != 0x1234) {
3282           /*
3283            * Checksum error, load default
3284            */
3285                 pEEpromBuf->NvramSubVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3286                 pEEpromBuf->NvramSubVendorID[1] =
3287                   (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3288                 pEEpromBuf->NvramSubSysID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3289                 pEEpromBuf->NvramSubSysID[1] =
3290                   (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3291                 pEEpromBuf->NvramSubClass = 0x00;
3292                 pEEpromBuf->NvramVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3293                 pEEpromBuf->NvramVendorID[1] =
3294                   (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3295                 pEEpromBuf->NvramDeviceID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3296                 pEEpromBuf->NvramDeviceID[1] =
3297                   (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3298                 pEEpromBuf->NvramReserved = 0x00;
3299
3300                 for (dAddr = 0, dpEeprom = (u_long *) pEEpromBuf->NvramTarget;
3301                     dAddr < 16; dAddr++, dpEeprom++) {
3302                         *dpEeprom = 0x00000077;
3303                         /* NvmTarCfg3,NvmTarCfg2,NvmTarPeriod,NvmTarCfg0 */
3304                 }
3305
3306                 *dpEeprom++ = 0x04000F07;
3307                 /* NvramMaxTag,NvramDelayTime,NvramChannelCfg,NvramScsiId */
3308                 *dpEeprom++ = 0x00000015;
3309                 /* NvramReserved1,NvramBootLun,NvramBootTarget,NvramReserved0 */
3310                 for (dAddr = 0; dAddr < 12; dAddr++, dpEeprom++)
3311                         *dpEeprom = 0x00;
3312                 pEEpromBuf->NvramCheckSum = 0x00;
3313                 for (wAddr = 0, wCheckSum = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3314                     wAddr < 63; wAddr++, wpEeprom++)
3315                         wCheckSum += *wpEeprom;
3316                 *wpEeprom = 0x1234 - wCheckSum;
3317                 NVRAM_trm_write_all(pEEpromBuf,pACB);
3318         }
3319         return;
3320 }
3321 static int
3322 trm_initAdapter(PACB pACB, u_int16_t unit)
3323 {
3324         PNVRAMTYPE      pEEpromBuf;
3325         u_int16_t       wval;
3326         u_int8_t        bval;
3327
3328         pEEpromBuf = &trm_eepromBuf[unit];
3329
3330         /* 250ms selection timeout */
3331         trm_reg_write8(SEL_TIMEOUT, TRMREG_SCSI_TIMEOUT);
3332         /* Mask all the interrupt */
3333         trm_reg_write8(0x00, TRMREG_DMA_INTEN);
3334         trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
3335         /* Reset SCSI module */
3336         trm_reg_write16(DO_RSTMODULE, TRMREG_SCSI_CONTROL);
3337         /* program configuration 0 */
3338         pACB->Config = HCC_AUTOTERM | HCC_PARITY;
3339         if (trm_reg_read8(TRMREG_GEN_STATUS) & WIDESCSI)
3340                 pACB->Config |= HCC_WIDE_CARD;
3341         if (pEEpromBuf->NvramChannelCfg & NAC_POWERON_SCSI_RESET)
3342                 pACB->Config |= HCC_SCSI_RESET;
3343         if (pACB->Config & HCC_PARITY)
3344                 bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
3345         else
3346                 bval = PHASELATCH | INITIATOR | BLOCKRST ;
3347         trm_reg_write8(bval,TRMREG_SCSI_CONFIG0);
3348         /* program configuration 1 */
3349         trm_reg_write8(0x13, TRMREG_SCSI_CONFIG1);
3350         /* program Host ID */
3351         bval = pEEpromBuf->NvramScsiId;
3352         trm_reg_write8(bval, TRMREG_SCSI_HOSTID);
3353         /* set ansynchronous transfer */
3354         trm_reg_write8(0x00, TRMREG_SCSI_OFFSET);
3355         /* Trun LED control off*/
3356         wval = trm_reg_read16(TRMREG_GEN_CONTROL) & 0x7F;
3357         trm_reg_write16(wval, TRMREG_GEN_CONTROL);
3358         /* DMA config */
3359         wval = trm_reg_read16(TRMREG_DMA_CONFIG) | DMA_ENHANCE;
3360         trm_reg_write16(wval, TRMREG_DMA_CONFIG);
3361         /* Clear pending interrupt status */
3362         trm_reg_read8(TRMREG_SCSI_INTSTATUS);
3363         /* Enable SCSI interrupt */
3364         trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
3365         trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
3366         return (0);
3367 }
3368
3369 static void
3370 trm_mapSRB(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3371 {
3372         PACB pACB;
3373
3374         pACB = (PACB)arg;
3375         pACB->srb_physbase = segs->ds_addr;
3376 }
3377
3378 static void
3379 trm_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3380 {
3381         bus_addr_t *baddr;
3382
3383         baddr = (bus_addr_t *)arg;
3384         *baddr = segs->ds_addr;
3385 }
3386
3387 static PACB
3388 trm_init(u_int16_t unit, device_t dev)
3389 {
3390         PACB            pACB;
3391         int             rid = PCIR_BAR(0), i = 0, j = 0;
3392         u_int16_t       adaptType = 0;
3393
3394         pACB = (PACB) device_get_softc(dev);
3395         if (!pACB) {
3396                 printf("trm%d: cannot allocate ACB !\n", unit);
3397                 return (NULL);
3398         }
3399         pACB->iores = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
3400             &rid, RF_ACTIVE);
3401         if (pACB->iores == NULL) {
3402                 printf("trm_init: bus_alloc_resource failed!\n");
3403                 return (NULL);
3404         }
3405         switch (pci_get_devid(dev)) {
3406         case PCI_DEVICEID_TRMS1040:
3407                 adaptType = 0;
3408                 break;
3409         case PCI_DEVICEID_TRMS2080:
3410                 adaptType = 1;
3411                 break;
3412         default:
3413                 printf("trm_init %d: unknown adapter type!\n", unit);
3414                 goto bad;
3415         }
3416         pACB->dev = dev;
3417         pACB->tag = rman_get_bustag(pACB->iores);
3418         pACB->bsh = rman_get_bushandle(pACB->iores);
3419         if (bus_dma_tag_create(
3420         /*parent_dmat*/ pACB->parent_dmat,
3421         /*alignment*/   1,
3422         /*boundary*/    0,
3423         /*lowaddr*/     BUS_SPACE_MAXADDR,
3424         /*highaddr*/    BUS_SPACE_MAXADDR,
3425         /*filter*/      NULL,
3426         /*filterarg*/   NULL,
3427         /*maxsize*/     MAXBSIZE,
3428         /*nsegments*/   TRM_NSEG,
3429         /*maxsegsz*/    TRM_MAXTRANSFER_SIZE,
3430         /*flags*/       BUS_DMA_ALLOCNOW,
3431         /*lockfunc*/    busdma_lock_mutex,
3432         /*lockarg*/     &Giant,
3433         /* dmat */      &pACB->buffer_dmat) != 0)
3434                 goto bad;
3435         /* DMA tag for our ccb structures */
3436         if (bus_dma_tag_create(
3437         /*parent_dmat*/pACB->parent_dmat,
3438         /*alignment*/  1,
3439         /*boundary*/   0,
3440         /*lowaddr*/    BUS_SPACE_MAXADDR,
3441         /*highaddr*/   BUS_SPACE_MAXADDR,
3442         /*filter*/     NULL,
3443         /*filterarg*/  NULL,
3444         /*maxsize*/    TRM_MAX_SRB_CNT * sizeof(TRM_SRB),
3445         /*nsegments*/  1,
3446         /*maxsegsz*/   TRM_MAXTRANSFER_SIZE,
3447         /*flags*/      0,
3448         /*lockfunc*/   busdma_lock_mutex,
3449         /*lockarg*/    &Giant,
3450         /*dmat*/       &pACB->srb_dmat) != 0) {
3451                 printf("trm_init %d: bus_dma_tag_create SRB failure\n", unit);
3452                 goto bad;
3453         }
3454         if (bus_dmamem_alloc(pACB->srb_dmat, (void **)&pACB->pFreeSRB,
3455             BUS_DMA_NOWAIT, &pACB->srb_dmamap) != 0) {
3456                 printf("trm_init %d: bus_dmamem_alloc SRB failure\n", unit);
3457                 goto bad;
3458         }
3459         bus_dmamap_load(pACB->srb_dmat, pACB->srb_dmamap, pACB->pFreeSRB,
3460             TRM_MAX_SRB_CNT * sizeof(TRM_SRB), trm_mapSRB, pACB,
3461             /* flags */0);
3462         /* Create, allocate, and map DMA buffers for autosense data */
3463         if (bus_dma_tag_create(/*parent_dmat*/NULL, /*alignment*/1,
3464             /*boundary*/0,
3465             /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
3466             /*highaddr*/BUS_SPACE_MAXADDR,
3467             /*filter*/NULL, /*filterarg*/NULL,
3468             sizeof(struct scsi_sense_data) * TRM_MAX_SRB_CNT,
3469             /*nsegments*/1,
3470             /*maxsegsz*/TRM_MAXTRANSFER_SIZE,
3471             /*flags*/0, /*lockfunc*/busdma_lock_mutex,
3472             /*lockarg*/&Giant, &pACB->sense_dmat) != 0) {
3473           if (bootverbose)
3474             device_printf(dev, "cannot create sense buffer dmat\n");
3475           goto bad;
3476         }
3477
3478         if (bus_dmamem_alloc(pACB->sense_dmat, (void **)&pACB->sense_buffers,
3479                              BUS_DMA_NOWAIT, &pACB->sense_dmamap) != 0)
3480                 goto bad;
3481
3482         bus_dmamap_load(pACB->sense_dmat, pACB->sense_dmamap,
3483                        pACB->sense_buffers,
3484                        sizeof(struct scsi_sense_data) * TRM_MAX_SRB_CNT,
3485                        trm_dmamap_cb, &pACB->sense_busaddr, /*flags*/0);
3486
3487         trm_check_eeprom(&trm_eepromBuf[unit],pACB);
3488         trm_initACB(pACB, adaptType, unit);
3489         for (i = 0; i < (pACB->max_id + 1); i++) {
3490                 if (pACB->AdaptSCSIID == i)
3491                         continue;
3492                 for(j = 0; j < (pACB->max_lun + 1); j++) {
3493                         pACB->scan_devices[i][j] = 1;
3494                         /* we assume we need to scan all devices */
3495                         trm_initDCB(pACB, &pACB->DCBarray[i][j], unit, i, j);
3496                 }
3497         }
3498         bzero(pACB->pFreeSRB, TRM_MAX_SRB_CNT * sizeof(TRM_SRB));
3499         if (bus_dma_tag_create(
3500                     /*parent_dmat*/NULL,
3501                     /*alignment*/  1,
3502                     /*boundary*/   0,
3503                     /*lowaddr*/    BUS_SPACE_MAXADDR,
3504                     /*highaddr*/   BUS_SPACE_MAXADDR,
3505                     /*filter*/     NULL,
3506                     /*filterarg*/  NULL,
3507                     /*maxsize*/    TRM_MAX_SG_LISTENTRY * sizeof(SGentry),
3508                     /*nsegments*/  1,
3509                     /*maxsegsz*/   TRM_MAXTRANSFER_SIZE,
3510                     /*flags*/      0,
3511                     /*lockfunc*/   busdma_lock_mutex,
3512                     /*lockarg*/    &Giant,
3513                     /*dmat*/       &pACB->sg_dmat) != 0)
3514                 goto bad;
3515
3516         if (trm_initSRB(pACB)) {
3517                 printf("trm_initSRB: error\n");
3518                 goto bad;
3519         }
3520         if (trm_initAdapter(pACB, unit)) {
3521                 printf("trm_initAdapter: initial ERROR\n");
3522                 goto bad;
3523         }
3524         return (pACB);
3525 bad:
3526         if (pACB->iores)
3527                 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
3528                     pACB->iores);
3529         if (pACB->sense_dmamap) {
3530                 bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3531                 bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3532                     pACB->sense_dmamap);
3533                 bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3534         }
3535         if (pACB->sense_dmat)
3536                 bus_dma_tag_destroy(pACB->sense_dmat);
3537         if (pACB->sg_dmat) {
3538                 trm_destroySRB(pACB);
3539                 bus_dma_tag_destroy(pACB->sg_dmat);
3540         }
3541         if (pACB->srb_dmamap) {
3542                 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3543                 bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3544                     pACB->srb_dmamap);
3545                 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3546         }
3547         if (pACB->srb_dmat)
3548                 bus_dma_tag_destroy(pACB->srb_dmat);
3549         if (pACB->buffer_dmat)
3550                 bus_dma_tag_destroy(pACB->buffer_dmat);
3551         return (NULL);
3552 }
3553
3554 static int
3555 trm_attach(device_t dev)
3556 {
3557         struct  cam_devq *device_Q;
3558         u_long  device_id;
3559         PACB    pACB = 0;
3560         int     rid = 0;
3561         int unit = device_get_unit(dev);
3562
3563         device_id = pci_get_devid(dev);
3564         /*
3565          * These cards do not allow memory mapped accesses
3566          */
3567         if ((pACB = trm_init((u_int16_t) unit,
3568             dev)) == NULL) {
3569                 printf("trm%d: trm_init error!\n",unit);
3570                 return (ENXIO);
3571         }
3572         /* After setting up the adapter, map our interrupt */
3573         /*
3574          * Now let the CAM generic SCSI layer find the SCSI devices on the bus
3575          * start queue to reset to the idle loop.
3576          * Create device queue of SIM(s)
3577          * (MAX_START_JOB - 1) : max_sim_transactions
3578          */
3579         pACB->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3580             RF_SHAREABLE | RF_ACTIVE);
3581         if (pACB->irq == NULL ||
3582             bus_setup_intr(dev, pACB->irq,
3583             INTR_TYPE_CAM, trm_Interrupt, pACB, &pACB->ih)) {
3584                 printf("trm%d: register Interrupt handler error!\n", unit);
3585                 goto bad;
3586         }
3587         device_Q = cam_simq_alloc(TRM_MAX_START_JOB);
3588         if (device_Q == NULL){
3589                 printf("trm%d: device_Q == NULL !\n",unit);
3590                 goto bad;
3591         }
3592         /*
3593          * Now tell the generic SCSI layer
3594          * about our bus.
3595          * If this is the xpt layer creating a sim, then it's OK
3596          * to wait for an allocation.
3597          * XXX Should we pass in a flag to indicate that wait is OK?
3598          *
3599          *                    SIM allocation
3600          *
3601          *                 SCSI Interface Modules
3602          * The sim driver creates a sim for each controller.  The sim device
3603          * queue is separately created in order to allow resource sharing betwee
3604          * sims.  For instance, a driver may create one sim for each channel of
3605          * a multi-channel controller and use the same queue for each channel.
3606          * In this way, the queue resources are shared across all the channels
3607          * of the multi-channel controller.
3608          * trm_action     : sim_action_func
3609          * trm_poll       : sim_poll_func
3610          * "trm"        : sim_name ,if sim_name =  "xpt" ..M_DEVBUF,M_WAITOK
3611          * pACB         : *softc    if sim_name <> "xpt" ..M_DEVBUF,M_NOWAIT
3612          * pACB->unit   : unit
3613          * 1            : max_dev_transactions
3614          * MAX_TAGS     : max_tagged_dev_transactions
3615          *
3616          *  *******Construct our first channel SIM entry
3617          */
3618         pACB->psim = cam_sim_alloc(trm_action,
3619             trm_poll,
3620             "trm",
3621             pACB,
3622             unit,
3623             1,
3624             TRM_MAX_TAGS_CMD_QUEUE,
3625             device_Q);
3626         if (pACB->psim == NULL) {
3627                 printf("trm%d: SIM allocate fault !\n",unit);
3628                 cam_simq_free(device_Q);  /* SIM allocate fault*/
3629                 goto bad;
3630         }
3631         if (xpt_bus_register(pACB->psim, 0) != CAM_SUCCESS)  {
3632                 printf("trm%d: xpt_bus_register fault !\n",unit);
3633                 goto bad;
3634         }
3635         if (xpt_create_path(&pACB->ppath,
3636               NULL,
3637               cam_sim_path(pACB->psim),
3638               CAM_TARGET_WILDCARD,
3639               CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3640                 printf("trm%d: xpt_create_path fault !\n",unit);
3641                 xpt_bus_deregister(cam_sim_path(pACB->psim));
3642                 goto bad;
3643         }
3644         return (0);
3645 bad:
3646         if (pACB->iores)
3647                 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
3648                     pACB->iores);
3649         if (pACB->sg_dmat) {
3650                 trm_destroySRB(pACB);
3651                 bus_dma_tag_destroy(pACB->sg_dmat);
3652         }
3653
3654         if (pACB->srb_dmamap) {
3655                 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3656                 bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3657                     pACB->srb_dmamap);
3658                 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3659         }
3660         if (pACB->srb_dmat)
3661                 bus_dma_tag_destroy(pACB->srb_dmat);
3662         if (pACB->sense_dmamap) {
3663                   bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3664                   bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3665                       pACB->sense_dmamap);
3666                   bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3667         }
3668         if (pACB->sense_dmat)
3669                 bus_dma_tag_destroy(pACB->sense_dmat);
3670         if (pACB->buffer_dmat)
3671                 bus_dma_tag_destroy(pACB->buffer_dmat);
3672         if (pACB->ih)
3673                 bus_teardown_intr(dev, pACB->irq, pACB->ih);
3674         if (pACB->irq)
3675                 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3676         if (pACB->psim)
3677                 cam_sim_free(pACB->psim, TRUE);
3678
3679         return (ENXIO);
3680
3681 }
3682
3683 /*
3684 *                  pci_device
3685 *         trm_probe (device_t tag, pcidi_t type)
3686 *
3687 */
3688 static int
3689 trm_probe(device_t dev)
3690 {
3691         switch (pci_get_devid(dev)) {
3692         case PCI_DEVICEID_TRMS1040:
3693                 device_set_desc(dev,
3694                     "Tekram DC395U/UW/F DC315/U Fast20 Wide SCSI Adapter");
3695                 return (BUS_PROBE_DEFAULT);
3696         case PCI_DEVICEID_TRMS2080:
3697                 device_set_desc(dev,
3698                     "Tekram DC395U2D/U2W Fast40 Wide SCSI Adapter");
3699                 return (BUS_PROBE_DEFAULT);
3700         default:
3701                 return (ENXIO);
3702         }
3703 }
3704
3705 static int
3706 trm_detach(device_t dev)
3707 {
3708         PACB pACB = device_get_softc(dev);
3709
3710         bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), pACB->iores);
3711         trm_destroySRB(pACB);
3712         bus_dma_tag_destroy(pACB->sg_dmat);
3713         bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3714         bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3715             pACB->srb_dmamap);
3716         bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3717         bus_dma_tag_destroy(pACB->srb_dmat);
3718         bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3719         bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3720             pACB->sense_dmamap);
3721         bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3722         bus_dma_tag_destroy(pACB->sense_dmat);
3723         bus_dma_tag_destroy(pACB->buffer_dmat);
3724         bus_teardown_intr(dev, pACB->irq, pACB->ih);
3725         bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3726         xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL);
3727         xpt_free_path(pACB->ppath);
3728         xpt_bus_deregister(cam_sim_path(pACB->psim));
3729         cam_sim_free(pACB->psim, TRUE);
3730         return (0);
3731 }
3732 static device_method_t trm_methods[] = {
3733         /* Device interface */
3734         DEVMETHOD(device_probe,         trm_probe),
3735         DEVMETHOD(device_attach,        trm_attach),
3736         DEVMETHOD(device_detach,        trm_detach),
3737         { 0, 0 }
3738 };
3739
3740 static driver_t trm_driver = {
3741         "trm", trm_methods, sizeof(struct _ACB)
3742 };
3743
3744 static devclass_t trm_devclass;
3745 DRIVER_MODULE(trm, pci, trm_driver, trm_devclass, 0, 0);
3746 MODULE_DEPEND(trm, cam, 1, 1, 1);