1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */
5 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and
6 * Aaron Campbell <aaron@monkey.org>. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Jason L. Wright,
19 * Theo de Raadt and Aaron Campbell.
20 * 4. Neither the name of the author nor the names of any co-contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGE.
37 #include <sys/cdefs.h>
38 __FBSDID("$FreeBSD$");
41 * Driver for 3c990 (Typhoon) Ethernet ASIC
44 #include <sys/cdefs.h>
45 __FBSDID("$FreeBSD$");
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/sockio.h>
51 #include <sys/malloc.h>
52 #include <sys/kernel.h>
53 #include <sys/module.h>
54 #include <sys/socket.h>
57 #include <net/if_arp.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/if_vlan_var.h>
63 #include <netinet/in.h>
64 #include <netinet/in_systm.h>
65 #include <netinet/in_var.h>
66 #include <netinet/ip.h>
67 #include <netinet/if_ether.h>
68 #include <machine/in_cksum.h>
70 #include <net/if_media.h>
74 #include <vm/vm.h> /* for vtophys */
75 #include <vm/pmap.h> /* for vtophys */
76 #include <machine/clock.h> /* for DELAY */
77 #include <machine/bus.h>
78 #include <machine/resource.h>
82 #include <dev/mii/mii.h>
83 #include <dev/mii/miivar.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
87 #define TXP_USEIOSPACE
88 #define __STRICT_ALIGNMENT
90 #include <dev/txp/if_txpreg.h>
91 #include <dev/txp/3c990img.h>
94 static const char rcsid[] =
99 * Various supported device vendors/types and their names.
101 static struct txp_type txp_devs[] = {
102 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95,
103 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" },
104 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97,
105 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" },
106 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM,
107 "3Com 3cR990B-TXM Etherlink with 3XP Processor" },
108 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95,
109 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" },
110 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97,
111 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" },
112 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV,
113 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" },
117 static int txp_probe (device_t);
118 static int txp_attach (device_t);
119 static int txp_detach (device_t);
120 static void txp_intr (void *);
121 static void txp_tick (void *);
122 static int txp_shutdown (device_t);
123 static int txp_ioctl (struct ifnet *, u_long, caddr_t);
124 static void txp_start (struct ifnet *);
125 static void txp_stop (struct txp_softc *);
126 static void txp_init (void *);
127 static void txp_watchdog (struct ifnet *);
129 static void txp_release_resources(struct txp_softc *);
130 static int txp_chip_init(struct txp_softc *);
131 static int txp_reset_adapter(struct txp_softc *);
132 static int txp_download_fw(struct txp_softc *);
133 static int txp_download_fw_wait(struct txp_softc *);
134 static int txp_download_fw_section (struct txp_softc *,
135 struct txp_fw_section_header *, int);
136 static int txp_alloc_rings(struct txp_softc *);
137 static int txp_rxring_fill(struct txp_softc *);
138 static void txp_rxring_empty(struct txp_softc *);
139 static void txp_set_filter(struct txp_softc *);
141 static int txp_cmd_desc_numfree(struct txp_softc *);
142 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t,
143 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int);
144 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t,
145 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t,
146 struct txp_rsp_desc **, int);
147 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t,
148 struct txp_rsp_desc **);
149 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *,
150 struct txp_rsp_desc *);
151 static void txp_capabilities(struct txp_softc *);
153 static void txp_ifmedia_sts(struct ifnet *, struct ifmediareq *);
154 static int txp_ifmedia_upd(struct ifnet *);
156 static void txp_show_descriptor(void *);
158 static void txp_tx_reclaim(struct txp_softc *, struct txp_tx_ring *);
159 static void txp_rxbuf_reclaim(struct txp_softc *);
160 static void txp_rx_reclaim(struct txp_softc *, struct txp_rx_ring *);
162 #ifdef TXP_USEIOSPACE
163 #define TXP_RES SYS_RES_IOPORT
164 #define TXP_RID TXP_PCI_LOIO
166 #define TXP_RES SYS_RES_MEMORY
167 #define TXP_RID TXP_PCI_LOMEM
170 static device_method_t txp_methods[] = {
171 /* Device interface */
172 DEVMETHOD(device_probe, txp_probe),
173 DEVMETHOD(device_attach, txp_attach),
174 DEVMETHOD(device_detach, txp_detach),
175 DEVMETHOD(device_shutdown, txp_shutdown),
179 static driver_t txp_driver = {
182 sizeof(struct txp_softc)
185 static devclass_t txp_devclass;
187 DRIVER_MODULE(txp, pci, txp_driver, txp_devclass, 0, 0);
188 MODULE_DEPEND(txp, pci, 1, 1, 1);
189 MODULE_DEPEND(txp, ether, 1, 1, 1);
199 while(t->txp_name != NULL) {
200 if ((pci_get_vendor(dev) == t->txp_vid) &&
201 (pci_get_device(dev) == t->txp_did)) {
202 device_set_desc(dev, t->txp_name);
203 return(BUS_PROBE_DEFAULT);
215 struct txp_softc *sc;
219 int unit, error = 0, rid;
221 sc = device_get_softc(dev);
222 unit = device_get_unit(dev);
226 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
227 MTX_DEF | MTX_RECURSE);
229 * Map control/status registers.
231 pci_enable_busmaster(dev);
234 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid,
237 if (sc->sc_res == NULL) {
238 device_printf(dev, "couldn't map ports/memory\n");
243 sc->sc_bt = rman_get_bustag(sc->sc_res);
244 sc->sc_bh = rman_get_bushandle(sc->sc_res);
246 /* Allocate interrupt */
248 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
249 RF_SHAREABLE | RF_ACTIVE);
251 if (sc->sc_irq == NULL) {
252 device_printf(dev, "couldn't map interrupt\n");
253 txp_release_resources(sc);
258 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET,
259 txp_intr, sc, &sc->sc_intrhand);
262 txp_release_resources(sc);
263 device_printf(dev, "couldn't set up irq\n");
267 if (txp_chip_init(sc)) {
268 txp_release_resources(sc);
272 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF,
273 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
274 error = txp_download_fw(sc);
275 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF);
279 txp_release_resources(sc);
283 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF,
284 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
285 bzero(sc->sc_ldata, sizeof(struct txp_ldata));
287 if (txp_alloc_rings(sc)) {
288 txp_release_resources(sc);
292 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
293 NULL, NULL, NULL, 1)) {
294 txp_release_resources(sc);
298 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
299 &p1, &p2, NULL, 1)) {
300 txp_release_resources(sc);
306 sc->sc_arpcom.ac_enaddr[0] = ((u_int8_t *)&p1)[1];
307 sc->sc_arpcom.ac_enaddr[1] = ((u_int8_t *)&p1)[0];
308 sc->sc_arpcom.ac_enaddr[2] = ((u_int8_t *)&p2)[3];
309 sc->sc_arpcom.ac_enaddr[3] = ((u_int8_t *)&p2)[2];
310 sc->sc_arpcom.ac_enaddr[4] = ((u_int8_t *)&p2)[1];
311 sc->sc_arpcom.ac_enaddr[5] = ((u_int8_t *)&p2)[0];
315 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
316 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
317 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
318 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
319 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
320 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
321 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
322 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
324 sc->sc_xcvr = TXP_XCVR_AUTO;
325 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
326 NULL, NULL, NULL, 0);
327 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
329 ifp = &sc->sc_arpcom.ac_if;
331 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
332 ifp->if_mtu = ETHERMTU;
333 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
335 ifp->if_ioctl = txp_ioctl;
336 ifp->if_start = txp_start;
337 ifp->if_watchdog = txp_watchdog;
338 ifp->if_init = txp_init;
339 ifp->if_baudrate = 100000000;
340 ifp->if_snd.ifq_maxlen = TX_ENTRIES;
341 ifp->if_hwassist = 0;
342 txp_capabilities(sc);
345 * Attach us everywhere
347 ether_ifattach(ifp, sc->sc_arpcom.ac_enaddr);
348 callout_handle_init(&sc->sc_tick);
352 txp_release_resources(sc);
353 mtx_destroy(&sc->sc_mtx);
361 struct txp_softc *sc;
365 sc = device_get_softc(dev);
366 ifp = &sc->sc_arpcom.ac_if;
371 ifmedia_removeall(&sc->sc_ifmedia);
374 for (i = 0; i < RXBUF_ENTRIES; i++)
375 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF);
377 txp_release_resources(sc);
379 mtx_destroy(&sc->sc_mtx);
384 txp_release_resources(sc)
385 struct txp_softc *sc;
391 if (sc->sc_intrhand != NULL)
392 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand);
394 if (sc->sc_irq != NULL)
395 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq);
397 if (sc->sc_res != NULL)
398 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res);
400 if (sc->sc_ldata != NULL)
401 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF);
408 struct txp_softc *sc;
410 /* disable interrupts */
411 WRITE_REG(sc, TXP_IER, 0);
412 WRITE_REG(sc, TXP_IMR,
413 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
414 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
417 /* ack all interrupts */
418 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
419 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
420 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
421 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
422 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
424 if (txp_reset_adapter(sc))
427 /* disable interrupts */
428 WRITE_REG(sc, TXP_IER, 0);
429 WRITE_REG(sc, TXP_IMR,
430 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
431 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
434 /* ack all interrupts */
435 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
436 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
437 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
438 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
439 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
445 txp_reset_adapter(sc)
446 struct txp_softc *sc;
452 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
454 WRITE_REG(sc, TXP_SRR, 0);
456 /* Should wait max 6 seconds */
457 for (i = 0; i < 6000; i++) {
458 r = READ_REG(sc, TXP_A2H_0);
459 if (r == STAT_WAITING_FOR_HOST_REQUEST)
464 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
465 device_printf(sc->sc_dev, "reset hung\n");
474 struct txp_softc *sc;
476 struct txp_fw_file_header *fileheader;
477 struct txp_fw_section_header *secthead;
479 u_int32_t r, i, ier, imr;
482 ier = READ_REG(sc, TXP_IER);
483 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
485 imr = READ_REG(sc, TXP_IMR);
486 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
488 for (i = 0; i < 10000; i++) {
489 r = READ_REG(sc, TXP_A2H_0);
490 if (r == STAT_WAITING_FOR_HOST_REQUEST)
494 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
495 device_printf(sc->sc_dev, "not waiting for host request\n");
500 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
502 fileheader = (struct txp_fw_file_header *)tc990image;
503 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) {
504 device_printf(sc->sc_dev, "fw invalid magic\n");
508 /* Tell boot firmware to get ready for image */
509 WRITE_REG(sc, TXP_H2A_1, fileheader->addr);
510 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
512 if (txp_download_fw_wait(sc)) {
513 device_printf(sc->sc_dev, "fw wait failed, initial\n");
517 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) +
518 sizeof(struct txp_fw_file_header));
520 for (sect = 0; sect < fileheader->nsections; sect++) {
521 if (txp_download_fw_section(sc, secthead, sect))
523 secthead = (struct txp_fw_section_header *)
524 (((u_int8_t *)secthead) + secthead->nbytes +
528 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
530 for (i = 0; i < 10000; i++) {
531 r = READ_REG(sc, TXP_A2H_0);
532 if (r == STAT_WAITING_FOR_BOOT)
536 if (r != STAT_WAITING_FOR_BOOT) {
537 device_printf(sc->sc_dev, "not waiting for boot\n");
541 WRITE_REG(sc, TXP_IER, ier);
542 WRITE_REG(sc, TXP_IMR, imr);
548 txp_download_fw_wait(sc)
549 struct txp_softc *sc;
554 for (i = 0; i < 10000; i++) {
555 r = READ_REG(sc, TXP_ISR);
556 if (r & TXP_INT_A2H_0)
561 if (!(r & TXP_INT_A2H_0)) {
562 device_printf(sc->sc_dev, "fw wait failed comm0\n");
566 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
568 r = READ_REG(sc, TXP_A2H_0);
569 if (r != STAT_WAITING_FOR_SEGMENT) {
570 device_printf(sc->sc_dev, "fw not waiting for segment\n");
577 txp_download_fw_section(sc, sect, sectnum)
578 struct txp_softc *sc;
579 struct txp_fw_section_header *sect;
587 /* Skip zero length sections */
588 if (sect->nbytes == 0)
591 /* Make sure we aren't past the end of the image */
592 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image);
593 if (rseg >= sizeof(tc990image)) {
594 device_printf(sc->sc_dev, "fw invalid section address, "
595 "section %d\n", sectnum);
599 /* Make sure this section doesn't go past the end */
600 rseg += sect->nbytes;
601 if (rseg >= sizeof(tc990image)) {
602 device_printf(sc->sc_dev, "fw truncated section %d\n",
607 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes);
608 dma = vtophys(sc->sc_fwbuf);
611 * dummy up mbuf and verify section checksum
614 m.m_next = m.m_nextpkt = NULL;
615 m.m_len = sect->nbytes;
616 m.m_data = sc->sc_fwbuf;
618 csum = in_cksum(&m, sect->nbytes);
619 if (csum != sect->cksum) {
620 device_printf(sc->sc_dev, "fw section %d, bad "
621 "cksum (expected 0x%x got 0x%x)\n",
622 sectnum, sect->cksum, csum);
627 WRITE_REG(sc, TXP_H2A_1, sect->nbytes);
628 WRITE_REG(sc, TXP_H2A_2, sect->cksum);
629 WRITE_REG(sc, TXP_H2A_3, sect->addr);
630 WRITE_REG(sc, TXP_H2A_4, 0);
631 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff);
632 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
634 if (txp_download_fw_wait(sc)) {
635 device_printf(sc->sc_dev, "fw wait failed, "
636 "section %d\n", sectnum);
648 struct txp_softc *sc = vsc;
649 struct txp_hostvar *hv = sc->sc_hostvar;
652 /* mask all interrupts */
653 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
654 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
655 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
656 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
657 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
659 isr = READ_REG(sc, TXP_ISR);
661 WRITE_REG(sc, TXP_ISR, isr);
663 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
664 txp_rx_reclaim(sc, &sc->sc_rxhir);
665 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
666 txp_rx_reclaim(sc, &sc->sc_rxlor);
668 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx)
669 txp_rxbuf_reclaim(sc);
671 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
672 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off))))
673 txp_tx_reclaim(sc, &sc->sc_txhir);
675 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
676 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off))))
677 txp_tx_reclaim(sc, &sc->sc_txlor);
679 isr = READ_REG(sc, TXP_ISR);
682 /* unmask all interrupts */
683 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
685 txp_start(&sc->sc_arpcom.ac_if);
691 txp_rx_reclaim(sc, r)
692 struct txp_softc *sc;
693 struct txp_rx_ring *r;
695 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
696 struct txp_rx_desc *rxd;
698 struct txp_swdesc *sd = NULL;
699 u_int32_t roff, woff;
703 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc));
705 while (roff != woff) {
707 if (rxd->rx_flags & RX_FLAGS_ERROR) {
708 device_printf(sc->sc_dev, "error 0x%x\n",
714 /* retrieve stashed pointer */
720 m->m_pkthdr.len = m->m_len = rxd->rx_len;
722 #ifdef __STRICT_ALIGNMENT
725 * XXX Nice chip, except it won't accept "off by 2"
726 * buffers, so we're force to copy. Supposedly
727 * this will be fixed in a newer firmware rev
728 * and this will be temporary.
732 MGETHDR(mnew, M_DONTWAIT, MT_DATA);
737 if (m->m_len > (MHLEN - 2)) {
738 MCLGET(mnew, M_DONTWAIT);
739 if (!(mnew->m_flags & M_EXT)) {
745 mnew->m_pkthdr.rcvif = ifp;
747 mnew->m_pkthdr.len = mnew->m_len = m->m_len;
748 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t));
754 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD)
755 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
756 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD)
757 m->m_pkthdr.csum_flags |=
758 CSUM_IP_CHECKED|CSUM_IP_VALID;
760 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) ||
761 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) {
762 m->m_pkthdr.csum_flags |=
763 CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
764 m->m_pkthdr.csum_data = 0xffff;
767 if (rxd->rx_stat & RX_STAT_VLAN) {
769 m, htons(rxd->rx_vlan >> 16), goto next);
772 (*ifp->if_input)(ifp, m);
776 roff += sizeof(struct txp_rx_desc);
777 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) {
791 txp_rxbuf_reclaim(sc)
792 struct txp_softc *sc;
794 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
795 struct txp_hostvar *hv = sc->sc_hostvar;
796 struct txp_rxbuf_desc *rbd;
797 struct txp_swdesc *sd;
800 if (!(ifp->if_flags & IFF_RUNNING))
803 i = sc->sc_rxbufprod;
804 rbd = sc->sc_rxbufs + i;
808 if (sd->sd_mbuf != NULL)
811 MGETHDR(sd->sd_mbuf, M_DONTWAIT, MT_DATA);
812 if (sd->sd_mbuf == NULL)
815 MCLGET(sd->sd_mbuf, M_DONTWAIT);
816 if ((sd->sd_mbuf->m_flags & M_EXT) == 0)
818 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
819 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
821 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t))
825 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i);
827 if (++i == RXBUF_ENTRIES) {
834 sc->sc_rxbufprod = i;
839 m_freem(sd->sd_mbuf);
845 * Reclaim mbufs and entries from a transmit ring.
848 txp_tx_reclaim(sc, r)
849 struct txp_softc *sc;
850 struct txp_tx_ring *r;
852 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
853 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off));
854 u_int32_t cons = r->r_cons, cnt = r->r_cnt;
855 struct txp_tx_desc *txd = r->r_desc + cons;
856 struct txp_swdesc *sd = sc->sc_txd + cons;
859 while (cons != idx) {
863 if ((txd->tx_flags & TX_FLAGS_TYPE_M) ==
864 TX_FLAGS_TYPE_DATA) {
873 ifp->if_flags &= ~IFF_OACTIVE;
875 if (++cons == TX_ENTRIES) {
897 struct txp_softc *sc;
899 sc = device_get_softc(dev);
901 /* mask all interrupts */
902 WRITE_REG(sc, TXP_IMR,
903 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
904 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
907 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
908 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
909 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
916 struct txp_softc *sc;
918 struct txp_boot_record *boot;
919 struct txp_ldata *ld;
925 boot = &ld->txp_boot;
931 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar));
932 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar);
933 boot->br_hostvar_hi = 0;
934 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar;
936 /* hi priority tx ring */
937 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);;
938 boot->br_txhipri_hi = 0;
939 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
940 sc->sc_txhir.r_reg = TXP_H2A_1;
941 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring;
942 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
943 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
945 /* lo priority tx ring */
946 boot->br_txlopri_lo = vtophys(&ld->txp_txloring);
947 boot->br_txlopri_hi = 0;
948 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
949 sc->sc_txlor.r_reg = TXP_H2A_3;
950 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring;
951 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
952 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
954 /* high priority rx ring */
955 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring);
956 boot->br_rxhipri_hi = 0;
957 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
958 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring;
959 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
960 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
962 /* low priority rx ring */
963 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring);
964 boot->br_rxlopri_hi = 0;
965 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
966 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring;
967 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
968 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
971 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
972 boot->br_cmd_lo = vtophys(&ld->txp_cmdring);
974 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
975 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
976 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
977 sc->sc_cmdring.lastwrite = 0;
980 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
981 boot->br_resp_lo = vtophys(&ld->txp_rspring);
982 boot->br_resp_hi = 0;
983 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc);
984 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
985 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
986 sc->sc_rspring.lastwrite = 0;
988 /* receive buffer ring */
989 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs);
990 boot->br_rxbuf_hi = 0;
991 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc);
992 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs;
994 for (i = 0; i < RXBUF_ENTRIES; i++) {
995 struct txp_swdesc *sd;
996 if (sc->sc_rxbufs[i].rb_sd != NULL)
998 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc),
1000 if (sc->sc_rxbufs[i].rb_sd == NULL)
1002 sd = sc->sc_rxbufs[i].rb_sd;
1005 sc->sc_rxbufprod = 0;
1008 bzero(&ld->txp_zero, sizeof(u_int32_t));
1009 boot->br_zero_lo = vtophys(&ld->txp_zero);
1010 boot->br_zero_hi = 0;
1012 /* See if it's waiting for boot, and try to boot it */
1013 for (i = 0; i < 10000; i++) {
1014 r = READ_REG(sc, TXP_A2H_0);
1015 if (r == STAT_WAITING_FOR_BOOT)
1020 if (r != STAT_WAITING_FOR_BOOT) {
1021 device_printf(sc->sc_dev, "not waiting for boot\n");
1025 WRITE_REG(sc, TXP_H2A_2, 0);
1026 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot));
1027 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
1029 /* See if it booted */
1030 for (i = 0; i < 10000; i++) {
1031 r = READ_REG(sc, TXP_A2H_0);
1032 if (r == STAT_RUNNING)
1036 if (r != STAT_RUNNING) {
1037 device_printf(sc->sc_dev, "fw not running\n");
1041 /* Clear TX and CMD ring write registers */
1042 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
1043 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
1044 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
1045 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
1051 txp_ioctl(ifp, command, data)
1056 struct txp_softc *sc = ifp->if_softc;
1057 struct ifreq *ifr = (struct ifreq *)data;
1064 if (ifp->if_flags & IFF_UP) {
1067 if (ifp->if_flags & IFF_RUNNING)
1074 * Multicast list has changed; set the hardware
1075 * filter accordingly.
1082 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
1085 error = ether_ioctl(ifp, command, data);
1096 struct txp_softc *sc;
1100 struct txp_swdesc *sd;
1102 ifp = &sc->sc_arpcom.ac_if;
1104 for (i = 0; i < RXBUF_ENTRIES; i++) {
1105 sd = sc->sc_rxbufs[i].rb_sd;
1106 MGETHDR(sd->sd_mbuf, M_DONTWAIT, MT_DATA);
1107 if (sd->sd_mbuf == NULL)
1110 MCLGET(sd->sd_mbuf, M_DONTWAIT);
1111 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) {
1112 m_freem(sd->sd_mbuf);
1115 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
1116 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
1118 sc->sc_rxbufs[i].rb_paddrlo =
1119 vtophys(mtod(sd->sd_mbuf, vm_offset_t));
1120 sc->sc_rxbufs[i].rb_paddrhi = 0;
1123 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) *
1124 sizeof(struct txp_rxbuf_desc);
1130 txp_rxring_empty(sc)
1131 struct txp_softc *sc;
1134 struct txp_swdesc *sd;
1136 if (sc->sc_rxbufs == NULL)
1139 for (i = 0; i < RXBUF_ENTRIES; i++) {
1140 if (&sc->sc_rxbufs[i] == NULL)
1142 sd = sc->sc_rxbufs[i].rb_sd;
1145 if (sd->sd_mbuf != NULL) {
1146 m_freem(sd->sd_mbuf);
1158 struct txp_softc *sc;
1165 ifp = &sc->sc_arpcom.ac_if;
1167 if (ifp->if_flags & IFF_RUNNING)
1174 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
1175 NULL, NULL, NULL, 1);
1177 /* Set station address. */
1178 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0];
1179 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1];
1180 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2];
1181 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3];
1182 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4];
1183 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5];
1184 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0,
1185 NULL, NULL, NULL, 1);
1189 txp_rxring_fill(sc);
1191 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1192 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1194 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
1195 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
1196 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
1197 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
1198 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
1199 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
1201 ifp->if_flags |= IFF_RUNNING;
1202 ifp->if_flags &= ~IFF_OACTIVE;
1205 sc->sc_tick = timeout(txp_tick, sc, hz);
1214 struct txp_softc *sc = vsc;
1215 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1216 struct txp_rsp_desc *rsp = NULL;
1217 struct txp_ext_desc *ext;
1221 txp_rxbuf_reclaim(sc);
1223 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
1226 if (rsp->rsp_numdesc != 6)
1228 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
1229 NULL, NULL, NULL, 1))
1231 ext = (struct txp_ext_desc *)(rsp + 1);
1233 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 +
1234 ext[4].ext_1 + ext[4].ext_4;
1235 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 +
1237 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 +
1239 ifp->if_opackets += rsp->rsp_par2;
1240 ifp->if_ipackets += ext[2].ext_3;
1244 free(rsp, M_DEVBUF);
1247 sc->sc_tick = timeout(txp_tick, sc, hz);
1256 struct txp_softc *sc = ifp->if_softc;
1257 struct txp_tx_ring *r = &sc->sc_txhir;
1258 struct txp_tx_desc *txd;
1259 struct txp_frag_desc *fxd;
1260 struct mbuf *m, *m0;
1261 struct txp_swdesc *sd;
1262 u_int32_t firstprod, firstcnt, prod, cnt;
1265 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1272 IF_DEQUEUE(&ifp->if_snd, m);
1279 sd = sc->sc_txd + prod;
1282 if ((TX_ENTRIES - cnt) < 4)
1285 txd = r->r_desc + prod;
1287 txd->tx_flags = TX_FLAGS_TYPE_DATA;
1288 txd->tx_numdesc = 0;
1294 if (++prod == TX_ENTRIES)
1297 if (++cnt >= (TX_ENTRIES - 4))
1300 mtag = VLAN_OUTPUT_TAG(ifp, m);
1302 txd->tx_pflags = TX_PFLAGS_VLAN |
1303 (htons(VLAN_TAG_VALUE(mtag)) << TX_PFLAGS_VLANTAG_S);
1306 if (m->m_pkthdr.csum_flags & CSUM_IP)
1307 txd->tx_pflags |= TX_PFLAGS_IPCKSUM;
1310 if (m->m_pkthdr.csum_flags & CSUM_TCP)
1311 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM;
1312 if (m->m_pkthdr.csum_flags & CSUM_UDP)
1313 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM;
1316 fxd = (struct txp_frag_desc *)(r->r_desc + prod);
1317 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
1320 if (++cnt >= (TX_ENTRIES - 4))
1325 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG;
1326 fxd->frag_rsvd1 = 0;
1327 fxd->frag_len = m0->m_len;
1328 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t));
1329 fxd->frag_addrhi = 0;
1330 fxd->frag_rsvd2 = 0;
1332 if (++prod == TX_ENTRIES) {
1333 fxd = (struct txp_frag_desc *)r->r_desc;
1343 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
1351 ifp->if_flags |= IFF_OACTIVE;
1352 r->r_prod = firstprod;
1353 r->r_cnt = firstcnt;
1354 IF_PREPEND(&ifp->if_snd, m);
1359 * Handle simple commands sent to the typhoon
1362 txp_command(sc, id, in1, in2, in3, out1, out2, out3, wait)
1363 struct txp_softc *sc;
1364 u_int16_t id, in1, *out1;
1365 u_int32_t in2, in3, *out2, *out3;
1368 struct txp_rsp_desc *rsp = NULL;
1370 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
1377 *out1 = rsp->rsp_par1;
1379 *out2 = rsp->rsp_par2;
1381 *out3 = rsp->rsp_par3;
1382 free(rsp, M_DEVBUF);
1387 txp_command2(sc, id, in1, in2, in3, in_extp, in_extn, rspp, wait)
1388 struct txp_softc *sc;
1391 struct txp_ext_desc *in_extp;
1393 struct txp_rsp_desc **rspp;
1396 struct txp_hostvar *hv = sc->sc_hostvar;
1397 struct txp_cmd_desc *cmd;
1398 struct txp_ext_desc *ext;
1402 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
1403 device_printf(sc->sc_dev, "no free cmd descriptors\n");
1407 idx = sc->sc_cmdring.lastwrite;
1408 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1409 bzero(cmd, sizeof(*cmd));
1411 cmd->cmd_numdesc = in_extn;
1412 cmd->cmd_seq = seq = sc->sc_seq++;
1414 cmd->cmd_par1 = in1;
1415 cmd->cmd_par2 = in2;
1416 cmd->cmd_par3 = in3;
1417 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD |
1418 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID;
1420 idx += sizeof(struct txp_cmd_desc);
1421 if (idx == sc->sc_cmdring.size)
1424 for (i = 0; i < in_extn; i++) {
1425 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1426 bcopy(in_extp, ext, sizeof(struct txp_ext_desc));
1428 idx += sizeof(struct txp_cmd_desc);
1429 if (idx == sc->sc_cmdring.size)
1433 sc->sc_cmdring.lastwrite = idx;
1435 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
1440 for (i = 0; i < 10000; i++) {
1441 idx = hv->hv_resp_read_idx;
1442 if (idx != hv->hv_resp_write_idx) {
1444 if (txp_response(sc, idx, id, seq, rspp))
1451 if (i == 1000 || (*rspp) == NULL) {
1452 device_printf(sc->sc_dev, "0x%x command failed\n", id);
1460 txp_response(sc, ridx, id, seq, rspp)
1461 struct txp_softc *sc;
1465 struct txp_rsp_desc **rspp;
1467 struct txp_hostvar *hv = sc->sc_hostvar;
1468 struct txp_rsp_desc *rsp;
1470 while (ridx != hv->hv_resp_write_idx) {
1471 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
1473 if (id == rsp->rsp_id && rsp->rsp_seq == seq) {
1474 *rspp = (struct txp_rsp_desc *)malloc(
1475 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1),
1476 M_DEVBUF, M_NOWAIT);
1477 if ((*rspp) == NULL)
1479 txp_rsp_fixup(sc, rsp, *rspp);
1483 if (rsp->rsp_flags & RSP_FLAGS_ERROR) {
1484 device_printf(sc->sc_dev, "response error!\n");
1485 txp_rsp_fixup(sc, rsp, NULL);
1486 ridx = hv->hv_resp_read_idx;
1490 switch (rsp->rsp_id) {
1491 case TXP_CMD_CYCLE_STATISTICS:
1492 case TXP_CMD_MEDIA_STATUS_READ:
1494 case TXP_CMD_HELLO_RESPONSE:
1495 device_printf(sc->sc_dev, "hello\n");
1498 device_printf(sc->sc_dev, "unknown id(0x%x)\n",
1502 txp_rsp_fixup(sc, rsp, NULL);
1503 ridx = hv->hv_resp_read_idx;
1504 hv->hv_resp_read_idx = ridx;
1511 txp_rsp_fixup(sc, rsp, dst)
1512 struct txp_softc *sc;
1513 struct txp_rsp_desc *rsp, *dst;
1515 struct txp_rsp_desc *src = rsp;
1516 struct txp_hostvar *hv = sc->sc_hostvar;
1519 ridx = hv->hv_resp_read_idx;
1521 for (i = 0; i < rsp->rsp_numdesc + 1; i++) {
1523 bcopy(src, dst++, sizeof(struct txp_rsp_desc));
1524 ridx += sizeof(struct txp_rsp_desc);
1525 if (ridx == sc->sc_rspring.size) {
1526 src = sc->sc_rspring.base;
1530 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx;
1533 hv->hv_resp_read_idx = ridx;
1537 txp_cmd_desc_numfree(sc)
1538 struct txp_softc *sc;
1540 struct txp_hostvar *hv = sc->sc_hostvar;
1541 struct txp_boot_record *br = sc->sc_boot;
1542 u_int32_t widx, ridx, nfree;
1544 widx = sc->sc_cmdring.lastwrite;
1545 ridx = hv->hv_cmd_read_idx;
1548 /* Ring is completely free */
1549 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc);
1552 nfree = br->br_cmd_siz -
1553 (widx - ridx + sizeof(struct txp_cmd_desc));
1555 nfree = ridx - widx - sizeof(struct txp_cmd_desc);
1558 return (nfree / sizeof(struct txp_cmd_desc));
1563 struct txp_softc *sc;
1567 ifp = &sc->sc_arpcom.ac_if;
1569 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1571 untimeout(txp_tick, sc, sc->sc_tick);
1573 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1574 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1576 txp_rxring_empty(sc);
1589 txp_ifmedia_upd(ifp)
1592 struct txp_softc *sc = ifp->if_softc;
1593 struct ifmedia *ifm = &sc->sc_ifmedia;
1596 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1599 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
1600 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1601 new_xcvr = TXP_XCVR_10_FDX;
1603 new_xcvr = TXP_XCVR_10_HDX;
1604 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
1605 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1606 new_xcvr = TXP_XCVR_100_FDX;
1608 new_xcvr = TXP_XCVR_100_HDX;
1609 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
1610 new_xcvr = TXP_XCVR_AUTO;
1615 if (sc->sc_xcvr == new_xcvr)
1618 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
1619 NULL, NULL, NULL, 0);
1620 sc->sc_xcvr = new_xcvr;
1626 txp_ifmedia_sts(ifp, ifmr)
1628 struct ifmediareq *ifmr;
1630 struct txp_softc *sc = ifp->if_softc;
1631 struct ifmedia *ifm = &sc->sc_ifmedia;
1632 u_int16_t bmsr, bmcr, anlpar;
1634 ifmr->ifm_status = IFM_AVALID;
1635 ifmr->ifm_active = IFM_ETHER;
1637 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1638 &bmsr, NULL, NULL, 1))
1640 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1641 &bmsr, NULL, NULL, 1))
1644 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
1645 &bmcr, NULL, NULL, 1))
1648 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
1649 &anlpar, NULL, NULL, 1))
1652 if (bmsr & BMSR_LINK)
1653 ifmr->ifm_status |= IFM_ACTIVE;
1655 if (bmcr & BMCR_ISO) {
1656 ifmr->ifm_active |= IFM_NONE;
1657 ifmr->ifm_status = 0;
1661 if (bmcr & BMCR_LOOP)
1662 ifmr->ifm_active |= IFM_LOOP;
1664 if (bmcr & BMCR_AUTOEN) {
1665 if ((bmsr & BMSR_ACOMP) == 0) {
1666 ifmr->ifm_active |= IFM_NONE;
1670 if (anlpar & ANLPAR_T4)
1671 ifmr->ifm_active |= IFM_100_T4;
1672 else if (anlpar & ANLPAR_TX_FD)
1673 ifmr->ifm_active |= IFM_100_TX|IFM_FDX;
1674 else if (anlpar & ANLPAR_TX)
1675 ifmr->ifm_active |= IFM_100_TX;
1676 else if (anlpar & ANLPAR_10_FD)
1677 ifmr->ifm_active |= IFM_10_T|IFM_FDX;
1678 else if (anlpar & ANLPAR_10)
1679 ifmr->ifm_active |= IFM_10_T;
1681 ifmr->ifm_active |= IFM_NONE;
1683 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
1687 ifmr->ifm_active |= IFM_NONE;
1688 ifmr->ifm_status &= ~IFM_AVALID;
1693 txp_show_descriptor(d)
1696 struct txp_cmd_desc *cmd = d;
1697 struct txp_rsp_desc *rsp = d;
1698 struct txp_tx_desc *txd = d;
1699 struct txp_frag_desc *frgd = d;
1701 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) {
1702 case CMD_FLAGS_TYPE_CMD:
1703 /* command descriptor */
1704 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1705 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1706 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1708 case CMD_FLAGS_TYPE_RESP:
1709 /* response descriptor */
1710 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1711 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq,
1712 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3);
1714 case CMD_FLAGS_TYPE_DATA:
1715 /* data header (assuming tx for now) */
1716 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]",
1717 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen,
1718 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags);
1720 case CMD_FLAGS_TYPE_FRAG:
1721 /* fragment descriptor */
1722 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]",
1723 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len,
1724 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2);
1727 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1728 cmd->cmd_flags & CMD_FLAGS_TYPE_M,
1729 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1730 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1738 struct txp_softc *sc;
1740 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1741 u_int32_t crc, carry, hashbit, hash[2];
1745 struct ifmultiaddr *ifma;
1748 if (ifp->if_flags & IFF_PROMISC) {
1749 filter = TXP_RXFILT_PROMISC;
1753 filter = TXP_RXFILT_DIRECT;
1755 if (ifp->if_flags & IFF_BROADCAST)
1756 filter |= TXP_RXFILT_BROADCAST;
1758 if (ifp->if_flags & IFF_ALLMULTI)
1759 filter |= TXP_RXFILT_ALLMULTI;
1761 hash[0] = hash[1] = 0;
1763 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1764 if (ifma->ifma_addr->sa_family != AF_LINK)
1767 enm = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
1771 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1773 for (j = 0; j < 8; j++) {
1774 carry = ((crc & 0x80000000) ? 1 : 0) ^
1779 crc = (crc ^ TXP_POLYNOMIAL) |
1783 hashbit = (u_int16_t)(crc & (64 - 1));
1784 hash[hashbit / 32] |= (1 << hashbit % 32);
1788 filter |= TXP_RXFILT_HASHMULTI;
1789 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
1790 2, hash[0], hash[1], NULL, NULL, NULL, 0);
1796 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
1797 NULL, NULL, NULL, 1);
1803 txp_capabilities(sc)
1804 struct txp_softc *sc;
1806 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1807 struct txp_rsp_desc *rsp = NULL;
1808 struct txp_ext_desc *ext;
1810 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
1813 if (rsp->rsp_numdesc != 1)
1815 ext = (struct txp_ext_desc *)(rsp + 1);
1817 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
1818 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
1819 ifp->if_capabilities = 0;
1821 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) {
1822 sc->sc_tx_capability |= OFFLOAD_VLAN;
1823 sc->sc_rx_capability |= OFFLOAD_VLAN;
1824 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
1829 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) {
1830 sc->sc_tx_capability |= OFFLOAD_IPSEC;
1831 sc->sc_rx_capability |= OFFLOAD_IPSEC;
1832 ifp->if_capabilities |= IFCAP_IPSEC;
1836 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) {
1837 sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
1838 sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
1839 ifp->if_capabilities |= IFCAP_HWCSUM;
1840 ifp->if_hwassist |= CSUM_IP;
1843 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) {
1845 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
1847 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
1848 ifp->if_capabilities |= IFCAP_HWCSUM;
1851 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) {
1853 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
1855 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
1856 ifp->if_capabilities |= IFCAP_HWCSUM;
1858 ifp->if_capenable = ifp->if_capabilities;
1860 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
1861 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
1866 free(rsp, M_DEVBUF);