2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2003 Marcel Moolenaar
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #ifndef _DEV_UART_BUS_H_
32 #define _DEV_UART_BUS_H_
38 #include <sys/serial.h>
39 #include <sys/timepps.h>
41 /* Drain and flush targets. */
42 #define UART_DRAIN_RECEIVER 0x0001
43 #define UART_DRAIN_TRANSMITTER 0x0002
44 #define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER
45 #define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER
47 /* Received character status bits. */
48 #define UART_STAT_BREAK 0x0100
49 #define UART_STAT_FRAMERR 0x0200
50 #define UART_STAT_OVERRUN 0x0400
51 #define UART_STAT_PARERR 0x0800
53 /* UART_IOCTL() requests */
54 #define UART_IOCTL_BREAK 1
55 #define UART_IOCTL_IFLOW 2
56 #define UART_IOCTL_OFLOW 3
57 #define UART_IOCTL_BAUD 4
60 * UART class & instance (=softc)
64 struct uart_ops *uc_ops; /* Low-level console operations. */
65 u_int uc_range; /* Bus space address range. */
66 u_int uc_rclk; /* Default rclk for this device. */
67 u_int uc_rshift; /* Default regshift for this device. */
68 u_int uc_riowidth; /* Default reg io width for this device. */
73 struct uart_class *sc_class;
74 struct uart_bas sc_bas;
77 struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */
80 struct resource *sc_rres; /* Register resource. */
82 int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */
83 struct resource *sc_ires; /* Interrupt resource. */
86 struct callout sc_timer;
88 int sc_callout:1; /* This UART is opened for callout. */
89 int sc_fastintr:1; /* This UART uses fast interrupts. */
90 int sc_hwiflow:1; /* This UART has HW input flow ctl. */
91 int sc_hwoflow:1; /* This UART has HW output flow ctl. */
92 int sc_leaving:1; /* This UART is going away. */
93 int sc_opened:1; /* This UART is open for business. */
94 int sc_polled:1; /* This UART has no interrupts. */
95 int sc_txbusy:1; /* This UART is transmitting. */
96 int sc_isquelch:1; /* This UART has input squelched. */
97 int sc_testintr:1; /* This UART is under int. testing. */
99 struct uart_devinfo *sc_sysdev; /* System device (or NULL). */
101 int sc_altbrk; /* State for alt break sequence. */
102 uint32_t sc_hwsig; /* Signal state. Used by HW driver. */
109 int sc_rxfifosz; /* Size of RX FIFO. */
111 /* Transmitter data. */
114 int sc_txfifosz; /* Size of TX FIFO and buffer. */
116 /* Pulse capturing support (PPS). */
117 struct pps_state sc_pps;
119 sbintime_t sc_pps_captime;
121 /* Upper layer data. */
125 /* TTY specific data. */
129 /* Keyboard specific data. */
135 extern devclass_t uart_devclass;
136 extern const char uart_driver_name[];
138 int uart_bus_attach(device_t dev);
139 int uart_bus_detach(device_t dev);
140 int uart_bus_resume(device_t dev);
141 serdev_intr_t *uart_bus_ihand(device_t dev, int ipend);
142 int uart_bus_ipend(device_t dev);
143 int uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan);
144 int uart_bus_sysdev(device_t dev);
146 void uart_sched_softih(struct uart_softc *, uint32_t);
148 int uart_tty_attach(struct uart_softc *);
149 int uart_tty_detach(struct uart_softc *);
150 struct mtx *uart_tty_getlock(struct uart_softc *);
151 void uart_tty_intr(void *arg);
154 * Receive buffer operations.
157 uart_rx_empty(struct uart_softc *sc)
160 return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0);
164 uart_rx_full(struct uart_softc *sc)
167 return ((sc->sc_rxput + 1 < sc->sc_rxbufsz) ?
168 (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0));
172 uart_rx_get(struct uart_softc *sc)
177 if (ptr == sc->sc_rxput)
179 xc = sc->sc_rxbuf[ptr++];
180 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0;
185 uart_rx_next(struct uart_softc *sc)
190 if (ptr == sc->sc_rxput)
193 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0;
198 uart_rx_peek(struct uart_softc *sc)
203 return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]);
207 uart_rx_put(struct uart_softc *sc, int xc)
211 ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0;
212 if (ptr == sc->sc_rxget)
214 sc->sc_rxbuf[sc->sc_rxput] = xc;
219 #endif /* _DEV_UART_BUS_H_ */