2 * Copyright (c) 2003 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/stdarg.h>
47 #include <dev/uart/uart.h>
48 #include <dev/uart/uart_bus.h>
49 #include <dev/uart/uart_cpu.h>
53 devclass_t uart_devclass;
54 char uart_driver_name[] = "uart";
56 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
57 SLIST_HEAD_INITIALIZER(uart_sysdevs);
59 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
61 #ifndef UART_POLL_FREQ
62 #define UART_POLL_FREQ 50
64 static int uart_poll_freq = UART_POLL_FREQ;
65 TUNABLE_INT("debug.uart_poll_freq", &uart_poll_freq);
68 uart_add_sysdev(struct uart_devinfo *di)
70 SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
74 uart_getname(struct uart_class *uc)
76 return ((uc != NULL) ? uc->name : NULL);
80 uart_getops(struct uart_class *uc)
82 return ((uc != NULL) ? uc->uc_ops : NULL);
86 uart_getrange(struct uart_class *uc)
88 return ((uc != NULL) ? uc->uc_range : 0);
92 * Schedule a soft interrupt. We do this on the 0 to !0 transition
93 * of the TTY pending interrupt status.
96 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
101 old = sc->sc_ttypend;
103 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
105 if ((old & SER_INT_MASK) == 0)
106 swi_sched(sc->sc_softih, 0);
110 * A break condition has been detected. We treat the break condition as
111 * a special case that should not happen during normal operation. When
112 * the break condition is to be passed to higher levels in the form of
113 * a NUL character, we really want the break to be in the right place in
114 * the input stream. The overhead to achieve that is not in relation to
115 * the exceptional nature of the break condition, so we permit ourselves
119 uart_intr_break(void *arg)
121 struct uart_softc *sc = arg;
124 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
130 uart_sched_softih(sc, SER_INT_BREAK);
135 * Handle a receiver overrun situation. We lost at least 1 byte in the
136 * input stream and it's our job to contain the situation. We grab as
137 * much of the data we can, but otherwise flush the receiver FIFO to
138 * create some breathing room. The net effect is that we avoid the
139 * overrun condition to happen for the next X characters, where X is
140 * related to the FIFO size at the cost of losing data right away.
141 * So, instead of having multiple overrun interrupts in close proximity
142 * to each other and possibly pessimizing UART interrupt latency for
143 * other UARTs in a multiport configuration, we create a longer segment
144 * of missing characters by freeing up the FIFO.
145 * Each overrun condition is marked in the input buffer by a token. The
146 * token represents the loss of at least one, but possible more bytes in
150 uart_intr_overrun(void *arg)
152 struct uart_softc *sc = arg;
156 if (uart_rx_put(sc, UART_STAT_OVERRUN))
157 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
158 uart_sched_softih(sc, SER_INT_RXREADY);
160 UART_FLUSH(sc, UART_FLUSH_RECEIVER);
165 * Received data ready.
168 uart_intr_rxready(void *arg)
170 struct uart_softc *sc = arg;
176 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
177 while (rxp != sc->sc_rxput) {
178 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
179 if (rxp == sc->sc_rxbufsz)
185 uart_sched_softih(sc, SER_INT_RXREADY);
187 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
192 * Line or modem status change (OOB signalling).
193 * We pass the signals to the software interrupt handler for further
194 * processing. Note that we merge the delta bits, but set the state
195 * bits. This is to avoid losing state transitions due to having more
196 * than 1 hardware interrupt between software interrupts.
199 uart_intr_sigchg(void *arg)
201 struct uart_softc *sc = arg;
204 sig = UART_GETSIG(sc);
206 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
207 if (sig & UART_SIG_DPPS) {
208 pps_capture(&sc->sc_pps);
209 pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
210 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
215 * Keep track of signal changes, even when the device is not
216 * opened. This allows us to inform upper layers about a
217 * possible loss of DCD and thus the existence of a (possibly)
218 * different connection when we have DCD back, during the time
219 * that the device was closed.
222 old = sc->sc_ttypend;
223 new = old & ~SER_MASK_STATE;
224 new |= sig & SER_INT_SIGMASK;
225 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
228 uart_sched_softih(sc, SER_INT_SIGCHG);
233 * The transmitter can accept more data.
236 uart_intr_txidle(void *arg)
238 struct uart_softc *sc = arg;
242 uart_sched_softih(sc, SER_INT_TXIDLE);
250 struct uart_softc *sc = arg;
253 while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
255 if (ipend & SER_INT_OVERRUN)
256 uart_intr_overrun(sc);
257 if (ipend & SER_INT_BREAK)
259 if (ipend & SER_INT_RXREADY)
260 uart_intr_rxready(sc);
261 if (ipend & SER_INT_SIGCHG)
262 uart_intr_sigchg(sc);
263 if (ipend & SER_INT_TXIDLE)
264 uart_intr_txidle(sc);
268 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
269 (timeout_t *)uart_intr, sc);
272 return((flag)?FILTER_HANDLED:FILTER_STRAY);
276 uart_bus_ihand(device_t dev, int ipend)
281 return (uart_intr_break);
282 case SER_INT_OVERRUN:
283 return (uart_intr_overrun);
284 case SER_INT_RXREADY:
285 return (uart_intr_rxready);
287 return (uart_intr_sigchg);
289 return (uart_intr_txidle);
295 uart_bus_ipend(device_t dev)
297 struct uart_softc *sc;
299 sc = device_get_softc(dev);
300 return (UART_IPEND(sc));
304 uart_bus_sysdev(device_t dev)
306 struct uart_softc *sc;
308 sc = device_get_softc(dev);
309 return ((sc->sc_sysdev != NULL) ? 1 : 0);
313 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
315 struct uart_softc *sc;
316 struct uart_devinfo *sysdev;
319 sc = device_get_softc(dev);
322 * All uart_class references are weak. Check that the needed
323 * class has been compiled-in. Fail if not.
325 if (sc->sc_class == NULL)
329 * Initialize the instance. Note that the instance (=softc) does
330 * not necessarily match the hardware specific softc. We can't do
331 * anything about it now, because we may not attach to the device.
332 * Hardware drivers cannot use any of the class specific fields
335 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
337 if (device_get_desc(dev) == NULL)
338 device_set_desc(dev, uart_getname(sc->sc_class));
341 * Allocate the register resource. We assume that all UARTs have
342 * a single register window in either I/O port space or memory
343 * mapped I/O space. Any UART that needs multiple windows will
344 * consequently not be supported by this driver as-is. We try I/O
345 * port space first because that's the common case.
348 sc->sc_rtype = SYS_RES_IOPORT;
349 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
350 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
351 if (sc->sc_rres == NULL) {
353 sc->sc_rtype = SYS_RES_MEMORY;
354 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
355 &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
357 if (sc->sc_rres == NULL)
362 * Fill in the bus access structure and compare this device with
363 * a possible console device and/or a debug port. We set the flags
364 * in the softc so that the hardware dependent probe can adjust
365 * accordingly. In general, you don't want to permanently disrupt
368 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
369 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
370 sc->sc_bas.chan = chan;
371 sc->sc_bas.regshft = regshft;
372 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
374 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
375 if (chan == sysdev->bas.chan &&
376 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
377 /* XXX check if ops matches class. */
378 sc->sc_sysdev = sysdev;
379 sysdev->bas.rclk = sc->sc_bas.rclk;
383 error = UART_PROBE(sc);
384 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
385 return ((error) ? error : BUS_PROBE_DEFAULT);
389 uart_bus_attach(device_t dev)
391 struct uart_softc *sc, *sc0;
396 * The sc_class field defines the type of UART we're going to work
397 * with and thus the size of the softc. Replace the generic softc
398 * with one that matches the UART now that we're certain we handle
401 sc0 = device_get_softc(dev);
402 if (sc0->sc_class->size > sizeof(*sc)) {
403 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
404 bcopy(sc0, sc, sizeof(*sc));
405 device_set_softc(dev, sc);
410 * Protect ourselves against interrupts while we're not completely
411 * finished attaching and initializing. We don't expect interrupts
412 * until after UART_ATTACH() though.
416 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
417 if (sc->sc_hwmtx == NULL)
418 sc->sc_hwmtx = &sc->sc_hwmtx_s;
421 * Re-allocate. We expect that the softc contains the information
422 * collected by uart_bus_probe() intact.
424 sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
425 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
426 if (sc->sc_rres == NULL) {
427 mtx_destroy(&sc->sc_hwmtx_s);
430 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
431 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
434 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
435 RF_ACTIVE | RF_SHAREABLE);
436 if (sc->sc_ires != NULL) {
437 error = bus_setup_intr(dev,
438 sc->sc_ires, INTR_TYPE_TTY,
439 uart_intr, NULL, sc, &sc->sc_icookie);
441 error = bus_setup_intr(dev,
442 sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
443 NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
448 device_printf(dev, "could not activate interrupt\n");
449 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
454 if (sc->sc_ires == NULL) {
455 /* No interrupt resource. Force polled mode. */
457 callout_init(&sc->sc_timer, 1);
461 * Ensure there is room for at least three full FIFOs of data in the
462 * receive buffer (handles the case of low-level drivers with huge
463 * FIFOs), and also ensure that there is no less than the historical
464 * size of 384 bytes (handles the typical small-FIFO case).
466 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
467 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
469 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
472 error = UART_ATTACH(sc);
476 if (sc->sc_hwiflow || sc->sc_hwoflow) {
478 device_print_prettyname(dev);
479 if (sc->sc_hwiflow) {
480 printf("%sRTS iflow", sep);
483 if (sc->sc_hwoflow) {
484 printf("%sCTS oflow", sep);
490 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
492 device_print_prettyname(dev);
493 if (sc->sc_fastintr) {
494 printf("%sfast interrupt", sep);
498 printf("%spolled mode", sep);
504 if (sc->sc_sysdev != NULL) {
505 if (sc->sc_sysdev->baudrate == 0) {
506 if (UART_IOCTL(sc, UART_IOCTL_BAUD,
507 (intptr_t)&sc->sc_sysdev->baudrate) != 0)
508 sc->sc_sysdev->baudrate = -1;
510 switch (sc->sc_sysdev->type) {
511 case UART_DEV_CONSOLE:
512 device_printf(dev, "console");
514 case UART_DEV_DBGPORT:
515 device_printf(dev, "debug port");
517 case UART_DEV_KEYBOARD:
518 device_printf(dev, "keyboard");
521 device_printf(dev, "unknown system device");
524 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
525 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
526 sc->sc_sysdev->stopbits);
529 sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
530 pps_init(&sc->sc_pps);
532 error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
533 ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
537 if (sc->sc_sysdev != NULL)
538 sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
545 free(sc->sc_txbuf, M_UART);
546 free(sc->sc_rxbuf, M_UART);
548 if (sc->sc_ires != NULL) {
549 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
550 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
553 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
555 mtx_destroy(&sc->sc_hwmtx_s);
561 uart_bus_detach(device_t dev)
563 struct uart_softc *sc;
565 sc = device_get_softc(dev);
569 if (sc->sc_sysdev != NULL)
570 sc->sc_sysdev->hwmtx = NULL;
574 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
575 (*sc->sc_sysdev->detach)(sc);
579 free(sc->sc_txbuf, M_UART);
580 free(sc->sc_rxbuf, M_UART);
582 if (sc->sc_ires != NULL) {
583 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
584 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
587 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
589 mtx_destroy(&sc->sc_hwmtx_s);
591 if (sc->sc_class->size > sizeof(*sc)) {
592 device_set_softc(dev, NULL);
595 device_set_softc(dev, NULL);
601 uart_bus_resume(device_t dev)
603 struct uart_softc *sc;
605 sc = device_get_softc(dev);
606 return (UART_ATTACH(sc));