2 * Copyright (c) 2003 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <sys/sysctl.h>
43 #include <machine/bus.h>
45 #include <machine/resource.h>
46 #include <machine/stdarg.h>
48 #include <dev/uart/uart.h>
49 #include <dev/uart/uart_bus.h>
50 #include <dev/uart/uart_cpu.h>
51 #include <dev/uart/uart_ppstypes.h>
55 devclass_t uart_devclass;
56 const char uart_driver_name[] = "uart";
58 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
59 SLIST_HEAD_INITIALIZER(uart_sysdevs);
61 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
63 #ifndef UART_POLL_FREQ
64 #define UART_POLL_FREQ 50
66 static int uart_poll_freq = UART_POLL_FREQ;
67 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq,
68 0, "UART poll frequency");
70 static int uart_force_poll;
71 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll,
72 0, "Force UART polling");
75 uart_pps_mode_valid(int pps_mode)
79 switch(pps_mode & UART_PPS_SIGNAL_MASK) {
80 case UART_PPS_DISABLED:
88 opt = pps_mode & UART_PPS_OPTION_MASK;
89 if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0)
96 uart_pps_print_mode(struct uart_softc *sc)
99 device_printf(sc->sc_dev, "PPS capture mode: ");
100 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
101 case UART_PPS_DISABLED:
114 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
116 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE)
117 printf("-NarrowPulse");
122 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
124 struct uart_softc *sc;
128 tmp = sc->sc_pps_mode;
129 err = sysctl_handle_int(oidp, &tmp, 0, req);
130 if (err != 0 || req->newptr == NULL)
132 if (!uart_pps_mode_valid(tmp))
134 sc->sc_pps_mode = tmp;
139 uart_pps_process(struct uart_softc *sc, int ser_sig)
142 int is_assert, pps_sig;
144 /* Which signal is configured as PPS? Early out if none. */
145 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
156 /* Early out if there is no change in the signal configured as PPS. */
157 if ((ser_sig & SER_DELTA(pps_sig)) == 0)
161 * In narrow-pulse mode we need to synthesize both capture and clear
162 * events from a single "delta occurred" indication from the uart
163 * hardware because the pulse width is too narrow to reliably detect
164 * both edges. However, when the pulse width is close to our interrupt
165 * processing latency we might intermittantly catch both edges. To
166 * guard against generating spurious events when that happens, we use a
167 * separate timer to ensure at least half a second elapses before we
168 * generate another event.
170 pps_capture(&sc->sc_pps);
171 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) {
172 now = getsbinuptime();
173 if (now > sc->sc_pps_captime + 500 * SBT_1MS) {
174 sc->sc_pps_captime = now;
175 pps_event(&sc->sc_pps, PPS_CAPTUREASSERT);
176 pps_event(&sc->sc_pps, PPS_CAPTURECLEAR);
179 is_assert = ser_sig & pps_sig;
180 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
181 is_assert = !is_assert;
182 pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT :
188 uart_pps_init(struct uart_softc *sc)
190 struct sysctl_ctx_list *ctx;
191 struct sysctl_oid *tree;
193 ctx = device_get_sysctl_ctx(sc->sc_dev);
194 tree = device_get_sysctl_tree(sc->sc_dev);
197 * The historical default for pps capture mode is either DCD or CTS,
198 * depending on the UART_PPS_ON_CTS kernel option. Start with that,
199 * then try to fetch the tunable that overrides the mode for all uart
200 * devices, then try to fetch the sysctl-tunable that overrides the mode
201 * for one specific device.
203 #ifdef UART_PPS_ON_CTS
204 sc->sc_pps_mode = UART_PPS_CTS;
206 sc->sc_pps_mode = UART_PPS_DCD;
208 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
209 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
210 CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I",
211 "pulse mode: 0/1/2=disabled/CTS/DCD; "
212 "add 0x10 to invert, 0x20 for narrow pulse");
214 if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
215 device_printf(sc->sc_dev,
216 "Invalid pps_mode 0x%02x configured; disabling PPS capture\n",
218 sc->sc_pps_mode = UART_PPS_DISABLED;
219 } else if (bootverbose) {
220 uart_pps_print_mode(sc);
223 sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
224 sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
225 sc->sc_pps.driver_abi = PPS_ABI_VERSION;
226 pps_init_abi(&sc->sc_pps);
230 uart_add_sysdev(struct uart_devinfo *di)
232 SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
236 uart_getname(struct uart_class *uc)
238 return ((uc != NULL) ? uc->name : NULL);
242 uart_getops(struct uart_class *uc)
244 return ((uc != NULL) ? uc->uc_ops : NULL);
248 uart_getrange(struct uart_class *uc)
250 return ((uc != NULL) ? uc->uc_range : 0);
254 uart_getregshift(struct uart_class *uc)
256 return ((uc != NULL) ? uc->uc_rshift : 0);
260 * Schedule a soft interrupt. We do this on the 0 to !0 transition
261 * of the TTY pending interrupt status.
264 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
269 old = sc->sc_ttypend;
271 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
273 if ((old & SER_INT_MASK) == 0)
274 swi_sched(sc->sc_softih, 0);
278 * A break condition has been detected. We treat the break condition as
279 * a special case that should not happen during normal operation. When
280 * the break condition is to be passed to higher levels in the form of
281 * a NUL character, we really want the break to be in the right place in
282 * the input stream. The overhead to achieve that is not in relation to
283 * the exceptional nature of the break condition, so we permit ourselves
287 uart_intr_break(void *arg)
289 struct uart_softc *sc = arg;
292 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
298 uart_sched_softih(sc, SER_INT_BREAK);
303 * Handle a receiver overrun situation. We lost at least 1 byte in the
304 * input stream and it's our job to contain the situation. We grab as
305 * much of the data we can, but otherwise flush the receiver FIFO to
306 * create some breathing room. The net effect is that we avoid the
307 * overrun condition to happen for the next X characters, where X is
308 * related to the FIFO size at the cost of losing data right away.
309 * So, instead of having multiple overrun interrupts in close proximity
310 * to each other and possibly pessimizing UART interrupt latency for
311 * other UARTs in a multiport configuration, we create a longer segment
312 * of missing characters by freeing up the FIFO.
313 * Each overrun condition is marked in the input buffer by a token. The
314 * token represents the loss of at least one, but possible more bytes in
318 uart_intr_overrun(void *arg)
320 struct uart_softc *sc = arg;
324 if (uart_rx_put(sc, UART_STAT_OVERRUN))
325 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
326 uart_sched_softih(sc, SER_INT_RXREADY);
328 UART_FLUSH(sc, UART_FLUSH_RECEIVER);
333 * Received data ready.
336 uart_intr_rxready(void *arg)
338 struct uart_softc *sc = arg;
344 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
345 while (rxp != sc->sc_rxput) {
346 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
347 if (rxp == sc->sc_rxbufsz)
353 uart_sched_softih(sc, SER_INT_RXREADY);
355 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
360 * Line or modem status change (OOB signalling).
361 * We pass the signals to the software interrupt handler for further
362 * processing. Note that we merge the delta bits, but set the state
363 * bits. This is to avoid losing state transitions due to having more
364 * than 1 hardware interrupt between software interrupts.
367 uart_intr_sigchg(void *arg)
369 struct uart_softc *sc = arg;
372 sig = UART_GETSIG(sc);
375 * Time pulse counting support, invoked whenever the PPS parameters are
376 * currently set to capture either edge of the signal.
378 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
379 uart_pps_process(sc, sig);
383 * Keep track of signal changes, even when the device is not
384 * opened. This allows us to inform upper layers about a
385 * possible loss of DCD and thus the existence of a (possibly)
386 * different connection when we have DCD back, during the time
387 * that the device was closed.
390 old = sc->sc_ttypend;
391 new = old & ~SER_MASK_STATE;
392 new |= sig & SER_INT_SIGMASK;
393 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
396 uart_sched_softih(sc, SER_INT_SIGCHG);
401 * The transmitter can accept more data.
404 uart_intr_txidle(void *arg)
406 struct uart_softc *sc = arg;
410 uart_sched_softih(sc, SER_INT_TXIDLE);
418 struct uart_softc *sc = arg;
419 int cnt, ipend, testintr;
422 return (FILTER_STRAY);
425 testintr = sc->sc_testintr;
426 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
428 if (ipend & SER_INT_OVERRUN)
429 uart_intr_overrun(sc);
430 if (ipend & SER_INT_BREAK)
432 if (ipend & SER_INT_RXREADY)
433 uart_intr_rxready(sc);
434 if (ipend & SER_INT_SIGCHG)
435 uart_intr_sigchg(sc);
436 if (ipend & SER_INT_TXIDLE)
437 uart_intr_txidle(sc);
441 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
442 (timeout_t *)uart_intr, sc);
445 return ((cnt == 0) ? FILTER_STRAY :
446 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
451 uart_bus_ihand(device_t dev, int ipend)
456 return (uart_intr_break);
457 case SER_INT_OVERRUN:
458 return (uart_intr_overrun);
459 case SER_INT_RXREADY:
460 return (uart_intr_rxready);
462 return (uart_intr_sigchg);
464 return (uart_intr_txidle);
470 uart_bus_ipend(device_t dev)
472 struct uart_softc *sc;
474 sc = device_get_softc(dev);
475 return (UART_IPEND(sc));
479 uart_bus_sysdev(device_t dev)
481 struct uart_softc *sc;
483 sc = device_get_softc(dev);
484 return ((sc->sc_sysdev != NULL) ? 1 : 0);
488 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
490 struct uart_softc *sc;
491 struct uart_devinfo *sysdev;
494 sc = device_get_softc(dev);
497 * All uart_class references are weak. Check that the needed
498 * class has been compiled-in. Fail if not.
500 if (sc->sc_class == NULL)
504 * Initialize the instance. Note that the instance (=softc) does
505 * not necessarily match the hardware specific softc. We can't do
506 * anything about it now, because we may not attach to the device.
507 * Hardware drivers cannot use any of the class specific fields
510 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
512 if (device_get_desc(dev) == NULL)
513 device_set_desc(dev, uart_getname(sc->sc_class));
516 * Allocate the register resource. We assume that all UARTs have
517 * a single register window in either I/O port space or memory
518 * mapped I/O space. Any UART that needs multiple windows will
519 * consequently not be supported by this driver as-is. We try I/O
520 * port space first because that's the common case.
523 sc->sc_rtype = SYS_RES_IOPORT;
524 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
526 if (sc->sc_rres == NULL) {
528 sc->sc_rtype = SYS_RES_MEMORY;
529 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype,
530 &sc->sc_rrid, RF_ACTIVE);
531 if (sc->sc_rres == NULL)
536 * Fill in the bus access structure and compare this device with
537 * a possible console device and/or a debug port. We set the flags
538 * in the softc so that the hardware dependent probe can adjust
539 * accordingly. In general, you don't want to permanently disrupt
542 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
543 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
544 sc->sc_bas.chan = chan;
545 sc->sc_bas.regshft = regshft;
546 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
548 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
549 if (chan == sysdev->bas.chan &&
550 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
551 /* XXX check if ops matches class. */
552 sc->sc_sysdev = sysdev;
553 sysdev->bas.rclk = sc->sc_bas.rclk;
557 error = UART_PROBE(sc);
558 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
559 return ((error) ? error : BUS_PROBE_DEFAULT);
563 uart_bus_attach(device_t dev)
565 struct uart_softc *sc, *sc0;
570 * The sc_class field defines the type of UART we're going to work
571 * with and thus the size of the softc. Replace the generic softc
572 * with one that matches the UART now that we're certain we handle
575 sc0 = device_get_softc(dev);
576 if (sc0->sc_class->size > sizeof(*sc)) {
577 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
578 bcopy(sc0, sc, sizeof(*sc));
579 device_set_softc(dev, sc);
584 * Now that we know the softc for this device, connect the back
585 * pointer from the sysdev for this device, if any
587 if (sc->sc_sysdev != NULL)
588 sc->sc_sysdev->sc = sc;
591 * Protect ourselves against interrupts while we're not completely
592 * finished attaching and initializing. We don't expect interrupts
593 * until after UART_ATTACH(), though.
597 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
598 if (sc->sc_hwmtx == NULL)
599 sc->sc_hwmtx = &sc->sc_hwmtx_s;
602 * Re-allocate. We expect that the softc contains the information
603 * collected by uart_bus_probe() intact.
605 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
607 if (sc->sc_rres == NULL) {
608 mtx_destroy(&sc->sc_hwmtx_s);
611 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
612 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
615 * Ensure there is room for at least three full FIFOs of data in the
616 * receive buffer (handles the case of low-level drivers with huge
617 * FIFOs), and also ensure that there is no less than the historical
618 * size of 384 bytes (handles the typical small-FIFO case).
620 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
621 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
623 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
626 error = UART_ATTACH(sc);
630 if (sc->sc_hwiflow || sc->sc_hwoflow) {
632 device_print_prettyname(dev);
633 if (sc->sc_hwiflow) {
634 printf("%sRTS iflow", sep);
637 if (sc->sc_hwoflow) {
638 printf("%sCTS oflow", sep);
644 if (sc->sc_sysdev != NULL) {
645 if (sc->sc_sysdev->baudrate == 0) {
646 if (UART_IOCTL(sc, UART_IOCTL_BAUD,
647 (intptr_t)&sc->sc_sysdev->baudrate) != 0)
648 sc->sc_sysdev->baudrate = -1;
650 switch (sc->sc_sysdev->type) {
651 case UART_DEV_CONSOLE:
652 device_printf(dev, "console");
654 case UART_DEV_DBGPORT:
655 device_printf(dev, "debug port");
657 case UART_DEV_KEYBOARD:
658 device_printf(dev, "keyboard");
661 device_printf(dev, "unknown system device");
664 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
665 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
666 sc->sc_sysdev->stopbits);
671 filt = uart_intr(sc);
675 * Don't use interrupts if we couldn't clear any pending interrupt
676 * conditions. We may have broken H/W and polling is probably the
677 * safest thing to do.
679 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) {
681 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
682 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
684 if (sc->sc_ires != NULL) {
685 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
686 uart_intr, NULL, sc, &sc->sc_icookie);
687 sc->sc_fastintr = (error == 0) ? 1 : 0;
689 if (!sc->sc_fastintr)
690 error = bus_setup_intr(dev, sc->sc_ires,
691 INTR_TYPE_TTY | INTR_MPSAFE, NULL,
692 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
695 device_printf(dev, "could not activate interrupt\n");
696 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
701 if (sc->sc_ires == NULL) {
702 /* No interrupt resource. Force polled mode. */
704 callout_init(&sc->sc_timer, 1);
705 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
706 (timeout_t *)uart_intr, sc);
709 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
711 device_print_prettyname(dev);
712 if (sc->sc_fastintr) {
713 printf("%sfast interrupt", sep);
717 printf("%spolled mode (%dHz)", sep, uart_poll_freq);
723 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
724 if ((error = sc->sc_sysdev->attach(sc)) != 0)
727 if ((error = uart_tty_attach(sc)) != 0)
732 if (sc->sc_sysdev != NULL)
733 sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
738 free(sc->sc_txbuf, M_UART);
739 free(sc->sc_rxbuf, M_UART);
741 if (sc->sc_ires != NULL) {
742 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
743 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
746 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
748 mtx_destroy(&sc->sc_hwmtx_s);
754 uart_bus_detach(device_t dev)
756 struct uart_softc *sc;
758 sc = device_get_softc(dev);
762 if (sc->sc_sysdev != NULL)
763 sc->sc_sysdev->hwmtx = NULL;
767 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
768 (*sc->sc_sysdev->detach)(sc);
772 free(sc->sc_txbuf, M_UART);
773 free(sc->sc_rxbuf, M_UART);
775 if (sc->sc_ires != NULL) {
776 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
777 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
780 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
782 mtx_destroy(&sc->sc_hwmtx_s);
784 if (sc->sc_class->size > sizeof(*sc)) {
785 device_set_softc(dev, NULL);
788 device_set_softc(dev, NULL);
794 uart_bus_resume(device_t dev)
796 struct uart_softc *sc;
798 sc = device_get_softc(dev);
799 return (UART_ATTACH(sc));
803 uart_grab(struct uart_devinfo *di)
811 uart_ungrab(struct uart_devinfo *di)