sys/dev/usb/controller/at91dci.c

   1 #include <sys/cdefs.h>
   2 __FBSDID("$FreeBSD$");
   3
   4 /*-
   5  * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * This file contains the driver for the AT91 series USB Device
  31  * Controller
  32  */
  33
  34 /*
  35  * Thanks to "David Brownell" for helping out regarding the hardware
  36  * endpoint profiles.
  37  */
  38
  39 /*
  40  * NOTE: The "fifo_bank" is not reset in hardware when the endpoint is
  41  * reset !
  42  *
  43  * NOTE: When the chip detects BUS-reset it will also reset the
  44  * endpoints, Function-address and more.
  45  */
  46
  47 #include <dev/usb/usb.h>
  48 #include <dev/usb/usb_mfunc.h>
  49 #include <dev/usb/usb_error.h>
  50 #include <dev/usb/usb_defs.h>
  51
  52 #define USB_DEBUG_VAR at91dcidebug
  53
  54 #include <dev/usb/usb_core.h>
  55 #include <dev/usb/usb_debug.h>
  56 #include <dev/usb/usb_busdma.h>
  57 #include <dev/usb/usb_process.h>
  58 #include <dev/usb/usb_sw_transfer.h>
  59 #include <dev/usb/usb_transfer.h>
  60 #include <dev/usb/usb_device.h>
  61 #include <dev/usb/usb_hub.h>
  62 #include <dev/usb/usb_util.h>
  63
  64 #include <dev/usb/usb_controller.h>
  65 #include <dev/usb/usb_bus.h>
  66 #include <dev/usb/controller/at91dci.h>
  67
  68 #define AT9100_DCI_BUS2SC(bus) \
  69    ((struct at91dci_softc *)(((uint8_t *)(bus)) - \
  70    USB_P2U(&(((struct at91dci_softc *)0)->sc_bus))))
  71
  72 #define AT9100_DCI_PC2SC(pc) \
  73    AT9100_DCI_BUS2SC((pc)->tag_parent->info->bus)
  74
  75 #if USB_DEBUG
  76 static int at91dcidebug = 0;
  77
  78 SYSCTL_NODE(_hw_usb2, OID_AUTO, at91dci, CTLFLAG_RW, 0, "USB at91dci");
  79 SYSCTL_INT(_hw_usb2_at91dci, OID_AUTO, debug, CTLFLAG_RW,
  80     &at91dcidebug, 0, "at91dci debug level");
  81 #endif
  82
  83 #define AT9100_DCI_INTR_ENDPT 1
  84
  85 /* prototypes */
  86
  87 struct usb2_bus_methods at91dci_bus_methods;
  88 struct usb2_pipe_methods at91dci_device_bulk_methods;
  89 struct usb2_pipe_methods at91dci_device_ctrl_methods;
  90 struct usb2_pipe_methods at91dci_device_intr_methods;
  91 struct usb2_pipe_methods at91dci_device_isoc_fs_methods;
  92 struct usb2_pipe_methods at91dci_root_ctrl_methods;
  93 struct usb2_pipe_methods at91dci_root_intr_methods;
  94
  95 static at91dci_cmd_t at91dci_setup_rx;
  96 static at91dci_cmd_t at91dci_data_rx;
  97 static at91dci_cmd_t at91dci_data_tx;
  98 static at91dci_cmd_t at91dci_data_tx_sync;
  99 static void     at91dci_device_done(struct usb2_xfer *, usb2_error_t);
 100 static void     at91dci_do_poll(struct usb2_bus *);
 101 static void     at91dci_root_ctrl_poll(struct at91dci_softc *);
 102 static void     at91dci_standard_done(struct usb2_xfer *);
 103
 104 static usb2_sw_transfer_func_t at91dci_root_intr_done;
 105 static usb2_sw_transfer_func_t at91dci_root_ctrl_done;
 106
 107 /*
 108  * NOTE: Some of the bits in the CSR register have inverse meaning so
 109  * we need a helper macro when acknowledging events:
 110  */
 111 #define AT91_CSR_ACK(csr, what) do {            \
 112   (csr) &= ~((AT91_UDP_CSR_FORCESTALL|          \
 113               AT91_UDP_CSR_TXPKTRDY|            \
 114               AT91_UDP_CSR_RXBYTECNT) ^ (what));\
 115   (csr) |= ((AT91_UDP_CSR_RX_DATA_BK0|          \
 116              AT91_UDP_CSR_RX_DATA_BK1|          \
 117              AT91_UDP_CSR_TXCOMP|               \
 118              AT91_UDP_CSR_RXSETUP|              \
 119              AT91_UDP_CSR_STALLSENT) ^ (what)); \
 120 } while (0)
 121
 122 /*
 123  * Here is a list of what the chip supports.
 124  * Probably it supports more than listed here!
 125  */
 126 static const struct usb2_hw_ep_profile
 127         at91dci_ep_profile[AT91_UDP_EP_MAX] = {
 128
 129         [0] = {
 130                 .max_in_frame_size = 8,
 131                 .max_out_frame_size = 8,
 132                 .is_simplex = 1,
 133                 .support_control = 1,
 134         },
 135         [1] = {
 136                 .max_in_frame_size = 64,
 137                 .max_out_frame_size = 64,
 138                 .is_simplex = 1,
 139                 .support_multi_buffer = 1,
 140                 .support_bulk = 1,
 141                 .support_interrupt = 1,
 142                 .support_isochronous = 1,
 143                 .support_in = 1,
 144                 .support_out = 1,
 145         },
 146         [2] = {
 147                 .max_in_frame_size = 64,
 148                 .max_out_frame_size = 64,
 149                 .is_simplex = 1,
 150                 .support_multi_buffer = 1,
 151                 .support_bulk = 1,
 152                 .support_interrupt = 1,
 153                 .support_isochronous = 1,
 154                 .support_in = 1,
 155                 .support_out = 1,
 156         },
 157         [3] = {
 158                 /* can also do BULK */
 159                 .max_in_frame_size = 8,
 160                 .max_out_frame_size = 8,
 161                 .is_simplex = 1,
 162                 .support_interrupt = 1,
 163                 .support_in = 1,
 164                 .support_out = 1,
 165         },
 166         [4] = {
 167                 .max_in_frame_size = 256,
 168                 .max_out_frame_size = 256,
 169                 .is_simplex = 1,
 170                 .support_multi_buffer = 1,
 171                 .support_bulk = 1,
 172                 .support_interrupt = 1,
 173                 .support_isochronous = 1,
 174                 .support_in = 1,
 175                 .support_out = 1,
 176         },
 177         [5] = {
 178                 .max_in_frame_size = 256,
 179                 .max_out_frame_size = 256,
 180                 .is_simplex = 1,
 181                 .support_multi_buffer = 1,
 182                 .support_bulk = 1,
 183                 .support_interrupt = 1,
 184                 .support_isochronous = 1,
 185                 .support_in = 1,
 186                 .support_out = 1,
 187         },
 188 };
 189
 190 static void
 191 at91dci_get_hw_ep_profile(struct usb2_device *udev,
 192     const struct usb2_hw_ep_profile **ppf, uint8_t ep_addr)
 193 {
 194         if (ep_addr < AT91_UDP_EP_MAX) {
 195                 *ppf = (at91dci_ep_profile + ep_addr);
 196         } else {
 197                 *ppf = NULL;
 198         }
 199 }
 200
 201 static void
 202 at91dci_clocks_on(struct at91dci_softc *sc)
 203 {
 204         if (sc->sc_flags.clocks_off &&
 205             sc->sc_flags.port_powered) {
 206
 207                 DPRINTFN(5, "\n");
 208
 209                 if (sc->sc_clocks_on) {
 210                         (sc->sc_clocks_on) (sc->sc_clocks_arg);
 211                 }
 212                 sc->sc_flags.clocks_off = 0;
 213
 214                 /* enable Transceiver */
 215                 AT91_UDP_WRITE_4(sc, AT91_UDP_TXVC, 0);
 216         }
 217 }
 218
 219 static void
 220 at91dci_clocks_off(struct at91dci_softc *sc)
 221 {
 222         if (!sc->sc_flags.clocks_off) {
 223
 224                 DPRINTFN(5, "\n");
 225
 226                 /* disable Transceiver */
 227                 AT91_UDP_WRITE_4(sc, AT91_UDP_TXVC, AT91_UDP_TXVC_DIS);
 228
 229                 if (sc->sc_clocks_off) {
 230                         (sc->sc_clocks_off) (sc->sc_clocks_arg);
 231                 }
 232                 sc->sc_flags.clocks_off = 1;
 233         }
 234 }
 235
 236 static void
 237 at91dci_pull_up(struct at91dci_softc *sc)
 238 {
 239         /* pullup D+, if possible */
 240
 241         if (!sc->sc_flags.d_pulled_up &&
 242             sc->sc_flags.port_powered) {
 243                 sc->sc_flags.d_pulled_up = 1;
 244                 (sc->sc_pull_up) (sc->sc_pull_arg);
 245         }
 246 }
 247
 248 static void
 249 at91dci_pull_down(struct at91dci_softc *sc)
 250 {
 251         /* pulldown D+, if possible */
 252
 253         if (sc->sc_flags.d_pulled_up) {
 254                 sc->sc_flags.d_pulled_up = 0;
 255                 (sc->sc_pull_down) (sc->sc_pull_arg);
 256         }
 257 }
 258
 259 static void
 260 at91dci_wakeup_peer(struct usb2_xfer *xfer)
 261 {
 262         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
 263         uint8_t use_polling;
 264
 265         if (!(sc->sc_flags.status_suspend)) {
 266                 return;
 267         }
 268         use_polling = mtx_owned(xfer->xroot->xfer_mtx) ? 1 : 0;
 269
 270         AT91_UDP_WRITE_4(sc, AT91_UDP_GSTATE, AT91_UDP_GSTATE_ESR);
 271
 272         /* wait 8 milliseconds */
 273         if (use_polling) {
 274                 /* polling */
 275                 DELAY(8000);
 276         } else {
 277                 /* Wait for reset to complete. */
 278                 usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 125);
 279         }
 280
 281         AT91_UDP_WRITE_4(sc, AT91_UDP_GSTATE, 0);
 282 }
 283
 284 static void
 285 at91dci_set_address(struct at91dci_softc *sc, uint8_t addr)
 286 {
 287         DPRINTFN(5, "addr=%d\n", addr);
 288
 289         AT91_UDP_WRITE_4(sc, AT91_UDP_FADDR, addr |
 290             AT91_UDP_FADDR_EN);
 291 }
 292
 293 static uint8_t
 294 at91dci_setup_rx(struct at91dci_td *td)
 295 {
 296         struct at91dci_softc *sc;
 297         struct usb2_device_request req;
 298         uint32_t csr;
 299         uint32_t temp;
 300         uint16_t count;
 301
 302         /* read out FIFO status */
 303         csr = bus_space_read_4(td->io_tag, td->io_hdl,
 304             td->status_reg);
 305
 306         DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder);
 307
 308         temp = csr;
 309         temp &= (AT91_UDP_CSR_RX_DATA_BK0 |
 310             AT91_UDP_CSR_RX_DATA_BK1 |
 311             AT91_UDP_CSR_STALLSENT |
 312             AT91_UDP_CSR_RXSETUP |
 313             AT91_UDP_CSR_TXCOMP);
 314
 315         if (!(csr & AT91_UDP_CSR_RXSETUP)) {
 316                 /* abort any ongoing transfer */
 317                 if (!td->did_stall) {
 318                         DPRINTFN(5, "stalling\n");
 319                         temp |= AT91_UDP_CSR_FORCESTALL;
 320                         td->did_stall = 1;
 321                 }
 322                 goto not_complete;
 323         }
 324         /* get the packet byte count */
 325         count = (csr & AT91_UDP_CSR_RXBYTECNT) >> 16;
 326
 327         /* verify data length */
 328         if (count != td->remainder) {
 329                 DPRINTFN(0, "Invalid SETUP packet "
 330                     "length, %d bytes\n", count);
 331                 goto not_complete;
 332         }
 333         if (count != sizeof(req)) {
 334                 DPRINTFN(0, "Unsupported SETUP packet "
 335                     "length, %d bytes\n", count);
 336                 goto not_complete;
 337         }
 338         /* receive data */
 339         bus_space_read_multi_1(td->io_tag, td->io_hdl,
 340             td->fifo_reg, (void *)&req, sizeof(req));
 341
 342         /* copy data into real buffer */
 343         usb2_copy_in(td->pc, 0, &req, sizeof(req));
 344
 345         td->offset = sizeof(req);
 346         td->remainder = 0;
 347
 348         /* get pointer to softc */
 349         sc = AT9100_DCI_PC2SC(td->pc);
 350
 351         /* sneak peek the set address */
 352         if ((req.bmRequestType == UT_WRITE_DEVICE) &&
 353             (req.bRequest == UR_SET_ADDRESS)) {
 354                 sc->sc_dv_addr = req.wValue[0] & 0x7F;
 355         } else {
 356                 sc->sc_dv_addr = 0xFF;
 357         }
 358
 359         /* sneak peek the endpoint direction */
 360         if (req.bmRequestType & UE_DIR_IN) {
 361                 csr |= AT91_UDP_CSR_DIR;
 362         } else {
 363                 csr &= ~AT91_UDP_CSR_DIR;
 364         }
 365
 366         /* write the direction of the control transfer */
 367         AT91_CSR_ACK(csr, temp);
 368         bus_space_write_4(td->io_tag, td->io_hdl,
 369             td->status_reg, csr);
 370         return (0);                     /* complete */
 371
 372 not_complete:
 373         /* clear interrupts, if any */
 374         if (temp) {
 375                 DPRINTFN(5, "clearing 0x%08x\n", temp);
 376                 AT91_CSR_ACK(csr, temp);
 377                 bus_space_write_4(td->io_tag, td->io_hdl,
 378                     td->status_reg, csr);
 379         }
 380         return (1);                     /* not complete */
 381
 382 }
 383
 384 static uint8_t
 385 at91dci_data_rx(struct at91dci_td *td)
 386 {
 387         struct usb2_page_search buf_res;
 388         uint32_t csr;
 389         uint32_t temp;
 390         uint16_t count;
 391         uint8_t to;
 392         uint8_t got_short;
 393
 394         to = 2;                         /* don't loop forever! */
 395         got_short = 0;
 396
 397         /* check if any of the FIFO banks have data */
 398 repeat:
 399         /* read out FIFO status */
 400         csr = bus_space_read_4(td->io_tag, td->io_hdl,
 401             td->status_reg);
 402
 403         DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder);
 404
 405         if (csr & AT91_UDP_CSR_RXSETUP) {
 406                 if (td->remainder == 0) {
 407                         /*
 408                          * We are actually complete and have
 409                          * received the next SETUP
 410                          */
 411                         DPRINTFN(5, "faking complete\n");
 412                         return (0);     /* complete */
 413                 }
 414                 /*
 415                  * USB Host Aborted the transfer.
 416                  */
 417                 td->error = 1;
 418                 return (0);             /* complete */
 419         }
 420         /* Make sure that "STALLSENT" gets cleared */
 421         temp = csr;
 422         temp &= AT91_UDP_CSR_STALLSENT;
 423
 424         /* check status */
 425         if (!(csr & (AT91_UDP_CSR_RX_DATA_BK0 |
 426             AT91_UDP_CSR_RX_DATA_BK1))) {
 427                 if (temp) {
 428                         /* write command */
 429                         AT91_CSR_ACK(csr, temp);
 430                         bus_space_write_4(td->io_tag, td->io_hdl,
 431                             td->status_reg, csr);
 432                 }
 433                 return (1);             /* not complete */
 434         }
 435         /* get the packet byte count */
 436         count = (csr & AT91_UDP_CSR_RXBYTECNT) >> 16;
 437
 438         /* verify the packet byte count */
 439         if (count != td->max_packet_size) {
 440                 if (count < td->max_packet_size) {
 441                         /* we have a short packet */
 442                         td->short_pkt = 1;
 443                         got_short = 1;
 444                 } else {
 445                         /* invalid USB packet */
 446                         td->error = 1;
 447                         return (0);     /* we are complete */
 448                 }
 449         }
 450         /* verify the packet byte count */
 451         if (count > td->remainder) {
 452                 /* invalid USB packet */
 453                 td->error = 1;
 454                 return (0);             /* we are complete */
 455         }
 456         while (count > 0) {
 457                 usb2_get_page(td->pc, td->offset, &buf_res);
 458
 459                 /* get correct length */
 460                 if (buf_res.length > count) {
 461                         buf_res.length = count;
 462                 }
 463                 /* receive data */
 464                 bus_space_read_multi_1(td->io_tag, td->io_hdl,
 465                     td->fifo_reg, buf_res.buffer, buf_res.length);
 466
 467                 /* update counters */
 468                 count -= buf_res.length;
 469                 td->offset += buf_res.length;
 470                 td->remainder -= buf_res.length;
 471         }
 472
 473         /* clear status bits */
 474         if (td->support_multi_buffer) {
 475                 if (td->fifo_bank) {
 476                         td->fifo_bank = 0;
 477                         temp |= AT91_UDP_CSR_RX_DATA_BK1;
 478                 } else {
 479                         td->fifo_bank = 1;
 480                         temp |= AT91_UDP_CSR_RX_DATA_BK0;
 481                 }
 482         } else {
 483                 temp |= (AT91_UDP_CSR_RX_DATA_BK0 |
 484                     AT91_UDP_CSR_RX_DATA_BK1);
 485         }
 486
 487         /* write command */
 488         AT91_CSR_ACK(csr, temp);
 489         bus_space_write_4(td->io_tag, td->io_hdl,
 490             td->status_reg, csr);
 491
 492         /*
 493          * NOTE: We may have to delay a little bit before
 494          * proceeding after clearing the DATA_BK bits.
 495          */
 496
 497         /* check if we are complete */
 498         if ((td->remainder == 0) || got_short) {
 499                 if (td->short_pkt) {
 500                         /* we are complete */
 501                         return (0);
 502                 }
 503                 /* else need to receive a zero length packet */
 504         }
 505         if (--to) {
 506                 goto repeat;
 507         }
 508         return (1);                     /* not complete */
 509 }
 510
 511 static uint8_t
 512 at91dci_data_tx(struct at91dci_td *td)
 513 {
 514         struct usb2_page_search buf_res;
 515         uint32_t csr;
 516         uint32_t temp;
 517         uint16_t count;
 518         uint8_t to;
 519
 520         to = 2;                         /* don't loop forever! */
 521
 522 repeat:
 523
 524         /* read out FIFO status */
 525         csr = bus_space_read_4(td->io_tag, td->io_hdl,
 526             td->status_reg);
 527
 528         DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder);
 529
 530         if (csr & AT91_UDP_CSR_RXSETUP) {
 531                 /*
 532                  * The current transfer was aborted
 533                  * by the USB Host
 534                  */
 535                 td->error = 1;
 536                 return (0);             /* complete */
 537         }
 538         /* Make sure that "STALLSENT" gets cleared */
 539         temp = csr;
 540         temp &= AT91_UDP_CSR_STALLSENT;
 541
 542         if (csr & AT91_UDP_CSR_TXPKTRDY) {
 543                 if (temp) {
 544                         /* write command */
 545                         AT91_CSR_ACK(csr, temp);
 546                         bus_space_write_4(td->io_tag, td->io_hdl,
 547                             td->status_reg, csr);
 548                 }
 549                 return (1);             /* not complete */
 550         } else {
 551                 /* clear TXCOMP and set TXPKTRDY */
 552                 temp |= (AT91_UDP_CSR_TXCOMP |
 553                     AT91_UDP_CSR_TXPKTRDY);
 554         }
 555
 556         count = td->max_packet_size;
 557         if (td->remainder < count) {
 558                 /* we have a short packet */
 559                 td->short_pkt = 1;
 560                 count = td->remainder;
 561         }
 562         while (count > 0) {
 563
 564                 usb2_get_page(td->pc, td->offset, &buf_res);
 565
 566                 /* get correct length */
 567                 if (buf_res.length > count) {
 568                         buf_res.length = count;
 569                 }
 570                 /* transmit data */
 571                 bus_space_write_multi_1(td->io_tag, td->io_hdl,
 572                     td->fifo_reg, buf_res.buffer, buf_res.length);
 573
 574                 /* update counters */
 575                 count -= buf_res.length;
 576                 td->offset += buf_res.length;
 577                 td->remainder -= buf_res.length;
 578         }
 579
 580         /* write command */
 581         AT91_CSR_ACK(csr, temp);
 582         bus_space_write_4(td->io_tag, td->io_hdl,
 583             td->status_reg, csr);
 584
 585         /* check remainder */
 586         if (td->remainder == 0) {
 587                 if (td->short_pkt) {
 588                         return (0);     /* complete */
 589                 }
 590                 /* else we need to transmit a short packet */
 591         }
 592         if (--to) {
 593                 goto repeat;
 594         }
 595         return (1);                     /* not complete */
 596 }
 597
 598 static uint8_t
 599 at91dci_data_tx_sync(struct at91dci_td *td)
 600 {
 601         struct at91dci_softc *sc;
 602         uint32_t csr;
 603         uint32_t temp;
 604
 605 #if 0
 606 repeat:
 607 #endif
 608
 609         /* read out FIFO status */
 610         csr = bus_space_read_4(td->io_tag, td->io_hdl,
 611             td->status_reg);
 612
 613         DPRINTFN(5, "csr=0x%08x\n", csr);
 614
 615         if (csr & AT91_UDP_CSR_RXSETUP) {
 616                 DPRINTFN(5, "faking complete\n");
 617                 /* Race condition */
 618                 return (0);             /* complete */
 619         }
 620         temp = csr;
 621         temp &= (AT91_UDP_CSR_STALLSENT |
 622             AT91_UDP_CSR_TXCOMP);
 623
 624         /* check status */
 625         if (csr & AT91_UDP_CSR_TXPKTRDY) {
 626                 goto not_complete;
 627         }
 628         if (!(csr & AT91_UDP_CSR_TXCOMP)) {
 629                 goto not_complete;
 630         }
 631         sc = AT9100_DCI_PC2SC(td->pc);
 632         if (sc->sc_dv_addr != 0xFF) {
 633                 /*
 634                  * The AT91 has a special requirement with regard to
 635                  * setting the address and that is to write the new
 636                  * address before clearing TXCOMP:
 637                  */
 638                 at91dci_set_address(sc, sc->sc_dv_addr);
 639         }
 640         /* write command */
 641         AT91_CSR_ACK(csr, temp);
 642         bus_space_write_4(td->io_tag, td->io_hdl,
 643             td->status_reg, csr);
 644
 645         return (0);                     /* complete */
 646
 647 not_complete:
 648         if (temp) {
 649                 /* write command */
 650                 AT91_CSR_ACK(csr, temp);
 651                 bus_space_write_4(td->io_tag, td->io_hdl,
 652                     td->status_reg, csr);
 653         }
 654         return (1);                     /* not complete */
 655 }
 656
 657 static uint8_t
 658 at91dci_xfer_do_fifo(struct usb2_xfer *xfer)
 659 {
 660         struct at91dci_softc *sc;
 661         struct at91dci_td *td;
 662         uint8_t temp;
 663
 664         DPRINTFN(9, "\n");
 665
 666         td = xfer->td_transfer_cache;
 667         while (1) {
 668                 if ((td->func) (td)) {
 669                         /* operation in progress */
 670                         break;
 671                 }
 672                 if (((void *)td) == xfer->td_transfer_last) {
 673                         goto done;
 674                 }
 675                 if (td->error) {
 676                         goto done;
 677                 } else if (td->remainder > 0) {
 678                         /*
 679                          * We had a short transfer. If there is no alternate
 680                          * next, stop processing !
 681                          */
 682                         if (!td->alt_next) {
 683                                 goto done;
 684                         }
 685                 }
 686                 /*
 687                  * Fetch the next transfer descriptor and transfer
 688                  * some flags to the next transfer descriptor
 689                  */
 690                 temp = 0;
 691                 if (td->fifo_bank)
 692                         temp |= 1;
 693                 td = td->obj_next;
 694                 xfer->td_transfer_cache = td;
 695                 if (temp & 1)
 696                         td->fifo_bank = 1;
 697         }
 698         return (1);                     /* not complete */
 699
 700 done:
 701         sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
 702         temp = (xfer->endpoint & UE_ADDR);
 703
 704         /* update FIFO bank flag and multi buffer */
 705         if (td->fifo_bank) {
 706                 sc->sc_ep_flags[temp].fifo_bank = 1;
 707         } else {
 708                 sc->sc_ep_flags[temp].fifo_bank = 0;
 709         }
 710
 711         /* compute all actual lengths */
 712
 713         at91dci_standard_done(xfer);
 714
 715         return (0);                     /* complete */
 716 }
 717
 718 static void
 719 at91dci_interrupt_poll(struct at91dci_softc *sc)
 720 {
 721         struct usb2_xfer *xfer;
 722
 723 repeat:
 724         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
 725                 if (!at91dci_xfer_do_fifo(xfer)) {
 726                         /* queue has been modified */
 727                         goto repeat;
 728                 }
 729         }
 730 }
 731
 732 void
 733 at91dci_vbus_interrupt(struct at91dci_softc *sc, uint8_t is_on)
 734 {
 735         DPRINTFN(5, "vbus = %u\n", is_on);
 736
 737         USB_BUS_LOCK(&sc->sc_bus);
 738         if (is_on) {
 739                 if (!sc->sc_flags.status_vbus) {
 740                         sc->sc_flags.status_vbus = 1;
 741
 742                         /* complete root HUB interrupt endpoint */
 743
 744                         usb2_sw_transfer(&sc->sc_root_intr,
 745                             &at91dci_root_intr_done);
 746                 }
 747         } else {
 748                 if (sc->sc_flags.status_vbus) {
 749                         sc->sc_flags.status_vbus = 0;
 750                         sc->sc_flags.status_bus_reset = 0;
 751                         sc->sc_flags.status_suspend = 0;
 752                         sc->sc_flags.change_suspend = 0;
 753                         sc->sc_flags.change_connect = 1;
 754
 755                         /* complete root HUB interrupt endpoint */
 756
 757                         usb2_sw_transfer(&sc->sc_root_intr,
 758                             &at91dci_root_intr_done);
 759                 }
 760         }
 761         USB_BUS_UNLOCK(&sc->sc_bus);
 762 }
 763
 764 void
 765 at91dci_interrupt(struct at91dci_softc *sc)
 766 {
 767         uint32_t status;
 768
 769         USB_BUS_LOCK(&sc->sc_bus);
 770
 771         status = AT91_UDP_READ_4(sc, AT91_UDP_ISR);
 772         status &= AT91_UDP_INT_DEFAULT;
 773
 774         if (!status) {
 775                 USB_BUS_UNLOCK(&sc->sc_bus);
 776                 return;
 777         }
 778         /* acknowledge interrupts */
 779
 780         AT91_UDP_WRITE_4(sc, AT91_UDP_ICR, status);
 781
 782         /* check for any bus state change interrupts */
 783
 784         if (status & AT91_UDP_INT_BUS) {
 785
 786                 DPRINTFN(5, "real bus interrupt 0x%08x\n", status);
 787
 788                 if (status & AT91_UDP_INT_END_BR) {
 789
 790                         /* set correct state */
 791                         sc->sc_flags.status_bus_reset = 1;
 792                         sc->sc_flags.status_suspend = 0;
 793                         sc->sc_flags.change_suspend = 0;
 794                         sc->sc_flags.change_connect = 1;
 795
 796                         /* disable resume interrupt */
 797                         AT91_UDP_WRITE_4(sc, AT91_UDP_IDR,
 798                             AT91_UDP_INT_RXRSM);
 799                         /* enable suspend interrupt */
 800                         AT91_UDP_WRITE_4(sc, AT91_UDP_IER,
 801                             AT91_UDP_INT_RXSUSP);
 802                 }
 803                 /*
 804                  * If RXRSM and RXSUSP is set at the same time we interpret
 805                  * that like RESUME. Resume is set when there is at least 3
 806                  * milliseconds of inactivity on the USB BUS.
 807                  */
 808                 if (status & AT91_UDP_INT_RXRSM) {
 809                         if (sc->sc_flags.status_suspend) {
 810                                 sc->sc_flags.status_suspend = 0;
 811                                 sc->sc_flags.change_suspend = 1;
 812
 813                                 /* disable resume interrupt */
 814                                 AT91_UDP_WRITE_4(sc, AT91_UDP_IDR,
 815                                     AT91_UDP_INT_RXRSM);
 816                                 /* enable suspend interrupt */
 817                                 AT91_UDP_WRITE_4(sc, AT91_UDP_IER,
 818                                     AT91_UDP_INT_RXSUSP);
 819                         }
 820                 } else if (status & AT91_UDP_INT_RXSUSP) {
 821                         if (!sc->sc_flags.status_suspend) {
 822                                 sc->sc_flags.status_suspend = 1;
 823                                 sc->sc_flags.change_suspend = 1;
 824
 825                                 /* disable suspend interrupt */
 826                                 AT91_UDP_WRITE_4(sc, AT91_UDP_IDR,
 827                                     AT91_UDP_INT_RXSUSP);
 828
 829                                 /* enable resume interrupt */
 830                                 AT91_UDP_WRITE_4(sc, AT91_UDP_IER,
 831                                     AT91_UDP_INT_RXRSM);
 832                         }
 833                 }
 834                 /* complete root HUB interrupt endpoint */
 835
 836                 usb2_sw_transfer(&sc->sc_root_intr,
 837                     &at91dci_root_intr_done);
 838         }
 839         /* check for any endpoint interrupts */
 840
 841         if (status & AT91_UDP_INT_EPS) {
 842
 843                 DPRINTFN(5, "real endpoint interrupt 0x%08x\n", status);
 844
 845                 at91dci_interrupt_poll(sc);
 846         }
 847         USB_BUS_UNLOCK(&sc->sc_bus);
 848 }
 849
 850 static void
 851 at91dci_setup_standard_chain_sub(struct at91dci_std_temp *temp)
 852 {
 853         struct at91dci_td *td;
 854
 855         /* get current Transfer Descriptor */
 856         td = temp->td_next;
 857         temp->td = td;
 858
 859         /* prepare for next TD */
 860         temp->td_next = td->obj_next;
 861
 862         /* fill out the Transfer Descriptor */
 863         td->func = temp->func;
 864         td->pc = temp->pc;
 865         td->offset = temp->offset;
 866         td->remainder = temp->len;
 867         td->fifo_bank = 0;
 868         td->error = 0;
 869         td->did_stall = 0;
 870         td->short_pkt = temp->short_pkt;
 871         td->alt_next = temp->setup_alt_next;
 872 }
 873
 874 static void
 875 at91dci_setup_standard_chain(struct usb2_xfer *xfer)
 876 {
 877         struct at91dci_std_temp temp;
 878         struct at91dci_softc *sc;
 879         struct at91dci_td *td;
 880         uint32_t x;
 881         uint8_t ep_no;
 882         uint8_t need_sync;
 883
 884         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
 885             xfer->address, UE_GET_ADDR(xfer->endpoint),
 886             xfer->sumlen, usb2_get_speed(xfer->xroot->udev));
 887
 888         temp.max_frame_size = xfer->max_frame_size;
 889
 890         td = xfer->td_start[0];
 891         xfer->td_transfer_first = td;
 892         xfer->td_transfer_cache = td;
 893
 894         /* setup temp */
 895
 896         temp.td = NULL;
 897         temp.td_next = xfer->td_start[0];
 898         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
 899         temp.offset = 0;
 900
 901         sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
 902         ep_no = (xfer->endpoint & UE_ADDR);
 903
 904         /* check if we should prepend a setup message */
 905
 906         if (xfer->flags_int.control_xfr) {
 907                 if (xfer->flags_int.control_hdr) {
 908
 909                         temp.func = &at91dci_setup_rx;
 910                         temp.len = xfer->frlengths[0];
 911                         temp.pc = xfer->frbuffers + 0;
 912                         temp.short_pkt = temp.len ? 1 : 0;
 913
 914                         at91dci_setup_standard_chain_sub(&temp);
 915                 }
 916                 x = 1;
 917         } else {
 918                 x = 0;
 919         }
 920
 921         if (x != xfer->nframes) {
 922                 if (xfer->endpoint & UE_DIR_IN) {
 923                         temp.func = &at91dci_data_tx;
 924                         need_sync = 1;
 925                 } else {
 926                         temp.func = &at91dci_data_rx;
 927                         need_sync = 0;
 928                 }
 929
 930                 /* setup "pc" pointer */
 931                 temp.pc = xfer->frbuffers + x;
 932         } else {
 933                 need_sync = 0;
 934         }
 935         while (x != xfer->nframes) {
 936
 937                 /* DATA0 / DATA1 message */
 938
 939                 temp.len = xfer->frlengths[x];
 940
 941                 x++;
 942
 943                 if (x == xfer->nframes) {
 944                         temp.setup_alt_next = 0;
 945                 }
 946                 if (temp.len == 0) {
 947
 948                         /* make sure that we send an USB packet */
 949
 950                         temp.short_pkt = 0;
 951
 952                 } else {
 953
 954                         /* regular data transfer */
 955
 956                         temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
 957                 }
 958
 959                 at91dci_setup_standard_chain_sub(&temp);
 960
 961                 if (xfer->flags_int.isochronous_xfr) {
 962                         temp.offset += temp.len;
 963                 } else {
 964                         /* get next Page Cache pointer */
 965                         temp.pc = xfer->frbuffers + x;
 966                 }
 967         }
 968
 969         /* always setup a valid "pc" pointer for status and sync */
 970         temp.pc = xfer->frbuffers + 0;
 971
 972         /* check if we need to sync */
 973         if (need_sync && xfer->flags_int.control_xfr) {
 974
 975                 /* we need a SYNC point after TX */
 976                 temp.func = &at91dci_data_tx_sync;
 977                 temp.len = 0;
 978                 temp.short_pkt = 0;
 979
 980                 at91dci_setup_standard_chain_sub(&temp);
 981         }
 982         /* check if we should append a status stage */
 983         if (xfer->flags_int.control_xfr &&
 984             !xfer->flags_int.control_act) {
 985
 986                 /*
 987                  * Send a DATA1 message and invert the current
 988                  * endpoint direction.
 989                  */
 990                 if (xfer->endpoint & UE_DIR_IN) {
 991                         temp.func = &at91dci_data_rx;
 992                         need_sync = 0;
 993                 } else {
 994                         temp.func = &at91dci_data_tx;
 995                         need_sync = 1;
 996                 }
 997                 temp.len = 0;
 998                 temp.short_pkt = 0;
 999
1000                 at91dci_setup_standard_chain_sub(&temp);
1001                 if (need_sync) {
1002                         /* we need a SYNC point after TX */
1003                         temp.func = &at91dci_data_tx_sync;
1004                         temp.len = 0;
1005                         temp.short_pkt = 0;
1006
1007                         at91dci_setup_standard_chain_sub(&temp);
1008                 }
1009         }
1010         /* must have at least one frame! */
1011         td = temp.td;
1012         xfer->td_transfer_last = td;
1013
1014         /* setup the correct fifo bank */
1015         if (sc->sc_ep_flags[ep_no].fifo_bank) {
1016                 td = xfer->td_transfer_first;
1017                 td->fifo_bank = 1;
1018         }
1019 }
1020
1021 static void
1022 at91dci_timeout(void *arg)
1023 {
1024         struct usb2_xfer *xfer = arg;
1025
1026         DPRINTF("xfer=%p\n", xfer);
1027
1028         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1029
1030         /* transfer is transferred */
1031         at91dci_device_done(xfer, USB_ERR_TIMEOUT);
1032 }
1033
1034 static void
1035 at91dci_start_standard_chain(struct usb2_xfer *xfer)
1036 {
1037         DPRINTFN(9, "\n");
1038
1039         /* poll one time */
1040         if (at91dci_xfer_do_fifo(xfer)) {
1041
1042                 struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1043                 uint8_t ep_no = xfer->endpoint & UE_ADDR;
1044
1045                 /*
1046                  * Only enable the endpoint interrupt when we are actually
1047                  * waiting for data, hence we are dealing with level
1048                  * triggered interrupts !
1049                  */
1050                 AT91_UDP_WRITE_4(sc, AT91_UDP_IER, AT91_UDP_INT_EP(ep_no));
1051
1052                 DPRINTFN(15, "enable interrupts on endpoint %d\n", ep_no);
1053
1054                 /* put transfer on interrupt queue */
1055                 usb2_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
1056
1057                 /* start timeout, if any */
1058                 if (xfer->timeout != 0) {
1059                         usb2_transfer_timeout_ms(xfer,
1060                             &at91dci_timeout, xfer->timeout);
1061                 }
1062         }
1063 }
1064
1065 static void
1066 at91dci_root_intr_done(struct usb2_xfer *xfer,
1067     struct usb2_sw_transfer *std)
1068 {
1069         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1070
1071         DPRINTFN(9, "\n");
1072
1073         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1074
1075         if (std->state != USB_SW_TR_PRE_DATA) {
1076                 if (std->state == USB_SW_TR_PRE_CALLBACK) {
1077                         /* transfer transferred */
1078                         at91dci_device_done(xfer, std->err);
1079                 }
1080                 goto done;
1081         }
1082         /* setup buffer */
1083         std->ptr = sc->sc_hub_idata;
1084         std->len = sizeof(sc->sc_hub_idata);
1085
1086         /* set port bit */
1087         sc->sc_hub_idata[0] = 0x02;     /* we only have one port */
1088
1089 done:
1090         return;
1091 }
1092
1093 static usb2_error_t
1094 at91dci_standard_done_sub(struct usb2_xfer *xfer)
1095 {
1096         struct at91dci_td *td;
1097         uint32_t len;
1098         uint8_t error;
1099
1100         DPRINTFN(9, "\n");
1101
1102         td = xfer->td_transfer_cache;
1103
1104         do {
1105                 len = td->remainder;
1106
1107                 if (xfer->aframes != xfer->nframes) {
1108                         /*
1109                          * Verify the length and subtract
1110                          * the remainder from "frlengths[]":
1111                          */
1112                         if (len > xfer->frlengths[xfer->aframes]) {
1113                                 td->error = 1;
1114                         } else {
1115                                 xfer->frlengths[xfer->aframes] -= len;
1116                         }
1117                 }
1118                 /* Check for transfer error */
1119                 if (td->error) {
1120                         /* the transfer is finished */
1121                         error = 1;
1122                         td = NULL;
1123                         break;
1124                 }
1125                 /* Check for short transfer */
1126                 if (len > 0) {
1127                         if (xfer->flags_int.short_frames_ok) {
1128                                 /* follow alt next */
1129                                 if (td->alt_next) {
1130                                         td = td->obj_next;
1131                                 } else {
1132                                         td = NULL;
1133                                 }
1134                         } else {
1135                                 /* the transfer is finished */
1136                                 td = NULL;
1137                         }
1138                         error = 0;
1139                         break;
1140                 }
1141                 td = td->obj_next;
1142
1143                 /* this USB frame is complete */
1144                 error = 0;
1145                 break;
1146
1147         } while (0);
1148
1149         /* update transfer cache */
1150
1151         xfer->td_transfer_cache = td;
1152
1153         return (error ?
1154             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1155 }
1156
1157 static void
1158 at91dci_standard_done(struct usb2_xfer *xfer)
1159 {
1160         usb2_error_t err = 0;
1161
1162         DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
1163             xfer, xfer->pipe);
1164
1165         /* reset scanner */
1166
1167         xfer->td_transfer_cache = xfer->td_transfer_first;
1168
1169         if (xfer->flags_int.control_xfr) {
1170
1171                 if (xfer->flags_int.control_hdr) {
1172
1173                         err = at91dci_standard_done_sub(xfer);
1174                 }
1175                 xfer->aframes = 1;
1176
1177                 if (xfer->td_transfer_cache == NULL) {
1178                         goto done;
1179                 }
1180         }
1181         while (xfer->aframes != xfer->nframes) {
1182
1183                 err = at91dci_standard_done_sub(xfer);
1184                 xfer->aframes++;
1185
1186                 if (xfer->td_transfer_cache == NULL) {
1187                         goto done;
1188                 }
1189         }
1190
1191         if (xfer->flags_int.control_xfr &&
1192             !xfer->flags_int.control_act) {
1193
1194                 err = at91dci_standard_done_sub(xfer);
1195         }
1196 done:
1197         at91dci_device_done(xfer, err);
1198 }
1199
1200 /*------------------------------------------------------------------------*
1201  *      at91dci_device_done
1202  *
1203  * NOTE: this function can be called more than one time on the
1204  * same USB transfer!
1205  *------------------------------------------------------------------------*/
1206 static void
1207 at91dci_device_done(struct usb2_xfer *xfer, usb2_error_t error)
1208 {
1209         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1210         uint8_t ep_no;
1211
1212         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1213
1214         DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
1215             xfer, xfer->pipe, error);
1216
1217         if (xfer->flags_int.usb2_mode == USB_MODE_DEVICE) {
1218                 ep_no = (xfer->endpoint & UE_ADDR);
1219
1220                 /* disable endpoint interrupt */
1221                 AT91_UDP_WRITE_4(sc, AT91_UDP_IDR, AT91_UDP_INT_EP(ep_no));
1222
1223                 DPRINTFN(15, "disable interrupts on endpoint %d\n", ep_no);
1224         }
1225         /* dequeue transfer and start next transfer */
1226         usb2_transfer_done(xfer, error);
1227 }
1228
1229 static void
1230 at91dci_set_stall(struct usb2_device *udev, struct usb2_xfer *xfer,
1231     struct usb2_pipe *pipe)
1232 {
1233         struct at91dci_softc *sc;
1234         uint32_t csr_val;
1235         uint8_t csr_reg;
1236
1237         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1238
1239         DPRINTFN(5, "pipe=%p\n", pipe);
1240
1241         if (xfer) {
1242                 /* cancel any ongoing transfers */
1243                 at91dci_device_done(xfer, USB_ERR_STALLED);
1244         }
1245         /* set FORCESTALL */
1246         sc = AT9100_DCI_BUS2SC(udev->bus);
1247         csr_reg = (pipe->edesc->bEndpointAddress & UE_ADDR);
1248         csr_reg = AT91_UDP_CSR(csr_reg);
1249         csr_val = AT91_UDP_READ_4(sc, csr_reg);
1250         AT91_CSR_ACK(csr_val, AT91_UDP_CSR_FORCESTALL);
1251         AT91_UDP_WRITE_4(sc, csr_reg, csr_val);
1252 }
1253
1254 static void
1255 at91dci_clear_stall_sub(struct at91dci_softc *sc, uint8_t ep_no,
1256     uint8_t ep_type, uint8_t ep_dir)
1257 {
1258         const struct usb2_hw_ep_profile *pf;
1259         uint32_t csr_val;
1260         uint32_t temp;
1261         uint8_t csr_reg;
1262         uint8_t to;
1263
1264         if (ep_type == UE_CONTROL) {
1265                 /* clearing stall is not needed */
1266                 return;
1267         }
1268         /* compute CSR register offset */
1269         csr_reg = AT91_UDP_CSR(ep_no);
1270
1271         /* compute default CSR value */
1272         csr_val = 0;
1273         AT91_CSR_ACK(csr_val, 0);
1274
1275         /* disable endpoint */
1276         AT91_UDP_WRITE_4(sc, csr_reg, csr_val);
1277
1278         /* get endpoint profile */
1279         at91dci_get_hw_ep_profile(NULL, &pf, ep_no);
1280
1281         /* reset FIFO */
1282         AT91_UDP_WRITE_4(sc, AT91_UDP_RST, AT91_UDP_RST_EP(ep_no));
1283         AT91_UDP_WRITE_4(sc, AT91_UDP_RST, 0);
1284
1285         /*
1286          * NOTE: One would assume that a FIFO reset would release the
1287          * FIFO banks aswell, but it doesn't! We have to do this
1288          * manually!
1289          */
1290
1291         /* release FIFO banks, if any */
1292         for (to = 0; to != 2; to++) {
1293
1294                 /* get csr value */
1295                 csr_val = AT91_UDP_READ_4(sc, csr_reg);
1296
1297                 if (csr_val & (AT91_UDP_CSR_RX_DATA_BK0 |
1298                     AT91_UDP_CSR_RX_DATA_BK1)) {
1299                         /* clear status bits */
1300                         if (pf->support_multi_buffer) {
1301                                 if (sc->sc_ep_flags[ep_no].fifo_bank) {
1302                                         sc->sc_ep_flags[ep_no].fifo_bank = 0;
1303                                         temp = AT91_UDP_CSR_RX_DATA_BK1;
1304                                 } else {
1305                                         sc->sc_ep_flags[ep_no].fifo_bank = 1;
1306                                         temp = AT91_UDP_CSR_RX_DATA_BK0;
1307                                 }
1308                         } else {
1309                                 temp = (AT91_UDP_CSR_RX_DATA_BK0 |
1310                                     AT91_UDP_CSR_RX_DATA_BK1);
1311                         }
1312                 } else {
1313                         temp = 0;
1314                 }
1315
1316                 /* clear FORCESTALL */
1317                 temp |= AT91_UDP_CSR_STALLSENT;
1318
1319                 AT91_CSR_ACK(csr_val, temp);
1320                 AT91_UDP_WRITE_4(sc, csr_reg, csr_val);
1321         }
1322
1323         /* compute default CSR value */
1324         csr_val = 0;
1325         AT91_CSR_ACK(csr_val, 0);
1326
1327         /* enable endpoint */
1328         csr_val &= ~AT91_UDP_CSR_ET_MASK;
1329         csr_val |= AT91_UDP_CSR_EPEDS;
1330
1331         if (ep_type == UE_CONTROL) {
1332                 csr_val |= AT91_UDP_CSR_ET_CTRL;
1333         } else {
1334                 if (ep_type == UE_BULK) {
1335                         csr_val |= AT91_UDP_CSR_ET_BULK;
1336                 } else if (ep_type == UE_INTERRUPT) {
1337                         csr_val |= AT91_UDP_CSR_ET_INT;
1338                 } else {
1339                         csr_val |= AT91_UDP_CSR_ET_ISO;
1340                 }
1341                 if (ep_dir & UE_DIR_IN) {
1342                         csr_val |= AT91_UDP_CSR_ET_DIR_IN;
1343                 }
1344         }
1345
1346         /* enable endpoint */
1347         AT91_UDP_WRITE_4(sc, AT91_UDP_CSR(ep_no), csr_val);
1348 }
1349
1350 static void
1351 at91dci_clear_stall(struct usb2_device *udev, struct usb2_pipe *pipe)
1352 {
1353         struct at91dci_softc *sc;
1354         struct usb2_endpoint_descriptor *ed;
1355
1356         DPRINTFN(5, "pipe=%p\n", pipe);
1357
1358         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1359
1360         /* check mode */
1361         if (udev->flags.usb2_mode != USB_MODE_DEVICE) {
1362                 /* not supported */
1363                 return;
1364         }
1365         /* get softc */
1366         sc = AT9100_DCI_BUS2SC(udev->bus);
1367
1368         /* get endpoint descriptor */
1369         ed = pipe->edesc;
1370
1371         /* reset endpoint */
1372         at91dci_clear_stall_sub(sc,
1373             (ed->bEndpointAddress & UE_ADDR),
1374             (ed->bmAttributes & UE_XFERTYPE),
1375             (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1376 }
1377
1378 usb2_error_t
1379 at91dci_init(struct at91dci_softc *sc)
1380 {
1381         uint32_t csr_val;
1382         uint8_t n;
1383
1384         DPRINTF("start\n");
1385
1386         /* set up the bus structure */
1387         sc->sc_bus.usbrev = USB_REV_1_1;
1388         sc->sc_bus.methods = &at91dci_bus_methods;
1389
1390         USB_BUS_LOCK(&sc->sc_bus);
1391
1392         /* turn on clocks */
1393
1394         if (sc->sc_clocks_on) {
1395                 (sc->sc_clocks_on) (sc->sc_clocks_arg);
1396         }
1397         /* wait a little for things to stabilise */
1398         usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
1399
1400         /* disable and clear all interrupts */
1401
1402         AT91_UDP_WRITE_4(sc, AT91_UDP_IDR, 0xFFFFFFFF);
1403         AT91_UDP_WRITE_4(sc, AT91_UDP_ICR, 0xFFFFFFFF);
1404
1405         /* compute default CSR value */
1406
1407         csr_val = 0;
1408         AT91_CSR_ACK(csr_val, 0);
1409
1410         /* disable all endpoints */
1411
1412         for (n = 0; n != AT91_UDP_EP_MAX; n++) {
1413
1414                 /* disable endpoint */
1415                 AT91_UDP_WRITE_4(sc, AT91_UDP_CSR(n), csr_val);
1416         }
1417
1418         /* enable the control endpoint */
1419
1420         AT91_CSR_ACK(csr_val, AT91_UDP_CSR_ET_CTRL |
1421             AT91_UDP_CSR_EPEDS);
1422
1423         /* write to FIFO control register */
1424
1425         AT91_UDP_WRITE_4(sc, AT91_UDP_CSR(0), csr_val);
1426
1427         /* enable the interrupts we want */
1428
1429         AT91_UDP_WRITE_4(sc, AT91_UDP_IER, AT91_UDP_INT_BUS);
1430
1431         /* turn off clocks */
1432
1433         at91dci_clocks_off(sc);
1434
1435         USB_BUS_UNLOCK(&sc->sc_bus);
1436
1437         /* catch any lost interrupts */
1438
1439         at91dci_do_poll(&sc->sc_bus);
1440
1441         return (0);                     /* success */
1442 }
1443
1444 void
1445 at91dci_uninit(struct at91dci_softc *sc)
1446 {
1447         USB_BUS_LOCK(&sc->sc_bus);
1448
1449         /* disable and clear all interrupts */
1450         AT91_UDP_WRITE_4(sc, AT91_UDP_IDR, 0xFFFFFFFF);
1451         AT91_UDP_WRITE_4(sc, AT91_UDP_ICR, 0xFFFFFFFF);
1452
1453         sc->sc_flags.port_powered = 0;
1454         sc->sc_flags.status_vbus = 0;
1455         sc->sc_flags.status_bus_reset = 0;
1456         sc->sc_flags.status_suspend = 0;
1457         sc->sc_flags.change_suspend = 0;
1458         sc->sc_flags.change_connect = 1;
1459
1460         at91dci_pull_down(sc);
1461         at91dci_clocks_off(sc);
1462         USB_BUS_UNLOCK(&sc->sc_bus);
1463 }
1464
1465 void
1466 at91dci_suspend(struct at91dci_softc *sc)
1467 {
1468         return;
1469 }
1470
1471 void
1472 at91dci_resume(struct at91dci_softc *sc)
1473 {
1474         return;
1475 }
1476
1477 static void
1478 at91dci_do_poll(struct usb2_bus *bus)
1479 {
1480         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(bus);
1481
1482         USB_BUS_LOCK(&sc->sc_bus);
1483         at91dci_interrupt_poll(sc);
1484         at91dci_root_ctrl_poll(sc);
1485         USB_BUS_UNLOCK(&sc->sc_bus);
1486 }
1487
1488 /*------------------------------------------------------------------------*
1489  * at91dci bulk support
1490  *------------------------------------------------------------------------*/
1491 static void
1492 at91dci_device_bulk_open(struct usb2_xfer *xfer)
1493 {
1494         return;
1495 }
1496
1497 static void
1498 at91dci_device_bulk_close(struct usb2_xfer *xfer)
1499 {
1500         at91dci_device_done(xfer, USB_ERR_CANCELLED);
1501 }
1502
1503 static void
1504 at91dci_device_bulk_enter(struct usb2_xfer *xfer)
1505 {
1506         return;
1507 }
1508
1509 static void
1510 at91dci_device_bulk_start(struct usb2_xfer *xfer)
1511 {
1512         /* setup TDs */
1513         at91dci_setup_standard_chain(xfer);
1514         at91dci_start_standard_chain(xfer);
1515 }
1516
1517 struct usb2_pipe_methods at91dci_device_bulk_methods =
1518 {
1519         .open = at91dci_device_bulk_open,
1520         .close = at91dci_device_bulk_close,
1521         .enter = at91dci_device_bulk_enter,
1522         .start = at91dci_device_bulk_start,
1523         .enter_is_cancelable = 1,
1524         .start_is_cancelable = 1,
1525 };
1526
1527 /*------------------------------------------------------------------------*
1528  * at91dci control support
1529  *------------------------------------------------------------------------*/
1530 static void
1531 at91dci_device_ctrl_open(struct usb2_xfer *xfer)
1532 {
1533         return;
1534 }
1535
1536 static void
1537 at91dci_device_ctrl_close(struct usb2_xfer *xfer)
1538 {
1539         at91dci_device_done(xfer, USB_ERR_CANCELLED);
1540 }
1541
1542 static void
1543 at91dci_device_ctrl_enter(struct usb2_xfer *xfer)
1544 {
1545         return;
1546 }
1547
1548 static void
1549 at91dci_device_ctrl_start(struct usb2_xfer *xfer)
1550 {
1551         /* setup TDs */
1552         at91dci_setup_standard_chain(xfer);
1553         at91dci_start_standard_chain(xfer);
1554 }
1555
1556 struct usb2_pipe_methods at91dci_device_ctrl_methods =
1557 {
1558         .open = at91dci_device_ctrl_open,
1559         .close = at91dci_device_ctrl_close,
1560         .enter = at91dci_device_ctrl_enter,
1561         .start = at91dci_device_ctrl_start,
1562         .enter_is_cancelable = 1,
1563         .start_is_cancelable = 1,
1564 };
1565
1566 /*------------------------------------------------------------------------*
1567  * at91dci interrupt support
1568  *------------------------------------------------------------------------*/
1569 static void
1570 at91dci_device_intr_open(struct usb2_xfer *xfer)
1571 {
1572         return;
1573 }
1574
1575 static void
1576 at91dci_device_intr_close(struct usb2_xfer *xfer)
1577 {
1578         at91dci_device_done(xfer, USB_ERR_CANCELLED);
1579 }
1580
1581 static void
1582 at91dci_device_intr_enter(struct usb2_xfer *xfer)
1583 {
1584         return;
1585 }
1586
1587 static void
1588 at91dci_device_intr_start(struct usb2_xfer *xfer)
1589 {
1590         /* setup TDs */
1591         at91dci_setup_standard_chain(xfer);
1592         at91dci_start_standard_chain(xfer);
1593 }
1594
1595 struct usb2_pipe_methods at91dci_device_intr_methods =
1596 {
1597         .open = at91dci_device_intr_open,
1598         .close = at91dci_device_intr_close,
1599         .enter = at91dci_device_intr_enter,
1600         .start = at91dci_device_intr_start,
1601         .enter_is_cancelable = 1,
1602         .start_is_cancelable = 1,
1603 };
1604
1605 /*------------------------------------------------------------------------*
1606  * at91dci full speed isochronous support
1607  *------------------------------------------------------------------------*/
1608 static void
1609 at91dci_device_isoc_fs_open(struct usb2_xfer *xfer)
1610 {
1611         return;
1612 }
1613
1614 static void
1615 at91dci_device_isoc_fs_close(struct usb2_xfer *xfer)
1616 {
1617         at91dci_device_done(xfer, USB_ERR_CANCELLED);
1618 }
1619
1620 static void
1621 at91dci_device_isoc_fs_enter(struct usb2_xfer *xfer)
1622 {
1623         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1624         uint32_t temp;
1625         uint32_t nframes;
1626
1627         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1628             xfer, xfer->pipe->isoc_next, xfer->nframes);
1629
1630         /* get the current frame index */
1631
1632         nframes = AT91_UDP_READ_4(sc, AT91_UDP_FRM);
1633
1634         /*
1635          * check if the frame index is within the window where the frames
1636          * will be inserted
1637          */
1638         temp = (nframes - xfer->pipe->isoc_next) & AT91_UDP_FRM_MASK;
1639
1640         if ((xfer->pipe->is_synced == 0) ||
1641             (temp < xfer->nframes)) {
1642                 /*
1643                  * If there is data underflow or the pipe queue is
1644                  * empty we schedule the transfer a few frames ahead
1645                  * of the current frame position. Else two isochronous
1646                  * transfers might overlap.
1647                  */
1648                 xfer->pipe->isoc_next = (nframes + 3) & AT91_UDP_FRM_MASK;
1649                 xfer->pipe->is_synced = 1;
1650                 DPRINTFN(3, "start next=%d\n", xfer->pipe->isoc_next);
1651         }
1652         /*
1653          * compute how many milliseconds the insertion is ahead of the
1654          * current frame position:
1655          */
1656         temp = (xfer->pipe->isoc_next - nframes) & AT91_UDP_FRM_MASK;
1657
1658         /*
1659          * pre-compute when the isochronous transfer will be finished:
1660          */
1661         xfer->isoc_time_complete =
1662             usb2_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1663             xfer->nframes;
1664
1665         /* compute frame number for next insertion */
1666         xfer->pipe->isoc_next += xfer->nframes;
1667
1668         /* setup TDs */
1669         at91dci_setup_standard_chain(xfer);
1670 }
1671
1672 static void
1673 at91dci_device_isoc_fs_start(struct usb2_xfer *xfer)
1674 {
1675         /* start TD chain */
1676         at91dci_start_standard_chain(xfer);
1677 }
1678
1679 struct usb2_pipe_methods at91dci_device_isoc_fs_methods =
1680 {
1681         .open = at91dci_device_isoc_fs_open,
1682         .close = at91dci_device_isoc_fs_close,
1683         .enter = at91dci_device_isoc_fs_enter,
1684         .start = at91dci_device_isoc_fs_start,
1685         .enter_is_cancelable = 1,
1686         .start_is_cancelable = 1,
1687 };
1688
1689 /*------------------------------------------------------------------------*
1690  * at91dci root control support
1691  *------------------------------------------------------------------------*
1692  * simulate a hardware HUB by handling
1693  * all the necessary requests
1694  *------------------------------------------------------------------------*/
1695
1696 static void
1697 at91dci_root_ctrl_open(struct usb2_xfer *xfer)
1698 {
1699         return;
1700 }
1701
1702 static void
1703 at91dci_root_ctrl_close(struct usb2_xfer *xfer)
1704 {
1705         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1706
1707         if (sc->sc_root_ctrl.xfer == xfer) {
1708                 sc->sc_root_ctrl.xfer = NULL;
1709         }
1710         at91dci_device_done(xfer, USB_ERR_CANCELLED);
1711 }
1712
1713 /*
1714  * USB descriptors for the virtual Root HUB:
1715  */
1716
1717 static const struct usb2_device_descriptor at91dci_devd = {
1718         .bLength = sizeof(struct usb2_device_descriptor),
1719         .bDescriptorType = UDESC_DEVICE,
1720         .bcdUSB = {0x00, 0x02},
1721         .bDeviceClass = UDCLASS_HUB,
1722         .bDeviceSubClass = UDSUBCLASS_HUB,
1723         .bDeviceProtocol = UDPROTO_HSHUBSTT,
1724         .bMaxPacketSize = 64,
1725         .bcdDevice = {0x00, 0x01},
1726         .iManufacturer = 1,
1727         .iProduct = 2,
1728         .bNumConfigurations = 1,
1729 };
1730
1731 static const struct usb2_device_qualifier at91dci_odevd = {
1732         .bLength = sizeof(struct usb2_device_qualifier),
1733         .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1734         .bcdUSB = {0x00, 0x02},
1735         .bDeviceClass = UDCLASS_HUB,
1736         .bDeviceSubClass = UDSUBCLASS_HUB,
1737         .bDeviceProtocol = UDPROTO_FSHUB,
1738         .bMaxPacketSize0 = 0,
1739         .bNumConfigurations = 0,
1740 };
1741
1742 static const struct at91dci_config_desc at91dci_confd = {
1743         .confd = {
1744                 .bLength = sizeof(struct usb2_config_descriptor),
1745                 .bDescriptorType = UDESC_CONFIG,
1746                 .wTotalLength[0] = sizeof(at91dci_confd),
1747                 .bNumInterface = 1,
1748                 .bConfigurationValue = 1,
1749                 .iConfiguration = 0,
1750                 .bmAttributes = UC_SELF_POWERED,
1751                 .bMaxPower = 0,
1752         },
1753         .ifcd = {
1754                 .bLength = sizeof(struct usb2_interface_descriptor),
1755                 .bDescriptorType = UDESC_INTERFACE,
1756                 .bNumEndpoints = 1,
1757                 .bInterfaceClass = UICLASS_HUB,
1758                 .bInterfaceSubClass = UISUBCLASS_HUB,
1759                 .bInterfaceProtocol = UIPROTO_HSHUBSTT,
1760         },
1761
1762         .endpd = {
1763                 .bLength = sizeof(struct usb2_endpoint_descriptor),
1764                 .bDescriptorType = UDESC_ENDPOINT,
1765                 .bEndpointAddress = (UE_DIR_IN | AT9100_DCI_INTR_ENDPT),
1766                 .bmAttributes = UE_INTERRUPT,
1767                 .wMaxPacketSize[0] = 8,
1768                 .bInterval = 255,
1769         },
1770 };
1771
1772 static const struct usb2_hub_descriptor_min at91dci_hubd = {
1773         .bDescLength = sizeof(at91dci_hubd),
1774         .bDescriptorType = UDESC_HUB,
1775         .bNbrPorts = 1,
1776         .wHubCharacteristics[0] =
1777         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) & 0xFF,
1778         .wHubCharacteristics[1] =
1779         (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL) >> 8,
1780         .bPwrOn2PwrGood = 50,
1781         .bHubContrCurrent = 0,
1782         .DeviceRemovable = {0},         /* port is removable */
1783 };
1784
1785 #define STRING_LANG \
1786   0x09, 0x04,                           /* American English */
1787
1788 #define STRING_VENDOR \
1789   'A', 0, 'T', 0, 'M', 0, 'E', 0, 'L', 0
1790
1791 #define STRING_PRODUCT \
1792   'D', 0, 'C', 0, 'I', 0, ' ', 0, 'R', 0, \
1793   'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
1794   'U', 0, 'B', 0,
1795
1796 USB_MAKE_STRING_DESC(STRING_LANG, at91dci_langtab);
1797 USB_MAKE_STRING_DESC(STRING_VENDOR, at91dci_vendor);
1798 USB_MAKE_STRING_DESC(STRING_PRODUCT, at91dci_product);
1799
1800 static void
1801 at91dci_root_ctrl_enter(struct usb2_xfer *xfer)
1802 {
1803         return;
1804 }
1805
1806 static void
1807 at91dci_root_ctrl_start(struct usb2_xfer *xfer)
1808 {
1809         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1810
1811         sc->sc_root_ctrl.xfer = xfer;
1812
1813         usb2_bus_roothub_exec(xfer->xroot->bus);
1814 }
1815
1816 static void
1817 at91dci_root_ctrl_task(struct usb2_bus *bus)
1818 {
1819         at91dci_root_ctrl_poll(AT9100_DCI_BUS2SC(bus));
1820 }
1821
1822 static void
1823 at91dci_root_ctrl_done(struct usb2_xfer *xfer,
1824     struct usb2_sw_transfer *std)
1825 {
1826         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
1827         uint16_t value;
1828         uint16_t index;
1829         uint8_t use_polling;
1830
1831         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1832
1833         if (std->state != USB_SW_TR_SETUP) {
1834                 if (std->state == USB_SW_TR_PRE_CALLBACK) {
1835                         /* transfer transferred */
1836                         at91dci_device_done(xfer, std->err);
1837                 }
1838                 goto done;
1839         }
1840         /* buffer reset */
1841         std->ptr = USB_ADD_BYTES(&sc->sc_hub_temp, 0);
1842         std->len = 0;
1843
1844         value = UGETW(std->req.wValue);
1845         index = UGETW(std->req.wIndex);
1846
1847         use_polling = mtx_owned(xfer->xroot->xfer_mtx) ? 1 : 0;
1848
1849         /* demultiplex the control request */
1850
1851         switch (std->req.bmRequestType) {
1852         case UT_READ_DEVICE:
1853                 switch (std->req.bRequest) {
1854                 case UR_GET_DESCRIPTOR:
1855                         goto tr_handle_get_descriptor;
1856                 case UR_GET_CONFIG:
1857                         goto tr_handle_get_config;
1858                 case UR_GET_STATUS:
1859                         goto tr_handle_get_status;
1860                 default:
1861                         goto tr_stalled;
1862                 }
1863                 break;
1864
1865         case UT_WRITE_DEVICE:
1866                 switch (std->req.bRequest) {
1867                 case UR_SET_ADDRESS:
1868                         goto tr_handle_set_address;
1869                 case UR_SET_CONFIG:
1870                         goto tr_handle_set_config;
1871                 case UR_CLEAR_FEATURE:
1872                         goto tr_valid;  /* nop */
1873                 case UR_SET_DESCRIPTOR:
1874                         goto tr_valid;  /* nop */
1875                 case UR_SET_FEATURE:
1876                 default:
1877                         goto tr_stalled;
1878                 }
1879                 break;
1880
1881         case UT_WRITE_ENDPOINT:
1882                 switch (std->req.bRequest) {
1883                 case UR_CLEAR_FEATURE:
1884                         switch (UGETW(std->req.wValue)) {
1885                         case UF_ENDPOINT_HALT:
1886                                 goto tr_handle_clear_halt;
1887                         case UF_DEVICE_REMOTE_WAKEUP:
1888                                 goto tr_handle_clear_wakeup;
1889                         default:
1890                                 goto tr_stalled;
1891                         }
1892                         break;
1893                 case UR_SET_FEATURE:
1894                         switch (UGETW(std->req.wValue)) {
1895                         case UF_ENDPOINT_HALT:
1896                                 goto tr_handle_set_halt;
1897                         case UF_DEVICE_REMOTE_WAKEUP:
1898                                 goto tr_handle_set_wakeup;
1899                         default:
1900                                 goto tr_stalled;
1901                         }
1902                         break;
1903                 case UR_SYNCH_FRAME:
1904                         goto tr_valid;  /* nop */
1905                 default:
1906                         goto tr_stalled;
1907                 }
1908                 break;
1909
1910         case UT_READ_ENDPOINT:
1911                 switch (std->req.bRequest) {
1912                 case UR_GET_STATUS:
1913                         goto tr_handle_get_ep_status;
1914                 default:
1915                         goto tr_stalled;
1916                 }
1917                 break;
1918
1919         case UT_WRITE_INTERFACE:
1920                 switch (std->req.bRequest) {
1921                 case UR_SET_INTERFACE:
1922                         goto tr_handle_set_interface;
1923                 case UR_CLEAR_FEATURE:
1924                         goto tr_valid;  /* nop */
1925                 case UR_SET_FEATURE:
1926                 default:
1927                         goto tr_stalled;
1928                 }
1929                 break;
1930
1931         case UT_READ_INTERFACE:
1932                 switch (std->req.bRequest) {
1933                 case UR_GET_INTERFACE:
1934                         goto tr_handle_get_interface;
1935                 case UR_GET_STATUS:
1936                         goto tr_handle_get_iface_status;
1937                 default:
1938                         goto tr_stalled;
1939                 }
1940                 break;
1941
1942         case UT_WRITE_CLASS_INTERFACE:
1943         case UT_WRITE_VENDOR_INTERFACE:
1944                 /* XXX forward */
1945                 break;
1946
1947         case UT_READ_CLASS_INTERFACE:
1948         case UT_READ_VENDOR_INTERFACE:
1949                 /* XXX forward */
1950                 break;
1951
1952         case UT_WRITE_CLASS_DEVICE:
1953                 switch (std->req.bRequest) {
1954                 case UR_CLEAR_FEATURE:
1955                         goto tr_valid;
1956                 case UR_SET_DESCRIPTOR:
1957                 case UR_SET_FEATURE:
1958                         break;
1959                 default:
1960                         goto tr_stalled;
1961                 }
1962                 break;
1963
1964         case UT_WRITE_CLASS_OTHER:
1965                 switch (std->req.bRequest) {
1966                 case UR_CLEAR_FEATURE:
1967                         goto tr_handle_clear_port_feature;
1968                 case UR_SET_FEATURE:
1969                         goto tr_handle_set_port_feature;
1970                 case UR_CLEAR_TT_BUFFER:
1971                 case UR_RESET_TT:
1972                 case UR_STOP_TT:
1973                         goto tr_valid;
1974
1975                 default:
1976                         goto tr_stalled;
1977                 }
1978                 break;
1979
1980         case UT_READ_CLASS_OTHER:
1981                 switch (std->req.bRequest) {
1982                 case UR_GET_TT_STATE:
1983                         goto tr_handle_get_tt_state;
1984                 case UR_GET_STATUS:
1985                         goto tr_handle_get_port_status;
1986                 default:
1987                         goto tr_stalled;
1988                 }
1989                 break;
1990
1991         case UT_READ_CLASS_DEVICE:
1992                 switch (std->req.bRequest) {
1993                 case UR_GET_DESCRIPTOR:
1994                         goto tr_handle_get_class_descriptor;
1995                 case UR_GET_STATUS:
1996                         goto tr_handle_get_class_status;
1997
1998                 default:
1999                         goto tr_stalled;
2000                 }
2001                 break;
2002         default:
2003                 goto tr_stalled;
2004         }
2005         goto tr_valid;
2006
2007 tr_handle_get_descriptor:
2008         switch (value >> 8) {
2009         case UDESC_DEVICE:
2010                 if (value & 0xff) {
2011                         goto tr_stalled;
2012                 }
2013                 std->len = sizeof(at91dci_devd);
2014                 std->ptr = USB_ADD_BYTES(&at91dci_devd, 0);
2015                 goto tr_valid;
2016         case UDESC_CONFIG:
2017                 if (value & 0xff) {
2018                         goto tr_stalled;
2019                 }
2020                 std->len = sizeof(at91dci_confd);
2021                 std->ptr = USB_ADD_BYTES(&at91dci_confd, 0);
2022                 goto tr_valid;
2023         case UDESC_STRING:
2024                 switch (value & 0xff) {
2025                 case 0:         /* Language table */
2026                         std->len = sizeof(at91dci_langtab);
2027                         std->ptr = USB_ADD_BYTES(&at91dci_langtab, 0);
2028                         goto tr_valid;
2029
2030                 case 1:         /* Vendor */
2031                         std->len = sizeof(at91dci_vendor);
2032                         std->ptr = USB_ADD_BYTES(&at91dci_vendor, 0);
2033                         goto tr_valid;
2034
2035                 case 2:         /* Product */
2036                         std->len = sizeof(at91dci_product);
2037                         std->ptr = USB_ADD_BYTES(&at91dci_product, 0);
2038                         goto tr_valid;
2039                 default:
2040                         break;
2041                 }
2042                 break;
2043         default:
2044                 goto tr_stalled;
2045         }
2046         goto tr_stalled;
2047
2048 tr_handle_get_config:
2049         std->len = 1;
2050         sc->sc_hub_temp.wValue[0] = sc->sc_conf;
2051         goto tr_valid;
2052
2053 tr_handle_get_status:
2054         std->len = 2;
2055         USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
2056         goto tr_valid;
2057
2058 tr_handle_set_address:
2059         if (value & 0xFF00) {
2060                 goto tr_stalled;
2061         }
2062         sc->sc_rt_addr = value;
2063         goto tr_valid;
2064
2065 tr_handle_set_config:
2066         if (value >= 2) {
2067                 goto tr_stalled;
2068         }
2069         sc->sc_conf = value;
2070         goto tr_valid;
2071
2072 tr_handle_get_interface:
2073         std->len = 1;
2074         sc->sc_hub_temp.wValue[0] = 0;
2075         goto tr_valid;
2076
2077 tr_handle_get_tt_state:
2078 tr_handle_get_class_status:
2079 tr_handle_get_iface_status:
2080 tr_handle_get_ep_status:
2081         std->len = 2;
2082         USETW(sc->sc_hub_temp.wValue, 0);
2083         goto tr_valid;
2084
2085 tr_handle_set_halt:
2086 tr_handle_set_interface:
2087 tr_handle_set_wakeup:
2088 tr_handle_clear_wakeup:
2089 tr_handle_clear_halt:
2090         goto tr_valid;
2091
2092 tr_handle_clear_port_feature:
2093         if (index != 1) {
2094                 goto tr_stalled;
2095         }
2096         DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
2097
2098         switch (value) {
2099         case UHF_PORT_SUSPEND:
2100                 at91dci_wakeup_peer(xfer);
2101                 break;
2102
2103         case UHF_PORT_ENABLE:
2104                 sc->sc_flags.port_enabled = 0;
2105                 break;
2106
2107         case UHF_PORT_TEST:
2108         case UHF_PORT_INDICATOR:
2109         case UHF_C_PORT_ENABLE:
2110         case UHF_C_PORT_OVER_CURRENT:
2111         case UHF_C_PORT_RESET:
2112                 /* nops */
2113                 break;
2114         case UHF_PORT_POWER:
2115                 sc->sc_flags.port_powered = 0;
2116                 at91dci_pull_down(sc);
2117                 at91dci_clocks_off(sc);
2118                 break;
2119         case UHF_C_PORT_CONNECTION:
2120                 sc->sc_flags.change_connect = 0;
2121                 break;
2122         case UHF_C_PORT_SUSPEND:
2123                 sc->sc_flags.change_suspend = 0;
2124                 break;
2125         default:
2126                 std->err = USB_ERR_IOERROR;
2127                 goto done;
2128         }
2129         goto tr_valid;
2130
2131 tr_handle_set_port_feature:
2132         if (index != 1) {
2133                 goto tr_stalled;
2134         }
2135         DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
2136
2137         switch (value) {
2138         case UHF_PORT_ENABLE:
2139                 sc->sc_flags.port_enabled = 1;
2140                 break;
2141         case UHF_PORT_SUSPEND:
2142         case UHF_PORT_RESET:
2143         case UHF_PORT_TEST:
2144         case UHF_PORT_INDICATOR:
2145                 /* nops */
2146                 break;
2147         case UHF_PORT_POWER:
2148                 sc->sc_flags.port_powered = 1;
2149                 break;
2150         default:
2151                 std->err = USB_ERR_IOERROR;
2152                 goto done;
2153         }
2154         goto tr_valid;
2155
2156 tr_handle_get_port_status:
2157
2158         DPRINTFN(9, "UR_GET_PORT_STATUS\n");
2159
2160         if (index != 1) {
2161                 goto tr_stalled;
2162         }
2163         if (sc->sc_flags.status_vbus) {
2164                 at91dci_clocks_on(sc);
2165                 at91dci_pull_up(sc);
2166         } else {
2167                 at91dci_pull_down(sc);
2168                 at91dci_clocks_off(sc);
2169         }
2170
2171         /* Select FULL-speed and Device Side Mode */
2172
2173         value = UPS_PORT_MODE_DEVICE;
2174
2175         if (sc->sc_flags.port_powered) {
2176                 value |= UPS_PORT_POWER;
2177         }
2178         if (sc->sc_flags.port_enabled) {
2179                 value |= UPS_PORT_ENABLED;
2180         }
2181         if (sc->sc_flags.status_vbus &&
2182             sc->sc_flags.status_bus_reset) {
2183                 value |= UPS_CURRENT_CONNECT_STATUS;
2184         }
2185         if (sc->sc_flags.status_suspend) {
2186                 value |= UPS_SUSPEND;
2187         }
2188         USETW(sc->sc_hub_temp.ps.wPortStatus, value);
2189
2190         value = 0;
2191
2192         if (sc->sc_flags.change_connect) {
2193                 value |= UPS_C_CONNECT_STATUS;
2194
2195                 if (sc->sc_flags.status_vbus &&
2196                     sc->sc_flags.status_bus_reset) {
2197                         /* reset endpoint flags */
2198                         bzero(sc->sc_ep_flags, sizeof(sc->sc_ep_flags));
2199                 }
2200         }
2201         if (sc->sc_flags.change_suspend) {
2202                 value |= UPS_C_SUSPEND;
2203         }
2204         USETW(sc->sc_hub_temp.ps.wPortChange, value);
2205         std->len = sizeof(sc->sc_hub_temp.ps);
2206         goto tr_valid;
2207
2208 tr_handle_get_class_descriptor:
2209         if (value & 0xFF) {
2210                 goto tr_stalled;
2211         }
2212         std->ptr = USB_ADD_BYTES(&at91dci_hubd, 0);
2213         std->len = sizeof(at91dci_hubd);
2214         goto tr_valid;
2215
2216 tr_stalled:
2217         std->err = USB_ERR_STALLED;
2218 tr_valid:
2219 done:
2220         return;
2221 }
2222
2223 static void
2224 at91dci_root_ctrl_poll(struct at91dci_softc *sc)
2225 {
2226         usb2_sw_transfer(&sc->sc_root_ctrl,
2227             &at91dci_root_ctrl_done);
2228 }
2229
2230 struct usb2_pipe_methods at91dci_root_ctrl_methods =
2231 {
2232         .open = at91dci_root_ctrl_open,
2233         .close = at91dci_root_ctrl_close,
2234         .enter = at91dci_root_ctrl_enter,
2235         .start = at91dci_root_ctrl_start,
2236         .enter_is_cancelable = 1,
2237         .start_is_cancelable = 0,
2238 };
2239
2240 /*------------------------------------------------------------------------*
2241  * at91dci root interrupt support
2242  *------------------------------------------------------------------------*/
2243 static void
2244 at91dci_root_intr_open(struct usb2_xfer *xfer)
2245 {
2246         return;
2247 }
2248
2249 static void
2250 at91dci_root_intr_close(struct usb2_xfer *xfer)
2251 {
2252         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
2253
2254         if (sc->sc_root_intr.xfer == xfer) {
2255                 sc->sc_root_intr.xfer = NULL;
2256         }
2257         at91dci_device_done(xfer, USB_ERR_CANCELLED);
2258 }
2259
2260 static void
2261 at91dci_root_intr_enter(struct usb2_xfer *xfer)
2262 {
2263         return;
2264 }
2265
2266 static void
2267 at91dci_root_intr_start(struct usb2_xfer *xfer)
2268 {
2269         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(xfer->xroot->bus);
2270
2271         sc->sc_root_intr.xfer = xfer;
2272 }
2273
2274 struct usb2_pipe_methods at91dci_root_intr_methods =
2275 {
2276         .open = at91dci_root_intr_open,
2277         .close = at91dci_root_intr_close,
2278         .enter = at91dci_root_intr_enter,
2279         .start = at91dci_root_intr_start,
2280         .enter_is_cancelable = 1,
2281         .start_is_cancelable = 1,
2282 };
2283
2284 static void
2285 at91dci_xfer_setup(struct usb2_setup_params *parm)
2286 {
2287         const struct usb2_hw_ep_profile *pf;
2288         struct at91dci_softc *sc;
2289         struct usb2_xfer *xfer;
2290         void *last_obj;
2291         uint32_t ntd;
2292         uint32_t n;
2293         uint8_t ep_no;
2294
2295         sc = AT9100_DCI_BUS2SC(parm->udev->bus);
2296         xfer = parm->curr_xfer;
2297
2298         /*
2299          * NOTE: This driver does not use any of the parameters that
2300          * are computed from the following values. Just set some
2301          * reasonable dummies:
2302          */
2303         parm->hc_max_packet_size = 0x500;
2304         parm->hc_max_packet_count = 1;
2305         parm->hc_max_frame_size = 0x500;
2306
2307         usb2_transfer_setup_sub(parm);
2308
2309         /*
2310          * compute maximum number of TDs
2311          */
2312         if (parm->methods == &at91dci_device_ctrl_methods) {
2313
2314                 ntd = xfer->nframes + 1 /* STATUS */ + 1        /* SYNC 1 */
2315                     + 1 /* SYNC 2 */ ;
2316
2317         } else if (parm->methods == &at91dci_device_bulk_methods) {
2318
2319                 ntd = xfer->nframes + 1 /* SYNC */ ;
2320
2321         } else if (parm->methods == &at91dci_device_intr_methods) {
2322
2323                 ntd = xfer->nframes + 1 /* SYNC */ ;
2324
2325         } else if (parm->methods == &at91dci_device_isoc_fs_methods) {
2326
2327                 ntd = xfer->nframes + 1 /* SYNC */ ;
2328
2329         } else {
2330
2331                 ntd = 0;
2332         }
2333
2334         /*
2335          * check if "usb2_transfer_setup_sub" set an error
2336          */
2337         if (parm->err) {
2338                 return;
2339         }
2340         /*
2341          * allocate transfer descriptors
2342          */
2343         last_obj = NULL;
2344
2345         /*
2346          * get profile stuff
2347          */
2348         if (ntd) {
2349
2350                 ep_no = xfer->endpoint & UE_ADDR;
2351                 at91dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2352
2353                 if (pf == NULL) {
2354                         /* should not happen */
2355                         parm->err = USB_ERR_INVAL;
2356                         return;
2357                 }
2358         } else {
2359                 ep_no = 0;
2360                 pf = NULL;
2361         }
2362
2363         /* align data */
2364         parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2365
2366         for (n = 0; n != ntd; n++) {
2367
2368                 struct at91dci_td *td;
2369
2370                 if (parm->buf) {
2371
2372                         td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2373
2374                         /* init TD */
2375                         td->io_tag = sc->sc_io_tag;
2376                         td->io_hdl = sc->sc_io_hdl;
2377                         td->max_packet_size = xfer->max_packet_size;
2378                         td->status_reg = AT91_UDP_CSR(ep_no);
2379                         td->fifo_reg = AT91_UDP_FDR(ep_no);
2380                         if (pf->support_multi_buffer) {
2381                                 td->support_multi_buffer = 1;
2382                         }
2383                         td->obj_next = last_obj;
2384
2385                         last_obj = td;
2386                 }
2387                 parm->size[0] += sizeof(*td);
2388         }
2389
2390         xfer->td_start[0] = last_obj;
2391 }
2392
2393 static void
2394 at91dci_xfer_unsetup(struct usb2_xfer *xfer)
2395 {
2396         return;
2397 }
2398
2399 static void
2400 at91dci_pipe_init(struct usb2_device *udev, struct usb2_endpoint_descriptor *edesc,
2401     struct usb2_pipe *pipe)
2402 {
2403         struct at91dci_softc *sc = AT9100_DCI_BUS2SC(udev->bus);
2404
2405         DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2406             pipe, udev->address,
2407             edesc->bEndpointAddress, udev->flags.usb2_mode,
2408             sc->sc_rt_addr);
2409
2410         if (udev->device_index == sc->sc_rt_addr) {
2411
2412                 if (udev->flags.usb2_mode != USB_MODE_HOST) {
2413                         /* not supported */
2414                         return;
2415                 }
2416                 switch (edesc->bEndpointAddress) {
2417                 case USB_CONTROL_ENDPOINT:
2418                         pipe->methods = &at91dci_root_ctrl_methods;
2419                         break;
2420                 case UE_DIR_IN | AT9100_DCI_INTR_ENDPT:
2421                         pipe->methods = &at91dci_root_intr_methods;
2422                         break;
2423                 default:
2424                         /* do nothing */
2425                         break;
2426                 }
2427         } else {
2428
2429                 if (udev->flags.usb2_mode != USB_MODE_DEVICE) {
2430                         /* not supported */
2431                         return;
2432                 }
2433                 if (udev->speed != USB_SPEED_FULL) {
2434                         /* not supported */
2435                         return;
2436                 }
2437                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2438                 case UE_CONTROL:
2439                         pipe->methods = &at91dci_device_ctrl_methods;
2440                         break;
2441                 case UE_INTERRUPT:
2442                         pipe->methods = &at91dci_device_intr_methods;
2443                         break;
2444                 case UE_ISOCHRONOUS:
2445                         pipe->methods = &at91dci_device_isoc_fs_methods;
2446                         break;
2447                 case UE_BULK:
2448                         pipe->methods = &at91dci_device_bulk_methods;
2449                         break;
2450                 default:
2451                         /* do nothing */
2452                         break;
2453                 }
2454         }
2455 }
2456
2457 struct usb2_bus_methods at91dci_bus_methods =
2458 {
2459         .pipe_init = &at91dci_pipe_init,
2460         .xfer_setup = &at91dci_xfer_setup,
2461         .xfer_unsetup = &at91dci_xfer_unsetup,
2462         .do_poll = &at91dci_do_poll,
2463         .get_hw_ep_profile = &at91dci_get_hw_ep_profile,
2464         .set_stall = &at91dci_set_stall,
2465         .clear_stall = &at91dci_clear_stall,
2466         .roothub_exec = &at91dci_root_ctrl_task,
2467 };