sys/dev/usb/controller/avr32dci.c

   1 /* $FreeBSD$ */
   2 /*-
   3  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   4  *
   5  * Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * This file contains the driver for the AVR32 series USB Device
  31  * Controller
  32  */
  33
  34 /*
  35  * NOTE: When the chip detects BUS-reset it will also reset the
  36  * endpoints, Function-address and more.
  37  */
  38 #ifdef USB_GLOBAL_INCLUDE_FILE
  39 #include USB_GLOBAL_INCLUDE_FILE
  40 #else
  41 #include <sys/stdint.h>
  42 #include <sys/stddef.h>
  43 #include <sys/param.h>
  44 #include <sys/queue.h>
  45 #include <sys/types.h>
  46 #include <sys/systm.h>
  47 #include <sys/kernel.h>
  48 #include <sys/bus.h>
  49 #include <sys/module.h>
  50 #include <sys/lock.h>
  51 #include <sys/mutex.h>
  52 #include <sys/condvar.h>
  53 #include <sys/sysctl.h>
  54 #include <sys/sx.h>
  55 #include <sys/unistd.h>
  56 #include <sys/callout.h>
  57 #include <sys/malloc.h>
  58 #include <sys/priv.h>
  59
  60 #include <dev/usb/usb.h>
  61 #include <dev/usb/usbdi.h>
  62
  63 #define USB_DEBUG_VAR avr32dci_debug
  64
  65 #include <dev/usb/usb_core.h>
  66 #include <dev/usb/usb_debug.h>
  67 #include <dev/usb/usb_busdma.h>
  68 #include <dev/usb/usb_process.h>
  69 #include <dev/usb/usb_transfer.h>
  70 #include <dev/usb/usb_device.h>
  71 #include <dev/usb/usb_hub.h>
  72 #include <dev/usb/usb_util.h>
  73
  74 #include <dev/usb/usb_controller.h>
  75 #include <dev/usb/usb_bus.h>
  76 #endif                  /* USB_GLOBAL_INCLUDE_FILE */
  77
  78 #include <dev/usb/controller/avr32dci.h>
  79
  80 #define AVR32_BUS2SC(bus) \
  81    ((struct avr32dci_softc *)(((uint8_t *)(bus)) - \
  82     ((uint8_t *)&(((struct avr32dci_softc *)0)->sc_bus))))
  83
  84 #define AVR32_PC2SC(pc) \
  85    AVR32_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
  86
  87 #ifdef USB_DEBUG
  88 static int avr32dci_debug = 0;
  89
  90 static SYSCTL_NODE(_hw_usb, OID_AUTO, avr32dci, CTLFLAG_RW, 0, "USB AVR32 DCI");
  91 SYSCTL_INT(_hw_usb_avr32dci, OID_AUTO, debug, CTLFLAG_RWTUN,
  92     &avr32dci_debug, 0, "AVR32 DCI debug level");
  93 #endif
  94
  95 #define AVR32_INTR_ENDPT 1
  96
  97 /* prototypes */
  98
  99 static const struct usb_bus_methods avr32dci_bus_methods;
 100 static const struct usb_pipe_methods avr32dci_device_non_isoc_methods;
 101 static const struct usb_pipe_methods avr32dci_device_isoc_fs_methods;
 102
 103 static avr32dci_cmd_t avr32dci_setup_rx;
 104 static avr32dci_cmd_t avr32dci_data_rx;
 105 static avr32dci_cmd_t avr32dci_data_tx;
 106 static avr32dci_cmd_t avr32dci_data_tx_sync;
 107 static void avr32dci_device_done(struct usb_xfer *, usb_error_t);
 108 static void avr32dci_do_poll(struct usb_bus *);
 109 static void avr32dci_standard_done(struct usb_xfer *);
 110 static void avr32dci_root_intr(struct avr32dci_softc *sc);
 111
 112 /*
 113  * Here is a list of what the chip supports:
 114  */
 115 static const struct usb_hw_ep_profile
 116         avr32dci_ep_profile[4] = {
 117
 118         [0] = {
 119                 .max_in_frame_size = 64,
 120                 .max_out_frame_size = 64,
 121                 .is_simplex = 1,
 122                 .support_control = 1,
 123         },
 124
 125         [1] = {
 126                 .max_in_frame_size = 512,
 127                 .max_out_frame_size = 512,
 128                 .is_simplex = 1,
 129                 .support_bulk = 1,
 130                 .support_interrupt = 1,
 131                 .support_isochronous = 1,
 132                 .support_in = 1,
 133                 .support_out = 1,
 134         },
 135
 136         [2] = {
 137                 .max_in_frame_size = 64,
 138                 .max_out_frame_size = 64,
 139                 .is_simplex = 1,
 140                 .support_bulk = 1,
 141                 .support_interrupt = 1,
 142                 .support_in = 1,
 143                 .support_out = 1,
 144         },
 145
 146         [3] = {
 147                 .max_in_frame_size = 1024,
 148                 .max_out_frame_size = 1024,
 149                 .is_simplex = 1,
 150                 .support_bulk = 1,
 151                 .support_interrupt = 1,
 152                 .support_isochronous = 1,
 153                 .support_in = 1,
 154                 .support_out = 1,
 155         },
 156 };
 157
 158 static void
 159 avr32dci_get_hw_ep_profile(struct usb_device *udev,
 160     const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
 161 {
 162         if (ep_addr == 0)
 163                 *ppf = avr32dci_ep_profile;
 164         else if (ep_addr < 3)
 165                 *ppf = avr32dci_ep_profile + 1;
 166         else if (ep_addr < 5)
 167                 *ppf = avr32dci_ep_profile + 2;
 168         else if (ep_addr < 7)
 169                 *ppf = avr32dci_ep_profile + 3;
 170         else
 171                 *ppf = NULL;
 172 }
 173
 174 static void
 175 avr32dci_mod_ctrl(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
 176 {
 177         uint32_t temp;
 178
 179         temp = AVR32_READ_4(sc, AVR32_CTRL);
 180         temp |= set;
 181         temp &= ~clear;
 182         AVR32_WRITE_4(sc, AVR32_CTRL, temp);
 183 }
 184
 185 static void
 186 avr32dci_mod_ien(struct avr32dci_softc *sc, uint32_t set, uint32_t clear)
 187 {
 188         uint32_t temp;
 189
 190         temp = AVR32_READ_4(sc, AVR32_IEN);
 191         temp |= set;
 192         temp &= ~clear;
 193         AVR32_WRITE_4(sc, AVR32_IEN, temp);
 194 }
 195
 196 static void
 197 avr32dci_clocks_on(struct avr32dci_softc *sc)
 198 {
 199         if (sc->sc_flags.clocks_off &&
 200             sc->sc_flags.port_powered) {
 201
 202                 DPRINTFN(5, "\n");
 203
 204                 /* turn on clocks */
 205                 (sc->sc_clocks_on) (&sc->sc_bus);
 206
 207                 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_EN_USBA, 0);
 208
 209                 sc->sc_flags.clocks_off = 0;
 210         }
 211 }
 212
 213 static void
 214 avr32dci_clocks_off(struct avr32dci_softc *sc)
 215 {
 216         if (!sc->sc_flags.clocks_off) {
 217
 218                 DPRINTFN(5, "\n");
 219
 220                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_EN_USBA);
 221
 222                 /* turn clocks off */
 223                 (sc->sc_clocks_off) (&sc->sc_bus);
 224
 225                 sc->sc_flags.clocks_off = 1;
 226         }
 227 }
 228
 229 static void
 230 avr32dci_pull_up(struct avr32dci_softc *sc)
 231 {
 232         /* pullup D+, if possible */
 233
 234         if (!sc->sc_flags.d_pulled_up &&
 235             sc->sc_flags.port_powered) {
 236                 sc->sc_flags.d_pulled_up = 1;
 237                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_DETACH);
 238         }
 239 }
 240
 241 static void
 242 avr32dci_pull_down(struct avr32dci_softc *sc)
 243 {
 244         /* pulldown D+, if possible */
 245
 246         if (sc->sc_flags.d_pulled_up) {
 247                 sc->sc_flags.d_pulled_up = 0;
 248                 avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_DETACH, 0);
 249         }
 250 }
 251
 252 static void
 253 avr32dci_wakeup_peer(struct avr32dci_softc *sc)
 254 {
 255         if (!sc->sc_flags.status_suspend) {
 256                 return;
 257         }
 258         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_REWAKEUP, 0);
 259
 260         /* wait 8 milliseconds */
 261         /* Wait for reset to complete. */
 262         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 125);
 263
 264         /* hardware should have cleared RMWKUP bit */
 265 }
 266
 267 static void
 268 avr32dci_set_address(struct avr32dci_softc *sc, uint8_t addr)
 269 {
 270         DPRINTFN(5, "addr=%d\n", addr);
 271
 272         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_FADDR_EN | addr, 0);
 273 }
 274
 275 static uint8_t
 276 avr32dci_setup_rx(struct avr32dci_td *td)
 277 {
 278         struct avr32dci_softc *sc;
 279         struct usb_device_request req;
 280         uint16_t count;
 281         uint32_t temp;
 282
 283         /* get pointer to softc */
 284         sc = AVR32_PC2SC(td->pc);
 285
 286         /* check endpoint status */
 287         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 288
 289         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 290
 291         if (!(temp & AVR32_EPTSTA_RX_SETUP)) {
 292                 goto not_complete;
 293         }
 294         /* clear did stall */
 295         td->did_stall = 0;
 296         /* get the packet byte count */
 297         count = AVR32_EPTSTA_BYTE_COUNT(temp);
 298
 299         /* verify data length */
 300         if (count != td->remainder) {
 301                 DPRINTFN(0, "Invalid SETUP packet "
 302                     "length, %d bytes\n", count);
 303                 goto not_complete;
 304         }
 305         if (count != sizeof(req)) {
 306                 DPRINTFN(0, "Unsupported SETUP packet "
 307                     "length, %d bytes\n", count);
 308                 goto not_complete;
 309         }
 310         /* receive data */
 311         memcpy(&req, sc->physdata, sizeof(req));
 312
 313         /* copy data into real buffer */
 314         usbd_copy_in(td->pc, 0, &req, sizeof(req));
 315
 316         td->offset = sizeof(req);
 317         td->remainder = 0;
 318
 319         /* sneak peek the set address */
 320         if ((req.bmRequestType == UT_WRITE_DEVICE) &&
 321             (req.bRequest == UR_SET_ADDRESS)) {
 322                 sc->sc_dv_addr = req.wValue[0] & 0x7F;
 323                 /* must write address before ZLP */
 324                 avr32dci_mod_ctrl(sc, 0, AVR32_CTRL_DEV_FADDR_EN |
 325                     AVR32_CTRL_DEV_ADDR);
 326                 avr32dci_mod_ctrl(sc, sc->sc_dv_addr, 0);
 327         } else {
 328                 sc->sc_dv_addr = 0xFF;
 329         }
 330
 331         /* clear SETUP packet interrupt */
 332         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_SETUP);
 333         return (0);                     /* complete */
 334
 335 not_complete:
 336         if (temp & AVR32_EPTSTA_RX_SETUP) {
 337                 /* clear SETUP packet interrupt */
 338                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_SETUP);
 339         }
 340         /* abort any ongoing transfer */
 341         if (!td->did_stall) {
 342                 DPRINTFN(5, "stalling\n");
 343                 AVR32_WRITE_4(sc, AVR32_EPTSETSTA(td->ep_no),
 344                     AVR32_EPTSTA_FRCESTALL);
 345                 td->did_stall = 1;
 346         }
 347         return (1);                     /* not complete */
 348 }
 349
 350 static uint8_t
 351 avr32dci_data_rx(struct avr32dci_td *td)
 352 {
 353         struct avr32dci_softc *sc;
 354         struct usb_page_search buf_res;
 355         uint16_t count;
 356         uint32_t temp;
 357         uint8_t to;
 358         uint8_t got_short;
 359
 360         to = 4;                         /* don't loop forever! */
 361         got_short = 0;
 362
 363         /* get pointer to softc */
 364         sc = AVR32_PC2SC(td->pc);
 365
 366 repeat:
 367         /* check if any of the FIFO banks have data */
 368         /* check endpoint status */
 369         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 370
 371         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 372
 373         if (temp & AVR32_EPTSTA_RX_SETUP) {
 374                 if (td->remainder == 0) {
 375                         /*
 376                          * We are actually complete and have
 377                          * received the next SETUP
 378                          */
 379                         DPRINTFN(5, "faking complete\n");
 380                         return (0);     /* complete */
 381                 }
 382                 /*
 383                  * USB Host Aborted the transfer.
 384                  */
 385                 td->error = 1;
 386                 return (0);             /* complete */
 387         }
 388         /* check status */
 389         if (!(temp & AVR32_EPTSTA_RX_BK_RDY)) {
 390                 /* no data */
 391                 goto not_complete;
 392         }
 393         /* get the packet byte count */
 394         count = AVR32_EPTSTA_BYTE_COUNT(temp);
 395
 396         /* verify the packet byte count */
 397         if (count != td->max_packet_size) {
 398                 if (count < td->max_packet_size) {
 399                         /* we have a short packet */
 400                         td->short_pkt = 1;
 401                         got_short = 1;
 402                 } else {
 403                         /* invalid USB packet */
 404                         td->error = 1;
 405                         return (0);     /* we are complete */
 406                 }
 407         }
 408         /* verify the packet byte count */
 409         if (count > td->remainder) {
 410                 /* invalid USB packet */
 411                 td->error = 1;
 412                 return (0);             /* we are complete */
 413         }
 414         while (count > 0) {
 415                 usbd_get_page(td->pc, td->offset, &buf_res);
 416
 417                 /* get correct length */
 418                 if (buf_res.length > count) {
 419                         buf_res.length = count;
 420                 }
 421                 /* receive data */
 422                 memcpy(buf_res.buffer, sc->physdata +
 423                     (AVR32_EPTSTA_CURRENT_BANK(temp) << td->bank_shift) +
 424                     (td->ep_no << 16) + (td->offset % td->max_packet_size), buf_res.length);
 425                 /* update counters */
 426                 count -= buf_res.length;
 427                 td->offset += buf_res.length;
 428                 td->remainder -= buf_res.length;
 429         }
 430
 431         /* clear OUT packet interrupt */
 432         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(td->ep_no), AVR32_EPTSTA_RX_BK_RDY);
 433
 434         /* check if we are complete */
 435         if ((td->remainder == 0) || got_short) {
 436                 if (td->short_pkt) {
 437                         /* we are complete */
 438                         return (0);
 439                 }
 440                 /* else need to receive a zero length packet */
 441         }
 442         if (--to) {
 443                 goto repeat;
 444         }
 445 not_complete:
 446         return (1);                     /* not complete */
 447 }
 448
 449 static uint8_t
 450 avr32dci_data_tx(struct avr32dci_td *td)
 451 {
 452         struct avr32dci_softc *sc;
 453         struct usb_page_search buf_res;
 454         uint16_t count;
 455         uint8_t to;
 456         uint32_t temp;
 457
 458         to = 4;                         /* don't loop forever! */
 459
 460         /* get pointer to softc */
 461         sc = AVR32_PC2SC(td->pc);
 462
 463 repeat:
 464
 465         /* check endpoint status */
 466         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 467
 468         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 469
 470         if (temp & AVR32_EPTSTA_RX_SETUP) {
 471                 /*
 472                  * The current transfer was aborted
 473                  * by the USB Host
 474                  */
 475                 td->error = 1;
 476                 return (0);             /* complete */
 477         }
 478         if (temp & AVR32_EPTSTA_TX_PK_RDY) {
 479                 /* cannot write any data - all banks are busy */
 480                 goto not_complete;
 481         }
 482         count = td->max_packet_size;
 483         if (td->remainder < count) {
 484                 /* we have a short packet */
 485                 td->short_pkt = 1;
 486                 count = td->remainder;
 487         }
 488         while (count > 0) {
 489
 490                 usbd_get_page(td->pc, td->offset, &buf_res);
 491
 492                 /* get correct length */
 493                 if (buf_res.length > count) {
 494                         buf_res.length = count;
 495                 }
 496                 /* transmit data */
 497                 memcpy(sc->physdata +
 498                     (AVR32_EPTSTA_CURRENT_BANK(temp) << td->bank_shift) +
 499                     (td->ep_no << 16) + (td->offset % td->max_packet_size),
 500                     buf_res.buffer, buf_res.length);
 501                 /* update counters */
 502                 count -= buf_res.length;
 503                 td->offset += buf_res.length;
 504                 td->remainder -= buf_res.length;
 505         }
 506
 507         /* allocate FIFO bank */
 508         AVR32_WRITE_4(sc, AVR32_EPTCTL(td->ep_no), AVR32_EPTCTL_TX_PK_RDY);
 509
 510         /* check remainder */
 511         if (td->remainder == 0) {
 512                 if (td->short_pkt) {
 513                         return (0);     /* complete */
 514                 }
 515                 /* else we need to transmit a short packet */
 516         }
 517         if (--to) {
 518                 goto repeat;
 519         }
 520 not_complete:
 521         return (1);                     /* not complete */
 522 }
 523
 524 static uint8_t
 525 avr32dci_data_tx_sync(struct avr32dci_td *td)
 526 {
 527         struct avr32dci_softc *sc;
 528         uint32_t temp;
 529
 530         /* get pointer to softc */
 531         sc = AVR32_PC2SC(td->pc);
 532
 533         /* check endpoint status */
 534         temp = AVR32_READ_4(sc, AVR32_EPTSTA(td->ep_no));
 535
 536         DPRINTFN(5, "EPTSTA(%u)=0x%08x\n", td->ep_no, temp);
 537
 538         if (temp & AVR32_EPTSTA_RX_SETUP) {
 539                 DPRINTFN(5, "faking complete\n");
 540                 /* Race condition */
 541                 return (0);             /* complete */
 542         }
 543         /*
 544          * The control endpoint has only got one bank, so if that bank
 545          * is free the packet has been transferred!
 546          */
 547         if (AVR32_EPTSTA_BUSY_BANK_STA(temp) != 0) {
 548                 /* cannot write any data - a bank is busy */
 549                 goto not_complete;
 550         }
 551         if (sc->sc_dv_addr != 0xFF) {
 552                 /* set new address */
 553                 avr32dci_set_address(sc, sc->sc_dv_addr);
 554         }
 555         return (0);                     /* complete */
 556
 557 not_complete:
 558         return (1);                     /* not complete */
 559 }
 560
 561 static uint8_t
 562 avr32dci_xfer_do_fifo(struct usb_xfer *xfer)
 563 {
 564         struct avr32dci_td *td;
 565
 566         DPRINTFN(9, "\n");
 567
 568         td = xfer->td_transfer_cache;
 569         while (1) {
 570                 if ((td->func) (td)) {
 571                         /* operation in progress */
 572                         break;
 573                 }
 574                 if (((void *)td) == xfer->td_transfer_last) {
 575                         goto done;
 576                 }
 577                 if (td->error) {
 578                         goto done;
 579                 } else if (td->remainder > 0) {
 580                         /*
 581                          * We had a short transfer. If there is no alternate
 582                          * next, stop processing !
 583                          */
 584                         if (!td->alt_next) {
 585                                 goto done;
 586                         }
 587                 }
 588                 /*
 589                  * Fetch the next transfer descriptor and transfer
 590                  * some flags to the next transfer descriptor
 591                  */
 592                 td = td->obj_next;
 593                 xfer->td_transfer_cache = td;
 594         }
 595         return (1);                     /* not complete */
 596
 597 done:
 598         /* compute all actual lengths */
 599
 600         avr32dci_standard_done(xfer);
 601         return (0);                     /* complete */
 602 }
 603
 604 static void
 605 avr32dci_interrupt_poll(struct avr32dci_softc *sc)
 606 {
 607         struct usb_xfer *xfer;
 608
 609 repeat:
 610         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
 611                 if (!avr32dci_xfer_do_fifo(xfer)) {
 612                         /* queue has been modified */
 613                         goto repeat;
 614                 }
 615         }
 616 }
 617
 618 void
 619 avr32dci_vbus_interrupt(struct avr32dci_softc *sc, uint8_t is_on)
 620 {
 621         DPRINTFN(5, "vbus = %u\n", is_on);
 622
 623         if (is_on) {
 624                 if (!sc->sc_flags.status_vbus) {
 625                         sc->sc_flags.status_vbus = 1;
 626
 627                         /* complete root HUB interrupt endpoint */
 628
 629                         avr32dci_root_intr(sc);
 630                 }
 631         } else {
 632                 if (sc->sc_flags.status_vbus) {
 633                         sc->sc_flags.status_vbus = 0;
 634                         sc->sc_flags.status_bus_reset = 0;
 635                         sc->sc_flags.status_suspend = 0;
 636                         sc->sc_flags.change_suspend = 0;
 637                         sc->sc_flags.change_connect = 1;
 638
 639                         /* complete root HUB interrupt endpoint */
 640
 641                         avr32dci_root_intr(sc);
 642                 }
 643         }
 644 }
 645
 646 void
 647 avr32dci_interrupt(struct avr32dci_softc *sc)
 648 {
 649         uint32_t status;
 650
 651         USB_BUS_LOCK(&sc->sc_bus);
 652
 653         /* read interrupt status */
 654         status = AVR32_READ_4(sc, AVR32_INTSTA);
 655
 656         /* clear all set interrupts */
 657         AVR32_WRITE_4(sc, AVR32_CLRINT, status);
 658
 659         DPRINTFN(14, "INTSTA=0x%08x\n", status);
 660
 661         /* check for any bus state change interrupts */
 662         if (status & AVR32_INT_ENDRESET) {
 663
 664                 DPRINTFN(5, "end of reset\n");
 665
 666                 /* set correct state */
 667                 sc->sc_flags.status_bus_reset = 1;
 668                 sc->sc_flags.status_suspend = 0;
 669                 sc->sc_flags.change_suspend = 0;
 670                 sc->sc_flags.change_connect = 1;
 671
 672                 /* disable resume interrupt */
 673                 avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
 674                     AVR32_INT_ENDRESET, AVR32_INT_WAKE_UP);
 675
 676                 /* complete root HUB interrupt endpoint */
 677                 avr32dci_root_intr(sc);
 678         }
 679         /*
 680          * If resume and suspend is set at the same time we interpret
 681          * that like RESUME. Resume is set when there is at least 3
 682          * milliseconds of inactivity on the USB BUS.
 683          */
 684         if (status & AVR32_INT_WAKE_UP) {
 685
 686                 DPRINTFN(5, "resume interrupt\n");
 687
 688                 if (sc->sc_flags.status_suspend) {
 689                         /* update status bits */
 690                         sc->sc_flags.status_suspend = 0;
 691                         sc->sc_flags.change_suspend = 1;
 692
 693                         /* disable resume interrupt */
 694                         avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
 695                             AVR32_INT_ENDRESET, AVR32_INT_WAKE_UP);
 696
 697                         /* complete root HUB interrupt endpoint */
 698                         avr32dci_root_intr(sc);
 699                 }
 700         } else if (status & AVR32_INT_DET_SUSPD) {
 701
 702                 DPRINTFN(5, "suspend interrupt\n");
 703
 704                 if (!sc->sc_flags.status_suspend) {
 705                         /* update status bits */
 706                         sc->sc_flags.status_suspend = 1;
 707                         sc->sc_flags.change_suspend = 1;
 708
 709                         /* disable suspend interrupt */
 710                         avr32dci_mod_ien(sc, AVR32_INT_WAKE_UP |
 711                             AVR32_INT_ENDRESET, AVR32_INT_DET_SUSPD);
 712
 713                         /* complete root HUB interrupt endpoint */
 714                         avr32dci_root_intr(sc);
 715                 }
 716         }
 717         /* check for any endpoint interrupts */
 718         if (status & -AVR32_INT_EPT_INT(0)) {
 719
 720                 DPRINTFN(5, "real endpoint interrupt\n");
 721
 722                 avr32dci_interrupt_poll(sc);
 723         }
 724         USB_BUS_UNLOCK(&sc->sc_bus);
 725 }
 726
 727 static void
 728 avr32dci_setup_standard_chain_sub(struct avr32dci_std_temp *temp)
 729 {
 730         struct avr32dci_td *td;
 731
 732         /* get current Transfer Descriptor */
 733         td = temp->td_next;
 734         temp->td = td;
 735
 736         /* prepare for next TD */
 737         temp->td_next = td->obj_next;
 738
 739         /* fill out the Transfer Descriptor */
 740         td->func = temp->func;
 741         td->pc = temp->pc;
 742         td->offset = temp->offset;
 743         td->remainder = temp->len;
 744         td->error = 0;
 745         td->did_stall = temp->did_stall;
 746         td->short_pkt = temp->short_pkt;
 747         td->alt_next = temp->setup_alt_next;
 748 }
 749
 750 static void
 751 avr32dci_setup_standard_chain(struct usb_xfer *xfer)
 752 {
 753         struct avr32dci_std_temp temp;
 754         struct avr32dci_softc *sc;
 755         struct avr32dci_td *td;
 756         uint32_t x;
 757         uint8_t ep_no;
 758         uint8_t need_sync;
 759
 760         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
 761             xfer->address, UE_GET_ADDR(xfer->endpointno),
 762             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
 763
 764         temp.max_frame_size = xfer->max_frame_size;
 765
 766         td = xfer->td_start[0];
 767         xfer->td_transfer_first = td;
 768         xfer->td_transfer_cache = td;
 769
 770         /* setup temp */
 771
 772         temp.pc = NULL;
 773         temp.td = NULL;
 774         temp.td_next = xfer->td_start[0];
 775         temp.offset = 0;
 776         temp.setup_alt_next = xfer->flags_int.short_frames_ok ||
 777             xfer->flags_int.isochronous_xfr;
 778         temp.did_stall = !xfer->flags_int.control_stall;
 779
 780         sc = AVR32_BUS2SC(xfer->xroot->bus);
 781         ep_no = (xfer->endpointno & UE_ADDR);
 782
 783         /* check if we should prepend a setup message */
 784
 785         if (xfer->flags_int.control_xfr) {
 786                 if (xfer->flags_int.control_hdr) {
 787
 788                         temp.func = &avr32dci_setup_rx;
 789                         temp.len = xfer->frlengths[0];
 790                         temp.pc = xfer->frbuffers + 0;
 791                         temp.short_pkt = temp.len ? 1 : 0;
 792                         /* check for last frame */
 793                         if (xfer->nframes == 1) {
 794                                 /* no STATUS stage yet, SETUP is last */
 795                                 if (xfer->flags_int.control_act)
 796                                         temp.setup_alt_next = 0;
 797                         }
 798                         avr32dci_setup_standard_chain_sub(&temp);
 799                 }
 800                 x = 1;
 801         } else {
 802                 x = 0;
 803         }
 804
 805         if (x != xfer->nframes) {
 806                 if (xfer->endpointno & UE_DIR_IN) {
 807                         temp.func = &avr32dci_data_tx;
 808                         need_sync = 1;
 809                 } else {
 810                         temp.func = &avr32dci_data_rx;
 811                         need_sync = 0;
 812                 }
 813
 814                 /* setup "pc" pointer */
 815                 temp.pc = xfer->frbuffers + x;
 816         } else {
 817                 need_sync = 0;
 818         }
 819         while (x != xfer->nframes) {
 820
 821                 /* DATA0 / DATA1 message */
 822
 823                 temp.len = xfer->frlengths[x];
 824
 825                 x++;
 826
 827                 if (x == xfer->nframes) {
 828                         if (xfer->flags_int.control_xfr) {
 829                                 if (xfer->flags_int.control_act) {
 830                                         temp.setup_alt_next = 0;
 831                                 }
 832                         } else {
 833                                 temp.setup_alt_next = 0;
 834                         }
 835                 }
 836                 if (temp.len == 0) {
 837
 838                         /* make sure that we send an USB packet */
 839
 840                         temp.short_pkt = 0;
 841
 842                 } else {
 843
 844                         /* regular data transfer */
 845
 846                         temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
 847                 }
 848
 849                 avr32dci_setup_standard_chain_sub(&temp);
 850
 851                 if (xfer->flags_int.isochronous_xfr) {
 852                         temp.offset += temp.len;
 853                 } else {
 854                         /* get next Page Cache pointer */
 855                         temp.pc = xfer->frbuffers + x;
 856                 }
 857         }
 858
 859         if (xfer->flags_int.control_xfr) {
 860
 861                 /* always setup a valid "pc" pointer for status and sync */
 862                 temp.pc = xfer->frbuffers + 0;
 863                 temp.len = 0;
 864                 temp.short_pkt = 0;
 865                 temp.setup_alt_next = 0;
 866
 867                 /* check if we need to sync */
 868                 if (need_sync) {
 869                         /* we need a SYNC point after TX */
 870                         temp.func = &avr32dci_data_tx_sync;
 871                         avr32dci_setup_standard_chain_sub(&temp);
 872                 }
 873                 /* check if we should append a status stage */
 874                 if (!xfer->flags_int.control_act) {
 875
 876                         /*
 877                          * Send a DATA1 message and invert the current
 878                          * endpoint direction.
 879                          */
 880                         if (xfer->endpointno & UE_DIR_IN) {
 881                                 temp.func = &avr32dci_data_rx;
 882                                 need_sync = 0;
 883                         } else {
 884                                 temp.func = &avr32dci_data_tx;
 885                                 need_sync = 1;
 886                         }
 887
 888                         avr32dci_setup_standard_chain_sub(&temp);
 889                         if (need_sync) {
 890                                 /* we need a SYNC point after TX */
 891                                 temp.func = &avr32dci_data_tx_sync;
 892                                 avr32dci_setup_standard_chain_sub(&temp);
 893                         }
 894                 }
 895         }
 896         /* must have at least one frame! */
 897         td = temp.td;
 898         xfer->td_transfer_last = td;
 899 }
 900
 901 static void
 902 avr32dci_timeout(void *arg)
 903 {
 904         struct usb_xfer *xfer = arg;
 905
 906         DPRINTF("xfer=%p\n", xfer);
 907
 908         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
 909
 910         /* transfer is transferred */
 911         avr32dci_device_done(xfer, USB_ERR_TIMEOUT);
 912 }
 913
 914 static void
 915 avr32dci_start_standard_chain(struct usb_xfer *xfer)
 916 {
 917         DPRINTFN(9, "\n");
 918
 919         /* poll one time - will turn on interrupts */
 920         if (avr32dci_xfer_do_fifo(xfer)) {
 921                 uint8_t ep_no = xfer->endpointno & UE_ADDR;
 922                 struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
 923
 924                 avr32dci_mod_ien(sc, AVR32_INT_EPT_INT(ep_no), 0);
 925
 926                 /* put transfer on interrupt queue */
 927                 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
 928
 929                 /* start timeout, if any */
 930                 if (xfer->timeout != 0) {
 931                         usbd_transfer_timeout_ms(xfer,
 932                             &avr32dci_timeout, xfer->timeout);
 933                 }
 934         }
 935 }
 936
 937 static void
 938 avr32dci_root_intr(struct avr32dci_softc *sc)
 939 {
 940         DPRINTFN(9, "\n");
 941
 942         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
 943
 944         /* set port bit */
 945         sc->sc_hub_idata[0] = 0x02;     /* we only have one port */
 946
 947         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
 948             sizeof(sc->sc_hub_idata));
 949 }
 950
 951 static usb_error_t
 952 avr32dci_standard_done_sub(struct usb_xfer *xfer)
 953 {
 954         struct avr32dci_td *td;
 955         uint32_t len;
 956         uint8_t error;
 957
 958         DPRINTFN(9, "\n");
 959
 960         td = xfer->td_transfer_cache;
 961
 962         do {
 963                 len = td->remainder;
 964
 965                 if (xfer->aframes != xfer->nframes) {
 966                         /*
 967                          * Verify the length and subtract
 968                          * the remainder from "frlengths[]":
 969                          */
 970                         if (len > xfer->frlengths[xfer->aframes]) {
 971                                 td->error = 1;
 972                         } else {
 973                                 xfer->frlengths[xfer->aframes] -= len;
 974                         }
 975                 }
 976                 /* Check for transfer error */
 977                 if (td->error) {
 978                         /* the transfer is finished */
 979                         error = 1;
 980                         td = NULL;
 981                         break;
 982                 }
 983                 /* Check for short transfer */
 984                 if (len > 0) {
 985                         if (xfer->flags_int.short_frames_ok ||
 986                             xfer->flags_int.isochronous_xfr) {
 987                                 /* follow alt next */
 988                                 if (td->alt_next) {
 989                                         td = td->obj_next;
 990                                 } else {
 991                                         td = NULL;
 992                                 }
 993                         } else {
 994                                 /* the transfer is finished */
 995                                 td = NULL;
 996                         }
 997                         error = 0;
 998                         break;
 999                 }
1000                 td = td->obj_next;
1001
1002                 /* this USB frame is complete */
1003                 error = 0;
1004                 break;
1005
1006         } while (0);
1007
1008         /* update transfer cache */
1009
1010         xfer->td_transfer_cache = td;
1011
1012         return (error ?
1013             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1014 }
1015
1016 static void
1017 avr32dci_standard_done(struct usb_xfer *xfer)
1018 {
1019         usb_error_t err = 0;
1020
1021         DPRINTFN(13, "xfer=%p pipe=%p transfer done\n",
1022             xfer, xfer->endpoint);
1023
1024         /* reset scanner */
1025
1026         xfer->td_transfer_cache = xfer->td_transfer_first;
1027
1028         if (xfer->flags_int.control_xfr) {
1029
1030                 if (xfer->flags_int.control_hdr) {
1031
1032                         err = avr32dci_standard_done_sub(xfer);
1033                 }
1034                 xfer->aframes = 1;
1035
1036                 if (xfer->td_transfer_cache == NULL) {
1037                         goto done;
1038                 }
1039         }
1040         while (xfer->aframes != xfer->nframes) {
1041
1042                 err = avr32dci_standard_done_sub(xfer);
1043                 xfer->aframes++;
1044
1045                 if (xfer->td_transfer_cache == NULL) {
1046                         goto done;
1047                 }
1048         }
1049
1050         if (xfer->flags_int.control_xfr &&
1051             !xfer->flags_int.control_act) {
1052
1053                 err = avr32dci_standard_done_sub(xfer);
1054         }
1055 done:
1056         avr32dci_device_done(xfer, err);
1057 }
1058
1059 /*------------------------------------------------------------------------*
1060  *      avr32dci_device_done
1061  *
1062  * NOTE: this function can be called more than one time on the
1063  * same USB transfer!
1064  *------------------------------------------------------------------------*/
1065 static void
1066 avr32dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1067 {
1068         struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1069         uint8_t ep_no;
1070
1071         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1072
1073         DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
1074             xfer, xfer->endpoint, error);
1075
1076         if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1077                 ep_no = (xfer->endpointno & UE_ADDR);
1078
1079                 /* disable endpoint interrupt */
1080                 avr32dci_mod_ien(sc, 0, AVR32_INT_EPT_INT(ep_no));
1081
1082                 DPRINTFN(15, "disabled interrupts!\n");
1083         }
1084         /* dequeue transfer and start next transfer */
1085         usbd_transfer_done(xfer, error);
1086 }
1087
1088 static void
1089 avr32dci_xfer_stall(struct usb_xfer *xfer)
1090 {
1091         avr32dci_device_done(xfer, USB_ERR_STALLED);
1092 }
1093
1094 static void
1095 avr32dci_set_stall(struct usb_device *udev,
1096     struct usb_endpoint *pipe, uint8_t *did_stall)
1097 {
1098         struct avr32dci_softc *sc;
1099         uint8_t ep_no;
1100
1101         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1102
1103         DPRINTFN(5, "pipe=%p\n", pipe);
1104
1105         sc = AVR32_BUS2SC(udev->bus);
1106         /* get endpoint number */
1107         ep_no = (pipe->edesc->bEndpointAddress & UE_ADDR);
1108         /* set stall */
1109         AVR32_WRITE_4(sc, AVR32_EPTSETSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1110 }
1111
1112 static void
1113 avr32dci_clear_stall_sub(struct avr32dci_softc *sc, uint8_t ep_no,
1114     uint8_t ep_type, uint8_t ep_dir)
1115 {
1116         const struct usb_hw_ep_profile *pf;
1117         uint32_t temp;
1118         uint32_t epsize;
1119         uint8_t n;
1120
1121         if (ep_type == UE_CONTROL) {
1122                 /* clearing stall is not needed */
1123                 return;
1124         }
1125         /* set endpoint reset */
1126         AVR32_WRITE_4(sc, AVR32_EPTRST, AVR32_EPTRST_MASK(ep_no));
1127
1128         /* set stall */
1129         AVR32_WRITE_4(sc, AVR32_EPTSETSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1130
1131         /* reset data toggle */
1132         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(ep_no), AVR32_EPTSTA_TOGGLESQ);
1133
1134         /* clear stall */
1135         AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(ep_no), AVR32_EPTSTA_FRCESTALL);
1136
1137         if (ep_type == UE_BULK) {
1138                 temp = AVR32_EPTCFG_TYPE_BULK;
1139         } else if (ep_type == UE_INTERRUPT) {
1140                 temp = AVR32_EPTCFG_TYPE_INTR;
1141         } else {
1142                 temp = AVR32_EPTCFG_TYPE_ISOC |
1143                     AVR32_EPTCFG_NB_TRANS(1);
1144         }
1145         if (ep_dir & UE_DIR_IN) {
1146                 temp |= AVR32_EPTCFG_EPDIR_IN;
1147         }
1148         avr32dci_get_hw_ep_profile(NULL, &pf, ep_no);
1149
1150         /* compute endpoint size (use maximum) */
1151         epsize = pf->max_in_frame_size | pf->max_out_frame_size;
1152         n = 0;
1153         while ((epsize /= 2))
1154                 n++;
1155         temp |= AVR32_EPTCFG_EPSIZE(n);
1156
1157         /* use the maximum number of banks supported */
1158         if (ep_no < 1)
1159                 temp |= AVR32_EPTCFG_NBANK(1);
1160         else if (ep_no < 3)
1161                 temp |= AVR32_EPTCFG_NBANK(2);
1162         else
1163                 temp |= AVR32_EPTCFG_NBANK(3);
1164
1165         AVR32_WRITE_4(sc, AVR32_EPTCFG(ep_no), temp);
1166
1167         temp = AVR32_READ_4(sc, AVR32_EPTCFG(ep_no));
1168
1169         if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1170                 device_printf(sc->sc_bus.bdev, "Chip rejected configuration\n");
1171         } else {
1172                 AVR32_WRITE_4(sc, AVR32_EPTCTLENB(ep_no),
1173                     AVR32_EPTCTL_EPT_ENABL);
1174         }
1175 }
1176
1177 static void
1178 avr32dci_clear_stall(struct usb_device *udev, struct usb_endpoint *pipe)
1179 {
1180         struct avr32dci_softc *sc;
1181         struct usb_endpoint_descriptor *ed;
1182
1183         DPRINTFN(5, "pipe=%p\n", pipe);
1184
1185         USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1186
1187         /* check mode */
1188         if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1189                 /* not supported */
1190                 return;
1191         }
1192         /* get softc */
1193         sc = AVR32_BUS2SC(udev->bus);
1194
1195         /* get endpoint descriptor */
1196         ed = pipe->edesc;
1197
1198         /* reset endpoint */
1199         avr32dci_clear_stall_sub(sc,
1200             (ed->bEndpointAddress & UE_ADDR),
1201             (ed->bmAttributes & UE_XFERTYPE),
1202             (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1203 }
1204
1205 usb_error_t
1206 avr32dci_init(struct avr32dci_softc *sc)
1207 {
1208         uint8_t n;
1209
1210         DPRINTF("start\n");
1211
1212         /* set up the bus structure */
1213         sc->sc_bus.usbrev = USB_REV_1_1;
1214         sc->sc_bus.methods = &avr32dci_bus_methods;
1215
1216         USB_BUS_LOCK(&sc->sc_bus);
1217
1218         /* make sure USB is enabled */
1219         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_EN_USBA, 0);
1220
1221         /* turn on clocks */
1222         (sc->sc_clocks_on) (&sc->sc_bus);
1223
1224         /* make sure device is re-enumerated */
1225         avr32dci_mod_ctrl(sc, AVR32_CTRL_DEV_DETACH, 0);
1226
1227         /* wait a little for things to stabilise */
1228         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 20);
1229
1230         /* disable interrupts */
1231         avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1232
1233         /* enable interrupts */
1234         avr32dci_mod_ien(sc, AVR32_INT_DET_SUSPD |
1235             AVR32_INT_ENDRESET, 0);
1236
1237         /* reset all endpoints */
1238         AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1);
1239
1240         /* disable all endpoints */
1241         for (n = 0; n != AVR32_EP_MAX; n++) {
1242                 /* disable endpoint */
1243                 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1244         }
1245
1246         /* turn off clocks */
1247
1248         avr32dci_clocks_off(sc);
1249
1250         USB_BUS_UNLOCK(&sc->sc_bus);
1251
1252         /* catch any lost interrupts */
1253
1254         avr32dci_do_poll(&sc->sc_bus);
1255
1256         return (0);                     /* success */
1257 }
1258
1259 void
1260 avr32dci_uninit(struct avr32dci_softc *sc)
1261 {
1262         uint8_t n;
1263
1264         USB_BUS_LOCK(&sc->sc_bus);
1265
1266         /* turn on clocks */
1267         (sc->sc_clocks_on) (&sc->sc_bus);
1268
1269         /* disable interrupts */
1270         avr32dci_mod_ien(sc, 0, 0xFFFFFFFF);
1271
1272         /* reset all endpoints */
1273         AVR32_WRITE_4(sc, AVR32_EPTRST, (1 << AVR32_EP_MAX) - 1);
1274
1275         /* disable all endpoints */
1276         for (n = 0; n != AVR32_EP_MAX; n++) {
1277                 /* disable endpoint */
1278                 AVR32_WRITE_4(sc, AVR32_EPTCTLDIS(n), AVR32_EPTCTL_EPT_ENABL);
1279         }
1280
1281         sc->sc_flags.port_powered = 0;
1282         sc->sc_flags.status_vbus = 0;
1283         sc->sc_flags.status_bus_reset = 0;
1284         sc->sc_flags.status_suspend = 0;
1285         sc->sc_flags.change_suspend = 0;
1286         sc->sc_flags.change_connect = 1;
1287
1288         avr32dci_pull_down(sc);
1289         avr32dci_clocks_off(sc);
1290
1291         USB_BUS_UNLOCK(&sc->sc_bus);
1292 }
1293
1294 static void
1295 avr32dci_suspend(struct avr32dci_softc *sc)
1296 {
1297         /* TODO */
1298 }
1299
1300 static void
1301 avr32dci_resume(struct avr32dci_softc *sc)
1302 {
1303         /* TODO */
1304 }
1305
1306 static void
1307 avr32dci_do_poll(struct usb_bus *bus)
1308 {
1309         struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
1310
1311         USB_BUS_LOCK(&sc->sc_bus);
1312         avr32dci_interrupt_poll(sc);
1313         USB_BUS_UNLOCK(&sc->sc_bus);
1314 }
1315
1316 /*------------------------------------------------------------------------*
1317  * avr32dci bulk support
1318  * avr32dci control support
1319  * avr32dci interrupt support
1320  *------------------------------------------------------------------------*/
1321 static void
1322 avr32dci_device_non_isoc_open(struct usb_xfer *xfer)
1323 {
1324         return;
1325 }
1326
1327 static void
1328 avr32dci_device_non_isoc_close(struct usb_xfer *xfer)
1329 {
1330         avr32dci_device_done(xfer, USB_ERR_CANCELLED);
1331 }
1332
1333 static void
1334 avr32dci_device_non_isoc_enter(struct usb_xfer *xfer)
1335 {
1336         return;
1337 }
1338
1339 static void
1340 avr32dci_device_non_isoc_start(struct usb_xfer *xfer)
1341 {
1342         /* setup TDs */
1343         avr32dci_setup_standard_chain(xfer);
1344         avr32dci_start_standard_chain(xfer);
1345 }
1346
1347 static const struct usb_pipe_methods avr32dci_device_non_isoc_methods =
1348 {
1349         .open = avr32dci_device_non_isoc_open,
1350         .close = avr32dci_device_non_isoc_close,
1351         .enter = avr32dci_device_non_isoc_enter,
1352         .start = avr32dci_device_non_isoc_start,
1353 };
1354
1355 /*------------------------------------------------------------------------*
1356  * avr32dci full speed isochronous support
1357  *------------------------------------------------------------------------*/
1358 static void
1359 avr32dci_device_isoc_fs_open(struct usb_xfer *xfer)
1360 {
1361         return;
1362 }
1363
1364 static void
1365 avr32dci_device_isoc_fs_close(struct usb_xfer *xfer)
1366 {
1367         avr32dci_device_done(xfer, USB_ERR_CANCELLED);
1368 }
1369
1370 static void
1371 avr32dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1372 {
1373         struct avr32dci_softc *sc = AVR32_BUS2SC(xfer->xroot->bus);
1374         uint32_t temp;
1375         uint32_t nframes;
1376         uint8_t ep_no;
1377
1378         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1379             xfer, xfer->endpoint->isoc_next, xfer->nframes);
1380
1381         /* get the current frame index */
1382         ep_no = xfer->endpointno & UE_ADDR;
1383         nframes = (AVR32_READ_4(sc, AVR32_FNUM) / 8);
1384
1385         nframes &= AVR32_FRAME_MASK;
1386
1387         /*
1388          * check if the frame index is within the window where the frames
1389          * will be inserted
1390          */
1391         temp = (nframes - xfer->endpoint->isoc_next) & AVR32_FRAME_MASK;
1392
1393         if ((xfer->endpoint->is_synced == 0) ||
1394             (temp < xfer->nframes)) {
1395                 /*
1396                  * If there is data underflow or the pipe queue is
1397                  * empty we schedule the transfer a few frames ahead
1398                  * of the current frame position. Else two isochronous
1399                  * transfers might overlap.
1400                  */
1401                 xfer->endpoint->isoc_next = (nframes + 3) & AVR32_FRAME_MASK;
1402                 xfer->endpoint->is_synced = 1;
1403                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1404         }
1405         /*
1406          * compute how many milliseconds the insertion is ahead of the
1407          * current frame position:
1408          */
1409         temp = (xfer->endpoint->isoc_next - nframes) & AVR32_FRAME_MASK;
1410
1411         /*
1412          * pre-compute when the isochronous transfer will be finished:
1413          */
1414         xfer->isoc_time_complete =
1415             usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1416             xfer->nframes;
1417
1418         /* compute frame number for next insertion */
1419         xfer->endpoint->isoc_next += xfer->nframes;
1420
1421         /* setup TDs */
1422         avr32dci_setup_standard_chain(xfer);
1423 }
1424
1425 static void
1426 avr32dci_device_isoc_fs_start(struct usb_xfer *xfer)
1427 {
1428         /* start TD chain */
1429         avr32dci_start_standard_chain(xfer);
1430 }
1431
1432 static const struct usb_pipe_methods avr32dci_device_isoc_fs_methods =
1433 {
1434         .open = avr32dci_device_isoc_fs_open,
1435         .close = avr32dci_device_isoc_fs_close,
1436         .enter = avr32dci_device_isoc_fs_enter,
1437         .start = avr32dci_device_isoc_fs_start,
1438 };
1439
1440 /*------------------------------------------------------------------------*
1441  * avr32dci root control support
1442  *------------------------------------------------------------------------*
1443  * Simulate a hardware HUB by handling all the necessary requests.
1444  *------------------------------------------------------------------------*/
1445
1446 static const struct usb_device_descriptor avr32dci_devd = {
1447         .bLength = sizeof(struct usb_device_descriptor),
1448         .bDescriptorType = UDESC_DEVICE,
1449         .bcdUSB = {0x00, 0x02},
1450         .bDeviceClass = UDCLASS_HUB,
1451         .bDeviceSubClass = UDSUBCLASS_HUB,
1452         .bDeviceProtocol = UDPROTO_HSHUBSTT,
1453         .bMaxPacketSize = 64,
1454         .bcdDevice = {0x00, 0x01},
1455         .iManufacturer = 1,
1456         .iProduct = 2,
1457         .bNumConfigurations = 1,
1458 };
1459
1460 static const struct usb_device_qualifier avr32dci_odevd = {
1461         .bLength = sizeof(struct usb_device_qualifier),
1462         .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1463         .bcdUSB = {0x00, 0x02},
1464         .bDeviceClass = UDCLASS_HUB,
1465         .bDeviceSubClass = UDSUBCLASS_HUB,
1466         .bDeviceProtocol = UDPROTO_FSHUB,
1467         .bMaxPacketSize0 = 0,
1468         .bNumConfigurations = 0,
1469 };
1470
1471 static const struct avr32dci_config_desc avr32dci_confd = {
1472         .confd = {
1473                 .bLength = sizeof(struct usb_config_descriptor),
1474                 .bDescriptorType = UDESC_CONFIG,
1475                 .wTotalLength[0] = sizeof(avr32dci_confd),
1476                 .bNumInterface = 1,
1477                 .bConfigurationValue = 1,
1478                 .iConfiguration = 0,
1479                 .bmAttributes = UC_SELF_POWERED,
1480                 .bMaxPower = 0,
1481         },
1482         .ifcd = {
1483                 .bLength = sizeof(struct usb_interface_descriptor),
1484                 .bDescriptorType = UDESC_INTERFACE,
1485                 .bNumEndpoints = 1,
1486                 .bInterfaceClass = UICLASS_HUB,
1487                 .bInterfaceSubClass = UISUBCLASS_HUB,
1488                 .bInterfaceProtocol = 0,
1489         },
1490         .endpd = {
1491                 .bLength = sizeof(struct usb_endpoint_descriptor),
1492                 .bDescriptorType = UDESC_ENDPOINT,
1493                 .bEndpointAddress = (UE_DIR_IN | AVR32_INTR_ENDPT),
1494                 .bmAttributes = UE_INTERRUPT,
1495                 .wMaxPacketSize[0] = 8,
1496                 .bInterval = 255,
1497         },
1498 };
1499
1500 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
1501
1502 static const struct usb_hub_descriptor_min avr32dci_hubd = {
1503         .bDescLength = sizeof(avr32dci_hubd),
1504         .bDescriptorType = UDESC_HUB,
1505         .bNbrPorts = 1,
1506         HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)),
1507         .bPwrOn2PwrGood = 50,
1508         .bHubContrCurrent = 0,
1509         .DeviceRemovable = {0},         /* port is removable */
1510 };
1511
1512 #define STRING_VENDOR \
1513   "A\0V\0R\0003\0002"
1514
1515 #define STRING_PRODUCT \
1516   "D\0C\0I\0 \0R\0o\0o\0t\0 \0H\0U\0B"
1517
1518 USB_MAKE_STRING_DESC(STRING_VENDOR, avr32dci_vendor);
1519 USB_MAKE_STRING_DESC(STRING_PRODUCT, avr32dci_product);
1520
1521 static usb_error_t
1522 avr32dci_roothub_exec(struct usb_device *udev,
1523     struct usb_device_request *req, const void **pptr, uint16_t *plength)
1524 {
1525         struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
1526         const void *ptr;
1527         uint16_t len;
1528         uint16_t value;
1529         uint16_t index;
1530         uint32_t temp;
1531         usb_error_t err;
1532
1533         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1534
1535         /* buffer reset */
1536         ptr = (const void *)&sc->sc_hub_temp;
1537         len = 0;
1538         err = 0;
1539
1540         value = UGETW(req->wValue);
1541         index = UGETW(req->wIndex);
1542
1543         /* demultiplex the control request */
1544
1545         switch (req->bmRequestType) {
1546         case UT_READ_DEVICE:
1547                 switch (req->bRequest) {
1548                 case UR_GET_DESCRIPTOR:
1549                         goto tr_handle_get_descriptor;
1550                 case UR_GET_CONFIG:
1551                         goto tr_handle_get_config;
1552                 case UR_GET_STATUS:
1553                         goto tr_handle_get_status;
1554                 default:
1555                         goto tr_stalled;
1556                 }
1557                 break;
1558
1559         case UT_WRITE_DEVICE:
1560                 switch (req->bRequest) {
1561                 case UR_SET_ADDRESS:
1562                         goto tr_handle_set_address;
1563                 case UR_SET_CONFIG:
1564                         goto tr_handle_set_config;
1565                 case UR_CLEAR_FEATURE:
1566                         goto tr_valid;  /* nop */
1567                 case UR_SET_DESCRIPTOR:
1568                         goto tr_valid;  /* nop */
1569                 case UR_SET_FEATURE:
1570                 default:
1571                         goto tr_stalled;
1572                 }
1573                 break;
1574
1575         case UT_WRITE_ENDPOINT:
1576                 switch (req->bRequest) {
1577                 case UR_CLEAR_FEATURE:
1578                         switch (UGETW(req->wValue)) {
1579                         case UF_ENDPOINT_HALT:
1580                                 goto tr_handle_clear_halt;
1581                         case UF_DEVICE_REMOTE_WAKEUP:
1582                                 goto tr_handle_clear_wakeup;
1583                         default:
1584                                 goto tr_stalled;
1585                         }
1586                         break;
1587                 case UR_SET_FEATURE:
1588                         switch (UGETW(req->wValue)) {
1589                         case UF_ENDPOINT_HALT:
1590                                 goto tr_handle_set_halt;
1591                         case UF_DEVICE_REMOTE_WAKEUP:
1592                                 goto tr_handle_set_wakeup;
1593                         default:
1594                                 goto tr_stalled;
1595                         }
1596                         break;
1597                 case UR_SYNCH_FRAME:
1598                         goto tr_valid;  /* nop */
1599                 default:
1600                         goto tr_stalled;
1601                 }
1602                 break;
1603
1604         case UT_READ_ENDPOINT:
1605                 switch (req->bRequest) {
1606                 case UR_GET_STATUS:
1607                         goto tr_handle_get_ep_status;
1608                 default:
1609                         goto tr_stalled;
1610                 }
1611                 break;
1612
1613         case UT_WRITE_INTERFACE:
1614                 switch (req->bRequest) {
1615                 case UR_SET_INTERFACE:
1616                         goto tr_handle_set_interface;
1617                 case UR_CLEAR_FEATURE:
1618                         goto tr_valid;  /* nop */
1619                 case UR_SET_FEATURE:
1620                 default:
1621                         goto tr_stalled;
1622                 }
1623                 break;
1624
1625         case UT_READ_INTERFACE:
1626                 switch (req->bRequest) {
1627                 case UR_GET_INTERFACE:
1628                         goto tr_handle_get_interface;
1629                 case UR_GET_STATUS:
1630                         goto tr_handle_get_iface_status;
1631                 default:
1632                         goto tr_stalled;
1633                 }
1634                 break;
1635
1636         case UT_WRITE_CLASS_INTERFACE:
1637         case UT_WRITE_VENDOR_INTERFACE:
1638                 /* XXX forward */
1639                 break;
1640
1641         case UT_READ_CLASS_INTERFACE:
1642         case UT_READ_VENDOR_INTERFACE:
1643                 /* XXX forward */
1644                 break;
1645
1646         case UT_WRITE_CLASS_DEVICE:
1647                 switch (req->bRequest) {
1648                 case UR_CLEAR_FEATURE:
1649                         goto tr_valid;
1650                 case UR_SET_DESCRIPTOR:
1651                 case UR_SET_FEATURE:
1652                         break;
1653                 default:
1654                         goto tr_stalled;
1655                 }
1656                 break;
1657
1658         case UT_WRITE_CLASS_OTHER:
1659                 switch (req->bRequest) {
1660                 case UR_CLEAR_FEATURE:
1661                         goto tr_handle_clear_port_feature;
1662                 case UR_SET_FEATURE:
1663                         goto tr_handle_set_port_feature;
1664                 case UR_CLEAR_TT_BUFFER:
1665                 case UR_RESET_TT:
1666                 case UR_STOP_TT:
1667                         goto tr_valid;
1668
1669                 default:
1670                         goto tr_stalled;
1671                 }
1672                 break;
1673
1674         case UT_READ_CLASS_OTHER:
1675                 switch (req->bRequest) {
1676                 case UR_GET_TT_STATE:
1677                         goto tr_handle_get_tt_state;
1678                 case UR_GET_STATUS:
1679                         goto tr_handle_get_port_status;
1680                 default:
1681                         goto tr_stalled;
1682                 }
1683                 break;
1684
1685         case UT_READ_CLASS_DEVICE:
1686                 switch (req->bRequest) {
1687                 case UR_GET_DESCRIPTOR:
1688                         goto tr_handle_get_class_descriptor;
1689                 case UR_GET_STATUS:
1690                         goto tr_handle_get_class_status;
1691
1692                 default:
1693                         goto tr_stalled;
1694                 }
1695                 break;
1696         default:
1697                 goto tr_stalled;
1698         }
1699         goto tr_valid;
1700
1701 tr_handle_get_descriptor:
1702         switch (value >> 8) {
1703         case UDESC_DEVICE:
1704                 if (value & 0xff) {
1705                         goto tr_stalled;
1706                 }
1707                 len = sizeof(avr32dci_devd);
1708                 ptr = (const void *)&avr32dci_devd;
1709                 goto tr_valid;
1710         case UDESC_CONFIG:
1711                 if (value & 0xff) {
1712                         goto tr_stalled;
1713                 }
1714                 len = sizeof(avr32dci_confd);
1715                 ptr = (const void *)&avr32dci_confd;
1716                 goto tr_valid;
1717         case UDESC_STRING:
1718                 switch (value & 0xff) {
1719                 case 0:         /* Language table */
1720                         len = sizeof(usb_string_lang_en);
1721                         ptr = (const void *)&usb_string_lang_en;
1722                         goto tr_valid;
1723
1724                 case 1:         /* Vendor */
1725                         len = sizeof(avr32dci_vendor);
1726                         ptr = (const void *)&avr32dci_vendor;
1727                         goto tr_valid;
1728
1729                 case 2:         /* Product */
1730                         len = sizeof(avr32dci_product);
1731                         ptr = (const void *)&avr32dci_product;
1732                         goto tr_valid;
1733                 default:
1734                         break;
1735                 }
1736                 break;
1737         default:
1738                 goto tr_stalled;
1739         }
1740         goto tr_stalled;
1741
1742 tr_handle_get_config:
1743         len = 1;
1744         sc->sc_hub_temp.wValue[0] = sc->sc_conf;
1745         goto tr_valid;
1746
1747 tr_handle_get_status:
1748         len = 2;
1749         USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
1750         goto tr_valid;
1751
1752 tr_handle_set_address:
1753         if (value & 0xFF00) {
1754                 goto tr_stalled;
1755         }
1756         sc->sc_rt_addr = value;
1757         goto tr_valid;
1758
1759 tr_handle_set_config:
1760         if (value >= 2) {
1761                 goto tr_stalled;
1762         }
1763         sc->sc_conf = value;
1764         goto tr_valid;
1765
1766 tr_handle_get_interface:
1767         len = 1;
1768         sc->sc_hub_temp.wValue[0] = 0;
1769         goto tr_valid;
1770
1771 tr_handle_get_tt_state:
1772 tr_handle_get_class_status:
1773 tr_handle_get_iface_status:
1774 tr_handle_get_ep_status:
1775         len = 2;
1776         USETW(sc->sc_hub_temp.wValue, 0);
1777         goto tr_valid;
1778
1779 tr_handle_set_halt:
1780 tr_handle_set_interface:
1781 tr_handle_set_wakeup:
1782 tr_handle_clear_wakeup:
1783 tr_handle_clear_halt:
1784         goto tr_valid;
1785
1786 tr_handle_clear_port_feature:
1787         if (index != 1) {
1788                 goto tr_stalled;
1789         }
1790         DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
1791
1792         switch (value) {
1793         case UHF_PORT_SUSPEND:
1794                 avr32dci_wakeup_peer(sc);
1795                 break;
1796
1797         case UHF_PORT_ENABLE:
1798                 sc->sc_flags.port_enabled = 0;
1799                 break;
1800
1801         case UHF_PORT_TEST:
1802         case UHF_PORT_INDICATOR:
1803         case UHF_C_PORT_ENABLE:
1804         case UHF_C_PORT_OVER_CURRENT:
1805         case UHF_C_PORT_RESET:
1806                 /* nops */
1807                 break;
1808         case UHF_PORT_POWER:
1809                 sc->sc_flags.port_powered = 0;
1810                 avr32dci_pull_down(sc);
1811                 avr32dci_clocks_off(sc);
1812                 break;
1813         case UHF_C_PORT_CONNECTION:
1814                 /* clear connect change flag */
1815                 sc->sc_flags.change_connect = 0;
1816
1817                 if (!sc->sc_flags.status_bus_reset) {
1818                         /* we are not connected */
1819                         break;
1820                 }
1821                 /* configure the control endpoint */
1822                 /* set endpoint reset */
1823                 AVR32_WRITE_4(sc, AVR32_EPTRST, AVR32_EPTRST_MASK(0));
1824
1825                 /* set stall */
1826                 AVR32_WRITE_4(sc, AVR32_EPTSETSTA(0), AVR32_EPTSTA_FRCESTALL);
1827
1828                 /* reset data toggle */
1829                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_TOGGLESQ);
1830
1831                 /* clear stall */
1832                 AVR32_WRITE_4(sc, AVR32_EPTCLRSTA(0), AVR32_EPTSTA_FRCESTALL);
1833
1834                 /* configure */
1835                 AVR32_WRITE_4(sc, AVR32_EPTCFG(0), AVR32_EPTCFG_TYPE_CTRL |
1836                     AVR32_EPTCFG_NBANK(1) | AVR32_EPTCFG_EPSIZE(6));
1837
1838                 temp = AVR32_READ_4(sc, AVR32_EPTCFG(0));
1839
1840                 if (!(temp & AVR32_EPTCFG_EPT_MAPD)) {
1841                         device_printf(sc->sc_bus.bdev,
1842                             "Chip rejected configuration\n");
1843                 } else {
1844                         AVR32_WRITE_4(sc, AVR32_EPTCTLENB(0),
1845                             AVR32_EPTCTL_EPT_ENABL);
1846                 }
1847                 break;
1848         case UHF_C_PORT_SUSPEND:
1849                 sc->sc_flags.change_suspend = 0;
1850                 break;
1851         default:
1852                 err = USB_ERR_IOERROR;
1853                 goto done;
1854         }
1855         goto tr_valid;
1856
1857 tr_handle_set_port_feature:
1858         if (index != 1) {
1859                 goto tr_stalled;
1860         }
1861         DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
1862
1863         switch (value) {
1864         case UHF_PORT_ENABLE:
1865                 sc->sc_flags.port_enabled = 1;
1866                 break;
1867         case UHF_PORT_SUSPEND:
1868         case UHF_PORT_RESET:
1869         case UHF_PORT_TEST:
1870         case UHF_PORT_INDICATOR:
1871                 /* nops */
1872                 break;
1873         case UHF_PORT_POWER:
1874                 sc->sc_flags.port_powered = 1;
1875                 break;
1876         default:
1877                 err = USB_ERR_IOERROR;
1878                 goto done;
1879         }
1880         goto tr_valid;
1881
1882 tr_handle_get_port_status:
1883
1884         DPRINTFN(9, "UR_GET_PORT_STATUS\n");
1885
1886         if (index != 1) {
1887                 goto tr_stalled;
1888         }
1889         if (sc->sc_flags.status_vbus) {
1890                 avr32dci_clocks_on(sc);
1891                 avr32dci_pull_up(sc);
1892         } else {
1893                 avr32dci_pull_down(sc);
1894                 avr32dci_clocks_off(sc);
1895         }
1896
1897         /* Select Device Side Mode */
1898
1899         value = UPS_PORT_MODE_DEVICE;
1900
1901         /* Check for High Speed */
1902         if (AVR32_READ_4(sc, AVR32_INTSTA) & AVR32_INT_SPEED)
1903                 value |= UPS_HIGH_SPEED;
1904
1905         if (sc->sc_flags.port_powered) {
1906                 value |= UPS_PORT_POWER;
1907         }
1908         if (sc->sc_flags.port_enabled) {
1909                 value |= UPS_PORT_ENABLED;
1910         }
1911         if (sc->sc_flags.status_vbus &&
1912             sc->sc_flags.status_bus_reset) {
1913                 value |= UPS_CURRENT_CONNECT_STATUS;
1914         }
1915         if (sc->sc_flags.status_suspend) {
1916                 value |= UPS_SUSPEND;
1917         }
1918         USETW(sc->sc_hub_temp.ps.wPortStatus, value);
1919
1920         value = 0;
1921
1922         if (sc->sc_flags.change_connect) {
1923                 value |= UPS_C_CONNECT_STATUS;
1924         }
1925         if (sc->sc_flags.change_suspend) {
1926                 value |= UPS_C_SUSPEND;
1927         }
1928         USETW(sc->sc_hub_temp.ps.wPortChange, value);
1929         len = sizeof(sc->sc_hub_temp.ps);
1930         goto tr_valid;
1931
1932 tr_handle_get_class_descriptor:
1933         if (value & 0xFF) {
1934                 goto tr_stalled;
1935         }
1936         ptr = (const void *)&avr32dci_hubd;
1937         len = sizeof(avr32dci_hubd);
1938         goto tr_valid;
1939
1940 tr_stalled:
1941         err = USB_ERR_STALLED;
1942 tr_valid:
1943 done:
1944         *plength = len;
1945         *pptr = ptr;
1946         return (err);
1947 }
1948
1949 static void
1950 avr32dci_xfer_setup(struct usb_setup_params *parm)
1951 {
1952         const struct usb_hw_ep_profile *pf;
1953         struct avr32dci_softc *sc;
1954         struct usb_xfer *xfer;
1955         void *last_obj;
1956         uint32_t ntd;
1957         uint32_t n;
1958         uint8_t ep_no;
1959
1960         sc = AVR32_BUS2SC(parm->udev->bus);
1961         xfer = parm->curr_xfer;
1962
1963         /*
1964          * NOTE: This driver does not use any of the parameters that
1965          * are computed from the following values. Just set some
1966          * reasonable dummies:
1967          */
1968         parm->hc_max_packet_size = 0x400;
1969         parm->hc_max_packet_count = 1;
1970         parm->hc_max_frame_size = 0x400;
1971
1972         usbd_transfer_setup_sub(parm);
1973
1974         /*
1975          * compute maximum number of TDs
1976          */
1977         if ((xfer->endpoint->edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL) {
1978
1979                 ntd = xfer->nframes + 1 /* STATUS */ + 1        /* SYNC 1 */
1980                     + 1 /* SYNC 2 */ ;
1981         } else {
1982
1983                 ntd = xfer->nframes + 1 /* SYNC */ ;
1984         }
1985
1986         /*
1987          * check if "usbd_transfer_setup_sub" set an error
1988          */
1989         if (parm->err)
1990                 return;
1991
1992         /*
1993          * allocate transfer descriptors
1994          */
1995         last_obj = NULL;
1996
1997         /*
1998          * get profile stuff
1999          */
2000         ep_no = xfer->endpointno & UE_ADDR;
2001         avr32dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2002
2003         if (pf == NULL) {
2004                 /* should not happen */
2005                 parm->err = USB_ERR_INVAL;
2006                 return;
2007         }
2008         /* align data */
2009         parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2010
2011         for (n = 0; n != ntd; n++) {
2012
2013                 struct avr32dci_td *td;
2014
2015                 if (parm->buf) {
2016                         uint32_t temp;
2017
2018                         td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2019
2020                         /* init TD */
2021                         td->max_packet_size = xfer->max_packet_size;
2022                         td->ep_no = ep_no;
2023                         temp = pf->max_in_frame_size | pf->max_out_frame_size;
2024                         td->bank_shift = 0;
2025                         while ((temp /= 2))
2026                                 td->bank_shift++;
2027                         if (pf->support_multi_buffer) {
2028                                 td->support_multi_buffer = 1;
2029                         }
2030                         td->obj_next = last_obj;
2031
2032                         last_obj = td;
2033                 }
2034                 parm->size[0] += sizeof(*td);
2035         }
2036
2037         xfer->td_start[0] = last_obj;
2038 }
2039
2040 static void
2041 avr32dci_xfer_unsetup(struct usb_xfer *xfer)
2042 {
2043         return;
2044 }
2045
2046 static void
2047 avr32dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2048     struct usb_endpoint *pipe)
2049 {
2050         struct avr32dci_softc *sc = AVR32_BUS2SC(udev->bus);
2051
2052         DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
2053             pipe, udev->address,
2054             edesc->bEndpointAddress, udev->flags.usb_mode,
2055             sc->sc_rt_addr, udev->device_index);
2056
2057         if (udev->device_index != sc->sc_rt_addr) {
2058
2059                 if ((udev->speed != USB_SPEED_FULL) &&
2060                     (udev->speed != USB_SPEED_HIGH)) {
2061                         /* not supported */
2062                         return;
2063                 }
2064                 if ((edesc->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS)
2065                         pipe->methods = &avr32dci_device_isoc_fs_methods;
2066                 else
2067                         pipe->methods = &avr32dci_device_non_isoc_methods;
2068         }
2069 }
2070
2071 static void
2072 avr32dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2073 {
2074         struct avr32dci_softc *sc = AVR32_BUS2SC(bus);
2075
2076         switch (state) {
2077         case USB_HW_POWER_SUSPEND:
2078                 avr32dci_suspend(sc);
2079                 break;
2080         case USB_HW_POWER_SHUTDOWN:
2081                 avr32dci_uninit(sc);
2082                 break;
2083         case USB_HW_POWER_RESUME:
2084                 avr32dci_resume(sc);
2085                 break;
2086         default:
2087                 break;
2088         }
2089 }
2090
2091 static const struct usb_bus_methods avr32dci_bus_methods =
2092 {
2093         .endpoint_init = &avr32dci_ep_init,
2094         .xfer_setup = &avr32dci_xfer_setup,
2095         .xfer_unsetup = &avr32dci_xfer_unsetup,
2096         .get_hw_ep_profile = &avr32dci_get_hw_ep_profile,
2097         .xfer_stall = &avr32dci_xfer_stall,
2098         .set_stall = &avr32dci_set_stall,
2099         .clear_stall = &avr32dci_clear_stall,
2100         .roothub_exec = &avr32dci_roothub_exec,
2101         .xfer_poll = &avr32dci_do_poll,
2102         .set_hw_power_sleep = &avr32dci_set_hw_power_sleep,
2103 };