3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
6 * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
7 * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
8 * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
35 * The EHCI 0.96 spec can be found at
36 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
37 * The EHCI 1.0 spec can be found at
38 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
39 * and the USB 2.0 spec at
40 * http://www.usb.org/developers/docs/usb_20.zip
46 * 1) command failures are not recovered correctly
49 #ifdef USB_GLOBAL_INCLUDE_FILE
50 #include USB_GLOBAL_INCLUDE_FILE
52 #include <sys/stdint.h>
53 #include <sys/stddef.h>
54 #include <sys/param.h>
55 #include <sys/queue.h>
56 #include <sys/types.h>
57 #include <sys/systm.h>
58 #include <sys/kernel.h>
60 #include <sys/module.h>
62 #include <sys/mutex.h>
63 #include <sys/condvar.h>
64 #include <sys/sysctl.h>
66 #include <sys/unistd.h>
67 #include <sys/callout.h>
68 #include <sys/malloc.h>
71 #include <dev/usb/usb.h>
72 #include <dev/usb/usbdi.h>
74 #define USB_DEBUG_VAR ehcidebug
76 #include <dev/usb/usb_core.h>
77 #include <dev/usb/usb_debug.h>
78 #include <dev/usb/usb_busdma.h>
79 #include <dev/usb/usb_process.h>
80 #include <dev/usb/usb_transfer.h>
81 #include <dev/usb/usb_device.h>
82 #include <dev/usb/usb_hub.h>
83 #include <dev/usb/usb_util.h>
85 #include <dev/usb/usb_controller.h>
86 #include <dev/usb/usb_bus.h>
87 #endif /* USB_GLOBAL_INCLUDE_FILE */
89 #include <dev/usb/controller/ehci.h>
90 #include <dev/usb/controller/ehcireg.h>
92 #define EHCI_BUS2SC(bus) \
93 ((ehci_softc_t *)(((uint8_t *)(bus)) - \
94 ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
97 static int ehcidebug = 0;
98 static int ehcinohighspeed = 0;
99 static int ehciiaadbug = 0;
100 static int ehcilostintrbug = 0;
102 static SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
104 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RWTUN,
105 &ehcidebug, 0, "Debug level");
106 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RWTUN,
107 &ehcinohighspeed, 0, "Disable High Speed USB");
108 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, iaadbug, CTLFLAG_RWTUN,
109 &ehciiaadbug, 0, "Enable doorbell bug workaround");
110 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, lostintrbug, CTLFLAG_RWTUN,
111 &ehcilostintrbug, 0, "Enable lost interrupt bug workaround");
113 static void ehci_dump_regs(ehci_softc_t *sc);
114 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
118 #define EHCI_INTR_ENDPT 1
120 static const struct usb_bus_methods ehci_bus_methods;
121 static const struct usb_pipe_methods ehci_device_bulk_methods;
122 static const struct usb_pipe_methods ehci_device_ctrl_methods;
123 static const struct usb_pipe_methods ehci_device_intr_methods;
124 static const struct usb_pipe_methods ehci_device_isoc_fs_methods;
125 static const struct usb_pipe_methods ehci_device_isoc_hs_methods;
127 static void ehci_do_poll(struct usb_bus *);
128 static void ehci_device_done(struct usb_xfer *, usb_error_t);
129 static uint8_t ehci_check_transfer(struct usb_xfer *);
130 static void ehci_timeout(void *);
131 static void ehci_poll_timeout(void *);
133 static void ehci_root_intr(ehci_softc_t *sc);
135 struct ehci_std_temp {
137 struct usb_page_cache *pc;
143 uint16_t max_frame_size;
145 uint8_t auto_data_toggle;
146 uint8_t setup_alt_next;
151 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
153 ehci_softc_t *sc = EHCI_BUS2SC(bus);
156 cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
157 sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
159 cb(bus, &sc->sc_hw.terminate_pc, &sc->sc_hw.terminate_pg,
160 sizeof(struct ehci_qh_sub), EHCI_QH_ALIGN);
162 cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
163 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
165 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
166 cb(bus, sc->sc_hw.intr_start_pc + i,
167 sc->sc_hw.intr_start_pg + i,
168 sizeof(ehci_qh_t), EHCI_QH_ALIGN);
171 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
172 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
173 sc->sc_hw.isoc_hs_start_pg + i,
174 sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
177 for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
178 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
179 sc->sc_hw.isoc_fs_start_pg + i,
180 sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
185 ehci_reset(ehci_softc_t *sc)
190 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
191 for (i = 0; i < 100; i++) {
192 usb_pause_mtx(NULL, hz / 128);
193 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
195 if (sc->sc_vendor_post_reset != NULL)
196 sc->sc_vendor_post_reset(sc);
200 device_printf(sc->sc_bus.bdev, "reset timeout\n");
201 return (USB_ERR_IOERROR);
205 ehci_hcreset(ehci_softc_t *sc)
210 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
211 for (i = 0; i < 100; i++) {
212 usb_pause_mtx(NULL, hz / 128);
213 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
219 * Fall through and try reset anyway even though
220 * Table 2-9 in the EHCI spec says this will result
221 * in undefined behavior.
223 device_printf(sc->sc_bus.bdev, "stop timeout\n");
225 return (ehci_reset(sc));
229 ehci_init_sub(struct ehci_softc *sc)
231 struct usb_page_search buf_res;
236 cparams = EREAD4(sc, EHCI_HCCPARAMS);
238 DPRINTF("cparams=0x%x\n", cparams);
240 if (EHCI_HCC_64BIT(cparams)) {
241 DPRINTF("HCC uses 64-bit structures\n");
243 /* MUST clear segment register if 64 bit capable */
244 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
247 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
248 EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
250 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
251 EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
253 /* enable interrupts */
254 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
256 /* turn on controller */
257 EOWRITE4(sc, EHCI_USBCMD,
258 EHCI_CMD_ITC_1 | /* 1 microframes interrupt delay */
259 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
264 /* Take over port ownership */
265 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
267 for (i = 0; i < 100; i++) {
268 usb_pause_mtx(NULL, hz / 128);
269 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
275 device_printf(sc->sc_bus.bdev, "run timeout\n");
276 return (USB_ERR_IOERROR);
278 return (USB_ERR_NORMAL_COMPLETION);
282 ehci_init(ehci_softc_t *sc)
284 struct usb_page_search buf_res;
295 usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
296 usb_callout_init_mtx(&sc->sc_tmo_poll, &sc->sc_bus.bus_mtx, 0);
298 sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
302 sc->sc_flags |= EHCI_SCFLG_IAADBUG;
304 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
310 version = EHCI_HCIVERSION(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
311 device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
312 version >> 8, version & 0xff);
314 sparams = EREAD4(sc, EHCI_HCSPARAMS);
315 DPRINTF("sparams=0x%x\n", sparams);
317 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
318 sc->sc_bus.usbrev = USB_REV_2_0;
320 if (!(sc->sc_flags & EHCI_SCFLG_DONTRESET)) {
321 /* Reset the controller */
322 DPRINTF("%s: resetting\n",
323 device_get_nameunit(sc->sc_bus.bdev));
325 err = ehci_hcreset(sc);
327 device_printf(sc->sc_bus.bdev, "reset timeout\n");
333 * use current frame-list-size selection 0: 1024*4 bytes 1: 512*4
334 * bytes 2: 256*4 bytes 3: unknown
336 if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
337 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
338 return (USB_ERR_IOERROR);
340 /* set up the bus struct */
341 sc->sc_bus.methods = &ehci_bus_methods;
343 sc->sc_eintrs = EHCI_NORMAL_INTRS;
346 struct ehci_qh_sub *qh;
348 usbd_get_page(&sc->sc_hw.terminate_pc, 0, &buf_res);
352 sc->sc_terminate_self = htohc32(sc, buf_res.physaddr);
354 /* init terminate TD */
356 htohc32(sc, EHCI_LINK_TERMINATE);
358 htohc32(sc, EHCI_LINK_TERMINATE);
360 htohc32(sc, EHCI_QTD_HALTED);
363 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
366 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
370 /* initialize page cache pointer */
372 qh->page_cache = sc->sc_hw.intr_start_pc + i;
374 /* store a pointer to queue head */
376 sc->sc_intr_p_last[i] = qh;
379 htohc32(sc, buf_res.physaddr) |
380 htohc32(sc, EHCI_LINK_QH);
383 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
385 htohc32(sc, EHCI_QH_SET_MULT(1));
388 qh->qh_qtd.qtd_next =
389 htohc32(sc, EHCI_LINK_TERMINATE);
390 qh->qh_qtd.qtd_altnext =
391 htohc32(sc, EHCI_LINK_TERMINATE);
392 qh->qh_qtd.qtd_status =
393 htohc32(sc, EHCI_QTD_HALTED);
397 * the QHs are arranged to give poll intervals that are
398 * powers of 2 times 1ms
400 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
407 y = (x ^ bit) | (bit / 2);
409 qh_x = sc->sc_intr_p_last[x];
410 qh_y = sc->sc_intr_p_last[y];
413 * the next QH has half the poll interval
415 qh_x->qh_link = qh_y->qh_self;
425 qh = sc->sc_intr_p_last[0];
427 /* the last (1ms) QH terminates */
428 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
430 for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
434 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
436 sitd = buf_res.buffer;
438 /* initialize page cache pointer */
440 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
442 /* store a pointer to the transfer descriptor */
444 sc->sc_isoc_fs_p_last[i] = sitd;
446 /* initialize full speed isochronous */
449 htohc32(sc, buf_res.physaddr) |
450 htohc32(sc, EHCI_LINK_SITD);
453 htohc32(sc, EHCI_LINK_TERMINATE);
456 sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
458 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
460 itd = buf_res.buffer;
462 /* initialize page cache pointer */
464 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
466 /* store a pointer to the transfer descriptor */
468 sc->sc_isoc_hs_p_last[i] = itd;
470 /* initialize high speed isochronous */
473 htohc32(sc, buf_res.physaddr) |
474 htohc32(sc, EHCI_LINK_ITD);
480 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
485 pframes = buf_res.buffer;
489 * pframes -> high speed isochronous ->
490 * full speed isochronous -> interrupt QH's
492 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
493 pframes[i] = sc->sc_isoc_hs_p_last
494 [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
497 usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
504 /* initialize page cache pointer */
506 qh->page_cache = &sc->sc_hw.async_start_pc;
508 /* store a pointer to the queue head */
510 sc->sc_async_p_last = qh;
512 /* init dummy QH that starts the async list */
515 htohc32(sc, buf_res.physaddr) |
516 htohc32(sc, EHCI_LINK_QH);
520 htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
521 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
522 qh->qh_link = qh->qh_self;
525 /* fill the overlay qTD */
526 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
527 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
528 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
530 /* flush all cache into memory */
532 usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
536 ehci_dump_sqh(sc, sc->sc_async_p_last);
541 err = ehci_init_sub(sc);
544 /* catch any lost interrupts */
545 ehci_do_poll(&sc->sc_bus);
551 * shut down the controller when the system is going down
554 ehci_detach(ehci_softc_t *sc)
556 USB_BUS_LOCK(&sc->sc_bus);
558 usb_callout_stop(&sc->sc_tmo_pcd);
559 usb_callout_stop(&sc->sc_tmo_poll);
561 EOWRITE4(sc, EHCI_USBINTR, 0);
562 USB_BUS_UNLOCK(&sc->sc_bus);
564 if (ehci_hcreset(sc)) {
565 DPRINTF("reset failed!\n");
568 /* XXX let stray task complete */
569 usb_pause_mtx(NULL, hz / 20);
571 usb_callout_drain(&sc->sc_tmo_pcd);
572 usb_callout_drain(&sc->sc_tmo_poll);
576 ehci_suspend(ehci_softc_t *sc)
578 DPRINTF("stopping the HC\n");
585 ehci_resume(ehci_softc_t *sc)
593 /* catch any lost interrupts */
594 ehci_do_poll(&sc->sc_bus);
599 ehci_dump_regs(ehci_softc_t *sc)
603 i = EOREAD4(sc, EHCI_USBCMD);
604 printf("cmd=0x%08x\n", i);
606 if (i & EHCI_CMD_ITC_1)
607 printf(" EHCI_CMD_ITC_1\n");
608 if (i & EHCI_CMD_ITC_2)
609 printf(" EHCI_CMD_ITC_2\n");
610 if (i & EHCI_CMD_ITC_4)
611 printf(" EHCI_CMD_ITC_4\n");
612 if (i & EHCI_CMD_ITC_8)
613 printf(" EHCI_CMD_ITC_8\n");
614 if (i & EHCI_CMD_ITC_16)
615 printf(" EHCI_CMD_ITC_16\n");
616 if (i & EHCI_CMD_ITC_32)
617 printf(" EHCI_CMD_ITC_32\n");
618 if (i & EHCI_CMD_ITC_64)
619 printf(" EHCI_CMD_ITC_64\n");
620 if (i & EHCI_CMD_ASPME)
621 printf(" EHCI_CMD_ASPME\n");
622 if (i & EHCI_CMD_ASPMC)
623 printf(" EHCI_CMD_ASPMC\n");
624 if (i & EHCI_CMD_LHCR)
625 printf(" EHCI_CMD_LHCR\n");
626 if (i & EHCI_CMD_IAAD)
627 printf(" EHCI_CMD_IAAD\n");
628 if (i & EHCI_CMD_ASE)
629 printf(" EHCI_CMD_ASE\n");
630 if (i & EHCI_CMD_PSE)
631 printf(" EHCI_CMD_PSE\n");
632 if (i & EHCI_CMD_FLS_M)
633 printf(" EHCI_CMD_FLS_M\n");
634 if (i & EHCI_CMD_HCRESET)
635 printf(" EHCI_CMD_HCRESET\n");
637 printf(" EHCI_CMD_RS\n");
639 i = EOREAD4(sc, EHCI_USBSTS);
641 printf("sts=0x%08x\n", i);
643 if (i & EHCI_STS_ASS)
644 printf(" EHCI_STS_ASS\n");
645 if (i & EHCI_STS_PSS)
646 printf(" EHCI_STS_PSS\n");
647 if (i & EHCI_STS_REC)
648 printf(" EHCI_STS_REC\n");
649 if (i & EHCI_STS_HCH)
650 printf(" EHCI_STS_HCH\n");
651 if (i & EHCI_STS_IAA)
652 printf(" EHCI_STS_IAA\n");
653 if (i & EHCI_STS_HSE)
654 printf(" EHCI_STS_HSE\n");
655 if (i & EHCI_STS_FLR)
656 printf(" EHCI_STS_FLR\n");
657 if (i & EHCI_STS_PCD)
658 printf(" EHCI_STS_PCD\n");
659 if (i & EHCI_STS_ERRINT)
660 printf(" EHCI_STS_ERRINT\n");
661 if (i & EHCI_STS_INT)
662 printf(" EHCI_STS_INT\n");
664 printf("ien=0x%08x\n",
665 EOREAD4(sc, EHCI_USBINTR));
666 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
667 EOREAD4(sc, EHCI_FRINDEX),
668 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
669 EOREAD4(sc, EHCI_PERIODICLISTBASE),
670 EOREAD4(sc, EHCI_ASYNCLISTADDR));
671 for (i = 1; i <= sc->sc_noport; i++) {
672 printf("port %d status=0x%08x\n", i,
673 EOREAD4(sc, EHCI_PORTSC(i)));
678 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
680 link = hc32toh(sc, link);
681 printf("0x%08x", link);
682 if (link & EHCI_LINK_TERMINATE)
687 switch (EHCI_LINK_TYPE(link)) {
707 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
712 ehci_dump_link(sc, qtd->qtd_next, 0);
714 ehci_dump_link(sc, qtd->qtd_altnext, 0);
716 s = hc32toh(sc, qtd->qtd_status);
717 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
718 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
719 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
720 printf(" cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
721 EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
722 (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
723 (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
724 (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
725 (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
726 (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
727 (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
728 (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
729 (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
731 for (s = 0; s < 5; s++) {
732 printf(" buffer[%d]=0x%08x\n", s,
733 hc32toh(sc, qtd->qtd_buffer[s]));
735 for (s = 0; s < 5; s++) {
736 printf(" buffer_hi[%d]=0x%08x\n", s,
737 hc32toh(sc, qtd->qtd_buffer_hi[s]));
742 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
746 usb_pc_cpu_invalidate(sqtd->page_cache);
747 printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
748 ehci_dump_qtd(sc, sqtd);
749 temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
754 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
760 for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
761 stop = ehci_dump_sqtd(sc, sqtd);
764 printf("dump aborted, too many TDs\n");
769 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
774 usb_pc_cpu_invalidate(qh->page_cache);
775 printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
777 ehci_dump_link(sc, qh->qh_link, 1);
779 endp = hc32toh(sc, qh->qh_endp);
780 printf(" endp=0x%08x\n", endp);
781 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
782 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
783 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
784 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
785 printf(" mpl=0x%x ctl=%d nrl=%d\n",
786 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
787 EHCI_QH_GET_NRL(endp));
788 endphub = hc32toh(sc, qh->qh_endphub);
789 printf(" endphub=0x%08x\n", endphub);
790 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
791 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
792 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
793 EHCI_QH_GET_MULT(endphub));
795 ehci_dump_link(sc, qh->qh_curqtd, 0);
797 printf("Overlay qTD:\n");
798 ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
802 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
804 usb_pc_cpu_invalidate(sitd->page_cache);
805 printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
806 printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
807 printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
808 hc32toh(sc, sitd->sitd_portaddr),
809 (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
811 EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
812 EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
813 EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
814 EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
815 printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
816 printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
817 (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
818 EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
819 printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
820 hc32toh(sc, sitd->sitd_back),
821 hc32toh(sc, sitd->sitd_bp[0]),
822 hc32toh(sc, sitd->sitd_bp[1]),
823 hc32toh(sc, sitd->sitd_bp_hi[0]),
824 hc32toh(sc, sitd->sitd_bp_hi[1]));
828 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
830 usb_pc_cpu_invalidate(itd->page_cache);
831 printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
832 printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
833 printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
834 (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
835 printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
836 (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
837 printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
838 (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
839 printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
840 (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
841 printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
842 (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
843 printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
844 (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
845 printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
846 (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
847 printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
848 (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
849 printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
850 printf(" addr=0x%02x; endpt=0x%01x\n",
851 EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
852 EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
853 printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
854 printf(" dir=%s; mpl=0x%02x\n",
855 (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
856 EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
857 printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
858 hc32toh(sc, itd->itd_bp[2]),
859 hc32toh(sc, itd->itd_bp[3]),
860 hc32toh(sc, itd->itd_bp[4]),
861 hc32toh(sc, itd->itd_bp[5]),
862 hc32toh(sc, itd->itd_bp[6]));
863 printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
864 " 0x%08x,0x%08x,0x%08x\n",
865 hc32toh(sc, itd->itd_bp_hi[0]),
866 hc32toh(sc, itd->itd_bp_hi[1]),
867 hc32toh(sc, itd->itd_bp_hi[2]),
868 hc32toh(sc, itd->itd_bp_hi[3]),
869 hc32toh(sc, itd->itd_bp_hi[4]),
870 hc32toh(sc, itd->itd_bp_hi[5]),
871 hc32toh(sc, itd->itd_bp_hi[6]));
875 ehci_dump_isoc(ehci_softc_t *sc)
882 pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
883 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
885 printf("%s: isochronous dump from frame 0x%03x:\n",
888 itd = sc->sc_isoc_hs_p_last[pos];
889 sitd = sc->sc_isoc_fs_p_last[pos];
891 while (itd && max && max--) {
892 ehci_dump_itd(sc, itd);
896 while (sitd && max && max--) {
897 ehci_dump_sitd(sc, sitd);
905 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
907 /* check for early completion */
908 if (ehci_check_transfer(xfer)) {
911 /* put transfer on interrupt queue */
912 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
914 /* start timeout, if any */
915 if (xfer->timeout != 0) {
916 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
920 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
922 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
924 DPRINTFN(11, "%p to %p\n", std, last);
926 /* (sc->sc_bus.mtx) must be locked */
928 std->next = last->next;
929 std->sitd_next = last->sitd_next;
933 usb_pc_cpu_flush(std->page_cache);
936 * the last->next->prev is never followed: std->next->prev = std;
939 last->sitd_next = std->sitd_self;
941 usb_pc_cpu_flush(last->page_cache);
946 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
948 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
950 DPRINTFN(11, "%p to %p\n", std, last);
952 /* (sc->sc_bus.mtx) must be locked */
954 std->next = last->next;
955 std->itd_next = last->itd_next;
959 usb_pc_cpu_flush(std->page_cache);
962 * the last->next->prev is never followed: std->next->prev = std;
965 last->itd_next = std->itd_self;
967 usb_pc_cpu_flush(last->page_cache);
972 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
974 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
976 DPRINTFN(11, "%p to %p\n", sqh, last);
978 if (sqh->prev != NULL) {
979 /* should not happen */
980 DPRINTFN(0, "QH already linked!\n");
983 /* (sc->sc_bus.mtx) must be locked */
985 sqh->next = last->next;
986 sqh->qh_link = last->qh_link;
990 usb_pc_cpu_flush(sqh->page_cache);
993 * the last->next->prev is never followed: sqh->next->prev = sqh;
997 last->qh_link = sqh->qh_self;
999 usb_pc_cpu_flush(last->page_cache);
1004 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1005 static ehci_sitd_t *
1006 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1008 DPRINTFN(11, "%p from %p\n", std, last);
1010 /* (sc->sc_bus.mtx) must be locked */
1012 std->prev->next = std->next;
1013 std->prev->sitd_next = std->sitd_next;
1015 usb_pc_cpu_flush(std->prev->page_cache);
1018 std->next->prev = std->prev;
1019 usb_pc_cpu_flush(std->next->page_cache);
1021 return ((last == std) ? std->prev : last);
1024 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1026 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1028 DPRINTFN(11, "%p from %p\n", std, last);
1030 /* (sc->sc_bus.mtx) must be locked */
1032 std->prev->next = std->next;
1033 std->prev->itd_next = std->itd_next;
1035 usb_pc_cpu_flush(std->prev->page_cache);
1038 std->next->prev = std->prev;
1039 usb_pc_cpu_flush(std->next->page_cache);
1041 return ((last == std) ? std->prev : last);
1044 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1046 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1048 DPRINTFN(11, "%p from %p\n", sqh, last);
1050 /* (sc->sc_bus.mtx) must be locked */
1052 /* only remove if not removed from a queue */
1054 sqh->prev->next = sqh->next;
1055 sqh->prev->qh_link = sqh->qh_link;
1057 usb_pc_cpu_flush(sqh->prev->page_cache);
1060 sqh->next->prev = sqh->prev;
1061 usb_pc_cpu_flush(sqh->next->page_cache);
1063 last = ((last == sqh) ? sqh->prev : last);
1067 usb_pc_cpu_flush(sqh->page_cache);
1073 ehci_data_toggle_update(struct usb_xfer *xfer, uint16_t actlen, uint16_t xlen)
1078 /* count number of full packets */
1079 dt = (actlen / xfer->max_packet_size) & 1;
1081 /* compute remainder */
1082 rem = actlen % xfer->max_packet_size;
1085 dt ^= 1; /* short packet at the end */
1086 else if (actlen != xlen)
1087 dt ^= 1; /* zero length packet at the end */
1089 dt ^= 1; /* zero length transfer */
1091 xfer->endpoint->toggle_next ^= dt;
1095 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1097 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1099 ehci_qtd_t *td_alt_next;
1103 td = xfer->td_transfer_cache;
1104 td_alt_next = td->alt_next;
1106 if (xfer->aframes != xfer->nframes) {
1107 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1110 usb_pc_cpu_invalidate(td->page_cache);
1111 status = hc32toh(sc, td->qtd_status);
1113 len = EHCI_QTD_GET_BYTES(status);
1116 * Verify the status length and
1117 * add the length to "frlengths[]":
1119 if (len > td->len) {
1120 /* should not happen */
1121 DPRINTF("Invalid status length, "
1122 "0x%04x/0x%04x bytes\n", len, td->len);
1123 status |= EHCI_QTD_HALTED;
1124 } else if (xfer->aframes != xfer->nframes) {
1125 xfer->frlengths[xfer->aframes] += td->len - len;
1126 /* manually update data toggle */
1127 ehci_data_toggle_update(xfer, td->len - len, td->len);
1130 /* Check for last transfer */
1131 if (((void *)td) == xfer->td_transfer_last) {
1135 /* Check for transfer error */
1136 if (status & EHCI_QTD_HALTED) {
1137 /* the transfer is finished */
1141 /* Check for short transfer */
1143 if (xfer->flags_int.short_frames_ok) {
1144 /* follow alt next */
1147 /* the transfer is finished */
1154 if (td->alt_next != td_alt_next) {
1155 /* this USB frame is complete */
1160 /* update transfer cache */
1162 xfer->td_transfer_cache = td;
1165 if (status & EHCI_QTD_STATERRS) {
1166 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1167 "status=%s%s%s%s%s%s%s%s\n",
1168 xfer->address, xfer->endpointno, xfer->aframes,
1169 (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1170 (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1171 (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1172 (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1173 (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1174 (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1175 (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1176 (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1179 if (status & EHCI_QTD_HALTED) {
1180 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1181 (xfer->xroot->udev->address != 0)) {
1182 /* try to separate I/O errors from STALL */
1183 if (EHCI_QTD_GET_CERR(status) == 0)
1184 return (USB_ERR_IOERROR);
1186 return (USB_ERR_STALLED);
1188 return (USB_ERR_NORMAL_COMPLETION);
1192 ehci_non_isoc_done(struct usb_xfer *xfer)
1195 usb_error_t err = 0;
1197 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1198 xfer, xfer->endpoint);
1201 if (ehcidebug > 10) {
1202 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1204 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1208 /* extract data toggle directly from the QH's overlay area */
1210 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1212 usb_pc_cpu_invalidate(qh->page_cache);
1216 xfer->td_transfer_cache = xfer->td_transfer_first;
1218 if (xfer->flags_int.control_xfr) {
1219 if (xfer->flags_int.control_hdr) {
1220 err = ehci_non_isoc_done_sub(xfer);
1224 if (xfer->td_transfer_cache == NULL) {
1228 while (xfer->aframes != xfer->nframes) {
1229 err = ehci_non_isoc_done_sub(xfer);
1232 if (xfer->td_transfer_cache == NULL) {
1237 if (xfer->flags_int.control_xfr &&
1238 !xfer->flags_int.control_act) {
1239 err = ehci_non_isoc_done_sub(xfer);
1242 ehci_device_done(xfer, err);
1245 /*------------------------------------------------------------------------*
1246 * ehci_check_transfer
1249 * 0: USB transfer is not finished
1250 * Else: USB transfer is finished
1251 *------------------------------------------------------------------------*/
1253 ehci_check_transfer(struct usb_xfer *xfer)
1255 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1256 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1260 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1262 if (methods == &ehci_device_isoc_fs_methods) {
1265 /* isochronous full speed transfer */
1267 td = xfer->td_transfer_last;
1268 usb_pc_cpu_invalidate(td->page_cache);
1269 status = hc32toh(sc, td->sitd_status);
1271 /* also check if first is complete */
1273 td = xfer->td_transfer_first;
1274 usb_pc_cpu_invalidate(td->page_cache);
1275 status |= hc32toh(sc, td->sitd_status);
1277 if (!(status & EHCI_SITD_ACTIVE)) {
1278 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1281 } else if (methods == &ehci_device_isoc_hs_methods) {
1284 /* isochronous high speed transfer */
1286 /* check last transfer */
1287 td = xfer->td_transfer_last;
1288 usb_pc_cpu_invalidate(td->page_cache);
1289 status = td->itd_status[0];
1290 status |= td->itd_status[1];
1291 status |= td->itd_status[2];
1292 status |= td->itd_status[3];
1293 status |= td->itd_status[4];
1294 status |= td->itd_status[5];
1295 status |= td->itd_status[6];
1296 status |= td->itd_status[7];
1298 /* also check first transfer */
1299 td = xfer->td_transfer_first;
1300 usb_pc_cpu_invalidate(td->page_cache);
1301 status |= td->itd_status[0];
1302 status |= td->itd_status[1];
1303 status |= td->itd_status[2];
1304 status |= td->itd_status[3];
1305 status |= td->itd_status[4];
1306 status |= td->itd_status[5];
1307 status |= td->itd_status[6];
1308 status |= td->itd_status[7];
1310 /* if no transactions are active we continue */
1311 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1312 ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1319 /* non-isochronous transfer */
1322 * check whether there is an error somewhere in the middle,
1323 * or whether there was a short packet (SPD and not ACTIVE)
1325 td = xfer->td_transfer_cache;
1327 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1329 usb_pc_cpu_invalidate(qh->page_cache);
1331 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1332 if (status & EHCI_QTD_ACTIVE) {
1333 /* transfer is pending */
1338 usb_pc_cpu_invalidate(td->page_cache);
1339 status = hc32toh(sc, td->qtd_status);
1342 * Check if there is an active TD which
1343 * indicates that the transfer isn't done.
1345 if (status & EHCI_QTD_ACTIVE) {
1347 xfer->td_transfer_cache = td;
1351 * last transfer descriptor makes the transfer done
1353 if (((void *)td) == xfer->td_transfer_last) {
1357 * any kind of error makes the transfer done
1359 if (status & EHCI_QTD_HALTED) {
1363 * if there is no alternate next transfer, a short
1364 * packet also makes the transfer done
1366 if (EHCI_QTD_GET_BYTES(status)) {
1367 if (xfer->flags_int.short_frames_ok) {
1368 /* follow alt next */
1374 /* transfer is done */
1379 ehci_non_isoc_done(xfer);
1384 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1392 ehci_pcd_enable(ehci_softc_t *sc)
1394 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1396 sc->sc_eintrs |= EHCI_STS_PCD;
1397 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1399 /* acknowledge any PCD interrupt */
1400 EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1406 ehci_interrupt_poll(ehci_softc_t *sc)
1408 struct usb_xfer *xfer;
1411 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1413 * check if transfer is transferred
1415 if (ehci_check_transfer(xfer)) {
1416 /* queue has been modified */
1423 * Some EHCI chips from VIA / ATI seem to trigger interrupts before
1424 * writing back the qTD status, or miss signalling occasionally under
1425 * heavy load. If the host machine is too fast, we can miss
1426 * transaction completion - when we scan the active list the
1427 * transaction still seems to be active. This generally exhibits
1428 * itself as a umass stall that never recovers.
1430 * We work around this behaviour by setting up this callback after any
1431 * softintr that completes with transactions still pending, giving us
1432 * another chance to check for completion after the writeback has
1436 ehci_poll_timeout(void *arg)
1438 ehci_softc_t *sc = arg;
1441 ehci_interrupt_poll(sc);
1444 /*------------------------------------------------------------------------*
1445 * ehci_interrupt - EHCI interrupt handler
1447 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1448 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1450 *------------------------------------------------------------------------*/
1452 ehci_interrupt(ehci_softc_t *sc)
1456 USB_BUS_LOCK(&sc->sc_bus);
1458 DPRINTFN(16, "real interrupt\n");
1461 if (ehcidebug > 15) {
1466 status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1468 /* the interrupt was not for us */
1471 if (!(status & sc->sc_eintrs)) {
1474 EOWRITE4(sc, EHCI_USBSTS, status); /* acknowledge */
1476 status &= sc->sc_eintrs;
1478 if (status & EHCI_STS_HSE) {
1479 printf("%s: unrecoverable error, "
1480 "controller halted\n", __FUNCTION__);
1486 if (status & EHCI_STS_PCD) {
1488 * Disable PCD interrupt for now, because it will be
1489 * on until the port has been reset.
1491 sc->sc_eintrs &= ~EHCI_STS_PCD;
1492 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1496 /* do not allow RHSC interrupts > 1 per second */
1497 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1498 (void *)&ehci_pcd_enable, sc);
1500 status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1503 /* block unprocessed interrupts */
1504 sc->sc_eintrs &= ~status;
1505 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1506 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1508 /* poll all the USB transfers */
1509 ehci_interrupt_poll(sc);
1511 if (sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) {
1512 usb_callout_reset(&sc->sc_tmo_poll, hz / 128,
1513 (void *)&ehci_poll_timeout, sc);
1517 USB_BUS_UNLOCK(&sc->sc_bus);
1521 * called when a request does not complete
1524 ehci_timeout(void *arg)
1526 struct usb_xfer *xfer = arg;
1528 DPRINTF("xfer=%p\n", xfer);
1530 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1532 /* transfer is transferred */
1533 ehci_device_done(xfer, USB_ERR_TIMEOUT);
1537 ehci_do_poll(struct usb_bus *bus)
1539 ehci_softc_t *sc = EHCI_BUS2SC(bus);
1541 USB_BUS_LOCK(&sc->sc_bus);
1542 ehci_interrupt_poll(sc);
1543 USB_BUS_UNLOCK(&sc->sc_bus);
1547 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1549 struct usb_page_search buf_res;
1551 ehci_qtd_t *td_next;
1552 ehci_qtd_t *td_alt_next;
1553 uint32_t buf_offset;
1557 uint32_t qtd_altnext;
1558 uint8_t shortpkt_old;
1561 terminate = temp->sc->sc_terminate_self;
1562 qtd_altnext = temp->sc->sc_terminate_self;
1565 shortpkt_old = temp->shortpkt;
1566 len_old = temp->len;
1572 td_next = temp->td_next;
1575 if (temp->len == 0) {
1576 if (temp->shortpkt) {
1579 /* send a Zero Length Packet, ZLP, last */
1585 average = temp->average;
1587 if (temp->len < average) {
1588 if (temp->len % temp->max_frame_size) {
1591 average = temp->len;
1595 if (td_next == NULL) {
1596 panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1601 td_next = td->obj_next;
1603 /* check if we are pre-computing */
1606 /* update remaining length */
1608 temp->len -= average;
1612 /* fill out current TD */
1616 htohc32(temp->sc, EHCI_QTD_IOC |
1617 EHCI_QTD_SET_BYTES(average));
1620 if (temp->auto_data_toggle == 0) {
1621 /* update data toggle, ZLP case */
1624 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1628 /* properly reset reserved fields */
1629 td->qtd_buffer[0] = 0;
1630 td->qtd_buffer[1] = 0;
1631 td->qtd_buffer[2] = 0;
1632 td->qtd_buffer[3] = 0;
1633 td->qtd_buffer[4] = 0;
1634 td->qtd_buffer_hi[0] = 0;
1635 td->qtd_buffer_hi[1] = 0;
1636 td->qtd_buffer_hi[2] = 0;
1637 td->qtd_buffer_hi[3] = 0;
1638 td->qtd_buffer_hi[4] = 0;
1642 if (temp->auto_data_toggle == 0) {
1643 /* update data toggle */
1645 if (howmany(average, temp->max_frame_size) & 1) {
1647 htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1652 /* update remaining length */
1654 temp->len -= average;
1656 /* fill out buffer pointers */
1658 usbd_get_page(temp->pc, buf_offset, &buf_res);
1660 htohc32(temp->sc, buf_res.physaddr);
1661 td->qtd_buffer_hi[0] = 0;
1665 while (average > EHCI_PAGE_SIZE) {
1666 average -= EHCI_PAGE_SIZE;
1667 buf_offset += EHCI_PAGE_SIZE;
1668 usbd_get_page(temp->pc, buf_offset, &buf_res);
1671 buf_res.physaddr & (~0xFFF));
1672 td->qtd_buffer_hi[x] = 0;
1677 * NOTE: The "average" variable is never zero after
1678 * exiting the loop above !
1680 * NOTE: We have to subtract one from the offset to
1681 * ensure that we are computing the physical address
1684 buf_offset += average;
1685 usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1688 buf_res.physaddr & (~0xFFF));
1689 td->qtd_buffer_hi[x] = 0;
1691 /* properly reset reserved fields */
1692 while (++x < EHCI_QTD_NBUFFERS) {
1693 td->qtd_buffer[x] = 0;
1694 td->qtd_buffer_hi[x] = 0;
1699 /* link the current TD with the next one */
1700 td->qtd_next = td_next->qtd_self;
1702 td->qtd_altnext = qtd_altnext;
1703 td->alt_next = td_alt_next;
1705 usb_pc_cpu_flush(td->page_cache);
1711 /* setup alt next pointer, if any */
1712 if (temp->last_frame) {
1714 qtd_altnext = terminate;
1716 /* we use this field internally */
1717 td_alt_next = td_next;
1718 if (temp->setup_alt_next) {
1719 qtd_altnext = td_next->qtd_self;
1721 qtd_altnext = terminate;
1726 temp->shortpkt = shortpkt_old;
1727 temp->len = len_old;
1731 temp->td_next = td_next;
1735 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1737 struct ehci_std_temp temp;
1738 const struct usb_pipe_methods *methods;
1742 uint32_t qh_endphub;
1745 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1746 xfer->address, UE_GET_ADDR(xfer->endpointno),
1747 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1749 temp.average = xfer->max_hc_frame_size;
1750 temp.max_frame_size = xfer->max_frame_size;
1751 temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1753 /* toggle the DMA set we are using */
1754 xfer->flags_int.curr_dma_set ^= 1;
1756 /* get next DMA set */
1757 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1759 xfer->td_transfer_first = td;
1760 xfer->td_transfer_cache = td;
1764 temp.qtd_status = 0;
1765 temp.last_frame = 0;
1766 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1768 if (xfer->flags_int.control_xfr) {
1769 if (xfer->endpoint->toggle_next) {
1772 htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1774 temp.auto_data_toggle = 0;
1776 temp.auto_data_toggle = 1;
1779 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1780 (xfer->xroot->udev->address != 0)) {
1783 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1785 /* check if we should prepend a setup message */
1787 if (xfer->flags_int.control_xfr) {
1788 if (xfer->flags_int.control_hdr) {
1789 xfer->endpoint->toggle_next = 0;
1792 htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1793 temp.qtd_status |= htohc32(temp.sc,
1795 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1796 EHCI_QTD_SET_TOGGLE(0));
1798 temp.len = xfer->frlengths[0];
1799 temp.pc = xfer->frbuffers + 0;
1800 temp.shortpkt = temp.len ? 1 : 0;
1801 /* check for last frame */
1802 if (xfer->nframes == 1) {
1803 /* no STATUS stage yet, SETUP is last */
1804 if (xfer->flags_int.control_act) {
1805 temp.last_frame = 1;
1806 temp.setup_alt_next = 0;
1809 ehci_setup_standard_chain_sub(&temp);
1816 while (x != xfer->nframes) {
1817 /* DATA0 / DATA1 message */
1819 temp.len = xfer->frlengths[x];
1820 temp.pc = xfer->frbuffers + x;
1824 if (x == xfer->nframes) {
1825 if (xfer->flags_int.control_xfr) {
1826 /* no STATUS stage yet, DATA is last */
1827 if (xfer->flags_int.control_act) {
1828 temp.last_frame = 1;
1829 temp.setup_alt_next = 0;
1832 temp.last_frame = 1;
1833 temp.setup_alt_next = 0;
1836 /* keep previous data toggle and error count */
1839 htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1840 EHCI_QTD_SET_TOGGLE(1));
1842 if (temp.len == 0) {
1843 /* make sure that we send an USB packet */
1848 /* regular data transfer */
1850 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1853 /* set endpoint direction */
1856 (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1857 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1858 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1859 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1860 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1862 ehci_setup_standard_chain_sub(&temp);
1865 /* check if we should append a status stage */
1867 if (xfer->flags_int.control_xfr &&
1868 !xfer->flags_int.control_act) {
1870 * Send a DATA1 message and invert the current endpoint
1874 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1875 EHCI_QTD_SET_TOGGLE(1));
1877 (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1878 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1879 EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1880 EHCI_QTD_SET_TOGGLE(1)) :
1881 htohc32(temp.sc, EHCI_QTD_ACTIVE |
1882 EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1883 EHCI_QTD_SET_TOGGLE(1));
1888 temp.last_frame = 1;
1889 temp.setup_alt_next = 0;
1891 ehci_setup_standard_chain_sub(&temp);
1895 /* the last TD terminates the transfer: */
1896 td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1897 td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1899 usb_pc_cpu_flush(td->page_cache);
1901 /* must have at least one frame! */
1903 xfer->td_transfer_last = td;
1906 if (ehcidebug > 8) {
1907 DPRINTF("nexttog=%d; data before transfer:\n",
1908 xfer->endpoint->toggle_next);
1909 ehci_dump_sqtds(temp.sc,
1910 xfer->td_transfer_first);
1914 methods = xfer->endpoint->methods;
1916 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1918 /* the "qh_link" field is filled when the QH is added */
1921 (EHCI_QH_SET_ADDR(xfer->address) |
1922 EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1923 EHCI_QH_SET_MPL(xfer->max_packet_size));
1925 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1926 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH);
1927 if (methods != &ehci_device_intr_methods)
1928 qh_endp |= EHCI_QH_SET_NRL(8);
1930 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1931 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL);
1933 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW);
1936 if (methods == &ehci_device_ctrl_methods) {
1937 qh_endp |= EHCI_QH_CTL;
1939 if (methods != &ehci_device_intr_methods) {
1940 /* Only try one time per microframe! */
1941 qh_endp |= EHCI_QH_SET_NRL(1);
1945 if (temp.auto_data_toggle == 0) {
1946 /* software computes the data toggle */
1947 qh_endp |= EHCI_QH_DTC;
1950 qh->qh_endp = htohc32(temp.sc, qh_endp);
1953 (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1954 EHCI_QH_SET_CMASK(xfer->endpoint->usb_cmask) |
1955 EHCI_QH_SET_SMASK(xfer->endpoint->usb_smask) |
1956 EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
1957 EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
1959 qh->qh_endphub = htohc32(temp.sc, qh_endphub);
1962 /* fill the overlay qTD */
1964 if (temp.auto_data_toggle && xfer->endpoint->toggle_next) {
1966 qh->qh_qtd.qtd_status = htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1968 qh->qh_qtd.qtd_status = 0;
1971 td = xfer->td_transfer_first;
1973 qh->qh_qtd.qtd_next = td->qtd_self;
1974 qh->qh_qtd.qtd_altnext =
1975 htohc32(temp.sc, EHCI_LINK_TERMINATE);
1977 /* properly reset reserved fields */
1978 qh->qh_qtd.qtd_buffer[0] = 0;
1979 qh->qh_qtd.qtd_buffer[1] = 0;
1980 qh->qh_qtd.qtd_buffer[2] = 0;
1981 qh->qh_qtd.qtd_buffer[3] = 0;
1982 qh->qh_qtd.qtd_buffer[4] = 0;
1983 qh->qh_qtd.qtd_buffer_hi[0] = 0;
1984 qh->qh_qtd.qtd_buffer_hi[1] = 0;
1985 qh->qh_qtd.qtd_buffer_hi[2] = 0;
1986 qh->qh_qtd.qtd_buffer_hi[3] = 0;
1987 qh->qh_qtd.qtd_buffer_hi[4] = 0;
1989 usb_pc_cpu_flush(qh->page_cache);
1991 if (xfer->xroot->udev->flags.self_suspended == 0) {
1992 EHCI_APPEND_QH(qh, *qh_last);
1997 ehci_root_intr(ehci_softc_t *sc)
2002 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2004 /* clear any old interrupt data */
2005 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2008 m = (sc->sc_noport + 1);
2009 if (m > (8 * sizeof(sc->sc_hub_idata))) {
2010 m = (8 * sizeof(sc->sc_hub_idata));
2012 for (i = 1; i < m; i++) {
2013 /* pick out CHANGE bits from the status register */
2014 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2015 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2016 DPRINTF("port %d changed\n", i);
2019 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2020 sizeof(sc->sc_hub_idata));
2024 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2026 uint32_t nframes = xfer->nframes;
2028 uint32_t *plen = xfer->frlengths;
2030 ehci_sitd_t *td = xfer->td_transfer_first;
2031 ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2033 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2034 xfer, xfer->endpoint);
2038 panic("%s:%d: out of TD's\n",
2039 __FUNCTION__, __LINE__);
2041 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2042 pp_last = &sc->sc_isoc_fs_p_last[0];
2045 if (ehcidebug > 15) {
2046 DPRINTF("isoc FS-TD\n");
2047 ehci_dump_sitd(sc, td);
2050 usb_pc_cpu_invalidate(td->page_cache);
2051 status = hc32toh(sc, td->sitd_status);
2053 len = EHCI_SITD_GET_LEN(status);
2055 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2065 /* remove FS-TD from schedule */
2066 EHCI_REMOVE_FS_TD(td, *pp_last);
2073 xfer->aframes = xfer->nframes;
2077 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2079 uint32_t nframes = xfer->nframes;
2081 uint32_t *plen = xfer->frlengths;
2084 ehci_itd_t *td = xfer->td_transfer_first;
2085 ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2087 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2088 xfer, xfer->endpoint);
2092 panic("%s:%d: out of TD's\n",
2093 __FUNCTION__, __LINE__);
2095 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2096 pp_last = &sc->sc_isoc_hs_p_last[0];
2099 if (ehcidebug > 15) {
2100 DPRINTF("isoc HS-TD\n");
2101 ehci_dump_itd(sc, td);
2105 usb_pc_cpu_invalidate(td->page_cache);
2106 status = hc32toh(sc, td->itd_status[td_no]);
2108 len = EHCI_ITD_GET_LEN(status);
2110 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2112 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2115 * The length is valid. NOTE: The
2116 * complete length is written back
2117 * into the status field, and not the
2118 * remainder like with other transfer
2122 /* Invalid length - truncate */
2133 if ((td_no == 8) || (nframes == 0)) {
2134 /* remove HS-TD from schedule */
2135 EHCI_REMOVE_HS_TD(td, *pp_last);
2142 xfer->aframes = xfer->nframes;
2145 /* NOTE: "done" can be run two times in a row,
2146 * from close and from interrupt
2149 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2151 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
2152 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2154 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2156 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2157 xfer, xfer->endpoint, error);
2159 if ((methods == &ehci_device_bulk_methods) ||
2160 (methods == &ehci_device_ctrl_methods)) {
2162 if (ehcidebug > 8) {
2163 DPRINTF("nexttog=%d; data after transfer:\n",
2164 xfer->endpoint->toggle_next);
2166 xfer->td_transfer_first);
2170 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2171 sc->sc_async_p_last);
2173 if (methods == &ehci_device_intr_methods) {
2174 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2175 sc->sc_intr_p_last[xfer->qh_pos]);
2178 * Only finish isochronous transfers once which will update
2179 * "xfer->frlengths".
2181 if (xfer->td_transfer_first &&
2182 xfer->td_transfer_last) {
2183 if (methods == &ehci_device_isoc_fs_methods) {
2184 ehci_isoc_fs_done(sc, xfer);
2186 if (methods == &ehci_device_isoc_hs_methods) {
2187 ehci_isoc_hs_done(sc, xfer);
2189 xfer->td_transfer_first = NULL;
2190 xfer->td_transfer_last = NULL;
2192 /* dequeue transfer and start next transfer */
2193 usbd_transfer_done(xfer, error);
2196 /*------------------------------------------------------------------------*
2198 *------------------------------------------------------------------------*/
2200 ehci_device_bulk_open(struct usb_xfer *xfer)
2206 ehci_device_bulk_close(struct usb_xfer *xfer)
2208 ehci_device_done(xfer, USB_ERR_CANCELLED);
2212 ehci_device_bulk_enter(struct usb_xfer *xfer)
2218 ehci_doorbell_async(struct ehci_softc *sc)
2223 * XXX Performance quirk: Some Host Controllers have a too low
2224 * interrupt rate. Issue an IAAD to stimulate the Host
2225 * Controller after queueing the BULK transfer.
2227 * XXX Force the host controller to refresh any QH caches.
2229 temp = EOREAD4(sc, EHCI_USBCMD);
2230 if (!(temp & EHCI_CMD_IAAD))
2231 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2235 ehci_device_bulk_start(struct usb_xfer *xfer)
2237 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2239 /* setup TD's and QH */
2240 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2242 /* put transfer on interrupt queue */
2243 ehci_transfer_intr_enqueue(xfer);
2246 * XXX Certain nVidia chipsets choke when using the IAAD
2247 * feature too frequently.
2249 if (sc->sc_flags & EHCI_SCFLG_IAADBUG)
2252 ehci_doorbell_async(sc);
2255 static const struct usb_pipe_methods ehci_device_bulk_methods =
2257 .open = ehci_device_bulk_open,
2258 .close = ehci_device_bulk_close,
2259 .enter = ehci_device_bulk_enter,
2260 .start = ehci_device_bulk_start,
2263 /*------------------------------------------------------------------------*
2264 * ehci control support
2265 *------------------------------------------------------------------------*/
2267 ehci_device_ctrl_open(struct usb_xfer *xfer)
2273 ehci_device_ctrl_close(struct usb_xfer *xfer)
2275 ehci_device_done(xfer, USB_ERR_CANCELLED);
2279 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2285 ehci_device_ctrl_start(struct usb_xfer *xfer)
2287 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2289 /* setup TD's and QH */
2290 ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2292 /* put transfer on interrupt queue */
2293 ehci_transfer_intr_enqueue(xfer);
2296 static const struct usb_pipe_methods ehci_device_ctrl_methods =
2298 .open = ehci_device_ctrl_open,
2299 .close = ehci_device_ctrl_close,
2300 .enter = ehci_device_ctrl_enter,
2301 .start = ehci_device_ctrl_start,
2304 /*------------------------------------------------------------------------*
2305 * ehci interrupt support
2306 *------------------------------------------------------------------------*/
2308 ehci_device_intr_open(struct usb_xfer *xfer)
2310 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2315 usb_hs_bandwidth_alloc(xfer);
2318 * Find the best QH position corresponding to the given interval:
2322 bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2324 if (xfer->interval >= bit) {
2328 if (sc->sc_intr_stat[x] <
2329 sc->sc_intr_stat[best]) {
2339 sc->sc_intr_stat[best]++;
2340 xfer->qh_pos = best;
2342 DPRINTFN(3, "best=%d interval=%d\n",
2343 best, xfer->interval);
2347 ehci_device_intr_close(struct usb_xfer *xfer)
2349 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2351 sc->sc_intr_stat[xfer->qh_pos]--;
2353 ehci_device_done(xfer, USB_ERR_CANCELLED);
2355 /* bandwidth must be freed after device done */
2356 usb_hs_bandwidth_free(xfer);
2360 ehci_device_intr_enter(struct usb_xfer *xfer)
2366 ehci_device_intr_start(struct usb_xfer *xfer)
2368 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2370 /* setup TD's and QH */
2371 ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2373 /* put transfer on interrupt queue */
2374 ehci_transfer_intr_enqueue(xfer);
2377 static const struct usb_pipe_methods ehci_device_intr_methods =
2379 .open = ehci_device_intr_open,
2380 .close = ehci_device_intr_close,
2381 .enter = ehci_device_intr_enter,
2382 .start = ehci_device_intr_start,
2385 /*------------------------------------------------------------------------*
2386 * ehci full speed isochronous support
2387 *------------------------------------------------------------------------*/
2389 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2391 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2393 uint32_t sitd_portaddr;
2397 EHCI_SITD_SET_ADDR(xfer->address) |
2398 EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2399 EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2400 EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2402 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2403 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2405 sitd_portaddr = htohc32(sc, sitd_portaddr);
2407 /* initialize all TD's */
2409 for (ds = 0; ds != 2; ds++) {
2410 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2411 td->sitd_portaddr = sitd_portaddr;
2414 * TODO: make some kind of automatic
2415 * SMASK/CMASK selection based on micro-frame
2418 * micro-frame usage (8 microframes per 1ms)
2420 td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2422 usb_pc_cpu_flush(td->page_cache);
2428 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2430 ehci_device_done(xfer, USB_ERR_CANCELLED);
2434 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2436 struct usb_page_search buf_res;
2437 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2439 ehci_sitd_t *td_last = NULL;
2440 ehci_sitd_t **pp_last;
2442 uint32_t buf_offset;
2455 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2456 xfer, xfer->endpoint->isoc_next, xfer->nframes);
2458 /* get the current frame index */
2460 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2463 * check if the frame index is within the window where the frames
2466 buf_offset = (nframes - xfer->endpoint->isoc_next) &
2467 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2469 if ((xfer->endpoint->is_synced == 0) ||
2470 (buf_offset < xfer->nframes)) {
2472 * If there is data underflow or the pipe queue is empty we
2473 * schedule the transfer a few frames ahead of the current
2474 * frame position. Else two isochronous transfers might
2477 xfer->endpoint->isoc_next = (nframes + 3) &
2478 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2479 xfer->endpoint->is_synced = 1;
2480 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2483 * compute how many milliseconds the insertion is ahead of the
2484 * current frame position:
2486 buf_offset = (xfer->endpoint->isoc_next - nframes) &
2487 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2490 * pre-compute when the isochronous transfer will be finished:
2492 xfer->isoc_time_complete =
2493 usb_isoc_time_expand(&sc->sc_bus, nframes) +
2494 buf_offset + xfer->nframes;
2496 /* get the real number of frames */
2498 nframes = xfer->nframes;
2502 plen = xfer->frlengths;
2504 /* toggle the DMA set we are using */
2505 xfer->flags_int.curr_dma_set ^= 1;
2507 /* get next DMA set */
2508 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2509 xfer->td_transfer_first = td;
2511 pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2513 /* store starting position */
2515 xfer->qh_pos = xfer->endpoint->isoc_next;
2519 panic("%s:%d: out of TD's\n",
2520 __FUNCTION__, __LINE__);
2522 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT])
2523 pp_last = &sc->sc_isoc_fs_p_last[0];
2525 /* reuse sitd_portaddr and sitd_back from last transfer */
2527 if (*plen > xfer->max_frame_size) {
2531 printf("%s: frame length(%d) exceeds %d "
2532 "bytes (frame truncated)\n",
2533 __FUNCTION__, *plen,
2534 xfer->max_frame_size);
2537 *plen = xfer->max_frame_size;
2540 /* allocate a slot */
2542 sa = usbd_fs_isoc_schedule_alloc_slot(xfer,
2543 xfer->isoc_time_complete - nframes - 1);
2547 * Schedule is FULL, set length to zero:
2551 sa = USB_FS_ISOC_UFRAME_MAX - 1;
2555 * only call "usbd_get_page()" when we have a
2558 usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2559 td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2560 buf_offset += *plen;
2562 * NOTE: We need to subtract one from the offset so
2563 * that we are on a valid page!
2565 usbd_get_page(xfer->frbuffers, buf_offset - 1,
2567 temp = buf_res.physaddr & ~0xFFF;
2573 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2576 temp |= 1; /* T-count = 1, TP = ALL */
2581 temp |= tlen; /* T-count = [1..6] */
2582 temp |= 8; /* TP = Begin */
2594 sa = (sb - sa) & 0x3F;
2597 sb = (-(4 << sa)) & 0xFE;
2598 sa = (1 << sa) & 0x3F;
2601 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2602 EHCI_SITD_SET_CMASK(sb));
2604 td->sitd_bp[1] = htohc32(sc, temp);
2606 td->sitd_mask = htohc32(sc, sitd_mask);
2609 td->sitd_status = htohc32(sc,
2612 EHCI_SITD_SET_LEN(*plen));
2614 td->sitd_status = htohc32(sc,
2616 EHCI_SITD_SET_LEN(*plen));
2618 usb_pc_cpu_flush(td->page_cache);
2621 if (ehcidebug > 15) {
2622 DPRINTF("FS-TD %d\n", nframes);
2623 ehci_dump_sitd(sc, td);
2626 /* insert TD into schedule */
2627 EHCI_APPEND_FS_TD(td, *pp_last);
2635 xfer->td_transfer_last = td_last;
2637 /* update isoc_next */
2638 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2639 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2642 * We don't allow cancelling of the SPLIT transaction USB FULL
2643 * speed transfer, because it disturbs the bandwidth
2644 * computation algorithm.
2646 xfer->flags_int.can_cancel_immed = 0;
2650 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2653 * We don't allow cancelling of the SPLIT transaction USB FULL
2654 * speed transfer, because it disturbs the bandwidth
2655 * computation algorithm.
2657 xfer->flags_int.can_cancel_immed = 0;
2659 /* set a default timeout */
2660 if (xfer->timeout == 0)
2661 xfer->timeout = 500; /* ms */
2663 /* put transfer on interrupt queue */
2664 ehci_transfer_intr_enqueue(xfer);
2667 static const struct usb_pipe_methods ehci_device_isoc_fs_methods =
2669 .open = ehci_device_isoc_fs_open,
2670 .close = ehci_device_isoc_fs_close,
2671 .enter = ehci_device_isoc_fs_enter,
2672 .start = ehci_device_isoc_fs_start,
2675 /*------------------------------------------------------------------------*
2676 * ehci high speed isochronous support
2677 *------------------------------------------------------------------------*/
2679 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2681 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2686 usb_hs_bandwidth_alloc(xfer);
2688 /* initialize all TD's */
2690 for (ds = 0; ds != 2; ds++) {
2691 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2692 /* set TD inactive */
2693 td->itd_status[0] = 0;
2694 td->itd_status[1] = 0;
2695 td->itd_status[2] = 0;
2696 td->itd_status[3] = 0;
2697 td->itd_status[4] = 0;
2698 td->itd_status[5] = 0;
2699 td->itd_status[6] = 0;
2700 td->itd_status[7] = 0;
2702 /* set endpoint and address */
2703 td->itd_bp[0] = htohc32(sc,
2704 EHCI_ITD_SET_ADDR(xfer->address) |
2705 EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2708 EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2711 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2712 temp |= EHCI_ITD_SET_DIR_IN;
2714 /* set maximum packet size */
2715 td->itd_bp[1] = htohc32(sc, temp);
2717 /* set transfer multiplier */
2718 td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2720 usb_pc_cpu_flush(td->page_cache);
2726 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2728 ehci_device_done(xfer, USB_ERR_CANCELLED);
2730 /* bandwidth must be freed after device done */
2731 usb_hs_bandwidth_free(xfer);
2735 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2737 struct usb_page_search buf_res;
2738 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2740 ehci_itd_t *td_last = NULL;
2741 ehci_itd_t **pp_last;
2742 bus_size_t page_addr;
2745 uint32_t buf_offset;
2747 uint32_t itd_offset[8 + 1];
2751 uint8_t shift = usbd_xfer_get_fps_shift(xfer);
2758 DPRINTFN(6, "xfer=%p next=%d nframes=%d shift=%d\n",
2759 xfer, xfer->endpoint->isoc_next, xfer->nframes, (int)shift);
2761 /* get the current frame index */
2763 nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2766 * check if the frame index is within the window where the frames
2769 buf_offset = (nframes - xfer->endpoint->isoc_next) &
2770 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2772 if ((xfer->endpoint->is_synced == 0) ||
2773 (buf_offset < (((xfer->nframes << shift) + 7) / 8))) {
2775 * If there is data underflow or the pipe queue is empty we
2776 * schedule the transfer a few frames ahead of the current
2777 * frame position. Else two isochronous transfers might
2780 xfer->endpoint->isoc_next = (nframes + 3) &
2781 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2782 xfer->endpoint->is_synced = 1;
2783 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2786 * compute how many milliseconds the insertion is ahead of the
2787 * current frame position:
2789 buf_offset = (xfer->endpoint->isoc_next - nframes) &
2790 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2793 * pre-compute when the isochronous transfer will be finished:
2795 xfer->isoc_time_complete =
2796 usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2797 (((xfer->nframes << shift) + 7) / 8);
2799 /* get the real number of frames */
2801 nframes = xfer->nframes;
2806 plen = xfer->frlengths;
2808 /* toggle the DMA set we are using */
2809 xfer->flags_int.curr_dma_set ^= 1;
2811 /* get next DMA set */
2812 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2813 xfer->td_transfer_first = td;
2815 pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2817 /* store starting position */
2819 xfer->qh_pos = xfer->endpoint->isoc_next;
2823 panic("%s:%d: out of TD's\n",
2824 __FUNCTION__, __LINE__);
2826 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2827 pp_last = &sc->sc_isoc_hs_p_last[0];
2830 if (*plen > xfer->max_frame_size) {
2834 printf("%s: frame length(%d) exceeds %d bytes "
2835 "(frame truncated)\n",
2836 __FUNCTION__, *plen, xfer->max_frame_size);
2839 *plen = xfer->max_frame_size;
2842 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2843 status = (EHCI_ITD_SET_LEN(*plen) |
2845 EHCI_ITD_SET_PG(0));
2846 td->itd_status[td_no] = htohc32(sc, status);
2847 itd_offset[td_no] = buf_offset;
2848 buf_offset += *plen;
2852 td->itd_status[td_no] = 0; /* not active */
2853 itd_offset[td_no] = buf_offset;
2858 if ((td_no == 8) || (nframes == 0)) {
2859 /* the rest of the transfers are not active, if any */
2860 for (x = td_no; x != 8; x++) {
2861 td->itd_status[x] = 0; /* not active */
2864 /* check if there is any data to be transferred */
2865 if (itd_offset[0] != buf_offset) {
2867 itd_offset[td_no] = buf_offset;
2869 /* get first page offset */
2870 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2871 /* get page address */
2872 page_addr = buf_res.physaddr & ~0xFFF;
2873 /* update page address */
2874 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2875 td->itd_bp[0] |= htohc32(sc, page_addr);
2877 for (x = 0; x != td_no; x++) {
2878 /* set page number and page offset */
2879 status = (EHCI_ITD_SET_PG(page_no) |
2880 (buf_res.physaddr & 0xFFF));
2881 td->itd_status[x] |= htohc32(sc, status);
2883 /* get next page offset */
2884 if (itd_offset[x + 1] == buf_offset) {
2886 * We subtract one so that
2887 * we don't go off the last
2890 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2892 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2895 /* check if we need a new page */
2896 if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2897 /* new page needed */
2898 page_addr = buf_res.physaddr & ~0xFFF;
2900 panic("%s: too many pages\n", __FUNCTION__);
2903 /* update page address */
2904 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2905 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2909 /* set IOC bit if we are complete */
2911 td->itd_status[td_no - 1] |= htohc32(sc, EHCI_ITD_IOC);
2913 usb_pc_cpu_flush(td->page_cache);
2915 if (ehcidebug > 15) {
2916 DPRINTF("HS-TD %d\n", nframes);
2917 ehci_dump_itd(sc, td);
2920 /* insert TD into schedule */
2921 EHCI_APPEND_HS_TD(td, *pp_last);
2930 xfer->td_transfer_last = td_last;
2932 /* update isoc_next */
2933 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
2934 (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2938 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2940 /* put transfer on interrupt queue */
2941 ehci_transfer_intr_enqueue(xfer);
2944 static const struct usb_pipe_methods ehci_device_isoc_hs_methods =
2946 .open = ehci_device_isoc_hs_open,
2947 .close = ehci_device_isoc_hs_close,
2948 .enter = ehci_device_isoc_hs_enter,
2949 .start = ehci_device_isoc_hs_start,
2952 /*------------------------------------------------------------------------*
2953 * ehci root control support
2954 *------------------------------------------------------------------------*
2955 * Simulate a hardware hub by handling all the necessary requests.
2956 *------------------------------------------------------------------------*/
2959 struct usb_device_descriptor ehci_devd =
2961 sizeof(struct usb_device_descriptor),
2962 UDESC_DEVICE, /* type */
2963 {0x00, 0x02}, /* USB version */
2964 UDCLASS_HUB, /* class */
2965 UDSUBCLASS_HUB, /* subclass */
2966 UDPROTO_HSHUBSTT, /* protocol */
2967 64, /* max packet */
2968 {0}, {0}, {0x00, 0x01}, /* device id */
2969 1, 2, 0, /* string indexes */
2970 1 /* # of configurations */
2974 struct usb_device_qualifier ehci_odevd =
2976 sizeof(struct usb_device_qualifier),
2977 UDESC_DEVICE_QUALIFIER, /* type */
2978 {0x00, 0x02}, /* USB version */
2979 UDCLASS_HUB, /* class */
2980 UDSUBCLASS_HUB, /* subclass */
2981 UDPROTO_FSHUB, /* protocol */
2983 0, /* # of configurations */
2987 static const struct ehci_config_desc ehci_confd = {
2989 .bLength = sizeof(struct usb_config_descriptor),
2990 .bDescriptorType = UDESC_CONFIG,
2991 .wTotalLength[0] = sizeof(ehci_confd),
2993 .bConfigurationValue = 1,
2994 .iConfiguration = 0,
2995 .bmAttributes = UC_SELF_POWERED,
2996 .bMaxPower = 0 /* max power */
2999 .bLength = sizeof(struct usb_interface_descriptor),
3000 .bDescriptorType = UDESC_INTERFACE,
3002 .bInterfaceClass = UICLASS_HUB,
3003 .bInterfaceSubClass = UISUBCLASS_HUB,
3004 .bInterfaceProtocol = 0,
3007 .bLength = sizeof(struct usb_endpoint_descriptor),
3008 .bDescriptorType = UDESC_ENDPOINT,
3009 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3010 .bmAttributes = UE_INTERRUPT,
3011 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3017 struct usb_hub_descriptor ehci_hubd =
3019 .bDescLength = 0, /* dynamic length */
3020 .bDescriptorType = UDESC_HUB,
3024 ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index)
3028 v = EOREAD4(sc, EHCI_PORTSC(index));
3029 v = (v >> EHCI_PORTSC_PSPD_SHIFT) & EHCI_PORTSC_PSPD_MASK;
3031 if (v == EHCI_PORT_SPEED_HIGH)
3032 return (UPS_HIGH_SPEED);
3033 if (v == EHCI_PORT_SPEED_LOW)
3034 return (UPS_LOW_SPEED);
3039 ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index)
3043 v = EOREAD4(sc, EHCI_HOSTC(index));
3044 v = (v >> EHCI_HOSTC_PSPD_SHIFT) & EHCI_HOSTC_PSPD_MASK;
3046 if (v == EHCI_PORT_SPEED_HIGH)
3047 return (UPS_HIGH_SPEED);
3048 if (v == EHCI_PORT_SPEED_LOW)
3049 return (UPS_LOW_SPEED);
3054 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3059 DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3061 port = EHCI_PORTSC(index);
3062 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3063 EOWRITE4(sc, port, v | EHCI_PS_PO);
3067 ehci_roothub_exec(struct usb_device *udev,
3068 struct usb_device_request *req, const void **pptr, uint16_t *plength)
3070 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3071 const char *str_ptr;
3081 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3084 ptr = (const void *)&sc->sc_hub_desc;
3088 value = UGETW(req->wValue);
3089 index = UGETW(req->wIndex);
3091 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3092 "wValue=0x%04x wIndex=0x%04x\n",
3093 req->bmRequestType, req->bRequest,
3094 UGETW(req->wLength), value, index);
3096 #define C(x,y) ((x) | ((y) << 8))
3097 switch (C(req->bRequest, req->bmRequestType)) {
3098 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3099 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3100 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3102 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3103 * for the integrated root hub.
3106 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3108 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3110 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3111 switch (value >> 8) {
3113 if ((value & 0xff) != 0) {
3114 err = USB_ERR_IOERROR;
3117 len = sizeof(ehci_devd);
3118 ptr = (const void *)&ehci_devd;
3121 * We can't really operate at another speed,
3122 * but the specification says we need this
3125 case UDESC_DEVICE_QUALIFIER:
3126 if ((value & 0xff) != 0) {
3127 err = USB_ERR_IOERROR;
3130 len = sizeof(ehci_odevd);
3131 ptr = (const void *)&ehci_odevd;
3135 if ((value & 0xff) != 0) {
3136 err = USB_ERR_IOERROR;
3139 len = sizeof(ehci_confd);
3140 ptr = (const void *)&ehci_confd;
3144 switch (value & 0xff) {
3145 case 0: /* Language table */
3149 case 1: /* Vendor */
3150 str_ptr = sc->sc_vendor;
3153 case 2: /* Product */
3154 str_ptr = "EHCI root HUB";
3162 len = usb_make_str_desc(
3163 sc->sc_hub_desc.temp,
3164 sizeof(sc->sc_hub_desc.temp),
3168 err = USB_ERR_IOERROR;
3172 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3174 sc->sc_hub_desc.temp[0] = 0;
3176 case C(UR_GET_STATUS, UT_READ_DEVICE):
3178 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3180 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3181 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3183 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3185 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3186 if (value >= EHCI_MAX_DEVICES) {
3187 err = USB_ERR_IOERROR;
3190 sc->sc_addr = value;
3192 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3193 if ((value != 0) && (value != 1)) {
3194 err = USB_ERR_IOERROR;
3197 sc->sc_conf = value;
3199 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3201 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3202 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3203 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3204 err = USB_ERR_IOERROR;
3206 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3208 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3211 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3213 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3214 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3217 (index > sc->sc_noport)) {
3218 err = USB_ERR_IOERROR;
3221 port = EHCI_PORTSC(index);
3222 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3224 case UHF_PORT_ENABLE:
3225 EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3227 case UHF_PORT_SUSPEND:
3228 if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3230 * waking up a High Speed device is rather
3233 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3235 /* wait 20ms for resume sequence to complete */
3236 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3238 EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3239 EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3241 /* 4ms settle time */
3242 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3244 case UHF_PORT_POWER:
3245 EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3248 DPRINTFN(3, "clear port test "
3251 case UHF_PORT_INDICATOR:
3252 DPRINTFN(3, "clear port ind "
3254 EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3256 case UHF_C_PORT_CONNECTION:
3257 EOWRITE4(sc, port, v | EHCI_PS_CSC);
3259 case UHF_C_PORT_ENABLE:
3260 EOWRITE4(sc, port, v | EHCI_PS_PEC);
3262 case UHF_C_PORT_SUSPEND:
3263 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3265 case UHF_C_PORT_OVER_CURRENT:
3266 EOWRITE4(sc, port, v | EHCI_PS_OCC);
3268 case UHF_C_PORT_RESET:
3272 err = USB_ERR_IOERROR;
3276 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3277 if ((value & 0xff) != 0) {
3278 err = USB_ERR_IOERROR;
3281 v = EREAD4(sc, EHCI_HCSPARAMS);
3283 sc->sc_hub_desc.hubd = ehci_hubd;
3284 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3286 if (EHCI_HCS_PPC(v))
3287 i = UHD_PWR_INDIVIDUAL;
3289 i = UHD_PWR_NO_SWITCH;
3291 if (EHCI_HCS_P_INDICATOR(v))
3294 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics, i);
3295 /* XXX can't find out? */
3296 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3297 /* XXX don't know if ports are removable or not */
3298 sc->sc_hub_desc.hubd.bDescLength =
3299 8 + ((sc->sc_noport + 7) / 8);
3300 len = sc->sc_hub_desc.hubd.bDescLength;
3302 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3304 memset(sc->sc_hub_desc.temp, 0, 16);
3306 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3307 DPRINTFN(9, "get port status i=%d\n",
3310 (index > sc->sc_noport)) {
3311 err = USB_ERR_IOERROR;
3314 v = EOREAD4(sc, EHCI_PORTSC(index));
3315 DPRINTFN(9, "port status=0x%04x\n", v);
3316 if (sc->sc_flags & EHCI_SCFLG_TT) {
3317 if (sc->sc_vendor_get_port_speed != NULL) {
3318 i = sc->sc_vendor_get_port_speed(sc, index);
3320 device_printf(sc->sc_bus.bdev,
3321 "EHCI_SCFLG_TT quirk is set but "
3322 "sc_vendor_get_hub_speed() is NULL\n");
3329 i |= UPS_CURRENT_CONNECT_STATUS;
3331 i |= UPS_PORT_ENABLED;
3332 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3334 if (v & EHCI_PS_OCA)
3335 i |= UPS_OVERCURRENT_INDICATOR;
3339 i |= UPS_PORT_POWER;
3340 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3342 if (v & EHCI_PS_CSC)
3343 i |= UPS_C_CONNECT_STATUS;
3344 if (v & EHCI_PS_PEC)
3345 i |= UPS_C_PORT_ENABLED;
3346 if (v & EHCI_PS_OCC)
3347 i |= UPS_C_OVERCURRENT_INDICATOR;
3348 if (v & EHCI_PS_FPR)
3351 i |= UPS_C_PORT_RESET;
3352 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3353 len = sizeof(sc->sc_hub_desc.ps);
3355 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3356 err = USB_ERR_IOERROR;
3358 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3360 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3362 (index > sc->sc_noport)) {
3363 err = USB_ERR_IOERROR;
3366 port = EHCI_PORTSC(index);
3367 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3369 case UHF_PORT_ENABLE:
3370 EOWRITE4(sc, port, v | EHCI_PS_PE);
3372 case UHF_PORT_SUSPEND:
3373 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3375 case UHF_PORT_RESET:
3376 DPRINTFN(6, "reset port %d\n", index);
3378 if (ehcinohighspeed) {
3380 * Connect USB device to companion
3383 ehci_disown(sc, index, 1);
3387 if (EHCI_PS_IS_LOWSPEED(v) &&
3388 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3389 /* Low speed device, give up ownership. */
3390 ehci_disown(sc, index, 1);
3393 /* Start reset sequence. */
3394 v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3395 EOWRITE4(sc, port, v | EHCI_PS_PR);
3397 /* Wait for reset to complete. */
3398 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3399 USB_MS_TO_TICKS(usb_port_root_reset_delay));
3401 /* Terminate reset sequence. */
3402 if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3403 EOWRITE4(sc, port, v);
3405 /* Wait for HC to complete reset. */
3406 usb_pause_mtx(&sc->sc_bus.bus_mtx,
3407 USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3409 v = EOREAD4(sc, port);
3410 DPRINTF("ehci after reset, status=0x%08x\n", v);
3411 if (v & EHCI_PS_PR) {
3412 device_printf(sc->sc_bus.bdev,
3413 "port reset timeout\n");
3414 err = USB_ERR_TIMEOUT;
3417 if (!(v & EHCI_PS_PE) &&
3418 (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3419 /* Not a high speed device, give up ownership.*/
3420 ehci_disown(sc, index, 0);
3424 DPRINTF("ehci port %d reset, status = 0x%08x\n",
3428 case UHF_PORT_POWER:
3429 DPRINTFN(3, "set port power %d\n", index);
3430 EOWRITE4(sc, port, v | EHCI_PS_PP);
3434 DPRINTFN(3, "set port test %d\n", index);
3437 case UHF_PORT_INDICATOR:
3438 DPRINTFN(3, "set port ind %d\n", index);
3439 EOWRITE4(sc, port, v | EHCI_PS_PIC);
3443 err = USB_ERR_IOERROR;
3447 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3448 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3449 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3450 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3453 err = USB_ERR_IOERROR;
3463 ehci_xfer_setup(struct usb_setup_params *parm)
3465 struct usb_page_search page_info;
3466 struct usb_page_cache *pc;
3468 struct usb_xfer *xfer;
3476 sc = EHCI_BUS2SC(parm->udev->bus);
3477 xfer = parm->curr_xfer;
3485 * compute maximum number of some structures
3487 if (parm->methods == &ehci_device_ctrl_methods) {
3489 * The proof for the "nqtd" formula is illustrated like
3492 * +------------------------------------+
3496 * | | xxx | x | frm 0 |
3498 * | | xxx | xx | frm 1 |
3501 * +------------------------------------+
3503 * "xxx" means a completely full USB transfer descriptor
3505 * "x" and "xx" means a short USB packet
3507 * For the remainder of an USB transfer modulo
3508 * "max_data_length" we need two USB transfer descriptors.
3509 * One to transfer the remaining data and one to finalise
3510 * with a zero length packet in case the "force_short_xfer"
3511 * flag is set. We only need two USB transfer descriptors in
3512 * the case where the transfer length of the first one is a
3513 * factor of "max_frame_size". The rest of the needed USB
3514 * transfer descriptors is given by the buffer size divided
3515 * by the maximum data payload.
3517 parm->hc_max_packet_size = 0x400;
3518 parm->hc_max_packet_count = 1;
3519 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3520 xfer->flags_int.bdma_enable = 1;
3522 usbd_transfer_setup_sub(parm);
3525 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3526 + (xfer->max_data_length / xfer->max_hc_frame_size));
3528 } else if (parm->methods == &ehci_device_bulk_methods) {
3529 parm->hc_max_packet_size = 0x400;
3530 parm->hc_max_packet_count = 1;
3531 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3532 xfer->flags_int.bdma_enable = 1;
3534 usbd_transfer_setup_sub(parm);
3537 nqtd = ((2 * xfer->nframes)
3538 + (xfer->max_data_length / xfer->max_hc_frame_size));
3540 } else if (parm->methods == &ehci_device_intr_methods) {
3541 if (parm->speed == USB_SPEED_HIGH) {
3542 parm->hc_max_packet_size = 0x400;
3543 parm->hc_max_packet_count = 3;
3544 } else if (parm->speed == USB_SPEED_FULL) {
3545 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3546 parm->hc_max_packet_count = 1;
3548 parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3549 parm->hc_max_packet_count = 1;
3552 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3553 xfer->flags_int.bdma_enable = 1;
3555 usbd_transfer_setup_sub(parm);
3558 nqtd = ((2 * xfer->nframes)
3559 + (xfer->max_data_length / xfer->max_hc_frame_size));
3561 } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3562 parm->hc_max_packet_size = 0x3FF;
3563 parm->hc_max_packet_count = 1;
3564 parm->hc_max_frame_size = 0x3FF;
3565 xfer->flags_int.bdma_enable = 1;
3567 usbd_transfer_setup_sub(parm);
3569 nsitd = xfer->nframes;
3571 } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3572 parm->hc_max_packet_size = 0x400;
3573 parm->hc_max_packet_count = 3;
3574 parm->hc_max_frame_size = 0xC00;
3575 xfer->flags_int.bdma_enable = 1;
3577 usbd_transfer_setup_sub(parm);
3579 nitd = ((xfer->nframes + 7) / 8) <<
3580 usbd_xfer_get_fps_shift(xfer);
3583 parm->hc_max_packet_size = 0x400;
3584 parm->hc_max_packet_count = 1;
3585 parm->hc_max_frame_size = 0x400;
3587 usbd_transfer_setup_sub(parm);
3596 * Allocate queue heads and transfer descriptors
3600 if (usbd_transfer_setup_sub_malloc(
3601 parm, &pc, sizeof(ehci_itd_t),
3602 EHCI_ITD_ALIGN, nitd)) {
3603 parm->err = USB_ERR_NOMEM;
3607 for (n = 0; n != nitd; n++) {
3610 usbd_get_page(pc + n, 0, &page_info);
3612 td = page_info.buffer;
3615 td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3616 td->obj_next = last_obj;
3617 td->page_cache = pc + n;
3621 usb_pc_cpu_flush(pc + n);
3624 if (usbd_transfer_setup_sub_malloc(
3625 parm, &pc, sizeof(ehci_sitd_t),
3626 EHCI_SITD_ALIGN, nsitd)) {
3627 parm->err = USB_ERR_NOMEM;
3631 for (n = 0; n != nsitd; n++) {
3634 usbd_get_page(pc + n, 0, &page_info);
3636 td = page_info.buffer;
3639 td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3640 td->obj_next = last_obj;
3641 td->page_cache = pc + n;
3645 usb_pc_cpu_flush(pc + n);
3648 if (usbd_transfer_setup_sub_malloc(
3649 parm, &pc, sizeof(ehci_qtd_t),
3650 EHCI_QTD_ALIGN, nqtd)) {
3651 parm->err = USB_ERR_NOMEM;
3655 for (n = 0; n != nqtd; n++) {
3658 usbd_get_page(pc + n, 0, &page_info);
3660 qtd = page_info.buffer;
3663 qtd->qtd_self = htohc32(sc, page_info.physaddr);
3664 qtd->obj_next = last_obj;
3665 qtd->page_cache = pc + n;
3669 usb_pc_cpu_flush(pc + n);
3672 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3676 if (usbd_transfer_setup_sub_malloc(
3677 parm, &pc, sizeof(ehci_qh_t),
3678 EHCI_QH_ALIGN, nqh)) {
3679 parm->err = USB_ERR_NOMEM;
3683 for (n = 0; n != nqh; n++) {
3686 usbd_get_page(pc + n, 0, &page_info);
3688 qh = page_info.buffer;
3691 qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3692 qh->obj_next = last_obj;
3693 qh->page_cache = pc + n;
3697 usb_pc_cpu_flush(pc + n);
3700 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3702 if (!xfer->flags_int.curr_dma_set) {
3703 xfer->flags_int.curr_dma_set = 1;
3709 ehci_xfer_unsetup(struct usb_xfer *xfer)
3715 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3716 struct usb_endpoint *ep)
3718 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3720 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3722 edesc->bEndpointAddress, udev->flags.usb_mode,
3725 if (udev->device_index != sc->sc_addr) {
3726 if ((udev->speed != USB_SPEED_HIGH) &&
3727 ((udev->hs_hub_addr == 0) ||
3728 (udev->hs_port_no == 0) ||
3729 (udev->parent_hs_hub == NULL) ||
3730 (udev->parent_hs_hub->hub == NULL))) {
3731 /* We need a transaction translator */
3734 switch (edesc->bmAttributes & UE_XFERTYPE) {
3736 ep->methods = &ehci_device_ctrl_methods;
3739 ep->methods = &ehci_device_intr_methods;
3741 case UE_ISOCHRONOUS:
3742 if (udev->speed == USB_SPEED_HIGH) {
3743 ep->methods = &ehci_device_isoc_hs_methods;
3744 } else if (udev->speed == USB_SPEED_FULL) {
3745 ep->methods = &ehci_device_isoc_fs_methods;
3749 ep->methods = &ehci_device_bulk_methods;
3761 ehci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
3764 * Wait until the hardware has finished any possible use of
3765 * the transfer descriptor(s) and QH
3767 *pus = (1125); /* microseconds */
3771 ehci_device_resume(struct usb_device *udev)
3773 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3774 struct usb_xfer *xfer;
3775 const struct usb_pipe_methods *methods;
3779 USB_BUS_LOCK(udev->bus);
3781 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3782 if (xfer->xroot->udev == udev) {
3783 methods = xfer->endpoint->methods;
3785 if ((methods == &ehci_device_bulk_methods) ||
3786 (methods == &ehci_device_ctrl_methods)) {
3787 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3788 sc->sc_async_p_last);
3790 if (methods == &ehci_device_intr_methods) {
3791 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3792 sc->sc_intr_p_last[xfer->qh_pos]);
3797 USB_BUS_UNLOCK(udev->bus);
3803 ehci_device_suspend(struct usb_device *udev)
3805 ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3806 struct usb_xfer *xfer;
3807 const struct usb_pipe_methods *methods;
3811 USB_BUS_LOCK(udev->bus);
3813 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3814 if (xfer->xroot->udev == udev) {
3815 methods = xfer->endpoint->methods;
3817 if ((methods == &ehci_device_bulk_methods) ||
3818 (methods == &ehci_device_ctrl_methods)) {
3819 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3820 sc->sc_async_p_last);
3822 if (methods == &ehci_device_intr_methods) {
3823 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3824 sc->sc_intr_p_last[xfer->qh_pos]);
3829 USB_BUS_UNLOCK(udev->bus);
3833 ehci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
3835 struct ehci_softc *sc = EHCI_BUS2SC(bus);
3838 case USB_HW_POWER_SUSPEND:
3839 case USB_HW_POWER_SHUTDOWN:
3842 case USB_HW_POWER_RESUME:
3851 ehci_set_hw_power(struct usb_bus *bus)
3853 ehci_softc_t *sc = EHCI_BUS2SC(bus);
3861 flags = bus->hw_power_state;
3863 temp = EOREAD4(sc, EHCI_USBCMD);
3865 temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3867 if (flags & (USB_HW_POWER_CONTROL |
3868 USB_HW_POWER_BULK)) {
3869 DPRINTF("Async is active\n");
3870 temp |= EHCI_CMD_ASE;
3872 if (flags & (USB_HW_POWER_INTERRUPT |
3873 USB_HW_POWER_ISOC)) {
3874 DPRINTF("Periodic is active\n");
3875 temp |= EHCI_CMD_PSE;
3877 EOWRITE4(sc, EHCI_USBCMD, temp);
3879 USB_BUS_UNLOCK(bus);
3885 ehci_start_dma_delay_second(struct usb_xfer *xfer)
3887 struct ehci_softc *sc = EHCI_BUS2SC(xfer->xroot->bus);
3891 /* trigger doorbell */
3892 ehci_doorbell_async(sc);
3894 /* give the doorbell 4ms */
3895 usbd_transfer_timeout_ms(xfer,
3896 (void (*)(void *))&usb_dma_delay_done_cb, 4);
3900 * Ring the doorbell twice before freeing any DMA descriptors. Some host
3901 * controllers apparently cache the QH descriptors and need a message
3902 * that the cache needs to be discarded.
3905 ehci_start_dma_delay(struct usb_xfer *xfer)
3907 struct ehci_softc *sc = EHCI_BUS2SC(xfer->xroot->bus);
3911 /* trigger doorbell */
3912 ehci_doorbell_async(sc);
3914 /* give the doorbell 4ms */
3915 usbd_transfer_timeout_ms(xfer,
3916 (void (*)(void *))&ehci_start_dma_delay_second, 4);
3919 static const struct usb_bus_methods ehci_bus_methods =
3921 .endpoint_init = ehci_ep_init,
3922 .xfer_setup = ehci_xfer_setup,
3923 .xfer_unsetup = ehci_xfer_unsetup,
3924 .get_dma_delay = ehci_get_dma_delay,
3925 .device_resume = ehci_device_resume,
3926 .device_suspend = ehci_device_suspend,
3927 .set_hw_power = ehci_set_hw_power,
3928 .set_hw_power_sleep = ehci_set_hw_power_sleep,
3929 .roothub_exec = ehci_roothub_exec,
3930 .xfer_poll = ehci_do_poll,
3931 .start_dma_delay = ehci_start_dma_delay,