3 * SPDX-License-Identifier: BSD-2-Clause-NetBSD
5 * Copyright (c) 2001 The NetBSD Foundation, Inc.
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net).
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
36 #define EHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
39 * Alignment NOTE: structures must be aligned so that the hardware can index
40 * without performing addition.
42 #define EHCI_FRAMELIST_ALIGN 0x1000 /* bytes */
43 #define EHCI_FRAMELIST_COUNT 1024 /* units */
44 #define EHCI_VIRTUAL_FRAMELIST_COUNT 128 /* units */
46 #if ((8*EHCI_VIRTUAL_FRAMELIST_COUNT) < USB_MAX_HS_ISOC_FRAMES_PER_XFER)
47 #error "maximum number of high-speed isochronous frames is higher than supported!"
50 #if (EHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
51 #error "maximum number of full-speed isochronous frames is higher than supported!"
55 #define EHCI_LINK_TERMINATE 0x00000001
56 #define EHCI_LINK_TYPE(x) ((x) & 0x00000006)
57 #define EHCI_LINK_ITD 0x0
58 #define EHCI_LINK_QH 0x2
59 #define EHCI_LINK_SITD 0x4
60 #define EHCI_LINK_FSTN 0x6
61 #define EHCI_LINK_ADDR(x) ((x) &~ 0x1f)
63 /* Structures alignment (bytes) */
64 #define EHCI_ITD_ALIGN 128
65 #define EHCI_SITD_ALIGN 64
66 #define EHCI_QTD_ALIGN 64
67 #define EHCI_QH_ALIGN 128
68 #define EHCI_FSTN_ALIGN 32
69 /* Data buffers are divided into one or more pages */
70 #define EHCI_PAGE_SIZE 0x1000
71 #if ((USB_PAGE_SIZE < EHCI_PAGE_SIZE) || (EHCI_PAGE_SIZE == 0) || \
72 (USB_PAGE_SIZE < EHCI_ITD_ALIGN) || (EHCI_ITD_ALIGN == 0) || \
73 (USB_PAGE_SIZE < EHCI_SITD_ALIGN) || (EHCI_SITD_ALIGN == 0) || \
74 (USB_PAGE_SIZE < EHCI_QTD_ALIGN) || (EHCI_QTD_ALIGN == 0) || \
75 (USB_PAGE_SIZE < EHCI_QH_ALIGN) || (EHCI_QH_ALIGN == 0) || \
76 (USB_PAGE_SIZE < EHCI_FSTN_ALIGN) || (EHCI_FSTN_ALIGN == 0))
77 #error "Invalid USB page size!"
82 * Isochronous Transfer Descriptor. This descriptor is used for high speed
86 volatile uint32_t itd_next;
87 volatile uint32_t itd_status[8];
88 #define EHCI_ITD_SET_LEN(x) ((x) << 16)
89 #define EHCI_ITD_GET_LEN(x) (((x) >> 16) & 0xFFF)
90 #define EHCI_ITD_IOC (1 << 15)
91 #define EHCI_ITD_SET_PG(x) ((x) << 12)
92 #define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7)
93 #define EHCI_ITD_SET_OFFS(x) (x)
94 #define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF)
95 #define EHCI_ITD_ACTIVE (1U << 31)
96 #define EHCI_ITD_DATABUFERR (1 << 30)
97 #define EHCI_ITD_BABBLE (1 << 29)
98 #define EHCI_ITD_XACTERR (1 << 28)
99 volatile uint32_t itd_bp[7];
101 #define EHCI_ITD_SET_ADDR(x) (x)
102 #define EHCI_ITD_GET_ADDR(x) (((x) >> 0) & 0x7F)
103 #define EHCI_ITD_SET_ENDPT(x) ((x) << 8)
104 #define EHCI_ITD_GET_ENDPT(x) (((x) >> 8) & 0xF)
106 #define EHCI_ITD_SET_DIR_IN (1 << 11)
107 #define EHCI_ITD_SET_DIR_OUT (0 << 11)
108 #define EHCI_ITD_SET_MPL(x) (x)
109 #define EHCI_ITD_GET_MPL(x) (((x) >> 0) & 0x7FF)
110 volatile uint32_t itd_bp_hi[7];
112 * Extra information needed:
115 struct ehci_itd *next;
116 struct ehci_itd *prev;
117 struct ehci_itd *obj_next;
118 struct usb_page_cache *page_cache;
119 } __aligned(EHCI_ITD_ALIGN);
121 typedef struct ehci_itd ehci_itd_t;
124 * Split Transaction Isochronous Transfer Descriptor. This descriptor is used
125 * for full speed transfers only.
128 volatile uint32_t sitd_next;
129 volatile uint32_t sitd_portaddr;
130 #define EHCI_SITD_SET_DIR_OUT (0 << 31)
131 #define EHCI_SITD_SET_DIR_IN (1U << 31)
132 #define EHCI_SITD_SET_ADDR(x) (x)
133 #define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F)
134 #define EHCI_SITD_SET_ENDPT(x) ((x) << 8)
135 #define EHCI_SITD_GET_ENDPT(x) (((x) >> 8) & 0xF)
136 #define EHCI_SITD_GET_DIR(x) ((x) >> 31)
137 #define EHCI_SITD_SET_PORT(x) ((x) << 24)
138 #define EHCI_SITD_GET_PORT(x) (((x) >> 24) & 0x7F)
139 #define EHCI_SITD_SET_HUBA(x) ((x) << 16)
140 #define EHCI_SITD_GET_HUBA(x) (((x) >> 16) & 0x7F)
141 volatile uint32_t sitd_mask;
142 #define EHCI_SITD_SET_SMASK(x) (x)
143 #define EHCI_SITD_SET_CMASK(x) ((x) << 8)
144 volatile uint32_t sitd_status;
145 #define EHCI_SITD_COMPLETE_SPLIT (1<<1)
146 #define EHCI_SITD_START_SPLIT (0<<1)
147 #define EHCI_SITD_MISSED_MICRO_FRAME (1<<2)
148 #define EHCI_SITD_XACTERR (1<<3)
149 #define EHCI_SITD_BABBLE (1<<4)
150 #define EHCI_SITD_DATABUFERR (1<<5)
151 #define EHCI_SITD_ERROR (1<<6)
152 #define EHCI_SITD_ACTIVE (1<<7)
153 #define EHCI_SITD_IOC (1<<31)
154 #define EHCI_SITD_SET_LEN(len) ((len)<<16)
155 #define EHCI_SITD_GET_LEN(x) (((x)>>16) & 0x3FF)
156 volatile uint32_t sitd_bp[2];
157 volatile uint32_t sitd_back;
158 volatile uint32_t sitd_bp_hi[2];
160 * Extra information needed:
163 struct ehci_sitd *next;
164 struct ehci_sitd *prev;
165 struct ehci_sitd *obj_next;
166 struct usb_page_cache *page_cache;
167 } __aligned(EHCI_SITD_ALIGN);
169 typedef struct ehci_sitd ehci_sitd_t;
171 /* Queue Element Transfer Descriptor */
173 volatile uint32_t qtd_next;
174 volatile uint32_t qtd_altnext;
175 volatile uint32_t qtd_status;
176 #define EHCI_QTD_GET_STATUS(x) (((x) >> 0) & 0xff)
177 #define EHCI_QTD_SET_STATUS(x) ((x) << 0)
178 #define EHCI_QTD_ACTIVE 0x80
179 #define EHCI_QTD_HALTED 0x40
180 #define EHCI_QTD_BUFERR 0x20
181 #define EHCI_QTD_BABBLE 0x10
182 #define EHCI_QTD_XACTERR 0x08
183 #define EHCI_QTD_MISSEDMICRO 0x04
184 #define EHCI_QTD_SPLITXSTATE 0x02
185 #define EHCI_QTD_PINGSTATE 0x01
186 #define EHCI_QTD_STATERRS 0x74
187 #define EHCI_QTD_GET_PID(x) (((x) >> 8) & 0x3)
188 #define EHCI_QTD_SET_PID(x) ((x) << 8)
189 #define EHCI_QTD_PID_OUT 0x0
190 #define EHCI_QTD_PID_IN 0x1
191 #define EHCI_QTD_PID_SETUP 0x2
192 #define EHCI_QTD_GET_CERR(x) (((x) >> 10) & 0x3)
193 #define EHCI_QTD_SET_CERR(x) ((x) << 10)
194 #define EHCI_QTD_GET_C_PAGE(x) (((x) >> 12) & 0x7)
195 #define EHCI_QTD_SET_C_PAGE(x) ((x) << 12)
196 #define EHCI_QTD_GET_IOC(x) (((x) >> 15) & 0x1)
197 #define EHCI_QTD_IOC 0x00008000
198 #define EHCI_QTD_GET_BYTES(x) (((x) >> 16) & 0x7fff)
199 #define EHCI_QTD_SET_BYTES(x) ((x) << 16)
200 #define EHCI_QTD_GET_TOGGLE(x) (((x) >> 31) & 0x1)
201 #define EHCI_QTD_SET_TOGGLE(x) ((x) << 31)
202 #define EHCI_QTD_TOGGLE_MASK 0x80000000
203 #define EHCI_QTD_NBUFFERS 5
204 #define EHCI_QTD_PAYLOAD_MAX ((EHCI_QTD_NBUFFERS-1)*EHCI_PAGE_SIZE)
205 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
206 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
208 * Extra information needed:
210 struct ehci_qtd *alt_next;
211 struct ehci_qtd *obj_next;
212 struct usb_page_cache *page_cache;
215 } __aligned(EHCI_QTD_ALIGN);
217 typedef struct ehci_qtd ehci_qtd_t;
219 /* Queue Head Sub Structure */
221 volatile uint32_t qtd_next;
222 volatile uint32_t qtd_altnext;
223 volatile uint32_t qtd_status;
224 volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS];
225 volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
230 volatile uint32_t qh_link;
231 volatile uint32_t qh_endp;
232 #define EHCI_QH_GET_ADDR(x) (((x) >> 0) & 0x7f) /* endpoint addr */
233 #define EHCI_QH_SET_ADDR(x) (x)
234 #define EHCI_QH_ADDRMASK 0x0000007f
235 #define EHCI_QH_GET_INACT(x) (((x) >> 7) & 0x01) /* inactivate on next */
236 #define EHCI_QH_INACT 0x00000080
237 #define EHCI_QH_GET_ENDPT(x) (((x) >> 8) & 0x0f) /* endpoint no */
238 #define EHCI_QH_SET_ENDPT(x) ((x) << 8)
239 #define EHCI_QH_GET_EPS(x) (((x) >> 12) & 0x03) /* endpoint speed */
240 #define EHCI_QH_SET_EPS(x) ((x) << 12)
241 #define EHCI_QH_SPEED_FULL 0x0
242 #define EHCI_QH_SPEED_LOW 0x1
243 #define EHCI_QH_SPEED_HIGH 0x2
244 #define EHCI_QH_GET_DTC(x) (((x) >> 14) & 0x01) /* data toggle control */
245 #define EHCI_QH_DTC 0x00004000
246 #define EHCI_QH_GET_HRECL(x) (((x) >> 15) & 0x01) /* head of reclamation */
247 #define EHCI_QH_HRECL 0x00008000
248 #define EHCI_QH_GET_MPL(x) (((x) >> 16) & 0x7ff) /* max packet len */
249 #define EHCI_QH_SET_MPL(x) ((x) << 16)
250 #define EHCI_QH_MPLMASK 0x07ff0000
251 #define EHCI_QH_GET_CTL(x) (((x) >> 27) & 0x01) /* control endpoint */
252 #define EHCI_QH_CTL 0x08000000
253 #define EHCI_QH_GET_NRL(x) (((x) >> 28) & 0x0f) /* NAK reload */
254 #define EHCI_QH_SET_NRL(x) ((x) << 28)
255 volatile uint32_t qh_endphub;
256 #define EHCI_QH_GET_SMASK(x) (((x) >> 0) & 0xff) /* intr sched mask */
257 #define EHCI_QH_SET_SMASK(x) ((x) << 0)
258 #define EHCI_QH_GET_CMASK(x) (((x) >> 8) & 0xff) /* split completion mask */
259 #define EHCI_QH_SET_CMASK(x) ((x) << 8)
260 #define EHCI_QH_GET_HUBA(x) (((x) >> 16) & 0x7f) /* hub address */
261 #define EHCI_QH_SET_HUBA(x) ((x) << 16)
262 #define EHCI_QH_GET_PORT(x) (((x) >> 23) & 0x7f) /* hub port */
263 #define EHCI_QH_SET_PORT(x) ((x) << 23)
264 #define EHCI_QH_GET_MULT(x) (((x) >> 30) & 0x03) /* pipe multiplier */
265 #define EHCI_QH_SET_MULT(x) ((x) << 30)
266 volatile uint32_t qh_curqtd;
267 struct ehci_qh_sub qh_qtd;
269 * Extra information needed:
271 struct ehci_qh *next;
272 struct ehci_qh *prev;
273 struct ehci_qh *obj_next;
274 struct usb_page_cache *page_cache;
276 } __aligned(EHCI_QH_ALIGN);
278 typedef struct ehci_qh ehci_qh_t;
280 /* Periodic Frame Span Traversal Node */
282 volatile uint32_t fstn_link;
283 volatile uint32_t fstn_back;
284 } __aligned(EHCI_FSTN_ALIGN);
286 typedef struct ehci_fstn ehci_fstn_t;
288 struct ehci_hw_softc {
289 struct usb_page_cache pframes_pc;
290 struct usb_page_cache terminate_pc;
291 struct usb_page_cache async_start_pc;
292 struct usb_page_cache intr_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
293 struct usb_page_cache isoc_hs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
294 struct usb_page_cache isoc_fs_start_pc[EHCI_VIRTUAL_FRAMELIST_COUNT];
296 struct usb_page pframes_pg;
297 struct usb_page terminate_pg;
298 struct usb_page async_start_pg;
299 struct usb_page intr_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
300 struct usb_page isoc_hs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
301 struct usb_page isoc_fs_start_pg[EHCI_VIRTUAL_FRAMELIST_COUNT];
304 struct ehci_config_desc {
305 struct usb_config_descriptor confd;
306 struct usb_interface_descriptor ifcd;
307 struct usb_endpoint_descriptor endpd;
310 union ehci_hub_desc {
311 struct usb_status stat;
312 struct usb_port_status ps;
313 struct usb_hub_descriptor hubd;
317 typedef struct ehci_softc {
318 struct ehci_hw_softc sc_hw;
319 struct usb_bus sc_bus; /* base device */
320 struct usb_callout sc_tmo_pcd;
321 struct usb_callout sc_tmo_poll;
322 union ehci_hub_desc sc_hub_desc;
324 struct usb_device *sc_devices[EHCI_MAX_DEVICES];
325 struct resource *sc_io_res;
326 struct resource *sc_irq_res;
327 struct ehci_qh *sc_async_p_last;
328 struct ehci_qh *sc_intr_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
329 struct ehci_sitd *sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
330 struct ehci_itd *sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT];
332 bus_size_t sc_io_size;
333 bus_space_tag_t sc_io_tag;
334 bus_space_handle_t sc_io_hdl;
336 uint32_t sc_terminate_self; /* TD short packet termination pointer */
339 uint16_t sc_intr_stat[EHCI_VIRTUAL_FRAMELIST_COUNT];
340 uint16_t sc_id_vendor; /* vendor ID for root hub */
341 uint16_t sc_flags; /* chip specific flags */
342 #define EHCI_SCFLG_NORESTERM 0x0004 /* don't terminate reset sequence */
343 #define EHCI_SCFLG_BIGEDESC 0x0008 /* big-endian byte order descriptors */
344 #define EHCI_SCFLG_TT 0x0020 /* transaction translator present */
345 #define EHCI_SCFLG_LOSTINTRBUG 0x0040 /* workaround for VIA / ATI chipsets */
346 #define EHCI_SCFLG_IAADBUG 0x0080 /* workaround for nVidia chipsets */
347 #define EHCI_SCFLG_DONTRESET 0x0100 /* don't reset ctrl. in ehci_init() */
348 #define EHCI_SCFLG_DONEINIT 0x1000 /* ehci_init() has been called. */
350 uint8_t sc_offs; /* offset to operational registers */
351 uint8_t sc_doorbell_disable; /* set on doorbell failure */
353 uint8_t sc_addr; /* device address */
354 uint8_t sc_conf; /* device configuration */
356 uint8_t sc_hub_idata[8];
358 char sc_vendor[16]; /* vendor string for root hub */
360 void (*sc_vendor_post_reset)(struct ehci_softc *sc);
361 uint16_t (*sc_vendor_get_port_speed)(struct ehci_softc *sc,
366 #define EREAD1(sc, a) bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
367 #define EREAD2(sc, a) bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
368 #define EREAD4(sc, a) bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a))
369 #define EWRITE1(sc, a, x) \
370 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
371 #define EWRITE2(sc, a, x) \
372 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
373 #define EWRITE4(sc, a, x) \
374 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
375 #define EOREAD1(sc, a) \
376 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
377 #define EOREAD2(sc, a) \
378 bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
379 #define EOREAD4(sc, a) \
380 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a))
381 #define EOWRITE1(sc, a, x) \
382 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
383 #define EOWRITE2(sc, a, x) \
384 bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
385 #define EOWRITE4(sc, a, x) \
386 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
388 #ifdef USB_EHCI_BIG_ENDIAN_DESC
390 * Handle byte order conversion between host and ``host controller''.
391 * Typically the latter is little-endian but some controllers require
392 * big-endian in which case we may need to manually swap.
394 static __inline uint32_t
395 htohc32(const struct ehci_softc *sc, const uint32_t v)
397 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe32(v) : htole32(v);
400 static __inline uint16_t
401 htohc16(const struct ehci_softc *sc, const uint16_t v)
403 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? htobe16(v) : htole16(v);
406 static __inline uint32_t
407 hc32toh(const struct ehci_softc *sc, const uint32_t v)
409 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be32toh(v) : le32toh(v);
412 static __inline uint16_t
413 hc16toh(const struct ehci_softc *sc, const uint16_t v)
415 return sc->sc_flags & EHCI_SCFLG_BIGEDESC ? be16toh(v) : le16toh(v);
419 * Normal little-endian only conversion routines.
421 static __inline uint32_t
422 htohc32(const struct ehci_softc *sc, const uint32_t v)
427 static __inline uint16_t
428 htohc16(const struct ehci_softc *sc, const uint16_t v)
433 static __inline uint32_t
434 hc32toh(const struct ehci_softc *sc, const uint32_t v)
439 static __inline uint16_t
440 hc16toh(const struct ehci_softc *sc, const uint16_t v)
446 usb_bus_mem_cb_t ehci_iterate_hw_softc;
448 usb_error_t ehci_reset(ehci_softc_t *sc);
449 usb_error_t ehci_init(ehci_softc_t *sc);
450 void ehci_detach(struct ehci_softc *sc);
451 void ehci_interrupt(ehci_softc_t *sc);
452 uint16_t ehci_get_port_speed_portsc(struct ehci_softc *sc, uint16_t index);
453 uint16_t ehci_get_port_speed_hostc(struct ehci_softc *sc, uint16_t index);
455 #endif /* _EHCI_H_ */