2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2010-2012 Semihalf
5 * Copyright (c) 2012 The FreeBSD Foundation
6 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
9 * Portions of this software were developed by Oleksandr Rybalko
10 * under sponsorship from the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
38 * EHCI driver for Freescale i.MX SoCs which incorporate the USBOH3 controller.
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
46 #include <sys/condvar.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
52 #include <dev/usb/usb.h>
53 #include <dev/usb/usbdi.h>
54 #include <dev/usb/usb_busdma.h>
55 #include <dev/usb/usb_process.h>
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/controller/ehci.h>
59 #include <dev/usb/controller/ehcireg.h>
62 #include <machine/bus.h>
63 #include <machine/resource.h>
65 #include <arm/freescale/imx/imx_ccmvar.h>
67 #include "opt_platform.h"
70 * Notes on the hardware and related FDT data seen in the wild.
72 * There are two sets of registers in the USBOH3 implementation; documentation
73 * refers to them as "core" and "non-core" registers. A set of core register
74 * exists for each OTG or EHCI device. There is a single set of non-core
75 * registers per USBOH3, and they control aspects of operation not directly
76 * related to the USB specs, such as whether interrupts from each of the core
77 * devices are able to generate a SoC wakeup event.
79 * In the FreeBSD universe we might be inclined to describe the core and
80 * non-core registers by using a pair of resource address/size values (two
81 * entries in the reg property for each core). However, we have to work with
82 * existing FDT data (which mostly comes from the linux universe), and the way
83 * they've chosen to represent this is with an entry for a "usbmisc" device
84 * whose reg property describes the non-core registers. The way we handle FDT
85 * data, this means that the resources (memory-mapped register range) for the
86 * non-core registers belongs to a device other than the echi devices.
88 * Because the main ehci device cannot access registers in a range that's
89 * defined in the fdt data as belonging to another device, we implement a teeny
90 * little "usbmisc" driver which exists only to provide access to the usbmisc
91 * control register for each of the 4 usb controller instances. That little
92 * driver is implemented here in this file, before the main driver.
94 * In addition to the single usbmisc device, the existing FDT data defines a
95 * separate device for each of the OTG or EHCI cores within the USBOH3. Each of
96 * those devices has a set of core registers described by the reg property.
98 * The core registers for each of the four cores in the USBOH3 are divided into
99 * two parts: a set of imx-specific registers at an offset of 0 from the
100 * beginning of the register range, and the standard USB (EHCI or OTG) registers
101 * at an offset of 0x100 from the beginning of the register range. The FreeBSD
102 * way of dealing with this might be to map out two ranges in the reg property,
103 * but that's not what the alternate universe has done. To work with existing
104 * FDT data, we acquire the resource that maps all the core registers, then use
105 * bus_space_subregion() to create another resource that maps just the standard
106 * USB registers, which we provide to the standard USB code in the ehci_softc.
108 * The following compat strings have been seen for the OTG and EHCI cores. The
109 * FDT compat table in this driver contains all these strings, but as of this
110 * writing, not all of these SoCs have been tested with the driver. The fact
111 * that imx27 is common to all of them gives some hope that the driver will work
113 * - "fsl,imx23-usb", "fsl,imx27-usb";
114 * - "fsl,imx25-usb", "fsl,imx27-usb";
115 * - "fsl,imx28-usb", "fsl,imx27-usb";
116 * - "fsl,imx51-usb", "fsl,imx27-usb";
117 * - "fsl,imx53-usb", "fsl,imx27-usb";
118 * - "fsl,imx6q-usb", "fsl,imx27-usb";
120 * The FDT data for some SoCs contains the following properties, which we don't
121 * currently do anything with:
122 * - fsl,usbmisc = <&usbmisc 0>;
123 * - fsl,usbphy = <&usbphy0>;
125 * Some imx SoCs have FDT data related to USB PHY, some don't. We have separate
126 * usbphy drivers where needed; this data is mentioned here just to keep all the
127 * imx-FDT-usb-related info in one place. Here are the usbphy compat strings
131 * - "fsl,imx23-usbphy"
132 * - "fsl,imx28-usbphy", "fsl,imx23-usbphy";
133 * - "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
137 /*-----------------------------------------------------------------------------
139 *---------------------------------------------------------------------------*/
141 #define USBNC_OVER_CUR_POL (1u << 8)
142 #define USBNC_OVER_CUR_DIS (1u << 7)
144 struct imx_usbmisc_softc {
146 struct resource *mmio;
149 static struct ofw_compat_data usbmisc_compat_data[] = {
150 {"fsl,imx6q-usbmisc", true},
151 {"fsl,imx51-usbmisc", true},
152 {"fsl,imx25-usbmisc", true},
157 imx_usbmisc_set_ctrl(device_t dev, u_int index, uint32_t bits)
159 struct imx_usbmisc_softc *sc;
162 sc = device_get_softc(dev);
163 reg = bus_read_4(sc->mmio, index * sizeof(uint32_t));
164 bus_write_4(sc->mmio, index * sizeof(uint32_t), reg | bits);
169 imx_usbmisc_clr_ctrl(device_t dev, u_int index, uint32_t bits)
171 struct imx_usbmisc_softc *sc;
174 sc = device_get_softc(dev);
175 reg = bus_read_4(sc->mmio, index * sizeof(uint32_t));
176 bus_write_4(sc->mmio, index * sizeof(uint32_t), reg & ~bits);
181 imx_usbmisc_probe(device_t dev)
184 if (!ofw_bus_status_okay(dev))
187 if (ofw_bus_search_compatible(dev, usbmisc_compat_data)->ocd_data) {
188 device_set_desc(dev, "i.MX USB Misc Control");
189 return (BUS_PROBE_DEFAULT);
195 imx_usbmisc_detach(device_t dev)
197 struct imx_usbmisc_softc *sc;
199 sc = device_get_softc(dev);
201 if (sc->mmio != NULL)
202 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mmio);
208 imx_usbmisc_attach(device_t dev)
210 struct imx_usbmisc_softc *sc;
213 sc = device_get_softc(dev);
216 /* Allocate bus_space resources. */
218 sc->mmio = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
220 if (sc->mmio == NULL) {
221 device_printf(dev, "Cannot allocate memory resources\n");
225 OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
230 static device_method_t imx_usbmisc_methods[] = {
231 /* Device interface */
232 DEVMETHOD(device_probe, imx_usbmisc_probe),
233 DEVMETHOD(device_attach, imx_usbmisc_attach),
234 DEVMETHOD(device_detach, imx_usbmisc_detach),
239 static driver_t imx_usbmisc_driver = {
242 sizeof(struct imx_usbmisc_softc)
245 static devclass_t imx_usbmisc_devclass;
248 * This driver needs to start before the ehci driver, but later than the usual
249 * "special" drivers like clocks and cpu. Ehci starts at DEFAULT so
250 * DEFAULT-1000 seems good.
252 EARLY_DRIVER_MODULE(imx_usbmisc, simplebus, imx_usbmisc_driver,
253 imx_usbmisc_devclass, 0, 0, BUS_PASS_DEFAULT - 1000);
255 /*-----------------------------------------------------------------------------
257 *---------------------------------------------------------------------------*/
260 * Each EHCI device in the SoC has some SoC-specific per-device registers at an
261 * offset of 0, then the standard EHCI registers begin at an offset of 0x100.
263 #define IMX_EHCI_REG_OFF 0x100
264 #define IMX_EHCI_REG_SIZE 0x100
266 struct imx_ehci_softc {
267 ehci_softc_t ehci_softc;
269 struct resource *ehci_mem_res; /* EHCI core regs. */
270 struct resource *ehci_irq_res; /* EHCI core IRQ. */
273 static struct ofw_compat_data compat_data[] = {
274 {"fsl,imx6q-usb", 1},
275 {"fsl,imx53-usb", 1},
276 {"fsl,imx51-usb", 1},
277 {"fsl,imx28-usb", 1},
278 {"fsl,imx27-usb", 1},
279 {"fsl,imx25-usb", 1},
280 {"fsl,imx23-usb", 1},
285 imx_ehci_post_reset(struct ehci_softc *ehci_softc)
289 /* Force HOST mode */
290 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
291 usbmode &= ~EHCI_UM_CM;
292 usbmode |= EHCI_UM_CM_HOST;
293 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
297 imx_ehci_probe(device_t dev)
300 if (!ofw_bus_status_okay(dev))
303 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
304 device_set_desc(dev, "Freescale i.MX integrated USB controller");
305 return (BUS_PROBE_DEFAULT);
311 imx_ehci_detach(device_t dev)
313 struct imx_ehci_softc *sc;
317 sc = device_get_softc(dev);
319 esc = &sc->ehci_softc;
321 /* First detach all children; we can't detach if that fails. */
322 if ((err = device_delete_children(dev)) != 0)
325 if (esc->sc_flags & EHCI_SCFLG_DONEINIT)
327 if (esc->sc_intr_hdl != NULL)
328 bus_teardown_intr(dev, esc->sc_irq_res,
330 if (sc->ehci_irq_res != NULL)
331 bus_release_resource(dev, SYS_RES_IRQ, 0,
333 if (sc->ehci_mem_res != NULL)
334 bus_release_resource(dev, SYS_RES_MEMORY, 0,
337 usb_bus_mem_free_all(&esc->sc_bus, &ehci_iterate_hw_softc);
343 imx_ehci_disable_oc(struct imx_ehci_softc *sc)
346 pcell_t usbmprops[2];
351 /* Get the reference to the usbmisc driver from the fdt data */
352 node = ofw_bus_get_node(sc->dev);
353 size = OF_getencprop(node, "fsl,usbmisc", usbmprops,
355 if (size < sizeof(usbmprops)) {
356 device_printf(sc->dev, "failed to retrieve fsl,usbmisc "
357 "property, cannot disable overcurrent protection");
360 /* Retrieve the device_t via the xref handle. */
361 usbmdev = OF_device_from_xref(usbmprops[0]);
362 if (usbmdev == NULL) {
363 device_printf(sc->dev, "usbmisc device not found, "
364 "cannot disable overcurrent protection");
367 /* Call the device routine to set the overcurrent disable bit. */
368 index = usbmprops[1];
369 imx_usbmisc_set_ctrl(usbmdev, index, USBNC_OVER_CUR_DIS);
373 imx_ehci_attach(device_t dev)
375 struct imx_ehci_softc *sc;
379 sc = device_get_softc(dev);
381 esc = &sc->ehci_softc;
384 /* Allocate bus_space resources. */
386 sc->ehci_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
388 if (sc->ehci_mem_res == NULL) {
389 device_printf(dev, "Cannot allocate memory resources\n");
395 sc->ehci_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
397 if (sc->ehci_irq_res == NULL) {
398 device_printf(dev, "Cannot allocate IRQ resources\n");
403 esc->sc_io_tag = rman_get_bustag(sc->ehci_mem_res);
404 esc->sc_bus.parent = dev;
405 esc->sc_bus.devices = esc->sc_devices;
406 esc->sc_bus.devices_max = EHCI_MAX_DEVICES;
407 esc->sc_bus.dma_bits = 32;
409 /* allocate all DMA memory */
410 if (usb_bus_mem_alloc_all(&esc->sc_bus, USB_GET_DMA_TAG(dev),
411 &ehci_iterate_hw_softc) != 0) {
412 device_printf(dev, "usb_bus_mem_alloc_all() failed\n");
418 * Set handle to USB related registers subregion used by
419 * generic EHCI driver.
421 err = bus_space_subregion(esc->sc_io_tag,
422 rman_get_bushandle(sc->ehci_mem_res),
423 IMX_EHCI_REG_OFF, IMX_EHCI_REG_SIZE, &esc->sc_io_hdl);
425 device_printf(dev, "bus_space_subregion() failed\n");
430 /* Setup interrupt handler. */
431 err = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
432 NULL, (driver_intr_t *)ehci_interrupt, esc, &esc->sc_intr_hdl);
434 device_printf(dev, "Could not setup IRQ\n");
438 /* Turn on clocks. */
439 imx_ccm_usb_enable(dev);
441 /* Disable overcurrent detection, if configured to do so. */
442 if (OF_hasprop(ofw_bus_get_node(sc->dev), "disable-over-current"))
443 imx_ehci_disable_oc(sc);
445 /* Add USB bus device. */
446 esc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
447 if (esc->sc_bus.bdev == NULL) {
448 device_printf(dev, "Could not add USB device\n");
451 device_set_ivars(esc->sc_bus.bdev, &esc->sc_bus);
453 esc->sc_id_vendor = USB_VENDOR_FREESCALE;
454 strlcpy(esc->sc_vendor, "Freescale", sizeof(esc->sc_vendor));
457 * Set flags that affect ehci_init() behavior, and hook our post-reset
458 * code into the standard controller code.
460 esc->sc_flags |= EHCI_SCFLG_NORESTERM | EHCI_SCFLG_TT;
461 esc->sc_vendor_post_reset = imx_ehci_post_reset;
462 esc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
464 err = ehci_init(esc);
466 device_printf(dev, "USB init failed, usb_err_t=%d\n",
470 esc->sc_flags |= EHCI_SCFLG_DONEINIT;
473 err = device_probe_and_attach(esc->sc_bus.bdev);
476 "device_probe_and_attach() failed\n");
485 imx_ehci_detach(dev);
490 static device_method_t ehci_methods[] = {
491 /* Device interface */
492 DEVMETHOD(device_probe, imx_ehci_probe),
493 DEVMETHOD(device_attach, imx_ehci_attach),
494 DEVMETHOD(device_detach, imx_ehci_detach),
495 DEVMETHOD(device_suspend, bus_generic_suspend),
496 DEVMETHOD(device_resume, bus_generic_resume),
497 DEVMETHOD(device_shutdown, bus_generic_shutdown),
500 DEVMETHOD(bus_print_child, bus_generic_print_child),
505 static driver_t ehci_driver = {
508 sizeof(struct imx_ehci_softc)
511 static devclass_t ehci_devclass;
513 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
514 MODULE_DEPEND(ehci, usb, 1, 1, 1);