2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * Developed by Semihalf.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * FDT attachment driver for the USB Enhanced Host Controller.
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
41 #include <sys/stdint.h>
42 #include <sys/stddef.h>
43 #include <sys/param.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
49 #include <sys/module.h>
51 #include <sys/mutex.h>
52 #include <sys/condvar.h>
53 #include <sys/sysctl.h>
55 #include <sys/unistd.h>
56 #include <sys/callout.h>
57 #include <sys/malloc.h>
60 #include <dev/ofw/ofw_bus.h>
61 #include <dev/ofw/ofw_bus_subr.h>
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usb_core.h>
67 #include <dev/usb/usb_busdma.h>
68 #include <dev/usb/usb_process.h>
69 #include <dev/usb/usb_util.h>
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ehci.h>
74 #include <dev/usb/controller/ehcireg.h>
76 #if !defined(__aarch64__)
77 #include <arm/mv/mvreg.h>
79 #include <arm/mv/mvvar.h>
81 #define EHCI_VENDORID_MRVL 0x1286
82 #define EHCI_HC_DEVSTR "Marvell Integrated USB 2.0 controller"
84 static device_attach_t mv_ehci_attach;
85 static device_detach_t mv_ehci_detach;
87 static int err_intr(void *arg);
89 static struct resource *irq_err;
92 /* EHCI HC regs start at this offset within USB range */
93 #define MV_USB_HOST_OFST 0x0100
95 #define USB_BRIDGE_INTR_CAUSE 0x210
96 #define USB_BRIDGE_INTR_MASK 0x214
97 #define USB_BRIDGE_ERR_ADDR 0x21C
99 #define MV_USB_ADDR_DECODE_ERR (1 << 0)
100 #define MV_USB_HOST_UNDERFLOW (1 << 1)
101 #define MV_USB_HOST_OVERFLOW (1 << 2)
102 #define MV_USB_DEVICE_UNDERFLOW (1 << 3)
104 enum mv_ehci_hwtype {
110 static struct ofw_compat_data compat_data[] = {
111 {"mrvl,usb-ehci", HWTYPE_MV_EHCI_V1},
112 {"marvell,orion-ehci", HWTYPE_MV_EHCI_V2},
113 {"marvell,armada-3700-ehci", HWTYPE_MV_EHCI_V2},
118 mv_ehci_post_reset(struct ehci_softc *ehci_softc)
122 /* Force HOST mode */
123 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
124 usbmode &= ~EHCI_UM_CM;
125 usbmode |= EHCI_UM_CM_HOST;
126 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
130 mv_ehci_probe(device_t self)
133 if (!ofw_bus_status_okay(self))
136 if (!ofw_bus_search_compatible(self, compat_data)->ocd_data)
139 device_set_desc(self, EHCI_HC_DEVSTR);
141 return (BUS_PROBE_DEFAULT);
145 mv_ehci_attach(device_t self)
147 ehci_softc_t *sc = device_get_softc(self);
148 enum mv_ehci_hwtype hwtype;
149 bus_space_handle_t bsh;
153 /* initialise some bus fields */
154 sc->sc_bus.parent = self;
155 sc->sc_bus.devices = sc->sc_devices;
156 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
157 sc->sc_bus.dma_bits = 32;
159 hwtype = ofw_bus_search_compatible(self, compat_data)->ocd_data;
160 if (hwtype == HWTYPE_NONE) {
161 device_printf(self, "Wrong HW type flag detected\n");
165 /* get all DMA memory */
166 if (usb_bus_mem_alloc_all(&sc->sc_bus,
167 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
172 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
173 if (!sc->sc_io_res) {
174 device_printf(self, "Could not map memory\n");
177 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
178 bsh = rman_get_bushandle(sc->sc_io_res);
179 sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST;
182 * Marvell EHCI host controller registers start at certain offset
183 * within the whole USB registers range, so create a subregion for the
184 * host mode configuration purposes.
187 if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST,
188 sc->sc_io_size, &sc->sc_io_hdl) != 0)
189 panic("%s: unable to subregion USB host registers",
190 device_get_name(self));
193 if (hwtype == HWTYPE_MV_EHCI_V1) {
194 irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
195 RF_SHAREABLE | RF_ACTIVE);
196 if (irq_err == NULL) {
197 device_printf(self, "Could not allocate error irq\n");
198 mv_ehci_detach(self);
205 * Notice: Marvell EHCI controller has TWO interrupt lines, so make
206 * sure to use the correct rid for the main one (controller interrupt)
207 * -- refer to DTS for the right resource number to use here.
209 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
210 RF_SHAREABLE | RF_ACTIVE);
211 if (sc->sc_irq_res == NULL) {
212 device_printf(self, "Could not allocate irq\n");
216 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
217 if (!sc->sc_bus.bdev) {
218 device_printf(self, "Could not add USB device\n");
221 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
222 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
224 sprintf(sc->sc_vendor, "Marvell");
226 if (hwtype == HWTYPE_MV_EHCI_V1) {
227 err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO,
228 err_intr, NULL, sc, &ih_err);
230 device_printf(self, "Could not setup error irq, %d\n", err);
236 EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR |
237 MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW |
238 MV_USB_DEVICE_UNDERFLOW);
240 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
241 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
243 device_printf(self, "Could not setup irq, %d\n", err);
244 sc->sc_intr_hdl = NULL;
249 * Workaround for Marvell integrated EHCI controller: reset of
250 * the EHCI core clears the USBMODE register, which sets the core in
251 * an undefined state (neither host nor agent), so it needs to be set
252 * again for proper operation.
254 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for
257 sc->sc_vendor_post_reset = mv_ehci_post_reset;
259 device_printf(self, "5.24 GL USB-2 workaround enabled\n");
261 /* XXX all MV chips need it? */
262 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
263 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
266 err = device_probe_and_attach(sc->sc_bus.bdev);
269 device_printf(self, "USB init failed err=%d\n", err);
275 mv_ehci_detach(self);
280 mv_ehci_detach(device_t self)
282 ehci_softc_t *sc = device_get_softc(self);
285 /* during module unload there are lots of children leftover */
286 device_delete_children(self);
289 * disable interrupts that might have been switched on in mv_ehci_attach
292 EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0);
294 if (sc->sc_irq_res && sc->sc_intr_hdl) {
296 * only call ehci_detach() after ehci_init()
300 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
303 /* XXX or should we panic? */
304 device_printf(self, "Could not tear down irq, %d\n",
306 sc->sc_intr_hdl = NULL;
308 if (irq_err && ih_err) {
309 err = bus_teardown_intr(self, irq_err, ih_err);
312 device_printf(self, "Could not tear down irq, %d\n",
317 bus_release_resource(self, SYS_RES_IRQ, 0, irq_err);
320 if (sc->sc_irq_res) {
321 bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res);
322 sc->sc_irq_res = NULL;
325 bus_release_resource(self, SYS_RES_MEMORY, 0,
327 sc->sc_io_res = NULL;
329 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
337 ehci_softc_t *sc = arg;
340 cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE);
342 printf("USB error: ");
343 if (cause & MV_USB_ADDR_DECODE_ERR) {
346 addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR);
347 printf("address decoding error (addr=%#x)\n", addr);
349 if (cause & MV_USB_HOST_UNDERFLOW)
350 printf("host underflow\n");
351 if (cause & MV_USB_HOST_OVERFLOW)
352 printf("host overflow\n");
353 if (cause & MV_USB_DEVICE_UNDERFLOW)
354 printf("device underflow\n");
355 if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW |
356 MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW))
357 printf("unknown cause (cause=%#x)\n", cause);
359 EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0);
361 return (FILTER_HANDLED);
364 static device_method_t ehci_methods[] = {
365 /* Device interface */
366 DEVMETHOD(device_probe, mv_ehci_probe),
367 DEVMETHOD(device_attach, mv_ehci_attach),
368 DEVMETHOD(device_detach, mv_ehci_detach),
369 DEVMETHOD(device_suspend, bus_generic_suspend),
370 DEVMETHOD(device_resume, bus_generic_resume),
371 DEVMETHOD(device_shutdown, bus_generic_shutdown),
376 static driver_t ehci_driver = {
379 sizeof(ehci_softc_t),
382 static devclass_t ehci_devclass;
384 DRIVER_MODULE(ehci_mv, simplebus, ehci_driver, ehci_devclass, 0, 0);
385 MODULE_DEPEND(ehci_mv, usb, 1, 1, 1);