2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
5 * Developed by Semihalf.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * FDT attachment driver for the USB Enhanced Host Controller.
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
41 #include <sys/stdint.h>
42 #include <sys/stddef.h>
43 #include <sys/param.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
49 #include <sys/module.h>
51 #include <sys/mutex.h>
52 #include <sys/condvar.h>
53 #include <sys/sysctl.h>
55 #include <sys/unistd.h>
56 #include <sys/callout.h>
57 #include <sys/malloc.h>
60 #include <dev/ofw/ofw_bus.h>
61 #include <dev/ofw/ofw_bus_subr.h>
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usb_core.h>
67 #include <dev/usb/usb_busdma.h>
68 #include <dev/usb/usb_process.h>
69 #include <dev/usb/usb_util.h>
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #include <dev/usb/controller/ehci.h>
74 #include <dev/usb/controller/ehcireg.h>
76 #include <arm/mv/mvreg.h>
77 #include <arm/mv/mvvar.h>
79 #define EHCI_VENDORID_MRVL 0x1286
80 #define EHCI_HC_DEVSTR "Marvell Integrated USB 2.0 controller"
82 static device_attach_t mv_ehci_attach;
83 static device_detach_t mv_ehci_detach;
85 static int err_intr(void *arg);
87 static struct resource *irq_err;
90 /* EHCI HC regs start at this offset within USB range */
91 #define MV_USB_HOST_OFST 0x0100
93 #define USB_BRIDGE_INTR_CAUSE 0x210
94 #define USB_BRIDGE_INTR_MASK 0x214
95 #define USB_BRIDGE_ERR_ADDR 0x21C
97 #define MV_USB_ADDR_DECODE_ERR (1 << 0)
98 #define MV_USB_HOST_UNDERFLOW (1 << 1)
99 #define MV_USB_HOST_OVERFLOW (1 << 2)
100 #define MV_USB_DEVICE_UNDERFLOW (1 << 3)
102 static struct ofw_compat_data compat_data[] = {
103 {"mrvl,usb-ehci", true},
104 {"marvell,orion-ehci", true},
109 mv_ehci_post_reset(struct ehci_softc *ehci_softc)
113 /* Force HOST mode */
114 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
115 usbmode &= ~EHCI_UM_CM;
116 usbmode |= EHCI_UM_CM_HOST;
117 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
121 mv_ehci_probe(device_t self)
124 if (!ofw_bus_status_okay(self))
127 if (!ofw_bus_search_compatible(self, compat_data)->ocd_data)
130 device_set_desc(self, EHCI_HC_DEVSTR);
132 return (BUS_PROBE_DEFAULT);
136 mv_ehci_attach(device_t self)
138 ehci_softc_t *sc = device_get_softc(self);
139 bus_space_handle_t bsh;
143 /* initialise some bus fields */
144 sc->sc_bus.parent = self;
145 sc->sc_bus.devices = sc->sc_devices;
146 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
147 sc->sc_bus.dma_bits = 32;
149 /* get all DMA memory */
150 if (usb_bus_mem_alloc_all(&sc->sc_bus,
151 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
156 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
157 if (!sc->sc_io_res) {
158 device_printf(self, "Could not map memory\n");
161 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
162 bsh = rman_get_bushandle(sc->sc_io_res);
163 sc->sc_io_size = rman_get_size(sc->sc_io_res) - MV_USB_HOST_OFST;
166 * Marvell EHCI host controller registers start at certain offset
167 * within the whole USB registers range, so create a subregion for the
168 * host mode configuration purposes.
171 if (bus_space_subregion(sc->sc_io_tag, bsh, MV_USB_HOST_OFST,
172 sc->sc_io_size, &sc->sc_io_hdl) != 0)
173 panic("%s: unable to subregion USB host registers",
174 device_get_name(self));
177 if (!ofw_bus_is_compatible(self, "marvell,orion-ehci")) {
178 irq_err = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
179 RF_SHAREABLE | RF_ACTIVE);
180 if (irq_err == NULL) {
181 device_printf(self, "Could not allocate error irq\n");
182 mv_ehci_detach(self);
189 * Notice: Marvell EHCI controller has TWO interrupt lines, so make
190 * sure to use the correct rid for the main one (controller interrupt)
191 * -- refer to DTS for the right resource number to use here.
193 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
194 RF_SHAREABLE | RF_ACTIVE);
195 if (sc->sc_irq_res == NULL) {
196 device_printf(self, "Could not allocate irq\n");
200 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
201 if (!sc->sc_bus.bdev) {
202 device_printf(self, "Could not add USB device\n");
205 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
206 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
208 sprintf(sc->sc_vendor, "Marvell");
210 if (!ofw_bus_is_compatible(self, "marvell,orion-ehci")) {
211 err = bus_setup_intr(self, irq_err, INTR_TYPE_BIO,
212 err_intr, NULL, sc, &ih_err);
214 device_printf(self, "Could not setup error irq, %d\n", err);
220 EWRITE4(sc, USB_BRIDGE_INTR_MASK, MV_USB_ADDR_DECODE_ERR |
221 MV_USB_HOST_UNDERFLOW | MV_USB_HOST_OVERFLOW |
222 MV_USB_DEVICE_UNDERFLOW);
224 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
225 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
227 device_printf(self, "Could not setup irq, %d\n", err);
228 sc->sc_intr_hdl = NULL;
233 * Workaround for Marvell integrated EHCI controller: reset of
234 * the EHCI core clears the USBMODE register, which sets the core in
235 * an undefined state (neither host nor agent), so it needs to be set
236 * again for proper operation.
238 * Refer to errata document MV-S500832-00D.pdf (p. 5.24 GL USB-2) for
241 sc->sc_vendor_post_reset = mv_ehci_post_reset;
243 device_printf(self, "5.24 GL USB-2 workaround enabled\n");
245 /* XXX all MV chips need it? */
246 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
247 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
250 err = device_probe_and_attach(sc->sc_bus.bdev);
253 device_printf(self, "USB init failed err=%d\n", err);
259 mv_ehci_detach(self);
264 mv_ehci_detach(device_t self)
266 ehci_softc_t *sc = device_get_softc(self);
269 /* during module unload there are lots of children leftover */
270 device_delete_children(self);
273 * disable interrupts that might have been switched on in mv_ehci_attach
276 EWRITE4(sc, USB_BRIDGE_INTR_MASK, 0);
278 if (sc->sc_irq_res && sc->sc_intr_hdl) {
280 * only call ehci_detach() after ehci_init()
284 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
287 /* XXX or should we panic? */
288 device_printf(self, "Could not tear down irq, %d\n",
290 sc->sc_intr_hdl = NULL;
292 if (irq_err && ih_err) {
293 err = bus_teardown_intr(self, irq_err, ih_err);
296 device_printf(self, "Could not tear down irq, %d\n",
301 bus_release_resource(self, SYS_RES_IRQ, 0, irq_err);
304 if (sc->sc_irq_res) {
305 bus_release_resource(self, SYS_RES_IRQ, 1, sc->sc_irq_res);
306 sc->sc_irq_res = NULL;
309 bus_release_resource(self, SYS_RES_MEMORY, 0,
311 sc->sc_io_res = NULL;
313 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
321 ehci_softc_t *sc = arg;
324 cause = EREAD4(sc, USB_BRIDGE_INTR_CAUSE);
326 printf("USB error: ");
327 if (cause & MV_USB_ADDR_DECODE_ERR) {
330 addr = EREAD4(sc, USB_BRIDGE_ERR_ADDR);
331 printf("address decoding error (addr=%#x)\n", addr);
333 if (cause & MV_USB_HOST_UNDERFLOW)
334 printf("host underflow\n");
335 if (cause & MV_USB_HOST_OVERFLOW)
336 printf("host overflow\n");
337 if (cause & MV_USB_DEVICE_UNDERFLOW)
338 printf("device underflow\n");
339 if (cause & ~(MV_USB_ADDR_DECODE_ERR | MV_USB_HOST_UNDERFLOW |
340 MV_USB_HOST_OVERFLOW | MV_USB_DEVICE_UNDERFLOW))
341 printf("unknown cause (cause=%#x)\n", cause);
343 EWRITE4(sc, USB_BRIDGE_INTR_CAUSE, 0);
345 return (FILTER_HANDLED);
348 static device_method_t ehci_methods[] = {
349 /* Device interface */
350 DEVMETHOD(device_probe, mv_ehci_probe),
351 DEVMETHOD(device_attach, mv_ehci_attach),
352 DEVMETHOD(device_detach, mv_ehci_detach),
353 DEVMETHOD(device_suspend, bus_generic_suspend),
354 DEVMETHOD(device_resume, bus_generic_resume),
355 DEVMETHOD(device_shutdown, bus_generic_shutdown),
360 static driver_t ehci_driver = {
363 sizeof(ehci_softc_t),
366 static devclass_t ehci_devclass;
368 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
369 MODULE_DEPEND(ehci, usb, 1, 1, 1);