2 * Copyright (c) 2006 M. Warner Losh.
3 * Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org> All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Generic OHCI driver based on AT91 OHCI
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <sys/condvar.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
42 #include <machine/bus.h>
43 #include <dev/ofw/ofw_bus.h>
44 #include <dev/ofw/ofw_bus_subr.h>
46 #include <dev/usb/usb.h>
47 #include <dev/usb/usbdi.h>
49 #include <dev/usb/usb_core.h>
50 #include <dev/usb/usb_busdma.h>
51 #include <dev/usb/usb_process.h>
52 #include <dev/usb/usb_util.h>
54 #include <dev/usb/usb_controller.h>
55 #include <dev/usb/usb_bus.h>
56 #include <dev/usb/controller/ohci.h>
57 #include <dev/usb/controller/ohcireg.h>
60 #include <dev/extres/clk/clk.h>
61 #include <dev/extres/hwreset/hwreset.h>
62 #include <dev/extres/phy/phy.h>
63 #include <dev/extres/phy/phy_usb.h>
66 #include "generic_usb_if.h"
70 TAILQ_ENTRY(clk_list) next;
74 TAILQ_ENTRY(phy_list) next;
78 TAILQ_ENTRY(hwrst_list) next;
83 struct generic_ohci_softc {
87 TAILQ_HEAD(, clk_list) clk_list;
88 TAILQ_HEAD(, phy_list) phy_list;
89 TAILQ_HEAD(, hwrst_list) rst_list;
93 static int generic_ohci_detach(device_t);
96 generic_ohci_probe(device_t dev)
99 if (!ofw_bus_status_okay(dev))
102 if (!ofw_bus_is_compatible(dev, "generic-ohci"))
105 device_set_desc(dev, "Generic OHCI Controller");
107 return (BUS_PROBE_DEFAULT);
111 generic_ohci_attach(device_t dev)
113 struct generic_ohci_softc *sc = device_get_softc(dev);
117 struct clk_list *clkp;
118 struct phy_list *phyp;
119 struct hwrst_list *rstp;
125 sc->ohci_sc.sc_bus.parent = dev;
126 sc->ohci_sc.sc_bus.devices = sc->ohci_sc.sc_devices;
127 sc->ohci_sc.sc_bus.devices_max = OHCI_MAX_DEVICES;
128 sc->ohci_sc.sc_bus.dma_bits = 32;
130 /* get all DMA memory */
131 if (usb_bus_mem_alloc_all(&sc->ohci_sc.sc_bus,
132 USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
137 sc->ohci_sc.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
139 if (sc->ohci_sc.sc_io_res == 0) {
144 sc->ohci_sc.sc_io_tag = rman_get_bustag(sc->ohci_sc.sc_io_res);
145 sc->ohci_sc.sc_io_hdl = rman_get_bushandle(sc->ohci_sc.sc_io_res);
146 sc->ohci_sc.sc_io_size = rman_get_size(sc->ohci_sc.sc_io_res);
149 sc->ohci_sc.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
151 if (sc->ohci_sc.sc_irq_res == 0) {
155 sc->ohci_sc.sc_bus.bdev = device_add_child(dev, "usbus", -1);
156 if (sc->ohci_sc.sc_bus.bdev == 0) {
160 device_set_ivars(sc->ohci_sc.sc_bus.bdev, &sc->ohci_sc.sc_bus);
162 strlcpy(sc->ohci_sc.sc_vendor, "Generic",
163 sizeof(sc->ohci_sc.sc_vendor));
165 err = bus_setup_intr(dev, sc->ohci_sc.sc_irq_res,
166 INTR_TYPE_BIO | INTR_MPSAFE, NULL,
167 (driver_intr_t *)ohci_interrupt, sc, &sc->ohci_sc.sc_intr_hdl);
169 sc->ohci_sc.sc_intr_hdl = NULL;
174 TAILQ_INIT(&sc->clk_list);
176 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
177 err = clk_enable(clk);
179 device_printf(dev, "Could not enable clock %s\n",
183 clkp = malloc(sizeof(*clkp), M_DEVBUF, M_WAITOK | M_ZERO);
185 TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);
188 /* De-assert reset */
189 TAILQ_INIT(&sc->rst_list);
190 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) {
191 err = hwreset_deassert(rst);
193 device_printf(dev, "Could not de-assert reset\n");
196 rstp = malloc(sizeof(*rstp), M_DEVBUF, M_WAITOK | M_ZERO);
198 TAILQ_INSERT_TAIL(&sc->rst_list, rstp, next);
202 TAILQ_INIT(&sc->phy_list);
203 for (off = 0; phy_get_by_ofw_idx(dev, 0, off, &phy) == 0; off++) {
204 err = phy_usb_set_mode(phy, PHY_USB_MODE_HOST);
206 device_printf(dev, "Could not set phy to host mode\n");
209 err = phy_enable(phy);
211 device_printf(dev, "Could not enable phy\n");
214 phyp = malloc(sizeof(*phyp), M_DEVBUF, M_WAITOK | M_ZERO);
216 TAILQ_INSERT_TAIL(&sc->phy_list, phyp, next);
220 if (GENERIC_USB_INIT(dev) != 0) {
225 err = ohci_init(&sc->ohci_sc);
227 err = device_probe_and_attach(sc->ohci_sc.sc_bus.bdev);
233 generic_ohci_detach(dev);
238 generic_ohci_detach(device_t dev)
240 struct generic_ohci_softc *sc = device_get_softc(dev);
243 struct clk_list *clk, *clk_tmp;
244 struct phy_list *phy, *phy_tmp;
245 struct hwrst_list *rst, *rst_tmp;
248 /* during module unload there are lots of children leftover */
249 device_delete_children(dev);
252 * Put the controller into reset, then disable clocks and do
253 * the MI tear down. We have to disable the clocks/hardware
254 * after we do the rest of the teardown. We also disable the
255 * clocks in the opposite order we acquire them, but that
256 * doesn't seem to be absolutely necessary. We free up the
257 * clocks after we disable them, so the system could, in
258 * theory, reuse them.
260 bus_space_write_4(sc->ohci_sc.sc_io_tag, sc->ohci_sc.sc_io_hdl,
263 if (sc->ohci_sc.sc_irq_res && sc->ohci_sc.sc_intr_hdl) {
265 * only call ohci_detach() after ohci_init()
267 ohci_detach(&sc->ohci_sc);
269 err = bus_teardown_intr(dev, sc->ohci_sc.sc_irq_res,
270 sc->ohci_sc.sc_intr_hdl);
271 sc->ohci_sc.sc_intr_hdl = NULL;
273 if (sc->ohci_sc.sc_irq_res) {
274 bus_release_resource(dev, SYS_RES_IRQ, 0,
275 sc->ohci_sc.sc_irq_res);
276 sc->ohci_sc.sc_irq_res = NULL;
278 if (sc->ohci_sc.sc_io_res) {
279 bus_release_resource(dev, SYS_RES_MEMORY, 0,
280 sc->ohci_sc.sc_io_res);
281 sc->ohci_sc.sc_io_res = NULL;
283 usb_bus_mem_free_all(&sc->ohci_sc.sc_bus, &ohci_iterate_hw_softc);
287 TAILQ_FOREACH_SAFE(phy, &sc->phy_list, next, phy_tmp) {
288 err = phy_disable(phy->phy);
290 device_printf(dev, "Could not disable phy\n");
291 phy_release(phy->phy);
292 TAILQ_REMOVE(&sc->phy_list, phy, next);
297 TAILQ_FOREACH_SAFE(rst, &sc->rst_list, next, rst_tmp) {
298 hwreset_assert(rst->rst);
299 hwreset_release(rst->rst);
300 TAILQ_REMOVE(&sc->rst_list, rst, next);
305 TAILQ_FOREACH_SAFE(clk, &sc->clk_list, next, clk_tmp) {
306 err = clk_disable(clk->clk);
308 device_printf(dev, "Could not disable clock %s\n",
309 clk_get_name(clk->clk));
310 err = clk_release(clk->clk);
312 device_printf(dev, "Could not release clock %s\n",
313 clk_get_name(clk->clk));
314 TAILQ_REMOVE(&sc->clk_list, clk, next);
319 if (GENERIC_USB_DEINIT(dev) != 0)
325 static device_method_t generic_ohci_methods[] = {
326 /* Device interface */
327 DEVMETHOD(device_probe, generic_ohci_probe),
328 DEVMETHOD(device_attach, generic_ohci_attach),
329 DEVMETHOD(device_detach, generic_ohci_detach),
331 DEVMETHOD(device_suspend, bus_generic_suspend),
332 DEVMETHOD(device_resume, bus_generic_resume),
333 DEVMETHOD(device_shutdown, bus_generic_shutdown),
338 driver_t generic_ohci_driver = {
340 .methods = generic_ohci_methods,
341 .size = sizeof(struct generic_ohci_softc),
344 static devclass_t generic_ohci_devclass;
346 DRIVER_MODULE(ohci, simplebus, generic_ohci_driver,
347 generic_ohci_devclass, 0, 0);
348 MODULE_DEPEND(ohci, usb, 1, 1, 1);