3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
6 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
7 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * USB Open Host Controller driver.
34 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
38 #ifdef USB_GLOBAL_INCLUDE_FILE
39 #include USB_GLOBAL_INCLUDE_FILE
41 #include <sys/stdint.h>
42 #include <sys/stddef.h>
43 #include <sys/param.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
49 #include <sys/module.h>
51 #include <sys/mutex.h>
52 #include <sys/condvar.h>
53 #include <sys/sysctl.h>
55 #include <sys/unistd.h>
56 #include <sys/callout.h>
57 #include <sys/malloc.h>
60 #include <dev/usb/usb.h>
61 #include <dev/usb/usbdi.h>
63 #define USB_DEBUG_VAR ohcidebug
65 #include <dev/usb/usb_core.h>
66 #include <dev/usb/usb_debug.h>
67 #include <dev/usb/usb_busdma.h>
68 #include <dev/usb/usb_process.h>
69 #include <dev/usb/usb_transfer.h>
70 #include <dev/usb/usb_device.h>
71 #include <dev/usb/usb_hub.h>
72 #include <dev/usb/usb_util.h>
74 #include <dev/usb/usb_controller.h>
75 #include <dev/usb/usb_bus.h>
76 #endif /* USB_GLOBAL_INCLUDE_FILE */
78 #include <dev/usb/controller/ohci.h>
79 #include <dev/usb/controller/ohcireg.h>
81 #define OHCI_BUS2SC(bus) \
82 ((ohci_softc_t *)(((uint8_t *)(bus)) - \
83 ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
86 static int ohcidebug = 0;
88 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
90 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RWTUN,
91 &ohcidebug, 0, "ohci debug level");
93 static void ohci_dumpregs(ohci_softc_t *);
94 static void ohci_dump_tds(ohci_td_t *);
95 static uint8_t ohci_dump_td(ohci_td_t *);
96 static void ohci_dump_ed(ohci_ed_t *);
97 static uint8_t ohci_dump_itd(ohci_itd_t *);
98 static void ohci_dump_itds(ohci_itd_t *);
102 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
103 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
104 #define OWRITE1(sc, r, x) \
105 do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
106 #define OWRITE2(sc, r, x) \
107 do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
108 #define OWRITE4(sc, r, x) \
109 do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
110 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
111 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
112 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
114 #define OHCI_INTR_ENDPT 1
116 static const struct usb_bus_methods ohci_bus_methods;
117 static const struct usb_pipe_methods ohci_device_bulk_methods;
118 static const struct usb_pipe_methods ohci_device_ctrl_methods;
119 static const struct usb_pipe_methods ohci_device_intr_methods;
120 static const struct usb_pipe_methods ohci_device_isoc_methods;
122 static void ohci_do_poll(struct usb_bus *bus);
123 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
124 static void ohci_timeout(void *arg);
125 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
126 static void ohci_root_intr(ohci_softc_t *sc);
128 struct ohci_std_temp {
129 struct usb_page_cache *pc;
135 uint16_t max_frame_size;
137 uint8_t setup_alt_next;
141 static struct ohci_hcca *
142 ohci_get_hcca(ohci_softc_t *sc)
144 usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
145 return (sc->sc_hcca_p);
149 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
151 struct ohci_softc *sc = OHCI_BUS2SC(bus);
154 cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
155 sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
157 cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
158 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
160 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
161 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
163 cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
164 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
166 for (i = 0; i != OHCI_NO_EDS; i++) {
167 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
168 sizeof(ohci_ed_t), OHCI_ED_ALIGN);
173 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
175 struct usb_page_search buf_res;
184 /* Determine in what context we are running. */
185 ctl = OREAD4(sc, OHCI_CONTROL);
187 /* SMM active, request change */
188 DPRINTF("SMM active, request owner change\n");
189 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
190 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
191 usb_pause_mtx(NULL, hz / 1000);
192 ctl = OREAD4(sc, OHCI_CONTROL);
195 device_printf(sc->sc_bus.bdev,
196 "SMM does not respond, resetting\n");
197 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
201 DPRINTF("cold started\n");
203 /* controller was cold started */
205 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
209 * This reset should not be necessary according to the OHCI spec, but
210 * without it some controllers do not start.
212 DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
213 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
216 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
218 /* we now own the host controller and the bus has been reset */
219 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
221 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
222 /* nominal time for a reset is 10 us */
223 for (i = 0; i < 10; i++) {
225 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
231 device_printf(sc->sc_bus.bdev, "reset timeout\n");
232 return (USB_ERR_IOERROR);
235 if (ohcidebug > 15) {
241 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
242 return (USB_ERR_NORMAL_COMPLETION);
245 /* The controller is now in SUSPEND state, we have 2ms to finish. */
247 /* set up HC registers */
248 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
249 OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
251 usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
252 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
254 usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
255 OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
257 /* disable all interrupts and then switch on all desired interrupts */
258 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
259 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
260 /* switch on desired functional features */
261 ctl = OREAD4(sc, OHCI_CONTROL);
262 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
263 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
264 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
265 /* And finally start it! */
266 OWRITE4(sc, OHCI_CONTROL, ctl);
269 * The controller is now OPERATIONAL. Set a some final
270 * registers that should be set earlier, but that the
271 * controller ignores when in the SUSPEND state.
273 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
274 fm |= OHCI_FSMPS(ival) | ival;
275 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
276 per = OHCI_PERIODIC(ival); /* 90% periodic */
277 OWRITE4(sc, OHCI_PERIODIC_START, per);
279 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
280 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
281 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
282 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
284 USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
285 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
288 * The AMD756 requires a delay before re-reading the register,
289 * otherwise it will occasionally report 0 ports.
292 for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
294 USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
295 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
303 return (USB_ERR_NORMAL_COMPLETION);
306 static struct ohci_ed *
307 ohci_init_ed(struct usb_page_cache *pc)
309 struct usb_page_search buf_res;
312 usbd_get_page(pc, 0, &buf_res);
316 ed->ed_self = htole32(buf_res.physaddr);
317 ed->ed_flags = htole32(OHCI_ED_SKIP);
324 ohci_init(ohci_softc_t *sc)
326 struct usb_page_search buf_res;
334 sc->sc_eintrs = OHCI_NORMAL_INTRS;
341 ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
344 ohci_init_ed(&sc->sc_hw.bulk_start_pc);
347 ohci_init_ed(&sc->sc_hw.isoc_start_pc);
349 for (i = 0; i != OHCI_NO_EDS; i++) {
350 sc->sc_intr_p_last[i] =
351 ohci_init_ed(sc->sc_hw.intr_start_pc + i);
355 * the QHs are arranged to give poll intervals that are
356 * powers of 2 times 1ms
358 bit = OHCI_NO_EDS / 2;
365 y = (x ^ bit) | (bit / 2);
368 * the next QH has half the poll interval
370 ed_x = sc->sc_intr_p_last[x];
371 ed_y = sc->sc_intr_p_last[y];
374 ed_x->ed_next = ed_y->ed_self;
385 ed_int = sc->sc_intr_p_last[0];
386 ed_isc = sc->sc_isoc_p_last;
388 /* the last (1ms) QH */
389 ed_int->next = ed_isc;
390 ed_int->ed_next = ed_isc->ed_self;
392 usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
394 sc->sc_hcca_p = buf_res.buffer;
397 * Fill HCCA interrupt table. The bit reversal is to get
398 * the tree set up properly to spread the interrupts.
400 for (i = 0; i != OHCI_NO_INTRS; i++) {
401 sc->sc_hcca_p->hcca_interrupt_table[i] =
402 sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
404 /* flush all cache into memory */
406 usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
408 /* set up the bus struct */
409 sc->sc_bus.methods = &ohci_bus_methods;
411 usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
414 if (ohcidebug > 15) {
415 for (i = 0; i != OHCI_NO_EDS; i++) {
417 ohci_dump_ed(sc->sc_intr_p_last[i]);
420 ohci_dump_ed(sc->sc_isoc_p_last);
424 sc->sc_bus.usbrev = USB_REV_1_0;
426 if (ohci_controller_init(sc, 0) != 0)
427 return (USB_ERR_INVAL);
429 /* catch any lost interrupts */
430 ohci_do_poll(&sc->sc_bus);
431 return (USB_ERR_NORMAL_COMPLETION);
435 * shut down the controller when the system is going down
438 ohci_detach(struct ohci_softc *sc)
440 USB_BUS_LOCK(&sc->sc_bus);
442 usb_callout_stop(&sc->sc_tmo_rhsc);
444 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
445 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
447 USB_BUS_UNLOCK(&sc->sc_bus);
449 /* XXX let stray task complete */
450 usb_pause_mtx(NULL, hz / 20);
452 usb_callout_drain(&sc->sc_tmo_rhsc);
456 ohci_suspend(ohci_softc_t *sc)
465 /* reset HC and leave it suspended */
466 ohci_controller_init(sc, 1);
470 ohci_resume(ohci_softc_t *sc)
479 /* some broken BIOSes never initialize the Controller chip */
480 ohci_controller_init(sc, 0);
482 /* catch any lost interrupts */
483 ohci_do_poll(&sc->sc_bus);
488 ohci_dumpregs(ohci_softc_t *sc)
490 struct ohci_hcca *hcca;
492 DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
493 OREAD4(sc, OHCI_REVISION),
494 OREAD4(sc, OHCI_CONTROL),
495 OREAD4(sc, OHCI_COMMAND_STATUS));
496 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
497 OREAD4(sc, OHCI_INTERRUPT_STATUS),
498 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
499 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
500 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
501 OREAD4(sc, OHCI_HCCA),
502 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
503 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
504 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
505 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
506 OREAD4(sc, OHCI_BULK_HEAD_ED),
507 OREAD4(sc, OHCI_BULK_CURRENT_ED));
508 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
509 OREAD4(sc, OHCI_DONE_HEAD),
510 OREAD4(sc, OHCI_FM_INTERVAL),
511 OREAD4(sc, OHCI_FM_REMAINING));
512 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
513 OREAD4(sc, OHCI_FM_NUMBER),
514 OREAD4(sc, OHCI_PERIODIC_START),
515 OREAD4(sc, OHCI_LS_THRESHOLD));
516 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
517 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
518 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
519 OREAD4(sc, OHCI_RH_STATUS));
520 DPRINTF(" port1=0x%08x port2=0x%08x\n",
521 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
522 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
524 hcca = ohci_get_hcca(sc);
526 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
527 le32toh(hcca->hcca_frame_number),
528 le32toh(hcca->hcca_done_head));
531 ohci_dump_tds(ohci_td_t *std)
533 for (; std; std = std->obj_next) {
534 if (ohci_dump_td(std)) {
541 ohci_dump_td(ohci_td_t *std)
546 usb_pc_cpu_invalidate(std->page_cache);
548 td_flags = le32toh(std->td_flags);
549 temp = (std->td_next == 0);
551 printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
552 "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
553 std, le32toh(std->td_self),
554 (td_flags & OHCI_TD_R) ? "-R" : "",
555 (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
556 (td_flags & OHCI_TD_IN) ? "-IN" : "",
557 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
558 ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
559 OHCI_TD_GET_DI(td_flags),
560 OHCI_TD_GET_EC(td_flags),
561 OHCI_TD_GET_CC(td_flags),
562 le32toh(std->td_cbp),
563 le32toh(std->td_next),
564 le32toh(std->td_be));
570 ohci_dump_itd(ohci_itd_t *sitd)
576 usb_pc_cpu_invalidate(sitd->page_cache);
578 itd_flags = le32toh(sitd->itd_flags);
579 temp = (sitd->itd_next == 0);
581 printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
582 "bp0=0x%08x next=0x%08x be=0x%08x\n",
583 sitd, le32toh(sitd->itd_self),
584 OHCI_ITD_GET_SF(itd_flags),
585 OHCI_ITD_GET_DI(itd_flags),
586 OHCI_ITD_GET_FC(itd_flags),
587 OHCI_ITD_GET_CC(itd_flags),
588 le32toh(sitd->itd_bp0),
589 le32toh(sitd->itd_next),
590 le32toh(sitd->itd_be));
591 for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
592 printf("offs[%d]=0x%04x ", i,
593 (uint32_t)le16toh(sitd->itd_offset[i]));
601 ohci_dump_itds(ohci_itd_t *sitd)
603 for (; sitd; sitd = sitd->obj_next) {
604 if (ohci_dump_itd(sitd)) {
611 ohci_dump_ed(ohci_ed_t *sed)
616 usb_pc_cpu_invalidate(sed->page_cache);
618 ed_flags = le32toh(sed->ed_flags);
619 ed_headp = le32toh(sed->ed_headp);
621 printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
622 "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
623 sed, le32toh(sed->ed_self),
624 OHCI_ED_GET_FA(ed_flags),
625 OHCI_ED_GET_EN(ed_flags),
626 OHCI_ED_GET_MAXP(ed_flags),
627 (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
628 (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
629 (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
630 (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
631 (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
632 le32toh(sed->ed_tailp),
633 (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
634 (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
635 le32toh(sed->ed_headp),
636 le32toh(sed->ed_next));
642 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
644 /* check for early completion */
645 if (ohci_check_transfer(xfer)) {
648 /* put transfer on interrupt queue */
649 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
651 /* start timeout, if any */
652 if (xfer->timeout != 0) {
653 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
657 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
659 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
661 DPRINTFN(11, "%p to %p\n", sed, last);
663 if (sed->prev != NULL) {
664 /* should not happen */
665 DPRINTFN(0, "ED already linked!\n");
668 /* (sc->sc_bus.bus_mtx) must be locked */
670 sed->next = last->next;
671 sed->ed_next = last->ed_next;
676 usb_pc_cpu_flush(sed->page_cache);
679 * the last->next->prev is never followed: sed->next->prev = sed;
683 last->ed_next = sed->ed_self;
685 usb_pc_cpu_flush(last->page_cache);
690 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
692 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
694 DPRINTFN(11, "%p from %p\n", sed, last);
696 /* (sc->sc_bus.bus_mtx) must be locked */
698 /* only remove if not removed from a queue */
700 sed->prev->next = sed->next;
701 sed->prev->ed_next = sed->ed_next;
703 usb_pc_cpu_flush(sed->prev->page_cache);
706 sed->next->prev = sed->prev;
707 usb_pc_cpu_flush(sed->next->page_cache);
709 last = ((last == sed) ? sed->prev : last);
713 usb_pc_cpu_flush(sed->page_cache);
719 ohci_isoc_done(struct usb_xfer *xfer)
722 uint32_t *plen = xfer->frlengths;
723 volatile uint16_t *olen;
725 ohci_itd_t *td = xfer->td_transfer_first;
729 panic("%s:%d: out of TD's\n",
730 __FUNCTION__, __LINE__);
734 DPRINTF("isoc TD\n");
738 usb_pc_cpu_invalidate(td->page_cache);
740 nframes = td->frames;
741 olen = &td->itd_offset[0];
747 len = le16toh(*olen);
749 if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
752 len &= ((1 << 12) - 1);
756 len = 0;/* invalid length */
763 if (((void *)td) == xfer->td_transfer_last) {
769 xfer->aframes = xfer->nframes;
770 ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
774 static const char *const
780 "DATA_TOGGLE_MISMATCH",
783 "DEVICE_NOT_RESPONDING",
801 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
804 ohci_td_t *td_alt_next;
811 td = xfer->td_transfer_cache;
812 td_alt_next = td->alt_next;
815 if (xfer->aframes != xfer->nframes) {
816 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
819 usb_pc_cpu_invalidate(td->page_cache);
820 phy_start = le32toh(td->td_cbp);
821 td_flags = le32toh(td->td_flags);
822 cc = OHCI_TD_GET_CC(td_flags);
826 * short transfer - compute the number of remaining
827 * bytes in the hardware buffer:
829 phy_end = le32toh(td->td_be);
830 temp = (OHCI_PAGE(phy_start ^ phy_end) ?
831 (OHCI_PAGE_SIZE + 1) : 0x0001);
832 temp += OHCI_PAGE_OFFSET(phy_end);
833 temp -= OHCI_PAGE_OFFSET(phy_start);
835 if (temp > td->len) {
836 /* guard against corruption */
838 } else if (xfer->aframes != xfer->nframes) {
840 * Sum up total transfer length
843 xfer->frlengths[xfer->aframes] += td->len - temp;
846 if (xfer->aframes != xfer->nframes) {
847 /* transfer was complete */
848 xfer->frlengths[xfer->aframes] += td->len;
851 /* Check for last transfer */
852 if (((void *)td) == xfer->td_transfer_last) {
856 /* Check transfer status */
858 /* the transfer is finished */
862 /* Check for short transfer */
864 if (xfer->flags_int.short_frames_ok) {
865 /* follow alt next */
868 /* the transfer is finished */
875 if (td->alt_next != td_alt_next) {
876 /* this USB frame is complete */
881 /* update transfer cache */
883 xfer->td_transfer_cache = td;
885 DPRINTFN(16, "error cc=%d (%s)\n",
886 cc, ohci_cc_strs[cc]);
888 return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
889 (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
893 ohci_non_isoc_done(struct usb_xfer *xfer)
897 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
898 xfer, xfer->endpoint);
901 if (ohcidebug > 10) {
902 ohci_dump_tds(xfer->td_transfer_first);
908 xfer->td_transfer_cache = xfer->td_transfer_first;
910 if (xfer->flags_int.control_xfr) {
911 if (xfer->flags_int.control_hdr) {
912 err = ohci_non_isoc_done_sub(xfer);
916 if (xfer->td_transfer_cache == NULL) {
920 while (xfer->aframes != xfer->nframes) {
921 err = ohci_non_isoc_done_sub(xfer);
924 if (xfer->td_transfer_cache == NULL) {
929 if (xfer->flags_int.control_xfr &&
930 !xfer->flags_int.control_act) {
931 err = ohci_non_isoc_done_sub(xfer);
934 ohci_device_done(xfer, err);
937 /*------------------------------------------------------------------------*
938 * ohci_check_transfer_sub
939 *------------------------------------------------------------------------*/
941 ohci_check_transfer_sub(struct usb_xfer *xfer)
950 td = xfer->td_transfer_cache;
953 usb_pc_cpu_invalidate(td->page_cache);
954 phy_start = le32toh(td->td_cbp);
955 td_flags = le32toh(td->td_flags);
956 td_next = le32toh(td->td_next);
958 /* Check for last transfer */
959 if (((void *)td) == xfer->td_transfer_last) {
960 /* the transfer is finished */
964 /* Check transfer status */
965 cc = OHCI_TD_GET_CC(td_flags);
967 /* the transfer is finished */
972 * Check if we reached the last packet
973 * or if there is a short packet:
976 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
977 /* follow alt next */
984 /* update transfer cache */
986 xfer->td_transfer_cache = td;
989 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
991 ed->ed_headp = td->td_self;
992 usb_pc_cpu_flush(ed->page_cache);
994 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
997 * Make sure that the OHCI re-scans the schedule by
998 * writing the BLF and CLF bits:
1001 if (xfer->xroot->udev->flags.self_suspended) {
1003 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1004 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1006 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1007 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1008 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1010 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1015 /*------------------------------------------------------------------------*
1016 * ohci_check_transfer
1019 * 0: USB transfer is not finished
1020 * Else: USB transfer is finished
1021 *------------------------------------------------------------------------*/
1023 ohci_check_transfer(struct usb_xfer *xfer)
1029 DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1031 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1033 usb_pc_cpu_invalidate(ed->page_cache);
1034 ed_headp = le32toh(ed->ed_headp);
1035 ed_tailp = le32toh(ed->ed_tailp);
1037 if ((ed_headp & OHCI_HALTED) ||
1038 (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1039 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1040 /* isochronous transfer */
1041 ohci_isoc_done(xfer);
1043 if (xfer->flags_int.short_frames_ok) {
1044 ohci_check_transfer_sub(xfer);
1045 if (xfer->td_transfer_cache) {
1046 /* not finished yet */
1050 /* store data-toggle */
1051 if (ed_headp & OHCI_TOGGLECARRY) {
1052 xfer->endpoint->toggle_next = 1;
1054 xfer->endpoint->toggle_next = 0;
1057 /* non-isochronous transfer */
1058 ohci_non_isoc_done(xfer);
1062 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1067 ohci_rhsc_enable(ohci_softc_t *sc)
1071 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1073 sc->sc_eintrs |= OHCI_RHSC;
1074 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1076 /* acknowledge any RHSC interrupt */
1077 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1083 ohci_interrupt_poll(ohci_softc_t *sc)
1085 struct usb_xfer *xfer;
1088 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1090 * check if transfer is transferred
1092 if (ohci_check_transfer(xfer)) {
1093 /* queue has been modified */
1099 /*------------------------------------------------------------------------*
1100 * ohci_interrupt - OHCI interrupt handler
1102 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1103 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1105 *------------------------------------------------------------------------*/
1107 ohci_interrupt(ohci_softc_t *sc)
1109 struct ohci_hcca *hcca;
1113 USB_BUS_LOCK(&sc->sc_bus);
1115 hcca = ohci_get_hcca(sc);
1117 DPRINTFN(16, "real interrupt\n");
1120 if (ohcidebug > 15) {
1125 done = le32toh(hcca->hcca_done_head);
1128 * The LSb of done is used to inform the HC Driver that an interrupt
1129 * condition exists for both the Done list and for another event
1130 * recorded in HcInterruptStatus. On an interrupt from the HC, the
1131 * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1132 * the interrupt was caused by other than the HccaDoneHead update
1133 * and the HcInterruptStatus register needs to be accessed to
1134 * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1135 * then a Done list update interrupt is indicated and if the LSb of
1136 * done is nonzero, then an additional interrupt event is indicated
1137 * and HcInterruptStatus should be checked to determine its cause.
1142 if (done & ~OHCI_DONE_INTRS) {
1145 if (done & OHCI_DONE_INTRS) {
1146 status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1148 hcca->hcca_done_head = 0;
1150 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1152 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1155 status &= ~OHCI_MIE;
1158 * nothing to be done (PCI shared
1163 OWRITE4(sc, OHCI_INTERRUPT_STATUS, status); /* Acknowledge */
1165 status &= sc->sc_eintrs;
1169 if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1171 if (status & OHCI_SO) {
1175 if (status & OHCI_RD) {
1176 printf("%s: resume detect\n", __FUNCTION__);
1177 /* XXX process resume detect */
1179 if (status & OHCI_UE) {
1180 printf("%s: unrecoverable error, "
1181 "controller halted\n", __FUNCTION__);
1182 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1185 if (status & OHCI_RHSC) {
1187 * Disable RHSC interrupt for now, because it will be
1188 * on until the port has been reset.
1190 sc->sc_eintrs &= ~OHCI_RHSC;
1191 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1195 /* do not allow RHSC interrupts > 1 per second */
1196 usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1197 (void *)&ohci_rhsc_enable, sc);
1200 status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1202 /* Block unprocessed interrupts. XXX */
1203 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1204 sc->sc_eintrs &= ~status;
1205 printf("%s: blocking intrs 0x%x\n",
1206 __FUNCTION__, status);
1208 /* poll all the USB transfers */
1209 ohci_interrupt_poll(sc);
1212 USB_BUS_UNLOCK(&sc->sc_bus);
1216 * called when a request does not complete
1219 ohci_timeout(void *arg)
1221 struct usb_xfer *xfer = arg;
1223 DPRINTF("xfer=%p\n", xfer);
1225 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1227 /* transfer is transferred */
1228 ohci_device_done(xfer, USB_ERR_TIMEOUT);
1232 ohci_do_poll(struct usb_bus *bus)
1234 struct ohci_softc *sc = OHCI_BUS2SC(bus);
1236 USB_BUS_LOCK(&sc->sc_bus);
1237 ohci_interrupt_poll(sc);
1238 USB_BUS_UNLOCK(&sc->sc_bus);
1242 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1244 struct usb_page_search buf_res;
1247 ohci_td_t *td_alt_next;
1248 uint32_t buf_offset;
1251 uint8_t shortpkt_old;
1256 shortpkt_old = temp->shortpkt;
1257 len_old = temp->len;
1260 /* software is used to detect short incoming transfers */
1262 if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1263 temp->td_flags |= htole32(OHCI_TD_R);
1265 temp->td_flags &= ~htole32(OHCI_TD_R);
1271 td_next = temp->td_next;
1274 if (temp->len == 0) {
1275 if (temp->shortpkt) {
1278 /* send a Zero Length Packet, ZLP, last */
1284 average = temp->average;
1286 if (temp->len < average) {
1287 if (temp->len % temp->max_frame_size) {
1290 average = temp->len;
1294 if (td_next == NULL) {
1295 panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1300 td_next = td->obj_next;
1302 /* check if we are pre-computing */
1305 /* update remaining length */
1307 temp->len -= average;
1311 /* fill out current TD */
1312 td->td_flags = temp->td_flags;
1314 /* the next TD uses TOGGLE_CARRY */
1315 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1319 * The buffer start and end phys addresses should be
1320 * 0x0 for a zero length packet.
1327 usbd_get_page(temp->pc, buf_offset, &buf_res);
1328 td->td_cbp = htole32(buf_res.physaddr);
1329 buf_offset += (average - 1);
1331 usbd_get_page(temp->pc, buf_offset, &buf_res);
1332 td->td_be = htole32(buf_res.physaddr);
1337 /* update remaining length */
1339 temp->len -= average;
1342 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1343 /* we need to receive these frames one by one ! */
1344 td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1345 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1346 td->td_next = htole32(OHCI_TD_NEXT_END);
1349 /* link the current TD with the next one */
1350 td->td_next = td_next->td_self;
1354 td->alt_next = td_alt_next;
1356 usb_pc_cpu_flush(td->page_cache);
1362 /* setup alt next pointer, if any */
1363 if (temp->last_frame) {
1364 /* no alternate next */
1367 /* we use this field internally */
1368 td_alt_next = td_next;
1372 temp->shortpkt = shortpkt_old;
1373 temp->len = len_old;
1377 temp->td_next = td_next;
1381 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1383 struct ohci_std_temp temp;
1384 const struct usb_pipe_methods *methods;
1390 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1391 xfer->address, UE_GET_ADDR(xfer->endpointno),
1392 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1394 temp.average = xfer->max_hc_frame_size;
1395 temp.max_frame_size = xfer->max_frame_size;
1397 /* toggle the DMA set we are using */
1398 xfer->flags_int.curr_dma_set ^= 1;
1400 /* get next DMA set */
1401 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1403 xfer->td_transfer_first = td;
1404 xfer->td_transfer_cache = td;
1408 temp.last_frame = 0;
1409 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1411 methods = xfer->endpoint->methods;
1413 /* check if we should prepend a setup message */
1415 if (xfer->flags_int.control_xfr) {
1416 if (xfer->flags_int.control_hdr) {
1417 temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1418 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1420 temp.len = xfer->frlengths[0];
1421 temp.pc = xfer->frbuffers + 0;
1422 temp.shortpkt = temp.len ? 1 : 0;
1423 /* check for last frame */
1424 if (xfer->nframes == 1) {
1425 /* no STATUS stage yet, SETUP is last */
1426 if (xfer->flags_int.control_act) {
1427 temp.last_frame = 1;
1428 temp.setup_alt_next = 0;
1431 ohci_setup_standard_chain_sub(&temp);
1434 * XXX assume that the setup message is
1435 * contained within one USB packet:
1437 xfer->endpoint->toggle_next = 1;
1443 temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1445 /* set data toggle */
1447 if (xfer->endpoint->toggle_next) {
1448 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1450 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1453 /* set endpoint direction */
1455 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1456 temp.td_flags |= htole32(OHCI_TD_IN);
1458 temp.td_flags |= htole32(OHCI_TD_OUT);
1461 while (x != xfer->nframes) {
1462 /* DATA0 / DATA1 message */
1464 temp.len = xfer->frlengths[x];
1465 temp.pc = xfer->frbuffers + x;
1469 if (x == xfer->nframes) {
1470 if (xfer->flags_int.control_xfr) {
1471 /* no STATUS stage yet, DATA is last */
1472 if (xfer->flags_int.control_act) {
1473 temp.last_frame = 1;
1474 temp.setup_alt_next = 0;
1477 temp.last_frame = 1;
1478 temp.setup_alt_next = 0;
1481 if (temp.len == 0) {
1482 /* make sure that we send an USB packet */
1487 /* regular data transfer */
1489 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1492 ohci_setup_standard_chain_sub(&temp);
1495 /* check if we should append a status stage */
1497 if (xfer->flags_int.control_xfr &&
1498 !xfer->flags_int.control_act) {
1500 * Send a DATA1 message and invert the current endpoint
1504 /* set endpoint direction and data toggle */
1506 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1507 temp.td_flags = htole32(OHCI_TD_OUT |
1508 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1510 temp.td_flags = htole32(OHCI_TD_IN |
1511 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1517 temp.last_frame = 1;
1518 temp.setup_alt_next = 0;
1520 ohci_setup_standard_chain_sub(&temp);
1524 /* Ensure that last TD is terminating: */
1525 td->td_next = htole32(OHCI_TD_NEXT_END);
1526 td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1527 td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1529 usb_pc_cpu_flush(td->page_cache);
1531 /* must have at least one frame! */
1533 xfer->td_transfer_last = td;
1536 if (ohcidebug > 8) {
1537 DPRINTF("nexttog=%d; data before transfer:\n",
1538 xfer->endpoint->toggle_next);
1539 ohci_dump_tds(xfer->td_transfer_first);
1543 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1545 ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1546 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1547 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1549 ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1551 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1552 ed_flags |= OHCI_ED_SPEED;
1554 ed->ed_flags = htole32(ed_flags);
1556 td = xfer->td_transfer_first;
1558 ed->ed_headp = td->td_self;
1560 if (xfer->xroot->udev->flags.self_suspended == 0) {
1561 /* the append function will flush the endpoint descriptor */
1562 OHCI_APPEND_QH(ed, *ed_last);
1564 if (methods == &ohci_device_bulk_methods) {
1565 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1567 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1569 if (methods == &ohci_device_ctrl_methods) {
1570 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1572 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1575 usb_pc_cpu_flush(ed->page_cache);
1580 ohci_root_intr(ohci_softc_t *sc)
1586 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1588 /* clear any old interrupt data */
1589 memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1591 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1592 DPRINTF("sc=%p hstatus=0x%08x\n",
1596 m = (sc->sc_noport + 1);
1597 if (m > (8 * sizeof(sc->sc_hub_idata))) {
1598 m = (8 * sizeof(sc->sc_hub_idata));
1600 for (i = 1; i < m; i++) {
1601 /* pick out CHANGE bits from the status register */
1602 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1603 sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1604 DPRINTF("port %d changed\n", i);
1608 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1609 sizeof(sc->sc_hub_idata));
1612 /* NOTE: "done" can be run two times in a row,
1613 * from close and from interrupt
1616 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1618 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1619 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1622 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1624 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1625 xfer, xfer->endpoint, error);
1627 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1629 usb_pc_cpu_invalidate(ed->page_cache);
1631 if (methods == &ohci_device_bulk_methods) {
1632 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1634 if (methods == &ohci_device_ctrl_methods) {
1635 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1637 if (methods == &ohci_device_intr_methods) {
1638 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1640 if (methods == &ohci_device_isoc_methods) {
1641 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1643 xfer->td_transfer_first = NULL;
1644 xfer->td_transfer_last = NULL;
1646 /* dequeue transfer and start next transfer */
1647 usbd_transfer_done(xfer, error);
1650 /*------------------------------------------------------------------------*
1652 *------------------------------------------------------------------------*/
1654 ohci_device_bulk_open(struct usb_xfer *xfer)
1660 ohci_device_bulk_close(struct usb_xfer *xfer)
1662 ohci_device_done(xfer, USB_ERR_CANCELLED);
1666 ohci_device_bulk_enter(struct usb_xfer *xfer)
1672 ohci_device_bulk_start(struct usb_xfer *xfer)
1674 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1676 /* setup TD's and QH */
1677 ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1679 /* put transfer on interrupt queue */
1680 ohci_transfer_intr_enqueue(xfer);
1683 static const struct usb_pipe_methods ohci_device_bulk_methods =
1685 .open = ohci_device_bulk_open,
1686 .close = ohci_device_bulk_close,
1687 .enter = ohci_device_bulk_enter,
1688 .start = ohci_device_bulk_start,
1691 /*------------------------------------------------------------------------*
1692 * ohci control support
1693 *------------------------------------------------------------------------*/
1695 ohci_device_ctrl_open(struct usb_xfer *xfer)
1701 ohci_device_ctrl_close(struct usb_xfer *xfer)
1703 ohci_device_done(xfer, USB_ERR_CANCELLED);
1707 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1713 ohci_device_ctrl_start(struct usb_xfer *xfer)
1715 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1717 /* setup TD's and QH */
1718 ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1720 /* put transfer on interrupt queue */
1721 ohci_transfer_intr_enqueue(xfer);
1724 static const struct usb_pipe_methods ohci_device_ctrl_methods =
1726 .open = ohci_device_ctrl_open,
1727 .close = ohci_device_ctrl_close,
1728 .enter = ohci_device_ctrl_enter,
1729 .start = ohci_device_ctrl_start,
1732 /*------------------------------------------------------------------------*
1733 * ohci interrupt support
1734 *------------------------------------------------------------------------*/
1736 ohci_device_intr_open(struct usb_xfer *xfer)
1738 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1744 bit = OHCI_NO_EDS / 2;
1746 if (xfer->interval >= bit) {
1750 if (sc->sc_intr_stat[x] <
1751 sc->sc_intr_stat[best]) {
1761 sc->sc_intr_stat[best]++;
1762 xfer->qh_pos = best;
1764 DPRINTFN(3, "best=%d interval=%d\n",
1765 best, xfer->interval);
1769 ohci_device_intr_close(struct usb_xfer *xfer)
1771 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1773 sc->sc_intr_stat[xfer->qh_pos]--;
1775 ohci_device_done(xfer, USB_ERR_CANCELLED);
1779 ohci_device_intr_enter(struct usb_xfer *xfer)
1785 ohci_device_intr_start(struct usb_xfer *xfer)
1787 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1789 /* setup TD's and QH */
1790 ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1792 /* put transfer on interrupt queue */
1793 ohci_transfer_intr_enqueue(xfer);
1796 static const struct usb_pipe_methods ohci_device_intr_methods =
1798 .open = ohci_device_intr_open,
1799 .close = ohci_device_intr_close,
1800 .enter = ohci_device_intr_enter,
1801 .start = ohci_device_intr_start,
1804 /*------------------------------------------------------------------------*
1805 * ohci isochronous support
1806 *------------------------------------------------------------------------*/
1808 ohci_device_isoc_open(struct usb_xfer *xfer)
1814 ohci_device_isoc_close(struct usb_xfer *xfer)
1817 ohci_device_done(xfer, USB_ERR_CANCELLED);
1821 ohci_device_isoc_enter(struct usb_xfer *xfer)
1823 struct usb_page_search buf_res;
1824 ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1825 struct ohci_hcca *hcca;
1826 uint32_t buf_offset;
1830 uint16_t itd_offset[OHCI_ITD_NOFFSET];
1834 ohci_itd_t *td_last = NULL;
1837 hcca = ohci_get_hcca(sc);
1839 nframes = le32toh(hcca->hcca_frame_number);
1841 DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1842 xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1844 if ((xfer->endpoint->is_synced == 0) ||
1845 (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1846 (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1848 * If there is data underflow or the pipe queue is empty we
1849 * schedule the transfer a few frames ahead of the current
1850 * frame position. Else two isochronous transfers might
1853 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1854 xfer->endpoint->is_synced = 1;
1855 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1858 * compute how many milliseconds the insertion is ahead of the
1859 * current frame position:
1861 buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1864 * pre-compute when the isochronous transfer will be finished:
1866 xfer->isoc_time_complete =
1867 (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1870 /* get the real number of frames */
1872 nframes = xfer->nframes;
1876 plen = xfer->frlengths;
1878 /* toggle the DMA set we are using */
1879 xfer->flags_int.curr_dma_set ^= 1;
1881 /* get next DMA set */
1882 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1884 xfer->td_transfer_first = td;
1891 panic("%s:%d: out of TD's\n",
1892 __FUNCTION__, __LINE__);
1894 itd_offset[ncur] = length;
1895 buf_offset += *plen;
1900 if ( /* check if the ITD is full */
1901 (ncur == OHCI_ITD_NOFFSET) ||
1902 /* check if we have put more than 4K into the ITD */
1903 (length & 0xF000) ||
1904 /* check if it is the last frame */
1906 /* fill current ITD */
1907 td->itd_flags = htole32(
1909 OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1911 OHCI_ITD_SET_FC(ncur));
1914 xfer->endpoint->isoc_next += ncur;
1922 td->itd_offset[ncur] =
1923 htole16(OHCI_ITD_MK_OFFS(0));
1926 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1927 length = OHCI_PAGE_MASK(buf_res.physaddr);
1929 OHCI_PAGE(buf_res.physaddr);
1930 td->itd_bp0 = htole32(buf_res.physaddr);
1931 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1932 td->itd_be = htole32(buf_res.physaddr);
1935 itd_offset[ncur] += length;
1937 OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1938 td->itd_offset[ncur] =
1939 htole16(itd_offset[ncur]);
1948 /* link the last TD with the next one */
1949 td_last->itd_next = td->itd_self;
1951 usb_pc_cpu_flush(td_last->page_cache);
1955 /* update the last TD */
1956 td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1957 td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1958 td_last->itd_next = 0;
1960 usb_pc_cpu_flush(td_last->page_cache);
1962 xfer->td_transfer_last = td_last;
1965 if (ohcidebug > 8) {
1966 DPRINTF("data before transfer:\n");
1967 ohci_dump_itds(xfer->td_transfer_first);
1970 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1972 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1973 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1975 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1977 ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1978 OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1979 OHCI_ED_SET_MAXP(xfer->max_frame_size));
1981 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1982 ed_flags |= OHCI_ED_SPEED;
1984 ed->ed_flags = htole32(ed_flags);
1986 td = xfer->td_transfer_first;
1988 ed->ed_headp = td->itd_self;
1990 /* isochronous transfers are not affected by suspend / resume */
1991 /* the append function will flush the endpoint descriptor */
1993 OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
1997 ohci_device_isoc_start(struct usb_xfer *xfer)
1999 /* put transfer on interrupt queue */
2000 ohci_transfer_intr_enqueue(xfer);
2003 static const struct usb_pipe_methods ohci_device_isoc_methods =
2005 .open = ohci_device_isoc_open,
2006 .close = ohci_device_isoc_close,
2007 .enter = ohci_device_isoc_enter,
2008 .start = ohci_device_isoc_start,
2011 /*------------------------------------------------------------------------*
2012 * ohci root control support
2013 *------------------------------------------------------------------------*
2014 * Simulate a hardware hub by handling all the necessary requests.
2015 *------------------------------------------------------------------------*/
2018 struct usb_device_descriptor ohci_devd =
2020 sizeof(struct usb_device_descriptor),
2021 UDESC_DEVICE, /* type */
2022 {0x00, 0x01}, /* USB version */
2023 UDCLASS_HUB, /* class */
2024 UDSUBCLASS_HUB, /* subclass */
2025 UDPROTO_FSHUB, /* protocol */
2026 64, /* max packet */
2027 {0}, {0}, {0x00, 0x01}, /* device id */
2028 1, 2, 0, /* string indexes */
2029 1 /* # of configurations */
2033 struct ohci_config_desc ohci_confd =
2036 .bLength = sizeof(struct usb_config_descriptor),
2037 .bDescriptorType = UDESC_CONFIG,
2038 .wTotalLength[0] = sizeof(ohci_confd),
2040 .bConfigurationValue = 1,
2041 .iConfiguration = 0,
2042 .bmAttributes = UC_SELF_POWERED,
2043 .bMaxPower = 0, /* max power */
2046 .bLength = sizeof(struct usb_interface_descriptor),
2047 .bDescriptorType = UDESC_INTERFACE,
2049 .bInterfaceClass = UICLASS_HUB,
2050 .bInterfaceSubClass = UISUBCLASS_HUB,
2051 .bInterfaceProtocol = 0,
2054 .bLength = sizeof(struct usb_endpoint_descriptor),
2055 .bDescriptorType = UDESC_ENDPOINT,
2056 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2057 .bmAttributes = UE_INTERRUPT,
2058 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2064 struct usb_hub_descriptor ohci_hubd =
2066 .bDescLength = 0, /* dynamic length */
2067 .bDescriptorType = UDESC_HUB,
2071 ohci_roothub_exec(struct usb_device *udev,
2072 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2074 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2076 const char *str_ptr;
2085 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2088 ptr = (const void *)&sc->sc_hub_desc.temp;
2092 value = UGETW(req->wValue);
2093 index = UGETW(req->wIndex);
2095 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2096 "wValue=0x%04x wIndex=0x%04x\n",
2097 req->bmRequestType, req->bRequest,
2098 UGETW(req->wLength), value, index);
2100 #define C(x,y) ((x) | ((y) << 8))
2101 switch (C(req->bRequest, req->bmRequestType)) {
2102 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2103 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2104 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2106 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2107 * for the integrated root hub.
2110 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2112 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2114 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2115 switch (value >> 8) {
2117 if ((value & 0xff) != 0) {
2118 err = USB_ERR_IOERROR;
2121 len = sizeof(ohci_devd);
2122 ptr = (const void *)&ohci_devd;
2126 if ((value & 0xff) != 0) {
2127 err = USB_ERR_IOERROR;
2130 len = sizeof(ohci_confd);
2131 ptr = (const void *)&ohci_confd;
2135 switch (value & 0xff) {
2136 case 0: /* Language table */
2140 case 1: /* Vendor */
2141 str_ptr = sc->sc_vendor;
2144 case 2: /* Product */
2145 str_ptr = "OHCI root HUB";
2153 len = usb_make_str_desc(
2154 sc->sc_hub_desc.temp,
2155 sizeof(sc->sc_hub_desc.temp),
2160 err = USB_ERR_IOERROR;
2164 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2166 sc->sc_hub_desc.temp[0] = 0;
2168 case C(UR_GET_STATUS, UT_READ_DEVICE):
2170 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2172 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2173 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2175 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2177 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2178 if (value >= OHCI_MAX_DEVICES) {
2179 err = USB_ERR_IOERROR;
2182 sc->sc_addr = value;
2184 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2185 if ((value != 0) && (value != 1)) {
2186 err = USB_ERR_IOERROR;
2189 sc->sc_conf = value;
2191 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2193 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2194 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2195 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2196 err = USB_ERR_IOERROR;
2198 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2200 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2203 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2205 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2206 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2207 "port=%d feature=%d\n",
2210 (index > sc->sc_noport)) {
2211 err = USB_ERR_IOERROR;
2214 port = OHCI_RH_PORT_STATUS(index);
2216 case UHF_PORT_ENABLE:
2217 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2219 case UHF_PORT_SUSPEND:
2220 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2222 case UHF_PORT_POWER:
2223 /* Yes, writing to the LOW_SPEED bit clears power. */
2224 OWRITE4(sc, port, UPS_LOW_SPEED);
2226 case UHF_C_PORT_CONNECTION:
2227 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2229 case UHF_C_PORT_ENABLE:
2230 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2232 case UHF_C_PORT_SUSPEND:
2233 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2235 case UHF_C_PORT_OVER_CURRENT:
2236 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2238 case UHF_C_PORT_RESET:
2239 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2242 err = USB_ERR_IOERROR;
2246 case UHF_C_PORT_CONNECTION:
2247 case UHF_C_PORT_ENABLE:
2248 case UHF_C_PORT_SUSPEND:
2249 case UHF_C_PORT_OVER_CURRENT:
2250 case UHF_C_PORT_RESET:
2251 /* enable RHSC interrupt if condition is cleared. */
2252 if ((OREAD4(sc, port) >> 16) == 0)
2253 ohci_rhsc_enable(sc);
2259 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2260 if ((value & 0xff) != 0) {
2261 err = USB_ERR_IOERROR;
2264 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2266 sc->sc_hub_desc.hubd = ohci_hubd;
2267 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2268 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2269 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2270 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2271 /* XXX overcurrent */
2273 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2274 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2276 for (l = 0; l < sc->sc_noport; l++) {
2278 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2282 sc->sc_hub_desc.hubd.bDescLength =
2283 8 + ((sc->sc_noport + 7) / 8);
2284 len = sc->sc_hub_desc.hubd.bDescLength;
2287 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2289 memset(sc->sc_hub_desc.temp, 0, 16);
2291 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2292 DPRINTFN(9, "get port status i=%d\n",
2295 (index > sc->sc_noport)) {
2296 err = USB_ERR_IOERROR;
2299 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2300 DPRINTFN(9, "port status=0x%04x\n", v);
2301 v &= ~UPS_PORT_MODE_DEVICE; /* force host mode */
2302 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2303 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2304 len = sizeof(sc->sc_hub_desc.ps);
2306 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2307 err = USB_ERR_IOERROR;
2309 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2311 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2313 (index > sc->sc_noport)) {
2314 err = USB_ERR_IOERROR;
2317 port = OHCI_RH_PORT_STATUS(index);
2319 case UHF_PORT_ENABLE:
2320 OWRITE4(sc, port, UPS_PORT_ENABLED);
2322 case UHF_PORT_SUSPEND:
2323 OWRITE4(sc, port, UPS_SUSPEND);
2325 case UHF_PORT_RESET:
2326 DPRINTFN(6, "reset port %d\n", index);
2327 OWRITE4(sc, port, UPS_RESET);
2330 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2331 USB_MS_TO_TICKS(usb_port_root_reset_delay));
2333 if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2337 err = USB_ERR_TIMEOUT;
2341 DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2342 index, OREAD4(sc, port));
2344 case UHF_PORT_POWER:
2345 DPRINTFN(3, "set port power %d\n", index);
2346 OWRITE4(sc, port, UPS_PORT_POWER);
2349 err = USB_ERR_IOERROR;
2354 err = USB_ERR_IOERROR;
2364 ohci_xfer_setup(struct usb_setup_params *parm)
2366 struct usb_page_search page_info;
2367 struct usb_page_cache *pc;
2368 struct usb_xfer *xfer;
2375 xfer = parm->curr_xfer;
2377 parm->hc_max_packet_size = 0x500;
2378 parm->hc_max_packet_count = 1;
2379 parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2382 * calculate ntd and nqh
2384 if (parm->methods == &ohci_device_ctrl_methods) {
2385 xfer->flags_int.bdma_enable = 1;
2387 usbd_transfer_setup_sub(parm);
2390 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2391 + (xfer->max_data_length / xfer->max_hc_frame_size));
2394 } else if (parm->methods == &ohci_device_bulk_methods) {
2395 xfer->flags_int.bdma_enable = 1;
2397 usbd_transfer_setup_sub(parm);
2400 ntd = ((2 * xfer->nframes)
2401 + (xfer->max_data_length / xfer->max_hc_frame_size));
2404 } else if (parm->methods == &ohci_device_intr_methods) {
2405 xfer->flags_int.bdma_enable = 1;
2407 usbd_transfer_setup_sub(parm);
2410 ntd = ((2 * xfer->nframes)
2411 + (xfer->max_data_length / xfer->max_hc_frame_size));
2414 } else if (parm->methods == &ohci_device_isoc_methods) {
2415 xfer->flags_int.bdma_enable = 1;
2417 usbd_transfer_setup_sub(parm);
2419 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2420 howmany(xfer->nframes, OHCI_ITD_NOFFSET) +
2426 usbd_transfer_setup_sub(parm);
2440 if (usbd_transfer_setup_sub_malloc(
2441 parm, &pc, sizeof(ohci_td_t),
2442 OHCI_TD_ALIGN, ntd)) {
2443 parm->err = USB_ERR_NOMEM;
2447 for (n = 0; n != ntd; n++) {
2450 usbd_get_page(pc + n, 0, &page_info);
2452 td = page_info.buffer;
2455 td->td_self = htole32(page_info.physaddr);
2456 td->obj_next = last_obj;
2457 td->page_cache = pc + n;
2461 usb_pc_cpu_flush(pc + n);
2464 if (usbd_transfer_setup_sub_malloc(
2465 parm, &pc, sizeof(ohci_itd_t),
2466 OHCI_ITD_ALIGN, nitd)) {
2467 parm->err = USB_ERR_NOMEM;
2471 for (n = 0; n != nitd; n++) {
2474 usbd_get_page(pc + n, 0, &page_info);
2476 itd = page_info.buffer;
2479 itd->itd_self = htole32(page_info.physaddr);
2480 itd->obj_next = last_obj;
2481 itd->page_cache = pc + n;
2485 usb_pc_cpu_flush(pc + n);
2488 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2492 if (usbd_transfer_setup_sub_malloc(
2493 parm, &pc, sizeof(ohci_ed_t),
2494 OHCI_ED_ALIGN, nqh)) {
2495 parm->err = USB_ERR_NOMEM;
2499 for (n = 0; n != nqh; n++) {
2502 usbd_get_page(pc + n, 0, &page_info);
2504 ed = page_info.buffer;
2507 ed->ed_self = htole32(page_info.physaddr);
2508 ed->obj_next = last_obj;
2509 ed->page_cache = pc + n;
2513 usb_pc_cpu_flush(pc + n);
2516 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2518 if (!xfer->flags_int.curr_dma_set) {
2519 xfer->flags_int.curr_dma_set = 1;
2525 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2526 struct usb_endpoint *ep)
2528 ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2530 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2532 edesc->bEndpointAddress, udev->flags.usb_mode,
2535 if (udev->device_index != sc->sc_addr) {
2536 switch (edesc->bmAttributes & UE_XFERTYPE) {
2538 ep->methods = &ohci_device_ctrl_methods;
2541 ep->methods = &ohci_device_intr_methods;
2543 case UE_ISOCHRONOUS:
2544 if (udev->speed == USB_SPEED_FULL) {
2545 ep->methods = &ohci_device_isoc_methods;
2549 ep->methods = &ohci_device_bulk_methods;
2559 ohci_xfer_unsetup(struct usb_xfer *xfer)
2565 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2568 * Wait until hardware has finished any possible use of the
2569 * transfer descriptor(s) and QH
2571 *pus = (1125); /* microseconds */
2575 ohci_device_resume(struct usb_device *udev)
2577 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2578 struct usb_xfer *xfer;
2579 const struct usb_pipe_methods *methods;
2584 USB_BUS_LOCK(udev->bus);
2586 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2587 if (xfer->xroot->udev == udev) {
2588 methods = xfer->endpoint->methods;
2589 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2591 if (methods == &ohci_device_bulk_methods) {
2592 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2593 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2595 if (methods == &ohci_device_ctrl_methods) {
2596 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2597 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2599 if (methods == &ohci_device_intr_methods) {
2600 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2605 USB_BUS_UNLOCK(udev->bus);
2611 ohci_device_suspend(struct usb_device *udev)
2613 struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2614 struct usb_xfer *xfer;
2615 const struct usb_pipe_methods *methods;
2620 USB_BUS_LOCK(udev->bus);
2622 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2623 if (xfer->xroot->udev == udev) {
2624 methods = xfer->endpoint->methods;
2625 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2627 if (methods == &ohci_device_bulk_methods) {
2628 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2630 if (methods == &ohci_device_ctrl_methods) {
2631 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2633 if (methods == &ohci_device_intr_methods) {
2634 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2639 USB_BUS_UNLOCK(udev->bus);
2645 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2647 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2650 case USB_HW_POWER_SUSPEND:
2651 case USB_HW_POWER_SHUTDOWN:
2654 case USB_HW_POWER_RESUME:
2663 ohci_set_hw_power(struct usb_bus *bus)
2665 struct ohci_softc *sc = OHCI_BUS2SC(bus);
2673 flags = bus->hw_power_state;
2675 temp = OREAD4(sc, OHCI_CONTROL);
2676 temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2678 if (flags & USB_HW_POWER_CONTROL)
2681 if (flags & USB_HW_POWER_BULK)
2684 if (flags & USB_HW_POWER_INTERRUPT)
2687 if (flags & USB_HW_POWER_ISOC)
2688 temp |= OHCI_IE | OHCI_PLE;
2690 OWRITE4(sc, OHCI_CONTROL, temp);
2692 USB_BUS_UNLOCK(bus);
2697 static const struct usb_bus_methods ohci_bus_methods =
2699 .endpoint_init = ohci_ep_init,
2700 .xfer_setup = ohci_xfer_setup,
2701 .xfer_unsetup = ohci_xfer_unsetup,
2702 .get_dma_delay = ohci_get_dma_delay,
2703 .device_resume = ohci_device_resume,
2704 .device_suspend = ohci_device_suspend,
2705 .set_hw_power = ohci_set_hw_power,
2706 .set_hw_power_sleep = ohci_set_hw_power_sleep,
2707 .roothub_exec = ohci_roothub_exec,
2708 .xfer_poll = ohci_do_poll,