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1 /* $FreeBSD$ */
2 /*-
3  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
4  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
5  * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28
29 /*
30  * USB Open Host Controller driver.
31  *
32  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
33  * USB spec:  http://www.usb.org/developers/docs/usbspec.zip
34  */
35
36 #ifdef USB_GLOBAL_INCLUDE_FILE
37 #include USB_GLOBAL_INCLUDE_FILE
38 #else
39 #include <sys/stdint.h>
40 #include <sys/stddef.h>
41 #include <sys/param.h>
42 #include <sys/queue.h>
43 #include <sys/types.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/bus.h>
47 #include <sys/module.h>
48 #include <sys/lock.h>
49 #include <sys/mutex.h>
50 #include <sys/condvar.h>
51 #include <sys/sysctl.h>
52 #include <sys/sx.h>
53 #include <sys/unistd.h>
54 #include <sys/callout.h>
55 #include <sys/malloc.h>
56 #include <sys/priv.h>
57
58 #include <dev/usb/usb.h>
59 #include <dev/usb/usbdi.h>
60
61 #define USB_DEBUG_VAR ohcidebug
62
63 #include <dev/usb/usb_core.h>
64 #include <dev/usb/usb_debug.h>
65 #include <dev/usb/usb_busdma.h>
66 #include <dev/usb/usb_process.h>
67 #include <dev/usb/usb_transfer.h>
68 #include <dev/usb/usb_device.h>
69 #include <dev/usb/usb_hub.h>
70 #include <dev/usb/usb_util.h>
71
72 #include <dev/usb/usb_controller.h>
73 #include <dev/usb/usb_bus.h>
74 #endif                  /* USB_GLOBAL_INCLUDE_FILE */
75
76 #include <dev/usb/controller/ohci.h>
77 #include <dev/usb/controller/ohcireg.h>
78
79 #define OHCI_BUS2SC(bus) \
80    ((ohci_softc_t *)(((uint8_t *)(bus)) - \
81     ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
82
83 #ifdef USB_DEBUG
84 static int ohcidebug = 0;
85
86 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
87 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RWTUN,
88     &ohcidebug, 0, "ohci debug level");
89
90 static void ohci_dumpregs(ohci_softc_t *);
91 static void ohci_dump_tds(ohci_td_t *);
92 static uint8_t ohci_dump_td(ohci_td_t *);
93 static void ohci_dump_ed(ohci_ed_t *);
94 static uint8_t ohci_dump_itd(ohci_itd_t *);
95 static void ohci_dump_itds(ohci_itd_t *);
96
97 #endif
98
99 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
100                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
101 #define OWRITE1(sc, r, x) \
102  do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
103 #define OWRITE2(sc, r, x) \
104  do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
105 #define OWRITE4(sc, r, x) \
106  do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
107 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
108 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
109 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
110
111 #define OHCI_INTR_ENDPT 1
112
113 static const struct usb_bus_methods ohci_bus_methods;
114 static const struct usb_pipe_methods ohci_device_bulk_methods;
115 static const struct usb_pipe_methods ohci_device_ctrl_methods;
116 static const struct usb_pipe_methods ohci_device_intr_methods;
117 static const struct usb_pipe_methods ohci_device_isoc_methods;
118
119 static void ohci_do_poll(struct usb_bus *bus);
120 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
121 static void ohci_timeout(void *arg);
122 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
123 static void ohci_root_intr(ohci_softc_t *sc);
124
125 struct ohci_std_temp {
126         struct usb_page_cache *pc;
127         ohci_td_t *td;
128         ohci_td_t *td_next;
129         uint32_t average;
130         uint32_t td_flags;
131         uint32_t len;
132         uint16_t max_frame_size;
133         uint8_t shortpkt;
134         uint8_t setup_alt_next;
135         uint8_t last_frame;
136 };
137
138 static struct ohci_hcca *
139 ohci_get_hcca(ohci_softc_t *sc)
140 {
141         usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
142         return (sc->sc_hcca_p);
143 }
144
145 void
146 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
147 {
148         struct ohci_softc *sc = OHCI_BUS2SC(bus);
149         uint32_t i;
150
151         cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
152             sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
153
154         cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
155             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
156
157         cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
158             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
159
160         cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
161             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
162
163         for (i = 0; i != OHCI_NO_EDS; i++) {
164                 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
165                     sizeof(ohci_ed_t), OHCI_ED_ALIGN);
166         }
167 }
168
169 static usb_error_t
170 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
171 {
172         struct usb_page_search buf_res;
173         uint32_t i;
174         uint32_t ctl;
175         uint32_t ival;
176         uint32_t hcr;
177         uint32_t fm;
178         uint32_t per;
179         uint32_t desca;
180
181         /* Determine in what context we are running. */
182         ctl = OREAD4(sc, OHCI_CONTROL);
183         if (ctl & OHCI_IR) {
184                 /* SMM active, request change */
185                 DPRINTF("SMM active, request owner change\n");
186                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
187                 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
188                         usb_pause_mtx(NULL, hz / 1000);
189                         ctl = OREAD4(sc, OHCI_CONTROL);
190                 }
191                 if (ctl & OHCI_IR) {
192                         device_printf(sc->sc_bus.bdev,
193                             "SMM does not respond, resetting\n");
194                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
195                         goto reset;
196                 }
197         } else {
198                 DPRINTF("cold started\n");
199 reset:
200                 /* controller was cold started */
201                 usb_pause_mtx(NULL,
202                     USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
203         }
204
205         /*
206          * This reset should not be necessary according to the OHCI spec, but
207          * without it some controllers do not start.
208          */
209         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
210         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
211
212         usb_pause_mtx(NULL,
213             USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
214
215         /* we now own the host controller and the bus has been reset */
216         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
217
218         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR);     /* Reset HC */
219         /* nominal time for a reset is 10 us */
220         for (i = 0; i < 10; i++) {
221                 DELAY(10);
222                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
223                 if (!hcr) {
224                         break;
225                 }
226         }
227         if (hcr) {
228                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
229                 return (USB_ERR_IOERROR);
230         }
231 #ifdef USB_DEBUG
232         if (ohcidebug > 15) {
233                 ohci_dumpregs(sc);
234         }
235 #endif
236
237         if (do_suspend) {
238                 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
239                 return (USB_ERR_NORMAL_COMPLETION);
240         }
241
242         /* The controller is now in SUSPEND state, we have 2ms to finish. */
243
244         /* set up HC registers */
245         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
246         OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
247
248         usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
249         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
250
251         usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
252         OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
253
254         /* disable all interrupts and then switch on all desired interrupts */
255         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
256         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
257         /* switch on desired functional features */
258         ctl = OREAD4(sc, OHCI_CONTROL);
259         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
260         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
261             OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
262         /* And finally start it! */
263         OWRITE4(sc, OHCI_CONTROL, ctl);
264
265         /*
266          * The controller is now OPERATIONAL.  Set a some final
267          * registers that should be set earlier, but that the
268          * controller ignores when in the SUSPEND state.
269          */
270         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
271         fm |= OHCI_FSMPS(ival) | ival;
272         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
273         per = OHCI_PERIODIC(ival);      /* 90% periodic */
274         OWRITE4(sc, OHCI_PERIODIC_START, per);
275
276         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
277         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
278         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
279         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
280         usb_pause_mtx(NULL,
281             USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
282         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
283
284         /*
285          * The AMD756 requires a delay before re-reading the register,
286          * otherwise it will occasionally report 0 ports.
287          */
288         sc->sc_noport = 0;
289         for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
290                 usb_pause_mtx(NULL,
291                     USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
292                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
293         }
294
295 #ifdef USB_DEBUG
296         if (ohcidebug > 5) {
297                 ohci_dumpregs(sc);
298         }
299 #endif
300         return (USB_ERR_NORMAL_COMPLETION);
301 }
302
303 static struct ohci_ed *
304 ohci_init_ed(struct usb_page_cache *pc)
305 {
306         struct usb_page_search buf_res;
307         struct ohci_ed *ed;
308
309         usbd_get_page(pc, 0, &buf_res);
310
311         ed = buf_res.buffer;
312
313         ed->ed_self = htole32(buf_res.physaddr);
314         ed->ed_flags = htole32(OHCI_ED_SKIP);
315         ed->page_cache = pc;
316
317         return (ed);
318 }
319
320 usb_error_t
321 ohci_init(ohci_softc_t *sc)
322 {
323         struct usb_page_search buf_res;
324         uint16_t i;
325         uint16_t bit;
326         uint16_t x;
327         uint16_t y;
328
329         DPRINTF("start\n");
330
331         sc->sc_eintrs = OHCI_NORMAL_INTRS;
332
333         /*
334          * Setup all ED's
335          */
336
337         sc->sc_ctrl_p_last =
338             ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
339
340         sc->sc_bulk_p_last =
341             ohci_init_ed(&sc->sc_hw.bulk_start_pc);
342
343         sc->sc_isoc_p_last =
344             ohci_init_ed(&sc->sc_hw.isoc_start_pc);
345
346         for (i = 0; i != OHCI_NO_EDS; i++) {
347                 sc->sc_intr_p_last[i] =
348                     ohci_init_ed(sc->sc_hw.intr_start_pc + i);
349         }
350
351         /*
352          * the QHs are arranged to give poll intervals that are
353          * powers of 2 times 1ms
354          */
355         bit = OHCI_NO_EDS / 2;
356         while (bit) {
357                 x = bit;
358                 while (x & bit) {
359                         ohci_ed_t *ed_x;
360                         ohci_ed_t *ed_y;
361
362                         y = (x ^ bit) | (bit / 2);
363
364                         /*
365                          * the next QH has half the poll interval
366                          */
367                         ed_x = sc->sc_intr_p_last[x];
368                         ed_y = sc->sc_intr_p_last[y];
369
370                         ed_x->next = NULL;
371                         ed_x->ed_next = ed_y->ed_self;
372
373                         x++;
374                 }
375                 bit >>= 1;
376         }
377
378         if (1) {
379
380                 ohci_ed_t *ed_int;
381                 ohci_ed_t *ed_isc;
382
383                 ed_int = sc->sc_intr_p_last[0];
384                 ed_isc = sc->sc_isoc_p_last;
385
386                 /* the last (1ms) QH */
387                 ed_int->next = ed_isc;
388                 ed_int->ed_next = ed_isc->ed_self;
389         }
390         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
391
392         sc->sc_hcca_p = buf_res.buffer;
393
394         /*
395          * Fill HCCA interrupt table.  The bit reversal is to get
396          * the tree set up properly to spread the interrupts.
397          */
398         for (i = 0; i != OHCI_NO_INTRS; i++) {
399                 sc->sc_hcca_p->hcca_interrupt_table[i] =
400                     sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
401         }
402         /* flush all cache into memory */
403
404         usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
405
406         /* set up the bus struct */
407         sc->sc_bus.methods = &ohci_bus_methods;
408
409         usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
410
411 #ifdef USB_DEBUG
412         if (ohcidebug > 15) {
413                 for (i = 0; i != OHCI_NO_EDS; i++) {
414                         printf("ed#%d ", i);
415                         ohci_dump_ed(sc->sc_intr_p_last[i]);
416                 }
417                 printf("iso ");
418                 ohci_dump_ed(sc->sc_isoc_p_last);
419         }
420 #endif
421
422         sc->sc_bus.usbrev = USB_REV_1_0;
423
424         if (ohci_controller_init(sc, 0) != 0)
425                 return (USB_ERR_INVAL);
426
427         /* catch any lost interrupts */
428         ohci_do_poll(&sc->sc_bus);
429         return (USB_ERR_NORMAL_COMPLETION);
430 }
431
432 /*
433  * shut down the controller when the system is going down
434  */
435 void
436 ohci_detach(struct ohci_softc *sc)
437 {
438         USB_BUS_LOCK(&sc->sc_bus);
439
440         usb_callout_stop(&sc->sc_tmo_rhsc);
441
442         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
443         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
444
445         USB_BUS_UNLOCK(&sc->sc_bus);
446
447         /* XXX let stray task complete */
448         usb_pause_mtx(NULL, hz / 20);
449
450         usb_callout_drain(&sc->sc_tmo_rhsc);
451 }
452
453 static void
454 ohci_suspend(ohci_softc_t *sc)
455 {
456         DPRINTF("\n");
457
458 #ifdef USB_DEBUG
459         if (ohcidebug > 2)
460                 ohci_dumpregs(sc);
461 #endif
462
463         /* reset HC and leave it suspended */
464         ohci_controller_init(sc, 1);
465 }
466
467 static void
468 ohci_resume(ohci_softc_t *sc)
469 {
470         DPRINTF("\n");
471
472 #ifdef USB_DEBUG
473         if (ohcidebug > 2)
474                 ohci_dumpregs(sc);
475 #endif
476
477         /* some broken BIOSes never initialize the Controller chip */
478         ohci_controller_init(sc, 0);
479
480         /* catch any lost interrupts */
481         ohci_do_poll(&sc->sc_bus);
482 }
483
484 #ifdef USB_DEBUG
485 static void
486 ohci_dumpregs(ohci_softc_t *sc)
487 {
488         struct ohci_hcca *hcca;
489
490         DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
491             OREAD4(sc, OHCI_REVISION),
492             OREAD4(sc, OHCI_CONTROL),
493             OREAD4(sc, OHCI_COMMAND_STATUS));
494         DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
495             OREAD4(sc, OHCI_INTERRUPT_STATUS),
496             OREAD4(sc, OHCI_INTERRUPT_ENABLE),
497             OREAD4(sc, OHCI_INTERRUPT_DISABLE));
498         DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
499             OREAD4(sc, OHCI_HCCA),
500             OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
501             OREAD4(sc, OHCI_CONTROL_HEAD_ED));
502         DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
503             OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
504             OREAD4(sc, OHCI_BULK_HEAD_ED),
505             OREAD4(sc, OHCI_BULK_CURRENT_ED));
506         DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
507             OREAD4(sc, OHCI_DONE_HEAD),
508             OREAD4(sc, OHCI_FM_INTERVAL),
509             OREAD4(sc, OHCI_FM_REMAINING));
510         DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
511             OREAD4(sc, OHCI_FM_NUMBER),
512             OREAD4(sc, OHCI_PERIODIC_START),
513             OREAD4(sc, OHCI_LS_THRESHOLD));
514         DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
515             OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
516             OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
517             OREAD4(sc, OHCI_RH_STATUS));
518         DPRINTF("               port1=0x%08x port2=0x%08x\n",
519             OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
520             OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
521
522         hcca = ohci_get_hcca(sc);
523
524         DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
525             le32toh(hcca->hcca_frame_number),
526             le32toh(hcca->hcca_done_head));
527 }
528 static void
529 ohci_dump_tds(ohci_td_t *std)
530 {
531         for (; std; std = std->obj_next) {
532                 if (ohci_dump_td(std)) {
533                         break;
534                 }
535         }
536 }
537
538 static uint8_t
539 ohci_dump_td(ohci_td_t *std)
540 {
541         uint32_t td_flags;
542         uint8_t temp;
543
544         usb_pc_cpu_invalidate(std->page_cache);
545
546         td_flags = le32toh(std->td_flags);
547         temp = (std->td_next == 0);
548
549         printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
550             "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
551             std, le32toh(std->td_self),
552             (td_flags & OHCI_TD_R) ? "-R" : "",
553             (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
554             (td_flags & OHCI_TD_IN) ? "-IN" : "",
555             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
556             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
557             OHCI_TD_GET_DI(td_flags),
558             OHCI_TD_GET_EC(td_flags),
559             OHCI_TD_GET_CC(td_flags),
560             le32toh(std->td_cbp),
561             le32toh(std->td_next),
562             le32toh(std->td_be));
563
564         return (temp);
565 }
566
567 static uint8_t
568 ohci_dump_itd(ohci_itd_t *sitd)
569 {
570         uint32_t itd_flags;
571         uint16_t i;
572         uint8_t temp;
573
574         usb_pc_cpu_invalidate(sitd->page_cache);
575
576         itd_flags = le32toh(sitd->itd_flags);
577         temp = (sitd->itd_next == 0);
578
579         printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
580             "bp0=0x%08x next=0x%08x be=0x%08x\n",
581             sitd, le32toh(sitd->itd_self),
582             OHCI_ITD_GET_SF(itd_flags),
583             OHCI_ITD_GET_DI(itd_flags),
584             OHCI_ITD_GET_FC(itd_flags),
585             OHCI_ITD_GET_CC(itd_flags),
586             le32toh(sitd->itd_bp0),
587             le32toh(sitd->itd_next),
588             le32toh(sitd->itd_be));
589         for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
590                 printf("offs[%d]=0x%04x ", i,
591                     (uint32_t)le16toh(sitd->itd_offset[i]));
592         }
593         printf("\n");
594
595         return (temp);
596 }
597
598 static void
599 ohci_dump_itds(ohci_itd_t *sitd)
600 {
601         for (; sitd; sitd = sitd->obj_next) {
602                 if (ohci_dump_itd(sitd)) {
603                         break;
604                 }
605         }
606 }
607
608 static void
609 ohci_dump_ed(ohci_ed_t *sed)
610 {
611         uint32_t ed_flags;
612         uint32_t ed_headp;
613
614         usb_pc_cpu_invalidate(sed->page_cache);
615
616         ed_flags = le32toh(sed->ed_flags);
617         ed_headp = le32toh(sed->ed_headp);
618
619         printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
620             "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
621             sed, le32toh(sed->ed_self),
622             OHCI_ED_GET_FA(ed_flags),
623             OHCI_ED_GET_EN(ed_flags),
624             OHCI_ED_GET_MAXP(ed_flags),
625             (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
626             (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
627             (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
628             (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
629             (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
630             le32toh(sed->ed_tailp),
631             (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
632             (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
633             le32toh(sed->ed_headp),
634             le32toh(sed->ed_next));
635 }
636
637 #endif
638
639 static void
640 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
641 {
642         /* check for early completion */
643         if (ohci_check_transfer(xfer)) {
644                 return;
645         }
646         /* put transfer on interrupt queue */
647         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
648
649         /* start timeout, if any */
650         if (xfer->timeout != 0) {
651                 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
652         }
653 }
654
655 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
656 static ohci_ed_t *
657 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
658 {
659         DPRINTFN(11, "%p to %p\n", sed, last);
660
661         if (sed->prev != NULL) {
662                 /* should not happen */
663                 DPRINTFN(0, "ED already linked!\n");
664                 return (last);
665         }
666         /* (sc->sc_bus.bus_mtx) must be locked */
667
668         sed->next = last->next;
669         sed->ed_next = last->ed_next;
670         sed->ed_tailp = 0;
671
672         sed->prev = last;
673
674         usb_pc_cpu_flush(sed->page_cache);
675
676         /*
677          * the last->next->prev is never followed: sed->next->prev = sed;
678          */
679
680         last->next = sed;
681         last->ed_next = sed->ed_self;
682
683         usb_pc_cpu_flush(last->page_cache);
684
685         return (sed);
686 }
687
688 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
689 static ohci_ed_t *
690 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
691 {
692         DPRINTFN(11, "%p from %p\n", sed, last);
693
694         /* (sc->sc_bus.bus_mtx) must be locked */
695
696         /* only remove if not removed from a queue */
697         if (sed->prev) {
698
699                 sed->prev->next = sed->next;
700                 sed->prev->ed_next = sed->ed_next;
701
702                 usb_pc_cpu_flush(sed->prev->page_cache);
703
704                 if (sed->next) {
705                         sed->next->prev = sed->prev;
706                         usb_pc_cpu_flush(sed->next->page_cache);
707                 }
708                 last = ((last == sed) ? sed->prev : last);
709
710                 sed->prev = 0;
711
712                 usb_pc_cpu_flush(sed->page_cache);
713         }
714         return (last);
715 }
716
717 static void
718 ohci_isoc_done(struct usb_xfer *xfer)
719 {
720         uint8_t nframes;
721         uint32_t *plen = xfer->frlengths;
722         volatile uint16_t *olen;
723         uint16_t len = 0;
724         ohci_itd_t *td = xfer->td_transfer_first;
725
726         while (1) {
727                 if (td == NULL) {
728                         panic("%s:%d: out of TD's\n",
729                             __FUNCTION__, __LINE__);
730                 }
731 #ifdef USB_DEBUG
732                 if (ohcidebug > 5) {
733                         DPRINTF("isoc TD\n");
734                         ohci_dump_itd(td);
735                 }
736 #endif
737                 usb_pc_cpu_invalidate(td->page_cache);
738
739                 nframes = td->frames;
740                 olen = &td->itd_offset[0];
741
742                 if (nframes > 8) {
743                         nframes = 8;
744                 }
745                 while (nframes--) {
746                         len = le16toh(*olen);
747
748                         if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
749                                 len = 0;
750                         } else {
751                                 len &= ((1 << 12) - 1);
752                         }
753
754                         if (len > *plen) {
755                                 len = 0;/* invalid length */
756                         }
757                         *plen = len;
758                         plen++;
759                         olen++;
760                 }
761
762                 if (((void *)td) == xfer->td_transfer_last) {
763                         break;
764                 }
765                 td = td->obj_next;
766         }
767
768         xfer->aframes = xfer->nframes;
769         ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
770 }
771
772 #ifdef USB_DEBUG
773 static const char *const
774         ohci_cc_strs[] =
775 {
776         "NO_ERROR",
777         "CRC",
778         "BIT_STUFFING",
779         "DATA_TOGGLE_MISMATCH",
780
781         "STALL",
782         "DEVICE_NOT_RESPONDING",
783         "PID_CHECK_FAILURE",
784         "UNEXPECTED_PID",
785
786         "DATA_OVERRUN",
787         "DATA_UNDERRUN",
788         "BUFFER_OVERRUN",
789         "BUFFER_UNDERRUN",
790
791         "reserved",
792         "reserved",
793         "NOT_ACCESSED",
794         "NOT_ACCESSED"
795 };
796
797 #endif
798
799 static usb_error_t
800 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
801 {
802         ohci_td_t *td;
803         ohci_td_t *td_alt_next;
804         uint32_t temp;
805         uint32_t phy_start;
806         uint32_t phy_end;
807         uint32_t td_flags;
808         uint16_t cc;
809
810         td = xfer->td_transfer_cache;
811         td_alt_next = td->alt_next;
812         td_flags = 0;
813
814         if (xfer->aframes != xfer->nframes) {
815                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
816         }
817         while (1) {
818
819                 usb_pc_cpu_invalidate(td->page_cache);
820                 phy_start = le32toh(td->td_cbp);
821                 td_flags = le32toh(td->td_flags);
822                 cc = OHCI_TD_GET_CC(td_flags);
823
824                 if (phy_start) {
825                         /*
826                          * short transfer - compute the number of remaining
827                          * bytes in the hardware buffer:
828                          */
829                         phy_end = le32toh(td->td_be);
830                         temp = (OHCI_PAGE(phy_start ^ phy_end) ?
831                             (OHCI_PAGE_SIZE + 1) : 0x0001);
832                         temp += OHCI_PAGE_OFFSET(phy_end);
833                         temp -= OHCI_PAGE_OFFSET(phy_start);
834
835                         if (temp > td->len) {
836                                 /* guard against corruption */
837                                 cc = OHCI_CC_STALL;
838                         } else if (xfer->aframes != xfer->nframes) {
839                                 /*
840                                  * Sum up total transfer length
841                                  * in "frlengths[]":
842                                  */
843                                 xfer->frlengths[xfer->aframes] += td->len - temp;
844                         }
845                 } else {
846                         if (xfer->aframes != xfer->nframes) {
847                                 /* transfer was complete */
848                                 xfer->frlengths[xfer->aframes] += td->len;
849                         }
850                 }
851                 /* Check for last transfer */
852                 if (((void *)td) == xfer->td_transfer_last) {
853                         td = NULL;
854                         break;
855                 }
856                 /* Check transfer status */
857                 if (cc) {
858                         /* the transfer is finished */
859                         td = NULL;
860                         break;
861                 }
862                 /* Check for short transfer */
863                 if (phy_start) {
864                         if (xfer->flags_int.short_frames_ok) {
865                                 /* follow alt next */
866                                 td = td->alt_next;
867                         } else {
868                                 /* the transfer is finished */
869                                 td = NULL;
870                         }
871                         break;
872                 }
873                 td = td->obj_next;
874
875                 if (td->alt_next != td_alt_next) {
876                         /* this USB frame is complete */
877                         break;
878                 }
879         }
880
881         /* update transfer cache */
882
883         xfer->td_transfer_cache = td;
884
885         DPRINTFN(16, "error cc=%d (%s)\n",
886             cc, ohci_cc_strs[cc]);
887
888         return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
889             (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
890 }
891
892 static void
893 ohci_non_isoc_done(struct usb_xfer *xfer)
894 {
895         usb_error_t err = 0;
896
897         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
898             xfer, xfer->endpoint);
899
900 #ifdef USB_DEBUG
901         if (ohcidebug > 10) {
902                 ohci_dump_tds(xfer->td_transfer_first);
903         }
904 #endif
905
906         /* reset scanner */
907
908         xfer->td_transfer_cache = xfer->td_transfer_first;
909
910         if (xfer->flags_int.control_xfr) {
911
912                 if (xfer->flags_int.control_hdr) {
913
914                         err = ohci_non_isoc_done_sub(xfer);
915                 }
916                 xfer->aframes = 1;
917
918                 if (xfer->td_transfer_cache == NULL) {
919                         goto done;
920                 }
921         }
922         while (xfer->aframes != xfer->nframes) {
923
924                 err = ohci_non_isoc_done_sub(xfer);
925                 xfer->aframes++;
926
927                 if (xfer->td_transfer_cache == NULL) {
928                         goto done;
929                 }
930         }
931
932         if (xfer->flags_int.control_xfr &&
933             !xfer->flags_int.control_act) {
934
935                 err = ohci_non_isoc_done_sub(xfer);
936         }
937 done:
938         ohci_device_done(xfer, err);
939 }
940
941 /*------------------------------------------------------------------------*
942  *      ohci_check_transfer_sub
943  *------------------------------------------------------------------------*/
944 static void
945 ohci_check_transfer_sub(struct usb_xfer *xfer)
946 {
947         ohci_td_t *td;
948         ohci_ed_t *ed;
949         uint32_t phy_start;
950         uint32_t td_flags;
951         uint32_t td_next;
952         uint16_t cc;
953
954         td = xfer->td_transfer_cache;
955
956         while (1) {
957
958                 usb_pc_cpu_invalidate(td->page_cache);
959                 phy_start = le32toh(td->td_cbp);
960                 td_flags = le32toh(td->td_flags);
961                 td_next = le32toh(td->td_next);
962
963                 /* Check for last transfer */
964                 if (((void *)td) == xfer->td_transfer_last) {
965                         /* the transfer is finished */
966                         td = NULL;
967                         break;
968                 }
969                 /* Check transfer status */
970                 cc = OHCI_TD_GET_CC(td_flags);
971                 if (cc) {
972                         /* the transfer is finished */
973                         td = NULL;
974                         break;
975                 }
976                 /*
977                  * Check if we reached the last packet
978                  * or if there is a short packet:
979                  */
980
981                 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
982                         /* follow alt next */
983                         td = td->alt_next;
984                         break;
985                 }
986                 td = td->obj_next;
987         }
988
989         /* update transfer cache */
990
991         xfer->td_transfer_cache = td;
992
993         if (td) {
994
995                 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
996
997                 ed->ed_headp = td->td_self;
998                 usb_pc_cpu_flush(ed->page_cache);
999
1000                 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1001
1002                 /*
1003                  * Make sure that the OHCI re-scans the schedule by
1004                  * writing the BLF and CLF bits:
1005                  */
1006
1007                 if (xfer->xroot->udev->flags.self_suspended) {
1008                         /* nothing to do */
1009                 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1010                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1011
1012                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1013                 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1014                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1015
1016                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1017                 }
1018         }
1019 }
1020
1021 /*------------------------------------------------------------------------*
1022  *      ohci_check_transfer
1023  *
1024  * Return values:
1025  *    0: USB transfer is not finished
1026  * Else: USB transfer is finished
1027  *------------------------------------------------------------------------*/
1028 static uint8_t
1029 ohci_check_transfer(struct usb_xfer *xfer)
1030 {
1031         ohci_ed_t *ed;
1032         uint32_t ed_headp;
1033         uint32_t ed_tailp;
1034
1035         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1036
1037         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1038
1039         usb_pc_cpu_invalidate(ed->page_cache);
1040         ed_headp = le32toh(ed->ed_headp);
1041         ed_tailp = le32toh(ed->ed_tailp);
1042
1043         if ((ed_headp & OHCI_HALTED) ||
1044             (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1045                 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1046                         /* isochronous transfer */
1047                         ohci_isoc_done(xfer);
1048                 } else {
1049                         if (xfer->flags_int.short_frames_ok) {
1050                                 ohci_check_transfer_sub(xfer);
1051                                 if (xfer->td_transfer_cache) {
1052                                         /* not finished yet */
1053                                         return (0);
1054                                 }
1055                         }
1056                         /* store data-toggle */
1057                         if (ed_headp & OHCI_TOGGLECARRY) {
1058                                 xfer->endpoint->toggle_next = 1;
1059                         } else {
1060                                 xfer->endpoint->toggle_next = 0;
1061                         }
1062
1063                         /* non-isochronous transfer */
1064                         ohci_non_isoc_done(xfer);
1065                 }
1066                 return (1);
1067         }
1068         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1069         return (0);
1070 }
1071
1072 static void
1073 ohci_rhsc_enable(ohci_softc_t *sc)
1074 {
1075         DPRINTFN(5, "\n");
1076
1077         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1078
1079         sc->sc_eintrs |= OHCI_RHSC;
1080         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1081
1082         /* acknowledge any RHSC interrupt */
1083         OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1084
1085         ohci_root_intr(sc);
1086 }
1087
1088 static void
1089 ohci_interrupt_poll(ohci_softc_t *sc)
1090 {
1091         struct usb_xfer *xfer;
1092
1093 repeat:
1094         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1095                 /*
1096                  * check if transfer is transferred
1097                  */
1098                 if (ohci_check_transfer(xfer)) {
1099                         /* queue has been modified */
1100                         goto repeat;
1101                 }
1102         }
1103 }
1104
1105 /*------------------------------------------------------------------------*
1106  *      ohci_interrupt - OHCI interrupt handler
1107  *
1108  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1109  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1110  * is present !
1111  *------------------------------------------------------------------------*/
1112 void
1113 ohci_interrupt(ohci_softc_t *sc)
1114 {
1115         struct ohci_hcca *hcca;
1116         uint32_t status;
1117         uint32_t done;
1118
1119         USB_BUS_LOCK(&sc->sc_bus);
1120
1121         hcca = ohci_get_hcca(sc);
1122
1123         DPRINTFN(16, "real interrupt\n");
1124
1125 #ifdef USB_DEBUG
1126         if (ohcidebug > 15) {
1127                 ohci_dumpregs(sc);
1128         }
1129 #endif
1130
1131         done = le32toh(hcca->hcca_done_head);
1132
1133         /*
1134          * The LSb of done is used to inform the HC Driver that an interrupt
1135          * condition exists for both the Done list and for another event
1136          * recorded in HcInterruptStatus. On an interrupt from the HC, the
1137          * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1138          * the interrupt was caused by other than the HccaDoneHead update
1139          * and the HcInterruptStatus register needs to be accessed to
1140          * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1141          * then a Done list update interrupt is indicated and if the LSb of
1142          * done is nonzero, then an additional interrupt event is indicated
1143          * and HcInterruptStatus should be checked to determine its cause.
1144          */
1145         if (done != 0) {
1146                 status = 0;
1147
1148                 if (done & ~OHCI_DONE_INTRS) {
1149                         status |= OHCI_WDH;
1150                 }
1151                 if (done & OHCI_DONE_INTRS) {
1152                         status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1153                 }
1154                 hcca->hcca_done_head = 0;
1155
1156                 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1157         } else {
1158                 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1159         }
1160
1161         status &= ~OHCI_MIE;
1162         if (status == 0) {
1163                 /*
1164                  * nothing to be done (PCI shared
1165                  * interrupt)
1166                  */
1167                 goto done;
1168         }
1169         OWRITE4(sc, OHCI_INTERRUPT_STATUS, status);     /* Acknowledge */
1170
1171         status &= sc->sc_eintrs;
1172         if (status == 0) {
1173                 goto done;
1174         }
1175         if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1176 #if 0
1177                 if (status & OHCI_SO) {
1178                         /* XXX do what */
1179                 }
1180 #endif
1181                 if (status & OHCI_RD) {
1182                         printf("%s: resume detect\n", __FUNCTION__);
1183                         /* XXX process resume detect */
1184                 }
1185                 if (status & OHCI_UE) {
1186                         printf("%s: unrecoverable error, "
1187                             "controller halted\n", __FUNCTION__);
1188                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1189                         /* XXX what else */
1190                 }
1191                 if (status & OHCI_RHSC) {
1192                         /*
1193                          * Disable RHSC interrupt for now, because it will be
1194                          * on until the port has been reset.
1195                          */
1196                         sc->sc_eintrs &= ~OHCI_RHSC;
1197                         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1198
1199                         ohci_root_intr(sc);
1200
1201                         /* do not allow RHSC interrupts > 1 per second */
1202                         usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1203                             (void *)&ohci_rhsc_enable, sc);
1204                 }
1205         }
1206         status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1207         if (status != 0) {
1208                 /* Block unprocessed interrupts. XXX */
1209                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1210                 sc->sc_eintrs &= ~status;
1211                 printf("%s: blocking intrs 0x%x\n",
1212                     __FUNCTION__, status);
1213         }
1214         /* poll all the USB transfers */
1215         ohci_interrupt_poll(sc);
1216
1217 done:
1218         USB_BUS_UNLOCK(&sc->sc_bus);
1219 }
1220
1221 /*
1222  * called when a request does not complete
1223  */
1224 static void
1225 ohci_timeout(void *arg)
1226 {
1227         struct usb_xfer *xfer = arg;
1228
1229         DPRINTF("xfer=%p\n", xfer);
1230
1231         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1232
1233         /* transfer is transferred */
1234         ohci_device_done(xfer, USB_ERR_TIMEOUT);
1235 }
1236
1237 static void
1238 ohci_do_poll(struct usb_bus *bus)
1239 {
1240         struct ohci_softc *sc = OHCI_BUS2SC(bus);
1241
1242         USB_BUS_LOCK(&sc->sc_bus);
1243         ohci_interrupt_poll(sc);
1244         USB_BUS_UNLOCK(&sc->sc_bus);
1245 }
1246
1247 static void
1248 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1249 {
1250         struct usb_page_search buf_res;
1251         ohci_td_t *td;
1252         ohci_td_t *td_next;
1253         ohci_td_t *td_alt_next;
1254         uint32_t buf_offset;
1255         uint32_t average;
1256         uint32_t len_old;
1257         uint8_t shortpkt_old;
1258         uint8_t precompute;
1259
1260         td_alt_next = NULL;
1261         buf_offset = 0;
1262         shortpkt_old = temp->shortpkt;
1263         len_old = temp->len;
1264         precompute = 1;
1265
1266         /* software is used to detect short incoming transfers */
1267
1268         if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1269                 temp->td_flags |= htole32(OHCI_TD_R);
1270         } else {
1271                 temp->td_flags &= ~htole32(OHCI_TD_R);
1272         }
1273
1274 restart:
1275
1276         td = temp->td;
1277         td_next = temp->td_next;
1278
1279         while (1) {
1280
1281                 if (temp->len == 0) {
1282
1283                         if (temp->shortpkt) {
1284                                 break;
1285                         }
1286                         /* send a Zero Length Packet, ZLP, last */
1287
1288                         temp->shortpkt = 1;
1289                         average = 0;
1290
1291                 } else {
1292
1293                         average = temp->average;
1294
1295                         if (temp->len < average) {
1296                                 if (temp->len % temp->max_frame_size) {
1297                                         temp->shortpkt = 1;
1298                                 }
1299                                 average = temp->len;
1300                         }
1301                 }
1302
1303                 if (td_next == NULL) {
1304                         panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1305                 }
1306                 /* get next TD */
1307
1308                 td = td_next;
1309                 td_next = td->obj_next;
1310
1311                 /* check if we are pre-computing */
1312
1313                 if (precompute) {
1314
1315                         /* update remaining length */
1316
1317                         temp->len -= average;
1318
1319                         continue;
1320                 }
1321                 /* fill out current TD */
1322                 td->td_flags = temp->td_flags;
1323
1324                 /* the next TD uses TOGGLE_CARRY */
1325                 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1326
1327                 if (average == 0) {
1328                         /*
1329                          * The buffer start and end phys addresses should be
1330                          * 0x0 for a zero length packet.
1331                          */
1332                         td->td_cbp = 0;
1333                         td->td_be = 0;
1334                         td->len = 0;
1335
1336                 } else {
1337
1338                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1339                         td->td_cbp = htole32(buf_res.physaddr);
1340                         buf_offset += (average - 1);
1341
1342                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1343                         td->td_be = htole32(buf_res.physaddr);
1344                         buf_offset++;
1345
1346                         td->len = average;
1347
1348                         /* update remaining length */
1349
1350                         temp->len -= average;
1351                 }
1352
1353                 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1354                         /* we need to receive these frames one by one ! */
1355                         td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1356                         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1357                         td->td_next = htole32(OHCI_TD_NEXT_END);
1358                 } else {
1359                         if (td_next) {
1360                                 /* link the current TD with the next one */
1361                                 td->td_next = td_next->td_self;
1362                         }
1363                 }
1364
1365                 td->alt_next = td_alt_next;
1366
1367                 usb_pc_cpu_flush(td->page_cache);
1368         }
1369
1370         if (precompute) {
1371                 precompute = 0;
1372
1373                 /* setup alt next pointer, if any */
1374                 if (temp->last_frame) {
1375                         /* no alternate next */
1376                         td_alt_next = NULL;
1377                 } else {
1378                         /* we use this field internally */
1379                         td_alt_next = td_next;
1380                 }
1381
1382                 /* restore */
1383                 temp->shortpkt = shortpkt_old;
1384                 temp->len = len_old;
1385                 goto restart;
1386         }
1387         temp->td = td;
1388         temp->td_next = td_next;
1389 }
1390
1391 static void
1392 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1393 {
1394         struct ohci_std_temp temp;
1395         const struct usb_pipe_methods *methods;
1396         ohci_ed_t *ed;
1397         ohci_td_t *td;
1398         uint32_t ed_flags;
1399         uint32_t x;
1400
1401         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1402             xfer->address, UE_GET_ADDR(xfer->endpointno),
1403             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1404
1405         temp.average = xfer->max_hc_frame_size;
1406         temp.max_frame_size = xfer->max_frame_size;
1407
1408         /* toggle the DMA set we are using */
1409         xfer->flags_int.curr_dma_set ^= 1;
1410
1411         /* get next DMA set */
1412         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1413
1414         xfer->td_transfer_first = td;
1415         xfer->td_transfer_cache = td;
1416
1417         temp.td = NULL;
1418         temp.td_next = td;
1419         temp.last_frame = 0;
1420         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1421
1422         methods = xfer->endpoint->methods;
1423
1424         /* check if we should prepend a setup message */
1425
1426         if (xfer->flags_int.control_xfr) {
1427                 if (xfer->flags_int.control_hdr) {
1428
1429                         temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1430                             OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1431
1432                         temp.len = xfer->frlengths[0];
1433                         temp.pc = xfer->frbuffers + 0;
1434                         temp.shortpkt = temp.len ? 1 : 0;
1435                         /* check for last frame */
1436                         if (xfer->nframes == 1) {
1437                                 /* no STATUS stage yet, SETUP is last */
1438                                 if (xfer->flags_int.control_act) {
1439                                         temp.last_frame = 1;
1440                                         temp.setup_alt_next = 0;
1441                                 }
1442                         }
1443                         ohci_setup_standard_chain_sub(&temp);
1444
1445                         /*
1446                          * XXX assume that the setup message is
1447                          * contained within one USB packet:
1448                          */
1449                         xfer->endpoint->toggle_next = 1;
1450                 }
1451                 x = 1;
1452         } else {
1453                 x = 0;
1454         }
1455         temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1456
1457         /* set data toggle */
1458
1459         if (xfer->endpoint->toggle_next) {
1460                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1461         } else {
1462                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1463         }
1464
1465         /* set endpoint direction */
1466
1467         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1468                 temp.td_flags |= htole32(OHCI_TD_IN);
1469         } else {
1470                 temp.td_flags |= htole32(OHCI_TD_OUT);
1471         }
1472
1473         while (x != xfer->nframes) {
1474
1475                 /* DATA0 / DATA1 message */
1476
1477                 temp.len = xfer->frlengths[x];
1478                 temp.pc = xfer->frbuffers + x;
1479
1480                 x++;
1481
1482                 if (x == xfer->nframes) {
1483                         if (xfer->flags_int.control_xfr) {
1484                                 /* no STATUS stage yet, DATA is last */
1485                                 if (xfer->flags_int.control_act) {
1486                                         temp.last_frame = 1;
1487                                         temp.setup_alt_next = 0;
1488                                 }
1489                         } else {
1490                                 temp.last_frame = 1;
1491                                 temp.setup_alt_next = 0;
1492                         }
1493                 }
1494                 if (temp.len == 0) {
1495
1496                         /* make sure that we send an USB packet */
1497
1498                         temp.shortpkt = 0;
1499
1500                 } else {
1501
1502                         /* regular data transfer */
1503
1504                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1505                 }
1506
1507                 ohci_setup_standard_chain_sub(&temp);
1508         }
1509
1510         /* check if we should append a status stage */
1511
1512         if (xfer->flags_int.control_xfr &&
1513             !xfer->flags_int.control_act) {
1514
1515                 /*
1516                  * Send a DATA1 message and invert the current endpoint
1517                  * direction.
1518                  */
1519
1520                 /* set endpoint direction and data toggle */
1521
1522                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1523                         temp.td_flags = htole32(OHCI_TD_OUT |
1524                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1525                 } else {
1526                         temp.td_flags = htole32(OHCI_TD_IN |
1527                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1528                 }
1529
1530                 temp.len = 0;
1531                 temp.pc = NULL;
1532                 temp.shortpkt = 0;
1533                 temp.last_frame = 1;
1534                 temp.setup_alt_next = 0;
1535
1536                 ohci_setup_standard_chain_sub(&temp);
1537         }
1538         td = temp.td;
1539
1540         /* Ensure that last TD is terminating: */
1541         td->td_next = htole32(OHCI_TD_NEXT_END);
1542         td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1543         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1544
1545         usb_pc_cpu_flush(td->page_cache);
1546
1547         /* must have at least one frame! */
1548
1549         xfer->td_transfer_last = td;
1550
1551 #ifdef USB_DEBUG
1552         if (ohcidebug > 8) {
1553                 DPRINTF("nexttog=%d; data before transfer:\n",
1554                     xfer->endpoint->toggle_next);
1555                 ohci_dump_tds(xfer->td_transfer_first);
1556         }
1557 #endif
1558
1559         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1560
1561         ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1562             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1563             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1564
1565         ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1566
1567         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1568                 ed_flags |= OHCI_ED_SPEED;
1569         }
1570         ed->ed_flags = htole32(ed_flags);
1571
1572         td = xfer->td_transfer_first;
1573
1574         ed->ed_headp = td->td_self;
1575
1576         if (xfer->xroot->udev->flags.self_suspended == 0) {
1577                 /* the append function will flush the endpoint descriptor */
1578                 OHCI_APPEND_QH(ed, *ed_last);
1579
1580                 if (methods == &ohci_device_bulk_methods) {
1581                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1582
1583                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1584                 }
1585                 if (methods == &ohci_device_ctrl_methods) {
1586                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1587
1588                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1589                 }
1590         } else {
1591                 usb_pc_cpu_flush(ed->page_cache);
1592         }
1593 }
1594
1595 static void
1596 ohci_root_intr(ohci_softc_t *sc)
1597 {
1598         uint32_t hstatus;
1599         uint16_t i;
1600         uint16_t m;
1601
1602         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1603
1604         /* clear any old interrupt data */
1605         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1606
1607         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1608         DPRINTF("sc=%p hstatus=0x%08x\n",
1609             sc, hstatus);
1610
1611         /* set bits */
1612         m = (sc->sc_noport + 1);
1613         if (m > (8 * sizeof(sc->sc_hub_idata))) {
1614                 m = (8 * sizeof(sc->sc_hub_idata));
1615         }
1616         for (i = 1; i < m; i++) {
1617                 /* pick out CHANGE bits from the status register */
1618                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1619                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1620                         DPRINTF("port %d changed\n", i);
1621                 }
1622         }
1623
1624         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1625             sizeof(sc->sc_hub_idata));
1626 }
1627
1628 /* NOTE: "done" can be run two times in a row,
1629  * from close and from interrupt
1630  */
1631 static void
1632 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1633 {
1634         const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1635         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1636         ohci_ed_t *ed;
1637
1638         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1639
1640
1641         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1642             xfer, xfer->endpoint, error);
1643
1644         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1645         if (ed) {
1646                 usb_pc_cpu_invalidate(ed->page_cache);
1647         }
1648         if (methods == &ohci_device_bulk_methods) {
1649                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1650         }
1651         if (methods == &ohci_device_ctrl_methods) {
1652                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1653         }
1654         if (methods == &ohci_device_intr_methods) {
1655                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1656         }
1657         if (methods == &ohci_device_isoc_methods) {
1658                 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1659         }
1660         xfer->td_transfer_first = NULL;
1661         xfer->td_transfer_last = NULL;
1662
1663         /* dequeue transfer and start next transfer */
1664         usbd_transfer_done(xfer, error);
1665 }
1666
1667 /*------------------------------------------------------------------------*
1668  * ohci bulk support
1669  *------------------------------------------------------------------------*/
1670 static void
1671 ohci_device_bulk_open(struct usb_xfer *xfer)
1672 {
1673         return;
1674 }
1675
1676 static void
1677 ohci_device_bulk_close(struct usb_xfer *xfer)
1678 {
1679         ohci_device_done(xfer, USB_ERR_CANCELLED);
1680 }
1681
1682 static void
1683 ohci_device_bulk_enter(struct usb_xfer *xfer)
1684 {
1685         return;
1686 }
1687
1688 static void
1689 ohci_device_bulk_start(struct usb_xfer *xfer)
1690 {
1691         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1692
1693         /* setup TD's and QH */
1694         ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1695
1696         /* put transfer on interrupt queue */
1697         ohci_transfer_intr_enqueue(xfer);
1698 }
1699
1700 static const struct usb_pipe_methods ohci_device_bulk_methods =
1701 {
1702         .open = ohci_device_bulk_open,
1703         .close = ohci_device_bulk_close,
1704         .enter = ohci_device_bulk_enter,
1705         .start = ohci_device_bulk_start,
1706 };
1707
1708 /*------------------------------------------------------------------------*
1709  * ohci control support
1710  *------------------------------------------------------------------------*/
1711 static void
1712 ohci_device_ctrl_open(struct usb_xfer *xfer)
1713 {
1714         return;
1715 }
1716
1717 static void
1718 ohci_device_ctrl_close(struct usb_xfer *xfer)
1719 {
1720         ohci_device_done(xfer, USB_ERR_CANCELLED);
1721 }
1722
1723 static void
1724 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1725 {
1726         return;
1727 }
1728
1729 static void
1730 ohci_device_ctrl_start(struct usb_xfer *xfer)
1731 {
1732         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1733
1734         /* setup TD's and QH */
1735         ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1736
1737         /* put transfer on interrupt queue */
1738         ohci_transfer_intr_enqueue(xfer);
1739 }
1740
1741 static const struct usb_pipe_methods ohci_device_ctrl_methods =
1742 {
1743         .open = ohci_device_ctrl_open,
1744         .close = ohci_device_ctrl_close,
1745         .enter = ohci_device_ctrl_enter,
1746         .start = ohci_device_ctrl_start,
1747 };
1748
1749 /*------------------------------------------------------------------------*
1750  * ohci interrupt support
1751  *------------------------------------------------------------------------*/
1752 static void
1753 ohci_device_intr_open(struct usb_xfer *xfer)
1754 {
1755         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1756         uint16_t best;
1757         uint16_t bit;
1758         uint16_t x;
1759
1760         best = 0;
1761         bit = OHCI_NO_EDS / 2;
1762         while (bit) {
1763                 if (xfer->interval >= bit) {
1764                         x = bit;
1765                         best = bit;
1766                         while (x & bit) {
1767                                 if (sc->sc_intr_stat[x] <
1768                                     sc->sc_intr_stat[best]) {
1769                                         best = x;
1770                                 }
1771                                 x++;
1772                         }
1773                         break;
1774                 }
1775                 bit >>= 1;
1776         }
1777
1778         sc->sc_intr_stat[best]++;
1779         xfer->qh_pos = best;
1780
1781         DPRINTFN(3, "best=%d interval=%d\n",
1782             best, xfer->interval);
1783 }
1784
1785 static void
1786 ohci_device_intr_close(struct usb_xfer *xfer)
1787 {
1788         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1789
1790         sc->sc_intr_stat[xfer->qh_pos]--;
1791
1792         ohci_device_done(xfer, USB_ERR_CANCELLED);
1793 }
1794
1795 static void
1796 ohci_device_intr_enter(struct usb_xfer *xfer)
1797 {
1798         return;
1799 }
1800
1801 static void
1802 ohci_device_intr_start(struct usb_xfer *xfer)
1803 {
1804         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1805
1806         /* setup TD's and QH */
1807         ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1808
1809         /* put transfer on interrupt queue */
1810         ohci_transfer_intr_enqueue(xfer);
1811 }
1812
1813 static const struct usb_pipe_methods ohci_device_intr_methods =
1814 {
1815         .open = ohci_device_intr_open,
1816         .close = ohci_device_intr_close,
1817         .enter = ohci_device_intr_enter,
1818         .start = ohci_device_intr_start,
1819 };
1820
1821 /*------------------------------------------------------------------------*
1822  * ohci isochronous support
1823  *------------------------------------------------------------------------*/
1824 static void
1825 ohci_device_isoc_open(struct usb_xfer *xfer)
1826 {
1827         return;
1828 }
1829
1830 static void
1831 ohci_device_isoc_close(struct usb_xfer *xfer)
1832 {
1833         /**/
1834         ohci_device_done(xfer, USB_ERR_CANCELLED);
1835 }
1836
1837 static void
1838 ohci_device_isoc_enter(struct usb_xfer *xfer)
1839 {
1840         struct usb_page_search buf_res;
1841         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1842         struct ohci_hcca *hcca;
1843         uint32_t buf_offset;
1844         uint32_t nframes;
1845         uint32_t ed_flags;
1846         uint32_t *plen;
1847         uint16_t itd_offset[OHCI_ITD_NOFFSET];
1848         uint16_t length;
1849         uint8_t ncur;
1850         ohci_itd_t *td;
1851         ohci_itd_t *td_last = NULL;
1852         ohci_ed_t *ed;
1853
1854         hcca = ohci_get_hcca(sc);
1855
1856         nframes = le32toh(hcca->hcca_frame_number);
1857
1858         DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1859             xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1860
1861         if ((xfer->endpoint->is_synced == 0) ||
1862             (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1863             (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1864                 /*
1865                  * If there is data underflow or the pipe queue is empty we
1866                  * schedule the transfer a few frames ahead of the current
1867                  * frame position. Else two isochronous transfers might
1868                  * overlap.
1869                  */
1870                 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1871                 xfer->endpoint->is_synced = 1;
1872                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1873         }
1874         /*
1875          * compute how many milliseconds the insertion is ahead of the
1876          * current frame position:
1877          */
1878         buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1879
1880         /*
1881          * pre-compute when the isochronous transfer will be finished:
1882          */
1883         xfer->isoc_time_complete =
1884             (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1885             xfer->nframes);
1886
1887         /* get the real number of frames */
1888
1889         nframes = xfer->nframes;
1890
1891         buf_offset = 0;
1892
1893         plen = xfer->frlengths;
1894
1895         /* toggle the DMA set we are using */
1896         xfer->flags_int.curr_dma_set ^= 1;
1897
1898         /* get next DMA set */
1899         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1900
1901         xfer->td_transfer_first = td;
1902
1903         ncur = 0;
1904         length = 0;
1905
1906         while (nframes--) {
1907                 if (td == NULL) {
1908                         panic("%s:%d: out of TD's\n",
1909                             __FUNCTION__, __LINE__);
1910                 }
1911                 itd_offset[ncur] = length;
1912                 buf_offset += *plen;
1913                 length += *plen;
1914                 plen++;
1915                 ncur++;
1916
1917                 if (                    /* check if the ITD is full */
1918                     (ncur == OHCI_ITD_NOFFSET) ||
1919                 /* check if we have put more than 4K into the ITD */
1920                     (length & 0xF000) ||
1921                 /* check if it is the last frame */
1922                     (nframes == 0)) {
1923
1924                         /* fill current ITD */
1925                         td->itd_flags = htole32(
1926                             OHCI_ITD_NOCC |
1927                             OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1928                             OHCI_ITD_NOINTR |
1929                             OHCI_ITD_SET_FC(ncur));
1930
1931                         td->frames = ncur;
1932                         xfer->endpoint->isoc_next += ncur;
1933
1934                         if (length == 0) {
1935                                 /* all zero */
1936                                 td->itd_bp0 = 0;
1937                                 td->itd_be = ~0;
1938
1939                                 while (ncur--) {
1940                                         td->itd_offset[ncur] =
1941                                             htole16(OHCI_ITD_MK_OFFS(0));
1942                                 }
1943                         } else {
1944                                 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1945                                 length = OHCI_PAGE_MASK(buf_res.physaddr);
1946                                 buf_res.physaddr =
1947                                     OHCI_PAGE(buf_res.physaddr);
1948                                 td->itd_bp0 = htole32(buf_res.physaddr);
1949                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1950                                 td->itd_be = htole32(buf_res.physaddr);
1951
1952                                 while (ncur--) {
1953                                         itd_offset[ncur] += length;
1954                                         itd_offset[ncur] =
1955                                             OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1956                                         td->itd_offset[ncur] =
1957                                             htole16(itd_offset[ncur]);
1958                                 }
1959                         }
1960                         ncur = 0;
1961                         length = 0;
1962                         td_last = td;
1963                         td = td->obj_next;
1964
1965                         if (td) {
1966                                 /* link the last TD with the next one */
1967                                 td_last->itd_next = td->itd_self;
1968                         }
1969                         usb_pc_cpu_flush(td_last->page_cache);
1970                 }
1971         }
1972
1973         /* update the last TD */
1974         td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1975         td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1976         td_last->itd_next = 0;
1977
1978         usb_pc_cpu_flush(td_last->page_cache);
1979
1980         xfer->td_transfer_last = td_last;
1981
1982 #ifdef USB_DEBUG
1983         if (ohcidebug > 8) {
1984                 DPRINTF("data before transfer:\n");
1985                 ohci_dump_itds(xfer->td_transfer_first);
1986         }
1987 #endif
1988         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1989
1990         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1991                 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1992         else
1993                 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1994
1995         ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1996             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1997             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1998
1999         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
2000                 ed_flags |= OHCI_ED_SPEED;
2001         }
2002         ed->ed_flags = htole32(ed_flags);
2003
2004         td = xfer->td_transfer_first;
2005
2006         ed->ed_headp = td->itd_self;
2007
2008         /* isochronous transfers are not affected by suspend / resume */
2009         /* the append function will flush the endpoint descriptor */
2010
2011         OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2012 }
2013
2014 static void
2015 ohci_device_isoc_start(struct usb_xfer *xfer)
2016 {
2017         /* put transfer on interrupt queue */
2018         ohci_transfer_intr_enqueue(xfer);
2019 }
2020
2021 static const struct usb_pipe_methods ohci_device_isoc_methods =
2022 {
2023         .open = ohci_device_isoc_open,
2024         .close = ohci_device_isoc_close,
2025         .enter = ohci_device_isoc_enter,
2026         .start = ohci_device_isoc_start,
2027 };
2028
2029 /*------------------------------------------------------------------------*
2030  * ohci root control support
2031  *------------------------------------------------------------------------*
2032  * Simulate a hardware hub by handling all the necessary requests.
2033  *------------------------------------------------------------------------*/
2034
2035 static const
2036 struct usb_device_descriptor ohci_devd =
2037 {
2038         sizeof(struct usb_device_descriptor),
2039         UDESC_DEVICE,                   /* type */
2040         {0x00, 0x01},                   /* USB version */
2041         UDCLASS_HUB,                    /* class */
2042         UDSUBCLASS_HUB,                 /* subclass */
2043         UDPROTO_FSHUB,                  /* protocol */
2044         64,                             /* max packet */
2045         {0}, {0}, {0x00, 0x01},         /* device id */
2046         1, 2, 0,                        /* string indexes */
2047         1                               /* # of configurations */
2048 };
2049
2050 static const
2051 struct ohci_config_desc ohci_confd =
2052 {
2053         .confd = {
2054                 .bLength = sizeof(struct usb_config_descriptor),
2055                 .bDescriptorType = UDESC_CONFIG,
2056                 .wTotalLength[0] = sizeof(ohci_confd),
2057                 .bNumInterface = 1,
2058                 .bConfigurationValue = 1,
2059                 .iConfiguration = 0,
2060                 .bmAttributes = UC_SELF_POWERED,
2061                 .bMaxPower = 0,         /* max power */
2062         },
2063         .ifcd = {
2064                 .bLength = sizeof(struct usb_interface_descriptor),
2065                 .bDescriptorType = UDESC_INTERFACE,
2066                 .bNumEndpoints = 1,
2067                 .bInterfaceClass = UICLASS_HUB,
2068                 .bInterfaceSubClass = UISUBCLASS_HUB,
2069                 .bInterfaceProtocol = 0,
2070         },
2071         .endpd = {
2072                 .bLength = sizeof(struct usb_endpoint_descriptor),
2073                 .bDescriptorType = UDESC_ENDPOINT,
2074                 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2075                 .bmAttributes = UE_INTERRUPT,
2076                 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2077                 .bInterval = 255,
2078         },
2079 };
2080
2081 static const
2082 struct usb_hub_descriptor ohci_hubd =
2083 {
2084         .bDescLength = 0,       /* dynamic length */
2085         .bDescriptorType = UDESC_HUB,
2086 };
2087
2088 static usb_error_t
2089 ohci_roothub_exec(struct usb_device *udev,
2090     struct usb_device_request *req, const void **pptr, uint16_t *plength)
2091 {
2092         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2093         const void *ptr;
2094         const char *str_ptr;
2095         uint32_t port;
2096         uint32_t v;
2097         uint16_t len;
2098         uint16_t value;
2099         uint16_t index;
2100         uint8_t l;
2101         usb_error_t err;
2102
2103         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2104
2105         /* buffer reset */
2106         ptr = (const void *)&sc->sc_hub_desc.temp;
2107         len = 0;
2108         err = 0;
2109
2110         value = UGETW(req->wValue);
2111         index = UGETW(req->wIndex);
2112
2113         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2114             "wValue=0x%04x wIndex=0x%04x\n",
2115             req->bmRequestType, req->bRequest,
2116             UGETW(req->wLength), value, index);
2117
2118 #define C(x,y) ((x) | ((y) << 8))
2119         switch (C(req->bRequest, req->bmRequestType)) {
2120         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2121         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2122         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2123                 /*
2124                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2125                  * for the integrated root hub.
2126                  */
2127                 break;
2128         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2129                 len = 1;
2130                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2131                 break;
2132         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2133                 switch (value >> 8) {
2134                 case UDESC_DEVICE:
2135                         if ((value & 0xff) != 0) {
2136                                 err = USB_ERR_IOERROR;
2137                                 goto done;
2138                         }
2139                         len = sizeof(ohci_devd);
2140                         ptr = (const void *)&ohci_devd;
2141                         break;
2142
2143                 case UDESC_CONFIG:
2144                         if ((value & 0xff) != 0) {
2145                                 err = USB_ERR_IOERROR;
2146                                 goto done;
2147                         }
2148                         len = sizeof(ohci_confd);
2149                         ptr = (const void *)&ohci_confd;
2150                         break;
2151
2152                 case UDESC_STRING:
2153                         switch (value & 0xff) {
2154                         case 0: /* Language table */
2155                                 str_ptr = "\001";
2156                                 break;
2157
2158                         case 1: /* Vendor */
2159                                 str_ptr = sc->sc_vendor;
2160                                 break;
2161
2162                         case 2: /* Product */
2163                                 str_ptr = "OHCI root HUB";
2164                                 break;
2165
2166                         default:
2167                                 str_ptr = "";
2168                                 break;
2169                         }
2170
2171                         len = usb_make_str_desc(
2172                             sc->sc_hub_desc.temp,
2173                             sizeof(sc->sc_hub_desc.temp),
2174                             str_ptr);
2175                         break;
2176
2177                 default:
2178                         err = USB_ERR_IOERROR;
2179                         goto done;
2180                 }
2181                 break;
2182         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2183                 len = 1;
2184                 sc->sc_hub_desc.temp[0] = 0;
2185                 break;
2186         case C(UR_GET_STATUS, UT_READ_DEVICE):
2187                 len = 2;
2188                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2189                 break;
2190         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2191         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2192                 len = 2;
2193                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2194                 break;
2195         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2196                 if (value >= OHCI_MAX_DEVICES) {
2197                         err = USB_ERR_IOERROR;
2198                         goto done;
2199                 }
2200                 sc->sc_addr = value;
2201                 break;
2202         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2203                 if ((value != 0) && (value != 1)) {
2204                         err = USB_ERR_IOERROR;
2205                         goto done;
2206                 }
2207                 sc->sc_conf = value;
2208                 break;
2209         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2210                 break;
2211         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2212         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2213         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2214                 err = USB_ERR_IOERROR;
2215                 goto done;
2216         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2217                 break;
2218         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2219                 break;
2220                 /* Hub requests */
2221         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2222                 break;
2223         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2224                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2225                     "port=%d feature=%d\n",
2226                     index, value);
2227                 if ((index < 1) ||
2228                     (index > sc->sc_noport)) {
2229                         err = USB_ERR_IOERROR;
2230                         goto done;
2231                 }
2232                 port = OHCI_RH_PORT_STATUS(index);
2233                 switch (value) {
2234                 case UHF_PORT_ENABLE:
2235                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2236                         break;
2237                 case UHF_PORT_SUSPEND:
2238                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2239                         break;
2240                 case UHF_PORT_POWER:
2241                         /* Yes, writing to the LOW_SPEED bit clears power. */
2242                         OWRITE4(sc, port, UPS_LOW_SPEED);
2243                         break;
2244                 case UHF_C_PORT_CONNECTION:
2245                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2246                         break;
2247                 case UHF_C_PORT_ENABLE:
2248                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2249                         break;
2250                 case UHF_C_PORT_SUSPEND:
2251                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2252                         break;
2253                 case UHF_C_PORT_OVER_CURRENT:
2254                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2255                         break;
2256                 case UHF_C_PORT_RESET:
2257                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2258                         break;
2259                 default:
2260                         err = USB_ERR_IOERROR;
2261                         goto done;
2262                 }
2263                 switch (value) {
2264                 case UHF_C_PORT_CONNECTION:
2265                 case UHF_C_PORT_ENABLE:
2266                 case UHF_C_PORT_SUSPEND:
2267                 case UHF_C_PORT_OVER_CURRENT:
2268                 case UHF_C_PORT_RESET:
2269                         /* enable RHSC interrupt if condition is cleared. */
2270                         if ((OREAD4(sc, port) >> 16) == 0)
2271                                 ohci_rhsc_enable(sc);
2272                         break;
2273                 default:
2274                         break;
2275                 }
2276                 break;
2277         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2278                 if ((value & 0xff) != 0) {
2279                         err = USB_ERR_IOERROR;
2280                         goto done;
2281                 }
2282                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2283
2284                 sc->sc_hub_desc.hubd = ohci_hubd;
2285                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2286                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2287                     (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2288                     v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2289                 /* XXX overcurrent */
2290                     );
2291                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2292                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2293
2294                 for (l = 0; l < sc->sc_noport; l++) {
2295                         if (v & 1) {
2296                                 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2297                         }
2298                         v >>= 1;
2299                 }
2300                 sc->sc_hub_desc.hubd.bDescLength =
2301                     8 + ((sc->sc_noport + 7) / 8);
2302                 len = sc->sc_hub_desc.hubd.bDescLength;
2303                 break;
2304
2305         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2306                 len = 16;
2307                 memset(sc->sc_hub_desc.temp, 0, 16);
2308                 break;
2309         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2310                 DPRINTFN(9, "get port status i=%d\n",
2311                     index);
2312                 if ((index < 1) ||
2313                     (index > sc->sc_noport)) {
2314                         err = USB_ERR_IOERROR;
2315                         goto done;
2316                 }
2317                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2318                 DPRINTFN(9, "port status=0x%04x\n", v);
2319                 v &= ~UPS_PORT_MODE_DEVICE;     /* force host mode */
2320                 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2321                 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2322                 len = sizeof(sc->sc_hub_desc.ps);
2323                 break;
2324         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2325                 err = USB_ERR_IOERROR;
2326                 goto done;
2327         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2328                 break;
2329         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2330                 if ((index < 1) ||
2331                     (index > sc->sc_noport)) {
2332                         err = USB_ERR_IOERROR;
2333                         goto done;
2334                 }
2335                 port = OHCI_RH_PORT_STATUS(index);
2336                 switch (value) {
2337                 case UHF_PORT_ENABLE:
2338                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2339                         break;
2340                 case UHF_PORT_SUSPEND:
2341                         OWRITE4(sc, port, UPS_SUSPEND);
2342                         break;
2343                 case UHF_PORT_RESET:
2344                         DPRINTFN(6, "reset port %d\n", index);
2345                         OWRITE4(sc, port, UPS_RESET);
2346                         for (v = 0;; v++) {
2347                                 if (v < 12) {
2348                                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
2349                                             USB_MS_TO_TICKS(usb_port_root_reset_delay));
2350
2351                                         if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2352                                                 break;
2353                                         }
2354                                 } else {
2355                                         err = USB_ERR_TIMEOUT;
2356                                         goto done;
2357                                 }
2358                         }
2359                         DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2360                             index, OREAD4(sc, port));
2361                         break;
2362                 case UHF_PORT_POWER:
2363                         DPRINTFN(3, "set port power %d\n", index);
2364                         OWRITE4(sc, port, UPS_PORT_POWER);
2365                         break;
2366                 default:
2367                         err = USB_ERR_IOERROR;
2368                         goto done;
2369                 }
2370                 break;
2371         default:
2372                 err = USB_ERR_IOERROR;
2373                 goto done;
2374         }
2375 done:
2376         *plength = len;
2377         *pptr = ptr;
2378         return (err);
2379 }
2380
2381 static void
2382 ohci_xfer_setup(struct usb_setup_params *parm)
2383 {
2384         struct usb_page_search page_info;
2385         struct usb_page_cache *pc;
2386         ohci_softc_t *sc;
2387         struct usb_xfer *xfer;
2388         void *last_obj;
2389         uint32_t ntd;
2390         uint32_t nitd;
2391         uint32_t nqh;
2392         uint32_t n;
2393
2394         sc = OHCI_BUS2SC(parm->udev->bus);
2395         xfer = parm->curr_xfer;
2396
2397         parm->hc_max_packet_size = 0x500;
2398         parm->hc_max_packet_count = 1;
2399         parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2400
2401         /*
2402          * calculate ntd and nqh
2403          */
2404         if (parm->methods == &ohci_device_ctrl_methods) {
2405                 xfer->flags_int.bdma_enable = 1;
2406
2407                 usbd_transfer_setup_sub(parm);
2408
2409                 nitd = 0;
2410                 ntd = ((2 * xfer->nframes) + 1  /* STATUS */
2411                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2412                 nqh = 1;
2413
2414         } else if (parm->methods == &ohci_device_bulk_methods) {
2415                 xfer->flags_int.bdma_enable = 1;
2416
2417                 usbd_transfer_setup_sub(parm);
2418
2419                 nitd = 0;
2420                 ntd = ((2 * xfer->nframes)
2421                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2422                 nqh = 1;
2423
2424         } else if (parm->methods == &ohci_device_intr_methods) {
2425                 xfer->flags_int.bdma_enable = 1;
2426
2427                 usbd_transfer_setup_sub(parm);
2428
2429                 nitd = 0;
2430                 ntd = ((2 * xfer->nframes)
2431                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2432                 nqh = 1;
2433
2434         } else if (parm->methods == &ohci_device_isoc_methods) {
2435                 xfer->flags_int.bdma_enable = 1;
2436
2437                 usbd_transfer_setup_sub(parm);
2438
2439                 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2440                     howmany(xfer->nframes, OHCI_ITD_NOFFSET) +
2441                     1 /* EXTRA */ );
2442                 ntd = 0;
2443                 nqh = 1;
2444
2445         } else {
2446
2447                 usbd_transfer_setup_sub(parm);
2448
2449                 nitd = 0;
2450                 ntd = 0;
2451                 nqh = 0;
2452         }
2453
2454 alloc_dma_set:
2455
2456         if (parm->err) {
2457                 return;
2458         }
2459         last_obj = NULL;
2460
2461         if (usbd_transfer_setup_sub_malloc(
2462             parm, &pc, sizeof(ohci_td_t),
2463             OHCI_TD_ALIGN, ntd)) {
2464                 parm->err = USB_ERR_NOMEM;
2465                 return;
2466         }
2467         if (parm->buf) {
2468                 for (n = 0; n != ntd; n++) {
2469                         ohci_td_t *td;
2470
2471                         usbd_get_page(pc + n, 0, &page_info);
2472
2473                         td = page_info.buffer;
2474
2475                         /* init TD */
2476                         td->td_self = htole32(page_info.physaddr);
2477                         td->obj_next = last_obj;
2478                         td->page_cache = pc + n;
2479
2480                         last_obj = td;
2481
2482                         usb_pc_cpu_flush(pc + n);
2483                 }
2484         }
2485         if (usbd_transfer_setup_sub_malloc(
2486             parm, &pc, sizeof(ohci_itd_t),
2487             OHCI_ITD_ALIGN, nitd)) {
2488                 parm->err = USB_ERR_NOMEM;
2489                 return;
2490         }
2491         if (parm->buf) {
2492                 for (n = 0; n != nitd; n++) {
2493                         ohci_itd_t *itd;
2494
2495                         usbd_get_page(pc + n, 0, &page_info);
2496
2497                         itd = page_info.buffer;
2498
2499                         /* init TD */
2500                         itd->itd_self = htole32(page_info.physaddr);
2501                         itd->obj_next = last_obj;
2502                         itd->page_cache = pc + n;
2503
2504                         last_obj = itd;
2505
2506                         usb_pc_cpu_flush(pc + n);
2507                 }
2508         }
2509         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2510
2511         last_obj = NULL;
2512
2513         if (usbd_transfer_setup_sub_malloc(
2514             parm, &pc, sizeof(ohci_ed_t),
2515             OHCI_ED_ALIGN, nqh)) {
2516                 parm->err = USB_ERR_NOMEM;
2517                 return;
2518         }
2519         if (parm->buf) {
2520                 for (n = 0; n != nqh; n++) {
2521                         ohci_ed_t *ed;
2522
2523                         usbd_get_page(pc + n, 0, &page_info);
2524
2525                         ed = page_info.buffer;
2526
2527                         /* init QH */
2528                         ed->ed_self = htole32(page_info.physaddr);
2529                         ed->obj_next = last_obj;
2530                         ed->page_cache = pc + n;
2531
2532                         last_obj = ed;
2533
2534                         usb_pc_cpu_flush(pc + n);
2535                 }
2536         }
2537         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2538
2539         if (!xfer->flags_int.curr_dma_set) {
2540                 xfer->flags_int.curr_dma_set = 1;
2541                 goto alloc_dma_set;
2542         }
2543 }
2544
2545 static void
2546 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2547     struct usb_endpoint *ep)
2548 {
2549         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2550
2551         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2552             ep, udev->address,
2553             edesc->bEndpointAddress, udev->flags.usb_mode,
2554             sc->sc_addr);
2555
2556         if (udev->device_index != sc->sc_addr) {
2557                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2558                 case UE_CONTROL:
2559                         ep->methods = &ohci_device_ctrl_methods;
2560                         break;
2561                 case UE_INTERRUPT:
2562                         ep->methods = &ohci_device_intr_methods;
2563                         break;
2564                 case UE_ISOCHRONOUS:
2565                         if (udev->speed == USB_SPEED_FULL) {
2566                                 ep->methods = &ohci_device_isoc_methods;
2567                         }
2568                         break;
2569                 case UE_BULK:
2570                         ep->methods = &ohci_device_bulk_methods;
2571                         break;
2572                 default:
2573                         /* do nothing */
2574                         break;
2575                 }
2576         }
2577 }
2578
2579 static void
2580 ohci_xfer_unsetup(struct usb_xfer *xfer)
2581 {
2582         return;
2583 }
2584
2585 static void
2586 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2587 {
2588         /*
2589          * Wait until hardware has finished any possible use of the
2590          * transfer descriptor(s) and QH
2591          */
2592         *pus = (1125);                  /* microseconds */
2593 }
2594
2595 static void
2596 ohci_device_resume(struct usb_device *udev)
2597 {
2598         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2599         struct usb_xfer *xfer;
2600         const struct usb_pipe_methods *methods;
2601         ohci_ed_t *ed;
2602
2603         DPRINTF("\n");
2604
2605         USB_BUS_LOCK(udev->bus);
2606
2607         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2608
2609                 if (xfer->xroot->udev == udev) {
2610
2611                         methods = xfer->endpoint->methods;
2612                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2613
2614                         if (methods == &ohci_device_bulk_methods) {
2615                                 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2616                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2617                         }
2618                         if (methods == &ohci_device_ctrl_methods) {
2619                                 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2620                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2621                         }
2622                         if (methods == &ohci_device_intr_methods) {
2623                                 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2624                         }
2625                 }
2626         }
2627
2628         USB_BUS_UNLOCK(udev->bus);
2629
2630         return;
2631 }
2632
2633 static void
2634 ohci_device_suspend(struct usb_device *udev)
2635 {
2636         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2637         struct usb_xfer *xfer;
2638         const struct usb_pipe_methods *methods;
2639         ohci_ed_t *ed;
2640
2641         DPRINTF("\n");
2642
2643         USB_BUS_LOCK(udev->bus);
2644
2645         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2646
2647                 if (xfer->xroot->udev == udev) {
2648
2649                         methods = xfer->endpoint->methods;
2650                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2651
2652                         if (methods == &ohci_device_bulk_methods) {
2653                                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2654                         }
2655                         if (methods == &ohci_device_ctrl_methods) {
2656                                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2657                         }
2658                         if (methods == &ohci_device_intr_methods) {
2659                                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2660                         }
2661                 }
2662         }
2663
2664         USB_BUS_UNLOCK(udev->bus);
2665
2666         return;
2667 }
2668
2669 static void
2670 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2671 {
2672         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2673
2674         switch (state) {
2675         case USB_HW_POWER_SUSPEND:
2676         case USB_HW_POWER_SHUTDOWN:
2677                 ohci_suspend(sc);
2678                 break;
2679         case USB_HW_POWER_RESUME:
2680                 ohci_resume(sc);
2681                 break;
2682         default:
2683                 break;
2684         }
2685 }
2686
2687 static void
2688 ohci_set_hw_power(struct usb_bus *bus)
2689 {
2690         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2691         uint32_t temp;
2692         uint32_t flags;
2693
2694         DPRINTF("\n");
2695
2696         USB_BUS_LOCK(bus);
2697
2698         flags = bus->hw_power_state;
2699
2700         temp = OREAD4(sc, OHCI_CONTROL);
2701         temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2702
2703         if (flags & USB_HW_POWER_CONTROL)
2704                 temp |= OHCI_CLE;
2705
2706         if (flags & USB_HW_POWER_BULK)
2707                 temp |= OHCI_BLE;
2708
2709         if (flags & USB_HW_POWER_INTERRUPT)
2710                 temp |= OHCI_PLE;
2711
2712         if (flags & USB_HW_POWER_ISOC)
2713                 temp |= OHCI_IE | OHCI_PLE;
2714
2715         OWRITE4(sc, OHCI_CONTROL, temp);
2716
2717         USB_BUS_UNLOCK(bus);
2718
2719         return;
2720 }
2721
2722 static const struct usb_bus_methods ohci_bus_methods =
2723 {
2724         .endpoint_init = ohci_ep_init,
2725         .xfer_setup = ohci_xfer_setup,
2726         .xfer_unsetup = ohci_xfer_unsetup,
2727         .get_dma_delay = ohci_get_dma_delay,
2728         .device_resume = ohci_device_resume,
2729         .device_suspend = ohci_device_suspend,
2730         .set_hw_power = ohci_set_hw_power,
2731         .set_hw_power_sleep = ohci_set_hw_power_sleep,
2732         .roothub_exec = ohci_roothub_exec,
2733         .xfer_poll = ohci_do_poll,
2734 };