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1 /* $FreeBSD$ */
2 /*-
3  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4  *
5  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
6  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
7  * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30
31 /*
32  * USB Open Host Controller driver.
33  *
34  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
35  * USB spec:  http://www.usb.org/developers/docs/usbspec.zip
36  */
37
38 #ifdef USB_GLOBAL_INCLUDE_FILE
39 #include USB_GLOBAL_INCLUDE_FILE
40 #else
41 #include <sys/stdint.h>
42 #include <sys/stddef.h>
43 #include <sys/param.h>
44 #include <sys/queue.h>
45 #include <sys/types.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/bus.h>
49 #include <sys/module.h>
50 #include <sys/lock.h>
51 #include <sys/mutex.h>
52 #include <sys/condvar.h>
53 #include <sys/sysctl.h>
54 #include <sys/sx.h>
55 #include <sys/unistd.h>
56 #include <sys/callout.h>
57 #include <sys/malloc.h>
58 #include <sys/priv.h>
59
60 #include <dev/usb/usb.h>
61 #include <dev/usb/usbdi.h>
62
63 #define USB_DEBUG_VAR ohcidebug
64
65 #include <dev/usb/usb_core.h>
66 #include <dev/usb/usb_debug.h>
67 #include <dev/usb/usb_busdma.h>
68 #include <dev/usb/usb_process.h>
69 #include <dev/usb/usb_transfer.h>
70 #include <dev/usb/usb_device.h>
71 #include <dev/usb/usb_hub.h>
72 #include <dev/usb/usb_util.h>
73
74 #include <dev/usb/usb_controller.h>
75 #include <dev/usb/usb_bus.h>
76 #endif                  /* USB_GLOBAL_INCLUDE_FILE */
77
78 #include <dev/usb/controller/ohci.h>
79 #include <dev/usb/controller/ohcireg.h>
80
81 #define OHCI_BUS2SC(bus) \
82    ((ohci_softc_t *)(((uint8_t *)(bus)) - \
83     ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
84
85 #ifdef USB_DEBUG
86 static int ohcidebug = 0;
87
88 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
89     "USB ohci");
90 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RWTUN,
91     &ohcidebug, 0, "ohci debug level");
92
93 static void ohci_dumpregs(ohci_softc_t *);
94 static void ohci_dump_tds(ohci_td_t *);
95 static uint8_t ohci_dump_td(ohci_td_t *);
96 static void ohci_dump_ed(ohci_ed_t *);
97 static uint8_t ohci_dump_itd(ohci_itd_t *);
98 static void ohci_dump_itds(ohci_itd_t *);
99
100 #endif
101
102 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
103                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
104 #define OWRITE1(sc, r, x) \
105  do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
106 #define OWRITE2(sc, r, x) \
107  do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
108 #define OWRITE4(sc, r, x) \
109  do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
110 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
111 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
112 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
113
114 #define OHCI_INTR_ENDPT 1
115
116 static const struct usb_bus_methods ohci_bus_methods;
117 static const struct usb_pipe_methods ohci_device_bulk_methods;
118 static const struct usb_pipe_methods ohci_device_ctrl_methods;
119 static const struct usb_pipe_methods ohci_device_intr_methods;
120 static const struct usb_pipe_methods ohci_device_isoc_methods;
121
122 static void ohci_do_poll(struct usb_bus *bus);
123 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
124 static void ohci_timeout(void *arg);
125 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
126 static void ohci_root_intr(ohci_softc_t *sc);
127
128 struct ohci_std_temp {
129         struct usb_page_cache *pc;
130         ohci_td_t *td;
131         ohci_td_t *td_next;
132         uint32_t average;
133         uint32_t td_flags;
134         uint32_t len;
135         uint16_t max_frame_size;
136         uint8_t shortpkt;
137         uint8_t setup_alt_next;
138         uint8_t last_frame;
139 };
140
141 static struct ohci_hcca *
142 ohci_get_hcca(ohci_softc_t *sc)
143 {
144         usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
145         return (sc->sc_hcca_p);
146 }
147
148 void
149 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
150 {
151         struct ohci_softc *sc = OHCI_BUS2SC(bus);
152         uint32_t i;
153
154         cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
155             sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
156
157         cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
158             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
159
160         cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
161             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
162
163         cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
164             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
165
166         for (i = 0; i != OHCI_NO_EDS; i++) {
167                 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
168                     sizeof(ohci_ed_t), OHCI_ED_ALIGN);
169         }
170 }
171
172 static usb_error_t
173 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
174 {
175         struct usb_page_search buf_res;
176         uint32_t i;
177         uint32_t ctl;
178         uint32_t ival;
179         uint32_t hcr;
180         uint32_t fm;
181         uint32_t per;
182         uint32_t desca;
183
184         /* Determine in what context we are running. */
185         ctl = OREAD4(sc, OHCI_CONTROL);
186         if (ctl & OHCI_IR) {
187                 /* SMM active, request change */
188                 DPRINTF("SMM active, request owner change\n");
189                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
190                 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
191                         usb_pause_mtx(NULL, hz / 1000);
192                         ctl = OREAD4(sc, OHCI_CONTROL);
193                 }
194                 if (ctl & OHCI_IR) {
195                         device_printf(sc->sc_bus.bdev,
196                             "SMM does not respond, resetting\n");
197                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
198                         goto reset;
199                 }
200         } else {
201                 DPRINTF("cold started\n");
202 reset:
203                 /* controller was cold started */
204                 usb_pause_mtx(NULL,
205                     USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
206         }
207
208         /*
209          * This reset should not be necessary according to the OHCI spec, but
210          * without it some controllers do not start.
211          */
212         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
213         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
214
215         usb_pause_mtx(NULL,
216             USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
217
218         /* we now own the host controller and the bus has been reset */
219         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
220
221         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR);     /* Reset HC */
222         /* nominal time for a reset is 10 us */
223         for (i = 0; i < 10; i++) {
224                 DELAY(10);
225                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
226                 if (!hcr) {
227                         break;
228                 }
229         }
230         if (hcr) {
231                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
232                 return (USB_ERR_IOERROR);
233         }
234 #ifdef USB_DEBUG
235         if (ohcidebug > 15) {
236                 ohci_dumpregs(sc);
237         }
238 #endif
239
240         if (do_suspend) {
241                 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
242                 return (USB_ERR_NORMAL_COMPLETION);
243         }
244
245         /* The controller is now in SUSPEND state, we have 2ms to finish. */
246
247         /* set up HC registers */
248         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
249         OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
250
251         usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
252         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
253
254         usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
255         OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
256
257         /* disable all interrupts and then switch on all desired interrupts */
258         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
259         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
260         /* switch on desired functional features */
261         ctl = OREAD4(sc, OHCI_CONTROL);
262         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
263         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
264             OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
265         /* And finally start it! */
266         OWRITE4(sc, OHCI_CONTROL, ctl);
267
268         /*
269          * The controller is now OPERATIONAL.  Set a some final
270          * registers that should be set earlier, but that the
271          * controller ignores when in the SUSPEND state.
272          */
273         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
274         fm |= OHCI_FSMPS(ival) | ival;
275         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
276         per = OHCI_PERIODIC(ival);      /* 90% periodic */
277         OWRITE4(sc, OHCI_PERIODIC_START, per);
278
279         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
280         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
281         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
282         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
283         usb_pause_mtx(NULL,
284             USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
285         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
286
287         /*
288          * The AMD756 requires a delay before re-reading the register,
289          * otherwise it will occasionally report 0 ports.
290          */
291         sc->sc_noport = 0;
292         for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
293                 usb_pause_mtx(NULL,
294                     USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
295                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
296         }
297
298 #ifdef USB_DEBUG
299         if (ohcidebug > 5) {
300                 ohci_dumpregs(sc);
301         }
302 #endif
303         return (USB_ERR_NORMAL_COMPLETION);
304 }
305
306 static struct ohci_ed *
307 ohci_init_ed(struct usb_page_cache *pc)
308 {
309         struct usb_page_search buf_res;
310         struct ohci_ed *ed;
311
312         usbd_get_page(pc, 0, &buf_res);
313
314         ed = buf_res.buffer;
315
316         ed->ed_self = htole32(buf_res.physaddr);
317         ed->ed_flags = htole32(OHCI_ED_SKIP);
318         ed->page_cache = pc;
319
320         return (ed);
321 }
322
323 usb_error_t
324 ohci_init(ohci_softc_t *sc)
325 {
326         struct usb_page_search buf_res;
327         uint16_t i;
328         uint16_t bit;
329         uint16_t x;
330         uint16_t y;
331
332         DPRINTF("start\n");
333
334         sc->sc_eintrs = OHCI_NORMAL_INTRS;
335
336         /*
337          * Setup all ED's
338          */
339
340         sc->sc_ctrl_p_last =
341             ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
342
343         sc->sc_bulk_p_last =
344             ohci_init_ed(&sc->sc_hw.bulk_start_pc);
345
346         sc->sc_isoc_p_last =
347             ohci_init_ed(&sc->sc_hw.isoc_start_pc);
348
349         for (i = 0; i != OHCI_NO_EDS; i++) {
350                 sc->sc_intr_p_last[i] =
351                     ohci_init_ed(sc->sc_hw.intr_start_pc + i);
352         }
353
354         /*
355          * the QHs are arranged to give poll intervals that are
356          * powers of 2 times 1ms
357          */
358         bit = OHCI_NO_EDS / 2;
359         while (bit) {
360                 x = bit;
361                 while (x & bit) {
362                         ohci_ed_t *ed_x;
363                         ohci_ed_t *ed_y;
364
365                         y = (x ^ bit) | (bit / 2);
366
367                         /*
368                          * the next QH has half the poll interval
369                          */
370                         ed_x = sc->sc_intr_p_last[x];
371                         ed_y = sc->sc_intr_p_last[y];
372
373                         ed_x->next = NULL;
374                         ed_x->ed_next = ed_y->ed_self;
375
376                         x++;
377                 }
378                 bit >>= 1;
379         }
380
381         if (1) {
382
383                 ohci_ed_t *ed_int;
384                 ohci_ed_t *ed_isc;
385
386                 ed_int = sc->sc_intr_p_last[0];
387                 ed_isc = sc->sc_isoc_p_last;
388
389                 /* the last (1ms) QH */
390                 ed_int->next = ed_isc;
391                 ed_int->ed_next = ed_isc->ed_self;
392         }
393         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
394
395         sc->sc_hcca_p = buf_res.buffer;
396
397         /*
398          * Fill HCCA interrupt table.  The bit reversal is to get
399          * the tree set up properly to spread the interrupts.
400          */
401         for (i = 0; i != OHCI_NO_INTRS; i++) {
402                 sc->sc_hcca_p->hcca_interrupt_table[i] =
403                     sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
404         }
405         /* flush all cache into memory */
406
407         usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
408
409         /* set up the bus struct */
410         sc->sc_bus.methods = &ohci_bus_methods;
411
412         usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
413
414 #ifdef USB_DEBUG
415         if (ohcidebug > 15) {
416                 for (i = 0; i != OHCI_NO_EDS; i++) {
417                         printf("ed#%d ", i);
418                         ohci_dump_ed(sc->sc_intr_p_last[i]);
419                 }
420                 printf("iso ");
421                 ohci_dump_ed(sc->sc_isoc_p_last);
422         }
423 #endif
424
425         sc->sc_bus.usbrev = USB_REV_1_0;
426
427         if (ohci_controller_init(sc, 0) != 0)
428                 return (USB_ERR_INVAL);
429
430         /* catch any lost interrupts */
431         ohci_do_poll(&sc->sc_bus);
432         return (USB_ERR_NORMAL_COMPLETION);
433 }
434
435 /*
436  * shut down the controller when the system is going down
437  */
438 void
439 ohci_detach(struct ohci_softc *sc)
440 {
441         USB_BUS_LOCK(&sc->sc_bus);
442
443         usb_callout_stop(&sc->sc_tmo_rhsc);
444
445         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
446         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
447
448         USB_BUS_UNLOCK(&sc->sc_bus);
449
450         /* XXX let stray task complete */
451         usb_pause_mtx(NULL, hz / 20);
452
453         usb_callout_drain(&sc->sc_tmo_rhsc);
454 }
455
456 static void
457 ohci_suspend(ohci_softc_t *sc)
458 {
459         DPRINTF("\n");
460
461 #ifdef USB_DEBUG
462         if (ohcidebug > 2)
463                 ohci_dumpregs(sc);
464 #endif
465
466         /* reset HC and leave it suspended */
467         ohci_controller_init(sc, 1);
468 }
469
470 static void
471 ohci_resume(ohci_softc_t *sc)
472 {
473         DPRINTF("\n");
474
475 #ifdef USB_DEBUG
476         if (ohcidebug > 2)
477                 ohci_dumpregs(sc);
478 #endif
479
480         /* some broken BIOSes never initialize the Controller chip */
481         ohci_controller_init(sc, 0);
482
483         /* catch any lost interrupts */
484         ohci_do_poll(&sc->sc_bus);
485 }
486
487 #ifdef USB_DEBUG
488 static void
489 ohci_dumpregs(ohci_softc_t *sc)
490 {
491         struct ohci_hcca *hcca;
492
493         DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
494             OREAD4(sc, OHCI_REVISION),
495             OREAD4(sc, OHCI_CONTROL),
496             OREAD4(sc, OHCI_COMMAND_STATUS));
497         DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
498             OREAD4(sc, OHCI_INTERRUPT_STATUS),
499             OREAD4(sc, OHCI_INTERRUPT_ENABLE),
500             OREAD4(sc, OHCI_INTERRUPT_DISABLE));
501         DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
502             OREAD4(sc, OHCI_HCCA),
503             OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
504             OREAD4(sc, OHCI_CONTROL_HEAD_ED));
505         DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
506             OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
507             OREAD4(sc, OHCI_BULK_HEAD_ED),
508             OREAD4(sc, OHCI_BULK_CURRENT_ED));
509         DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
510             OREAD4(sc, OHCI_DONE_HEAD),
511             OREAD4(sc, OHCI_FM_INTERVAL),
512             OREAD4(sc, OHCI_FM_REMAINING));
513         DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
514             OREAD4(sc, OHCI_FM_NUMBER),
515             OREAD4(sc, OHCI_PERIODIC_START),
516             OREAD4(sc, OHCI_LS_THRESHOLD));
517         DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
518             OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
519             OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
520             OREAD4(sc, OHCI_RH_STATUS));
521         DPRINTF("               port1=0x%08x port2=0x%08x\n",
522             OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
523             OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
524
525         hcca = ohci_get_hcca(sc);
526
527         DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
528             le32toh(hcca->hcca_frame_number),
529             le32toh(hcca->hcca_done_head));
530 }
531 static void
532 ohci_dump_tds(ohci_td_t *std)
533 {
534         for (; std; std = std->obj_next) {
535                 if (ohci_dump_td(std)) {
536                         break;
537                 }
538         }
539 }
540
541 static uint8_t
542 ohci_dump_td(ohci_td_t *std)
543 {
544         uint32_t td_flags;
545         uint8_t temp;
546
547         usb_pc_cpu_invalidate(std->page_cache);
548
549         td_flags = le32toh(std->td_flags);
550         temp = (std->td_next == 0);
551
552         printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
553             "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
554             std, le32toh(std->td_self),
555             (td_flags & OHCI_TD_R) ? "-R" : "",
556             (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
557             (td_flags & OHCI_TD_IN) ? "-IN" : "",
558             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
559             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
560             OHCI_TD_GET_DI(td_flags),
561             OHCI_TD_GET_EC(td_flags),
562             OHCI_TD_GET_CC(td_flags),
563             le32toh(std->td_cbp),
564             le32toh(std->td_next),
565             le32toh(std->td_be));
566
567         return (temp);
568 }
569
570 static uint8_t
571 ohci_dump_itd(ohci_itd_t *sitd)
572 {
573         uint32_t itd_flags;
574         uint16_t i;
575         uint8_t temp;
576
577         usb_pc_cpu_invalidate(sitd->page_cache);
578
579         itd_flags = le32toh(sitd->itd_flags);
580         temp = (sitd->itd_next == 0);
581
582         printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
583             "bp0=0x%08x next=0x%08x be=0x%08x\n",
584             sitd, le32toh(sitd->itd_self),
585             OHCI_ITD_GET_SF(itd_flags),
586             OHCI_ITD_GET_DI(itd_flags),
587             OHCI_ITD_GET_FC(itd_flags),
588             OHCI_ITD_GET_CC(itd_flags),
589             le32toh(sitd->itd_bp0),
590             le32toh(sitd->itd_next),
591             le32toh(sitd->itd_be));
592         for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
593                 printf("offs[%d]=0x%04x ", i,
594                     (uint32_t)le16toh(sitd->itd_offset[i]));
595         }
596         printf("\n");
597
598         return (temp);
599 }
600
601 static void
602 ohci_dump_itds(ohci_itd_t *sitd)
603 {
604         for (; sitd; sitd = sitd->obj_next) {
605                 if (ohci_dump_itd(sitd)) {
606                         break;
607                 }
608         }
609 }
610
611 static void
612 ohci_dump_ed(ohci_ed_t *sed)
613 {
614         uint32_t ed_flags;
615         uint32_t ed_headp;
616
617         usb_pc_cpu_invalidate(sed->page_cache);
618
619         ed_flags = le32toh(sed->ed_flags);
620         ed_headp = le32toh(sed->ed_headp);
621
622         printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
623             "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
624             sed, le32toh(sed->ed_self),
625             OHCI_ED_GET_FA(ed_flags),
626             OHCI_ED_GET_EN(ed_flags),
627             OHCI_ED_GET_MAXP(ed_flags),
628             (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
629             (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
630             (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
631             (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
632             (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
633             le32toh(sed->ed_tailp),
634             (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
635             (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
636             le32toh(sed->ed_headp),
637             le32toh(sed->ed_next));
638 }
639
640 #endif
641
642 static void
643 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
644 {
645         /* check for early completion */
646         if (ohci_check_transfer(xfer)) {
647                 return;
648         }
649         /* put transfer on interrupt queue */
650         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
651
652         /* start timeout, if any */
653         if (xfer->timeout != 0) {
654                 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
655         }
656 }
657
658 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
659 static ohci_ed_t *
660 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
661 {
662         DPRINTFN(11, "%p to %p\n", sed, last);
663
664         if (sed->prev != NULL) {
665                 /* should not happen */
666                 DPRINTFN(0, "ED already linked!\n");
667                 return (last);
668         }
669         /* (sc->sc_bus.bus_mtx) must be locked */
670
671         sed->next = last->next;
672         sed->ed_next = last->ed_next;
673         sed->ed_tailp = 0;
674
675         sed->prev = last;
676
677         usb_pc_cpu_flush(sed->page_cache);
678
679         /*
680          * the last->next->prev is never followed: sed->next->prev = sed;
681          */
682
683         last->next = sed;
684         last->ed_next = sed->ed_self;
685
686         usb_pc_cpu_flush(last->page_cache);
687
688         return (sed);
689 }
690
691 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
692 static ohci_ed_t *
693 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
694 {
695         DPRINTFN(11, "%p from %p\n", sed, last);
696
697         /* (sc->sc_bus.bus_mtx) must be locked */
698
699         /* only remove if not removed from a queue */
700         if (sed->prev) {
701
702                 sed->prev->next = sed->next;
703                 sed->prev->ed_next = sed->ed_next;
704
705                 usb_pc_cpu_flush(sed->prev->page_cache);
706
707                 if (sed->next) {
708                         sed->next->prev = sed->prev;
709                         usb_pc_cpu_flush(sed->next->page_cache);
710                 }
711                 last = ((last == sed) ? sed->prev : last);
712
713                 sed->prev = 0;
714
715                 usb_pc_cpu_flush(sed->page_cache);
716         }
717         return (last);
718 }
719
720 static void
721 ohci_isoc_done(struct usb_xfer *xfer)
722 {
723         uint8_t nframes;
724         uint32_t *plen = xfer->frlengths;
725         volatile uint16_t *olen;
726         uint16_t len = 0;
727         ohci_itd_t *td = xfer->td_transfer_first;
728
729         while (1) {
730                 if (td == NULL) {
731                         panic("%s:%d: out of TD's\n",
732                             __FUNCTION__, __LINE__);
733                 }
734 #ifdef USB_DEBUG
735                 if (ohcidebug > 5) {
736                         DPRINTF("isoc TD\n");
737                         ohci_dump_itd(td);
738                 }
739 #endif
740                 usb_pc_cpu_invalidate(td->page_cache);
741
742                 nframes = td->frames;
743                 olen = &td->itd_offset[0];
744
745                 if (nframes > 8) {
746                         nframes = 8;
747                 }
748                 while (nframes--) {
749                         len = le16toh(*olen);
750
751                         if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
752                                 len = 0;
753                         } else {
754                                 len &= ((1 << 12) - 1);
755                         }
756
757                         if (len > *plen) {
758                                 len = 0;/* invalid length */
759                         }
760                         *plen = len;
761                         plen++;
762                         olen++;
763                 }
764
765                 if (((void *)td) == xfer->td_transfer_last) {
766                         break;
767                 }
768                 td = td->obj_next;
769         }
770
771         xfer->aframes = xfer->nframes;
772         ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
773 }
774
775 #ifdef USB_DEBUG
776 static const char *const
777         ohci_cc_strs[] =
778 {
779         "NO_ERROR",
780         "CRC",
781         "BIT_STUFFING",
782         "DATA_TOGGLE_MISMATCH",
783
784         "STALL",
785         "DEVICE_NOT_RESPONDING",
786         "PID_CHECK_FAILURE",
787         "UNEXPECTED_PID",
788
789         "DATA_OVERRUN",
790         "DATA_UNDERRUN",
791         "BUFFER_OVERRUN",
792         "BUFFER_UNDERRUN",
793
794         "reserved",
795         "reserved",
796         "NOT_ACCESSED",
797         "NOT_ACCESSED"
798 };
799
800 #endif
801
802 static usb_error_t
803 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
804 {
805         ohci_td_t *td;
806         ohci_td_t *td_alt_next;
807         uint32_t temp;
808         uint32_t phy_start;
809         uint32_t phy_end;
810         uint32_t td_flags;
811         uint16_t cc;
812
813         td = xfer->td_transfer_cache;
814         td_alt_next = td->alt_next;
815         td_flags = 0;
816
817         if (xfer->aframes != xfer->nframes) {
818                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
819         }
820         while (1) {
821
822                 usb_pc_cpu_invalidate(td->page_cache);
823                 phy_start = le32toh(td->td_cbp);
824                 td_flags = le32toh(td->td_flags);
825                 cc = OHCI_TD_GET_CC(td_flags);
826
827                 if (phy_start) {
828                         /*
829                          * short transfer - compute the number of remaining
830                          * bytes in the hardware buffer:
831                          */
832                         phy_end = le32toh(td->td_be);
833                         temp = (OHCI_PAGE(phy_start ^ phy_end) ?
834                             (OHCI_PAGE_SIZE + 1) : 0x0001);
835                         temp += OHCI_PAGE_OFFSET(phy_end);
836                         temp -= OHCI_PAGE_OFFSET(phy_start);
837
838                         if (temp > td->len) {
839                                 /* guard against corruption */
840                                 cc = OHCI_CC_STALL;
841                         } else if (xfer->aframes != xfer->nframes) {
842                                 /*
843                                  * Sum up total transfer length
844                                  * in "frlengths[]":
845                                  */
846                                 xfer->frlengths[xfer->aframes] += td->len - temp;
847                         }
848                 } else {
849                         if (xfer->aframes != xfer->nframes) {
850                                 /* transfer was complete */
851                                 xfer->frlengths[xfer->aframes] += td->len;
852                         }
853                 }
854                 /* Check for last transfer */
855                 if (((void *)td) == xfer->td_transfer_last) {
856                         td = NULL;
857                         break;
858                 }
859                 /* Check transfer status */
860                 if (cc) {
861                         /* the transfer is finished */
862                         td = NULL;
863                         break;
864                 }
865                 /* Check for short transfer */
866                 if (phy_start) {
867                         if (xfer->flags_int.short_frames_ok) {
868                                 /* follow alt next */
869                                 td = td->alt_next;
870                         } else {
871                                 /* the transfer is finished */
872                                 td = NULL;
873                         }
874                         break;
875                 }
876                 td = td->obj_next;
877
878                 if (td->alt_next != td_alt_next) {
879                         /* this USB frame is complete */
880                         break;
881                 }
882         }
883
884         /* update transfer cache */
885
886         xfer->td_transfer_cache = td;
887
888         DPRINTFN(16, "error cc=%d (%s)\n",
889             cc, ohci_cc_strs[cc]);
890
891         return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
892             (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
893 }
894
895 static void
896 ohci_non_isoc_done(struct usb_xfer *xfer)
897 {
898         usb_error_t err = 0;
899
900         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
901             xfer, xfer->endpoint);
902
903 #ifdef USB_DEBUG
904         if (ohcidebug > 10) {
905                 ohci_dump_tds(xfer->td_transfer_first);
906         }
907 #endif
908
909         /* reset scanner */
910
911         xfer->td_transfer_cache = xfer->td_transfer_first;
912
913         if (xfer->flags_int.control_xfr) {
914
915                 if (xfer->flags_int.control_hdr) {
916
917                         err = ohci_non_isoc_done_sub(xfer);
918                 }
919                 xfer->aframes = 1;
920
921                 if (xfer->td_transfer_cache == NULL) {
922                         goto done;
923                 }
924         }
925         while (xfer->aframes != xfer->nframes) {
926
927                 err = ohci_non_isoc_done_sub(xfer);
928                 xfer->aframes++;
929
930                 if (xfer->td_transfer_cache == NULL) {
931                         goto done;
932                 }
933         }
934
935         if (xfer->flags_int.control_xfr &&
936             !xfer->flags_int.control_act) {
937
938                 err = ohci_non_isoc_done_sub(xfer);
939         }
940 done:
941         ohci_device_done(xfer, err);
942 }
943
944 /*------------------------------------------------------------------------*
945  *      ohci_check_transfer_sub
946  *------------------------------------------------------------------------*/
947 static void
948 ohci_check_transfer_sub(struct usb_xfer *xfer)
949 {
950         ohci_td_t *td;
951         ohci_ed_t *ed;
952         uint32_t phy_start;
953         uint32_t td_flags;
954         uint32_t td_next;
955         uint16_t cc;
956
957         td = xfer->td_transfer_cache;
958
959         while (1) {
960
961                 usb_pc_cpu_invalidate(td->page_cache);
962                 phy_start = le32toh(td->td_cbp);
963                 td_flags = le32toh(td->td_flags);
964                 td_next = le32toh(td->td_next);
965
966                 /* Check for last transfer */
967                 if (((void *)td) == xfer->td_transfer_last) {
968                         /* the transfer is finished */
969                         td = NULL;
970                         break;
971                 }
972                 /* Check transfer status */
973                 cc = OHCI_TD_GET_CC(td_flags);
974                 if (cc) {
975                         /* the transfer is finished */
976                         td = NULL;
977                         break;
978                 }
979                 /*
980                  * Check if we reached the last packet
981                  * or if there is a short packet:
982                  */
983
984                 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
985                         /* follow alt next */
986                         td = td->alt_next;
987                         break;
988                 }
989                 td = td->obj_next;
990         }
991
992         /* update transfer cache */
993
994         xfer->td_transfer_cache = td;
995
996         if (td) {
997
998                 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
999
1000                 ed->ed_headp = td->td_self;
1001                 usb_pc_cpu_flush(ed->page_cache);
1002
1003                 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1004
1005                 /*
1006                  * Make sure that the OHCI re-scans the schedule by
1007                  * writing the BLF and CLF bits:
1008                  */
1009
1010                 if (xfer->xroot->udev->flags.self_suspended) {
1011                         /* nothing to do */
1012                 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1013                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1014
1015                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1016                 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1017                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1018
1019                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1020                 }
1021         }
1022 }
1023
1024 /*------------------------------------------------------------------------*
1025  *      ohci_check_transfer
1026  *
1027  * Return values:
1028  *    0: USB transfer is not finished
1029  * Else: USB transfer is finished
1030  *------------------------------------------------------------------------*/
1031 static uint8_t
1032 ohci_check_transfer(struct usb_xfer *xfer)
1033 {
1034         ohci_ed_t *ed;
1035         uint32_t ed_headp;
1036         uint32_t ed_tailp;
1037
1038         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1039
1040         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1041
1042         usb_pc_cpu_invalidate(ed->page_cache);
1043         ed_headp = le32toh(ed->ed_headp);
1044         ed_tailp = le32toh(ed->ed_tailp);
1045
1046         if ((ed_headp & OHCI_HALTED) ||
1047             (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1048                 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1049                         /* isochronous transfer */
1050                         ohci_isoc_done(xfer);
1051                 } else {
1052                         if (xfer->flags_int.short_frames_ok) {
1053                                 ohci_check_transfer_sub(xfer);
1054                                 if (xfer->td_transfer_cache) {
1055                                         /* not finished yet */
1056                                         return (0);
1057                                 }
1058                         }
1059                         /* store data-toggle */
1060                         if (ed_headp & OHCI_TOGGLECARRY) {
1061                                 xfer->endpoint->toggle_next = 1;
1062                         } else {
1063                                 xfer->endpoint->toggle_next = 0;
1064                         }
1065
1066                         /* non-isochronous transfer */
1067                         ohci_non_isoc_done(xfer);
1068                 }
1069                 return (1);
1070         }
1071         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1072         return (0);
1073 }
1074
1075 static void
1076 ohci_rhsc_enable(ohci_softc_t *sc)
1077 {
1078         DPRINTFN(5, "\n");
1079
1080         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1081
1082         sc->sc_eintrs |= OHCI_RHSC;
1083         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1084
1085         /* acknowledge any RHSC interrupt */
1086         OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1087
1088         ohci_root_intr(sc);
1089 }
1090
1091 static void
1092 ohci_interrupt_poll(ohci_softc_t *sc)
1093 {
1094         struct usb_xfer *xfer;
1095
1096 repeat:
1097         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1098                 /*
1099                  * check if transfer is transferred
1100                  */
1101                 if (ohci_check_transfer(xfer)) {
1102                         /* queue has been modified */
1103                         goto repeat;
1104                 }
1105         }
1106 }
1107
1108 /*------------------------------------------------------------------------*
1109  *      ohci_interrupt - OHCI interrupt handler
1110  *
1111  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1112  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1113  * is present !
1114  *------------------------------------------------------------------------*/
1115 void
1116 ohci_interrupt(ohci_softc_t *sc)
1117 {
1118         struct ohci_hcca *hcca;
1119         uint32_t status;
1120         uint32_t done;
1121
1122         USB_BUS_LOCK(&sc->sc_bus);
1123
1124         hcca = ohci_get_hcca(sc);
1125
1126         DPRINTFN(16, "real interrupt\n");
1127
1128 #ifdef USB_DEBUG
1129         if (ohcidebug > 15) {
1130                 ohci_dumpregs(sc);
1131         }
1132 #endif
1133
1134         done = le32toh(hcca->hcca_done_head);
1135
1136         /*
1137          * The LSb of done is used to inform the HC Driver that an interrupt
1138          * condition exists for both the Done list and for another event
1139          * recorded in HcInterruptStatus. On an interrupt from the HC, the
1140          * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1141          * the interrupt was caused by other than the HccaDoneHead update
1142          * and the HcInterruptStatus register needs to be accessed to
1143          * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1144          * then a Done list update interrupt is indicated and if the LSb of
1145          * done is nonzero, then an additional interrupt event is indicated
1146          * and HcInterruptStatus should be checked to determine its cause.
1147          */
1148         if (done != 0) {
1149                 status = 0;
1150
1151                 if (done & ~OHCI_DONE_INTRS) {
1152                         status |= OHCI_WDH;
1153                 }
1154                 if (done & OHCI_DONE_INTRS) {
1155                         status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1156                 }
1157                 hcca->hcca_done_head = 0;
1158
1159                 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1160         } else {
1161                 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1162         }
1163
1164         status &= ~OHCI_MIE;
1165         if (status == 0) {
1166                 /*
1167                  * nothing to be done (PCI shared
1168                  * interrupt)
1169                  */
1170                 goto done;
1171         }
1172         OWRITE4(sc, OHCI_INTERRUPT_STATUS, status);     /* Acknowledge */
1173
1174         status &= sc->sc_eintrs;
1175         if (status == 0) {
1176                 goto done;
1177         }
1178         if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1179 #if 0
1180                 if (status & OHCI_SO) {
1181                         /* XXX do what */
1182                 }
1183 #endif
1184                 if (status & OHCI_RD) {
1185                         printf("%s: resume detect\n", __FUNCTION__);
1186                         /* XXX process resume detect */
1187                 }
1188                 if (status & OHCI_UE) {
1189                         printf("%s: unrecoverable error, "
1190                             "controller halted\n", __FUNCTION__);
1191                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1192                         /* XXX what else */
1193                 }
1194                 if (status & OHCI_RHSC) {
1195                         /*
1196                          * Disable RHSC interrupt for now, because it will be
1197                          * on until the port has been reset.
1198                          */
1199                         sc->sc_eintrs &= ~OHCI_RHSC;
1200                         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1201
1202                         ohci_root_intr(sc);
1203
1204                         /* do not allow RHSC interrupts > 1 per second */
1205                         usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1206                             (void *)&ohci_rhsc_enable, sc);
1207                 }
1208         }
1209         status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1210         if (status != 0) {
1211                 /* Block unprocessed interrupts. XXX */
1212                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1213                 sc->sc_eintrs &= ~status;
1214                 printf("%s: blocking intrs 0x%x\n",
1215                     __FUNCTION__, status);
1216         }
1217         /* poll all the USB transfers */
1218         ohci_interrupt_poll(sc);
1219
1220 done:
1221         USB_BUS_UNLOCK(&sc->sc_bus);
1222 }
1223
1224 /*
1225  * called when a request does not complete
1226  */
1227 static void
1228 ohci_timeout(void *arg)
1229 {
1230         struct usb_xfer *xfer = arg;
1231
1232         DPRINTF("xfer=%p\n", xfer);
1233
1234         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1235
1236         /* transfer is transferred */
1237         ohci_device_done(xfer, USB_ERR_TIMEOUT);
1238 }
1239
1240 static void
1241 ohci_do_poll(struct usb_bus *bus)
1242 {
1243         struct ohci_softc *sc = OHCI_BUS2SC(bus);
1244
1245         USB_BUS_LOCK(&sc->sc_bus);
1246         ohci_interrupt_poll(sc);
1247         USB_BUS_UNLOCK(&sc->sc_bus);
1248 }
1249
1250 static void
1251 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1252 {
1253         struct usb_page_search buf_res;
1254         ohci_td_t *td;
1255         ohci_td_t *td_next;
1256         ohci_td_t *td_alt_next;
1257         uint32_t buf_offset;
1258         uint32_t average;
1259         uint32_t len_old;
1260         uint8_t shortpkt_old;
1261         uint8_t precompute;
1262
1263         td_alt_next = NULL;
1264         buf_offset = 0;
1265         shortpkt_old = temp->shortpkt;
1266         len_old = temp->len;
1267         precompute = 1;
1268
1269         /* software is used to detect short incoming transfers */
1270
1271         if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1272                 temp->td_flags |= htole32(OHCI_TD_R);
1273         } else {
1274                 temp->td_flags &= ~htole32(OHCI_TD_R);
1275         }
1276
1277 restart:
1278
1279         td = temp->td;
1280         td_next = temp->td_next;
1281
1282         while (1) {
1283
1284                 if (temp->len == 0) {
1285
1286                         if (temp->shortpkt) {
1287                                 break;
1288                         }
1289                         /* send a Zero Length Packet, ZLP, last */
1290
1291                         temp->shortpkt = 1;
1292                         average = 0;
1293
1294                 } else {
1295
1296                         average = temp->average;
1297
1298                         if (temp->len < average) {
1299                                 if (temp->len % temp->max_frame_size) {
1300                                         temp->shortpkt = 1;
1301                                 }
1302                                 average = temp->len;
1303                         }
1304                 }
1305
1306                 if (td_next == NULL) {
1307                         panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1308                 }
1309                 /* get next TD */
1310
1311                 td = td_next;
1312                 td_next = td->obj_next;
1313
1314                 /* check if we are pre-computing */
1315
1316                 if (precompute) {
1317
1318                         /* update remaining length */
1319
1320                         temp->len -= average;
1321
1322                         continue;
1323                 }
1324                 /* fill out current TD */
1325                 td->td_flags = temp->td_flags;
1326
1327                 /* the next TD uses TOGGLE_CARRY */
1328                 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1329
1330                 if (average == 0) {
1331                         /*
1332                          * The buffer start and end phys addresses should be
1333                          * 0x0 for a zero length packet.
1334                          */
1335                         td->td_cbp = 0;
1336                         td->td_be = 0;
1337                         td->len = 0;
1338
1339                 } else {
1340
1341                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1342                         td->td_cbp = htole32(buf_res.physaddr);
1343                         buf_offset += (average - 1);
1344
1345                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1346                         td->td_be = htole32(buf_res.physaddr);
1347                         buf_offset++;
1348
1349                         td->len = average;
1350
1351                         /* update remaining length */
1352
1353                         temp->len -= average;
1354                 }
1355
1356                 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1357                         /* we need to receive these frames one by one ! */
1358                         td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1359                         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1360                         td->td_next = htole32(OHCI_TD_NEXT_END);
1361                 } else {
1362                         if (td_next) {
1363                                 /* link the current TD with the next one */
1364                                 td->td_next = td_next->td_self;
1365                         }
1366                 }
1367
1368                 td->alt_next = td_alt_next;
1369
1370                 usb_pc_cpu_flush(td->page_cache);
1371         }
1372
1373         if (precompute) {
1374                 precompute = 0;
1375
1376                 /* setup alt next pointer, if any */
1377                 if (temp->last_frame) {
1378                         /* no alternate next */
1379                         td_alt_next = NULL;
1380                 } else {
1381                         /* we use this field internally */
1382                         td_alt_next = td_next;
1383                 }
1384
1385                 /* restore */
1386                 temp->shortpkt = shortpkt_old;
1387                 temp->len = len_old;
1388                 goto restart;
1389         }
1390         temp->td = td;
1391         temp->td_next = td_next;
1392 }
1393
1394 static void
1395 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1396 {
1397         struct ohci_std_temp temp;
1398         const struct usb_pipe_methods *methods;
1399         ohci_ed_t *ed;
1400         ohci_td_t *td;
1401         uint32_t ed_flags;
1402         uint32_t x;
1403
1404         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1405             xfer->address, UE_GET_ADDR(xfer->endpointno),
1406             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1407
1408         temp.average = xfer->max_hc_frame_size;
1409         temp.max_frame_size = xfer->max_frame_size;
1410
1411         /* toggle the DMA set we are using */
1412         xfer->flags_int.curr_dma_set ^= 1;
1413
1414         /* get next DMA set */
1415         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1416
1417         xfer->td_transfer_first = td;
1418         xfer->td_transfer_cache = td;
1419
1420         temp.td = NULL;
1421         temp.td_next = td;
1422         temp.last_frame = 0;
1423         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1424
1425         methods = xfer->endpoint->methods;
1426
1427         /* check if we should prepend a setup message */
1428
1429         if (xfer->flags_int.control_xfr) {
1430                 if (xfer->flags_int.control_hdr) {
1431
1432                         temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1433                             OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1434
1435                         temp.len = xfer->frlengths[0];
1436                         temp.pc = xfer->frbuffers + 0;
1437                         temp.shortpkt = temp.len ? 1 : 0;
1438                         /* check for last frame */
1439                         if (xfer->nframes == 1) {
1440                                 /* no STATUS stage yet, SETUP is last */
1441                                 if (xfer->flags_int.control_act) {
1442                                         temp.last_frame = 1;
1443                                         temp.setup_alt_next = 0;
1444                                 }
1445                         }
1446                         ohci_setup_standard_chain_sub(&temp);
1447
1448                         /*
1449                          * XXX assume that the setup message is
1450                          * contained within one USB packet:
1451                          */
1452                         xfer->endpoint->toggle_next = 1;
1453                 }
1454                 x = 1;
1455         } else {
1456                 x = 0;
1457         }
1458         temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1459
1460         /* set data toggle */
1461
1462         if (xfer->endpoint->toggle_next) {
1463                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1464         } else {
1465                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1466         }
1467
1468         /* set endpoint direction */
1469
1470         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1471                 temp.td_flags |= htole32(OHCI_TD_IN);
1472         } else {
1473                 temp.td_flags |= htole32(OHCI_TD_OUT);
1474         }
1475
1476         while (x != xfer->nframes) {
1477
1478                 /* DATA0 / DATA1 message */
1479
1480                 temp.len = xfer->frlengths[x];
1481                 temp.pc = xfer->frbuffers + x;
1482
1483                 x++;
1484
1485                 if (x == xfer->nframes) {
1486                         if (xfer->flags_int.control_xfr) {
1487                                 /* no STATUS stage yet, DATA is last */
1488                                 if (xfer->flags_int.control_act) {
1489                                         temp.last_frame = 1;
1490                                         temp.setup_alt_next = 0;
1491                                 }
1492                         } else {
1493                                 temp.last_frame = 1;
1494                                 temp.setup_alt_next = 0;
1495                         }
1496                 }
1497                 if (temp.len == 0) {
1498
1499                         /* make sure that we send an USB packet */
1500
1501                         temp.shortpkt = 0;
1502
1503                 } else {
1504
1505                         /* regular data transfer */
1506
1507                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1508                 }
1509
1510                 ohci_setup_standard_chain_sub(&temp);
1511         }
1512
1513         /* check if we should append a status stage */
1514
1515         if (xfer->flags_int.control_xfr &&
1516             !xfer->flags_int.control_act) {
1517
1518                 /*
1519                  * Send a DATA1 message and invert the current endpoint
1520                  * direction.
1521                  */
1522
1523                 /* set endpoint direction and data toggle */
1524
1525                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1526                         temp.td_flags = htole32(OHCI_TD_OUT |
1527                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1528                 } else {
1529                         temp.td_flags = htole32(OHCI_TD_IN |
1530                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1531                 }
1532
1533                 temp.len = 0;
1534                 temp.pc = NULL;
1535                 temp.shortpkt = 0;
1536                 temp.last_frame = 1;
1537                 temp.setup_alt_next = 0;
1538
1539                 ohci_setup_standard_chain_sub(&temp);
1540         }
1541         td = temp.td;
1542
1543         /* Ensure that last TD is terminating: */
1544         td->td_next = htole32(OHCI_TD_NEXT_END);
1545         td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1546         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1547
1548         usb_pc_cpu_flush(td->page_cache);
1549
1550         /* must have at least one frame! */
1551
1552         xfer->td_transfer_last = td;
1553
1554 #ifdef USB_DEBUG
1555         if (ohcidebug > 8) {
1556                 DPRINTF("nexttog=%d; data before transfer:\n",
1557                     xfer->endpoint->toggle_next);
1558                 ohci_dump_tds(xfer->td_transfer_first);
1559         }
1560 #endif
1561
1562         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1563
1564         ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1565             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1566             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1567
1568         ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1569
1570         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1571                 ed_flags |= OHCI_ED_SPEED;
1572         }
1573         ed->ed_flags = htole32(ed_flags);
1574
1575         td = xfer->td_transfer_first;
1576
1577         ed->ed_headp = td->td_self;
1578
1579         if (xfer->xroot->udev->flags.self_suspended == 0) {
1580                 /* the append function will flush the endpoint descriptor */
1581                 OHCI_APPEND_QH(ed, *ed_last);
1582
1583                 if (methods == &ohci_device_bulk_methods) {
1584                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1585
1586                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1587                 }
1588                 if (methods == &ohci_device_ctrl_methods) {
1589                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1590
1591                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1592                 }
1593         } else {
1594                 usb_pc_cpu_flush(ed->page_cache);
1595         }
1596 }
1597
1598 static void
1599 ohci_root_intr(ohci_softc_t *sc)
1600 {
1601         uint32_t hstatus;
1602         uint16_t i;
1603         uint16_t m;
1604
1605         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1606
1607         /* clear any old interrupt data */
1608         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1609
1610         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1611         DPRINTF("sc=%p hstatus=0x%08x\n",
1612             sc, hstatus);
1613
1614         /* set bits */
1615         m = (sc->sc_noport + 1);
1616         if (m > (8 * sizeof(sc->sc_hub_idata))) {
1617                 m = (8 * sizeof(sc->sc_hub_idata));
1618         }
1619         for (i = 1; i < m; i++) {
1620                 /* pick out CHANGE bits from the status register */
1621                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1622                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1623                         DPRINTF("port %d changed\n", i);
1624                 }
1625         }
1626
1627         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1628             sizeof(sc->sc_hub_idata));
1629 }
1630
1631 /* NOTE: "done" can be run two times in a row,
1632  * from close and from interrupt
1633  */
1634 static void
1635 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1636 {
1637         const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1638         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1639         ohci_ed_t *ed;
1640
1641         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1642
1643
1644         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1645             xfer, xfer->endpoint, error);
1646
1647         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1648         if (ed) {
1649                 usb_pc_cpu_invalidate(ed->page_cache);
1650         }
1651         if (methods == &ohci_device_bulk_methods) {
1652                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1653         }
1654         if (methods == &ohci_device_ctrl_methods) {
1655                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1656         }
1657         if (methods == &ohci_device_intr_methods) {
1658                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1659         }
1660         if (methods == &ohci_device_isoc_methods) {
1661                 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1662         }
1663         xfer->td_transfer_first = NULL;
1664         xfer->td_transfer_last = NULL;
1665
1666         /* dequeue transfer and start next transfer */
1667         usbd_transfer_done(xfer, error);
1668 }
1669
1670 /*------------------------------------------------------------------------*
1671  * ohci bulk support
1672  *------------------------------------------------------------------------*/
1673 static void
1674 ohci_device_bulk_open(struct usb_xfer *xfer)
1675 {
1676         return;
1677 }
1678
1679 static void
1680 ohci_device_bulk_close(struct usb_xfer *xfer)
1681 {
1682         ohci_device_done(xfer, USB_ERR_CANCELLED);
1683 }
1684
1685 static void
1686 ohci_device_bulk_enter(struct usb_xfer *xfer)
1687 {
1688         return;
1689 }
1690
1691 static void
1692 ohci_device_bulk_start(struct usb_xfer *xfer)
1693 {
1694         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1695
1696         /* setup TD's and QH */
1697         ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1698
1699         /* put transfer on interrupt queue */
1700         ohci_transfer_intr_enqueue(xfer);
1701 }
1702
1703 static const struct usb_pipe_methods ohci_device_bulk_methods =
1704 {
1705         .open = ohci_device_bulk_open,
1706         .close = ohci_device_bulk_close,
1707         .enter = ohci_device_bulk_enter,
1708         .start = ohci_device_bulk_start,
1709 };
1710
1711 /*------------------------------------------------------------------------*
1712  * ohci control support
1713  *------------------------------------------------------------------------*/
1714 static void
1715 ohci_device_ctrl_open(struct usb_xfer *xfer)
1716 {
1717         return;
1718 }
1719
1720 static void
1721 ohci_device_ctrl_close(struct usb_xfer *xfer)
1722 {
1723         ohci_device_done(xfer, USB_ERR_CANCELLED);
1724 }
1725
1726 static void
1727 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1728 {
1729         return;
1730 }
1731
1732 static void
1733 ohci_device_ctrl_start(struct usb_xfer *xfer)
1734 {
1735         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1736
1737         /* setup TD's and QH */
1738         ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1739
1740         /* put transfer on interrupt queue */
1741         ohci_transfer_intr_enqueue(xfer);
1742 }
1743
1744 static const struct usb_pipe_methods ohci_device_ctrl_methods =
1745 {
1746         .open = ohci_device_ctrl_open,
1747         .close = ohci_device_ctrl_close,
1748         .enter = ohci_device_ctrl_enter,
1749         .start = ohci_device_ctrl_start,
1750 };
1751
1752 /*------------------------------------------------------------------------*
1753  * ohci interrupt support
1754  *------------------------------------------------------------------------*/
1755 static void
1756 ohci_device_intr_open(struct usb_xfer *xfer)
1757 {
1758         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1759         uint16_t best;
1760         uint16_t bit;
1761         uint16_t x;
1762
1763         best = 0;
1764         bit = OHCI_NO_EDS / 2;
1765         while (bit) {
1766                 if (xfer->interval >= bit) {
1767                         x = bit;
1768                         best = bit;
1769                         while (x & bit) {
1770                                 if (sc->sc_intr_stat[x] <
1771                                     sc->sc_intr_stat[best]) {
1772                                         best = x;
1773                                 }
1774                                 x++;
1775                         }
1776                         break;
1777                 }
1778                 bit >>= 1;
1779         }
1780
1781         sc->sc_intr_stat[best]++;
1782         xfer->qh_pos = best;
1783
1784         DPRINTFN(3, "best=%d interval=%d\n",
1785             best, xfer->interval);
1786 }
1787
1788 static void
1789 ohci_device_intr_close(struct usb_xfer *xfer)
1790 {
1791         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1792
1793         sc->sc_intr_stat[xfer->qh_pos]--;
1794
1795         ohci_device_done(xfer, USB_ERR_CANCELLED);
1796 }
1797
1798 static void
1799 ohci_device_intr_enter(struct usb_xfer *xfer)
1800 {
1801         return;
1802 }
1803
1804 static void
1805 ohci_device_intr_start(struct usb_xfer *xfer)
1806 {
1807         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1808
1809         /* setup TD's and QH */
1810         ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1811
1812         /* put transfer on interrupt queue */
1813         ohci_transfer_intr_enqueue(xfer);
1814 }
1815
1816 static const struct usb_pipe_methods ohci_device_intr_methods =
1817 {
1818         .open = ohci_device_intr_open,
1819         .close = ohci_device_intr_close,
1820         .enter = ohci_device_intr_enter,
1821         .start = ohci_device_intr_start,
1822 };
1823
1824 /*------------------------------------------------------------------------*
1825  * ohci isochronous support
1826  *------------------------------------------------------------------------*/
1827 static void
1828 ohci_device_isoc_open(struct usb_xfer *xfer)
1829 {
1830         return;
1831 }
1832
1833 static void
1834 ohci_device_isoc_close(struct usb_xfer *xfer)
1835 {
1836         /**/
1837         ohci_device_done(xfer, USB_ERR_CANCELLED);
1838 }
1839
1840 static void
1841 ohci_device_isoc_enter(struct usb_xfer *xfer)
1842 {
1843         struct usb_page_search buf_res;
1844         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1845         struct ohci_hcca *hcca;
1846         uint32_t buf_offset;
1847         uint32_t nframes;
1848         uint32_t ed_flags;
1849         uint32_t *plen;
1850         uint16_t itd_offset[OHCI_ITD_NOFFSET];
1851         uint16_t length;
1852         uint8_t ncur;
1853         ohci_itd_t *td;
1854         ohci_itd_t *td_last = NULL;
1855         ohci_ed_t *ed;
1856
1857         hcca = ohci_get_hcca(sc);
1858
1859         nframes = le32toh(hcca->hcca_frame_number);
1860
1861         DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1862             xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1863
1864         if ((xfer->endpoint->is_synced == 0) ||
1865             (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1866             (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1867                 /*
1868                  * If there is data underflow or the pipe queue is empty we
1869                  * schedule the transfer a few frames ahead of the current
1870                  * frame position. Else two isochronous transfers might
1871                  * overlap.
1872                  */
1873                 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1874                 xfer->endpoint->is_synced = 1;
1875                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1876         }
1877         /*
1878          * compute how many milliseconds the insertion is ahead of the
1879          * current frame position:
1880          */
1881         buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1882
1883         /*
1884          * pre-compute when the isochronous transfer will be finished:
1885          */
1886         xfer->isoc_time_complete =
1887             (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1888             xfer->nframes);
1889
1890         /* get the real number of frames */
1891
1892         nframes = xfer->nframes;
1893
1894         buf_offset = 0;
1895
1896         plen = xfer->frlengths;
1897
1898         /* toggle the DMA set we are using */
1899         xfer->flags_int.curr_dma_set ^= 1;
1900
1901         /* get next DMA set */
1902         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1903
1904         xfer->td_transfer_first = td;
1905
1906         ncur = 0;
1907         length = 0;
1908
1909         while (nframes--) {
1910                 if (td == NULL) {
1911                         panic("%s:%d: out of TD's\n",
1912                             __FUNCTION__, __LINE__);
1913                 }
1914                 itd_offset[ncur] = length;
1915                 buf_offset += *plen;
1916                 length += *plen;
1917                 plen++;
1918                 ncur++;
1919
1920                 if (                    /* check if the ITD is full */
1921                     (ncur == OHCI_ITD_NOFFSET) ||
1922                 /* check if we have put more than 4K into the ITD */
1923                     (length & 0xF000) ||
1924                 /* check if it is the last frame */
1925                     (nframes == 0)) {
1926
1927                         /* fill current ITD */
1928                         td->itd_flags = htole32(
1929                             OHCI_ITD_NOCC |
1930                             OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1931                             OHCI_ITD_NOINTR |
1932                             OHCI_ITD_SET_FC(ncur));
1933
1934                         td->frames = ncur;
1935                         xfer->endpoint->isoc_next += ncur;
1936
1937                         if (length == 0) {
1938                                 /* all zero */
1939                                 td->itd_bp0 = 0;
1940                                 td->itd_be = ~0;
1941
1942                                 while (ncur--) {
1943                                         td->itd_offset[ncur] =
1944                                             htole16(OHCI_ITD_MK_OFFS(0));
1945                                 }
1946                         } else {
1947                                 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1948                                 length = OHCI_PAGE_MASK(buf_res.physaddr);
1949                                 buf_res.physaddr =
1950                                     OHCI_PAGE(buf_res.physaddr);
1951                                 td->itd_bp0 = htole32(buf_res.physaddr);
1952                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1953                                 td->itd_be = htole32(buf_res.physaddr);
1954
1955                                 while (ncur--) {
1956                                         itd_offset[ncur] += length;
1957                                         itd_offset[ncur] =
1958                                             OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1959                                         td->itd_offset[ncur] =
1960                                             htole16(itd_offset[ncur]);
1961                                 }
1962                         }
1963                         ncur = 0;
1964                         length = 0;
1965                         td_last = td;
1966                         td = td->obj_next;
1967
1968                         if (td) {
1969                                 /* link the last TD with the next one */
1970                                 td_last->itd_next = td->itd_self;
1971                         }
1972                         usb_pc_cpu_flush(td_last->page_cache);
1973                 }
1974         }
1975
1976         /* update the last TD */
1977         td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1978         td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1979         td_last->itd_next = 0;
1980
1981         usb_pc_cpu_flush(td_last->page_cache);
1982
1983         xfer->td_transfer_last = td_last;
1984
1985 #ifdef USB_DEBUG
1986         if (ohcidebug > 8) {
1987                 DPRINTF("data before transfer:\n");
1988                 ohci_dump_itds(xfer->td_transfer_first);
1989         }
1990 #endif
1991         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1992
1993         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1994                 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1995         else
1996                 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1997
1998         ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1999             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
2000             OHCI_ED_SET_MAXP(xfer->max_frame_size));
2001
2002         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
2003                 ed_flags |= OHCI_ED_SPEED;
2004         }
2005         ed->ed_flags = htole32(ed_flags);
2006
2007         td = xfer->td_transfer_first;
2008
2009         ed->ed_headp = td->itd_self;
2010
2011         /* isochronous transfers are not affected by suspend / resume */
2012         /* the append function will flush the endpoint descriptor */
2013
2014         OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2015 }
2016
2017 static void
2018 ohci_device_isoc_start(struct usb_xfer *xfer)
2019 {
2020         /* put transfer on interrupt queue */
2021         ohci_transfer_intr_enqueue(xfer);
2022 }
2023
2024 static const struct usb_pipe_methods ohci_device_isoc_methods =
2025 {
2026         .open = ohci_device_isoc_open,
2027         .close = ohci_device_isoc_close,
2028         .enter = ohci_device_isoc_enter,
2029         .start = ohci_device_isoc_start,
2030 };
2031
2032 /*------------------------------------------------------------------------*
2033  * ohci root control support
2034  *------------------------------------------------------------------------*
2035  * Simulate a hardware hub by handling all the necessary requests.
2036  *------------------------------------------------------------------------*/
2037
2038 static const
2039 struct usb_device_descriptor ohci_devd =
2040 {
2041         sizeof(struct usb_device_descriptor),
2042         UDESC_DEVICE,                   /* type */
2043         {0x00, 0x01},                   /* USB version */
2044         UDCLASS_HUB,                    /* class */
2045         UDSUBCLASS_HUB,                 /* subclass */
2046         UDPROTO_FSHUB,                  /* protocol */
2047         64,                             /* max packet */
2048         {0}, {0}, {0x00, 0x01},         /* device id */
2049         1, 2, 0,                        /* string indexes */
2050         1                               /* # of configurations */
2051 };
2052
2053 static const
2054 struct ohci_config_desc ohci_confd =
2055 {
2056         .confd = {
2057                 .bLength = sizeof(struct usb_config_descriptor),
2058                 .bDescriptorType = UDESC_CONFIG,
2059                 .wTotalLength[0] = sizeof(ohci_confd),
2060                 .bNumInterface = 1,
2061                 .bConfigurationValue = 1,
2062                 .iConfiguration = 0,
2063                 .bmAttributes = UC_SELF_POWERED,
2064                 .bMaxPower = 0,         /* max power */
2065         },
2066         .ifcd = {
2067                 .bLength = sizeof(struct usb_interface_descriptor),
2068                 .bDescriptorType = UDESC_INTERFACE,
2069                 .bNumEndpoints = 1,
2070                 .bInterfaceClass = UICLASS_HUB,
2071                 .bInterfaceSubClass = UISUBCLASS_HUB,
2072                 .bInterfaceProtocol = 0,
2073         },
2074         .endpd = {
2075                 .bLength = sizeof(struct usb_endpoint_descriptor),
2076                 .bDescriptorType = UDESC_ENDPOINT,
2077                 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2078                 .bmAttributes = UE_INTERRUPT,
2079                 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2080                 .bInterval = 255,
2081         },
2082 };
2083
2084 static const
2085 struct usb_hub_descriptor ohci_hubd =
2086 {
2087         .bDescLength = 0,       /* dynamic length */
2088         .bDescriptorType = UDESC_HUB,
2089 };
2090
2091 static usb_error_t
2092 ohci_roothub_exec(struct usb_device *udev,
2093     struct usb_device_request *req, const void **pptr, uint16_t *plength)
2094 {
2095         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2096         const void *ptr;
2097         const char *str_ptr;
2098         uint32_t port;
2099         uint32_t v;
2100         uint16_t len;
2101         uint16_t value;
2102         uint16_t index;
2103         uint8_t l;
2104         usb_error_t err;
2105
2106         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2107
2108         /* buffer reset */
2109         ptr = (const void *)&sc->sc_hub_desc.temp;
2110         len = 0;
2111         err = 0;
2112
2113         value = UGETW(req->wValue);
2114         index = UGETW(req->wIndex);
2115
2116         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2117             "wValue=0x%04x wIndex=0x%04x\n",
2118             req->bmRequestType, req->bRequest,
2119             UGETW(req->wLength), value, index);
2120
2121 #define C(x,y) ((x) | ((y) << 8))
2122         switch (C(req->bRequest, req->bmRequestType)) {
2123         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2124         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2125         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2126                 /*
2127                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2128                  * for the integrated root hub.
2129                  */
2130                 break;
2131         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2132                 len = 1;
2133                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2134                 break;
2135         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2136                 switch (value >> 8) {
2137                 case UDESC_DEVICE:
2138                         if ((value & 0xff) != 0) {
2139                                 err = USB_ERR_IOERROR;
2140                                 goto done;
2141                         }
2142                         len = sizeof(ohci_devd);
2143                         ptr = (const void *)&ohci_devd;
2144                         break;
2145
2146                 case UDESC_CONFIG:
2147                         if ((value & 0xff) != 0) {
2148                                 err = USB_ERR_IOERROR;
2149                                 goto done;
2150                         }
2151                         len = sizeof(ohci_confd);
2152                         ptr = (const void *)&ohci_confd;
2153                         break;
2154
2155                 case UDESC_STRING:
2156                         switch (value & 0xff) {
2157                         case 0: /* Language table */
2158                                 str_ptr = "\001";
2159                                 break;
2160
2161                         case 1: /* Vendor */
2162                                 str_ptr = sc->sc_vendor;
2163                                 break;
2164
2165                         case 2: /* Product */
2166                                 str_ptr = "OHCI root HUB";
2167                                 break;
2168
2169                         default:
2170                                 str_ptr = "";
2171                                 break;
2172                         }
2173
2174                         len = usb_make_str_desc(
2175                             sc->sc_hub_desc.temp,
2176                             sizeof(sc->sc_hub_desc.temp),
2177                             str_ptr);
2178                         break;
2179
2180                 default:
2181                         err = USB_ERR_IOERROR;
2182                         goto done;
2183                 }
2184                 break;
2185         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2186                 len = 1;
2187                 sc->sc_hub_desc.temp[0] = 0;
2188                 break;
2189         case C(UR_GET_STATUS, UT_READ_DEVICE):
2190                 len = 2;
2191                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2192                 break;
2193         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2194         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2195                 len = 2;
2196                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2197                 break;
2198         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2199                 if (value >= OHCI_MAX_DEVICES) {
2200                         err = USB_ERR_IOERROR;
2201                         goto done;
2202                 }
2203                 sc->sc_addr = value;
2204                 break;
2205         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2206                 if ((value != 0) && (value != 1)) {
2207                         err = USB_ERR_IOERROR;
2208                         goto done;
2209                 }
2210                 sc->sc_conf = value;
2211                 break;
2212         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2213                 break;
2214         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2215         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2216         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2217                 err = USB_ERR_IOERROR;
2218                 goto done;
2219         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2220                 break;
2221         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2222                 break;
2223                 /* Hub requests */
2224         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2225                 break;
2226         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2227                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2228                     "port=%d feature=%d\n",
2229                     index, value);
2230                 if ((index < 1) ||
2231                     (index > sc->sc_noport)) {
2232                         err = USB_ERR_IOERROR;
2233                         goto done;
2234                 }
2235                 port = OHCI_RH_PORT_STATUS(index);
2236                 switch (value) {
2237                 case UHF_PORT_ENABLE:
2238                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2239                         break;
2240                 case UHF_PORT_SUSPEND:
2241                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2242                         break;
2243                 case UHF_PORT_POWER:
2244                         /* Yes, writing to the LOW_SPEED bit clears power. */
2245                         OWRITE4(sc, port, UPS_LOW_SPEED);
2246                         break;
2247                 case UHF_C_PORT_CONNECTION:
2248                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2249                         break;
2250                 case UHF_C_PORT_ENABLE:
2251                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2252                         break;
2253                 case UHF_C_PORT_SUSPEND:
2254                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2255                         break;
2256                 case UHF_C_PORT_OVER_CURRENT:
2257                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2258                         break;
2259                 case UHF_C_PORT_RESET:
2260                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2261                         break;
2262                 default:
2263                         err = USB_ERR_IOERROR;
2264                         goto done;
2265                 }
2266                 switch (value) {
2267                 case UHF_C_PORT_CONNECTION:
2268                 case UHF_C_PORT_ENABLE:
2269                 case UHF_C_PORT_SUSPEND:
2270                 case UHF_C_PORT_OVER_CURRENT:
2271                 case UHF_C_PORT_RESET:
2272                         /* enable RHSC interrupt if condition is cleared. */
2273                         if ((OREAD4(sc, port) >> 16) == 0)
2274                                 ohci_rhsc_enable(sc);
2275                         break;
2276                 default:
2277                         break;
2278                 }
2279                 break;
2280         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2281                 if ((value & 0xff) != 0) {
2282                         err = USB_ERR_IOERROR;
2283                         goto done;
2284                 }
2285                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2286
2287                 sc->sc_hub_desc.hubd = ohci_hubd;
2288                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2289                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2290                     (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2291                     v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2292                 /* XXX overcurrent */
2293                     );
2294                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2295                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2296
2297                 for (l = 0; l < sc->sc_noport; l++) {
2298                         if (v & 1) {
2299                                 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2300                         }
2301                         v >>= 1;
2302                 }
2303                 sc->sc_hub_desc.hubd.bDescLength =
2304                     8 + ((sc->sc_noport + 7) / 8);
2305                 len = sc->sc_hub_desc.hubd.bDescLength;
2306                 break;
2307
2308         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2309                 len = 16;
2310                 memset(sc->sc_hub_desc.temp, 0, 16);
2311                 break;
2312         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2313                 DPRINTFN(9, "get port status i=%d\n",
2314                     index);
2315                 if ((index < 1) ||
2316                     (index > sc->sc_noport)) {
2317                         err = USB_ERR_IOERROR;
2318                         goto done;
2319                 }
2320                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2321                 DPRINTFN(9, "port status=0x%04x\n", v);
2322                 v &= ~UPS_PORT_MODE_DEVICE;     /* force host mode */
2323                 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2324                 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2325                 len = sizeof(sc->sc_hub_desc.ps);
2326                 break;
2327         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2328                 err = USB_ERR_IOERROR;
2329                 goto done;
2330         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2331                 break;
2332         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2333                 if ((index < 1) ||
2334                     (index > sc->sc_noport)) {
2335                         err = USB_ERR_IOERROR;
2336                         goto done;
2337                 }
2338                 port = OHCI_RH_PORT_STATUS(index);
2339                 switch (value) {
2340                 case UHF_PORT_ENABLE:
2341                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2342                         break;
2343                 case UHF_PORT_SUSPEND:
2344                         OWRITE4(sc, port, UPS_SUSPEND);
2345                         break;
2346                 case UHF_PORT_RESET:
2347                         DPRINTFN(6, "reset port %d\n", index);
2348                         OWRITE4(sc, port, UPS_RESET);
2349                         for (v = 0;; v++) {
2350                                 if (v < 12) {
2351                                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
2352                                             USB_MS_TO_TICKS(usb_port_root_reset_delay));
2353
2354                                         if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2355                                                 break;
2356                                         }
2357                                 } else {
2358                                         err = USB_ERR_TIMEOUT;
2359                                         goto done;
2360                                 }
2361                         }
2362                         DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2363                             index, OREAD4(sc, port));
2364                         break;
2365                 case UHF_PORT_POWER:
2366                         DPRINTFN(3, "set port power %d\n", index);
2367                         OWRITE4(sc, port, UPS_PORT_POWER);
2368                         break;
2369                 default:
2370                         err = USB_ERR_IOERROR;
2371                         goto done;
2372                 }
2373                 break;
2374         default:
2375                 err = USB_ERR_IOERROR;
2376                 goto done;
2377         }
2378 done:
2379         *plength = len;
2380         *pptr = ptr;
2381         return (err);
2382 }
2383
2384 static void
2385 ohci_xfer_setup(struct usb_setup_params *parm)
2386 {
2387         struct usb_page_search page_info;
2388         struct usb_page_cache *pc;
2389         struct usb_xfer *xfer;
2390         void *last_obj;
2391         uint32_t ntd;
2392         uint32_t nitd;
2393         uint32_t nqh;
2394         uint32_t n;
2395
2396         xfer = parm->curr_xfer;
2397
2398         parm->hc_max_packet_size = 0x500;
2399         parm->hc_max_packet_count = 1;
2400         parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2401
2402         /*
2403          * calculate ntd and nqh
2404          */
2405         if (parm->methods == &ohci_device_ctrl_methods) {
2406                 xfer->flags_int.bdma_enable = 1;
2407
2408                 usbd_transfer_setup_sub(parm);
2409
2410                 nitd = 0;
2411                 ntd = ((2 * xfer->nframes) + 1  /* STATUS */
2412                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2413                 nqh = 1;
2414
2415         } else if (parm->methods == &ohci_device_bulk_methods) {
2416                 xfer->flags_int.bdma_enable = 1;
2417
2418                 usbd_transfer_setup_sub(parm);
2419
2420                 nitd = 0;
2421                 ntd = ((2 * xfer->nframes)
2422                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2423                 nqh = 1;
2424
2425         } else if (parm->methods == &ohci_device_intr_methods) {
2426                 xfer->flags_int.bdma_enable = 1;
2427
2428                 usbd_transfer_setup_sub(parm);
2429
2430                 nitd = 0;
2431                 ntd = ((2 * xfer->nframes)
2432                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2433                 nqh = 1;
2434
2435         } else if (parm->methods == &ohci_device_isoc_methods) {
2436                 xfer->flags_int.bdma_enable = 1;
2437
2438                 usbd_transfer_setup_sub(parm);
2439
2440                 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2441                     howmany(xfer->nframes, OHCI_ITD_NOFFSET) +
2442                     1 /* EXTRA */ );
2443                 ntd = 0;
2444                 nqh = 1;
2445
2446         } else {
2447
2448                 usbd_transfer_setup_sub(parm);
2449
2450                 nitd = 0;
2451                 ntd = 0;
2452                 nqh = 0;
2453         }
2454
2455 alloc_dma_set:
2456
2457         if (parm->err) {
2458                 return;
2459         }
2460         last_obj = NULL;
2461
2462         if (usbd_transfer_setup_sub_malloc(
2463             parm, &pc, sizeof(ohci_td_t),
2464             OHCI_TD_ALIGN, ntd)) {
2465                 parm->err = USB_ERR_NOMEM;
2466                 return;
2467         }
2468         if (parm->buf) {
2469                 for (n = 0; n != ntd; n++) {
2470                         ohci_td_t *td;
2471
2472                         usbd_get_page(pc + n, 0, &page_info);
2473
2474                         td = page_info.buffer;
2475
2476                         /* init TD */
2477                         td->td_self = htole32(page_info.physaddr);
2478                         td->obj_next = last_obj;
2479                         td->page_cache = pc + n;
2480
2481                         last_obj = td;
2482
2483                         usb_pc_cpu_flush(pc + n);
2484                 }
2485         }
2486         if (usbd_transfer_setup_sub_malloc(
2487             parm, &pc, sizeof(ohci_itd_t),
2488             OHCI_ITD_ALIGN, nitd)) {
2489                 parm->err = USB_ERR_NOMEM;
2490                 return;
2491         }
2492         if (parm->buf) {
2493                 for (n = 0; n != nitd; n++) {
2494                         ohci_itd_t *itd;
2495
2496                         usbd_get_page(pc + n, 0, &page_info);
2497
2498                         itd = page_info.buffer;
2499
2500                         /* init TD */
2501                         itd->itd_self = htole32(page_info.physaddr);
2502                         itd->obj_next = last_obj;
2503                         itd->page_cache = pc + n;
2504
2505                         last_obj = itd;
2506
2507                         usb_pc_cpu_flush(pc + n);
2508                 }
2509         }
2510         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2511
2512         last_obj = NULL;
2513
2514         if (usbd_transfer_setup_sub_malloc(
2515             parm, &pc, sizeof(ohci_ed_t),
2516             OHCI_ED_ALIGN, nqh)) {
2517                 parm->err = USB_ERR_NOMEM;
2518                 return;
2519         }
2520         if (parm->buf) {
2521                 for (n = 0; n != nqh; n++) {
2522                         ohci_ed_t *ed;
2523
2524                         usbd_get_page(pc + n, 0, &page_info);
2525
2526                         ed = page_info.buffer;
2527
2528                         /* init QH */
2529                         ed->ed_self = htole32(page_info.physaddr);
2530                         ed->obj_next = last_obj;
2531                         ed->page_cache = pc + n;
2532
2533                         last_obj = ed;
2534
2535                         usb_pc_cpu_flush(pc + n);
2536                 }
2537         }
2538         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2539
2540         if (!xfer->flags_int.curr_dma_set) {
2541                 xfer->flags_int.curr_dma_set = 1;
2542                 goto alloc_dma_set;
2543         }
2544 }
2545
2546 static void
2547 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2548     struct usb_endpoint *ep)
2549 {
2550         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2551
2552         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2553             ep, udev->address,
2554             edesc->bEndpointAddress, udev->flags.usb_mode,
2555             sc->sc_addr);
2556
2557         if (udev->device_index != sc->sc_addr) {
2558                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2559                 case UE_CONTROL:
2560                         ep->methods = &ohci_device_ctrl_methods;
2561                         break;
2562                 case UE_INTERRUPT:
2563                         ep->methods = &ohci_device_intr_methods;
2564                         break;
2565                 case UE_ISOCHRONOUS:
2566                         if (udev->speed == USB_SPEED_FULL) {
2567                                 ep->methods = &ohci_device_isoc_methods;
2568                         }
2569                         break;
2570                 case UE_BULK:
2571                         ep->methods = &ohci_device_bulk_methods;
2572                         break;
2573                 default:
2574                         /* do nothing */
2575                         break;
2576                 }
2577         }
2578 }
2579
2580 static void
2581 ohci_xfer_unsetup(struct usb_xfer *xfer)
2582 {
2583         return;
2584 }
2585
2586 static void
2587 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2588 {
2589         /*
2590          * Wait until hardware has finished any possible use of the
2591          * transfer descriptor(s) and QH
2592          */
2593         *pus = (1125);                  /* microseconds */
2594 }
2595
2596 static void
2597 ohci_device_resume(struct usb_device *udev)
2598 {
2599         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2600         struct usb_xfer *xfer;
2601         const struct usb_pipe_methods *methods;
2602         ohci_ed_t *ed;
2603
2604         DPRINTF("\n");
2605
2606         USB_BUS_LOCK(udev->bus);
2607
2608         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2609
2610                 if (xfer->xroot->udev == udev) {
2611
2612                         methods = xfer->endpoint->methods;
2613                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2614
2615                         if (methods == &ohci_device_bulk_methods) {
2616                                 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2617                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2618                         }
2619                         if (methods == &ohci_device_ctrl_methods) {
2620                                 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2621                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2622                         }
2623                         if (methods == &ohci_device_intr_methods) {
2624                                 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2625                         }
2626                 }
2627         }
2628
2629         USB_BUS_UNLOCK(udev->bus);
2630
2631         return;
2632 }
2633
2634 static void
2635 ohci_device_suspend(struct usb_device *udev)
2636 {
2637         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2638         struct usb_xfer *xfer;
2639         const struct usb_pipe_methods *methods;
2640         ohci_ed_t *ed;
2641
2642         DPRINTF("\n");
2643
2644         USB_BUS_LOCK(udev->bus);
2645
2646         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2647
2648                 if (xfer->xroot->udev == udev) {
2649
2650                         methods = xfer->endpoint->methods;
2651                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2652
2653                         if (methods == &ohci_device_bulk_methods) {
2654                                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2655                         }
2656                         if (methods == &ohci_device_ctrl_methods) {
2657                                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2658                         }
2659                         if (methods == &ohci_device_intr_methods) {
2660                                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2661                         }
2662                 }
2663         }
2664
2665         USB_BUS_UNLOCK(udev->bus);
2666
2667         return;
2668 }
2669
2670 static void
2671 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2672 {
2673         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2674
2675         switch (state) {
2676         case USB_HW_POWER_SUSPEND:
2677         case USB_HW_POWER_SHUTDOWN:
2678                 ohci_suspend(sc);
2679                 break;
2680         case USB_HW_POWER_RESUME:
2681                 ohci_resume(sc);
2682                 break;
2683         default:
2684                 break;
2685         }
2686 }
2687
2688 static void
2689 ohci_set_hw_power(struct usb_bus *bus)
2690 {
2691         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2692         uint32_t temp;
2693         uint32_t flags;
2694
2695         DPRINTF("\n");
2696
2697         USB_BUS_LOCK(bus);
2698
2699         flags = bus->hw_power_state;
2700
2701         temp = OREAD4(sc, OHCI_CONTROL);
2702         temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2703
2704         if (flags & USB_HW_POWER_CONTROL)
2705                 temp |= OHCI_CLE;
2706
2707         if (flags & USB_HW_POWER_BULK)
2708                 temp |= OHCI_BLE;
2709
2710         if (flags & USB_HW_POWER_INTERRUPT)
2711                 temp |= OHCI_PLE;
2712
2713         if (flags & USB_HW_POWER_ISOC)
2714                 temp |= OHCI_IE | OHCI_PLE;
2715
2716         OWRITE4(sc, OHCI_CONTROL, temp);
2717
2718         USB_BUS_UNLOCK(bus);
2719
2720         return;
2721 }
2722
2723 static const struct usb_bus_methods ohci_bus_methods =
2724 {
2725         .endpoint_init = ohci_ep_init,
2726         .xfer_setup = ohci_xfer_setup,
2727         .xfer_unsetup = ohci_xfer_unsetup,
2728         .get_dma_delay = ohci_get_dma_delay,
2729         .device_resume = ohci_device_resume,
2730         .device_suspend = ohci_device_suspend,
2731         .set_hw_power = ohci_set_hw_power,
2732         .set_hw_power_sleep = ohci_set_hw_power_sleep,
2733         .roothub_exec = ohci_roothub_exec,
2734         .xfer_poll = ohci_do_poll,
2735 };