3 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
5 * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * USB Universal Host Controller driver.
31 * Handles e.g. PIIX3 and PIIX4.
33 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
34 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
35 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
36 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
39 #ifdef USB_GLOBAL_INCLUDE_FILE
40 #include USB_GLOBAL_INCLUDE_FILE
42 #include <sys/stdint.h>
43 #include <sys/stddef.h>
44 #include <sys/param.h>
45 #include <sys/queue.h>
46 #include <sys/types.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
50 #include <sys/module.h>
52 #include <sys/mutex.h>
53 #include <sys/condvar.h>
54 #include <sys/sysctl.h>
56 #include <sys/unistd.h>
57 #include <sys/callout.h>
58 #include <sys/malloc.h>
61 #include <dev/usb/usb.h>
62 #include <dev/usb/usbdi.h>
64 #define USB_DEBUG_VAR uhcidebug
66 #include <dev/usb/usb_core.h>
67 #include <dev/usb/usb_debug.h>
68 #include <dev/usb/usb_busdma.h>
69 #include <dev/usb/usb_process.h>
70 #include <dev/usb/usb_transfer.h>
71 #include <dev/usb/usb_device.h>
72 #include <dev/usb/usb_hub.h>
73 #include <dev/usb/usb_util.h>
75 #include <dev/usb/usb_controller.h>
76 #include <dev/usb/usb_bus.h>
77 #endif /* USB_GLOBAL_INCLUDE_FILE */
79 #include <dev/usb/controller/uhci.h>
80 #include <dev/usb/controller/uhcireg.h>
83 #define UHCI_BUS2SC(bus) \
84 ((uhci_softc_t *)(((uint8_t *)(bus)) - \
85 ((uint8_t *)&(((uhci_softc_t *)0)->sc_bus))))
88 static int uhcidebug = 0;
89 static int uhcinoloop = 0;
91 static SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
92 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RWTUN,
93 &uhcidebug, 0, "uhci debug level");
94 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RWTUN,
95 &uhcinoloop, 0, "uhci noloop");
97 static void uhci_dumpregs(uhci_softc_t *sc);
98 static void uhci_dump_tds(uhci_td_t *td);
102 #define UBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
103 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
104 #define UWRITE1(sc, r, x) \
105 do { UBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); \
106 } while (/*CONSTCOND*/0)
107 #define UWRITE2(sc, r, x) \
108 do { UBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); \
109 } while (/*CONSTCOND*/0)
110 #define UWRITE4(sc, r, x) \
111 do { UBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); \
112 } while (/*CONSTCOND*/0)
113 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
114 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
115 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
117 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
118 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
120 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
122 #define UHCI_INTR_ENDPT 1
124 struct uhci_mem_layout {
126 struct usb_page_search buf_res;
127 struct usb_page_search fix_res;
129 struct usb_page_cache *buf_pc;
130 struct usb_page_cache *fix_pc;
134 uint16_t max_frame_size;
137 struct uhci_std_temp {
139 struct uhci_mem_layout ml;
146 uint16_t max_frame_size;
148 uint8_t setup_alt_next;
152 static const struct usb_bus_methods uhci_bus_methods;
153 static const struct usb_pipe_methods uhci_device_bulk_methods;
154 static const struct usb_pipe_methods uhci_device_ctrl_methods;
155 static const struct usb_pipe_methods uhci_device_intr_methods;
156 static const struct usb_pipe_methods uhci_device_isoc_methods;
158 static uint8_t uhci_restart(uhci_softc_t *sc);
159 static void uhci_do_poll(struct usb_bus *);
160 static void uhci_device_done(struct usb_xfer *, usb_error_t);
161 static void uhci_transfer_intr_enqueue(struct usb_xfer *);
162 static void uhci_timeout(void *);
163 static uint8_t uhci_check_transfer(struct usb_xfer *);
164 static void uhci_root_intr(uhci_softc_t *sc);
167 uhci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
169 struct uhci_softc *sc = UHCI_BUS2SC(bus);
172 cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
173 sizeof(uint32_t) * UHCI_FRAMELIST_COUNT, UHCI_FRAMELIST_ALIGN);
175 cb(bus, &sc->sc_hw.ls_ctl_start_pc, &sc->sc_hw.ls_ctl_start_pg,
176 sizeof(uhci_qh_t), UHCI_QH_ALIGN);
178 cb(bus, &sc->sc_hw.fs_ctl_start_pc, &sc->sc_hw.fs_ctl_start_pg,
179 sizeof(uhci_qh_t), UHCI_QH_ALIGN);
181 cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
182 sizeof(uhci_qh_t), UHCI_QH_ALIGN);
184 cb(bus, &sc->sc_hw.last_qh_pc, &sc->sc_hw.last_qh_pg,
185 sizeof(uhci_qh_t), UHCI_QH_ALIGN);
187 cb(bus, &sc->sc_hw.last_td_pc, &sc->sc_hw.last_td_pg,
188 sizeof(uhci_td_t), UHCI_TD_ALIGN);
190 for (i = 0; i != UHCI_VFRAMELIST_COUNT; i++) {
191 cb(bus, sc->sc_hw.isoc_start_pc + i,
192 sc->sc_hw.isoc_start_pg + i,
193 sizeof(uhci_td_t), UHCI_TD_ALIGN);
196 for (i = 0; i != UHCI_IFRAMELIST_COUNT; i++) {
197 cb(bus, sc->sc_hw.intr_start_pc + i,
198 sc->sc_hw.intr_start_pg + i,
199 sizeof(uhci_qh_t), UHCI_QH_ALIGN);
204 uhci_mem_layout_init(struct uhci_mem_layout *ml, struct usb_xfer *xfer)
206 ml->buf_pc = xfer->frbuffers + 0;
207 ml->fix_pc = xfer->buf_fixup;
211 ml->max_frame_size = xfer->max_frame_size;
215 uhci_mem_layout_fixup(struct uhci_mem_layout *ml, struct uhci_td *td)
217 usbd_get_page(ml->buf_pc, ml->buf_offset, &ml->buf_res);
219 if (ml->buf_res.length < td->len) {
221 /* need to do a fixup */
223 usbd_get_page(ml->fix_pc, 0, &ml->fix_res);
225 td->td_buffer = htole32(ml->fix_res.physaddr);
228 * The UHCI driver cannot handle
229 * page crossings, so a fixup is
242 if ((td->td_token & htole32(UHCI_TD_PID)) ==
243 htole32(UHCI_TD_PID_IN)) {
244 td->fix_pc = ml->fix_pc;
245 usb_pc_cpu_invalidate(ml->fix_pc);
250 /* copy data to fixup location */
252 usbd_copy_out(ml->buf_pc, ml->buf_offset,
253 ml->fix_res.buffer, td->len);
255 usb_pc_cpu_flush(ml->fix_pc);
258 /* prepare next fixup */
264 td->td_buffer = htole32(ml->buf_res.physaddr);
268 /* prepare next data location */
270 ml->buf_offset += td->len;
279 uhci_restart(uhci_softc_t *sc)
281 struct usb_page_search buf_res;
283 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
285 if (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS) {
286 DPRINTFN(2, "Already started\n");
290 DPRINTFN(2, "Restarting\n");
292 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
294 /* Reload fresh base address */
295 UWRITE4(sc, UHCI_FLBASEADDR, buf_res.physaddr);
298 * Assume 64 byte packets at frame end and start HC controller:
300 UHCICMD(sc, (UHCI_CMD_MAXP | UHCI_CMD_RS));
302 /* wait 10 milliseconds */
304 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100);
306 /* check that controller has started */
308 if (UREAD2(sc, UHCI_STS) & UHCI_STS_HCH) {
309 DPRINTFN(2, "Failed\n");
316 uhci_reset(uhci_softc_t *sc)
320 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
322 DPRINTF("resetting the HC\n");
324 /* disable interrupts */
326 UWRITE2(sc, UHCI_INTR, 0);
330 UHCICMD(sc, UHCI_CMD_GRESET);
334 usb_pause_mtx(&sc->sc_bus.bus_mtx,
335 USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
337 /* terminate all transfers */
339 UHCICMD(sc, UHCI_CMD_HCRESET);
341 /* the reset bit goes low when the controller is done */
343 n = UHCI_RESET_TIMEOUT;
345 /* wait one millisecond */
347 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
349 if (!(UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET)) {
354 device_printf(sc->sc_bus.bdev,
355 "controller did not reset\n");
361 /* wait one millisecond */
363 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
365 /* check if HC is stopped */
366 if (UREAD2(sc, UHCI_STS) & UHCI_STS_HCH) {
371 device_printf(sc->sc_bus.bdev,
372 "controller did not stop\n");
376 /* reset frame number */
377 UWRITE2(sc, UHCI_FRNUM, 0);
378 /* set default SOF value */
379 UWRITE1(sc, UHCI_SOF, 0x40);
381 USB_BUS_UNLOCK(&sc->sc_bus);
383 /* stop root interrupt */
384 usb_callout_drain(&sc->sc_root_intr);
386 USB_BUS_LOCK(&sc->sc_bus);
390 uhci_start(uhci_softc_t *sc)
392 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
394 DPRINTFN(2, "enabling\n");
396 /* enable interrupts */
398 UWRITE2(sc, UHCI_INTR,
404 if (uhci_restart(sc)) {
405 device_printf(sc->sc_bus.bdev,
406 "cannot start HC controller\n");
409 /* start root interrupt */
413 static struct uhci_qh *
414 uhci_init_qh(struct usb_page_cache *pc)
416 struct usb_page_search buf_res;
419 usbd_get_page(pc, 0, &buf_res);
424 htole32(buf_res.physaddr) |
425 htole32(UHCI_PTR_QH);
432 static struct uhci_td *
433 uhci_init_td(struct usb_page_cache *pc)
435 struct usb_page_search buf_res;
438 usbd_get_page(pc, 0, &buf_res);
443 htole32(buf_res.physaddr) |
444 htole32(UHCI_PTR_TD);
452 uhci_init(uhci_softc_t *sc)
460 usb_callout_init_mtx(&sc->sc_root_intr, &sc->sc_bus.bus_mtx, 0);
470 sc->sc_ls_ctl_p_last =
471 uhci_init_qh(&sc->sc_hw.ls_ctl_start_pc);
473 sc->sc_fs_ctl_p_last =
474 uhci_init_qh(&sc->sc_hw.fs_ctl_start_pc);
477 uhci_init_qh(&sc->sc_hw.bulk_start_pc);
479 sc->sc_reclaim_qh_p =
480 sc->sc_fs_ctl_p_last;
482 /* setup reclaim looping point */
483 sc->sc_reclaim_qh_p =
488 uhci_init_qh(&sc->sc_hw.last_qh_pc);
491 uhci_init_td(&sc->sc_hw.last_td_pc);
493 for (x = 0; x != UHCI_VFRAMELIST_COUNT; x++) {
494 sc->sc_isoc_p_last[x] =
495 uhci_init_td(sc->sc_hw.isoc_start_pc + x);
498 for (x = 0; x != UHCI_IFRAMELIST_COUNT; x++) {
499 sc->sc_intr_p_last[x] =
500 uhci_init_qh(sc->sc_hw.intr_start_pc + x);
504 * the QHs are arranged to give poll intervals that are
505 * powers of 2 times 1ms
507 bit = UHCI_IFRAMELIST_COUNT / 2;
514 y = (x ^ bit) | (bit / 2);
517 * the next QH has half the poll interval
519 qh_x = sc->sc_intr_p_last[x];
520 qh_y = sc->sc_intr_p_last[y];
523 qh_x->qh_h_next = qh_y->qh_self;
525 qh_x->qh_e_next = htole32(UHCI_PTR_T);
535 qh_ls = sc->sc_ls_ctl_p_last;
536 qh_intr = sc->sc_intr_p_last[0];
538 /* start QH for interrupt traffic */
539 qh_intr->h_next = qh_ls;
540 qh_intr->qh_h_next = qh_ls->qh_self;
542 qh_intr->qh_e_next = htole32(UHCI_PTR_T);
544 for (x = 0; x != UHCI_VFRAMELIST_COUNT; x++) {
549 td_x = sc->sc_isoc_p_last[x];
550 qh_intr = sc->sc_intr_p_last[x | (UHCI_IFRAMELIST_COUNT / 2)];
552 /* start TD for isochronous traffic */
554 td_x->td_next = qh_intr->qh_self;
555 td_x->td_status = htole32(UHCI_TD_IOS);
556 td_x->td_token = htole32(0);
557 td_x->td_buffer = htole32(0);
564 qh_ls = sc->sc_ls_ctl_p_last;
565 qh_fs = sc->sc_fs_ctl_p_last;
567 /* start QH where low speed control traffic will be queued */
568 qh_ls->h_next = qh_fs;
569 qh_ls->qh_h_next = qh_fs->qh_self;
571 qh_ls->qh_e_next = htole32(UHCI_PTR_T);
579 qh_ctl = sc->sc_fs_ctl_p_last;
580 qh_blk = sc->sc_bulk_p_last;
582 /* start QH where full speed control traffic will be queued */
583 qh_ctl->h_next = qh_blk;
584 qh_ctl->qh_h_next = qh_blk->qh_self;
586 qh_ctl->qh_e_next = htole32(UHCI_PTR_T);
588 qh_lst = sc->sc_last_qh_p;
590 /* start QH where bulk traffic will be queued */
591 qh_blk->h_next = qh_lst;
592 qh_blk->qh_h_next = qh_lst->qh_self;
594 qh_blk->qh_e_next = htole32(UHCI_PTR_T);
596 td_lst = sc->sc_last_td_p;
598 /* end QH which is used for looping the QHs */
600 qh_lst->qh_h_next = htole32(UHCI_PTR_T); /* end of QH chain */
601 qh_lst->e_next = td_lst;
602 qh_lst->qh_e_next = td_lst->td_self;
605 * end TD which hangs from the last QH, to avoid a bug in the PIIX
606 * that makes it run berserk otherwise
609 td_lst->td_next = htole32(UHCI_PTR_T);
610 td_lst->td_status = htole32(0); /* inactive */
611 td_lst->td_token = htole32(0);
612 td_lst->td_buffer = htole32(0);
615 struct usb_page_search buf_res;
618 usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
620 pframes = buf_res.buffer;
624 * Setup UHCI framelist
628 * pframes -> full speed isochronous -> interrupt QH's -> low
629 * speed control -> full speed control -> bulk transfers
633 for (x = 0; x != UHCI_FRAMELIST_COUNT; x++) {
635 sc->sc_isoc_p_last[x % UHCI_VFRAMELIST_COUNT]->td_self;
638 /* flush all cache into memory */
640 usb_bus_mem_flush_all(&sc->sc_bus, &uhci_iterate_hw_softc);
642 /* set up the bus struct */
643 sc->sc_bus.methods = &uhci_bus_methods;
645 USB_BUS_LOCK(&sc->sc_bus);
646 /* reset the controller */
649 /* start the controller */
651 USB_BUS_UNLOCK(&sc->sc_bus);
653 /* catch lost interrupts */
654 uhci_do_poll(&sc->sc_bus);
660 uhci_suspend(uhci_softc_t *sc)
668 USB_BUS_LOCK(&sc->sc_bus);
670 /* stop the controller */
674 /* enter global suspend */
676 UHCICMD(sc, UHCI_CMD_EGSM);
678 USB_BUS_UNLOCK(&sc->sc_bus);
682 uhci_resume(uhci_softc_t *sc)
684 USB_BUS_LOCK(&sc->sc_bus);
686 /* reset the controller */
690 /* force global resume */
692 UHCICMD(sc, UHCI_CMD_FGR);
694 /* and start traffic again */
698 USB_BUS_UNLOCK(&sc->sc_bus);
705 /* catch lost interrupts */
706 uhci_do_poll(&sc->sc_bus);
711 uhci_dumpregs(uhci_softc_t *sc)
713 DPRINTFN(0, "%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
714 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
715 device_get_nameunit(sc->sc_bus.bdev),
716 UREAD2(sc, UHCI_CMD),
717 UREAD2(sc, UHCI_STS),
718 UREAD2(sc, UHCI_INTR),
719 UREAD2(sc, UHCI_FRNUM),
720 UREAD4(sc, UHCI_FLBASEADDR),
721 UREAD1(sc, UHCI_SOF),
722 UREAD2(sc, UHCI_PORTSC1),
723 UREAD2(sc, UHCI_PORTSC2));
727 uhci_dump_td(uhci_td_t *p)
734 usb_pc_cpu_invalidate(p->page_cache);
736 td_next = le32toh(p->td_next);
737 td_status = le32toh(p->td_status);
738 td_token = le32toh(p->td_token);
741 * Check whether the link pointer in this TD marks the link pointer
744 temp = ((td_next & UHCI_PTR_T) || (td_next == 0));
746 printf("TD(%p) at 0x%08x = link=0x%08x status=0x%08x "
747 "token=0x%08x buffer=0x%08x\n",
753 le32toh(p->td_buffer));
755 printf("TD(%p) td_next=%s%s%s td_status=%s%s%s%s%s%s%s%s%s%s%s, errcnt=%d, actlen=%d pid=%02x,"
756 "addr=%d,endpt=%d,D=%d,maxlen=%d\n",
758 (td_next & 1) ? "-T" : "",
759 (td_next & 2) ? "-Q" : "",
760 (td_next & 4) ? "-VF" : "",
761 (td_status & UHCI_TD_BITSTUFF) ? "-BITSTUFF" : "",
762 (td_status & UHCI_TD_CRCTO) ? "-CRCTO" : "",
763 (td_status & UHCI_TD_NAK) ? "-NAK" : "",
764 (td_status & UHCI_TD_BABBLE) ? "-BABBLE" : "",
765 (td_status & UHCI_TD_DBUFFER) ? "-DBUFFER" : "",
766 (td_status & UHCI_TD_STALLED) ? "-STALLED" : "",
767 (td_status & UHCI_TD_ACTIVE) ? "-ACTIVE" : "",
768 (td_status & UHCI_TD_IOC) ? "-IOC" : "",
769 (td_status & UHCI_TD_IOS) ? "-IOS" : "",
770 (td_status & UHCI_TD_LS) ? "-LS" : "",
771 (td_status & UHCI_TD_SPD) ? "-SPD" : "",
772 UHCI_TD_GET_ERRCNT(td_status),
773 UHCI_TD_GET_ACTLEN(td_status),
774 UHCI_TD_GET_PID(td_token),
775 UHCI_TD_GET_DEVADDR(td_token),
776 UHCI_TD_GET_ENDPT(td_token),
777 UHCI_TD_GET_DT(td_token),
778 UHCI_TD_GET_MAXLEN(td_token));
784 uhci_dump_qh(uhci_qh_t *sqh)
790 usb_pc_cpu_invalidate(sqh->page_cache);
792 qh_h_next = le32toh(sqh->qh_h_next);
793 qh_e_next = le32toh(sqh->qh_e_next);
795 DPRINTFN(0, "QH(%p) at 0x%08x: h_next=0x%08x e_next=0x%08x\n", sqh,
796 le32toh(sqh->qh_self), qh_h_next, qh_e_next);
798 temp = ((((sqh->h_next != NULL) && !(qh_h_next & UHCI_PTR_T)) ? 1 : 0) |
799 (((sqh->e_next != NULL) && !(qh_e_next & UHCI_PTR_T)) ? 2 : 0));
805 uhci_dump_all(uhci_softc_t *sc)
808 uhci_dump_qh(sc->sc_ls_ctl_p_last);
809 uhci_dump_qh(sc->sc_fs_ctl_p_last);
810 uhci_dump_qh(sc->sc_bulk_p_last);
811 uhci_dump_qh(sc->sc_last_qh_p);
815 uhci_dump_tds(uhci_td_t *td)
820 if (uhci_dump_td(td)) {
829 * Let the last QH loop back to the full speed control transfer QH.
830 * This is what intel calls "bandwidth reclamation" and improves
831 * USB performance a lot for some devices.
832 * If we are already looping, just count it.
835 uhci_add_loop(uhci_softc_t *sc)
837 struct uhci_qh *qh_lst;
838 struct uhci_qh *qh_rec;
845 if (++(sc->sc_loops) == 1) {
846 DPRINTFN(6, "add\n");
848 qh_lst = sc->sc_last_qh_p;
849 qh_rec = sc->sc_reclaim_qh_p;
851 /* NOTE: we don't loop back the soft pointer */
853 qh_lst->qh_h_next = qh_rec->qh_self;
854 usb_pc_cpu_flush(qh_lst->page_cache);
859 uhci_rem_loop(uhci_softc_t *sc)
861 struct uhci_qh *qh_lst;
868 if (--(sc->sc_loops) == 0) {
869 DPRINTFN(6, "remove\n");
871 qh_lst = sc->sc_last_qh_p;
872 qh_lst->qh_h_next = htole32(UHCI_PTR_T);
873 usb_pc_cpu_flush(qh_lst->page_cache);
878 uhci_transfer_intr_enqueue(struct usb_xfer *xfer)
880 /* check for early completion */
881 if (uhci_check_transfer(xfer)) {
884 /* put transfer on interrupt queue */
885 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
887 /* start timeout, if any */
888 if (xfer->timeout != 0) {
889 usbd_transfer_timeout_ms(xfer, &uhci_timeout, xfer->timeout);
893 #define UHCI_APPEND_TD(std,last) (last) = _uhci_append_td(std,last)
895 _uhci_append_td(uhci_td_t *std, uhci_td_t *last)
897 DPRINTFN(11, "%p to %p\n", std, last);
899 /* (sc->sc_bus.mtx) must be locked */
901 std->next = last->next;
902 std->td_next = last->td_next;
906 usb_pc_cpu_flush(std->page_cache);
909 * the last->next->prev is never followed: std->next->prev = std;
912 last->td_next = std->td_self;
914 usb_pc_cpu_flush(last->page_cache);
919 #define UHCI_APPEND_QH(sqh,last) (last) = _uhci_append_qh(sqh,last)
921 _uhci_append_qh(uhci_qh_t *sqh, uhci_qh_t *last)
923 DPRINTFN(11, "%p to %p\n", sqh, last);
925 if (sqh->h_prev != NULL) {
926 /* should not happen */
927 DPRINTFN(0, "QH already linked!\n");
930 /* (sc->sc_bus.mtx) must be locked */
932 sqh->h_next = last->h_next;
933 sqh->qh_h_next = last->qh_h_next;
937 usb_pc_cpu_flush(sqh->page_cache);
940 * The "last->h_next->h_prev" is never followed:
942 * "sqh->h_next->h_prev" = sqh;
946 last->qh_h_next = sqh->qh_self;
948 usb_pc_cpu_flush(last->page_cache);
955 #define UHCI_REMOVE_TD(std,last) (last) = _uhci_remove_td(std,last)
957 _uhci_remove_td(uhci_td_t *std, uhci_td_t *last)
959 DPRINTFN(11, "%p from %p\n", std, last);
961 /* (sc->sc_bus.mtx) must be locked */
963 std->prev->next = std->next;
964 std->prev->td_next = std->td_next;
966 usb_pc_cpu_flush(std->prev->page_cache);
969 std->next->prev = std->prev;
970 usb_pc_cpu_flush(std->next->page_cache);
972 return ((last == std) ? std->prev : last);
975 #define UHCI_REMOVE_QH(sqh,last) (last) = _uhci_remove_qh(sqh,last)
977 _uhci_remove_qh(uhci_qh_t *sqh, uhci_qh_t *last)
979 DPRINTFN(11, "%p from %p\n", sqh, last);
981 /* (sc->sc_bus.mtx) must be locked */
983 /* only remove if not removed from a queue */
986 sqh->h_prev->h_next = sqh->h_next;
987 sqh->h_prev->qh_h_next = sqh->qh_h_next;
989 usb_pc_cpu_flush(sqh->h_prev->page_cache);
992 sqh->h_next->h_prev = sqh->h_prev;
993 usb_pc_cpu_flush(sqh->h_next->page_cache);
995 last = ((last == sqh) ? sqh->h_prev : last);
999 usb_pc_cpu_flush(sqh->page_cache);
1005 uhci_isoc_done(uhci_softc_t *sc, struct usb_xfer *xfer)
1007 struct usb_page_search res;
1008 uint32_t nframes = xfer->nframes;
1010 uint32_t offset = 0;
1011 uint32_t *plen = xfer->frlengths;
1013 uhci_td_t *td = xfer->td_transfer_first;
1014 uhci_td_t **pp_last = &sc->sc_isoc_p_last[xfer->qh_pos];
1016 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1017 xfer, xfer->endpoint);
1019 /* sync any DMA memory before doing fixups */
1021 usb_bdma_post_sync(xfer);
1025 panic("%s:%d: out of TD's\n",
1026 __FUNCTION__, __LINE__);
1028 if (pp_last >= &sc->sc_isoc_p_last[UHCI_VFRAMELIST_COUNT]) {
1029 pp_last = &sc->sc_isoc_p_last[0];
1032 if (uhcidebug > 5) {
1033 DPRINTF("isoc TD\n");
1037 usb_pc_cpu_invalidate(td->page_cache);
1038 status = le32toh(td->td_status);
1040 len = UHCI_TD_GET_ACTLEN(status);
1047 usbd_get_page(td->fix_pc, 0, &res);
1049 /* copy data from fixup location to real location */
1051 usb_pc_cpu_invalidate(td->fix_pc);
1053 usbd_copy_in(xfer->frbuffers, offset,
1060 /* remove TD from schedule */
1061 UHCI_REMOVE_TD(td, *pp_last);
1068 xfer->aframes = xfer->nframes;
1072 uhci_non_isoc_done_sub(struct usb_xfer *xfer)
1074 struct usb_page_search res;
1076 uhci_td_t *td_alt_next;
1081 td = xfer->td_transfer_cache;
1082 td_alt_next = td->alt_next;
1084 if (xfer->aframes != xfer->nframes) {
1085 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1089 usb_pc_cpu_invalidate(td->page_cache);
1090 status = le32toh(td->td_status);
1091 token = le32toh(td->td_token);
1094 * Verify the status and add
1095 * up the actual length:
1098 len = UHCI_TD_GET_ACTLEN(status);
1099 if (len > td->len) {
1100 /* should not happen */
1101 DPRINTF("Invalid status length, "
1102 "0x%04x/0x%04x bytes\n", len, td->len);
1103 status |= UHCI_TD_STALLED;
1105 } else if ((xfer->aframes != xfer->nframes) && (len > 0)) {
1109 usbd_get_page(td->fix_pc, 0, &res);
1112 * copy data from fixup location to real
1116 usb_pc_cpu_invalidate(td->fix_pc);
1118 usbd_copy_in(xfer->frbuffers + xfer->aframes,
1119 xfer->frlengths[xfer->aframes], res.buffer, len);
1121 /* update actual length */
1123 xfer->frlengths[xfer->aframes] += len;
1125 /* Check for last transfer */
1126 if (((void *)td) == xfer->td_transfer_last) {
1130 if (status & UHCI_TD_STALLED) {
1131 /* the transfer is finished */
1135 /* Check for short transfer */
1136 if (len != td->len) {
1137 if (xfer->flags_int.short_frames_ok) {
1138 /* follow alt next */
1141 /* the transfer is finished */
1148 if (td->alt_next != td_alt_next) {
1149 /* this USB frame is complete */
1154 /* update transfer cache */
1156 xfer->td_transfer_cache = td;
1158 /* update data toggle */
1160 xfer->endpoint->toggle_next = (token & UHCI_TD_SET_DT(1)) ? 0 : 1;
1163 if (status & UHCI_TD_ERROR) {
1164 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x "
1165 "status=%s%s%s%s%s%s%s%s%s%s%s\n",
1166 xfer->address, xfer->endpointno, xfer->aframes,
1167 (status & UHCI_TD_BITSTUFF) ? "[BITSTUFF]" : "",
1168 (status & UHCI_TD_CRCTO) ? "[CRCTO]" : "",
1169 (status & UHCI_TD_NAK) ? "[NAK]" : "",
1170 (status & UHCI_TD_BABBLE) ? "[BABBLE]" : "",
1171 (status & UHCI_TD_DBUFFER) ? "[DBUFFER]" : "",
1172 (status & UHCI_TD_STALLED) ? "[STALLED]" : "",
1173 (status & UHCI_TD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1174 (status & UHCI_TD_IOC) ? "[IOC]" : "",
1175 (status & UHCI_TD_IOS) ? "[IOS]" : "",
1176 (status & UHCI_TD_LS) ? "[LS]" : "",
1177 (status & UHCI_TD_SPD) ? "[SPD]" : "");
1180 if (status & UHCI_TD_STALLED) {
1181 /* try to separate I/O errors from STALL */
1182 if (UHCI_TD_GET_ERRCNT(status) == 0)
1183 return (USB_ERR_IOERROR);
1184 return (USB_ERR_STALLED);
1186 return (USB_ERR_NORMAL_COMPLETION);
1190 uhci_non_isoc_done(struct usb_xfer *xfer)
1192 usb_error_t err = 0;
1194 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1195 xfer, xfer->endpoint);
1198 if (uhcidebug > 10) {
1199 uhci_dump_tds(xfer->td_transfer_first);
1203 /* sync any DMA memory before doing fixups */
1205 usb_bdma_post_sync(xfer);
1209 xfer->td_transfer_cache = xfer->td_transfer_first;
1211 if (xfer->flags_int.control_xfr) {
1212 if (xfer->flags_int.control_hdr) {
1214 err = uhci_non_isoc_done_sub(xfer);
1218 if (xfer->td_transfer_cache == NULL) {
1222 while (xfer->aframes != xfer->nframes) {
1224 err = uhci_non_isoc_done_sub(xfer);
1227 if (xfer->td_transfer_cache == NULL) {
1232 if (xfer->flags_int.control_xfr &&
1233 !xfer->flags_int.control_act) {
1235 err = uhci_non_isoc_done_sub(xfer);
1238 uhci_device_done(xfer, err);
1241 /*------------------------------------------------------------------------*
1242 * uhci_check_transfer_sub
1244 * The main purpose of this function is to update the data-toggle
1245 * in case it is wrong.
1246 *------------------------------------------------------------------------*/
1248 uhci_check_transfer_sub(struct usb_xfer *xfer)
1252 uhci_td_t *td_alt_next;
1257 td = xfer->td_transfer_cache;
1258 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1260 td_token = td->obj_next->td_token;
1262 xfer->td_transfer_cache = td;
1263 td_self = td->td_self;
1264 td_alt_next = td->alt_next;
1266 if (xfer->flags_int.control_xfr)
1267 goto skip; /* don't touch the DT value! */
1269 if (!((td->td_token ^ td_token) & htole32(UHCI_TD_SET_DT(1))))
1270 goto skip; /* data toggle has correct value */
1273 * The data toggle is wrong and we need to toggle it !
1277 td->td_token ^= htole32(UHCI_TD_SET_DT(1));
1278 usb_pc_cpu_flush(td->page_cache);
1280 if (td == xfer->td_transfer_last) {
1286 if (td->alt_next != td_alt_next) {
1294 qh->qh_e_next = td_self;
1295 usb_pc_cpu_flush(qh->page_cache);
1297 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1300 /*------------------------------------------------------------------------*
1301 * uhci_check_transfer
1304 * 0: USB transfer is not finished
1305 * Else: USB transfer is finished
1306 *------------------------------------------------------------------------*/
1308 uhci_check_transfer(struct usb_xfer *xfer)
1314 DPRINTFN(16, "xfer=%p checking transfer\n", xfer);
1316 if (xfer->endpoint->methods == &uhci_device_isoc_methods) {
1317 /* isochronous transfer */
1319 td = xfer->td_transfer_last;
1321 usb_pc_cpu_invalidate(td->page_cache);
1322 status = le32toh(td->td_status);
1324 /* check also if the first is complete */
1326 td = xfer->td_transfer_first;
1328 usb_pc_cpu_invalidate(td->page_cache);
1329 status |= le32toh(td->td_status);
1331 if (!(status & UHCI_TD_ACTIVE)) {
1332 uhci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1336 /* non-isochronous transfer */
1339 * check whether there is an error somewhere
1340 * in the middle, or whether there was a short
1341 * packet (SPD and not ACTIVE)
1343 td = xfer->td_transfer_cache;
1346 usb_pc_cpu_invalidate(td->page_cache);
1347 status = le32toh(td->td_status);
1348 token = le32toh(td->td_token);
1351 * if there is an active TD the transfer isn't done
1353 if (status & UHCI_TD_ACTIVE) {
1355 xfer->td_transfer_cache = td;
1359 * last transfer descriptor makes the transfer done
1361 if (((void *)td) == xfer->td_transfer_last) {
1365 * any kind of error makes the transfer done
1367 if (status & UHCI_TD_STALLED) {
1371 * check if we reached the last packet
1372 * or if there is a short packet:
1374 if ((td->td_next == htole32(UHCI_PTR_T)) ||
1375 (UHCI_TD_GET_ACTLEN(status) < td->len)) {
1377 if (xfer->flags_int.short_frames_ok) {
1378 /* follow alt next */
1381 xfer->td_transfer_cache = td;
1382 uhci_check_transfer_sub(xfer);
1386 /* transfer is done */
1391 uhci_non_isoc_done(xfer);
1396 DPRINTFN(13, "xfer=%p is still active\n", xfer);
1404 uhci_interrupt_poll(uhci_softc_t *sc)
1406 struct usb_xfer *xfer;
1409 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1411 * check if transfer is transferred
1413 if (uhci_check_transfer(xfer)) {
1414 /* queue has been modified */
1420 /*------------------------------------------------------------------------*
1421 * uhci_interrupt - UHCI interrupt handler
1423 * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1424 * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1426 *------------------------------------------------------------------------*/
1428 uhci_interrupt(uhci_softc_t *sc)
1432 USB_BUS_LOCK(&sc->sc_bus);
1434 DPRINTFN(16, "real interrupt\n");
1437 if (uhcidebug > 15) {
1441 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1443 /* the interrupt was not for us */
1446 if (status & (UHCI_STS_RD | UHCI_STS_HSE |
1447 UHCI_STS_HCPE | UHCI_STS_HCH)) {
1449 if (status & UHCI_STS_RD) {
1451 printf("%s: resume detect\n",
1455 if (status & UHCI_STS_HSE) {
1456 printf("%s: host system error\n",
1459 if (status & UHCI_STS_HCPE) {
1460 printf("%s: host controller process error\n",
1463 if (status & UHCI_STS_HCH) {
1464 /* no acknowledge needed */
1465 DPRINTF("%s: host controller halted\n",
1468 if (uhcidebug > 0) {
1474 /* get acknowledge bits */
1475 status &= (UHCI_STS_USBINT |
1483 /* nothing to acknowledge */
1486 /* acknowledge interrupts */
1487 UWRITE2(sc, UHCI_STS, status);
1489 /* poll all the USB transfers */
1490 uhci_interrupt_poll(sc);
1493 USB_BUS_UNLOCK(&sc->sc_bus);
1497 * called when a request does not complete
1500 uhci_timeout(void *arg)
1502 struct usb_xfer *xfer = arg;
1504 DPRINTF("xfer=%p\n", xfer);
1506 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1508 /* transfer is transferred */
1509 uhci_device_done(xfer, USB_ERR_TIMEOUT);
1513 uhci_do_poll(struct usb_bus *bus)
1515 struct uhci_softc *sc = UHCI_BUS2SC(bus);
1517 USB_BUS_LOCK(&sc->sc_bus);
1518 uhci_interrupt_poll(sc);
1519 USB_BUS_UNLOCK(&sc->sc_bus);
1523 uhci_setup_standard_chain_sub(struct uhci_std_temp *temp)
1527 uhci_td_t *td_alt_next;
1530 uint8_t shortpkt_old;
1534 shortpkt_old = temp->shortpkt;
1535 len_old = temp->len;
1538 /* software is used to detect short incoming transfers */
1540 if ((temp->td_token & htole32(UHCI_TD_PID)) == htole32(UHCI_TD_PID_IN)) {
1541 temp->td_status |= htole32(UHCI_TD_SPD);
1543 temp->td_status &= ~htole32(UHCI_TD_SPD);
1546 temp->ml.buf_offset = 0;
1550 temp->td_token &= ~htole32(UHCI_TD_SET_MAXLEN(0));
1551 temp->td_token |= htole32(UHCI_TD_SET_MAXLEN(temp->average));
1554 td_next = temp->td_next;
1558 if (temp->len == 0) {
1560 if (temp->shortpkt) {
1563 /* send a Zero Length Packet, ZLP, last */
1566 temp->td_token |= htole32(UHCI_TD_SET_MAXLEN(0));
1571 average = temp->average;
1573 if (temp->len < average) {
1575 temp->td_token &= ~htole32(UHCI_TD_SET_MAXLEN(0));
1576 temp->td_token |= htole32(UHCI_TD_SET_MAXLEN(temp->len));
1577 average = temp->len;
1581 if (td_next == NULL) {
1582 panic("%s: out of UHCI transfer descriptors!", __FUNCTION__);
1587 td_next = td->obj_next;
1589 /* check if we are pre-computing */
1593 /* update remaining length */
1595 temp->len -= average;
1599 /* fill out current TD */
1601 td->td_status = temp->td_status;
1602 td->td_token = temp->td_token;
1604 /* update data toggle */
1606 temp->td_token ^= htole32(UHCI_TD_SET_DT(1));
1616 /* update remaining length */
1618 temp->len -= average;
1622 /* fill out buffer pointer and do fixup, if any */
1624 uhci_mem_layout_fixup(&temp->ml, td);
1627 td->alt_next = td_alt_next;
1629 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1630 /* we need to receive these frames one by one ! */
1631 td->td_status |= htole32(UHCI_TD_IOC);
1632 td->td_next = htole32(UHCI_PTR_T);
1635 /* link the current TD with the next one */
1636 td->td_next = td_next->td_self;
1640 usb_pc_cpu_flush(td->page_cache);
1646 /* setup alt next pointer, if any */
1647 if (temp->last_frame) {
1650 /* we use this field internally */
1651 td_alt_next = td_next;
1655 temp->shortpkt = shortpkt_old;
1656 temp->len = len_old;
1660 temp->td_next = td_next;
1664 uhci_setup_standard_chain(struct usb_xfer *xfer)
1666 struct uhci_std_temp temp;
1670 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1671 xfer->address, UE_GET_ADDR(xfer->endpointno),
1672 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1674 temp.average = xfer->max_frame_size;
1675 temp.max_frame_size = xfer->max_frame_size;
1677 /* toggle the DMA set we are using */
1678 xfer->flags_int.curr_dma_set ^= 1;
1680 /* get next DMA set */
1681 td = xfer->td_start[xfer->flags_int.curr_dma_set];
1682 xfer->td_transfer_first = td;
1683 xfer->td_transfer_cache = td;
1687 temp.last_frame = 0;
1688 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1690 uhci_mem_layout_init(&temp.ml, xfer);
1693 htole32(UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) |
1696 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1697 temp.td_status |= htole32(UHCI_TD_LS);
1700 htole32(UHCI_TD_SET_ENDPT(xfer->endpointno) |
1701 UHCI_TD_SET_DEVADDR(xfer->address));
1703 if (xfer->endpoint->toggle_next) {
1705 temp.td_token |= htole32(UHCI_TD_SET_DT(1));
1707 /* check if we should prepend a setup message */
1709 if (xfer->flags_int.control_xfr) {
1711 if (xfer->flags_int.control_hdr) {
1713 temp.td_token &= htole32(UHCI_TD_SET_DEVADDR(0x7F) |
1714 UHCI_TD_SET_ENDPT(0xF));
1715 temp.td_token |= htole32(UHCI_TD_PID_SETUP |
1718 temp.len = xfer->frlengths[0];
1719 temp.ml.buf_pc = xfer->frbuffers + 0;
1720 temp.shortpkt = temp.len ? 1 : 0;
1721 /* check for last frame */
1722 if (xfer->nframes == 1) {
1723 /* no STATUS stage yet, SETUP is last */
1724 if (xfer->flags_int.control_act) {
1725 temp.last_frame = 1;
1726 temp.setup_alt_next = 0;
1729 uhci_setup_standard_chain_sub(&temp);
1736 while (x != xfer->nframes) {
1738 /* DATA0 / DATA1 message */
1740 temp.len = xfer->frlengths[x];
1741 temp.ml.buf_pc = xfer->frbuffers + x;
1745 if (x == xfer->nframes) {
1746 if (xfer->flags_int.control_xfr) {
1747 /* no STATUS stage yet, DATA is last */
1748 if (xfer->flags_int.control_act) {
1749 temp.last_frame = 1;
1750 temp.setup_alt_next = 0;
1753 temp.last_frame = 1;
1754 temp.setup_alt_next = 0;
1758 * Keep previous data toggle,
1759 * device address and endpoint number:
1762 temp.td_token &= htole32(UHCI_TD_SET_DEVADDR(0x7F) |
1763 UHCI_TD_SET_ENDPT(0xF) |
1766 if (temp.len == 0) {
1768 /* make sure that we send an USB packet */
1774 /* regular data transfer */
1776 temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1779 /* set endpoint direction */
1782 (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1783 htole32(UHCI_TD_PID_IN) :
1784 htole32(UHCI_TD_PID_OUT);
1786 uhci_setup_standard_chain_sub(&temp);
1789 /* check if we should append a status stage */
1791 if (xfer->flags_int.control_xfr &&
1792 !xfer->flags_int.control_act) {
1795 * send a DATA1 message and reverse the current endpoint
1799 temp.td_token &= htole32(UHCI_TD_SET_DEVADDR(0x7F) |
1800 UHCI_TD_SET_ENDPT(0xF) |
1803 (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1804 htole32(UHCI_TD_PID_IN | UHCI_TD_SET_DT(1)) :
1805 htole32(UHCI_TD_PID_OUT | UHCI_TD_SET_DT(1));
1808 temp.ml.buf_pc = NULL;
1810 temp.last_frame = 1;
1811 temp.setup_alt_next = 0;
1813 uhci_setup_standard_chain_sub(&temp);
1817 /* Ensure that last TD is terminating: */
1818 td->td_next = htole32(UHCI_PTR_T);
1820 /* set interrupt bit */
1822 td->td_status |= htole32(UHCI_TD_IOC);
1824 usb_pc_cpu_flush(td->page_cache);
1826 /* must have at least one frame! */
1828 xfer->td_transfer_last = td;
1831 if (uhcidebug > 8) {
1832 DPRINTF("nexttog=%d; data before transfer:\n",
1833 xfer->endpoint->toggle_next);
1834 uhci_dump_tds(xfer->td_transfer_first);
1837 return (xfer->td_transfer_first);
1840 /* NOTE: "done" can be run two times in a row,
1841 * from close and from interrupt
1845 uhci_device_done(struct usb_xfer *xfer, usb_error_t error)
1847 const struct usb_pipe_methods *methods = xfer->endpoint->methods;
1848 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
1851 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1853 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1854 xfer, xfer->endpoint, error);
1856 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1858 usb_pc_cpu_invalidate(qh->page_cache);
1860 if (xfer->flags_int.bandwidth_reclaimed) {
1861 xfer->flags_int.bandwidth_reclaimed = 0;
1864 if (methods == &uhci_device_bulk_methods) {
1865 UHCI_REMOVE_QH(qh, sc->sc_bulk_p_last);
1867 if (methods == &uhci_device_ctrl_methods) {
1868 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1869 UHCI_REMOVE_QH(qh, sc->sc_ls_ctl_p_last);
1871 UHCI_REMOVE_QH(qh, sc->sc_fs_ctl_p_last);
1874 if (methods == &uhci_device_intr_methods) {
1875 UHCI_REMOVE_QH(qh, sc->sc_intr_p_last[xfer->qh_pos]);
1878 * Only finish isochronous transfers once
1879 * which will update "xfer->frlengths".
1881 if (xfer->td_transfer_first &&
1882 xfer->td_transfer_last) {
1883 if (methods == &uhci_device_isoc_methods) {
1884 uhci_isoc_done(sc, xfer);
1886 xfer->td_transfer_first = NULL;
1887 xfer->td_transfer_last = NULL;
1889 /* dequeue transfer and start next transfer */
1890 usbd_transfer_done(xfer, error);
1893 /*------------------------------------------------------------------------*
1895 *------------------------------------------------------------------------*/
1897 uhci_device_bulk_open(struct usb_xfer *xfer)
1903 uhci_device_bulk_close(struct usb_xfer *xfer)
1905 uhci_device_done(xfer, USB_ERR_CANCELLED);
1909 uhci_device_bulk_enter(struct usb_xfer *xfer)
1915 uhci_device_bulk_start(struct usb_xfer *xfer)
1917 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
1922 td = uhci_setup_standard_chain(xfer);
1925 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1928 qh->qh_e_next = td->td_self;
1930 if (xfer->xroot->udev->flags.self_suspended == 0) {
1931 UHCI_APPEND_QH(qh, sc->sc_bulk_p_last);
1933 xfer->flags_int.bandwidth_reclaimed = 1;
1935 usb_pc_cpu_flush(qh->page_cache);
1938 /* put transfer on interrupt queue */
1939 uhci_transfer_intr_enqueue(xfer);
1942 static const struct usb_pipe_methods uhci_device_bulk_methods =
1944 .open = uhci_device_bulk_open,
1945 .close = uhci_device_bulk_close,
1946 .enter = uhci_device_bulk_enter,
1947 .start = uhci_device_bulk_start,
1950 /*------------------------------------------------------------------------*
1951 * uhci control support
1952 *------------------------------------------------------------------------*/
1954 uhci_device_ctrl_open(struct usb_xfer *xfer)
1960 uhci_device_ctrl_close(struct usb_xfer *xfer)
1962 uhci_device_done(xfer, USB_ERR_CANCELLED);
1966 uhci_device_ctrl_enter(struct usb_xfer *xfer)
1972 uhci_device_ctrl_start(struct usb_xfer *xfer)
1974 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
1979 td = uhci_setup_standard_chain(xfer);
1982 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1985 qh->qh_e_next = td->td_self;
1988 * NOTE: some devices choke on bandwidth- reclamation for control
1991 if (xfer->xroot->udev->flags.self_suspended == 0) {
1992 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1993 UHCI_APPEND_QH(qh, sc->sc_ls_ctl_p_last);
1995 UHCI_APPEND_QH(qh, sc->sc_fs_ctl_p_last);
1998 usb_pc_cpu_flush(qh->page_cache);
2000 /* put transfer on interrupt queue */
2001 uhci_transfer_intr_enqueue(xfer);
2004 static const struct usb_pipe_methods uhci_device_ctrl_methods =
2006 .open = uhci_device_ctrl_open,
2007 .close = uhci_device_ctrl_close,
2008 .enter = uhci_device_ctrl_enter,
2009 .start = uhci_device_ctrl_start,
2012 /*------------------------------------------------------------------------*
2013 * uhci interrupt support
2014 *------------------------------------------------------------------------*/
2016 uhci_device_intr_open(struct usb_xfer *xfer)
2018 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
2024 bit = UHCI_IFRAMELIST_COUNT / 2;
2026 if (xfer->interval >= bit) {
2030 if (sc->sc_intr_stat[x] <
2031 sc->sc_intr_stat[best]) {
2041 sc->sc_intr_stat[best]++;
2042 xfer->qh_pos = best;
2044 DPRINTFN(3, "best=%d interval=%d\n",
2045 best, xfer->interval);
2049 uhci_device_intr_close(struct usb_xfer *xfer)
2051 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
2053 sc->sc_intr_stat[xfer->qh_pos]--;
2055 uhci_device_done(xfer, USB_ERR_CANCELLED);
2059 uhci_device_intr_enter(struct usb_xfer *xfer)
2065 uhci_device_intr_start(struct usb_xfer *xfer)
2067 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
2072 td = uhci_setup_standard_chain(xfer);
2075 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
2078 qh->qh_e_next = td->td_self;
2080 if (xfer->xroot->udev->flags.self_suspended == 0) {
2081 /* enter QHs into the controller data structures */
2082 UHCI_APPEND_QH(qh, sc->sc_intr_p_last[xfer->qh_pos]);
2084 usb_pc_cpu_flush(qh->page_cache);
2087 /* put transfer on interrupt queue */
2088 uhci_transfer_intr_enqueue(xfer);
2091 static const struct usb_pipe_methods uhci_device_intr_methods =
2093 .open = uhci_device_intr_open,
2094 .close = uhci_device_intr_close,
2095 .enter = uhci_device_intr_enter,
2096 .start = uhci_device_intr_start,
2099 /*------------------------------------------------------------------------*
2100 * uhci isochronous support
2101 *------------------------------------------------------------------------*/
2103 uhci_device_isoc_open(struct usb_xfer *xfer)
2110 (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
2111 UHCI_TD_IN(0, xfer->endpointno, xfer->address, 0) :
2112 UHCI_TD_OUT(0, xfer->endpointno, xfer->address, 0);
2114 td_token = htole32(td_token);
2116 /* initialize all TD's */
2118 for (ds = 0; ds != 2; ds++) {
2120 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2122 /* mark TD as inactive */
2123 td->td_status = htole32(UHCI_TD_IOS);
2124 td->td_token = td_token;
2126 usb_pc_cpu_flush(td->page_cache);
2132 uhci_device_isoc_close(struct usb_xfer *xfer)
2134 uhci_device_done(xfer, USB_ERR_CANCELLED);
2138 uhci_device_isoc_enter(struct usb_xfer *xfer)
2140 struct uhci_mem_layout ml;
2141 uhci_softc_t *sc = UHCI_BUS2SC(xfer->xroot->bus);
2151 uhci_td_t *td_last = NULL;
2152 uhci_td_t **pp_last;
2154 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2155 xfer, xfer->endpoint->isoc_next, xfer->nframes);
2157 nframes = UREAD2(sc, UHCI_FRNUM);
2159 temp = (nframes - xfer->endpoint->isoc_next) &
2160 (UHCI_VFRAMELIST_COUNT - 1);
2162 if ((xfer->endpoint->is_synced == 0) ||
2163 (temp < xfer->nframes)) {
2165 * If there is data underflow or the pipe queue is empty we
2166 * schedule the transfer a few frames ahead of the current
2167 * frame position. Else two isochronous transfers might
2170 xfer->endpoint->isoc_next = (nframes + 3) & (UHCI_VFRAMELIST_COUNT - 1);
2171 xfer->endpoint->is_synced = 1;
2172 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2175 * compute how many milliseconds the insertion is ahead of the
2176 * current frame position:
2178 temp = (xfer->endpoint->isoc_next - nframes) &
2179 (UHCI_VFRAMELIST_COUNT - 1);
2182 * pre-compute when the isochronous transfer will be finished:
2184 xfer->isoc_time_complete =
2185 usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
2188 /* get the real number of frames */
2190 nframes = xfer->nframes;
2192 uhci_mem_layout_init(&ml, xfer);
2194 plen = xfer->frlengths;
2196 /* toggle the DMA set we are using */
2197 xfer->flags_int.curr_dma_set ^= 1;
2199 /* get next DMA set */
2200 td = xfer->td_start[xfer->flags_int.curr_dma_set];
2201 xfer->td_transfer_first = td;
2203 pp_last = &sc->sc_isoc_p_last[xfer->endpoint->isoc_next];
2205 /* store starting position */
2207 xfer->qh_pos = xfer->endpoint->isoc_next;
2211 panic("%s:%d: out of TD's\n",
2212 __FUNCTION__, __LINE__);
2214 if (pp_last >= &sc->sc_isoc_p_last[UHCI_VFRAMELIST_COUNT]) {
2215 pp_last = &sc->sc_isoc_p_last[0];
2217 if (*plen > xfer->max_frame_size) {
2221 printf("%s: frame length(%d) exceeds %d "
2222 "bytes (frame truncated)\n",
2223 __FUNCTION__, *plen,
2224 xfer->max_frame_size);
2227 *plen = xfer->max_frame_size;
2229 /* reuse td_token from last transfer */
2231 td->td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2232 td->td_token |= htole32(UHCI_TD_SET_MAXLEN(*plen));
2238 * Do not call "uhci_mem_layout_fixup()" when the
2246 /* fill out buffer pointer and do fixup, if any */
2248 uhci_mem_layout_fixup(&ml, td);
2254 td->td_status = htole32
2255 (UHCI_TD_ZERO_ACTLEN
2256 (UHCI_TD_SET_ERRCNT(0) |
2261 td->td_status = htole32
2262 (UHCI_TD_ZERO_ACTLEN
2263 (UHCI_TD_SET_ERRCNT(0) |
2268 usb_pc_cpu_flush(td->page_cache);
2271 if (uhcidebug > 5) {
2272 DPRINTF("TD %d\n", nframes);
2276 /* insert TD into schedule */
2277 UHCI_APPEND_TD(td, *pp_last);
2285 xfer->td_transfer_last = td_last;
2287 /* update isoc_next */
2288 xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_p_last[0]) &
2289 (UHCI_VFRAMELIST_COUNT - 1);
2293 uhci_device_isoc_start(struct usb_xfer *xfer)
2295 /* put transfer on interrupt queue */
2296 uhci_transfer_intr_enqueue(xfer);
2299 static const struct usb_pipe_methods uhci_device_isoc_methods =
2301 .open = uhci_device_isoc_open,
2302 .close = uhci_device_isoc_close,
2303 .enter = uhci_device_isoc_enter,
2304 .start = uhci_device_isoc_start,
2307 /*------------------------------------------------------------------------*
2308 * uhci root control support
2309 *------------------------------------------------------------------------*
2310 * Simulate a hardware hub by handling all the necessary requests.
2311 *------------------------------------------------------------------------*/
2314 struct usb_device_descriptor uhci_devd =
2316 sizeof(struct usb_device_descriptor),
2317 UDESC_DEVICE, /* type */
2318 {0x00, 0x01}, /* USB version */
2319 UDCLASS_HUB, /* class */
2320 UDSUBCLASS_HUB, /* subclass */
2321 UDPROTO_FSHUB, /* protocol */
2322 64, /* max packet */
2323 {0}, {0}, {0x00, 0x01}, /* device id */
2324 1, 2, 0, /* string indexes */
2325 1 /* # of configurations */
2328 static const struct uhci_config_desc uhci_confd = {
2330 .bLength = sizeof(struct usb_config_descriptor),
2331 .bDescriptorType = UDESC_CONFIG,
2332 .wTotalLength[0] = sizeof(uhci_confd),
2334 .bConfigurationValue = 1,
2335 .iConfiguration = 0,
2336 .bmAttributes = UC_SELF_POWERED,
2337 .bMaxPower = 0 /* max power */
2340 .bLength = sizeof(struct usb_interface_descriptor),
2341 .bDescriptorType = UDESC_INTERFACE,
2343 .bInterfaceClass = UICLASS_HUB,
2344 .bInterfaceSubClass = UISUBCLASS_HUB,
2345 .bInterfaceProtocol = UIPROTO_FSHUB,
2348 .bLength = sizeof(struct usb_endpoint_descriptor),
2349 .bDescriptorType = UDESC_ENDPOINT,
2350 .bEndpointAddress = UE_DIR_IN | UHCI_INTR_ENDPT,
2351 .bmAttributes = UE_INTERRUPT,
2352 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
2358 struct usb_hub_descriptor_min uhci_hubd_piix =
2360 .bDescLength = sizeof(uhci_hubd_piix),
2361 .bDescriptorType = UDESC_HUB,
2363 .wHubCharacteristics = {UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0},
2364 .bPwrOn2PwrGood = 50,
2368 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
2369 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
2370 * should not be used by the USB subsystem. As we cannot issue a
2371 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
2372 * will be enabled as part of the reset.
2374 * On the VT83C572, the port cannot be successfully enabled until the
2375 * outstanding "port enable change" and "connection status change"
2376 * events have been reset.
2379 uhci_portreset(uhci_softc_t *sc, uint16_t index)
2386 port = UHCI_PORTSC1;
2387 else if (index == 2)
2388 port = UHCI_PORTSC2;
2390 return (USB_ERR_IOERROR);
2393 * Before we do anything, turn on SOF messages on the USB
2394 * BUS. Some USB devices do not cope without them!
2398 x = URWMASK(UREAD2(sc, port));
2399 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2401 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2402 USB_MS_TO_TICKS(usb_port_root_reset_delay));
2404 DPRINTFN(4, "uhci port %d reset, status0 = 0x%04x\n",
2405 index, UREAD2(sc, port));
2407 x = URWMASK(UREAD2(sc, port));
2408 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2411 mtx_unlock(&sc->sc_bus.bus_mtx);
2414 * This delay needs to be exactly 100us, else some USB devices
2419 mtx_lock(&sc->sc_bus.bus_mtx);
2421 DPRINTFN(4, "uhci port %d reset, status1 = 0x%04x\n",
2422 index, UREAD2(sc, port));
2424 x = URWMASK(UREAD2(sc, port));
2425 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2427 for (lim = 0; lim < 12; lim++) {
2429 usb_pause_mtx(&sc->sc_bus.bus_mtx,
2430 USB_MS_TO_TICKS(usb_port_reset_delay));
2432 x = UREAD2(sc, port);
2434 DPRINTFN(4, "uhci port %d iteration %u, status = 0x%04x\n",
2437 if (!(x & UHCI_PORTSC_CCS)) {
2439 * No device is connected (or was disconnected
2440 * during reset). Consider the port reset.
2441 * The delay must be long enough to ensure on
2442 * the initial iteration that the device
2443 * connection will have been registered. 50ms
2444 * appears to be sufficient, but 20ms is not.
2446 DPRINTFN(4, "uhci port %d loop %u, device detached\n",
2450 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
2452 * Port enabled changed and/or connection
2453 * status changed were set. Reset either or
2454 * both raised flags (by writing a 1 to that
2455 * bit), and wait again for state to settle.
2457 UWRITE2(sc, port, URWMASK(x) |
2458 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
2461 if (x & UHCI_PORTSC_PE) {
2462 /* port is enabled */
2465 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
2468 DPRINTFN(2, "uhci port %d reset timed out\n", index);
2469 return (USB_ERR_TIMEOUT);
2472 DPRINTFN(4, "uhci port %d reset, status2 = 0x%04x\n",
2473 index, UREAD2(sc, port));
2476 return (USB_ERR_NORMAL_COMPLETION);
2480 uhci_roothub_exec(struct usb_device *udev,
2481 struct usb_device_request *req, const void **pptr, uint16_t *plength)
2483 uhci_softc_t *sc = UHCI_BUS2SC(udev->bus);
2485 const char *str_ptr;
2495 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2498 ptr = (const void *)&sc->sc_hub_desc.temp;
2502 value = UGETW(req->wValue);
2503 index = UGETW(req->wIndex);
2505 DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2506 "wValue=0x%04x wIndex=0x%04x\n",
2507 req->bmRequestType, req->bRequest,
2508 UGETW(req->wLength), value, index);
2510 #define C(x,y) ((x) | ((y) << 8))
2511 switch (C(req->bRequest, req->bmRequestType)) {
2512 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2513 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2514 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2516 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2517 * for the integrated root hub.
2520 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2522 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2524 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2525 switch (value >> 8) {
2527 if ((value & 0xff) != 0) {
2528 err = USB_ERR_IOERROR;
2531 len = sizeof(uhci_devd);
2532 ptr = (const void *)&uhci_devd;
2536 if ((value & 0xff) != 0) {
2537 err = USB_ERR_IOERROR;
2540 len = sizeof(uhci_confd);
2541 ptr = (const void *)&uhci_confd;
2545 switch (value & 0xff) {
2546 case 0: /* Language table */
2550 case 1: /* Vendor */
2551 str_ptr = sc->sc_vendor;
2554 case 2: /* Product */
2555 str_ptr = "UHCI root HUB";
2563 len = usb_make_str_desc
2564 (sc->sc_hub_desc.temp,
2565 sizeof(sc->sc_hub_desc.temp),
2570 err = USB_ERR_IOERROR;
2574 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2576 sc->sc_hub_desc.temp[0] = 0;
2578 case C(UR_GET_STATUS, UT_READ_DEVICE):
2580 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2582 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2583 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2585 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2587 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2588 if (value >= UHCI_MAX_DEVICES) {
2589 err = USB_ERR_IOERROR;
2592 sc->sc_addr = value;
2594 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2595 if ((value != 0) && (value != 1)) {
2596 err = USB_ERR_IOERROR;
2599 sc->sc_conf = value;
2601 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2603 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2604 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2605 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2606 err = USB_ERR_IOERROR;
2608 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2610 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2613 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2615 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2616 DPRINTFN(4, "UR_CLEAR_PORT_FEATURE "
2617 "port=%d feature=%d\n",
2620 port = UHCI_PORTSC1;
2621 else if (index == 2)
2622 port = UHCI_PORTSC2;
2624 err = USB_ERR_IOERROR;
2628 case UHF_PORT_ENABLE:
2629 x = URWMASK(UREAD2(sc, port));
2630 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
2632 case UHF_PORT_SUSPEND:
2633 x = URWMASK(UREAD2(sc, port));
2634 UWRITE2(sc, port, x & ~(UHCI_PORTSC_SUSP));
2636 case UHF_PORT_RESET:
2637 x = URWMASK(UREAD2(sc, port));
2638 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2640 case UHF_C_PORT_CONNECTION:
2641 x = URWMASK(UREAD2(sc, port));
2642 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
2644 case UHF_C_PORT_ENABLE:
2645 x = URWMASK(UREAD2(sc, port));
2646 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
2648 case UHF_C_PORT_OVER_CURRENT:
2649 x = URWMASK(UREAD2(sc, port));
2650 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
2652 case UHF_C_PORT_RESET:
2654 err = USB_ERR_NORMAL_COMPLETION;
2656 case UHF_C_PORT_SUSPEND:
2657 sc->sc_isresumed &= ~(1 << index);
2659 case UHF_PORT_CONNECTION:
2660 case UHF_PORT_OVER_CURRENT:
2661 case UHF_PORT_POWER:
2662 case UHF_PORT_LOW_SPEED:
2664 err = USB_ERR_IOERROR;
2668 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
2670 port = UHCI_PORTSC1;
2671 else if (index == 2)
2672 port = UHCI_PORTSC2;
2674 err = USB_ERR_IOERROR;
2678 sc->sc_hub_desc.temp[0] =
2679 ((UREAD2(sc, port) & UHCI_PORTSC_LS) >>
2680 UHCI_PORTSC_LS_SHIFT);
2682 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2683 if ((value & 0xff) != 0) {
2684 err = USB_ERR_IOERROR;
2687 len = sizeof(uhci_hubd_piix);
2688 ptr = (const void *)&uhci_hubd_piix;
2690 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2692 memset(sc->sc_hub_desc.temp, 0, 16);
2694 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2696 port = UHCI_PORTSC1;
2697 else if (index == 2)
2698 port = UHCI_PORTSC2;
2700 err = USB_ERR_IOERROR;
2703 x = UREAD2(sc, port);
2704 status = change = 0;
2705 if (x & UHCI_PORTSC_CCS)
2706 status |= UPS_CURRENT_CONNECT_STATUS;
2707 if (x & UHCI_PORTSC_CSC)
2708 change |= UPS_C_CONNECT_STATUS;
2709 if (x & UHCI_PORTSC_PE)
2710 status |= UPS_PORT_ENABLED;
2711 if (x & UHCI_PORTSC_POEDC)
2712 change |= UPS_C_PORT_ENABLED;
2713 if (x & UHCI_PORTSC_OCI)
2714 status |= UPS_OVERCURRENT_INDICATOR;
2715 if (x & UHCI_PORTSC_OCIC)
2716 change |= UPS_C_OVERCURRENT_INDICATOR;
2717 if (x & UHCI_PORTSC_LSDA)
2718 status |= UPS_LOW_SPEED;
2719 if ((x & UHCI_PORTSC_PE) && (x & UHCI_PORTSC_RD)) {
2720 /* need to do a write back */
2721 UWRITE2(sc, port, URWMASK(x));
2723 /* wait 20ms for resume sequence to complete */
2724 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
2726 /* clear suspend and resume detect */
2727 UWRITE2(sc, port, URWMASK(x) & ~(UHCI_PORTSC_RD |
2730 /* wait a little bit */
2731 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 500);
2733 sc->sc_isresumed |= (1 << index);
2735 } else if (x & UHCI_PORTSC_SUSP) {
2736 status |= UPS_SUSPEND;
2738 status |= UPS_PORT_POWER;
2739 if (sc->sc_isresumed & (1 << index))
2740 change |= UPS_C_SUSPEND;
2742 change |= UPS_C_PORT_RESET;
2743 USETW(sc->sc_hub_desc.ps.wPortStatus, status);
2744 USETW(sc->sc_hub_desc.ps.wPortChange, change);
2745 len = sizeof(sc->sc_hub_desc.ps);
2747 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2748 err = USB_ERR_IOERROR;
2750 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2752 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2754 port = UHCI_PORTSC1;
2755 else if (index == 2)
2756 port = UHCI_PORTSC2;
2758 err = USB_ERR_IOERROR;
2762 case UHF_PORT_ENABLE:
2763 x = URWMASK(UREAD2(sc, port));
2764 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
2766 case UHF_PORT_SUSPEND:
2767 x = URWMASK(UREAD2(sc, port));
2768 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
2770 case UHF_PORT_RESET:
2771 err = uhci_portreset(sc, index);
2773 case UHF_PORT_POWER:
2774 /* pretend we turned on power */
2775 err = USB_ERR_NORMAL_COMPLETION;
2777 case UHF_C_PORT_CONNECTION:
2778 case UHF_C_PORT_ENABLE:
2779 case UHF_C_PORT_OVER_CURRENT:
2780 case UHF_PORT_CONNECTION:
2781 case UHF_PORT_OVER_CURRENT:
2782 case UHF_PORT_LOW_SPEED:
2783 case UHF_C_PORT_SUSPEND:
2784 case UHF_C_PORT_RESET:
2786 err = USB_ERR_IOERROR;
2791 err = USB_ERR_IOERROR;
2801 * This routine is executed periodically and simulates interrupts from
2802 * the root controller interrupt pipe for port status change:
2805 uhci_root_intr(uhci_softc_t *sc)
2809 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2811 sc->sc_hub_idata[0] = 0;
2813 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC |
2814 UHCI_PORTSC_OCIC | UHCI_PORTSC_RD)) {
2815 sc->sc_hub_idata[0] |= 1 << 1;
2817 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC |
2818 UHCI_PORTSC_OCIC | UHCI_PORTSC_RD)) {
2819 sc->sc_hub_idata[0] |= 1 << 2;
2823 usb_callout_reset(&sc->sc_root_intr, hz,
2824 (void *)&uhci_root_intr, sc);
2826 if (sc->sc_hub_idata[0] != 0) {
2827 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2828 sizeof(sc->sc_hub_idata));
2833 uhci_xfer_setup(struct usb_setup_params *parm)
2835 struct usb_page_search page_info;
2836 struct usb_page_cache *pc;
2838 struct usb_xfer *xfer;
2846 sc = UHCI_BUS2SC(parm->udev->bus);
2847 xfer = parm->curr_xfer;
2849 parm->hc_max_packet_size = 0x500;
2850 parm->hc_max_packet_count = 1;
2851 parm->hc_max_frame_size = 0x500;
2854 * compute ntd and nqh
2856 if (parm->methods == &uhci_device_ctrl_methods) {
2857 xfer->flags_int.bdma_enable = 1;
2858 xfer->flags_int.bdma_no_post_sync = 1;
2860 usbd_transfer_setup_sub(parm);
2862 /* see EHCI HC driver for proof of "ntd" formula */
2865 ntd = ((2 * xfer->nframes) + 1 /* STATUS */
2866 + (xfer->max_data_length / xfer->max_frame_size));
2868 } else if (parm->methods == &uhci_device_bulk_methods) {
2869 xfer->flags_int.bdma_enable = 1;
2870 xfer->flags_int.bdma_no_post_sync = 1;
2872 usbd_transfer_setup_sub(parm);
2875 ntd = ((2 * xfer->nframes)
2876 + (xfer->max_data_length / xfer->max_frame_size));
2878 } else if (parm->methods == &uhci_device_intr_methods) {
2879 xfer->flags_int.bdma_enable = 1;
2880 xfer->flags_int.bdma_no_post_sync = 1;
2882 usbd_transfer_setup_sub(parm);
2885 ntd = ((2 * xfer->nframes)
2886 + (xfer->max_data_length / xfer->max_frame_size));
2888 } else if (parm->methods == &uhci_device_isoc_methods) {
2889 xfer->flags_int.bdma_enable = 1;
2890 xfer->flags_int.bdma_no_post_sync = 1;
2892 usbd_transfer_setup_sub(parm);
2895 ntd = xfer->nframes;
2899 usbd_transfer_setup_sub(parm);
2909 * NOTE: the UHCI controller requires that
2910 * every packet must be contiguous on
2911 * the same USB memory page !
2913 nfixup = (parm->bufsize / USB_PAGE_SIZE) + 1;
2916 * Compute a suitable power of two alignment
2917 * for our "max_frame_size" fixup buffer(s):
2919 align = xfer->max_frame_size;
2926 /* check for power of two */
2927 if (!(xfer->max_frame_size &
2928 (xfer->max_frame_size - 1))) {
2932 * We don't allow alignments of
2933 * less than 8 bytes:
2935 * NOTE: Allocating using an aligment
2936 * of 1 byte has special meaning!
2943 if (usbd_transfer_setup_sub_malloc(
2944 parm, &pc, xfer->max_frame_size,
2946 parm->err = USB_ERR_NOMEM;
2949 xfer->buf_fixup = pc;
2958 if (usbd_transfer_setup_sub_malloc(
2959 parm, &pc, sizeof(uhci_td_t),
2960 UHCI_TD_ALIGN, ntd)) {
2961 parm->err = USB_ERR_NOMEM;
2965 for (n = 0; n != ntd; n++) {
2968 usbd_get_page(pc + n, 0, &page_info);
2970 td = page_info.buffer;
2973 if ((parm->methods == &uhci_device_bulk_methods) ||
2974 (parm->methods == &uhci_device_ctrl_methods) ||
2975 (parm->methods == &uhci_device_intr_methods)) {
2976 /* set depth first bit */
2977 td->td_self = htole32(page_info.physaddr |
2978 UHCI_PTR_TD | UHCI_PTR_VF);
2980 td->td_self = htole32(page_info.physaddr |
2984 td->obj_next = last_obj;
2985 td->page_cache = pc + n;
2989 usb_pc_cpu_flush(pc + n);
2992 xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2996 if (usbd_transfer_setup_sub_malloc(
2997 parm, &pc, sizeof(uhci_qh_t),
2998 UHCI_QH_ALIGN, nqh)) {
2999 parm->err = USB_ERR_NOMEM;
3003 for (n = 0; n != nqh; n++) {
3006 usbd_get_page(pc + n, 0, &page_info);
3008 qh = page_info.buffer;
3011 qh->qh_self = htole32(page_info.physaddr | UHCI_PTR_QH);
3012 qh->obj_next = last_obj;
3013 qh->page_cache = pc + n;
3017 usb_pc_cpu_flush(pc + n);
3020 xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3022 if (!xfer->flags_int.curr_dma_set) {
3023 xfer->flags_int.curr_dma_set = 1;
3029 uhci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3030 struct usb_endpoint *ep)
3032 uhci_softc_t *sc = UHCI_BUS2SC(udev->bus);
3034 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3036 edesc->bEndpointAddress, udev->flags.usb_mode,
3039 if (udev->device_index != sc->sc_addr) {
3040 switch (edesc->bmAttributes & UE_XFERTYPE) {
3042 ep->methods = &uhci_device_ctrl_methods;
3045 ep->methods = &uhci_device_intr_methods;
3047 case UE_ISOCHRONOUS:
3048 if (udev->speed == USB_SPEED_FULL) {
3049 ep->methods = &uhci_device_isoc_methods;
3053 ep->methods = &uhci_device_bulk_methods;
3063 uhci_xfer_unsetup(struct usb_xfer *xfer)
3069 uhci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
3072 * Wait until hardware has finished any possible use of the
3073 * transfer descriptor(s) and QH
3075 *pus = (1125); /* microseconds */
3079 uhci_device_resume(struct usb_device *udev)
3081 struct uhci_softc *sc = UHCI_BUS2SC(udev->bus);
3082 struct usb_xfer *xfer;
3083 const struct usb_pipe_methods *methods;
3088 USB_BUS_LOCK(udev->bus);
3090 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3092 if (xfer->xroot->udev == udev) {
3094 methods = xfer->endpoint->methods;
3095 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
3097 if (methods == &uhci_device_bulk_methods) {
3098 UHCI_APPEND_QH(qh, sc->sc_bulk_p_last);
3100 xfer->flags_int.bandwidth_reclaimed = 1;
3102 if (methods == &uhci_device_ctrl_methods) {
3103 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
3104 UHCI_APPEND_QH(qh, sc->sc_ls_ctl_p_last);
3106 UHCI_APPEND_QH(qh, sc->sc_fs_ctl_p_last);
3109 if (methods == &uhci_device_intr_methods) {
3110 UHCI_APPEND_QH(qh, sc->sc_intr_p_last[xfer->qh_pos]);
3115 USB_BUS_UNLOCK(udev->bus);
3121 uhci_device_suspend(struct usb_device *udev)
3123 struct uhci_softc *sc = UHCI_BUS2SC(udev->bus);
3124 struct usb_xfer *xfer;
3125 const struct usb_pipe_methods *methods;
3130 USB_BUS_LOCK(udev->bus);
3132 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3134 if (xfer->xroot->udev == udev) {
3136 methods = xfer->endpoint->methods;
3137 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
3139 if (xfer->flags_int.bandwidth_reclaimed) {
3140 xfer->flags_int.bandwidth_reclaimed = 0;
3143 if (methods == &uhci_device_bulk_methods) {
3144 UHCI_REMOVE_QH(qh, sc->sc_bulk_p_last);
3146 if (methods == &uhci_device_ctrl_methods) {
3147 if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
3148 UHCI_REMOVE_QH(qh, sc->sc_ls_ctl_p_last);
3150 UHCI_REMOVE_QH(qh, sc->sc_fs_ctl_p_last);
3153 if (methods == &uhci_device_intr_methods) {
3154 UHCI_REMOVE_QH(qh, sc->sc_intr_p_last[xfer->qh_pos]);
3159 USB_BUS_UNLOCK(udev->bus);
3165 uhci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
3167 struct uhci_softc *sc = UHCI_BUS2SC(bus);
3170 case USB_HW_POWER_SUSPEND:
3171 case USB_HW_POWER_SHUTDOWN:
3174 case USB_HW_POWER_RESUME:
3183 uhci_set_hw_power(struct usb_bus *bus)
3185 struct uhci_softc *sc = UHCI_BUS2SC(bus);
3192 flags = bus->hw_power_state;
3195 * WARNING: Some FULL speed USB devices require periodic SOF
3196 * messages! If any USB devices are connected through the
3197 * UHCI, power save will be disabled!
3199 if (flags & (USB_HW_POWER_CONTROL |
3200 USB_HW_POWER_NON_ROOT_HUB |
3202 USB_HW_POWER_INTERRUPT |
3203 USB_HW_POWER_ISOC)) {
3204 DPRINTF("Some USB transfer is "
3205 "active on unit %u.\n",
3206 device_get_unit(sc->sc_bus.bdev));
3209 DPRINTF("Power save on unit %u.\n",
3210 device_get_unit(sc->sc_bus.bdev));
3211 UHCICMD(sc, UHCI_CMD_MAXP);
3214 USB_BUS_UNLOCK(bus);
3220 static const struct usb_bus_methods uhci_bus_methods =
3222 .endpoint_init = uhci_ep_init,
3223 .xfer_setup = uhci_xfer_setup,
3224 .xfer_unsetup = uhci_xfer_unsetup,
3225 .get_dma_delay = uhci_get_dma_delay,
3226 .device_resume = uhci_device_resume,
3227 .device_suspend = uhci_device_suspend,
3228 .set_hw_power = uhci_set_hw_power,
3229 .set_hw_power_sleep = uhci_set_hw_power_sleep,
3230 .roothub_exec = uhci_roothub_exec,
3231 .xfer_poll = uhci_do_poll,