3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net) at
10 * Carlstedt Research & Technology.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
37 #define PCI_UHCI_BASE_REG 0x20
39 /* PCI config registers */
40 #define PCI_USBREV 0x60 /* USB protocol revision */
41 #define PCI_USB_REV_MASK 0xff
42 #define PCI_USB_REV_PRE_1_0 0x00
43 #define PCI_USB_REV_1_0 0x10
44 #define PCI_USB_REV_1_1 0x11
45 #define PCI_LEGSUP 0xc0 /* Legacy Support register */
46 #define PCI_LEGSUP_USBPIRQDEN 0x2000 /* USB PIRQ D Enable */
47 #define PCI_CBIO 0x20 /* configuration base IO */
48 #define PCI_INTERFACE_UHCI 0x00
52 #define UHCI_CMD_RS 0x0001
53 #define UHCI_CMD_HCRESET 0x0002
54 #define UHCI_CMD_GRESET 0x0004
55 #define UHCI_CMD_EGSM 0x0008
56 #define UHCI_CMD_FGR 0x0010
57 #define UHCI_CMD_SWDBG 0x0020
58 #define UHCI_CMD_CF 0x0040
59 #define UHCI_CMD_MAXP 0x0080
61 #define UHCI_STS_USBINT 0x0001
62 #define UHCI_STS_USBEI 0x0002
63 #define UHCI_STS_RD 0x0004
64 #define UHCI_STS_HSE 0x0008
65 #define UHCI_STS_HCPE 0x0010
66 #define UHCI_STS_HCH 0x0020
67 #define UHCI_STS_ALLINTRS 0x003f
68 #define UHCI_INTR 0x04
69 #define UHCI_INTR_TOCRCIE 0x0001
70 #define UHCI_INTR_RIE 0x0002
71 #define UHCI_INTR_IOCE 0x0004
72 #define UHCI_INTR_SPIE 0x0008
73 #define UHCI_FRNUM 0x06
74 #define UHCI_FRNUM_MASK 0x03ff
75 #define UHCI_FLBASEADDR 0x08
77 #define UHCI_SOF_MASK 0x7f
78 #define UHCI_PORTSC1 0x010
79 #define UHCI_PORTSC2 0x012
80 #define UHCI_PORTSC_CCS 0x0001
81 #define UHCI_PORTSC_CSC 0x0002
82 #define UHCI_PORTSC_PE 0x0004
83 #define UHCI_PORTSC_POEDC 0x0008
84 #define UHCI_PORTSC_LS 0x0030
85 #define UHCI_PORTSC_LS_SHIFT 4
86 #define UHCI_PORTSC_RD 0x0040
87 #define UHCI_PORTSC_LSDA 0x0100
88 #define UHCI_PORTSC_PR 0x0200
89 #define UHCI_PORTSC_OCI 0x0400
90 #define UHCI_PORTSC_OCIC 0x0800
91 #define UHCI_PORTSC_SUSP 0x1000
93 #define URWMASK(x) ((x) & (UHCI_PORTSC_SUSP | \
94 UHCI_PORTSC_PR | UHCI_PORTSC_RD | \
97 #endif /* _UHCIREG_H_ */