3 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5 * Copyright (c) 2008 Hans Petter Selasky <hselasky@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * This file contains the driver for the USS820 series USB Device
34 * NOTE: The datasheet does not document everything.
37 #ifdef USB_GLOBAL_INCLUDE_FILE
38 #include USB_GLOBAL_INCLUDE_FILE
40 #include <sys/stdint.h>
41 #include <sys/stddef.h>
42 #include <sys/param.h>
43 #include <sys/queue.h>
44 #include <sys/types.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
48 #include <sys/module.h>
50 #include <sys/mutex.h>
51 #include <sys/condvar.h>
52 #include <sys/sysctl.h>
54 #include <sys/unistd.h>
55 #include <sys/callout.h>
56 #include <sys/malloc.h>
59 #include <dev/usb/usb.h>
60 #include <dev/usb/usbdi.h>
62 #define USB_DEBUG_VAR uss820dcidebug
64 #include <dev/usb/usb_core.h>
65 #include <dev/usb/usb_debug.h>
66 #include <dev/usb/usb_busdma.h>
67 #include <dev/usb/usb_process.h>
68 #include <dev/usb/usb_transfer.h>
69 #include <dev/usb/usb_device.h>
70 #include <dev/usb/usb_hub.h>
71 #include <dev/usb/usb_util.h>
73 #include <dev/usb/usb_controller.h>
74 #include <dev/usb/usb_bus.h>
75 #endif /* USB_GLOBAL_INCLUDE_FILE */
77 #include <dev/usb/controller/uss820dci.h>
79 #define USS820_DCI_BUS2SC(bus) \
80 ((struct uss820dci_softc *)(((uint8_t *)(bus)) - \
81 ((uint8_t *)&(((struct uss820dci_softc *)0)->sc_bus))))
83 #define USS820_DCI_PC2SC(pc) \
84 USS820_DCI_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
86 #define USS820_DCI_THREAD_IRQ \
87 (USS820_SSR_SUSPEND | USS820_SSR_RESUME | USS820_SSR_RESET)
90 static int uss820dcidebug = 0;
92 static SYSCTL_NODE(_hw_usb, OID_AUTO, uss820dci, CTLFLAG_RW, 0,
94 SYSCTL_INT(_hw_usb_uss820dci, OID_AUTO, debug, CTLFLAG_RWTUN,
95 &uss820dcidebug, 0, "uss820dci debug level");
98 #define USS820_DCI_INTR_ENDPT 1
102 static const struct usb_bus_methods uss820dci_bus_methods;
103 static const struct usb_pipe_methods uss820dci_device_bulk_methods;
104 static const struct usb_pipe_methods uss820dci_device_ctrl_methods;
105 static const struct usb_pipe_methods uss820dci_device_intr_methods;
106 static const struct usb_pipe_methods uss820dci_device_isoc_fs_methods;
108 static uss820dci_cmd_t uss820dci_setup_rx;
109 static uss820dci_cmd_t uss820dci_data_rx;
110 static uss820dci_cmd_t uss820dci_data_tx;
111 static uss820dci_cmd_t uss820dci_data_tx_sync;
112 static void uss820dci_device_done(struct usb_xfer *, usb_error_t);
113 static void uss820dci_do_poll(struct usb_bus *);
114 static void uss820dci_standard_done(struct usb_xfer *);
115 static void uss820dci_intr_set(struct usb_xfer *, uint8_t);
116 static void uss820dci_update_shared_1(struct uss820dci_softc *, uint8_t,
118 static void uss820dci_root_intr(struct uss820dci_softc *);
121 * Here is a list of what the USS820D chip can support. The main
122 * limitation is that the sum of the buffer sizes must be less than
125 static const struct usb_hw_ep_profile
126 uss820dci_ep_profile[] = {
129 .max_in_frame_size = 32,
130 .max_out_frame_size = 32,
132 .support_control = 1,
135 .max_in_frame_size = 64,
136 .max_out_frame_size = 64,
138 .support_multi_buffer = 1,
140 .support_interrupt = 1,
145 .max_in_frame_size = 8,
146 .max_out_frame_size = 8,
148 .support_multi_buffer = 1,
150 .support_interrupt = 1,
155 .max_in_frame_size = 256,
156 .max_out_frame_size = 256,
158 .support_multi_buffer = 1,
159 .support_isochronous = 1,
166 uss820dci_update_shared_1(struct uss820dci_softc *sc, uint8_t reg,
167 uint8_t keep_mask, uint8_t set_mask)
171 USS820_WRITE_1(sc, USS820_PEND, 1);
172 temp = USS820_READ_1(sc, reg);
175 USS820_WRITE_1(sc, reg, temp);
176 USS820_WRITE_1(sc, USS820_PEND, 0);
180 uss820dci_get_hw_ep_profile(struct usb_device *udev,
181 const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
184 *ppf = uss820dci_ep_profile + 0;
185 } else if (ep_addr < 5) {
186 *ppf = uss820dci_ep_profile + 1;
187 } else if (ep_addr < 7) {
188 *ppf = uss820dci_ep_profile + 2;
189 } else if (ep_addr == 7) {
190 *ppf = uss820dci_ep_profile + 3;
197 uss820dci_pull_up(struct uss820dci_softc *sc)
201 /* pullup D+, if possible */
203 if (!sc->sc_flags.d_pulled_up &&
204 sc->sc_flags.port_powered) {
205 sc->sc_flags.d_pulled_up = 1;
209 temp = USS820_READ_1(sc, USS820_MCSR);
210 temp |= USS820_MCSR_DPEN;
211 USS820_WRITE_1(sc, USS820_MCSR, temp);
216 uss820dci_pull_down(struct uss820dci_softc *sc)
220 /* pulldown D+, if possible */
222 if (sc->sc_flags.d_pulled_up) {
223 sc->sc_flags.d_pulled_up = 0;
227 temp = USS820_READ_1(sc, USS820_MCSR);
228 temp &= ~USS820_MCSR_DPEN;
229 USS820_WRITE_1(sc, USS820_MCSR, temp);
234 uss820dci_wakeup_peer(struct uss820dci_softc *sc)
236 if (!(sc->sc_flags.status_suspend)) {
239 DPRINTFN(0, "not supported\n");
243 uss820dci_set_address(struct uss820dci_softc *sc, uint8_t addr)
245 DPRINTFN(5, "addr=%d\n", addr);
247 USS820_WRITE_1(sc, USS820_FADDR, addr);
251 uss820dci_setup_rx(struct uss820dci_softc *sc, struct uss820dci_td *td)
253 struct usb_device_request req;
258 /* select the correct endpoint */
259 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index);
261 /* read out FIFO status */
262 rx_stat = USS820_READ_1(sc, USS820_RXSTAT);
264 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
266 if (!(rx_stat & USS820_RXSTAT_RXSETUP)) {
269 /* clear did stall */
272 /* clear stall and all I/O */
273 uss820dci_update_shared_1(sc, USS820_EPCON,
274 0xFF ^ (USS820_EPCON_TXSTL |
277 USS820_EPCON_TXOE), 0);
279 /* clear end overwrite flag */
280 uss820dci_update_shared_1(sc, USS820_RXSTAT,
281 0xFF ^ USS820_RXSTAT_EDOVW, 0);
283 /* get the packet byte count */
284 count = USS820_READ_1(sc, USS820_RXCNTL);
285 count |= (USS820_READ_1(sc, USS820_RXCNTH) << 8);
288 /* verify data length */
289 if (count != td->remainder) {
290 DPRINTFN(0, "Invalid SETUP packet "
291 "length, %d bytes\n", count);
292 goto setup_not_complete;
294 if (count != sizeof(req)) {
295 DPRINTFN(0, "Unsupported SETUP packet "
296 "length, %d bytes\n", count);
297 goto setup_not_complete;
300 bus_space_read_multi_1(sc->sc_io_tag, sc->sc_io_hdl,
301 USS820_RXDAT * USS820_REG_STRIDE, (void *)&req, sizeof(req));
303 /* read out FIFO status */
304 rx_stat = USS820_READ_1(sc, USS820_RXSTAT);
306 if (rx_stat & (USS820_RXSTAT_EDOVW |
307 USS820_RXSTAT_STOVW)) {
308 DPRINTF("new SETUP packet received\n");
309 return (1); /* not complete */
311 /* clear receive setup bit */
312 uss820dci_update_shared_1(sc, USS820_RXSTAT,
313 0xFF ^ (USS820_RXSTAT_RXSETUP |
314 USS820_RXSTAT_EDOVW |
315 USS820_RXSTAT_STOVW), 0);
318 temp = USS820_READ_1(sc, USS820_RXCON);
319 temp |= USS820_RXCON_RXFFRC;
320 USS820_WRITE_1(sc, USS820_RXCON, temp);
322 /* copy data into real buffer */
323 usbd_copy_in(td->pc, 0, &req, sizeof(req));
325 td->offset = sizeof(req);
328 /* sneak peek the set address */
329 if ((req.bmRequestType == UT_WRITE_DEVICE) &&
330 (req.bRequest == UR_SET_ADDRESS)) {
331 sc->sc_dv_addr = req.wValue[0] & 0x7F;
333 sc->sc_dv_addr = 0xFF;
337 temp = USS820_READ_1(sc, USS820_TXCON);
338 temp |= USS820_TXCON_TXCLR;
339 USS820_WRITE_1(sc, USS820_TXCON, temp);
340 temp &= ~USS820_TXCON_TXCLR;
341 USS820_WRITE_1(sc, USS820_TXCON, temp);
343 return (0); /* complete */
348 temp = USS820_READ_1(sc, USS820_RXCON);
349 temp |= USS820_RXCON_RXFFRC;
350 USS820_WRITE_1(sc, USS820_RXCON, temp);
355 /* abort any ongoing transfer */
356 if (!td->did_stall) {
357 DPRINTFN(5, "stalling\n");
359 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF,
360 (USS820_EPCON_TXSTL | USS820_EPCON_RXSTL));
365 /* clear end overwrite flag, if any */
366 if (rx_stat & USS820_RXSTAT_RXSETUP) {
367 uss820dci_update_shared_1(sc, USS820_RXSTAT,
368 0xFF ^ (USS820_RXSTAT_EDOVW |
369 USS820_RXSTAT_STOVW |
370 USS820_RXSTAT_RXSETUP), 0);
372 return (1); /* not complete */
376 uss820dci_data_rx(struct uss820dci_softc *sc, struct uss820dci_td *td)
378 struct usb_page_search buf_res;
386 to = 2; /* don't loop forever! */
389 /* select the correct endpoint */
390 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index);
392 /* check if any of the FIFO banks have data */
394 /* read out FIFO flag */
395 rx_flag = USS820_READ_1(sc, USS820_RXFLG);
396 /* read out FIFO status */
397 rx_stat = USS820_READ_1(sc, USS820_RXSTAT);
399 DPRINTFN(5, "rx_stat=0x%02x rx_flag=0x%02x rem=%u\n",
400 rx_stat, rx_flag, td->remainder);
402 if (rx_stat & (USS820_RXSTAT_RXSETUP |
403 USS820_RXSTAT_RXSOVW |
404 USS820_RXSTAT_EDOVW)) {
405 if (td->remainder == 0 && td->ep_index == 0) {
407 * We are actually complete and have
408 * received the next SETUP
410 DPRINTFN(5, "faking complete\n");
411 return (0); /* complete */
414 * USB Host Aborted the transfer.
417 return (0); /* complete */
419 /* check for errors */
420 if (rx_flag & (USS820_RXFLG_RXOVF |
421 USS820_RXFLG_RXURF)) {
422 DPRINTFN(5, "overflow or underflow\n");
423 /* should not happen */
425 return (0); /* complete */
428 if (!(rx_flag & (USS820_RXFLG_RXFIF0 |
429 USS820_RXFLG_RXFIF1))) {
431 /* read out EPCON register */
432 /* enable RX input */
433 if (!td->did_enable) {
434 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
435 USS820_EPCON, 0xFF, USS820_EPCON_RXIE);
438 return (1); /* not complete */
440 /* get the packet byte count */
441 count = USS820_READ_1(sc, USS820_RXCNTL);
442 count |= (USS820_READ_1(sc, USS820_RXCNTH) << 8);
445 DPRINTFN(5, "count=0x%04x\n", count);
447 /* verify the packet byte count */
448 if (count != td->max_packet_size) {
449 if (count < td->max_packet_size) {
450 /* we have a short packet */
454 /* invalid USB packet */
456 return (0); /* we are complete */
459 /* verify the packet byte count */
460 if (count > td->remainder) {
461 /* invalid USB packet */
463 return (0); /* we are complete */
466 usbd_get_page(td->pc, td->offset, &buf_res);
468 /* get correct length */
469 if (buf_res.length > count) {
470 buf_res.length = count;
473 bus_space_read_multi_1(sc->sc_io_tag, sc->sc_io_hdl,
474 USS820_RXDAT * USS820_REG_STRIDE, buf_res.buffer, buf_res.length);
476 /* update counters */
477 count -= buf_res.length;
478 td->offset += buf_res.length;
479 td->remainder -= buf_res.length;
483 rx_cntl = USS820_READ_1(sc, USS820_RXCON);
484 rx_cntl |= USS820_RXCON_RXFFRC;
485 USS820_WRITE_1(sc, USS820_RXCON, rx_cntl);
487 /* check if we are complete */
488 if ((td->remainder == 0) || got_short) {
490 /* we are complete */
493 /* else need to receive a zero length packet */
498 return (1); /* not complete */
502 uss820dci_data_tx(struct uss820dci_softc *sc, struct uss820dci_td *td)
504 struct usb_page_search buf_res;
511 /* select the correct endpoint */
512 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index);
514 to = 2; /* don't loop forever! */
517 /* read out TX FIFO flags */
518 tx_flag = USS820_READ_1(sc, USS820_TXFLG);
520 DPRINTFN(5, "tx_flag=0x%02x rem=%u\n", tx_flag, td->remainder);
522 if (td->ep_index == 0) {
523 /* read out RX FIFO status last */
524 rx_stat = USS820_READ_1(sc, USS820_RXSTAT);
526 DPRINTFN(5, "rx_stat=0x%02x\n", rx_stat);
528 if (rx_stat & (USS820_RXSTAT_RXSETUP |
529 USS820_RXSTAT_RXSOVW |
530 USS820_RXSTAT_EDOVW)) {
532 * The current transfer was aborted by the USB
536 return (0); /* complete */
539 if (tx_flag & (USS820_TXFLG_TXOVF |
540 USS820_TXFLG_TXURF)) {
542 return (0); /* complete */
544 if (tx_flag & USS820_TXFLG_TXFIF0) {
545 if (tx_flag & USS820_TXFLG_TXFIF1) {
546 return (1); /* not complete */
549 if ((!td->support_multi_buffer) &&
550 (tx_flag & (USS820_TXFLG_TXFIF0 |
551 USS820_TXFLG_TXFIF1))) {
552 return (1); /* not complete */
554 count = td->max_packet_size;
555 if (td->remainder < count) {
556 /* we have a short packet */
558 count = td->remainder;
563 usbd_get_page(td->pc, td->offset, &buf_res);
565 /* get correct length */
566 if (buf_res.length > count) {
567 buf_res.length = count;
570 bus_space_write_multi_1(sc->sc_io_tag, sc->sc_io_hdl,
571 USS820_TXDAT * USS820_REG_STRIDE, buf_res.buffer, buf_res.length);
573 /* update counters */
574 count -= buf_res.length;
575 td->offset += buf_res.length;
576 td->remainder -= buf_res.length;
579 /* post-write high packet byte count first */
580 USS820_WRITE_1(sc, USS820_TXCNTH, count_copy >> 8);
582 /* post-write low packet byte count last */
583 USS820_WRITE_1(sc, USS820_TXCNTL, count_copy);
586 * Enable TX output, which must happen after that we have written
587 * data into the FIFO. This is undocumented.
589 if (!td->did_enable) {
590 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
591 USS820_EPCON, 0xFF, USS820_EPCON_TXOE);
594 /* check remainder */
595 if (td->remainder == 0) {
597 return (0); /* complete */
599 /* else we need to transmit a short packet */
604 return (1); /* not complete */
608 uss820dci_data_tx_sync(struct uss820dci_softc *sc, struct uss820dci_td *td)
613 /* select the correct endpoint */
614 USS820_WRITE_1(sc, USS820_EPINDEX, td->ep_index);
616 /* read out TX FIFO flag */
617 tx_flag = USS820_READ_1(sc, USS820_TXFLG);
619 if (td->ep_index == 0) {
620 /* read out RX FIFO status last */
621 rx_stat = USS820_READ_1(sc, USS820_RXSTAT);
623 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
625 if (rx_stat & (USS820_RXSTAT_RXSETUP |
626 USS820_RXSTAT_RXSOVW |
627 USS820_RXSTAT_EDOVW)) {
628 DPRINTFN(5, "faking complete\n");
630 return (0); /* complete */
633 DPRINTFN(5, "tx_flag=0x%02x rem=%u\n", tx_flag, td->remainder);
635 if (tx_flag & (USS820_TXFLG_TXOVF |
636 USS820_TXFLG_TXURF)) {
638 return (0); /* complete */
640 if (tx_flag & (USS820_TXFLG_TXFIF0 |
641 USS820_TXFLG_TXFIF1)) {
642 return (1); /* not complete */
644 if (td->ep_index == 0 && sc->sc_dv_addr != 0xFF) {
645 /* write function address */
646 uss820dci_set_address(sc, sc->sc_dv_addr);
648 return (0); /* complete */
652 uss820dci_xfer_do_fifo(struct usb_xfer *xfer)
654 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
655 struct uss820dci_td *td;
659 td = xfer->td_transfer_cache;
664 if ((td->func) (sc, td)) {
665 /* operation in progress */
668 if (((void *)td) == xfer->td_transfer_last) {
673 } else if (td->remainder > 0) {
675 * We had a short transfer. If there is no alternate
676 * next, stop processing !
683 * Fetch the next transfer descriptor.
686 xfer->td_transfer_cache = td;
691 /* compute all actual lengths */
692 xfer->td_transfer_cache = NULL;
693 sc->sc_xfer_complete = 1;
697 uss820dci_xfer_do_complete(struct usb_xfer *xfer)
699 struct uss820dci_td *td;
703 td = xfer->td_transfer_cache;
705 /* compute all actual lengths */
706 uss820dci_standard_done(xfer);
713 uss820dci_interrupt_poll_locked(struct uss820dci_softc *sc)
715 struct usb_xfer *xfer;
717 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry)
718 uss820dci_xfer_do_fifo(xfer);
722 uss820dci_interrupt_complete_locked(struct uss820dci_softc *sc)
724 struct usb_xfer *xfer;
726 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
727 if (uss820dci_xfer_do_complete(xfer))
733 uss820dci_wait_suspend(struct uss820dci_softc *sc, uint8_t on)
738 scr = USS820_READ_1(sc, USS820_SCR);
739 scratch = USS820_READ_1(sc, USS820_SCRATCH);
742 scr |= USS820_SCR_IE_SUSP;
743 scratch &= ~USS820_SCRATCH_IE_RESUME;
745 scr &= ~USS820_SCR_IE_SUSP;
746 scratch |= USS820_SCRATCH_IE_RESUME;
749 USS820_WRITE_1(sc, USS820_SCR, scr);
750 USS820_WRITE_1(sc, USS820_SCRATCH, scratch);
754 uss820dci_filter_interrupt(void *arg)
756 struct uss820dci_softc *sc = arg;
757 int retval = FILTER_HANDLED;
760 USB_BUS_SPIN_LOCK(&sc->sc_bus);
762 ssr = USS820_READ_1(sc, USS820_SSR);
763 uss820dci_update_shared_1(sc, USS820_SSR, USS820_DCI_THREAD_IRQ, 0);
765 if (ssr & USS820_DCI_THREAD_IRQ)
766 retval = FILTER_SCHEDULE_THREAD;
768 /* poll FIFOs, if any */
769 uss820dci_interrupt_poll_locked(sc);
771 if (sc->sc_xfer_complete != 0)
772 retval = FILTER_SCHEDULE_THREAD;
774 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
780 uss820dci_interrupt(void *arg)
782 struct uss820dci_softc *sc = arg;
786 USB_BUS_LOCK(&sc->sc_bus);
787 USB_BUS_SPIN_LOCK(&sc->sc_bus);
789 ssr = USS820_READ_1(sc, USS820_SSR);
791 /* acknowledge all interrupts */
793 uss820dci_update_shared_1(sc, USS820_SSR, ~USS820_DCI_THREAD_IRQ, 0);
795 /* check for any bus state change interrupts */
797 if (ssr & USS820_DCI_THREAD_IRQ) {
801 if (ssr & USS820_SSR_RESET) {
802 sc->sc_flags.status_bus_reset = 1;
803 sc->sc_flags.status_suspend = 0;
804 sc->sc_flags.change_suspend = 0;
805 sc->sc_flags.change_connect = 1;
807 /* disable resume interrupt */
808 uss820dci_wait_suspend(sc, 1);
813 * If "RESUME" and "SUSPEND" is set at the same time
814 * we interpret that like "RESUME". Resume is set when
815 * there is at least 3 milliseconds of inactivity on
818 if (ssr & USS820_SSR_RESUME) {
819 if (sc->sc_flags.status_suspend) {
820 sc->sc_flags.status_suspend = 0;
821 sc->sc_flags.change_suspend = 1;
822 /* disable resume interrupt */
823 uss820dci_wait_suspend(sc, 1);
826 } else if (ssr & USS820_SSR_SUSPEND) {
827 if (!sc->sc_flags.status_suspend) {
828 sc->sc_flags.status_suspend = 1;
829 sc->sc_flags.change_suspend = 1;
830 /* enable resume interrupt */
831 uss820dci_wait_suspend(sc, 0);
837 DPRINTF("real bus interrupt 0x%02x\n", ssr);
839 /* complete root HUB interrupt endpoint */
840 uss820dci_root_intr(sc);
843 /* acknowledge all SBI interrupts */
844 uss820dci_update_shared_1(sc, USS820_SBI, 0, 0);
846 /* acknowledge all SBI1 interrupts */
847 uss820dci_update_shared_1(sc, USS820_SBI1, 0, 0);
849 if (sc->sc_xfer_complete != 0) {
850 sc->sc_xfer_complete = 0;
852 /* complete FIFOs, if any */
853 uss820dci_interrupt_complete_locked(sc);
855 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
856 USB_BUS_UNLOCK(&sc->sc_bus);
860 uss820dci_setup_standard_chain_sub(struct uss820_std_temp *temp)
862 struct uss820dci_td *td;
864 /* get current Transfer Descriptor */
868 /* prepare for next TD */
869 temp->td_next = td->obj_next;
871 /* fill out the Transfer Descriptor */
872 td->func = temp->func;
874 td->offset = temp->offset;
875 td->remainder = temp->len;
878 td->did_stall = temp->did_stall;
879 td->short_pkt = temp->short_pkt;
880 td->alt_next = temp->setup_alt_next;
884 uss820dci_setup_standard_chain(struct usb_xfer *xfer)
886 struct uss820_std_temp temp;
887 struct uss820dci_softc *sc;
888 struct uss820dci_td *td;
892 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
893 xfer->address, UE_GET_ADDR(xfer->endpointno),
894 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
896 temp.max_frame_size = xfer->max_frame_size;
898 td = xfer->td_start[0];
899 xfer->td_transfer_first = td;
900 xfer->td_transfer_cache = td;
906 temp.td_next = xfer->td_start[0];
908 temp.setup_alt_next = xfer->flags_int.short_frames_ok ||
909 xfer->flags_int.isochronous_xfr;
910 temp.did_stall = !xfer->flags_int.control_stall;
912 sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
913 ep_no = (xfer->endpointno & UE_ADDR);
915 /* check if we should prepend a setup message */
917 if (xfer->flags_int.control_xfr) {
918 if (xfer->flags_int.control_hdr) {
920 temp.func = &uss820dci_setup_rx;
921 temp.len = xfer->frlengths[0];
922 temp.pc = xfer->frbuffers + 0;
923 temp.short_pkt = temp.len ? 1 : 0;
924 /* check for last frame */
925 if (xfer->nframes == 1) {
926 /* no STATUS stage yet, SETUP is last */
927 if (xfer->flags_int.control_act)
928 temp.setup_alt_next = 0;
931 uss820dci_setup_standard_chain_sub(&temp);
938 if (x != xfer->nframes) {
939 if (xfer->endpointno & UE_DIR_IN) {
940 temp.func = &uss820dci_data_tx;
942 temp.func = &uss820dci_data_rx;
945 /* setup "pc" pointer */
946 temp.pc = xfer->frbuffers + x;
948 while (x != xfer->nframes) {
950 /* DATA0 / DATA1 message */
952 temp.len = xfer->frlengths[x];
956 if (x == xfer->nframes) {
957 if (xfer->flags_int.control_xfr) {
958 if (xfer->flags_int.control_act) {
959 temp.setup_alt_next = 0;
962 temp.setup_alt_next = 0;
967 /* make sure that we send an USB packet */
973 /* regular data transfer */
975 temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
978 uss820dci_setup_standard_chain_sub(&temp);
980 if (xfer->flags_int.isochronous_xfr) {
981 temp.offset += temp.len;
983 /* get next Page Cache pointer */
984 temp.pc = xfer->frbuffers + x;
988 /* check for control transfer */
989 if (xfer->flags_int.control_xfr) {
992 /* always setup a valid "pc" pointer for status and sync */
993 temp.pc = xfer->frbuffers + 0;
996 temp.setup_alt_next = 0;
998 /* check if we should append a status stage */
999 if (!xfer->flags_int.control_act) {
1002 * Send a DATA1 message and invert the current
1003 * endpoint direction.
1005 if (xfer->endpointno & UE_DIR_IN) {
1006 temp.func = &uss820dci_data_rx;
1009 temp.func = &uss820dci_data_tx;
1015 uss820dci_setup_standard_chain_sub(&temp);
1017 /* we need a SYNC point after TX */
1018 temp.func = &uss820dci_data_tx_sync;
1019 uss820dci_setup_standard_chain_sub(&temp);
1023 /* must have at least one frame! */
1025 xfer->td_transfer_last = td;
1029 uss820dci_timeout(void *arg)
1031 struct usb_xfer *xfer = arg;
1033 DPRINTF("xfer=%p\n", xfer);
1035 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1037 /* transfer is transferred */
1038 uss820dci_device_done(xfer, USB_ERR_TIMEOUT);
1042 uss820dci_intr_set(struct usb_xfer *xfer, uint8_t set)
1044 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1045 uint8_t ep_no = (xfer->endpointno & UE_ADDR);
1049 DPRINTFN(15, "endpoint 0x%02x\n", xfer->endpointno);
1052 ep_reg = USS820_SBIE1;
1054 ep_reg = USS820_SBIE;
1058 ep_no = 1 << (2 * ep_no);
1060 if (xfer->flags_int.control_xfr) {
1061 if (xfer->flags_int.control_hdr) {
1062 ep_no <<= 1; /* RX interrupt only */
1064 ep_no |= (ep_no << 1); /* RX and TX interrupt */
1067 if (!(xfer->endpointno & UE_DIR_IN)) {
1071 temp = USS820_READ_1(sc, ep_reg);
1077 USS820_WRITE_1(sc, ep_reg, temp);
1081 uss820dci_start_standard_chain(struct usb_xfer *xfer)
1083 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1087 USB_BUS_SPIN_LOCK(&sc->sc_bus);
1090 uss820dci_xfer_do_fifo(xfer);
1092 if (uss820dci_xfer_do_complete(xfer) == 0) {
1094 * Only enable the endpoint interrupt when we are
1095 * actually waiting for data, hence we are dealing
1096 * with level triggered interrupts !
1098 uss820dci_intr_set(xfer, 1);
1100 /* put transfer on interrupt queue */
1101 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
1103 /* start timeout, if any */
1104 if (xfer->timeout != 0) {
1105 usbd_transfer_timeout_ms(xfer,
1106 &uss820dci_timeout, xfer->timeout);
1109 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
1113 uss820dci_root_intr(struct uss820dci_softc *sc)
1117 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1120 sc->sc_hub_idata[0] = 0x02; /* we only have one port */
1122 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1123 sizeof(sc->sc_hub_idata));
1127 uss820dci_standard_done_sub(struct usb_xfer *xfer)
1129 struct uss820dci_td *td;
1135 td = xfer->td_transfer_cache;
1138 len = td->remainder;
1140 if (xfer->aframes != xfer->nframes) {
1142 * Verify the length and subtract
1143 * the remainder from "frlengths[]":
1145 if (len > xfer->frlengths[xfer->aframes]) {
1148 xfer->frlengths[xfer->aframes] -= len;
1151 /* Check for transfer error */
1153 /* the transfer is finished */
1158 /* Check for short transfer */
1160 if (xfer->flags_int.short_frames_ok ||
1161 xfer->flags_int.isochronous_xfr) {
1162 /* follow alt next */
1169 /* the transfer is finished */
1177 /* this USB frame is complete */
1183 /* update transfer cache */
1185 xfer->td_transfer_cache = td;
1188 USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1192 uss820dci_standard_done(struct usb_xfer *xfer)
1194 usb_error_t err = 0;
1196 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1197 xfer, xfer->endpoint);
1201 xfer->td_transfer_cache = xfer->td_transfer_first;
1203 if (xfer->flags_int.control_xfr) {
1205 if (xfer->flags_int.control_hdr) {
1207 err = uss820dci_standard_done_sub(xfer);
1211 if (xfer->td_transfer_cache == NULL) {
1215 while (xfer->aframes != xfer->nframes) {
1217 err = uss820dci_standard_done_sub(xfer);
1220 if (xfer->td_transfer_cache == NULL) {
1225 if (xfer->flags_int.control_xfr &&
1226 !xfer->flags_int.control_act) {
1228 err = uss820dci_standard_done_sub(xfer);
1231 uss820dci_device_done(xfer, err);
1234 /*------------------------------------------------------------------------*
1235 * uss820dci_device_done
1237 * NOTE: this function can be called more than one time on the
1238 * same USB transfer!
1239 *------------------------------------------------------------------------*/
1241 uss820dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1243 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1245 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1247 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1248 xfer, xfer->endpoint, error);
1250 USB_BUS_SPIN_LOCK(&sc->sc_bus);
1252 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1253 uss820dci_intr_set(xfer, 0);
1255 /* dequeue transfer and start next transfer */
1256 usbd_transfer_done(xfer, error);
1258 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
1262 uss820dci_xfer_stall(struct usb_xfer *xfer)
1264 uss820dci_device_done(xfer, USB_ERR_STALLED);
1268 uss820dci_set_stall(struct usb_device *udev,
1269 struct usb_endpoint *ep, uint8_t *did_stall)
1271 struct uss820dci_softc *sc;
1277 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1279 DPRINTFN(5, "endpoint=%p\n", ep);
1281 /* set FORCESTALL */
1282 sc = USS820_DCI_BUS2SC(udev->bus);
1283 ep_no = (ep->edesc->bEndpointAddress & UE_ADDR);
1284 ep_dir = (ep->edesc->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT));
1285 ep_type = (ep->edesc->bmAttributes & UE_XFERTYPE);
1287 if (ep_type == UE_CONTROL) {
1288 /* should not happen */
1291 USB_BUS_SPIN_LOCK(&sc->sc_bus);
1292 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1294 if (ep_dir == UE_DIR_IN) {
1295 temp = USS820_EPCON_TXSTL;
1297 temp = USS820_EPCON_RXSTL;
1299 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1300 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
1304 uss820dci_clear_stall_sub(struct uss820dci_softc *sc,
1305 uint8_t ep_no, uint8_t ep_type, uint8_t ep_dir)
1309 if (ep_type == UE_CONTROL) {
1310 /* clearing stall is not needed */
1313 USB_BUS_SPIN_LOCK(&sc->sc_bus);
1315 /* select endpoint index */
1316 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1318 /* clear stall and disable I/O transfers */
1319 if (ep_dir == UE_DIR_IN) {
1320 temp = 0xFF ^ (USS820_EPCON_TXOE |
1321 USS820_EPCON_TXSTL);
1323 temp = 0xFF ^ (USS820_EPCON_RXIE |
1324 USS820_EPCON_RXSTL);
1326 uss820dci_update_shared_1(sc, USS820_EPCON, temp, 0);
1328 if (ep_dir == UE_DIR_IN) {
1329 /* reset data toggle */
1330 USS820_WRITE_1(sc, USS820_TXSTAT,
1331 USS820_TXSTAT_TXSOVW);
1334 temp = USS820_READ_1(sc, USS820_TXCON);
1335 temp |= USS820_TXCON_TXCLR;
1336 USS820_WRITE_1(sc, USS820_TXCON, temp);
1337 temp &= ~USS820_TXCON_TXCLR;
1338 USS820_WRITE_1(sc, USS820_TXCON, temp);
1341 /* reset data toggle */
1342 uss820dci_update_shared_1(sc, USS820_RXSTAT,
1343 0, USS820_RXSTAT_RXSOVW);
1346 temp = USS820_READ_1(sc, USS820_RXCON);
1347 temp |= USS820_RXCON_RXCLR;
1348 temp &= ~USS820_RXCON_RXFFRC;
1349 USS820_WRITE_1(sc, USS820_RXCON, temp);
1350 temp &= ~USS820_RXCON_RXCLR;
1351 USS820_WRITE_1(sc, USS820_RXCON, temp);
1353 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
1357 uss820dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1359 struct uss820dci_softc *sc;
1360 struct usb_endpoint_descriptor *ed;
1362 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1364 DPRINTFN(5, "endpoint=%p\n", ep);
1367 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1372 sc = USS820_DCI_BUS2SC(udev->bus);
1374 /* get endpoint descriptor */
1377 /* reset endpoint */
1378 uss820dci_clear_stall_sub(sc,
1379 (ed->bEndpointAddress & UE_ADDR),
1380 (ed->bmAttributes & UE_XFERTYPE),
1381 (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1385 uss820dci_init(struct uss820dci_softc *sc)
1387 const struct usb_hw_ep_profile *pf;
1393 /* set up the bus structure */
1394 sc->sc_bus.usbrev = USB_REV_1_1;
1395 sc->sc_bus.methods = &uss820dci_bus_methods;
1397 USB_BUS_LOCK(&sc->sc_bus);
1399 /* we always have VBUS */
1400 sc->sc_flags.status_vbus = 1;
1402 /* reset the chip */
1403 USS820_WRITE_1(sc, USS820_SCR, USS820_SCR_SRESET);
1405 USS820_WRITE_1(sc, USS820_SCR, 0);
1407 /* wait for reset to complete */
1410 temp = USS820_READ_1(sc, USS820_MCSR);
1412 if (temp & USS820_MCSR_INIT) {
1416 USB_BUS_UNLOCK(&sc->sc_bus);
1417 return (USB_ERR_INVAL);
1419 /* wait a little for things to stabilise */
1424 uss820dci_pull_down(sc);
1426 /* wait 10ms for pulldown to stabilise */
1427 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100);
1429 /* check hardware revision */
1430 temp = USS820_READ_1(sc, USS820_REV);
1433 USB_BUS_UNLOCK(&sc->sc_bus);
1434 return (USB_ERR_INVAL);
1436 /* enable interrupts */
1437 USS820_WRITE_1(sc, USS820_SCR,
1439 USS820_SCR_IE_RESET |
1440 /* USS820_SCR_RWUPE | */
1441 USS820_SCR_IE_SUSP |
1444 /* enable interrupts */
1445 USS820_WRITE_1(sc, USS820_SCRATCH,
1446 USS820_SCRATCH_IE_RESUME);
1448 /* enable features */
1449 USS820_WRITE_1(sc, USS820_MCSR,
1450 USS820_MCSR_BDFEAT |
1453 sc->sc_flags.mcsr_feat = 1;
1455 /* disable interrupts */
1456 USS820_WRITE_1(sc, USS820_SBIE, 0);
1458 /* disable interrupts */
1459 USS820_WRITE_1(sc, USS820_SBIE1, 0);
1461 /* disable all endpoints */
1462 for (n = 0; n != USS820_EP_MAX; n++) {
1464 /* select endpoint */
1465 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1467 /* disable endpoint */
1468 uss820dci_update_shared_1(sc, USS820_EPCON, 0, 0);
1472 * Initialise default values for some registers that cannot be
1473 * changed during operation!
1475 for (n = 0; n != USS820_EP_MAX; n++) {
1477 uss820dci_get_hw_ep_profile(NULL, &pf, n);
1479 /* the maximum frame sizes should be the same */
1480 if (pf->max_in_frame_size != pf->max_out_frame_size) {
1481 DPRINTF("Max frame size mismatch %u != %u\n",
1482 pf->max_in_frame_size, pf->max_out_frame_size);
1484 if (pf->support_isochronous) {
1485 if (pf->max_in_frame_size <= 64) {
1486 temp = (USS820_TXCON_FFSZ_16_64 |
1487 USS820_TXCON_TXISO |
1489 } else if (pf->max_in_frame_size <= 256) {
1490 temp = (USS820_TXCON_FFSZ_64_256 |
1491 USS820_TXCON_TXISO |
1493 } else if (pf->max_in_frame_size <= 512) {
1494 temp = (USS820_TXCON_FFSZ_8_512 |
1495 USS820_TXCON_TXISO |
1497 } else { /* 1024 bytes */
1498 temp = (USS820_TXCON_FFSZ_32_1024 |
1499 USS820_TXCON_TXISO |
1503 if ((pf->max_in_frame_size <= 8) &&
1504 (sc->sc_flags.mcsr_feat)) {
1505 temp = (USS820_TXCON_FFSZ_8_512 |
1507 } else if (pf->max_in_frame_size <= 16) {
1508 temp = (USS820_TXCON_FFSZ_16_64 |
1510 } else if ((pf->max_in_frame_size <= 32) &&
1511 (sc->sc_flags.mcsr_feat)) {
1512 temp = (USS820_TXCON_FFSZ_32_1024 |
1514 } else { /* 64 bytes */
1515 temp = (USS820_TXCON_FFSZ_64_256 |
1520 /* need to configure the chip early */
1522 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1523 USS820_WRITE_1(sc, USS820_TXCON, temp);
1524 USS820_WRITE_1(sc, USS820_RXCON, temp);
1526 if (pf->support_control) {
1527 temp = USS820_EPCON_CTLEP |
1528 USS820_EPCON_RXSPM |
1530 USS820_EPCON_RXEPEN |
1532 USS820_EPCON_TXEPEN;
1534 temp = USS820_EPCON_RXEPEN | USS820_EPCON_TXEPEN;
1537 uss820dci_update_shared_1(sc, USS820_EPCON, 0, temp);
1540 USB_BUS_UNLOCK(&sc->sc_bus);
1542 /* catch any lost interrupts */
1544 uss820dci_do_poll(&sc->sc_bus);
1546 return (0); /* success */
1550 uss820dci_uninit(struct uss820dci_softc *sc)
1554 USB_BUS_LOCK(&sc->sc_bus);
1556 /* disable all interrupts */
1557 temp = USS820_READ_1(sc, USS820_SCR);
1558 temp &= ~USS820_SCR_T_IRQ;
1559 USS820_WRITE_1(sc, USS820_SCR, temp);
1561 sc->sc_flags.port_powered = 0;
1562 sc->sc_flags.status_vbus = 0;
1563 sc->sc_flags.status_bus_reset = 0;
1564 sc->sc_flags.status_suspend = 0;
1565 sc->sc_flags.change_suspend = 0;
1566 sc->sc_flags.change_connect = 1;
1568 uss820dci_pull_down(sc);
1569 USB_BUS_UNLOCK(&sc->sc_bus);
1573 uss820dci_suspend(struct uss820dci_softc *sc)
1579 uss820dci_resume(struct uss820dci_softc *sc)
1585 uss820dci_do_poll(struct usb_bus *bus)
1587 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
1589 USB_BUS_LOCK(&sc->sc_bus);
1590 USB_BUS_SPIN_LOCK(&sc->sc_bus);
1591 uss820dci_interrupt_poll_locked(sc);
1592 uss820dci_interrupt_complete_locked(sc);
1593 USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
1594 USB_BUS_UNLOCK(&sc->sc_bus);
1597 /*------------------------------------------------------------------------*
1598 * uss820dci bulk support
1599 *------------------------------------------------------------------------*/
1601 uss820dci_device_bulk_open(struct usb_xfer *xfer)
1607 uss820dci_device_bulk_close(struct usb_xfer *xfer)
1609 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1613 uss820dci_device_bulk_enter(struct usb_xfer *xfer)
1619 uss820dci_device_bulk_start(struct usb_xfer *xfer)
1622 uss820dci_setup_standard_chain(xfer);
1623 uss820dci_start_standard_chain(xfer);
1626 static const struct usb_pipe_methods uss820dci_device_bulk_methods =
1628 .open = uss820dci_device_bulk_open,
1629 .close = uss820dci_device_bulk_close,
1630 .enter = uss820dci_device_bulk_enter,
1631 .start = uss820dci_device_bulk_start,
1634 /*------------------------------------------------------------------------*
1635 * uss820dci control support
1636 *------------------------------------------------------------------------*/
1638 uss820dci_device_ctrl_open(struct usb_xfer *xfer)
1644 uss820dci_device_ctrl_close(struct usb_xfer *xfer)
1646 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1650 uss820dci_device_ctrl_enter(struct usb_xfer *xfer)
1656 uss820dci_device_ctrl_start(struct usb_xfer *xfer)
1659 uss820dci_setup_standard_chain(xfer);
1660 uss820dci_start_standard_chain(xfer);
1663 static const struct usb_pipe_methods uss820dci_device_ctrl_methods =
1665 .open = uss820dci_device_ctrl_open,
1666 .close = uss820dci_device_ctrl_close,
1667 .enter = uss820dci_device_ctrl_enter,
1668 .start = uss820dci_device_ctrl_start,
1671 /*------------------------------------------------------------------------*
1672 * uss820dci interrupt support
1673 *------------------------------------------------------------------------*/
1675 uss820dci_device_intr_open(struct usb_xfer *xfer)
1681 uss820dci_device_intr_close(struct usb_xfer *xfer)
1683 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1687 uss820dci_device_intr_enter(struct usb_xfer *xfer)
1693 uss820dci_device_intr_start(struct usb_xfer *xfer)
1696 uss820dci_setup_standard_chain(xfer);
1697 uss820dci_start_standard_chain(xfer);
1700 static const struct usb_pipe_methods uss820dci_device_intr_methods =
1702 .open = uss820dci_device_intr_open,
1703 .close = uss820dci_device_intr_close,
1704 .enter = uss820dci_device_intr_enter,
1705 .start = uss820dci_device_intr_start,
1708 /*------------------------------------------------------------------------*
1709 * uss820dci full speed isochronous support
1710 *------------------------------------------------------------------------*/
1712 uss820dci_device_isoc_fs_open(struct usb_xfer *xfer)
1718 uss820dci_device_isoc_fs_close(struct usb_xfer *xfer)
1720 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1724 uss820dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1726 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1730 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1731 xfer, xfer->endpoint->isoc_next, xfer->nframes);
1733 /* get the current frame index - we don't need the high bits */
1735 nframes = USS820_READ_1(sc, USS820_SOFL);
1738 * check if the frame index is within the window where the
1739 * frames will be inserted
1741 temp = (nframes - xfer->endpoint->isoc_next) & USS820_SOFL_MASK;
1743 if ((xfer->endpoint->is_synced == 0) ||
1744 (temp < xfer->nframes)) {
1746 * If there is data underflow or the pipe queue is
1747 * empty we schedule the transfer a few frames ahead
1748 * of the current frame position. Else two isochronous
1749 * transfers might overlap.
1751 xfer->endpoint->isoc_next = (nframes + 3) & USS820_SOFL_MASK;
1752 xfer->endpoint->is_synced = 1;
1753 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1756 * compute how many milliseconds the insertion is ahead of the
1757 * current frame position:
1759 temp = (xfer->endpoint->isoc_next - nframes) & USS820_SOFL_MASK;
1762 * pre-compute when the isochronous transfer will be finished:
1764 xfer->isoc_time_complete =
1765 usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1768 /* compute frame number for next insertion */
1769 xfer->endpoint->isoc_next += xfer->nframes;
1772 uss820dci_setup_standard_chain(xfer);
1776 uss820dci_device_isoc_fs_start(struct usb_xfer *xfer)
1778 /* start TD chain */
1779 uss820dci_start_standard_chain(xfer);
1782 static const struct usb_pipe_methods uss820dci_device_isoc_fs_methods =
1784 .open = uss820dci_device_isoc_fs_open,
1785 .close = uss820dci_device_isoc_fs_close,
1786 .enter = uss820dci_device_isoc_fs_enter,
1787 .start = uss820dci_device_isoc_fs_start,
1790 /*------------------------------------------------------------------------*
1791 * uss820dci root control support
1792 *------------------------------------------------------------------------*
1793 * Simulate a hardware HUB by handling all the necessary requests.
1794 *------------------------------------------------------------------------*/
1796 static const struct usb_device_descriptor uss820dci_devd = {
1797 .bLength = sizeof(struct usb_device_descriptor),
1798 .bDescriptorType = UDESC_DEVICE,
1799 .bcdUSB = {0x00, 0x02},
1800 .bDeviceClass = UDCLASS_HUB,
1801 .bDeviceSubClass = UDSUBCLASS_HUB,
1802 .bDeviceProtocol = UDPROTO_FSHUB,
1803 .bMaxPacketSize = 64,
1804 .bcdDevice = {0x00, 0x01},
1807 .bNumConfigurations = 1,
1810 static const struct usb_device_qualifier uss820dci_odevd = {
1811 .bLength = sizeof(struct usb_device_qualifier),
1812 .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1813 .bcdUSB = {0x00, 0x02},
1814 .bDeviceClass = UDCLASS_HUB,
1815 .bDeviceSubClass = UDSUBCLASS_HUB,
1816 .bDeviceProtocol = UDPROTO_FSHUB,
1817 .bMaxPacketSize0 = 0,
1818 .bNumConfigurations = 0,
1821 static const struct uss820dci_config_desc uss820dci_confd = {
1823 .bLength = sizeof(struct usb_config_descriptor),
1824 .bDescriptorType = UDESC_CONFIG,
1825 .wTotalLength[0] = sizeof(uss820dci_confd),
1827 .bConfigurationValue = 1,
1828 .iConfiguration = 0,
1829 .bmAttributes = UC_SELF_POWERED,
1833 .bLength = sizeof(struct usb_interface_descriptor),
1834 .bDescriptorType = UDESC_INTERFACE,
1836 .bInterfaceClass = UICLASS_HUB,
1837 .bInterfaceSubClass = UISUBCLASS_HUB,
1838 .bInterfaceProtocol = 0,
1842 .bLength = sizeof(struct usb_endpoint_descriptor),
1843 .bDescriptorType = UDESC_ENDPOINT,
1844 .bEndpointAddress = (UE_DIR_IN | USS820_DCI_INTR_ENDPT),
1845 .bmAttributes = UE_INTERRUPT,
1846 .wMaxPacketSize[0] = 8,
1851 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
1853 static const struct usb_hub_descriptor_min uss820dci_hubd = {
1854 .bDescLength = sizeof(uss820dci_hubd),
1855 .bDescriptorType = UDESC_HUB,
1857 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)),
1858 .bPwrOn2PwrGood = 50,
1859 .bHubContrCurrent = 0,
1860 .DeviceRemovable = {0}, /* port is removable */
1863 #define STRING_VENDOR \
1866 #define STRING_PRODUCT \
1867 "D\0C\0I\0 \0R\0o\0o\0t\0 \0H\0U\0B"
1869 USB_MAKE_STRING_DESC(STRING_VENDOR, uss820dci_vendor);
1870 USB_MAKE_STRING_DESC(STRING_PRODUCT, uss820dci_product);
1873 uss820dci_roothub_exec(struct usb_device *udev,
1874 struct usb_device_request *req, const void **pptr, uint16_t *plength)
1876 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
1883 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1886 ptr = (const void *)&sc->sc_hub_temp;
1890 value = UGETW(req->wValue);
1891 index = UGETW(req->wIndex);
1893 /* demultiplex the control request */
1895 switch (req->bmRequestType) {
1896 case UT_READ_DEVICE:
1897 switch (req->bRequest) {
1898 case UR_GET_DESCRIPTOR:
1899 goto tr_handle_get_descriptor;
1901 goto tr_handle_get_config;
1903 goto tr_handle_get_status;
1909 case UT_WRITE_DEVICE:
1910 switch (req->bRequest) {
1911 case UR_SET_ADDRESS:
1912 goto tr_handle_set_address;
1914 goto tr_handle_set_config;
1915 case UR_CLEAR_FEATURE:
1916 goto tr_valid; /* nop */
1917 case UR_SET_DESCRIPTOR:
1918 goto tr_valid; /* nop */
1919 case UR_SET_FEATURE:
1925 case UT_WRITE_ENDPOINT:
1926 switch (req->bRequest) {
1927 case UR_CLEAR_FEATURE:
1928 switch (UGETW(req->wValue)) {
1929 case UF_ENDPOINT_HALT:
1930 goto tr_handle_clear_halt;
1931 case UF_DEVICE_REMOTE_WAKEUP:
1932 goto tr_handle_clear_wakeup;
1937 case UR_SET_FEATURE:
1938 switch (UGETW(req->wValue)) {
1939 case UF_ENDPOINT_HALT:
1940 goto tr_handle_set_halt;
1941 case UF_DEVICE_REMOTE_WAKEUP:
1942 goto tr_handle_set_wakeup;
1947 case UR_SYNCH_FRAME:
1948 goto tr_valid; /* nop */
1954 case UT_READ_ENDPOINT:
1955 switch (req->bRequest) {
1957 goto tr_handle_get_ep_status;
1963 case UT_WRITE_INTERFACE:
1964 switch (req->bRequest) {
1965 case UR_SET_INTERFACE:
1966 goto tr_handle_set_interface;
1967 case UR_CLEAR_FEATURE:
1968 goto tr_valid; /* nop */
1969 case UR_SET_FEATURE:
1975 case UT_READ_INTERFACE:
1976 switch (req->bRequest) {
1977 case UR_GET_INTERFACE:
1978 goto tr_handle_get_interface;
1980 goto tr_handle_get_iface_status;
1986 case UT_WRITE_CLASS_INTERFACE:
1987 case UT_WRITE_VENDOR_INTERFACE:
1991 case UT_READ_CLASS_INTERFACE:
1992 case UT_READ_VENDOR_INTERFACE:
1996 case UT_WRITE_CLASS_DEVICE:
1997 switch (req->bRequest) {
1998 case UR_CLEAR_FEATURE:
2000 case UR_SET_DESCRIPTOR:
2001 case UR_SET_FEATURE:
2008 case UT_WRITE_CLASS_OTHER:
2009 switch (req->bRequest) {
2010 case UR_CLEAR_FEATURE:
2011 goto tr_handle_clear_port_feature;
2012 case UR_SET_FEATURE:
2013 goto tr_handle_set_port_feature;
2014 case UR_CLEAR_TT_BUFFER:
2024 case UT_READ_CLASS_OTHER:
2025 switch (req->bRequest) {
2026 case UR_GET_TT_STATE:
2027 goto tr_handle_get_tt_state;
2029 goto tr_handle_get_port_status;
2035 case UT_READ_CLASS_DEVICE:
2036 switch (req->bRequest) {
2037 case UR_GET_DESCRIPTOR:
2038 goto tr_handle_get_class_descriptor;
2040 goto tr_handle_get_class_status;
2051 tr_handle_get_descriptor:
2052 switch (value >> 8) {
2057 len = sizeof(uss820dci_devd);
2058 ptr = (const void *)&uss820dci_devd;
2060 case UDESC_DEVICE_QUALIFIER:
2064 len = sizeof(uss820dci_odevd);
2065 ptr = (const void *)&uss820dci_odevd;
2071 len = sizeof(uss820dci_confd);
2072 ptr = (const void *)&uss820dci_confd;
2075 switch (value & 0xff) {
2076 case 0: /* Language table */
2077 len = sizeof(usb_string_lang_en);
2078 ptr = (const void *)&usb_string_lang_en;
2081 case 1: /* Vendor */
2082 len = sizeof(uss820dci_vendor);
2083 ptr = (const void *)&uss820dci_vendor;
2086 case 2: /* Product */
2087 len = sizeof(uss820dci_product);
2088 ptr = (const void *)&uss820dci_product;
2099 tr_handle_get_config:
2101 sc->sc_hub_temp.wValue[0] = sc->sc_conf;
2104 tr_handle_get_status:
2106 USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
2109 tr_handle_set_address:
2110 if (value & 0xFF00) {
2113 sc->sc_rt_addr = value;
2116 tr_handle_set_config:
2120 sc->sc_conf = value;
2123 tr_handle_get_interface:
2125 sc->sc_hub_temp.wValue[0] = 0;
2128 tr_handle_get_tt_state:
2129 tr_handle_get_class_status:
2130 tr_handle_get_iface_status:
2131 tr_handle_get_ep_status:
2133 USETW(sc->sc_hub_temp.wValue, 0);
2137 tr_handle_set_interface:
2138 tr_handle_set_wakeup:
2139 tr_handle_clear_wakeup:
2140 tr_handle_clear_halt:
2143 tr_handle_clear_port_feature:
2147 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
2150 case UHF_PORT_SUSPEND:
2151 uss820dci_wakeup_peer(sc);
2154 case UHF_PORT_ENABLE:
2155 sc->sc_flags.port_enabled = 0;
2159 case UHF_PORT_INDICATOR:
2160 case UHF_C_PORT_ENABLE:
2161 case UHF_C_PORT_OVER_CURRENT:
2162 case UHF_C_PORT_RESET:
2165 case UHF_PORT_POWER:
2166 sc->sc_flags.port_powered = 0;
2167 uss820dci_pull_down(sc);
2169 case UHF_C_PORT_CONNECTION:
2170 sc->sc_flags.change_connect = 0;
2172 case UHF_C_PORT_SUSPEND:
2173 sc->sc_flags.change_suspend = 0;
2176 err = USB_ERR_IOERROR;
2181 tr_handle_set_port_feature:
2185 DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
2188 case UHF_PORT_ENABLE:
2189 sc->sc_flags.port_enabled = 1;
2191 case UHF_PORT_SUSPEND:
2192 case UHF_PORT_RESET:
2194 case UHF_PORT_INDICATOR:
2197 case UHF_PORT_POWER:
2198 sc->sc_flags.port_powered = 1;
2201 err = USB_ERR_IOERROR;
2206 tr_handle_get_port_status:
2208 DPRINTFN(9, "UR_GET_PORT_STATUS\n");
2213 if (sc->sc_flags.status_vbus) {
2214 uss820dci_pull_up(sc);
2216 uss820dci_pull_down(sc);
2219 /* Select FULL-speed and Device Side Mode */
2221 value = UPS_PORT_MODE_DEVICE;
2223 if (sc->sc_flags.port_powered) {
2224 value |= UPS_PORT_POWER;
2226 if (sc->sc_flags.port_enabled) {
2227 value |= UPS_PORT_ENABLED;
2229 if (sc->sc_flags.status_vbus &&
2230 sc->sc_flags.status_bus_reset) {
2231 value |= UPS_CURRENT_CONNECT_STATUS;
2233 if (sc->sc_flags.status_suspend) {
2234 value |= UPS_SUSPEND;
2236 USETW(sc->sc_hub_temp.ps.wPortStatus, value);
2240 if (sc->sc_flags.change_connect) {
2241 value |= UPS_C_CONNECT_STATUS;
2243 if (sc->sc_flags.change_suspend) {
2244 value |= UPS_C_SUSPEND;
2246 USETW(sc->sc_hub_temp.ps.wPortChange, value);
2247 len = sizeof(sc->sc_hub_temp.ps);
2250 tr_handle_get_class_descriptor:
2254 ptr = (const void *)&uss820dci_hubd;
2255 len = sizeof(uss820dci_hubd);
2259 err = USB_ERR_STALLED;
2268 uss820dci_xfer_setup(struct usb_setup_params *parm)
2270 const struct usb_hw_ep_profile *pf;
2271 struct uss820dci_softc *sc;
2272 struct usb_xfer *xfer;
2278 sc = USS820_DCI_BUS2SC(parm->udev->bus);
2279 xfer = parm->curr_xfer;
2282 * NOTE: This driver does not use any of the parameters that
2283 * are computed from the following values. Just set some
2284 * reasonable dummies:
2286 parm->hc_max_packet_size = 0x500;
2287 parm->hc_max_packet_count = 1;
2288 parm->hc_max_frame_size = 0x500;
2290 usbd_transfer_setup_sub(parm);
2293 * compute maximum number of TDs
2295 if (parm->methods == &uss820dci_device_ctrl_methods) {
2297 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ;
2299 } else if (parm->methods == &uss820dci_device_bulk_methods) {
2301 ntd = xfer->nframes + 1 /* SYNC */ ;
2303 } else if (parm->methods == &uss820dci_device_intr_methods) {
2305 ntd = xfer->nframes + 1 /* SYNC */ ;
2307 } else if (parm->methods == &uss820dci_device_isoc_fs_methods) {
2309 ntd = xfer->nframes + 1 /* SYNC */ ;
2317 * check if "usbd_transfer_setup_sub" set an error
2323 * allocate transfer descriptors
2332 ep_no = xfer->endpointno & UE_ADDR;
2333 uss820dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2336 /* should not happen */
2337 parm->err = USB_ERR_INVAL;
2346 parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2348 for (n = 0; n != ntd; n++) {
2350 struct uss820dci_td *td;
2354 td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2357 td->max_packet_size = xfer->max_packet_size;
2358 td->ep_index = ep_no;
2359 if (pf->support_multi_buffer &&
2360 (parm->methods != &uss820dci_device_ctrl_methods)) {
2361 td->support_multi_buffer = 1;
2363 td->obj_next = last_obj;
2367 parm->size[0] += sizeof(*td);
2370 xfer->td_start[0] = last_obj;
2374 uss820dci_xfer_unsetup(struct usb_xfer *xfer)
2380 uss820dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2381 struct usb_endpoint *ep)
2383 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
2385 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2387 edesc->bEndpointAddress, udev->flags.usb_mode,
2390 if (udev->device_index != sc->sc_rt_addr) {
2392 if (udev->speed != USB_SPEED_FULL) {
2396 switch (edesc->bmAttributes & UE_XFERTYPE) {
2398 ep->methods = &uss820dci_device_ctrl_methods;
2401 ep->methods = &uss820dci_device_intr_methods;
2403 case UE_ISOCHRONOUS:
2404 ep->methods = &uss820dci_device_isoc_fs_methods;
2407 ep->methods = &uss820dci_device_bulk_methods;
2417 uss820dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2419 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
2422 case USB_HW_POWER_SUSPEND:
2423 uss820dci_suspend(sc);
2425 case USB_HW_POWER_SHUTDOWN:
2426 uss820dci_uninit(sc);
2428 case USB_HW_POWER_RESUME:
2429 uss820dci_resume(sc);
2436 static const struct usb_bus_methods uss820dci_bus_methods =
2438 .endpoint_init = &uss820dci_ep_init,
2439 .xfer_setup = &uss820dci_xfer_setup,
2440 .xfer_unsetup = &uss820dci_xfer_unsetup,
2441 .get_hw_ep_profile = &uss820dci_get_hw_ep_profile,
2442 .xfer_stall = &uss820dci_xfer_stall,
2443 .set_stall = &uss820dci_set_stall,
2444 .clear_stall = &uss820dci_clear_stall,
2445 .roothub_exec = &uss820dci_roothub_exec,
2446 .xfer_poll = &uss820dci_do_poll,
2447 .set_hw_power_sleep = uss820dci_set_hw_power_sleep,