2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2022 Hans Petter Selasky
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
63 #define PCI_XHCI_VENDORID_AMD 0x1022
64 #define PCI_XHCI_VENDORID_INTEL 0x8086
65 #define PCI_XHCI_VENDORID_VMWARE 0x15ad
66 #define PCI_XHCI_VENDORID_ZHAOXIN 0x1d17
68 static device_probe_t xhci_pci_probe;
69 static device_detach_t xhci_pci_detach;
70 static usb_take_controller_t xhci_pci_take_controller;
72 static device_method_t xhci_device_methods[] = {
73 /* device interface */
74 DEVMETHOD(device_probe, xhci_pci_probe),
75 DEVMETHOD(device_attach, xhci_pci_attach),
76 DEVMETHOD(device_detach, xhci_pci_detach),
77 DEVMETHOD(device_suspend, bus_generic_suspend),
78 DEVMETHOD(device_resume, bus_generic_resume),
79 DEVMETHOD(device_shutdown, bus_generic_shutdown),
80 DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
85 DEFINE_CLASS_0(xhci, xhci_pci_driver, xhci_device_methods,
86 sizeof(struct xhci_softc));
88 DRIVER_MODULE(xhci, pci, xhci_pci_driver, NULL, NULL);
89 MODULE_DEPEND(xhci, usb, 1, 1, 1);
92 xhci_pci_match(device_t self)
94 uint32_t device_id = pci_get_devid(self);
98 return ("AMD KERNCZ USB 3.0 controller");
100 return ("AMD Starship USB 3.0 controller");
102 return ("AMD Matisse USB 3.0 controller");
104 return ("AMD X399 USB 3.0 controller");
105 case 0x43b91022: /* X370 */
106 case 0x43bb1022: /* B350 */
107 return ("AMD 300 Series USB 3.1 controller");
109 return ("AMD 400 Series USB 3.1 controller");
113 return ("AMD FCH USB 3.0 controller");
117 return ("VMware USB 3.0 controller");
120 return ("Hygon USB 3.0 controller");
123 return ("NEC uPD720200 USB 3.0 controller");
125 return ("NEC uPD720202 USB 3.0 controller");
128 return ("Fresco Logic FL1000G USB 3.0 controller");
130 return ("Fresco Logic FL1009 USB 3.0 controller");
132 return ("Fresco Logic FL1100 USB 3.0 controller");
135 return ("ASMedia ASM1042 USB 3.0 controller");
137 return ("ASMedia ASM1042A USB 3.0 controller");
139 return ("ASMedia ASM1143 USB 3.1 controller");
141 return ("ASMedia ASM3242 USB 3.2 controller");
144 return ("Intel Goshen Ridge Thunderbolt 4 USB controller");
146 return ("Intel BayTrail USB 3.0 controller");
148 return ("Intel Maple Ridge Thunderbolt 4 USB controller");
152 return ("Intel Alpine Ridge Thunderbolt 3 USB controller");
156 return ("Intel Titan Ridge Thunderbolt 3 USB controller");
158 return ("Intel Denverton USB 3.0 controller");
161 return ("Intel Panther Point USB 3.0 controller");
163 return ("Intel Braswell USB 3.0 controller");
165 return ("Intel Gemini Lake USB 3.0 controller");
167 return ("Intel Ice Lake-LP USB 3.1 controller");
169 return ("Intel Tiger Lake-H USB 3.2 controller");
171 return ("Intel Alder Lake-P Thunderbolt 4 USB controller");
173 return ("Intel Alder Lake USB 3.2 controller");
175 return ("Intel Apollo Lake USB 3.0 controller");
177 return ("Intel Alder Lake USB 3.2 controller");
179 return ("Intel Ice Lake Thunderbolt 3 USB controller");
181 return ("Intel Lynx Point USB 3.0 controller");
183 return ("Intel Wildcat Point USB 3.0 controller");
185 return ("Intel Wellsburg USB 3.0 controller");
187 return ("Intel Tiger Lake-LP Thunderbolt 4 USB controller");
189 return ("Intel Tiger Lake-H Thunderbolt 4 USB controller");
191 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
193 return ("Intel Sunrise Point-LP USB 3.0 controller");
195 return ("Intel Tiger Lake-LP USB 3.2 controller");
197 return ("Intel Sunrise Point USB 3.0 controller");
199 return ("Intel Lewisburg USB 3.0 controller");
201 return ("Intel Union Point USB 3.0 controller");
203 return ("Intel Cannon Lake USB 3.1 controller");
206 return ("Cavium ThunderX USB 3.0 controller");
209 return ("NVIDIA TU106 USB 3.1 controller");
212 return ("Zhaoxin ZX-100 USB 3.0 controller");
214 return ("Zhaoxin ZX-200 USB 3.0 controller");
216 return ("Zhaoxin ZX-E USB 3.0 controller");
222 if ((pci_get_class(self) == PCIC_SERIALBUS)
223 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
224 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
225 return ("XHCI (generic) USB 3.0 controller");
227 return (NULL); /* dunno */
231 xhci_pci_probe(device_t self)
233 const char *desc = xhci_pci_match(self);
236 device_set_desc(self, desc);
237 return (BUS_PROBE_DEFAULT);
243 static int xhci_use_msi = 1;
244 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
245 static int xhci_use_msix = 1;
246 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
249 xhci_interrupt_poll(void *_sc)
251 struct xhci_softc *sc = _sc;
252 USB_BUS_UNLOCK(&sc->sc_bus);
254 USB_BUS_LOCK(&sc->sc_bus);
255 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
259 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
265 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
266 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
271 /* Don't set bits which the hardware doesn't support */
272 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
273 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
275 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
276 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
278 device_printf(self, "Port routing mask set to 0x%08x\n", temp);
284 xhci_pci_attach(device_t self)
286 struct xhci_softc *sc = device_get_softc(self);
287 int count, err, msix_table, rid;
289 uint8_t usedma32 = 0;
291 rid = PCI_XHCI_CBMEM;
292 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
294 if (!sc->sc_io_res) {
295 device_printf(self, "Could not map memory\n");
298 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
299 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
300 sc->sc_io_size = rman_get_size(sc->sc_io_res);
302 switch (pci_get_devid(self)) {
303 case 0x10091b73: /* Fresco Logic FL1009 USB3.0 xHCI Controller */
304 case 0x8241104c: /* TUSB73x0 USB3.0 xHCI Controller */
305 sc->sc_no_deconfigure = 1;
307 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */
308 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */
309 /* Don't use 64-bit DMA on these controllers. */
312 case 0x10001b73: /* FL1000G */
313 /* Fresco Logic host doesn't support MSI. */
316 case 0x0f358086: /* BayTrail */
317 case 0x9c318086: /* Panther Point */
318 case 0x1e318086: /* Panther Point */
319 case 0x8c318086: /* Lynx Point */
320 case 0x8cb18086: /* Wildcat Point */
321 case 0x9cb18086: /* Broadwell Mobile Integrated */
323 * On Intel chipsets, reroute ports from EHCI to XHCI
324 * controller and use a different IMOD value.
326 sc->sc_port_route = &xhci_pci_port_route;
327 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
334 if (xhci_init(sc, self, usedma32)) {
335 device_printf(self, "Could not initialize softc\n");
336 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
341 pci_enable_busmaster(self);
343 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
346 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
347 if (msix_table == PCI_XHCI_CBMEM) {
348 sc->sc_msix_res = sc->sc_io_res;
350 sc->sc_msix_res = bus_alloc_resource_any(self,
351 SYS_RES_MEMORY, &msix_table, RF_ACTIVE);
352 if (sc->sc_msix_res == NULL) {
353 /* May not be enabled */
355 "Unable to map MSI-X table\n");
358 if (sc->sc_msix_res != NULL) {
360 if (pci_alloc_msix(self, &count) == 0) {
362 device_printf(self, "MSI-X enabled\n");
365 if (sc->sc_msix_res != sc->sc_io_res) {
366 bus_release_resource(self,
368 msix_table, sc->sc_msix_res);
370 sc->sc_msix_res = NULL;
374 if (rid == 0 && xhci_use_msi && usemsi) {
376 if (pci_alloc_msi(self, &count) == 0) {
378 device_printf(self, "MSI enabled\n");
382 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
383 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
384 if (sc->sc_irq_res == NULL) {
385 pci_release_msi(self);
386 device_printf(self, "Could not allocate IRQ\n");
387 /* goto error; FALLTHROUGH - use polling */
389 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
390 if (sc->sc_bus.bdev == NULL) {
391 device_printf(self, "Could not add USB device\n");
394 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
396 switch (pci_get_vendor(self)) {
397 case PCI_XHCI_VENDORID_AMD:
398 strlcpy(sc->sc_vendor, "AMD", sizeof(sc->sc_vendor));
400 case PCI_XHCI_VENDORID_INTEL:
401 strlcpy(sc->sc_vendor, "Intel", sizeof(sc->sc_vendor));
403 case PCI_XHCI_VENDORID_VMWARE:
404 strlcpy(sc->sc_vendor, "VMware", sizeof(sc->sc_vendor));
406 case PCI_XHCI_VENDORID_ZHAOXIN:
407 strlcpy(sc->sc_vendor, "Zhaoxin", sizeof(sc->sc_vendor));
411 device_printf(self, "(New XHCI DeviceId=0x%08x)\n",
412 pci_get_devid(self));
413 snprintf(sc->sc_vendor, sizeof(sc->sc_vendor),
414 "(0x%04x)", pci_get_vendor(self));
418 if (sc->sc_irq_res != NULL && xhci_use_polling() == 0) {
419 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
420 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
422 bus_release_resource(self, SYS_RES_IRQ,
423 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
424 sc->sc_irq_res = NULL;
425 pci_release_msi(self);
426 device_printf(self, "Could not setup IRQ, err=%d\n", err);
427 sc->sc_intr_hdl = NULL;
430 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
431 if (xhci_use_polling() != 0) {
432 device_printf(self, "Interrupt polling at %dHz\n", hz);
433 USB_BUS_LOCK(&sc->sc_bus);
434 xhci_interrupt_poll(sc);
435 USB_BUS_UNLOCK(&sc->sc_bus);
440 xhci_pci_take_controller(self);
442 err = xhci_halt_controller(sc);
445 err = xhci_start_controller(sc);
448 err = device_probe_and_attach(sc->sc_bus.bdev);
451 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
457 xhci_pci_detach(self);
462 xhci_pci_detach(device_t self)
464 struct xhci_softc *sc = device_get_softc(self);
466 /* during module unload there are lots of children leftover */
467 device_delete_children(self);
469 usb_callout_drain(&sc->sc_callout);
470 xhci_halt_controller(sc);
471 xhci_reset_controller(sc);
473 pci_disable_busmaster(self);
475 if (sc->sc_irq_res && sc->sc_intr_hdl) {
476 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
477 sc->sc_intr_hdl = NULL;
479 if (sc->sc_irq_res) {
480 bus_release_resource(self, SYS_RES_IRQ,
481 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
482 sc->sc_irq_res = NULL;
483 pci_release_msi(self);
485 if (sc->sc_msix_res != NULL && sc->sc_msix_res != sc->sc_io_res) {
486 bus_release_resource(self, SYS_RES_MEMORY,
487 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
488 sc->sc_msix_res = NULL;
491 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
493 sc->sc_io_res = NULL;
502 xhci_pci_take_controller(device_t self)
504 struct xhci_softc *sc = device_get_softc(self);
511 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
515 /* Synchronise with the BIOS if it owns the controller. */
516 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
517 eecp += XHCI_XECP_NEXT(eec) << 2) {
518 eec = XREAD4(sc, capa, eecp);
520 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
522 bios_sem = XREAD1(sc, capa, eecp +
526 device_printf(sc->sc_bus.bdev, "waiting for BIOS "
527 "to give up control\n");
528 XWRITE1(sc, capa, eecp +
529 XHCI_XECP_OS_SEM, 1);
532 bios_sem = XREAD1(sc, capa, eecp +
538 device_printf(sc->sc_bus.bdev,
539 "timed out waiting for BIOS\n");
542 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */