sys/dev/usb/ehci.c

   1 /*      $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2004 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. All advertising materials mentioning features or use of this software
  19  *    must display the following acknowledgement:
  20  *        This product includes software developed by the NetBSD
  21  *        Foundation, Inc. and its contributors.
  22  * 4. Neither the name of The NetBSD Foundation nor the names of its
  23  *    contributors may be used to endorse or promote products derived
  24  *    from this software without specific prior written permission.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  36  * POSSIBILITY OF SUCH DAMAGE.
  37  */
  38
  39 /*
  40  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  41  *
  42  * The EHCI 1.0 spec can be found at
  43  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  44  * and the USB 2.0 spec at
  45  * http://www.usb.org/developers/docs/usb_20.zip
  46  *
  47  */
  48
  49 /*
  50  * TODO:
  51  * 1) The EHCI driver lacks support for isochronous transfers, so
  52  *    devices using them don't work.
  53  *
  54  * 2) Interrupt transfer scheduling does not manage the time available
  55  *    in each frame, so it is possible for the transfers to overrun
  56  *    the end of the frame.
  57  *
  58  * 3) Command failures are not recovered correctly.
  59  */
  60
  61 #include <sys/cdefs.h>
  62 __FBSDID("$FreeBSD$");
  63
  64 #include <sys/param.h>
  65 #include <sys/systm.h>
  66 #include <sys/malloc.h>
  67 #include <sys/kernel.h>
  68 #include <sys/endian.h>
  69 #include <sys/module.h>
  70 #include <sys/bus.h>
  71 #include <sys/lock.h>
  72 #include <sys/lockmgr.h>
  73 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
  74 #include <machine/cpu.h>
  75 #endif
  76 #include <sys/proc.h>
  77 #include <sys/queue.h>
  78 #include <sys/sysctl.h>
  79
  80 #include <machine/bus.h>
  81 #include <machine/endian.h>
  82
  83 #include <dev/usb/usb.h>
  84 #include <dev/usb/usbdi.h>
  85 #include <dev/usb/usbdivar.h>
  86 #include <dev/usb/usb_mem.h>
  87 #include <dev/usb/usb_quirks.h>
  88
  89 #include <dev/usb/ehcireg.h>
  90 #include <dev/usb/ehcivar.h>
  91
  92 #define delay(d)                DELAY(d)
  93
  94 #ifdef USB_DEBUG
  95 #define EHCI_DEBUG USB_DEBUG
  96 #define DPRINTF(x)      do { if (ehcidebug) printf x; } while (0)
  97 #define DPRINTFN(n,x)   do { if (ehcidebug>(n)) printf x; } while (0)
  98 int ehcidebug = 0;
  99 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
 100 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
 101            &ehcidebug, 0, "ehci debug level");
 102 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
 103 #else
 104 #define DPRINTF(x)
 105 #define DPRINTFN(n,x)
 106 #endif
 107
 108 struct ehci_pipe {
 109         struct usbd_pipe pipe;
 110
 111         ehci_soft_qh_t *sqh;
 112         union {
 113                 ehci_soft_qtd_t *qtd;
 114                 /* ehci_soft_itd_t *itd; */
 115         } tail;
 116         union {
 117                 /* Control pipe */
 118                 struct {
 119                         usb_dma_t reqdma;
 120                         u_int length;
 121                         /*ehci_soft_qtd_t *setup, *data, *stat;*/
 122                 } ctl;
 123                 /* Interrupt pipe */
 124                 struct {
 125                         u_int length;
 126                 } intr;
 127                 /* Bulk pipe */
 128                 struct {
 129                         u_int length;
 130                 } bulk;
 131                 /* Iso pipe */
 132                 struct {
 133                         u_int next_frame;
 134                         u_int cur_xfers;
 135                 } isoc;
 136         } u;
 137 };
 138
 139 static usbd_status      ehci_open(usbd_pipe_handle);
 140 static void             ehci_poll(struct usbd_bus *);
 141 static void             ehci_softintr(void *);
 142 static int              ehci_intr1(ehci_softc_t *);
 143 static void             ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
 144 static void             ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
 145 static void             ehci_check_qh_intr(ehci_softc_t *, struct ehci_xfer *);
 146 static void             ehci_check_itd_intr(ehci_softc_t *, struct ehci_xfer *);
 147 static void             ehci_idone(struct ehci_xfer *);
 148 static void             ehci_timeout(void *);
 149 static void             ehci_timeout_task(void *);
 150 static void             ehci_intrlist_timeout(void *);
 151
 152 static usbd_status      ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
 153 static void             ehci_freem(struct usbd_bus *, usb_dma_t *);
 154
 155 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
 156 static void             ehci_freex(struct usbd_bus *, usbd_xfer_handle);
 157
 158 static usbd_status      ehci_root_ctrl_transfer(usbd_xfer_handle);
 159 static usbd_status      ehci_root_ctrl_start(usbd_xfer_handle);
 160 static void             ehci_root_ctrl_abort(usbd_xfer_handle);
 161 static void             ehci_root_ctrl_close(usbd_pipe_handle);
 162 static void             ehci_root_ctrl_done(usbd_xfer_handle);
 163
 164 static usbd_status      ehci_root_intr_transfer(usbd_xfer_handle);
 165 static usbd_status      ehci_root_intr_start(usbd_xfer_handle);
 166 static void             ehci_root_intr_abort(usbd_xfer_handle);
 167 static void             ehci_root_intr_close(usbd_pipe_handle);
 168 static void             ehci_root_intr_done(usbd_xfer_handle);
 169
 170 static usbd_status      ehci_device_ctrl_transfer(usbd_xfer_handle);
 171 static usbd_status      ehci_device_ctrl_start(usbd_xfer_handle);
 172 static void             ehci_device_ctrl_abort(usbd_xfer_handle);
 173 static void             ehci_device_ctrl_close(usbd_pipe_handle);
 174 static void             ehci_device_ctrl_done(usbd_xfer_handle);
 175
 176 static usbd_status      ehci_device_bulk_transfer(usbd_xfer_handle);
 177 static usbd_status      ehci_device_bulk_start(usbd_xfer_handle);
 178 static void             ehci_device_bulk_abort(usbd_xfer_handle);
 179 static void             ehci_device_bulk_close(usbd_pipe_handle);
 180 static void             ehci_device_bulk_done(usbd_xfer_handle);
 181
 182 static usbd_status      ehci_device_intr_transfer(usbd_xfer_handle);
 183 static usbd_status      ehci_device_intr_start(usbd_xfer_handle);
 184 static void             ehci_device_intr_abort(usbd_xfer_handle);
 185 static void             ehci_device_intr_close(usbd_pipe_handle);
 186 static void             ehci_device_intr_done(usbd_xfer_handle);
 187
 188 static usbd_status      ehci_device_isoc_transfer(usbd_xfer_handle);
 189 static usbd_status      ehci_device_isoc_start(usbd_xfer_handle);
 190 static void             ehci_device_isoc_abort(usbd_xfer_handle);
 191 static void             ehci_device_isoc_close(usbd_pipe_handle);
 192 static void             ehci_device_isoc_done(usbd_xfer_handle);
 193
 194 static void             ehci_device_clear_toggle(usbd_pipe_handle pipe);
 195 static void             ehci_noop(usbd_pipe_handle pipe);
 196
 197 static int              ehci_str(usb_string_descriptor_t *, int, char *);
 198 static void             ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
 199 static void             ehci_disown(ehci_softc_t *, int, int);
 200
 201 static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
 202 static void             ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
 203
 204 static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
 205 static void             ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
 206 static usbd_status      ehci_alloc_sqtd_chain(struct ehci_pipe *,
 207                             ehci_softc_t *, int, int, usbd_xfer_handle,
 208                             ehci_soft_qtd_t *, ehci_soft_qtd_t *,
 209                             ehci_soft_qtd_t **, ehci_soft_qtd_t **);
 210 static void             ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qh_t *,
 211                             ehci_soft_qtd_t *, ehci_soft_qtd_t *);
 212
 213 static ehci_soft_itd_t  *ehci_alloc_itd(ehci_softc_t *);
 214 static void             ehci_free_itd(ehci_softc_t *, ehci_soft_itd_t *);
 215 static void             ehci_rem_free_itd_chain(ehci_softc_t *,
 216                             struct ehci_xfer *);
 217 static void             ehci_abort_isoc_xfer(usbd_xfer_handle, usbd_status);
 218
 219 static usbd_status      ehci_device_request(usbd_xfer_handle xfer);
 220
 221 static usbd_status      ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
 222                             int ival);
 223
 224 static void             ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
 225 static void             ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
 226                                     ehci_soft_qh_t *);
 227 static void             ehci_activate_qh(ehci_soft_qh_t *, ehci_soft_qtd_t *);
 228 static void             ehci_sync_hc(ehci_softc_t *);
 229
 230 static void             ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
 231 static void             ehci_abort_xfer(usbd_xfer_handle, usbd_status);
 232
 233 #ifdef EHCI_DEBUG
 234 static void             ehci_dump_regs(ehci_softc_t *);
 235 void                    ehci_dump(void);
 236 static ehci_softc_t     *theehci;
 237 static void             ehci_dump_link(ehci_link_t, int);
 238 static void             ehci_dump_sqtds(ehci_soft_qtd_t *);
 239 static void             ehci_dump_sqtd(ehci_soft_qtd_t *);
 240 static void             ehci_dump_qtd(ehci_qtd_t *);
 241 static void             ehci_dump_sqh(ehci_soft_qh_t *);
 242 #ifdef notyet
 243 static void             ehci_dump_sitd(struct ehci_soft_itd *);
 244 static void             ehci_dump_itd(struct ehci_soft_itd *);
 245 #endif
 246 #ifdef DIAGNOSTIC
 247 static void             ehci_dump_exfer(struct ehci_xfer *);
 248 #endif
 249 #endif
 250
 251 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
 252
 253 #define EHCI_INTR_ENDPT 1
 254
 255 #define ehci_add_intr_list(sc, ex) \
 256         LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
 257 #define ehci_del_intr_list(ex) \
 258         do { \
 259                 LIST_REMOVE((ex), inext); \
 260                 (ex)->inext.le_prev = NULL; \
 261         } while (0)
 262 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
 263
 264 static struct usbd_bus_methods ehci_bus_methods = {
 265         ehci_open,
 266         ehci_softintr,
 267         ehci_poll,
 268         ehci_allocm,
 269         ehci_freem,
 270         ehci_allocx,
 271         ehci_freex,
 272 };
 273
 274 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
 275         ehci_root_ctrl_transfer,
 276         ehci_root_ctrl_start,
 277         ehci_root_ctrl_abort,
 278         ehci_root_ctrl_close,
 279         ehci_noop,
 280         ehci_root_ctrl_done,
 281 };
 282
 283 static struct usbd_pipe_methods ehci_root_intr_methods = {
 284         ehci_root_intr_transfer,
 285         ehci_root_intr_start,
 286         ehci_root_intr_abort,
 287         ehci_root_intr_close,
 288         ehci_noop,
 289         ehci_root_intr_done,
 290 };
 291
 292 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
 293         ehci_device_ctrl_transfer,
 294         ehci_device_ctrl_start,
 295         ehci_device_ctrl_abort,
 296         ehci_device_ctrl_close,
 297         ehci_noop,
 298         ehci_device_ctrl_done,
 299 };
 300
 301 static struct usbd_pipe_methods ehci_device_intr_methods = {
 302         ehci_device_intr_transfer,
 303         ehci_device_intr_start,
 304         ehci_device_intr_abort,
 305         ehci_device_intr_close,
 306         ehci_device_clear_toggle,
 307         ehci_device_intr_done,
 308 };
 309
 310 static struct usbd_pipe_methods ehci_device_bulk_methods = {
 311         ehci_device_bulk_transfer,
 312         ehci_device_bulk_start,
 313         ehci_device_bulk_abort,
 314         ehci_device_bulk_close,
 315         ehci_device_clear_toggle,
 316         ehci_device_bulk_done,
 317 };
 318
 319 static struct usbd_pipe_methods ehci_device_isoc_methods = {
 320         ehci_device_isoc_transfer,
 321         ehci_device_isoc_start,
 322         ehci_device_isoc_abort,
 323         ehci_device_isoc_close,
 324         ehci_noop,
 325         ehci_device_isoc_done,
 326 };
 327
 328 static usbd_status
 329 ehci_hcreset(ehci_softc_t *sc)
 330 {
 331         u_int32_t hcr;
 332         u_int i;
 333
 334         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 335         for (i = 0; i < 100; i++) {
 336                 usb_delay_ms(&sc->sc_bus, 1);
 337                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 338                 if (hcr)
 339                         break;
 340         }
 341         if (!hcr)
 342                 /*
 343                  * Fall through and try reset anyway even though
 344                  * Table 2-9 in the EHCI spec says this will result
 345                  * in undefined behavior.
 346                  */
 347                 printf("%s: stop timeout\n",
 348                        device_get_nameunit(sc->sc_bus.bdev));
 349
 350         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 351         for (i = 0; i < 100; i++) {
 352                 usb_delay_ms(&sc->sc_bus, 1);
 353                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 354                 if (!hcr)
 355                         return (USBD_NORMAL_COMPLETION);
 356         }
 357         printf("%s: reset timeout\n", device_get_nameunit(sc->sc_bus.bdev));
 358         return (USBD_IOERROR);
 359 }
 360
 361 usbd_status
 362 ehci_init(ehci_softc_t *sc)
 363 {
 364         u_int32_t version, sparams, cparams, hcr;
 365         u_int i;
 366         usbd_status err;
 367         ehci_soft_qh_t *sqh;
 368         u_int ncomp;
 369         int lev;
 370
 371         DPRINTF(("ehci_init: start\n"));
 372 #ifdef EHCI_DEBUG
 373         theehci = sc;
 374 #endif
 375
 376         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 377
 378         version = EREAD2(sc, EHCI_HCIVERSION);
 379         printf("%s: EHCI version %x.%x\n", device_get_nameunit(sc->sc_bus.bdev),
 380                version >> 8, version & 0xff);
 381
 382         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 383         DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
 384         sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
 385         ncomp = EHCI_HCS_N_CC(sparams);
 386         if (ncomp != sc->sc_ncomp) {
 387                 printf("%s: wrong number of companions (%d != %d)\n",
 388                        device_get_nameunit(sc->sc_bus.bdev),
 389                        ncomp, sc->sc_ncomp);
 390                 if (ncomp < sc->sc_ncomp)
 391                         sc->sc_ncomp = ncomp;
 392         }
 393         if (sc->sc_ncomp > 0) {
 394                 printf("%s: companion controller%s, %d port%s each:",
 395                     device_get_nameunit(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
 396                     EHCI_HCS_N_PCC(sparams),
 397                     EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
 398                 for (i = 0; i < sc->sc_ncomp; i++)
 399                         printf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
 400                 printf("\n");
 401         }
 402         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 403         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 404         DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
 405
 406         if (EHCI_HCC_64BIT(cparams)) {
 407                 /* MUST clear segment register if 64 bit capable. */
 408                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 409         }
 410
 411         sc->sc_bus.usbrev = USBREV_2_0;
 412
 413         /* Reset the controller */
 414         DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
 415         err = ehci_hcreset(sc);
 416         if (err != USBD_NORMAL_COMPLETION)
 417                 return (err);
 418
 419         /* frame list size at default, read back what we got and use that */
 420         switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
 421         case 0: sc->sc_flsize = 1024; break;
 422         case 1: sc->sc_flsize = 512; break;
 423         case 2: sc->sc_flsize = 256; break;
 424         case 3: return (USBD_IOERROR);
 425         }
 426         err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
 427             EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
 428         if (err)
 429                 return (err);
 430         DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
 431         sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
 432
 433         for (i = 0; i < sc->sc_flsize; i++) {
 434                 sc->sc_flist[i] = EHCI_NULL;
 435         }
 436
 437         EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 438
 439         sc->sc_softitds = malloc(sc->sc_flsize * sizeof(ehci_soft_itd_t *),
 440             M_USB, M_NOWAIT | M_ZERO);
 441         if (sc->sc_softitds == NULL)
 442                 return (ENOMEM);
 443         LIST_INIT(&sc->sc_freeitds);
 444
 445         /* Set up the bus struct. */
 446         sc->sc_bus.methods = &ehci_bus_methods;
 447         sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
 448
 449 #if defined(__NetBSD__) || defined(__OpenBSD__)
 450         sc->sc_powerhook = powerhook_establish(ehci_power, sc);
 451         sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
 452 #endif
 453
 454         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 455
 456         /*
 457          * Allocate the interrupt dummy QHs. These are arranged to give
 458          * poll intervals that are powers of 2 times 1ms.
 459          */
 460         for (i = 0; i < EHCI_INTRQHS; i++) {
 461                 sqh = ehci_alloc_sqh(sc);
 462                 if (sqh == NULL) {
 463                         err = USBD_NOMEM;
 464                         goto bad1;
 465                 }
 466                 sc->sc_islots[i].sqh = sqh;
 467         }
 468         lev = 0;
 469         for (i = 0; i < EHCI_INTRQHS; i++) {
 470                 if (i == EHCI_IQHIDX(lev + 1, 0))
 471                         lev++;
 472                 sqh = sc->sc_islots[i].sqh;
 473                 if (i == 0) {
 474                         /* The last (1ms) QH terminates. */
 475                         sqh->qh.qh_link = EHCI_NULL;
 476                         sqh->next = NULL;
 477                 } else {
 478                         /* Otherwise the next QH has half the poll interval */
 479                         sqh->next =
 480                             sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
 481                         sqh->qh.qh_link = htole32(sqh->next->physaddr |
 482                             EHCI_LINK_QH);
 483                 }
 484                 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 485                 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
 486                 sqh->qh.qh_curqtd = EHCI_NULL;
 487                 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 488                 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 489                 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 490         }
 491         /* Point the frame list at the last level (128ms). */
 492         for (i = 0; i < sc->sc_flsize; i++) {
 493                 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
 494                     sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
 495                     i)].sqh->physaddr);
 496         }
 497
 498         /* Allocate dummy QH that starts the async list. */
 499         sqh = ehci_alloc_sqh(sc);
 500         if (sqh == NULL) {
 501                 err = USBD_NOMEM;
 502                 goto bad1;
 503         }
 504         /* Fill the QH */
 505         sqh->qh.qh_endp =
 506             htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 507         sqh->qh.qh_link =
 508             htole32(sqh->physaddr | EHCI_LINK_QH);
 509         sqh->qh.qh_curqtd = EHCI_NULL;
 510         sqh->prev = sqh; /*It's a circular list.. */
 511         sqh->next = sqh;
 512         /* Fill the overlay qTD */
 513         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 514         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 515         sqh->qh.qh_qtd.qtd_status = htole32(0);
 516 #ifdef EHCI_DEBUG
 517         if (ehcidebug) {
 518                 ehci_dump_sqh(sqh);
 519         }
 520 #endif
 521
 522         /* Point to async list */
 523         sc->sc_async_head = sqh;
 524         EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
 525
 526         callout_init(&sc->sc_tmo_intrlist, 0);
 527
 528         lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
 529
 530         /* Enable interrupts */
 531         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 532
 533         /* Turn on controller */
 534         EOWRITE4(sc, EHCI_USBCMD,
 535                  EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
 536                  (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 537                  EHCI_CMD_ASE |
 538                  EHCI_CMD_PSE |
 539                  EHCI_CMD_RS);
 540
 541         /* Take over port ownership */
 542         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 543
 544         for (i = 0; i < 100; i++) {
 545                 usb_delay_ms(&sc->sc_bus, 1);
 546                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 547                 if (!hcr)
 548                         break;
 549         }
 550         if (hcr) {
 551                 printf("%s: run timeout\n", device_get_nameunit(sc->sc_bus.bdev));
 552                 return (USBD_IOERROR);
 553         }
 554
 555         return (USBD_NORMAL_COMPLETION);
 556
 557 #if 0
 558  bad2:
 559         ehci_free_sqh(sc, sc->sc_async_head);
 560 #endif
 561  bad1:
 562         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 563         return (err);
 564 }
 565
 566 int
 567 ehci_intr(void *v)
 568 {
 569         ehci_softc_t *sc = v;
 570
 571         if (sc == NULL || sc->sc_dying)
 572                 return (0);
 573
 574         /* If we get an interrupt while polling, then just ignore it. */
 575         if (sc->sc_bus.use_polling) {
 576                 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 577
 578                 if (intrs)
 579                         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 580 #ifdef DIAGNOSTIC
 581                 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
 582 #endif
 583                 return (0);
 584         }
 585
 586         return (ehci_intr1(sc));
 587 }
 588
 589 static int
 590 ehci_intr1(ehci_softc_t *sc)
 591 {
 592         u_int32_t intrs, eintrs;
 593
 594         DPRINTFN(20,("ehci_intr1: enter\n"));
 595
 596         /* In case the interrupt occurs before initialization has completed. */
 597         if (sc == NULL) {
 598 #ifdef DIAGNOSTIC
 599                 printf("ehci_intr1: sc == NULL\n");
 600 #endif
 601                 return (0);
 602         }
 603
 604         intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 605         if (!intrs)
 606                 return (0);
 607
 608         eintrs = intrs & sc->sc_eintrs;
 609         DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
 610                      sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
 611                      (u_int)eintrs));
 612         if (!eintrs)
 613                 return (0);
 614
 615         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 616         sc->sc_bus.intr_context++;
 617         sc->sc_bus.no_intrs++;
 618         if (eintrs & EHCI_STS_IAA) {
 619                 DPRINTF(("ehci_intr1: door bell\n"));
 620                 wakeup(&sc->sc_async_head);
 621                 eintrs &= ~EHCI_STS_IAA;
 622         }
 623         if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
 624                 DPRINTFN(5,("ehci_intr1: %s %s\n",
 625                             eintrs & EHCI_STS_INT ? "INT" : "",
 626                             eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
 627                 usb_schedsoftintr(&sc->sc_bus);
 628                 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
 629         }
 630         if (eintrs & EHCI_STS_HSE) {
 631                 printf("%s: unrecoverable error, controller halted\n",
 632                        device_get_nameunit(sc->sc_bus.bdev));
 633                 /* XXX what else */
 634         }
 635         if (eintrs & EHCI_STS_PCD) {
 636                 ehci_pcd(sc, sc->sc_intrxfer);
 637                 eintrs &= ~EHCI_STS_PCD;
 638         }
 639
 640         sc->sc_bus.intr_context--;
 641
 642         if (eintrs != 0) {
 643                 /* Block unprocessed interrupts. */
 644                 sc->sc_eintrs &= ~eintrs;
 645                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 646                 printf("%s: blocking intrs 0x%x\n",
 647                        device_get_nameunit(sc->sc_bus.bdev), eintrs);
 648         }
 649
 650         return (1);
 651 }
 652
 653 /*
 654  * XXX write back xfer data for architectures with a write-back
 655  *     data cache; this is a hack because usb is mis-architected
 656  *     in blindly mixing bus_dma w/ PIO.
 657  */
 658 static __inline void
 659 hacksync(usbd_xfer_handle xfer)
 660 {
 661         bus_dma_tag_t tag;
 662         struct usb_dma_mapping *dmap;
 663
 664         if (xfer->length == 0)
 665                 return;
 666         tag = xfer->pipe->device->bus->buffer_dmatag;
 667         dmap = &xfer->dmamap;
 668         bus_dmamap_sync(tag, dmap->map, BUS_DMASYNC_PREWRITE);
 669 }
 670
 671 void
 672 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
 673 {
 674         usbd_pipe_handle pipe;
 675         u_char *p;
 676         int i, m;
 677
 678         if (xfer == NULL) {
 679                 /* Just ignore the change. */
 680                 return;
 681         }
 682
 683         pipe = xfer->pipe;
 684
 685         p = xfer->buffer;
 686         m = min(sc->sc_noport, xfer->length * 8 - 1);
 687         memset(p, 0, xfer->length);
 688         for (i = 1; i <= m; i++) {
 689                 /* Pick out CHANGE bits from the status reg. */
 690                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
 691                         p[i/8] |= 1 << (i%8);
 692         }
 693         DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
 694         xfer->actlen = xfer->length;
 695         xfer->status = USBD_NORMAL_COMPLETION;
 696
 697         hacksync(xfer); /* XXX to compensate for usb_transfer_complete */
 698         usb_transfer_complete(xfer);
 699 }
 700
 701 void
 702 ehci_softintr(void *v)
 703 {
 704         ehci_softc_t *sc = v;
 705         struct ehci_xfer *ex, *nextex;
 706
 707         DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
 708                      sc->sc_bus.intr_context));
 709
 710         sc->sc_bus.intr_context++;
 711
 712         /*
 713          * The only explanation I can think of for why EHCI is as brain dead
 714          * as UHCI interrupt-wise is that Intel was involved in both.
 715          * An interrupt just tells us that something is done, we have no
 716          * clue what, so we need to scan through all active transfers. :-(
 717          */
 718         for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
 719                 nextex = LIST_NEXT(ex, inext);
 720                 ehci_check_intr(sc, ex);
 721         }
 722
 723         /* Schedule a callout to catch any dropped transactions. */
 724         if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
 725             !LIST_EMPTY(&sc->sc_intrhead))
 726                 callout_reset(&sc->sc_tmo_intrlist, hz / 5,
 727                     ehci_intrlist_timeout, sc);
 728
 729 #ifdef USB_USE_SOFTINTR
 730         if (sc->sc_softwake) {
 731                 sc->sc_softwake = 0;
 732                 wakeup(&sc->sc_softwake);
 733         }
 734 #endif /* USB_USE_SOFTINTR */
 735
 736         sc->sc_bus.intr_context--;
 737 }
 738
 739 /* Check for an interrupt. */
 740 void
 741 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 742 {
 743         int attr;
 744
 745         DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
 746
 747         attr = ex->xfer.pipe->endpoint->edesc->bmAttributes;
 748         if (UE_GET_XFERTYPE(attr) == UE_ISOCHRONOUS)
 749                 ehci_check_itd_intr(sc, ex);
 750         else
 751                 ehci_check_qh_intr(sc, ex);
 752 }
 753
 754 void
 755 ehci_check_qh_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 756 {
 757         ehci_soft_qtd_t *sqtd, *lsqtd;
 758         u_int32_t status;
 759
 760         if (ex->sqtdstart == NULL) {
 761                 printf("ehci_check_qh_intr: not valid sqtd\n");
 762                 return;
 763         }
 764         lsqtd = ex->sqtdend;
 765 #ifdef DIAGNOSTIC
 766         if (lsqtd == NULL) {
 767                 printf("ehci_check_qh_intr: lsqtd==0\n");
 768                 return;
 769         }
 770 #endif
 771         /*
 772          * If the last TD is still active we need to check whether there
 773          * is a an error somewhere in the middle, or whether there was a
 774          * short packet (SPD and not ACTIVE).
 775          */
 776         if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
 777                 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
 778                 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
 779                         status = le32toh(sqtd->qtd.qtd_status);
 780                         /* If there's an active QTD the xfer isn't done. */
 781                         if (status & EHCI_QTD_ACTIVE)
 782                                 break;
 783                         /* Any kind of error makes the xfer done. */
 784                         if (status & EHCI_QTD_HALTED)
 785                                 goto done;
 786                         /* We want short packets, and it is short: it's done */
 787                         if (EHCI_QTD_GET_BYTES(status) != 0)
 788                                 goto done;
 789                 }
 790                 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
 791                               ex, ex->sqtdstart));
 792                 return;
 793         }
 794  done:
 795         DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
 796         callout_stop(&ex->xfer.timeout_handle);
 797         usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
 798         ehci_idone(ex);
 799 }
 800
 801 void
 802 ehci_check_itd_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 803 {
 804         ehci_soft_itd_t *itd;
 805         int i;
 806
 807         if (ex->itdstart == NULL) {
 808                 printf("ehci_check_itd_intr: not valid itd\n");
 809                 return;
 810         }
 811
 812         itd = ex->itdend;
 813 #ifdef DIAGNOSTIC
 814         if (itd == NULL) {
 815                 printf("ehci_check_itd_intr: itdend == 0\n");
 816                 return;
 817         }
 818 #endif
 819
 820         /*
 821          * Step 1, check no active transfers in last itd, meaning we're finished
 822          */
 823         for (i = 0; i < 8; i++) {
 824                 if (le32toh(itd->itd.itd_ctl[i]) & EHCI_ITD_ACTIVE)
 825                         break;
 826         }
 827
 828         if (i == 8) {
 829                 goto done;      /* All 8 descriptors inactive, it's done */
 830         }
 831
 832         /*
 833          * Step 2, check for errors in status bits, throughout chain...
 834          */
 835
 836         DPRINTFN(12, ("ehci_check_itd_intr: active ex=%p\n", ex));
 837
 838         for (itd = ex->itdstart; itd != ex->itdend; itd = itd->xfer_next) {
 839                 for (i = 0; i < 8; i++) {
 840                         if (le32toh(itd->itd.itd_ctl[i]) & (EHCI_ITD_BUF_ERR |
 841                             EHCI_ITD_BABBLE | EHCI_ITD_ERROR))
 842                                 break;
 843                 }
 844                 if (i != 8) { /* Error in one of the itds */
 845                         goto done;
 846                 }
 847         } /* itd search loop */
 848
 849         DPRINTFN(12, ("ehci_check_itd_intr: ex %p itd %p still active\n", ex,
 850             ex->itdstart));
 851         return;
 852 done:
 853         DPRINTFN(12, ("ehci_check_itd_intr: ex=%p done\n", ex));
 854         callout_stop(&ex->xfer.timeout_handle);
 855         usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
 856         ehci_idone(ex);
 857 }
 858
 859 void
 860 ehci_idone(struct ehci_xfer *ex)
 861 {
 862         usbd_xfer_handle xfer = &ex->xfer;
 863         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
 864         ehci_soft_qtd_t *sqtd, *lsqtd;
 865         u_int32_t status = 0, nstatus = 0;
 866         ehci_physaddr_t nextphys, altnextphys;
 867         int actlen, cerr;
 868
 869         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
 870 #ifdef DIAGNOSTIC
 871         {
 872                 int s = splhigh();
 873                 if (ex->isdone) {
 874                         splx(s);
 875 #ifdef EHCI_DEBUG
 876                         printf("ehci_idone: ex is done!\n   ");
 877                         ehci_dump_exfer(ex);
 878 #else
 879                         printf("ehci_idone: ex=%p is done!\n", ex);
 880 #endif
 881                         return;
 882                 }
 883                 ex->isdone = 1;
 884                 splx(s);
 885         }
 886 #endif
 887
 888         if (xfer->status == USBD_CANCELLED ||
 889             xfer->status == USBD_TIMEOUT) {
 890                 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
 891                 return;
 892         }
 893
 894 #ifdef EHCI_DEBUG
 895         DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
 896         if (ehcidebug > 10)
 897                 ehci_dump_sqtds(ex->sqtdstart);
 898 #endif
 899
 900         /*
 901          * Make sure that the QH overlay qTD does not reference any
 902          * of the qTDs we are about to free. This is probably only
 903          * necessary if the transfer is marked as HALTED.
 904          */
 905         nextphys = EHCI_LINK_ADDR(le32toh(epipe->sqh->qh.qh_qtd.qtd_next));
 906         altnextphys =
 907             EHCI_LINK_ADDR(le32toh(epipe->sqh->qh.qh_qtd.qtd_altnext));
 908         for (sqtd = ex->sqtdstart; sqtd != ex->sqtdend->nextqtd;
 909              sqtd = sqtd->nextqtd) {
 910                 if (sqtd->physaddr == nextphys) {
 911                         epipe->sqh->qh.qh_qtd.qtd_next =
 912                             htole32(ex->sqtdend->nextqtd->physaddr);
 913                         DPRINTFN(4, ("ehci_idone: updated overlay next ptr\n"));
 914
 915                 }
 916                 if (sqtd->physaddr == altnextphys) {
 917                         DPRINTFN(4,
 918                             ("ehci_idone: updated overlay altnext ptr\n"));
 919                         epipe->sqh->qh.qh_qtd.qtd_altnext =
 920                             htole32(ex->sqtdend->nextqtd->physaddr);
 921                 }
 922         }
 923
 924         /* The transfer is done, compute actual length and status. */
 925         if (UE_GET_XFERTYPE(xfer->pipe->endpoint->edesc->bmAttributes)
 926             == UE_ISOCHRONOUS) {
 927                 /* Isoc transfer */
 928                 struct ehci_soft_itd *itd;
 929                 int i, nframes, len, uframes;
 930
 931                 nframes = 0;
 932                 actlen = 0;
 933
 934                 switch (xfer->pipe->endpoint->edesc->bInterval) {
 935                 case 0:
 936                         panic("ehci: isoc xfer suddenly has 0 bInterval, "
 937                             "invalid\n");
 938                 case 1:
 939                         uframes = 1;
 940                         break;
 941                 case 2:
 942                         uframes = 2;
 943                         break;
 944                 case 3:
 945                         uframes = 4;
 946                         break;
 947                 default:
 948                         uframes = 8;
 949                         break;
 950                 }
 951
 952                 for (itd = ex->itdstart; itd != NULL; itd = itd->xfer_next) {
 953                         for (i = 0; i < 8; i += uframes) {
 954                                 /* XXX - driver didn't fill in the frame full
 955                                  *   of uframes. This leads to scheduling
 956                                  *   inefficiencies, but working around
 957                                  *   this doubles complexity of tracking
 958                                  *   an xfer.
 959                                  */
 960                                 if (nframes >= xfer->nframes)
 961                                         break;
 962
 963                                 status = le32toh(itd->itd.itd_ctl[i]);
 964                                 len = EHCI_ITD_GET_LEN(status);
 965                                 xfer->frlengths[nframes++] = len;
 966                                 actlen += len;
 967                         }
 968                         if (nframes >= xfer->nframes)
 969                                 break;
 970                 }
 971                 xfer->actlen = actlen;
 972                 xfer->status = USBD_NORMAL_COMPLETION;
 973
 974                 goto end;
 975         }
 976
 977         /* Continue processing xfers using queue heads */
 978
 979         lsqtd = ex->sqtdend;
 980         actlen = 0;
 981         for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd;
 982             sqtd =sqtd->nextqtd) {
 983                 nstatus = le32toh(sqtd->qtd.qtd_status);
 984                 if (nstatus & EHCI_QTD_ACTIVE)
 985                         break;
 986
 987                 status = nstatus;
 988                 /* halt is ok if descriptor is last, and complete */
 989                 if (sqtd == lsqtd && EHCI_QTD_GET_BYTES(status) == 0)
 990                         status &= ~EHCI_QTD_HALTED;
 991                 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
 992                         actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
 993         }
 994
 995         cerr = EHCI_QTD_GET_CERR(status);
 996         DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
 997             "status=0x%x\n", xfer->length, actlen, cerr, status));
 998         xfer->actlen = actlen;
 999         if ((status & EHCI_QTD_HALTED) != 0) {
1000 #ifdef EHCI_DEBUG
1001                 char sbuf[128];
1002
1003                 bitmask_snprintf((u_int32_t)status,
1004                     "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1005                     "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1006
1007                 DPRINTFN(2,
1008                          ("ehci_idone: error, addr=%d, endpt=0x%02x, "
1009                           "status 0x%s\n",
1010                           xfer->pipe->device->address,
1011                           xfer->pipe->endpoint->edesc->bEndpointAddress,
1012                           sbuf));
1013                 if (ehcidebug > 2) {
1014                         ehci_dump_sqh(epipe->sqh);
1015                         ehci_dump_sqtds(ex->sqtdstart);
1016                 }
1017 #endif
1018                 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
1019                         xfer->status = USBD_STALLED;
1020                 else
1021                         xfer->status = USBD_IOERROR; /* more info XXX */
1022         } else {
1023                 xfer->status = USBD_NORMAL_COMPLETION;
1024         }
1025 end:
1026         /* XXX transfer_complete memcpys out transfer data (for in endpoints)
1027          * during this call, before methods->done is called: dma sync required
1028          * beforehand?
1029          */
1030         usb_transfer_complete(xfer);
1031         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
1032 }
1033
1034 /*
1035  * Wait here until controller claims to have an interrupt.
1036  * Then call ehci_intr and return.  Use timeout to avoid waiting
1037  * too long.
1038  */
1039 void
1040 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
1041 {
1042         int timo = xfer->timeout;
1043         int usecs;
1044         u_int32_t intrs;
1045
1046         xfer->status = USBD_IN_PROGRESS;
1047         for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1048                 usb_delay_ms(&sc->sc_bus, 1);
1049                 if (sc->sc_dying)
1050                         break;
1051                 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
1052                         sc->sc_eintrs;
1053                 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
1054 #ifdef EHCI_DEBUG
1055                 if (ehcidebug > 15)
1056                         ehci_dump_regs(sc);
1057 #endif
1058                 if (intrs) {
1059                         ehci_intr1(sc);
1060                         if (xfer->status != USBD_IN_PROGRESS)
1061                                 return;
1062                 }
1063         }
1064
1065         /* Timeout */
1066         DPRINTF(("ehci_waitintr: timeout\n"));
1067         xfer->status = USBD_TIMEOUT;
1068         usb_transfer_complete(xfer);
1069         /* XXX should free TD */
1070 }
1071
1072 void
1073 ehci_poll(struct usbd_bus *bus)
1074 {
1075         ehci_softc_t *sc = (ehci_softc_t *)bus;
1076 #ifdef EHCI_DEBUG
1077         static int last;
1078         int new;
1079         new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1080         if (new != last) {
1081                 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
1082                 last = new;
1083         }
1084 #endif
1085
1086         if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
1087                 ehci_intr1(sc);
1088 }
1089
1090 int
1091 ehci_detach(struct ehci_softc *sc, int flags)
1092 {
1093         int rv = 0;
1094
1095         sc->sc_dying = 1;
1096
1097         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1098         (void) ehci_hcreset(sc);
1099         callout_stop(&sc->sc_tmo_intrlist);
1100
1101 #if defined(__NetBSD__) || defined(__OpenBSD__)
1102         if (sc->sc_powerhook != NULL)
1103                 powerhook_disestablish(sc->sc_powerhook);
1104         if (sc->sc_shutdownhook != NULL)
1105                 shutdownhook_disestablish(sc->sc_shutdownhook);
1106 #endif
1107         usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
1108
1109         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
1110         /* XXX free other data structures XXX */
1111
1112         return (rv);
1113 }
1114
1115 /*
1116  * Handle suspend/resume.
1117  *
1118  * We need to switch to polling mode here, because this routine is
1119  * called from an interrupt context.  This is all right since we
1120  * are almost suspended anyway.
1121  */
1122 void
1123 ehci_power(int why, void *v)
1124 {
1125         ehci_softc_t *sc = v;
1126         u_int32_t cmd, hcr;
1127         int s, i;
1128
1129 #ifdef EHCI_DEBUG
1130         DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
1131         if (ehcidebug > 0)
1132                 ehci_dump_regs(sc);
1133 #endif
1134
1135         s = splhardusb();
1136         switch (why) {
1137         case PWR_SUSPEND:
1138         case PWR_STANDBY:
1139                 sc->sc_bus.use_polling++;
1140
1141                 for (i = 1; i <= sc->sc_noport; i++) {
1142                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
1143                         if ((cmd & EHCI_PS_PO) == 0 &&
1144                             (cmd & EHCI_PS_PE) == EHCI_PS_PE)
1145                                 EOWRITE4(sc, EHCI_PORTSC(i),
1146                                     cmd | EHCI_PS_SUSP);
1147                 }
1148
1149                 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
1150
1151                 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
1152                 EOWRITE4(sc, EHCI_USBCMD, cmd);
1153
1154                 for (i = 0; i < 100; i++) {
1155                         hcr = EOREAD4(sc, EHCI_USBSTS) &
1156                             (EHCI_STS_ASS | EHCI_STS_PSS);
1157                         if (hcr == 0)
1158                                 break;
1159
1160                         usb_delay_ms(&sc->sc_bus, 1);
1161                 }
1162                 if (hcr != 0) {
1163                         printf("%s: reset timeout\n",
1164                             device_get_nameunit(sc->sc_bus.bdev));
1165                 }
1166
1167                 cmd &= ~EHCI_CMD_RS;
1168                 EOWRITE4(sc, EHCI_USBCMD, cmd);
1169
1170                 for (i = 0; i < 100; i++) {
1171                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1172                         if (hcr == EHCI_STS_HCH)
1173                                 break;
1174
1175                         usb_delay_ms(&sc->sc_bus, 1);
1176                 }
1177                 if (hcr != EHCI_STS_HCH) {
1178                         printf("%s: config timeout\n",
1179                             device_get_nameunit(sc->sc_bus.bdev));
1180                 }
1181
1182                 sc->sc_bus.use_polling--;
1183                 break;
1184
1185         case PWR_RESUME:
1186                 sc->sc_bus.use_polling++;
1187
1188                 /* restore things in case the bios sucks */
1189                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
1190                 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
1191                 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
1192                     sc->sc_async_head->physaddr | EHCI_LINK_QH);
1193                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1194
1195                 hcr = 0;
1196                 for (i = 1; i <= sc->sc_noport; i++) {
1197                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
1198                         if ((cmd & EHCI_PS_PO) == 0 &&
1199                             (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
1200                                 EOWRITE4(sc, EHCI_PORTSC(i),
1201                                     cmd | EHCI_PS_FPR);
1202                                 hcr = 1;
1203                         }
1204                 }
1205
1206                 if (hcr) {
1207                         usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1208
1209                         for (i = 1; i <= sc->sc_noport; i++) {
1210                                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
1211                                 if ((cmd & EHCI_PS_PO) == 0 &&
1212                                     (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
1213                                         EOWRITE4(sc, EHCI_PORTSC(i),
1214                                             cmd & ~EHCI_PS_FPR);
1215                         }
1216                 }
1217
1218                 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1219
1220                 for (i = 0; i < 100; i++) {
1221                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1222                         if (hcr != EHCI_STS_HCH)
1223                                 break;
1224
1225                         usb_delay_ms(&sc->sc_bus, 1);
1226                 }
1227                 if (hcr == EHCI_STS_HCH) {
1228                         printf("%s: config timeout\n",
1229                             device_get_nameunit(sc->sc_bus.bdev));
1230                 }
1231
1232                 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1233
1234                 sc->sc_bus.use_polling--;
1235                 break;
1236         case PWR_SOFTSUSPEND:
1237         case PWR_SOFTSTANDBY:
1238         case PWR_SOFTRESUME:
1239                 break;
1240         }
1241         splx(s);
1242
1243 #ifdef EHCI_DEBUG
1244         DPRINTF(("ehci_power: sc=%p\n", sc));
1245         if (ehcidebug > 0)
1246                 ehci_dump_regs(sc);
1247 #endif
1248 }
1249
1250 /*
1251  * Shut down the controller when the system is going down.
1252  */
1253 void
1254 ehci_shutdown(void *v)
1255 {
1256         ehci_softc_t *sc = v;
1257
1258         DPRINTF(("ehci_shutdown: stopping the HC\n"));
1259         (void) ehci_hcreset(sc);
1260 }
1261
1262 usbd_status
1263 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1264 {
1265         usbd_status err;
1266
1267         err = usb_allocmem(bus, size, 0, dma);
1268 #ifdef EHCI_DEBUG
1269         if (err)
1270                 printf("ehci_allocm: usb_allocmem()=%d\n", err);
1271 #endif
1272         return (err);
1273 }
1274
1275 void
1276 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1277 {
1278         usb_freemem(bus, dma);
1279 }
1280
1281 usbd_xfer_handle
1282 ehci_allocx(struct usbd_bus *bus)
1283 {
1284         struct ehci_softc *sc = (struct ehci_softc *)bus;
1285         usbd_xfer_handle xfer;
1286
1287         xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1288         if (xfer != NULL) {
1289                 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1290 #ifdef DIAGNOSTIC
1291                 if (xfer->busy_free != XFER_FREE) {
1292                         printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1293                                xfer->busy_free);
1294                 }
1295 #endif
1296         } else {
1297                 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
1298         }
1299         if (xfer != NULL) {
1300                 memset(xfer, 0, sizeof(struct ehci_xfer));
1301                 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1302                     xfer);
1303                 EXFER(xfer)->ehci_xfer_flags = 0;
1304 #ifdef DIAGNOSTIC
1305                 EXFER(xfer)->isdone = 1;
1306                 xfer->busy_free = XFER_BUSY;
1307 #endif
1308         }
1309         return (xfer);
1310 }
1311
1312 void
1313 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1314 {
1315         struct ehci_softc *sc = (struct ehci_softc *)bus;
1316
1317 #ifdef DIAGNOSTIC
1318         if (xfer->busy_free != XFER_BUSY) {
1319                 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1320                        xfer->busy_free);
1321                 return;
1322         }
1323         xfer->busy_free = XFER_FREE;
1324         if (!EXFER(xfer)->isdone) {
1325                 printf("ehci_freex: !isdone\n");
1326                 return;
1327         }
1328 #endif
1329         STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1330 }
1331
1332 static void
1333 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1334 {
1335         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1336
1337         DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1338                  epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1339 #ifdef USB_DEBUG
1340         if (ehcidebug)
1341                 usbd_dump_pipe(pipe);
1342 #endif
1343         KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1344             htole32(EHCI_QTD_ACTIVE)) == 0,
1345             ("ehci_device_clear_toggle: queue active"));
1346         epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1347 }
1348
1349 static void
1350 ehci_noop(usbd_pipe_handle pipe)
1351 {
1352 }
1353
1354 #ifdef EHCI_DEBUG
1355 void
1356 ehci_dump_regs(ehci_softc_t *sc)
1357 {
1358         int i;
1359         printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1360                EOREAD4(sc, EHCI_USBCMD),
1361                EOREAD4(sc, EHCI_USBSTS),
1362                EOREAD4(sc, EHCI_USBINTR));
1363         printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1364                EOREAD4(sc, EHCI_FRINDEX),
1365                EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1366                EOREAD4(sc, EHCI_PERIODICLISTBASE),
1367                EOREAD4(sc, EHCI_ASYNCLISTADDR));
1368         for (i = 1; i <= sc->sc_noport; i++)
1369                 printf("port %d status=0x%08x\n", i,
1370                        EOREAD4(sc, EHCI_PORTSC(i)));
1371 }
1372
1373 /*
1374  * Unused function - this is meant to be called from a kernel
1375  * debugger.
1376  */
1377 void
1378 ehci_dump()
1379 {
1380         ehci_dump_regs(theehci);
1381 }
1382
1383 void
1384 ehci_dump_link(ehci_link_t link, int type)
1385 {
1386         link = le32toh(link);
1387         printf("0x%08x", link);
1388         if (link & EHCI_LINK_TERMINATE)
1389                 printf("<T>");
1390         else {
1391                 printf("<");
1392                 if (type) {
1393                         switch (EHCI_LINK_TYPE(link)) {
1394                         case EHCI_LINK_ITD: printf("ITD"); break;
1395                         case EHCI_LINK_QH: printf("QH"); break;
1396                         case EHCI_LINK_SITD: printf("SITD"); break;
1397                         case EHCI_LINK_FSTN: printf("FSTN"); break;
1398                         }
1399                 }
1400                 printf(">");
1401         }
1402 }
1403
1404 void
1405 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1406 {
1407         int i;
1408         u_int32_t stop;
1409
1410         stop = 0;
1411         for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1412                 ehci_dump_sqtd(sqtd);
1413                 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1414         }
1415         if (sqtd)
1416                 printf("dump aborted, too many TDs\n");
1417 }
1418
1419 void
1420 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1421 {
1422         printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1423         ehci_dump_qtd(&sqtd->qtd);
1424 }
1425
1426 void
1427 ehci_dump_qtd(ehci_qtd_t *qtd)
1428 {
1429         u_int32_t s;
1430         char sbuf[128];
1431
1432         printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
1433         printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1434         printf("\n");
1435         s = le32toh(qtd->qtd_status);
1436         bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1437                          "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1438                          "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1439         printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1440                s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1441                EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1442         printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1443                EHCI_QTD_GET_PID(s), sbuf);
1444         for (s = 0; s < 5; s++)
1445                 printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1446 }
1447
1448 void
1449 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1450 {
1451         ehci_qh_t *qh = &sqh->qh;
1452         u_int32_t endp, endphub;
1453
1454         printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1455         printf("  sqtd=%p inactivesqtd=%p\n", sqh->sqtd, sqh->inactivesqtd);
1456         printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1457         endp = le32toh(qh->qh_endp);
1458         printf("  endp=0x%08x\n", endp);
1459         printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1460                EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1461                EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
1462                EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1463         printf("    mpl=0x%x ctl=%d nrl=%d\n",
1464                EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1465                EHCI_QH_GET_NRL(endp));
1466         endphub = le32toh(qh->qh_endphub);
1467         printf("  endphub=0x%08x\n", endphub);
1468         printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1469                EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1470                EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1471                EHCI_QH_GET_MULT(endphub));
1472         printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1473         printf("Overlay qTD:\n");
1474         ehci_dump_qtd(&qh->qh_qtd);
1475 }
1476
1477 #ifdef notyet
1478 void
1479 ehci_dump_itd(struct ehci_soft_itd *itd)
1480 {
1481         ehci_isoc_trans_t t;
1482         ehci_isoc_bufr_ptr_t b, b2, b3;
1483         int i;
1484
1485         printf("ITD: next phys=%X\n", itd->itd.itd_next);
1486
1487         for (i = 0; i < 8;i++) {
1488                 t = le32toh(itd->itd.itd_ctl[i]);
1489                 printf("ITDctl %d: stat=%X len=%X ioc=%X pg=%X offs=%X\n", i,
1490                     EHCI_ITD_GET_STATUS(t), EHCI_ITD_GET_LEN(t),
1491                     EHCI_ITD_GET_IOC(t), EHCI_ITD_GET_PG(t),
1492                     EHCI_ITD_GET_OFFS(t));
1493         }
1494         printf("ITDbufr: ");
1495         for (i = 0; i < 7; i++)
1496                 printf("%X,", EHCI_ITD_GET_BPTR(le32toh(itd->itd.itd_bufr[i])));
1497
1498         b = le32toh(itd->itd.itd_bufr[0]);
1499         b2 = le32toh(itd->itd.itd_bufr[1]);
1500         b3 = le32toh(itd->itd.itd_bufr[2]);
1501         printf("\nep=%X daddr=%X dir=%d maxpkt=%X multi=%X\n",
1502             EHCI_ITD_GET_EP(b), EHCI_ITD_GET_DADDR(b), EHCI_ITD_GET_DIR(b2),
1503             EHCI_ITD_GET_MAXPKT(b2), EHCI_ITD_GET_MULTI(b3));
1504 }
1505
1506 void
1507 ehci_dump_sitd(struct ehci_soft_itd *itd)
1508 {
1509         printf("SITD %p next=%p prev=%p xfernext=%p physaddr=%X slot=%d\n",
1510             itd, itd->u.frame_list.next, itd->u.frame_list.prev,
1511             itd->xfer_next, itd->physaddr, itd->slot);
1512 }
1513 #endif
1514
1515 #ifdef DIAGNOSTIC
1516 void
1517 ehci_dump_exfer(struct ehci_xfer *ex)
1518 {
1519         printf("ehci_dump_exfer: ex=%p sqtdstart=%p end=%p itdstart=%p "
1520             "end=%p isdone=%d\n", ex, ex->sqtdstart, ex->sqtdend, ex->itdstart,
1521             ex->itdend, ex->isdone);
1522 }
1523 #endif
1524 #endif
1525
1526 usbd_status
1527 ehci_open(usbd_pipe_handle pipe)
1528 {
1529         usbd_device_handle dev = pipe->device;
1530         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1531         usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1532         u_int8_t addr = dev->address;
1533         u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1534         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1535         ehci_soft_qh_t *sqh;
1536         usbd_status err;
1537         int s;
1538         int ival, speed, naks;
1539         int hshubaddr, hshubport;
1540
1541         DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1542                      pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1543
1544         if (dev->myhsport) {
1545                 hshubaddr = dev->myhsport->parent->address;
1546                 hshubport = dev->myhsport->portno;
1547         } else {
1548                 hshubaddr = 0;
1549                 hshubport = 0;
1550         }
1551
1552         if (sc->sc_dying)
1553                 return (USBD_IOERROR);
1554
1555         if (addr == sc->sc_addr) {
1556                 switch (ed->bEndpointAddress) {
1557                 case USB_CONTROL_ENDPOINT:
1558                         pipe->methods = &ehci_root_ctrl_methods;
1559                         break;
1560                 case UE_DIR_IN | EHCI_INTR_ENDPT:
1561                         pipe->methods = &ehci_root_intr_methods;
1562                         break;
1563                 default:
1564                         DPRINTF(("ehci_open: bad bEndpointAddress 0x%02x\n",
1565                             ed->bEndpointAddress));
1566                         return (USBD_INVAL);
1567                 }
1568                 return (USBD_NORMAL_COMPLETION);
1569         }
1570
1571         /* XXX All this stuff is only valid for async. */
1572         switch (dev->speed) {
1573         case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
1574         case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1575         case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1576         default: panic("ehci_open: bad device speed %d", dev->speed);
1577         }
1578         if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1579                 printf("%s: *** Error: opening low/full speed isoc device on"
1580                     "ehci, this does not work yet. Feel free to implement\n",
1581                     device_get_nameunit(sc->sc_bus.bdev));
1582                 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1583                             hshubaddr, hshubport));
1584                 return USBD_INVAL;
1585         }
1586
1587         naks = 8;               /* XXX */
1588         /* Allocate sqh for everything, save isoc xfers */
1589         if (xfertype != UE_ISOCHRONOUS) {
1590                 sqh = ehci_alloc_sqh(sc);
1591                 if (sqh == NULL)
1592                         goto bad0;
1593                 /* qh_link filled when the QH is added */
1594                 sqh->qh.qh_endp = htole32(
1595                     EHCI_QH_SET_ADDR(addr) |
1596                     EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1597                     EHCI_QH_SET_EPS(speed) |
1598                     (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1599                     EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1600                     (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1601                     EHCI_QH_CTL : 0) |
1602                     EHCI_QH_SET_NRL(naks)
1603                     );
1604                 sqh->qh.qh_endphub = htole32(
1605                     EHCI_QH_SET_MULT(1) |
1606                     EHCI_QH_SET_HUBA(hshubaddr) |
1607                     EHCI_QH_SET_PORT(hshubport) |
1608                     EHCI_QH_SET_CMASK(0x1c) |
1609                     EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1610                     );
1611                 sqh->qh.qh_curqtd = EHCI_NULL;
1612                 /* The overlay qTD was already set up by ehci_alloc_sqh(). */
1613                 sqh->qh.qh_qtd.qtd_status =
1614                     htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1615                 epipe->sqh = sqh;
1616         } else {
1617                 sqh = NULL;
1618         }
1619
1620         switch (xfertype) {
1621         case UE_CONTROL:
1622                 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1623                                    0, &epipe->u.ctl.reqdma);
1624 #ifdef EHCI_DEBUG
1625                 if (err)
1626                         printf("ehci_open: usb_allocmem()=%d\n", err);
1627 #endif
1628                 if (err)
1629                         goto bad1;
1630                 pipe->methods = &ehci_device_ctrl_methods;
1631                 s = splusb();
1632                 ehci_add_qh(sqh, sc->sc_async_head);
1633                 splx(s);
1634                 break;
1635         case UE_BULK:
1636                 pipe->methods = &ehci_device_bulk_methods;
1637                 s = splusb();
1638                 ehci_add_qh(sqh, sc->sc_async_head);
1639                 splx(s);
1640                 break;
1641         case UE_INTERRUPT:
1642                 pipe->methods = &ehci_device_intr_methods;
1643                 ival = pipe->interval;
1644                 if (ival == USBD_DEFAULT_INTERVAL)
1645                         ival = ed->bInterval;
1646                 return (ehci_device_setintr(sc, sqh, ival));
1647         case UE_ISOCHRONOUS:
1648                 pipe->methods = &ehci_device_isoc_methods;
1649                 if (ed->bInterval == 0 || ed->bInterval > 16) {
1650                         printf("ehci: opening pipe with invalid bInterval\n");
1651                         err = USBD_INVAL;
1652                         goto bad1;
1653                 }
1654                 if (UGETW(ed->wMaxPacketSize) == 0) {
1655                         printf("ehci: zero length endpoint open request\n");
1656                         err = USBD_INVAL;
1657                         goto bad1;
1658                 }
1659                 epipe->u.isoc.next_frame = 0;
1660                 epipe->u.isoc.cur_xfers = 0;
1661                 break;
1662         default:
1663                 DPRINTF(("ehci: bad xfer type %d\n", xfertype));
1664                 return (USBD_INVAL);
1665         }
1666         return (USBD_NORMAL_COMPLETION);
1667
1668  bad1:
1669         if (sqh != NULL)
1670                 ehci_free_sqh(sc, sqh);
1671         return (err);
1672  bad0:
1673         return (USBD_NOMEM);
1674 }
1675
1676 /*
1677  * Add an ED to the schedule.  Called at splusb().
1678  * If in the async schedule, it will always have a next.
1679  * If in the intr schedule it may not.
1680  */
1681 void
1682 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1683 {
1684         SPLUSBCHECK;
1685
1686         sqh->next = head->next;
1687         sqh->prev = head;
1688         sqh->qh.qh_link = head->qh.qh_link;
1689         head->next = sqh;
1690         if (sqh->next)
1691                 sqh->next->prev = sqh;
1692         head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1693
1694 #ifdef EHCI_DEBUG
1695         if (ehcidebug > 5) {
1696                 printf("ehci_add_qh:\n");
1697                 ehci_dump_sqh(sqh);
1698         }
1699 #endif
1700 }
1701
1702 /*
1703  * Remove an ED from the schedule.  Called at splusb().
1704  * Will always have a 'next' if it's in the async list as it's circular.
1705  */
1706 void
1707 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1708 {
1709         SPLUSBCHECK;
1710         /* XXX */
1711         sqh->prev->qh.qh_link = sqh->qh.qh_link;
1712         sqh->prev->next = sqh->next;
1713         if (sqh->next)
1714                 sqh->next->prev = sqh->prev;
1715         ehci_sync_hc(sc);
1716 }
1717
1718 /* Restart a QH following the addition of a qTD. */
1719 void
1720 ehci_activate_qh(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1721 {
1722         KASSERT((sqtd->qtd.qtd_status & htole32(EHCI_QTD_ACTIVE)) == 0,
1723             ("ehci_activate_qh: already active"));
1724
1725         /*
1726          * When a QH is idle, the overlay qTD should be marked as not
1727          * halted and not active. This causes the host controller to
1728          * retrieve the real qTD on each pass (rather than just examinig
1729          * the overlay), so it will notice when we activate the qTD.
1730          */
1731         if (sqtd == sqh->sqtd) {
1732                 /* Check that the hardware is in the state we expect. */
1733                 if (EHCI_LINK_ADDR(le32toh(sqh->qh.qh_qtd.qtd_next)) !=
1734                     sqtd->physaddr) {
1735 #ifdef EHCI_DEBUG
1736                         printf("ehci_activate_qh: unexpected next ptr\n");
1737                         ehci_dump_sqh(sqh);
1738                         ehci_dump_sqtds(sqh->sqtd);
1739 #endif
1740                         sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1741                         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1742                 }
1743                 /* Ensure the flags are correct. */
1744                 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_PINGSTATE |
1745                     EHCI_QTD_TOGGLE_MASK);
1746         }
1747
1748         /* Now activate the qTD. */
1749         sqtd->qtd.qtd_status |= htole32(EHCI_QTD_ACTIVE);
1750 }
1751
1752 /*
1753  * Ensure that the HC has released all references to the QH.  We do this
1754  * by asking for a Async Advance Doorbell interrupt and then we wait for
1755  * the interrupt.
1756  * To make this easier we first obtain exclusive use of the doorbell.
1757  */
1758 void
1759 ehci_sync_hc(ehci_softc_t *sc)
1760 {
1761         int s, error;
1762
1763         if (sc->sc_dying) {
1764                 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1765                 return;
1766         }
1767         DPRINTFN(2,("ehci_sync_hc: enter\n"));
1768         /* get doorbell */
1769         lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL);
1770         s = splhardusb();
1771         /* ask for doorbell */
1772         EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1773         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1774                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1775         error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1776         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1777                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1778         splx(s);
1779         /* release doorbell */
1780         lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL);
1781 #ifdef DIAGNOSTIC
1782         if (error)
1783                 printf("ehci_sync_hc: tsleep() = %d\n", error);
1784 #endif
1785         DPRINTFN(2,("ehci_sync_hc: exit\n"));
1786 }
1787
1788 /*Call at splusb*/
1789 void
1790 ehci_rem_free_itd_chain(ehci_softc_t *sc, struct ehci_xfer *exfer)
1791 {
1792         struct ehci_soft_itd *itd, *prev;
1793
1794         prev = NULL;
1795
1796         if (exfer->itdstart == NULL || exfer->itdend == NULL)
1797                 panic("ehci isoc xfer being freed, but with no itd chain\n");
1798
1799         for (itd = exfer->itdstart; itd != NULL; itd = itd->xfer_next) {
1800                 prev = itd->u.frame_list.prev;
1801                 /* Unlink itd from hardware chain, or frame array */
1802                 if (prev == NULL) { /* We're at the table head */
1803                         sc->sc_softitds[itd->slot] = itd->u.frame_list.next;
1804                         sc->sc_flist[itd->slot] = itd->itd.itd_next;
1805
1806                         if (itd->u.frame_list.next != NULL)
1807                                 itd->u.frame_list.next->u.frame_list.prev =
1808                                     NULL;
1809                 } else {
1810                         /* XXX this part is untested... */
1811                         prev->itd.itd_next = itd->itd.itd_next;
1812                         prev->u.frame_list.next = itd->u.frame_list.next;
1813                         if (itd->u.frame_list.next != NULL)
1814                                 itd->u.frame_list.next->u.frame_list.prev =
1815                                     prev;
1816                 }
1817         }
1818
1819         prev = NULL;
1820         for (itd = exfer->itdstart; itd != NULL; itd = itd->xfer_next) {
1821                 if (prev != NULL)
1822                         ehci_free_itd(sc, prev);
1823                 prev = itd;
1824         }
1825         if (prev)
1826                 ehci_free_itd(sc, prev);
1827         exfer->itdstart = NULL;
1828         exfer->itdend = NULL;
1829 }
1830
1831 /***********/
1832
1833 /*
1834  * Data structures and routines to emulate the root hub.
1835  */
1836 static usb_device_descriptor_t ehci_devd = {
1837         USB_DEVICE_DESCRIPTOR_SIZE,
1838         UDESC_DEVICE,           /* type */
1839         {0x00, 0x02},           /* USB version */
1840         UDCLASS_HUB,            /* class */
1841         UDSUBCLASS_HUB,         /* subclass */
1842         UDPROTO_HSHUBSTT,       /* protocol */
1843         64,                     /* max packet */
1844         {0},{0},{0x00,0x01},    /* device id */
1845         1,2,0,                  /* string indicies */
1846         1                       /* # of configurations */
1847 };
1848
1849 static usb_device_qualifier_t ehci_odevd = {
1850         USB_DEVICE_DESCRIPTOR_SIZE,
1851         UDESC_DEVICE_QUALIFIER, /* type */
1852         {0x00, 0x02},           /* USB version */
1853         UDCLASS_HUB,            /* class */
1854         UDSUBCLASS_HUB,         /* subclass */
1855         UDPROTO_FSHUB,          /* protocol */
1856         64,                     /* max packet */
1857         1,                      /* # of configurations */
1858         0
1859 };
1860
1861 static usb_config_descriptor_t ehci_confd = {
1862         USB_CONFIG_DESCRIPTOR_SIZE,
1863         UDESC_CONFIG,
1864         {USB_CONFIG_DESCRIPTOR_SIZE +
1865          USB_INTERFACE_DESCRIPTOR_SIZE +
1866          USB_ENDPOINT_DESCRIPTOR_SIZE},
1867         1,
1868         1,
1869         0,
1870         UC_SELF_POWERED,
1871         0                       /* max power */
1872 };
1873
1874 static usb_interface_descriptor_t ehci_ifcd = {
1875         USB_INTERFACE_DESCRIPTOR_SIZE,
1876         UDESC_INTERFACE,
1877         0,
1878         0,
1879         1,
1880         UICLASS_HUB,
1881         UISUBCLASS_HUB,
1882         UIPROTO_HSHUBSTT,
1883         0
1884 };
1885
1886 static usb_endpoint_descriptor_t ehci_endpd = {
1887         USB_ENDPOINT_DESCRIPTOR_SIZE,
1888         UDESC_ENDPOINT,
1889         UE_DIR_IN | EHCI_INTR_ENDPT,
1890         UE_INTERRUPT,
1891         {8, 0},                 /* max packet */
1892         255
1893 };
1894
1895 static usb_hub_descriptor_t ehci_hubd = {
1896         USB_HUB_DESCRIPTOR_SIZE,
1897         UDESC_HUB,
1898         0,
1899         {0,0},
1900         0,
1901         0,
1902         {0},
1903 };
1904
1905 static int
1906 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1907 {
1908         int i;
1909
1910         if (l == 0)
1911                 return (0);
1912         p->bLength = 2 * strlen(s) + 2;
1913         if (l == 1)
1914                 return (1);
1915         p->bDescriptorType = UDESC_STRING;
1916         l -= 2;
1917         for (i = 0; s[i] && l > 1; i++, l -= 2)
1918                 USETW2(p->bString[i], 0, s[i]);
1919         return (2*i+2);
1920 }
1921
1922 /*
1923  * Simulate a hardware hub by handling all the necessary requests.
1924  */
1925 static usbd_status
1926 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1927 {
1928         usbd_status err;
1929
1930         /* Insert last in queue. */
1931         err = usb_insert_transfer(xfer);
1932         if (err)
1933                 return (err);
1934
1935         /* Pipe isn't running, start first */
1936         return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1937 }
1938
1939 static usbd_status
1940 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1941 {
1942         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1943         usb_device_request_t *req;
1944         void *buf = NULL;
1945         int port, i;
1946         int s, len, value, index, l, totlen = 0;
1947         usb_port_status_t ps;
1948         usb_hub_descriptor_t hubd;
1949         usbd_status err;
1950         u_int32_t v;
1951
1952         if (sc->sc_dying)
1953                 return (USBD_IOERROR);
1954
1955 #ifdef DIAGNOSTIC
1956         if (!(xfer->rqflags & URQ_REQUEST))
1957                 /* XXX panic */
1958                 return (USBD_INVAL);
1959 #endif
1960         req = &xfer->request;
1961
1962         DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1963                     req->bmRequestType, req->bRequest));
1964
1965         len = UGETW(req->wLength);
1966         value = UGETW(req->wValue);
1967         index = UGETW(req->wIndex);
1968
1969         if (len != 0)
1970                 buf = xfer->buffer;
1971
1972 #define C(x,y) ((x) | ((y) << 8))
1973         switch(C(req->bRequest, req->bmRequestType)) {
1974         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1975         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1976         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1977                 /*
1978                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1979                  * for the integrated root hub.
1980                  */
1981                 break;
1982         case C(UR_GET_CONFIG, UT_READ_DEVICE):
1983                 if (len > 0) {
1984                         *(u_int8_t *)buf = sc->sc_conf;
1985                         totlen = 1;
1986                 }
1987                 break;
1988         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1989                 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1990                 switch(value >> 8) {
1991                 case UDESC_DEVICE:
1992                         if ((value & 0xff) != 0) {
1993                                 err = USBD_IOERROR;
1994                                 goto ret;
1995                         }
1996                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1997                         USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1998                         memcpy(buf, &ehci_devd, l);
1999                         break;
2000                 /*
2001                  * We can't really operate at another speed, but the spec says
2002                  * we need this descriptor.
2003                  */
2004                 case UDESC_DEVICE_QUALIFIER:
2005                         if ((value & 0xff) != 0) {
2006                                 err = USBD_IOERROR;
2007                                 goto ret;
2008                         }
2009                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2010                         memcpy(buf, &ehci_odevd, l);
2011                         break;
2012                 /*
2013                  * We can't really operate at another speed, but the spec says
2014                  * we need this descriptor.
2015                  */
2016                 case UDESC_OTHER_SPEED_CONFIGURATION:
2017                 case UDESC_CONFIG:
2018                         if ((value & 0xff) != 0) {
2019                                 err = USBD_IOERROR;
2020                                 goto ret;
2021                         }
2022                         totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2023                         memcpy(buf, &ehci_confd, l);
2024                         ((usb_config_descriptor_t *)buf)->bDescriptorType =
2025                                 value >> 8;
2026                         buf = (char *)buf + l;
2027                         len -= l;
2028                         l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2029                         totlen += l;
2030                         memcpy(buf, &ehci_ifcd, l);
2031                         buf = (char *)buf + l;
2032                         len -= l;
2033                         l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2034                         totlen += l;
2035                         memcpy(buf, &ehci_endpd, l);
2036                         break;
2037                 case UDESC_STRING:
2038                         if (len == 0)
2039                                 break;
2040                         *(u_int8_t *)buf = 0;
2041                         totlen = 1;
2042                         switch (value & 0xff) {
2043                         case 0: /* Language table */
2044                                 totlen = ehci_str(buf, len, "\001");
2045                                 break;
2046                         case 1: /* Vendor */
2047                                 totlen = ehci_str(buf, len, sc->sc_vendor);
2048                                 break;
2049                         case 2: /* Product */
2050                                 totlen = ehci_str(buf, len, "EHCI root hub");
2051                                 break;
2052                         }
2053                         break;
2054                 default:
2055                         err = USBD_IOERROR;
2056                         goto ret;
2057                 }
2058                 break;
2059         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2060                 if (len > 0) {
2061                         *(u_int8_t *)buf = 0;
2062                         totlen = 1;
2063                 }
2064                 break;
2065         case C(UR_GET_STATUS, UT_READ_DEVICE):
2066                 if (len > 1) {
2067                         USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2068                         totlen = 2;
2069                 }
2070                 break;
2071         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2072         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2073                 if (len > 1) {
2074                         USETW(((usb_status_t *)buf)->wStatus, 0);
2075                         totlen = 2;
2076                 }
2077                 break;
2078         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2079                 if (value >= USB_MAX_DEVICES) {
2080                         err = USBD_IOERROR;
2081                         goto ret;
2082                 }
2083                 sc->sc_addr = value;
2084                 break;
2085         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2086                 if (value != 0 && value != 1) {
2087                         err = USBD_IOERROR;
2088                         goto ret;
2089                 }
2090                 sc->sc_conf = value;
2091                 break;
2092         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2093                 break;
2094         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2095         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2096         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2097                 err = USBD_IOERROR;
2098                 goto ret;
2099         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2100                 break;
2101         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2102                 break;
2103         /* Hub requests */
2104         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2105                 break;
2106         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2107                 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
2108                              "port=%d feature=%d\n",
2109                              index, value));
2110                 if (index < 1 || index > sc->sc_noport) {
2111                         err = USBD_IOERROR;
2112                         goto ret;
2113                 }
2114                 port = EHCI_PORTSC(index);
2115                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2116                 switch(value) {
2117                 case UHF_PORT_ENABLE:
2118                         EOWRITE4(sc, port, v &~ EHCI_PS_PE);
2119                         break;
2120                 case UHF_PORT_SUSPEND:
2121                         EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
2122                         break;
2123                 case UHF_PORT_POWER:
2124                         EOWRITE4(sc, port, v &~ EHCI_PS_PP);
2125                         break;
2126                 case UHF_PORT_TEST:
2127                         DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
2128                                     "%d\n", index));
2129                         break;
2130                 case UHF_PORT_INDICATOR:
2131                         DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
2132                                     "%d\n", index));
2133                         EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
2134                         break;
2135                 case UHF_C_PORT_CONNECTION:
2136                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
2137                         break;
2138                 case UHF_C_PORT_ENABLE:
2139                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
2140                         break;
2141                 case UHF_C_PORT_SUSPEND:
2142                         /* how? */
2143                         break;
2144                 case UHF_C_PORT_OVER_CURRENT:
2145                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
2146                         break;
2147                 case UHF_C_PORT_RESET:
2148                         sc->sc_isreset = 0;
2149                         break;
2150                 default:
2151                         err = USBD_IOERROR;
2152                         goto ret;
2153                 }
2154                 break;
2155         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2156                 if ((value & 0xff) != 0) {
2157                         err = USBD_IOERROR;
2158                         goto ret;
2159                 }
2160                 hubd = ehci_hubd;
2161                 hubd.bNbrPorts = sc->sc_noport;
2162                 v = EOREAD4(sc, EHCI_HCSPARAMS);
2163                 USETW(hubd.wHubCharacteristics,
2164                     EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
2165                     EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
2166                         ? UHD_PORT_IND : 0);
2167                 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
2168                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2169                         hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
2170                 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2171                 l = min(len, hubd.bDescLength);
2172                 totlen = l;
2173                 memcpy(buf, &hubd, l);
2174                 break;
2175         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2176                 if (len != 4) {
2177                         err = USBD_IOERROR;
2178                         goto ret;
2179                 }
2180                 memset(buf, 0, len); /* ? XXX */
2181                 totlen = len;
2182                 break;
2183         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2184                 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
2185                             index));
2186                 if (index < 1 || index > sc->sc_noport) {
2187                         err = USBD_IOERROR;
2188                         goto ret;
2189                 }
2190                 if (len != 4) {
2191                         err = USBD_IOERROR;
2192                         goto ret;
2193                 }
2194                 v = EOREAD4(sc, EHCI_PORTSC(index));
2195                 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
2196                             v));
2197                 i = UPS_HIGH_SPEED;
2198                 if (v & EHCI_PS_CS)     i |= UPS_CURRENT_CONNECT_STATUS;
2199                 if (v & EHCI_PS_PE)     i |= UPS_PORT_ENABLED;
2200                 if (v & EHCI_PS_SUSP)   i |= UPS_SUSPEND;
2201                 if (v & EHCI_PS_OCA)    i |= UPS_OVERCURRENT_INDICATOR;
2202                 if (v & EHCI_PS_PR)     i |= UPS_RESET;
2203                 if (v & EHCI_PS_PP)     i |= UPS_PORT_POWER;
2204                 USETW(ps.wPortStatus, i);
2205                 i = 0;
2206                 if (v & EHCI_PS_CSC)    i |= UPS_C_CONNECT_STATUS;
2207                 if (v & EHCI_PS_PEC)    i |= UPS_C_PORT_ENABLED;
2208                 if (v & EHCI_PS_OCC)    i |= UPS_C_OVERCURRENT_INDICATOR;
2209                 if (sc->sc_isreset)     i |= UPS_C_PORT_RESET;
2210                 USETW(ps.wPortChange, i);
2211                 l = min(len, sizeof ps);
2212                 memcpy(buf, &ps, l);
2213                 totlen = l;
2214                 break;
2215         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2216                 err = USBD_IOERROR;
2217                 goto ret;
2218         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2219                 break;
2220         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2221                 if (index < 1 || index > sc->sc_noport) {
2222                         err = USBD_IOERROR;
2223                         goto ret;
2224                 }
2225                 port = EHCI_PORTSC(index);
2226                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2227                 switch(value) {
2228                 case UHF_PORT_ENABLE:
2229                         EOWRITE4(sc, port, v | EHCI_PS_PE);
2230                         break;
2231                 case UHF_PORT_SUSPEND:
2232                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
2233                         break;
2234                 case UHF_PORT_RESET:
2235                         DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
2236                                     index));
2237                         if (EHCI_PS_IS_LOWSPEED(v)) {
2238                                 /* Low speed device, give up ownership. */
2239                                 ehci_disown(sc, index, 1);
2240                                 break;
2241                         }
2242                         /* Start reset sequence. */
2243                         v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
2244                         EOWRITE4(sc, port, v | EHCI_PS_PR);
2245                         /* Wait for reset to complete. */
2246                         usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
2247                         if (sc->sc_dying) {
2248                                 err = USBD_IOERROR;
2249                                 goto ret;
2250                         }
2251                         /* Terminate reset sequence. */
2252                         EOWRITE4(sc, port, v);
2253                         /* Wait for HC to complete reset. */
2254                         usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
2255                         if (sc->sc_dying) {
2256                                 err = USBD_IOERROR;
2257                                 goto ret;
2258                         }
2259                         v = EOREAD4(sc, port);
2260                         DPRINTF(("ehci after reset, status=0x%08x\n", v));
2261                         if (v & EHCI_PS_PR) {
2262                                 printf("%s: port reset timeout\n",
2263                                        device_get_nameunit(sc->sc_bus.bdev));
2264                                 return (USBD_TIMEOUT);
2265                         }
2266                         if (!(v & EHCI_PS_PE)) {
2267                                 /* Not a high speed device, give up ownership.*/
2268                                 ehci_disown(sc, index, 0);
2269                                 break;
2270                         }
2271                         sc->sc_isreset = 1;
2272                         DPRINTF(("ehci port %d reset, status = 0x%08x\n",
2273                                  index, v));
2274                         break;
2275                 case UHF_PORT_POWER:
2276                         DPRINTFN(2,("ehci_root_ctrl_start: set port power "
2277                                     "%d\n", index));
2278                         EOWRITE4(sc, port, v | EHCI_PS_PP);
2279                         break;
2280                 case UHF_PORT_TEST:
2281                         DPRINTFN(2,("ehci_root_ctrl_start: set port test "
2282                                     "%d\n", index));
2283                         break;
2284                 case UHF_PORT_INDICATOR:
2285                         DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
2286                                     "%d\n", index));
2287                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
2288                         break;
2289                 default:
2290                         err = USBD_IOERROR;
2291                         goto ret;
2292                 }
2293                 break;
2294         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
2295         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
2296         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
2297         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
2298                 break;
2299         default:
2300                 err = USBD_IOERROR;
2301                 goto ret;
2302         }
2303         xfer->actlen = totlen;
2304         err = USBD_NORMAL_COMPLETION;
2305  ret:
2306         xfer->status = err;
2307         s = splusb();
2308         hacksync(xfer); /* XXX to compensate for usb_transfer_complete */
2309         usb_transfer_complete(xfer);
2310         splx(s);
2311         return (USBD_IN_PROGRESS);
2312 }
2313
2314 void
2315 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
2316 {
2317         int port;
2318         u_int32_t v;
2319
2320         DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
2321 #ifdef DIAGNOSTIC
2322         if (sc->sc_npcomp != 0) {
2323                 int i = (index-1) / sc->sc_npcomp;
2324                 if (i >= sc->sc_ncomp)
2325                         printf("%s: strange port\n",
2326                                device_get_nameunit(sc->sc_bus.bdev));
2327                 else
2328                         printf("%s: handing over %s speed device on "
2329                                "port %d to %s\n",
2330                                device_get_nameunit(sc->sc_bus.bdev),
2331                                lowspeed ? "low" : "full",
2332                                index, device_get_nameunit(sc->sc_comps[i]->bdev));
2333         } else {
2334                 printf("%s: npcomp == 0\n", device_get_nameunit(sc->sc_bus.bdev));
2335         }
2336 #endif
2337         port = EHCI_PORTSC(index);
2338         v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2339         EOWRITE4(sc, port, v | EHCI_PS_PO);
2340 }
2341
2342 /* Abort a root control request. */
2343 static void
2344 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
2345 {
2346         /* Nothing to do, all transfers are synchronous. */
2347 }
2348
2349 /* Close the root pipe. */
2350 static void
2351 ehci_root_ctrl_close(usbd_pipe_handle pipe)
2352 {
2353         DPRINTF(("ehci_root_ctrl_close\n"));
2354         /* Nothing to do. */
2355 }
2356
2357 void
2358 ehci_root_intr_done(usbd_xfer_handle xfer)
2359 {
2360 }
2361
2362 static usbd_status
2363 ehci_root_intr_transfer(usbd_xfer_handle xfer)
2364 {
2365         usbd_status err;
2366
2367         /* Insert last in queue. */
2368         err = usb_insert_transfer(xfer);
2369         if (err)
2370                 return (err);
2371
2372         /* Pipe isn't running, start first */
2373         return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2374 }
2375
2376 static usbd_status
2377 ehci_root_intr_start(usbd_xfer_handle xfer)
2378 {
2379         usbd_pipe_handle pipe = xfer->pipe;
2380         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2381
2382         if (sc->sc_dying)
2383                 return (USBD_IOERROR);
2384
2385         sc->sc_intrxfer = xfer;
2386
2387         return (USBD_IN_PROGRESS);
2388 }
2389
2390 /* Abort a root interrupt request. */
2391 static void
2392 ehci_root_intr_abort(usbd_xfer_handle xfer)
2393 {
2394         int s;
2395
2396         if (xfer->pipe->intrxfer == xfer) {
2397                 DPRINTF(("ehci_root_intr_abort: remove\n"));
2398                 xfer->pipe->intrxfer = NULL;
2399         }
2400         xfer->status = USBD_CANCELLED;
2401         s = splusb();
2402         usb_transfer_complete(xfer);
2403         splx(s);
2404 }
2405
2406 /* Close the root pipe. */
2407 static void
2408 ehci_root_intr_close(usbd_pipe_handle pipe)
2409 {
2410         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2411
2412         DPRINTF(("ehci_root_intr_close\n"));
2413
2414         sc->sc_intrxfer = NULL;
2415 }
2416
2417 void
2418 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2419 {
2420 }
2421
2422 /************************/
2423
2424 ehci_soft_qh_t *
2425 ehci_alloc_sqh(ehci_softc_t *sc)
2426 {
2427         ehci_soft_qh_t *sqh;
2428         ehci_soft_qtd_t *sqtd;
2429         usbd_status err;
2430         int i, offs;
2431         usb_dma_t dma;
2432
2433         if (sc->sc_freeqhs == NULL) {
2434                 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2435                 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2436                           EHCI_PAGE_SIZE, &dma);
2437 #ifdef EHCI_DEBUG
2438                 if (err)
2439                         printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2440 #endif
2441                 if (err)
2442                         return (NULL);
2443                 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2444                         offs = i * EHCI_SQH_SIZE;
2445                         sqh = KERNADDR(&dma, offs);
2446                         sqh->physaddr = DMAADDR(&dma, offs);
2447                         sqh->next = sc->sc_freeqhs;
2448                         sc->sc_freeqhs = sqh;
2449                 }
2450         }
2451         /* Allocate the initial inactive sqtd. */
2452         sqtd = ehci_alloc_sqtd(sc);
2453         if (sqtd == NULL)
2454                 return (NULL);
2455         sqtd->qtd.qtd_status = htole32(0);
2456         sqtd->qtd.qtd_next = EHCI_NULL;
2457         sqtd->qtd.qtd_altnext = EHCI_NULL;
2458
2459         sqh = sc->sc_freeqhs;
2460         sc->sc_freeqhs = sqh->next;
2461
2462         /* The overlay QTD should begin zeroed. */
2463         sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
2464         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
2465         sqh->qh.qh_qtd.qtd_status = 0;
2466         for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
2467                 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
2468                 sqh->qh.qh_qtd.qtd_buffer_hi[i] = 0;
2469         }
2470         sqh->next = NULL;
2471         sqh->prev = NULL;
2472         sqh->sqtd = sqtd;
2473         sqh->inactivesqtd = sqtd;
2474         return (sqh);
2475 }
2476
2477 void
2478 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2479 {
2480         ehci_free_sqtd(sc, sqh->inactivesqtd);
2481         sqh->next = sc->sc_freeqhs;
2482         sc->sc_freeqhs = sqh;
2483 }
2484
2485 ehci_soft_qtd_t *
2486 ehci_alloc_sqtd(ehci_softc_t *sc)
2487 {
2488         ehci_soft_qtd_t *sqtd;
2489         usbd_status err;
2490         int i, offs;
2491         usb_dma_t dma;
2492         int s;
2493
2494         if (sc->sc_freeqtds == NULL) {
2495                 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2496                 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2497                           EHCI_PAGE_SIZE, &dma);
2498 #ifdef EHCI_DEBUG
2499                 if (err)
2500                         printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2501 #endif
2502                 if (err)
2503                         return (NULL);
2504                 s = splusb();
2505                 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2506                         offs = i * EHCI_SQTD_SIZE;
2507                         sqtd = KERNADDR(&dma, offs);
2508                         sqtd->physaddr = DMAADDR(&dma, offs);
2509                         sqtd->nextqtd = sc->sc_freeqtds;
2510                         sc->sc_freeqtds = sqtd;
2511                 }
2512                 splx(s);
2513         }
2514
2515         s = splusb();
2516         sqtd = sc->sc_freeqtds;
2517         sc->sc_freeqtds = sqtd->nextqtd;
2518         sqtd->qtd.qtd_next = EHCI_NULL;
2519         sqtd->qtd.qtd_altnext = EHCI_NULL;
2520         sqtd->qtd.qtd_status = 0;
2521         for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
2522                 sqtd->qtd.qtd_buffer[i] = 0;
2523                 sqtd->qtd.qtd_buffer_hi[i] = 0;
2524         }
2525         sqtd->nextqtd = NULL;
2526         sqtd->xfer = NULL;
2527         splx(s);
2528
2529         return (sqtd);
2530 }
2531
2532 void
2533 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2534 {
2535         int s;
2536
2537         s = splusb();
2538         sqtd->nextqtd = sc->sc_freeqtds;
2539         sc->sc_freeqtds = sqtd;
2540         splx(s);
2541 }
2542
2543 usbd_status
2544 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2545      int alen, int rd, usbd_xfer_handle xfer, ehci_soft_qtd_t *start,
2546      ehci_soft_qtd_t *newinactive, ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2547 {
2548         ehci_soft_qtd_t *next, *cur;
2549         ehci_physaddr_t dataphys, nextphys;
2550         u_int32_t qtdstatus;
2551         int adj, len, curlen, mps, offset, pagelen, seg, segoff;
2552         int i, iscontrol, forceshort;
2553         struct usb_dma_mapping *dma = &xfer->dmamap;
2554
2555         DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2556
2557         offset = 0;
2558         len = alen;
2559         iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2560             UE_CONTROL;
2561         qtdstatus = EHCI_QTD_ACTIVE |
2562             EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2563             EHCI_QTD_SET_CERR(3)
2564             /* IOC set below */
2565             /* BYTES set below */
2566             ;
2567         mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2568         forceshort = ((xfer->flags & USBD_FORCE_SHORT_XFER) || len == 0) &&
2569             len % mps == 0;
2570         /*
2571          * The control transfer data stage always starts with a toggle of 1.
2572          * For other transfers we let the hardware track the toggle state.
2573          */
2574         if (iscontrol)
2575                 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2576
2577         if (start != NULL) {
2578                 /*
2579                  * If we are given a starting qTD, assume it is linked into
2580                  * an active QH so be careful not to mark it active.
2581                  */
2582                 cur = start;
2583                 *sp = cur;
2584                 qtdstatus &= ~EHCI_QTD_ACTIVE;
2585         } else {
2586                 cur = ehci_alloc_sqtd(sc);
2587                 *sp = cur;
2588                 if (cur == NULL)
2589                         goto nomem;
2590         }
2591         seg = 0;
2592         segoff = 0;
2593         for (;;) {
2594                 curlen = 0;
2595
2596                 /* The EHCI hardware can handle at most 5 pages. */
2597                 for (i = 0; i < EHCI_QTD_NBUFFERS && curlen < len; i++) {
2598                         KASSERT(seg < dma->nsegs,
2599                             ("ehci_alloc_sqtd_chain: overrun"));
2600                         dataphys = dma->segs[seg].ds_addr + segoff;
2601                         pagelen = dma->segs[seg].ds_len - segoff;
2602                         if (pagelen > len - curlen)
2603                                 pagelen = len - curlen;
2604                         if (pagelen > EHCI_PAGE_SIZE -
2605                             EHCI_PAGE_OFFSET(dataphys))
2606                                 pagelen = EHCI_PAGE_SIZE -
2607                                     EHCI_PAGE_OFFSET(dataphys);
2608                         segoff += pagelen;
2609                         if (segoff >= dma->segs[seg].ds_len) {
2610                                 KASSERT(segoff == dma->segs[seg].ds_len,
2611                                     ("ehci_alloc_sqtd_chain: overlap"));
2612                                 seg++;
2613                                 segoff = 0;
2614                         }
2615
2616                         cur->qtd.qtd_buffer[i] = htole32(dataphys);
2617                         cur->qtd.qtd_buffer_hi[i] = 0;
2618                         curlen += pagelen;
2619
2620                         /*
2621                          * Must stop if there is any gap before or after
2622                          * the page boundary.
2623                          */
2624                         if (EHCI_PAGE_OFFSET(dataphys + pagelen) != 0)
2625                                 break;
2626                         if (seg < dma->nsegs && EHCI_PAGE_OFFSET(segoff +
2627                             dma->segs[seg].ds_addr) != 0)
2628                                 break;
2629                 }
2630                 /* Adjust down to a multiple of mps if not at the end. */
2631                 if (curlen < len && curlen % mps != 0) {
2632                         adj = curlen % mps;
2633                         curlen -= adj;
2634                         KASSERT(curlen > 0,
2635                             ("ehci_alloc_sqtd_chain: need to copy"));
2636                         segoff -= adj;
2637                         if (segoff < 0) {
2638                                 seg--;
2639                                 segoff += dma->segs[seg].ds_len;
2640                         }
2641                         KASSERT(seg >= 0 && segoff >= 0,
2642                             ("ehci_alloc_sqtd_chain: adjust to mps"));
2643                 }
2644
2645                 len -= curlen;
2646
2647                 if (len != 0 || forceshort) {
2648                         next = ehci_alloc_sqtd(sc);
2649                         if (next == NULL)
2650                                 goto nomem;
2651                         nextphys = htole32(next->physaddr);
2652                 } else {
2653                         next = NULL;
2654                         nextphys = EHCI_NULL;
2655                 }
2656
2657                 cur->nextqtd = next;
2658                 cur->qtd.qtd_next = nextphys;
2659                 /* Make sure to stop after a short transfer. */
2660                 cur->qtd.qtd_altnext = htole32(newinactive->physaddr);
2661                 cur->qtd.qtd_status =
2662                     htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2663                 cur->xfer = xfer;
2664                 cur->len = curlen;
2665                 DPRINTFN(10,("ehci_alloc_sqtd_chain: curlen=%d\n", curlen));
2666                 if (iscontrol) {
2667                         /*
2668                          * adjust the toggle based on the number of packets
2669                          * in this qtd
2670                          */
2671                         if ((((curlen + mps - 1) / mps) & 1) || curlen == 0)
2672                                 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2673                 }
2674                 qtdstatus |= EHCI_QTD_ACTIVE;
2675                 if (len == 0) {
2676                         if (!forceshort)
2677                                 break;
2678                         forceshort = 0;
2679                 }
2680                 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2681                 offset += curlen;
2682                 cur = next;
2683         }
2684         cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2685         *ep = cur;
2686
2687         DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2688                      *sp, *ep));
2689
2690         return (USBD_NORMAL_COMPLETION);
2691
2692  nomem:
2693         /* XXX free chain */
2694         DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2695         return (USBD_NOMEM);
2696 }
2697
2698 /* Free the chain starting at sqtd and end at the qTD before sqtdend */
2699 static void
2700 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qh_t *sqh,
2701     ehci_soft_qtd_t *sqtd, ehci_soft_qtd_t *sqtdend)
2702 {
2703         ehci_soft_qtd_t *p, **prevp;
2704         int i;
2705
2706         DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2707                      sqtd, sqtdend));
2708
2709         /* First unlink the chain from the QH's software qTD list. */
2710         prevp = &sqh->sqtd;
2711         for (p = sqh->sqtd; p != NULL; p = p->nextqtd) {
2712                 if (p == sqtd) {
2713                         *prevp = sqtdend;
2714                         break;
2715                 }
2716                 prevp = &p->nextqtd;
2717         }
2718         KASSERT(p != NULL, ("ehci_free_sqtd_chain: chain not found"));
2719         for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2720                 p = sqtd->nextqtd;
2721                 ehci_free_sqtd(sc, sqtd);
2722         }
2723 }
2724
2725 ehci_soft_itd_t *
2726 ehci_alloc_itd(ehci_softc_t *sc)
2727 {
2728         struct ehci_soft_itd *itd, *freeitd;
2729         usbd_status err;
2730         int i, s, offs, frindex, previndex;
2731         usb_dma_t dma;
2732
2733         s = splusb();
2734
2735         /* Find an itd that wasn't freed this frame or last frame. This can
2736          * discard itds that were freed before frindex wrapped around
2737          * XXX - can this lead to thrashing? Could fix by enabling wrap-around
2738          *       interrupt and fiddling with list when that happens */
2739         frindex = (EOREAD4(sc, EHCI_FRINDEX) + 1) >> 3;
2740         previndex = (frindex != 0) ? frindex - 1 : sc->sc_flsize;
2741
2742         freeitd = NULL;
2743         LIST_FOREACH(itd, &sc->sc_freeitds, u.free_list) {
2744                 if (itd == NULL)
2745                         break;
2746                 if (itd->slot != frindex && itd->slot != previndex) {
2747                         freeitd = itd;
2748                         break;
2749                 }
2750         }
2751
2752         if (freeitd == NULL) {
2753                 DPRINTFN(2, ("ehci_alloc_itd allocating chunk\n"));
2754                 err = usb_allocmem(&sc->sc_bus, EHCI_ITD_SIZE * EHCI_ITD_CHUNK,
2755                     EHCI_PAGE_SIZE, &dma);
2756
2757                 if (err) {
2758                         DPRINTF(("ehci_alloc_itd, alloc returned %d\n", err));
2759                         return NULL;
2760                 }
2761
2762                 for (i = 0; i < EHCI_ITD_CHUNK; i++) {
2763                         offs = i * EHCI_ITD_SIZE;
2764                         itd = KERNADDR(&dma, offs);
2765                         itd->physaddr = DMAADDR(&dma, offs);
2766                         itd->dma = dma;
2767                         itd->offs = offs;
2768                         LIST_INSERT_HEAD(&sc->sc_freeitds, itd, u.free_list);
2769                 }
2770                 freeitd = LIST_FIRST(&sc->sc_freeitds);
2771         }
2772
2773         itd = freeitd;
2774         LIST_REMOVE(itd, u.free_list);
2775         memset(&itd->itd, 0, sizeof(ehci_itd_t));
2776         itd->u.frame_list.next = NULL;
2777         itd->u.frame_list.prev = NULL;
2778         itd->xfer_next = NULL;
2779         itd->slot = 0;
2780         splx(s);
2781
2782         return (itd);
2783 }
2784
2785 void
2786 ehci_free_itd(ehci_softc_t *sc, ehci_soft_itd_t *itd)
2787 {
2788         int s;
2789
2790         s = splusb();
2791         LIST_INSERT_AFTER(LIST_FIRST(&sc->sc_freeitds), itd, u.free_list);
2792         splx(s);
2793 }
2794
2795 /****************/
2796
2797 /*
2798  * Close a reqular pipe.
2799  * Assumes that there are no pending transactions.
2800  */
2801 void
2802 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2803 {
2804         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2805         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2806         ehci_soft_qh_t *sqh = epipe->sqh;
2807         int s;
2808
2809         s = splusb();
2810         ehci_rem_qh(sc, sqh, head);
2811         splx(s);
2812         pipe->endpoint->savedtoggle =
2813             EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2814         ehci_free_sqh(sc, epipe->sqh);
2815 }
2816
2817 /*
2818  * Abort a device request.
2819  * If this routine is called at splusb() it guarantees that the request
2820  * will be removed from the hardware scheduling and that the callback
2821  * for it will be called with USBD_CANCELLED status.
2822  * It's impossible to guarantee that the requested transfer will not
2823  * have happened since the hardware runs concurrently.
2824  * If the transaction has already happened we rely on the ordinary
2825  * interrupt processing to process it.
2826  */
2827 void
2828 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2829 {
2830 #define exfer EXFER(xfer)
2831         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2832         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2833         ehci_soft_qh_t *sqh = epipe->sqh;
2834         ehci_soft_qtd_t *sqtd, *snext;
2835         ehci_physaddr_t cur, us, next;
2836         int s;
2837         int hit, i;
2838         /* int count = 0; */
2839         ehci_soft_qh_t *psqh;
2840
2841         DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2842
2843         if (sc->sc_dying) {
2844                 /* If we're dying, just do the software part. */
2845                 s = splusb();
2846                 xfer->status = status;  /* make software ignore it */
2847                 callout_stop(&xfer->timeout_handle);
2848                 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2849                 usb_transfer_complete(xfer);
2850                 splx(s);
2851                 return;
2852         }
2853
2854         if (xfer->device->bus->intr_context)
2855                 panic("ehci_abort_xfer: not in process context");
2856
2857         /*
2858          * If an abort is already in progress then just wait for it to
2859          * complete and return.
2860          */
2861         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2862                 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2863                 /* No need to wait if we're aborting from a timeout. */
2864                 if (status == USBD_TIMEOUT)
2865                         return;
2866                 /* Override the status which might be USBD_TIMEOUT. */
2867                 xfer->status = status;
2868                 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2869                 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2870                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2871                         tsleep(&exfer->ehci_xfer_flags, PZERO, "ehciaw", 0);
2872                 return;
2873         }
2874
2875         /*
2876          * Step 1: Make interrupt routine and timeouts ignore xfer.
2877          */
2878         s = splusb();
2879         exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2880         xfer->status = status;  /* make software ignore it */
2881         callout_stop(&xfer->timeout_handle);
2882         usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2883         splx(s);
2884
2885         /*
2886          * Step 2: Wait until we know hardware has finished any possible
2887          * use of the xfer. We do this by removing the entire
2888          * queue from the async schedule and waiting for the doorbell.
2889          * Nothing else should be touching the queue now.
2890          */
2891         psqh = sqh->prev;
2892         ehci_rem_qh(sc, sqh, psqh);
2893
2894         /*
2895          * Step 3:  make sure the soft interrupt routine
2896          * has run. This should remove any completed items off the queue.
2897          * The hardware has no reference to completed items (TDs).
2898          * It's safe to remove them at any time.
2899          */
2900         s = splusb();
2901 #ifdef USB_USE_SOFTINTR
2902         sc->sc_softwake = 1;
2903 #endif /* USB_USE_SOFTINTR */
2904         usb_schedsoftintr(&sc->sc_bus);
2905 #ifdef USB_USE_SOFTINTR
2906         tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
2907 #endif /* USB_USE_SOFTINTR */
2908
2909         /*
2910          * Step 4: Remove any vestiges of the xfer from the hardware.
2911          * The complication here is that the hardware may have executed
2912          * into or even beyond the xfer we're trying to abort.
2913          * So as we're scanning the TDs of this xfer we check if
2914          * the hardware points to any of them.
2915          *
2916          * first we need to see if there are any transfers
2917          * on this queue before the xfer we are aborting.. we need
2918          * to update any pointers that point to us to point past
2919          * the aborting xfer.  (If there is something past us).
2920          * Hardware and software.
2921          */
2922         cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2923         hit = 0;
2924
2925         /* If they initially point here. */
2926         us = exfer->sqtdstart->physaddr;
2927
2928         /* We will change them to point here */
2929         snext = exfer->sqtdend->nextqtd;
2930         next = htole32(snext->physaddr);
2931
2932         /*
2933          * Now loop through any qTDs before us and keep track of the pointer
2934          * that points to us for the end.
2935          */
2936         sqtd = sqh->sqtd;
2937         while (sqtd && sqtd != exfer->sqtdstart) {
2938                 hit |= (cur == sqtd->physaddr);
2939                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2940                         sqtd->qtd.qtd_next = next;
2941                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2942                         sqtd->qtd.qtd_altnext = next;
2943                 sqtd = sqtd->nextqtd;
2944         }
2945
2946         /*
2947          * If we already saw the active one then we are pretty much done.
2948          * We've done all the relinking we need to do.
2949          */
2950         if (!hit) {
2951
2952                 /*
2953                  * Now reinitialise the QH to point to the next qTD
2954                  * (if there is one). We only need to do this if
2955                  * it was previously pointing to us.
2956                  */
2957                 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2958                         if (cur == sqtd->physaddr) {
2959                                 hit++;
2960                         }
2961                         if (sqtd == exfer->sqtdend)
2962                                 break;
2963                 }
2964                 sqtd = sqtd->nextqtd;
2965                 /*
2966                  * Only need to alter the QH if it was pointing at a qTD
2967                  * that we are removing.
2968                  */
2969                 if (hit) {
2970                         sqh->qh.qh_qtd.qtd_next = htole32(snext->physaddr);
2971                         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
2972                         sqh->qh.qh_qtd.qtd_status &=
2973                             htole32(EHCI_QTD_TOGGLE_MASK);
2974                         for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
2975                                 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
2976                                 sqh->qh.qh_qtd.qtd_buffer_hi[i] = 0;
2977                         }
2978                 }
2979         }
2980         ehci_add_qh(sqh, psqh);
2981         /*
2982          * Step 5: Execute callback.
2983          */
2984 #ifdef DIAGNOSTIC
2985         exfer->isdone = 1;
2986 #endif
2987         /* Do the wakeup first to avoid touching the xfer after the callback. */
2988         exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2989         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2990                 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2991                 wakeup(&exfer->ehci_xfer_flags);
2992         }
2993         usb_transfer_complete(xfer);
2994
2995         /* printf("%s: %d TDs aborted\n", __func__, count); */
2996         splx(s);
2997 #undef exfer
2998 }
2999
3000 void
3001 ehci_timeout(void *addr)
3002 {
3003         struct ehci_xfer *exfer = addr;
3004         struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
3005         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
3006
3007         DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
3008 #ifdef USB_DEBUG
3009         if (ehcidebug > 1)
3010                 usbd_dump_pipe(exfer->xfer.pipe);
3011 #endif
3012
3013         if (sc->sc_dying) {
3014                 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
3015                 return;
3016         }
3017
3018         /* Execute the abort in a process context. */
3019         usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
3020             USB_TASKQ_HC);
3021 }
3022
3023 void
3024 ehci_abort_isoc_xfer(usbd_xfer_handle xfer, usbd_status status)
3025 {
3026         ehci_isoc_trans_t trans_status;
3027         struct ehci_pipe *epipe;
3028         struct ehci_xfer *exfer;
3029         ehci_softc_t *sc;
3030         struct ehci_soft_itd *itd;
3031         int s, i;
3032
3033         epipe = (struct ehci_pipe *) xfer->pipe;
3034         exfer = EXFER(xfer);
3035         sc = (ehci_softc_t *)epipe->pipe.device->bus;
3036
3037         DPRINTF(("ehci_abort_isoc_xfer: xfer %p pipe %p\n", xfer, epipe));
3038
3039         if (sc->sc_dying) {
3040                 s = splusb();
3041                 xfer->status = status;
3042                 callout_stop(&xfer->timeout_handle);
3043                 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
3044                 usb_transfer_complete(xfer);
3045                 splx(s);
3046                 return;
3047         }
3048
3049         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
3050                 DPRINTFN(2, ("ehci_abort_isoc_xfer: already aborting\n"));
3051
3052 #ifdef DIAGNOSTIC
3053                 if (status == USBD_TIMEOUT)
3054                         printf("ehci_abort_xfer: TIMEOUT while aborting\n");
3055 #endif
3056
3057                 xfer->status = status;
3058                 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
3059                 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
3060                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
3061                         tsleep(&exfer->ehci_xfer_flags, PZERO, "ehciaw", 0);
3062                 return;
3063         }
3064         exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
3065
3066         xfer->status = status;
3067         callout_stop(&xfer->timeout_handle);
3068         usb_rem_task(epipe->pipe.device, &exfer->abort_task);
3069
3070         s = splusb();
3071         for (itd = exfer->itdstart; itd != NULL; itd = itd->xfer_next) {
3072
3073                 for (i = 0; i < 8; i++) {
3074                         trans_status = le32toh(itd->itd.itd_ctl[i]);
3075                         trans_status &= ~EHCI_ITD_ACTIVE;
3076                         itd->itd.itd_ctl[i] = htole32(trans_status);
3077                 }
3078
3079         }
3080         splx(s);
3081
3082         s = splusb();
3083 #ifdef USB_USE_SOFTINTR
3084         sc->sc_softwake = 1;
3085 #endif /* USB_USE_SOFTINTR */
3086         usb_schedsoftintr(&sc->sc_bus);
3087 #ifdef USB_USE_SOFTINTR
3088         tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
3089 #endif /* USB_USE_SOFTINTR */
3090         splx(s);
3091
3092 #ifdef DIAGNOSTIC
3093         exfer->isdone = 1;
3094 #endif
3095         exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
3096         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
3097                 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
3098                 wakeup(&exfer->ehci_xfer_flags);
3099         }
3100         usb_transfer_complete(xfer);
3101 }
3102
3103 void
3104 ehci_timeout_task(void *addr)
3105 {
3106         usbd_xfer_handle xfer = addr;
3107         int s;
3108
3109         DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
3110
3111         s = splusb();
3112         ehci_abort_xfer(xfer, USBD_TIMEOUT);
3113         splx(s);
3114 }
3115
3116 /*
3117  * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
3118  * back the qTD status, or miss signalling occasionally under heavy load.
3119  * If the host machine is too fast, we can miss transaction completion - when
3120  * we scan the active list the transaction still seems to be active. This
3121  * generally exhibits itself as a umass stall that never recovers.
3122  *
3123  * We work around this behaviour by setting up this callback after any softintr
3124  * that completes with transactions still pending, giving us another chance to
3125  * check for completion after the writeback has taken place.
3126  */
3127 void
3128 ehci_intrlist_timeout(void *arg)
3129 {
3130         ehci_softc_t *sc = arg;
3131         int s = splusb();
3132
3133         DPRINTFN(3, ("ehci_intrlist_timeout\n"));
3134         usb_schedsoftintr(&sc->sc_bus);
3135
3136         splx(s);
3137 }
3138
3139 /************************/
3140
3141 static usbd_status
3142 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
3143 {
3144         usbd_status err;
3145
3146         /* Insert last in queue. */
3147         err = usb_insert_transfer(xfer);
3148         if (err)
3149                 return (err);
3150
3151         /* Pipe isn't running, start first */
3152         return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
3153 }
3154
3155 static usbd_status
3156 ehci_device_ctrl_start(usbd_xfer_handle xfer)
3157 {
3158         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3159         usbd_status err;
3160
3161         if (sc->sc_dying)
3162                 return (USBD_IOERROR);
3163
3164 #ifdef DIAGNOSTIC
3165         if (!(xfer->rqflags & URQ_REQUEST)) {
3166                 /* XXX panic */
3167                 printf("ehci_device_ctrl_transfer: not a request\n");
3168                 return (USBD_INVAL);
3169         }
3170 #endif
3171
3172         err = ehci_device_request(xfer);
3173         if (err)
3174                 return (err);
3175
3176         if (sc->sc_bus.use_polling)
3177                 ehci_waitintr(sc, xfer);
3178         return (USBD_IN_PROGRESS);
3179 }
3180
3181 void
3182 ehci_device_ctrl_done(usbd_xfer_handle xfer)
3183 {
3184         struct ehci_xfer *ex = EXFER(xfer);
3185         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3186         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3187
3188         DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
3189
3190 #ifdef DIAGNOSTIC
3191         if (!(xfer->rqflags & URQ_REQUEST)) {
3192                 panic("ehci_ctrl_done: not a request");
3193         }
3194 #endif
3195
3196         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3197                 ehci_del_intr_list(ex); /* remove from active list */
3198                 ehci_free_sqtd_chain(sc, epipe->sqh, ex->sqtdstart,
3199                     ex->sqtdend->nextqtd);
3200         }
3201
3202         DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
3203 }
3204
3205 /* Abort a device control request. */
3206 static void
3207 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
3208 {
3209         DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
3210         ehci_abort_xfer(xfer, USBD_CANCELLED);
3211 }
3212
3213 /* Close a device control pipe. */
3214 static void
3215 ehci_device_ctrl_close(usbd_pipe_handle pipe)
3216 {
3217         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3218         /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
3219
3220         DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
3221         ehci_close_pipe(pipe, sc->sc_async_head);
3222 }
3223
3224 usbd_status
3225 ehci_device_request(usbd_xfer_handle xfer)
3226 {
3227 #define exfer EXFER(xfer)
3228         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3229         usb_device_request_t *req = &xfer->request;
3230         usbd_device_handle dev = epipe->pipe.device;
3231         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3232         ehci_soft_qtd_t *newinactive, *setup, *stat, *next;
3233         ehci_soft_qh_t *sqh;
3234         int isread;
3235         int len;
3236         usbd_status err;
3237         int s;
3238
3239         isread = req->bmRequestType & UT_READ;
3240         len = UGETW(req->wLength);
3241
3242         DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
3243                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
3244                     req->bmRequestType, req->bRequest, UGETW(req->wValue),
3245                     UGETW(req->wIndex), len, dev->address,
3246                     epipe->pipe.endpoint->edesc->bEndpointAddress));
3247
3248         newinactive = ehci_alloc_sqtd(sc);
3249         if (newinactive == NULL) {
3250                 err = USBD_NOMEM;
3251                 goto bad1;
3252         }
3253         newinactive->qtd.qtd_status = htole32(0);
3254         newinactive->qtd.qtd_next = EHCI_NULL;
3255         newinactive->qtd.qtd_altnext = EHCI_NULL;
3256         stat = ehci_alloc_sqtd(sc);
3257         if (stat == NULL) {
3258                 err = USBD_NOMEM;
3259                 goto bad2;
3260         }
3261
3262         sqh = epipe->sqh;
3263         setup = sqh->inactivesqtd;
3264         sqh->inactivesqtd = newinactive;
3265         epipe->u.ctl.length = len;
3266
3267         /* Set up data transaction */
3268         if (len != 0) {
3269                 ehci_soft_qtd_t *end;
3270
3271                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3272                     NULL, newinactive, &next, &end);
3273                 if (err)
3274                         goto bad3;
3275                 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
3276                 end->nextqtd = stat;
3277                 end->qtd.qtd_next = htole32(stat->physaddr);
3278                 end->qtd.qtd_altnext = htole32(newinactive->physaddr);
3279         } else {
3280                 next = stat;
3281         }
3282
3283         memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
3284
3285         /* Clear toggle, and do not activate until complete */
3286         setup->qtd.qtd_status = htole32(
3287             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
3288             EHCI_QTD_SET_CERR(3) |
3289             EHCI_QTD_SET_TOGGLE(0) |
3290             EHCI_QTD_SET_BYTES(sizeof *req)
3291             );
3292         setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
3293         setup->qtd.qtd_buffer_hi[0] = 0;
3294         setup->nextqtd = next;
3295         setup->qtd.qtd_next = htole32(next->physaddr);
3296         setup->qtd.qtd_altnext = htole32(newinactive->physaddr);
3297         setup->xfer = xfer;
3298         setup->len = sizeof *req;
3299
3300         stat->qtd.qtd_status = htole32(
3301             EHCI_QTD_ACTIVE |
3302             EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
3303             EHCI_QTD_SET_CERR(3) |
3304             EHCI_QTD_SET_TOGGLE(1) |
3305             EHCI_QTD_IOC
3306             );
3307         stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
3308         stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
3309         stat->nextqtd = newinactive;
3310         stat->qtd.qtd_next = htole32(newinactive->physaddr);
3311         stat->qtd.qtd_altnext = htole32(newinactive->physaddr);
3312         stat->xfer = xfer;
3313         stat->len = 0;
3314
3315 #ifdef EHCI_DEBUG
3316         if (ehcidebug > 5) {
3317                 DPRINTF(("ehci_device_request:\n"));
3318                 ehci_dump_sqh(sqh);
3319                 ehci_dump_sqtds(setup);
3320         }
3321 #endif
3322
3323         exfer->sqtdstart = setup;
3324         exfer->sqtdend = stat;
3325 #ifdef DIAGNOSTIC
3326         if (!exfer->isdone) {
3327                 printf("ehci_device_request: not done, exfer=%p\n", exfer);
3328         }
3329         exfer->isdone = 0;
3330 #endif
3331
3332         /* Activate the new qTD in the QH list. */
3333         s = splusb();
3334         ehci_activate_qh(sqh, setup);
3335         if (xfer->timeout && !sc->sc_bus.use_polling) {
3336                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3337                     ehci_timeout, xfer);
3338         }
3339         ehci_add_intr_list(sc, exfer);
3340         xfer->status = USBD_IN_PROGRESS;
3341         splx(s);
3342
3343 #ifdef EHCI_DEBUG
3344         if (ehcidebug > 10) {
3345                 DPRINTF(("ehci_device_request: status=%x\n",
3346                          EOREAD4(sc, EHCI_USBSTS)));
3347                 delay(10000);
3348                 ehci_dump_regs(sc);
3349                 ehci_dump_sqh(sc->sc_async_head);
3350                 ehci_dump_sqh(sqh);
3351                 ehci_dump_sqtds(setup);
3352         }
3353 #endif
3354
3355         return (USBD_NORMAL_COMPLETION);
3356
3357  bad3:
3358         sqh->inactivesqtd = setup;
3359         ehci_free_sqtd(sc, stat);
3360  bad2:
3361         ehci_free_sqtd(sc, newinactive);
3362  bad1:
3363         DPRINTFN(-1,("ehci_device_request: no memory\n"));
3364         xfer->status = err;
3365         usb_transfer_complete(xfer);
3366         return (err);
3367 #undef exfer
3368 }
3369
3370 /************************/
3371
3372 static usbd_status
3373 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
3374 {
3375         usbd_status err;
3376
3377         /* Insert last in queue. */
3378         err = usb_insert_transfer(xfer);
3379         if (err)
3380                 return (err);
3381
3382         /* Pipe isn't running, start first */
3383         return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
3384 }
3385
3386 usbd_status
3387 ehci_device_bulk_start(usbd_xfer_handle xfer)
3388 {
3389 #define exfer EXFER(xfer)
3390         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3391         usbd_device_handle dev = epipe->pipe.device;
3392         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3393         ehci_soft_qtd_t *data, *dataend, *newinactive;
3394         ehci_soft_qh_t *sqh;
3395         usbd_status err;
3396         int len, isread, endpt;
3397         int s;
3398
3399         DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
3400                      xfer, xfer->length, xfer->flags));
3401
3402         if (sc->sc_dying)
3403                 return (USBD_IOERROR);
3404
3405 #ifdef DIAGNOSTIC
3406         if (xfer->rqflags & URQ_REQUEST)
3407                 panic("ehci_device_bulk_start: a request");
3408 #endif
3409
3410         len = xfer->length;
3411         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3412         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3413         sqh = epipe->sqh;
3414
3415         epipe->u.bulk.length = len;
3416
3417         newinactive = ehci_alloc_sqtd(sc);
3418         if (newinactive == NULL) {
3419                 DPRINTFN(-1,("ehci_device_bulk_start: no sqtd memory\n"));
3420                 err = USBD_NOMEM;
3421                 xfer->status = err;
3422                 usb_transfer_complete(xfer);
3423                 return (err);
3424         }
3425         newinactive->qtd.qtd_status = htole32(0);
3426         newinactive->qtd.qtd_next = EHCI_NULL;
3427         newinactive->qtd.qtd_altnext = EHCI_NULL;
3428         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3429             sqh->inactivesqtd, newinactive, &data, &dataend);
3430         if (err) {
3431                 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
3432                 ehci_free_sqtd(sc, newinactive);
3433                 xfer->status = err;
3434                 usb_transfer_complete(xfer);
3435                 return (err);
3436         }
3437         dataend->nextqtd = newinactive;
3438         dataend->qtd.qtd_next = htole32(newinactive->physaddr);
3439         dataend->qtd.qtd_altnext = htole32(newinactive->physaddr);
3440         sqh->inactivesqtd = newinactive;
3441
3442 #ifdef EHCI_DEBUG
3443         if (ehcidebug > 5) {
3444                 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
3445                 ehci_dump_sqh(sqh);
3446                 ehci_dump_sqtds(data);
3447         }
3448 #endif
3449
3450         /* Set up interrupt info. */
3451         exfer->sqtdstart = data;
3452         exfer->sqtdend = dataend;
3453 #ifdef DIAGNOSTIC
3454         if (!exfer->isdone) {
3455                 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
3456         }
3457         exfer->isdone = 0;
3458 #endif
3459
3460         s = splusb();
3461         ehci_activate_qh(sqh, data);
3462         if (xfer->timeout && !sc->sc_bus.use_polling) {
3463                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3464                     ehci_timeout, xfer);
3465         }
3466         ehci_add_intr_list(sc, exfer);
3467         xfer->status = USBD_IN_PROGRESS;
3468         splx(s);
3469
3470 #ifdef EHCI_DEBUG
3471         if (ehcidebug > 10) {
3472                 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
3473                 delay(10000);
3474                 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
3475                 ehci_dump_regs(sc);
3476 #if 0
3477                 printf("async_head:\n");
3478                 ehci_dump_sqh(sc->sc_async_head);
3479 #endif
3480                 printf("sqh:\n");
3481                 ehci_dump_sqh(sqh);
3482                 ehci_dump_sqtds(data);
3483         }
3484 #endif
3485
3486         if (sc->sc_bus.use_polling)
3487                 ehci_waitintr(sc, xfer);
3488
3489         return (USBD_IN_PROGRESS);
3490 #undef exfer
3491 }
3492
3493 static void
3494 ehci_device_bulk_abort(usbd_xfer_handle xfer)
3495 {
3496         DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
3497         ehci_abort_xfer(xfer, USBD_CANCELLED);
3498 }
3499
3500 /*
3501  * Close a device bulk pipe.
3502  */
3503 static void
3504 ehci_device_bulk_close(usbd_pipe_handle pipe)
3505 {
3506         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3507
3508         DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
3509         ehci_close_pipe(pipe, sc->sc_async_head);
3510 }
3511
3512 void
3513 ehci_device_bulk_done(usbd_xfer_handle xfer)
3514 {
3515         struct ehci_xfer *ex = EXFER(xfer);
3516         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3517         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3518
3519         DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
3520                      xfer, xfer->actlen));
3521
3522         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3523                 ehci_del_intr_list(ex); /* remove from active list */
3524                 ehci_free_sqtd_chain(sc, epipe->sqh, ex->sqtdstart,
3525                     ex->sqtdend->nextqtd);
3526         }
3527
3528         DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
3529 }
3530
3531 /************************/
3532
3533 static usbd_status
3534 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
3535 {
3536         struct ehci_soft_islot *isp;
3537         int islot, lev;
3538
3539         /* Find a poll rate that is large enough. */
3540         for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
3541                 if (EHCI_ILEV_IVAL(lev) <= ival)
3542                         break;
3543
3544         /* Pick an interrupt slot at the right level. */
3545         /* XXX could do better than picking at random. */
3546         islot = EHCI_IQHIDX(lev, arc4random());
3547
3548         sqh->islot = islot;
3549         isp = &sc->sc_islots[islot];
3550         ehci_add_qh(sqh, isp->sqh);
3551
3552         return (USBD_NORMAL_COMPLETION);
3553 }
3554
3555 static usbd_status
3556 ehci_device_intr_transfer(usbd_xfer_handle xfer)
3557 {
3558         usbd_status err;
3559
3560         /* Insert last in queue. */
3561         err = usb_insert_transfer(xfer);
3562         if (err)
3563                 return (err);
3564
3565         /*
3566          * Pipe isn't running (otherwise err would be USBD_INPROG),
3567          * so start it first.
3568          */
3569         return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3570 }
3571
3572 static usbd_status
3573 ehci_device_intr_start(usbd_xfer_handle xfer)
3574 {
3575 #define exfer EXFER(xfer)
3576         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3577         usbd_device_handle dev = xfer->pipe->device;
3578         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3579         ehci_soft_qtd_t *data, *dataend, *newinactive;
3580         ehci_soft_qh_t *sqh;
3581         usbd_status err;
3582         int len, isread, endpt;
3583         int s;
3584
3585         DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
3586             xfer, xfer->length, xfer->flags));
3587
3588         if (sc->sc_dying)
3589                 return (USBD_IOERROR);
3590
3591 #ifdef DIAGNOSTIC
3592         if (xfer->rqflags & URQ_REQUEST)
3593                 panic("ehci_device_intr_start: a request");
3594 #endif
3595
3596         len = xfer->length;
3597         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3598         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3599         sqh = epipe->sqh;
3600
3601         epipe->u.intr.length = len;
3602
3603         newinactive = ehci_alloc_sqtd(sc);
3604         if (newinactive == NULL) {
3605                 DPRINTFN(-1,("ehci_device_intr_start: no sqtd memory\n"));
3606                 err = USBD_NOMEM;
3607                 xfer->status = err;
3608                 usb_transfer_complete(xfer);
3609                 return (err);
3610         }
3611         newinactive->qtd.qtd_status = htole32(0);
3612         newinactive->qtd.qtd_next = EHCI_NULL;
3613         newinactive->qtd.qtd_altnext = EHCI_NULL;
3614         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3615             sqh->inactivesqtd, newinactive, &data, &dataend);
3616         if (err) {
3617                 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3618                 xfer->status = err;
3619                 usb_transfer_complete(xfer);
3620                 return (err);
3621         }
3622         dataend->nextqtd = newinactive;
3623         dataend->qtd.qtd_next = htole32(newinactive->physaddr);
3624         dataend->qtd.qtd_altnext = htole32(newinactive->physaddr);
3625         sqh->inactivesqtd = newinactive;
3626
3627 #ifdef EHCI_DEBUG
3628         if (ehcidebug > 5) {
3629                 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3630                 ehci_dump_sqh(sqh);
3631                 ehci_dump_sqtds(data);
3632         }
3633 #endif
3634
3635         /* Set up interrupt info. */
3636         exfer->sqtdstart = data;
3637         exfer->sqtdend = dataend;
3638 #ifdef DIAGNOSTIC
3639         if (!exfer->isdone) {
3640                 printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3641         }
3642         exfer->isdone = 0;
3643 #endif
3644
3645         s = splusb();
3646         ehci_activate_qh(sqh, data);
3647         if (xfer->timeout && !sc->sc_bus.use_polling) {
3648                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3649                     ehci_timeout, xfer);
3650         }
3651         ehci_add_intr_list(sc, exfer);
3652         xfer->status = USBD_IN_PROGRESS;
3653         splx(s);
3654
3655 #ifdef EHCI_DEBUG
3656         if (ehcidebug > 10) {
3657                 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3658                 delay(10000);
3659                 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3660                 ehci_dump_regs(sc);
3661                 printf("sqh:\n");
3662                 ehci_dump_sqh(sqh);
3663                 ehci_dump_sqtds(data);
3664         }
3665 #endif
3666
3667         if (sc->sc_bus.use_polling)
3668                 ehci_waitintr(sc, xfer);
3669
3670         return (USBD_IN_PROGRESS);
3671 #undef exfer
3672 }
3673
3674 static void
3675 ehci_device_intr_abort(usbd_xfer_handle xfer)
3676 {
3677         DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3678         if (xfer->pipe->intrxfer == xfer) {
3679                 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3680                 xfer->pipe->intrxfer = NULL;
3681         }
3682         /*
3683          * XXX - abort_xfer uses ehci_sync_hc, which syncs via the advance
3684          *       async doorbell. That's dependant on the async list, wheras
3685          *       intr xfers are periodic, should not use this?
3686          */
3687         ehci_abort_xfer(xfer, USBD_CANCELLED);
3688 }
3689
3690 static void
3691 ehci_device_intr_close(usbd_pipe_handle pipe)
3692 {
3693         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3694         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3695         struct ehci_soft_islot *isp;
3696
3697         isp = &sc->sc_islots[epipe->sqh->islot];
3698         ehci_close_pipe(pipe, isp->sqh);
3699 }
3700
3701 static void
3702 ehci_device_intr_done(usbd_xfer_handle xfer)
3703 {
3704 #define exfer EXFER(xfer)
3705         struct ehci_xfer *ex = EXFER(xfer);
3706         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3707         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3708         ehci_soft_qtd_t *data, *dataend, *newinactive;
3709         ehci_soft_qh_t *sqh;
3710         usbd_status err;
3711         int len, isread, endpt, s;
3712
3713         DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3714             xfer, xfer->actlen));
3715
3716         sqh = epipe->sqh;
3717         if (xfer->pipe->repeat) {
3718                 ehci_free_sqtd_chain(sc, sqh, ex->sqtdstart,
3719                     ex->sqtdend->nextqtd);
3720
3721                 len = epipe->u.intr.length;
3722                 xfer->length = len;
3723                 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3724                 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3725
3726                 newinactive = ehci_alloc_sqtd(sc);
3727                 if (newinactive == NULL) {
3728                         DPRINTFN(-1,
3729                             ("ehci_device_intr_done: no sqtd memory\n"));
3730                         err = USBD_NOMEM;
3731                         xfer->status = err;
3732                         return;
3733                 }
3734                 newinactive->qtd.qtd_status = htole32(0);
3735                 newinactive->qtd.qtd_next = EHCI_NULL;
3736                 newinactive->qtd.qtd_altnext = EHCI_NULL;
3737                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3738                     sqh->inactivesqtd, newinactive, &data, &dataend);
3739                 if (err) {
3740                         DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3741                         xfer->status = err;
3742                         return;
3743                 }
3744                 dataend->nextqtd = newinactive;
3745                 dataend->qtd.qtd_next = htole32(newinactive->physaddr);
3746                 dataend->qtd.qtd_altnext = htole32(newinactive->physaddr);
3747                 sqh->inactivesqtd = newinactive;
3748
3749                 /* Set up interrupt info. */
3750                 exfer->sqtdstart = data;
3751                 exfer->sqtdend = dataend;
3752 #ifdef DIAGNOSTIC
3753                 if (!exfer->isdone) {
3754                         printf("ehci_device_intr_done: not done, ex=%p\n",
3755                             exfer);
3756                 }
3757                 exfer->isdone = 0;
3758 #endif
3759
3760                 s = splusb();
3761                 ehci_activate_qh(sqh, data);
3762                 if (xfer->timeout && !sc->sc_bus.use_polling) {
3763                         callout_reset(&xfer->timeout_handle,
3764                             MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3765                 }
3766                 splx(s);
3767
3768                 xfer->status = USBD_IN_PROGRESS;
3769         } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3770                 ehci_del_intr_list(ex); /* remove from active list */
3771                 ehci_free_sqtd_chain(sc, sqh, ex->sqtdstart,
3772                     ex->sqtdend->nextqtd);
3773         }
3774 #undef exfer
3775 }
3776
3777 /************************/
3778
3779 static usbd_status
3780 ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3781 {
3782         usbd_status err;
3783
3784         err = usb_insert_transfer(xfer);
3785         if (err && err != USBD_IN_PROGRESS)
3786                 return (err);
3787
3788         return (ehci_device_isoc_start(xfer));
3789 }
3790
3791 static usbd_status
3792 ehci_device_isoc_start(usbd_xfer_handle xfer)
3793 {
3794         struct ehci_pipe *epipe;
3795         usbd_device_handle dev;
3796         ehci_softc_t *sc;
3797         struct ehci_xfer *exfer;
3798         ehci_soft_itd_t *itd, *prev, *start, *stop;
3799         usb_dma_t *dma_buf;
3800         int i, j, k, frames, uframes, ufrperframe;
3801         int s, trans_count, offs, total_length;
3802         int frindex;
3803
3804         start = NULL;
3805         prev = NULL;
3806         itd = NULL;
3807         trans_count = 0;
3808         total_length = 0;
3809         exfer = (struct ehci_xfer *) xfer;
3810         sc = (ehci_softc_t *)xfer->pipe->device->bus;
3811         dev = xfer->pipe->device;
3812         epipe = (struct ehci_pipe *)xfer->pipe;
3813
3814         /*
3815          * To allow continuous transfers, above we start all transfers
3816          * immediately. However, we're still going to get usbd_start_next call
3817          * this when another xfer completes. So, check if this is already
3818          * in progress or not
3819          */
3820
3821         if (exfer->itdstart != NULL)
3822                 return (USBD_IN_PROGRESS);
3823
3824         DPRINTFN(2, ("ehci_device_isoc_start: xfer %p len %d flags %d\n",
3825             xfer, xfer->length, xfer->flags));
3826
3827         if (sc->sc_dying)
3828                 return (USBD_IOERROR);
3829
3830         /*
3831          * To avoid complication, don't allow a request right now that'll span
3832          * the entire frame table. To within 4 frames, to allow some leeway
3833          * on either side of where the hc currently is.
3834          */
3835         if ((1 << (epipe->pipe.endpoint->edesc->bInterval)) *
3836             xfer->nframes >= (sc->sc_flsize - 4) * 8) {
3837                 printf("ehci: isoc descriptor requested that spans the entire"
3838                     " frametable, too many frames\n");
3839                 return (USBD_INVAL);
3840         }
3841
3842 #ifdef DIAGNOSTIC
3843         if (xfer->rqflags & URQ_REQUEST)
3844                 panic("ehci_device_isoc_start: request\n");
3845
3846         if (!exfer->isdone)
3847                 printf("ehci_device_isoc_start: not done, ex = %p\n", exfer);
3848         exfer->isdone = 0;
3849 #endif
3850
3851         /*
3852          * Step 1: Allocate and initialize itds, how many do we need?
3853          * One per transfer if interval >= 8 microframes, fewer if we use
3854          * multiple microframes per frame.
3855          */
3856
3857         i = epipe->pipe.endpoint->edesc->bInterval;
3858         if (i > 16 || i == 0) {
3859                 /* Spec page 271 says intervals > 16 are invalid */
3860                 DPRINTF(("ehci_device_isoc_start: bInvertal %d invalid\n", i));
3861                 return (USBD_INVAL);
3862         }
3863
3864         switch (i) {
3865         case 1:
3866                 ufrperframe = 8;
3867                 break;
3868         case 2:
3869                 ufrperframe = 4;
3870                 break;
3871         case 3:
3872                 ufrperframe = 2;
3873                 break;
3874         default:
3875                 ufrperframe = 1;
3876                 break;
3877         }
3878         frames = (xfer->nframes + (ufrperframe - 1)) / ufrperframe;
3879         uframes = 8 / ufrperframe;
3880
3881         if (frames == 0) {
3882                 DPRINTF(("ehci_device_isoc_start: frames == 0\n"));
3883                 return (USBD_INVAL);
3884         }
3885
3886         dma_buf = xfer->buffer;
3887         offs = 0;
3888
3889         for (i = 0; i < frames; i++) {
3890                 int froffs = offs;
3891                 itd = ehci_alloc_itd(sc);
3892
3893                 if (prev != NULL) {
3894                         prev->itd.itd_next =
3895                             htole32(itd->physaddr | EHCI_LINK_ITD);
3896                         prev->xfer_next = itd;
3897                 } else {
3898                         start = itd;
3899                 }
3900
3901                 /*
3902                  * Step 1.5, initialize uframes
3903                  */
3904                 for (j = 0; j < 8; j += uframes) {
3905                         /* Calculate which page in the list this starts in */
3906                         int addr = DMAADDR(dma_buf, froffs);
3907                         addr = EHCI_PAGE_OFFSET(addr);
3908                         addr += (offs - froffs);
3909                         addr = EHCI_PAGE(addr);
3910                         addr /= EHCI_PAGE_SIZE;
3911
3912                         /* This gets the initial offset into the first page,
3913                          * looks how far further along the current uframe
3914                          * offset is. Works out how many pages that is.
3915                          */
3916
3917                         itd->itd.itd_ctl[j] = htole32 ( EHCI_ITD_ACTIVE |
3918                             EHCI_ITD_SET_LEN(xfer->frlengths[trans_count]) |
3919                             EHCI_ITD_SET_PG(addr) |
3920                             EHCI_ITD_SET_OFFS(EHCI_PAGE_OFFSET(DMAADDR(dma_buf,
3921                                 offs))));
3922
3923                         total_length += xfer->frlengths[trans_count];
3924                         offs += xfer->frlengths[trans_count];
3925                         trans_count++;
3926
3927                         if (trans_count >= xfer->nframes) { /*Set IOC*/
3928                                 itd->itd.itd_ctl[j] |= htole32(EHCI_ITD_IOC);
3929                         }
3930                 }
3931
3932                 /* Step 1.75, set buffer pointers. To simplify matters, all
3933                  * pointers are filled out for the next 7 hardware pages in
3934                  * the dma block, so no need to worry what pages to cover
3935                  * and what to not.
3936                  */
3937
3938                 for (j=0; j < 7; j++) {
3939                         /*
3940                          * Don't try to lookup a page that's past the end
3941                          * of buffer
3942                          */
3943                         int page_offs = EHCI_PAGE(froffs +
3944                             (EHCI_PAGE_SIZE * j));
3945                         if (page_offs >= dma_buf->block->size)
3946                                 break;
3947
3948                         int page = DMAADDR(dma_buf, page_offs);
3949                         page = EHCI_PAGE(page);
3950                         itd->itd.itd_bufr[j] =
3951                             htole32(EHCI_ITD_SET_BPTR(page) | EHCI_LINK_ITD);
3952                 }
3953
3954                 /*
3955                  * Other special values
3956                  */
3957
3958                 k = epipe->pipe.endpoint->edesc->bEndpointAddress;
3959                 itd->itd.itd_bufr[0] |= htole32(
3960                     EHCI_ITD_SET_EP(UE_GET_ADDR(k)) |
3961                     EHCI_ITD_SET_DADDR(epipe->pipe.device->address));
3962
3963                 k = (UE_GET_DIR(epipe->pipe.endpoint->edesc->bEndpointAddress))
3964                     ? 1 : 0;
3965                 j = UE_GET_SIZE(
3966                     UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize));
3967                 itd->itd.itd_bufr[1] |= htole32(EHCI_ITD_SET_DIR(k) |
3968                     EHCI_ITD_SET_MAXPKT(UE_GET_SIZE(j)));
3969
3970                 /* FIXME: handle invalid trans */
3971                 itd->itd.itd_bufr[2] |=
3972                     htole32(EHCI_ITD_SET_MULTI(UE_GET_TRANS(j)+1));
3973                 prev = itd;
3974         } /* End of frame */
3975
3976         stop = itd;
3977         stop->xfer_next = NULL;
3978         exfer->isoc_len = total_length;
3979
3980         /*
3981          * Part 2: Transfer descriptors have now been set up, now they must
3982          * be scheduled into the period frame list. Erk. Not wanting to
3983          * complicate matters, transfer is denied if the transfer spans
3984          * more than the period frame list.
3985          */
3986
3987         s = splusb();
3988
3989         /* Start inserting frames */
3990         if (epipe->u.isoc.cur_xfers > 0) {
3991                 frindex = epipe->u.isoc.next_frame;
3992         } else {
3993                 frindex = EOREAD4(sc, EHCI_FRINDEX);
3994                 frindex = frindex >> 3; /* Erase microframe index */
3995                 frindex += 2;
3996         }
3997
3998         if (frindex >= sc->sc_flsize)
3999                 frindex &= (sc->sc_flsize - 1);
4000
4001         /* Whats the frame interval? */
4002         i = (1 << epipe->pipe.endpoint->edesc->bInterval);
4003         if (i / 8 == 0)
4004                 i = 1;
4005         else
4006                 i /= 8;
4007
4008         itd = start;
4009         for (j = 0; j < frames; j++) {
4010                 if (itd == NULL)
4011                         panic("ehci: unexpectedly ran out of isoc itds,"
4012                             "isoc_start\n");
4013
4014                 itd->itd.itd_next = sc->sc_flist[frindex];
4015                 if (itd->itd.itd_next == 0)
4016                         /* FIXME: frindex table gets initialized to NULL
4017                          * or EHCI_NULL? */
4018                         itd->itd.itd_next = htole32(EHCI_NULL);
4019
4020                 sc->sc_flist[frindex] = htole32(EHCI_LINK_ITD | itd->physaddr);
4021
4022                 itd->u.frame_list.next = sc->sc_softitds[frindex];
4023                 sc->sc_softitds[frindex] = itd;
4024                 if (itd->u.frame_list.next != NULL)
4025                         itd->u.frame_list.next->u.frame_list.prev = itd;
4026                 itd->slot = frindex;
4027                 itd->u.frame_list.prev = NULL;
4028
4029                 frindex += i;
4030                 if (frindex >= sc->sc_flsize)
4031                         frindex -= sc->sc_flsize;
4032
4033                 itd = itd->xfer_next;
4034         }
4035
4036         epipe->u.isoc.cur_xfers++;
4037         epipe->u.isoc.next_frame = frindex;
4038
4039         exfer->itdstart = start;
4040         exfer->itdend = stop;
4041         exfer->sqtdstart = NULL;
4042         exfer->sqtdstart = NULL;
4043
4044         ehci_add_intr_list(sc, exfer);
4045         xfer->status = USBD_IN_PROGRESS;
4046         xfer->done = 0;
4047         splx(s);
4048
4049         if (sc->sc_bus.use_polling) {
4050                 printf("Starting ehci isoc xfer with polling. Bad idea?\n");
4051                 ehci_waitintr(sc, xfer);
4052         }
4053
4054         return (USBD_IN_PROGRESS);
4055 }
4056
4057 static void
4058 ehci_device_isoc_abort(usbd_xfer_handle xfer)
4059 {
4060         DPRINTFN(1, ("ehci_device_isoc_abort: xfer = %p\n", xfer));
4061         ehci_abort_isoc_xfer(xfer, USBD_CANCELLED);
4062 }
4063
4064 static void
4065 ehci_device_isoc_close(usbd_pipe_handle pipe)
4066 {
4067         printf("ehci_device_isoc_close: nothing in the pipe to free?\n");
4068 }
4069
4070 static void
4071 ehci_device_isoc_done(usbd_xfer_handle xfer)
4072 {
4073         struct ehci_xfer *exfer;
4074         ehci_softc_t *sc;
4075         struct ehci_pipe *epipe;
4076         int s;
4077
4078         exfer = EXFER(xfer);
4079         sc = (ehci_softc_t *)xfer->pipe->device->bus;
4080         epipe = (struct ehci_pipe *) xfer->pipe;
4081
4082         s = splusb();
4083         epipe->u.isoc.cur_xfers--;
4084         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(exfer)) {
4085                 ehci_del_intr_list(exfer);
4086                 ehci_rem_free_itd_chain(sc, exfer);
4087         }
4088         splx(s);
4089 }