1 /* $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
4 * Copyright (c) 2004 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
42 * The EHCI 1.0 spec can be found at
43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
44 * and the USB 2.0 spec at
45 * http://www.usb.org/developers/docs/usb_20.zip
51 * 1) The EHCI driver lacks support for isochronous transfers, so
52 * devices using them don't work.
54 * 2) Interrupt transfer scheduling does not manage the time available
55 * in each frame, so it is possible for the transfers to overrun
56 * the end of the frame.
58 * 3) Command failures are not recovered correctly.
61 #include <sys/cdefs.h>
62 __FBSDID("$FreeBSD$");
64 #include <sys/param.h>
65 #include <sys/systm.h>
66 #include <sys/malloc.h>
67 #include <sys/kernel.h>
68 #include <sys/endian.h>
69 #include <sys/module.h>
71 #include <sys/lockmgr.h>
72 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
73 #include <machine/cpu.h>
76 #include <sys/queue.h>
77 #include <sys/sysctl.h>
79 #include <machine/bus.h>
80 #include <machine/endian.h>
82 #include <dev/usb/usb.h>
83 #include <dev/usb/usbdi.h>
84 #include <dev/usb/usbdivar.h>
85 #include <dev/usb/usb_mem.h>
86 #include <dev/usb/usb_quirks.h>
88 #include <dev/usb/ehcireg.h>
89 #include <dev/usb/ehcivar.h>
91 #define delay(d) DELAY(d)
94 #define EHCI_DEBUG USB_DEBUG
95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while (0)
96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0)
98 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
99 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
100 &ehcidebug, 0, "ehci debug level");
101 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
104 #define DPRINTFN(n,x)
108 struct usbd_pipe pipe;
112 ehci_soft_qtd_t *qtd;
113 /* ehci_soft_itd_t *itd; */
120 /*ehci_soft_qtd_t *setup, *data, *stat;*/
135 static usbd_status ehci_open(usbd_pipe_handle);
136 static void ehci_poll(struct usbd_bus *);
137 static void ehci_softintr(void *);
138 static int ehci_intr1(ehci_softc_t *);
139 static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
140 static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
141 static void ehci_idone(struct ehci_xfer *);
142 static void ehci_timeout(void *);
143 static void ehci_timeout_task(void *);
144 static void ehci_intrlist_timeout(void *);
146 static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
147 static void ehci_freem(struct usbd_bus *, usb_dma_t *);
149 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
150 static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
152 static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
153 static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
154 static void ehci_root_ctrl_abort(usbd_xfer_handle);
155 static void ehci_root_ctrl_close(usbd_pipe_handle);
156 static void ehci_root_ctrl_done(usbd_xfer_handle);
158 static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
159 static usbd_status ehci_root_intr_start(usbd_xfer_handle);
160 static void ehci_root_intr_abort(usbd_xfer_handle);
161 static void ehci_root_intr_close(usbd_pipe_handle);
162 static void ehci_root_intr_done(usbd_xfer_handle);
164 static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
165 static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
166 static void ehci_device_ctrl_abort(usbd_xfer_handle);
167 static void ehci_device_ctrl_close(usbd_pipe_handle);
168 static void ehci_device_ctrl_done(usbd_xfer_handle);
170 static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
171 static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
172 static void ehci_device_bulk_abort(usbd_xfer_handle);
173 static void ehci_device_bulk_close(usbd_pipe_handle);
174 static void ehci_device_bulk_done(usbd_xfer_handle);
176 static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
177 static usbd_status ehci_device_intr_start(usbd_xfer_handle);
178 static void ehci_device_intr_abort(usbd_xfer_handle);
179 static void ehci_device_intr_close(usbd_pipe_handle);
180 static void ehci_device_intr_done(usbd_xfer_handle);
182 static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
183 static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
184 static void ehci_device_isoc_abort(usbd_xfer_handle);
185 static void ehci_device_isoc_close(usbd_pipe_handle);
186 static void ehci_device_isoc_done(usbd_xfer_handle);
188 static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
189 static void ehci_noop(usbd_pipe_handle pipe);
191 static int ehci_str(usb_string_descriptor_t *, int, char *);
192 static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
193 static void ehci_pcd_able(ehci_softc_t *, int);
194 static void ehci_pcd_enable(void *);
195 static void ehci_disown(ehci_softc_t *, int, int);
197 static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
198 static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
200 static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
201 static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
202 static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
203 ehci_softc_t *, int, int, usbd_xfer_handle,
204 ehci_soft_qtd_t *, ehci_soft_qtd_t *,
205 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
206 static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qh_t *,
207 ehci_soft_qtd_t *, ehci_soft_qtd_t *);
209 static usbd_status ehci_device_request(usbd_xfer_handle xfer);
211 static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
214 static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
215 static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
217 static void ehci_activate_qh(ehci_soft_qh_t *, ehci_soft_qtd_t *);
218 static void ehci_sync_hc(ehci_softc_t *);
220 static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
221 static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
224 static void ehci_dump_regs(ehci_softc_t *);
225 void ehci_dump(void);
226 static ehci_softc_t *theehci;
227 static void ehci_dump_link(ehci_link_t, int);
228 static void ehci_dump_sqtds(ehci_soft_qtd_t *);
229 static void ehci_dump_sqtd(ehci_soft_qtd_t *);
230 static void ehci_dump_qtd(ehci_qtd_t *);
231 static void ehci_dump_sqh(ehci_soft_qh_t *);
233 static void ehci_dump_exfer(struct ehci_xfer *);
237 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
239 #define EHCI_INTR_ENDPT 1
241 #define ehci_add_intr_list(sc, ex) \
242 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
243 #define ehci_del_intr_list(ex) \
245 LIST_REMOVE((ex), inext); \
246 (ex)->inext.le_prev = NULL; \
248 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
250 static struct usbd_bus_methods ehci_bus_methods = {
260 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
261 ehci_root_ctrl_transfer,
262 ehci_root_ctrl_start,
263 ehci_root_ctrl_abort,
264 ehci_root_ctrl_close,
269 static struct usbd_pipe_methods ehci_root_intr_methods = {
270 ehci_root_intr_transfer,
271 ehci_root_intr_start,
272 ehci_root_intr_abort,
273 ehci_root_intr_close,
278 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
279 ehci_device_ctrl_transfer,
280 ehci_device_ctrl_start,
281 ehci_device_ctrl_abort,
282 ehci_device_ctrl_close,
284 ehci_device_ctrl_done,
287 static struct usbd_pipe_methods ehci_device_intr_methods = {
288 ehci_device_intr_transfer,
289 ehci_device_intr_start,
290 ehci_device_intr_abort,
291 ehci_device_intr_close,
292 ehci_device_clear_toggle,
293 ehci_device_intr_done,
296 static struct usbd_pipe_methods ehci_device_bulk_methods = {
297 ehci_device_bulk_transfer,
298 ehci_device_bulk_start,
299 ehci_device_bulk_abort,
300 ehci_device_bulk_close,
301 ehci_device_clear_toggle,
302 ehci_device_bulk_done,
305 static struct usbd_pipe_methods ehci_device_isoc_methods = {
306 ehci_device_isoc_transfer,
307 ehci_device_isoc_start,
308 ehci_device_isoc_abort,
309 ehci_device_isoc_close,
311 ehci_device_isoc_done,
315 ehci_hcreset(ehci_softc_t *sc)
320 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
321 for (i = 0; i < 100; i++) {
322 usb_delay_ms(&sc->sc_bus, 1);
323 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
329 * Fall through and try reset anyway even though
330 * Table 2-9 in the EHCI spec says this will result
331 * in undefined behavior.
333 printf("%s: stop timeout\n",
334 device_get_nameunit(sc->sc_bus.bdev));
336 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
337 for (i = 0; i < 100; i++) {
338 usb_delay_ms(&sc->sc_bus, 1);
339 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
341 return (USBD_NORMAL_COMPLETION);
343 printf("%s: reset timeout\n", device_get_nameunit(sc->sc_bus.bdev));
344 return (USBD_IOERROR);
348 ehci_init(ehci_softc_t *sc)
350 u_int32_t version, sparams, cparams, hcr;
357 DPRINTF(("ehci_init: start\n"));
362 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
364 version = EREAD2(sc, EHCI_HCIVERSION);
365 printf("%s: EHCI version %x.%x\n", device_get_nameunit(sc->sc_bus.bdev),
366 version >> 8, version & 0xff);
368 sparams = EREAD4(sc, EHCI_HCSPARAMS);
369 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
370 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
371 ncomp = EHCI_HCS_N_CC(sparams);
372 if (ncomp != sc->sc_ncomp) {
373 printf("%s: wrong number of companions (%d != %d)\n",
374 device_get_nameunit(sc->sc_bus.bdev),
375 ncomp, sc->sc_ncomp);
376 if (ncomp < sc->sc_ncomp)
377 sc->sc_ncomp = ncomp;
379 if (sc->sc_ncomp > 0) {
380 printf("%s: companion controller%s, %d port%s each:",
381 device_get_nameunit(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
382 EHCI_HCS_N_PCC(sparams),
383 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
384 for (i = 0; i < sc->sc_ncomp; i++)
385 printf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
388 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
389 cparams = EREAD4(sc, EHCI_HCCPARAMS);
390 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
392 if (EHCI_HCC_64BIT(cparams)) {
393 /* MUST clear segment register if 64 bit capable. */
394 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
397 sc->sc_bus.usbrev = USBREV_2_0;
399 /* Reset the controller */
400 DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
401 err = ehci_hcreset(sc);
402 if (err != USBD_NORMAL_COMPLETION)
405 /* frame list size at default, read back what we got and use that */
406 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
407 case 0: sc->sc_flsize = 1024; break;
408 case 1: sc->sc_flsize = 512; break;
409 case 2: sc->sc_flsize = 256; break;
410 case 3: return (USBD_IOERROR);
412 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
413 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
416 DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
417 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
418 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
420 /* Set up the bus struct. */
421 sc->sc_bus.methods = &ehci_bus_methods;
422 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
424 #if defined(__NetBSD__) || defined(__OpenBSD__)
425 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
426 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
429 sc->sc_eintrs = EHCI_NORMAL_INTRS;
432 * Allocate the interrupt dummy QHs. These are arranged to give
433 * poll intervals that are powers of 2 times 1ms.
435 for (i = 0; i < EHCI_INTRQHS; i++) {
436 sqh = ehci_alloc_sqh(sc);
441 sc->sc_islots[i].sqh = sqh;
444 for (i = 0; i < EHCI_INTRQHS; i++) {
445 if (i == EHCI_IQHIDX(lev + 1, 0))
447 sqh = sc->sc_islots[i].sqh;
449 /* The last (1ms) QH terminates. */
450 sqh->qh.qh_link = EHCI_NULL;
453 /* Otherwise the next QH has half the poll interval */
455 sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
456 sqh->qh.qh_link = htole32(sqh->next->physaddr |
459 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
460 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
461 sqh->qh.qh_curqtd = EHCI_NULL;
462 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
463 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
464 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
466 /* Point the frame list at the last level (128ms). */
467 for (i = 0; i < sc->sc_flsize; i++) {
468 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
469 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
473 /* Allocate dummy QH that starts the async list. */
474 sqh = ehci_alloc_sqh(sc);
481 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
483 htole32(sqh->physaddr | EHCI_LINK_QH);
484 sqh->qh.qh_curqtd = EHCI_NULL;
485 sqh->prev = sqh; /*It's a circular list.. */
487 /* Fill the overlay qTD */
488 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
489 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
490 sqh->qh.qh_qtd.qtd_status = htole32(0);
497 /* Point to async list */
498 sc->sc_async_head = sqh;
499 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
501 callout_init(&sc->sc_tmo_pcd, 0);
502 callout_init(&sc->sc_tmo_intrlist, 0);
504 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
506 /* Enable interrupts */
507 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
509 /* Turn on controller */
510 EOWRITE4(sc, EHCI_USBCMD,
511 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
512 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
517 /* Take over port ownership */
518 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
520 for (i = 0; i < 100; i++) {
521 usb_delay_ms(&sc->sc_bus, 1);
522 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
527 printf("%s: run timeout\n", device_get_nameunit(sc->sc_bus.bdev));
528 return (USBD_IOERROR);
531 return (USBD_NORMAL_COMPLETION);
535 ehci_free_sqh(sc, sc->sc_async_head);
538 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
545 ehci_softc_t *sc = v;
547 if (sc == NULL || sc->sc_dying)
550 /* If we get an interrupt while polling, then just ignore it. */
551 if (sc->sc_bus.use_polling) {
552 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
555 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
557 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
562 return (ehci_intr1(sc));
566 ehci_intr1(ehci_softc_t *sc)
568 u_int32_t intrs, eintrs;
570 DPRINTFN(20,("ehci_intr1: enter\n"));
572 /* In case the interrupt occurs before initialization has completed. */
575 printf("ehci_intr1: sc == NULL\n");
580 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
584 eintrs = intrs & sc->sc_eintrs;
585 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
586 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
591 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
592 sc->sc_bus.intr_context++;
593 sc->sc_bus.no_intrs++;
594 if (eintrs & EHCI_STS_IAA) {
595 DPRINTF(("ehci_intr1: door bell\n"));
596 wakeup(&sc->sc_async_head);
597 eintrs &= ~EHCI_STS_IAA;
599 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
600 DPRINTFN(5,("ehci_intr1: %s %s\n",
601 eintrs & EHCI_STS_INT ? "INT" : "",
602 eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
603 usb_schedsoftintr(&sc->sc_bus);
604 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
606 if (eintrs & EHCI_STS_HSE) {
607 printf("%s: unrecoverable error, controller halted\n",
608 device_get_nameunit(sc->sc_bus.bdev));
611 if (eintrs & EHCI_STS_PCD) {
612 ehci_pcd(sc, sc->sc_intrxfer);
614 * Disable PCD interrupt for now, because it will be
615 * on until the port has been reset.
617 ehci_pcd_able(sc, 0);
618 /* Do not allow RHSC interrupts > 1 per second */
619 callout_reset(&sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
620 eintrs &= ~EHCI_STS_PCD;
623 sc->sc_bus.intr_context--;
626 /* Block unprocessed interrupts. */
627 sc->sc_eintrs &= ~eintrs;
628 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
629 printf("%s: blocking intrs 0x%x\n",
630 device_get_nameunit(sc->sc_bus.bdev), eintrs);
637 ehci_pcd_able(ehci_softc_t *sc, int on)
639 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
641 sc->sc_eintrs |= EHCI_STS_PCD;
643 sc->sc_eintrs &= ~EHCI_STS_PCD;
644 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
648 ehci_pcd_enable(void *v_sc)
650 ehci_softc_t *sc = v_sc;
652 ehci_pcd_able(sc, 1);
656 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
658 usbd_pipe_handle pipe;
663 /* Just ignore the change. */
670 m = min(sc->sc_noport, xfer->length * 8 - 1);
671 memset(p, 0, xfer->length);
672 for (i = 1; i <= m; i++) {
673 /* Pick out CHANGE bits from the status reg. */
674 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
675 p[i/8] |= 1 << (i%8);
677 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
678 xfer->actlen = xfer->length;
679 xfer->status = USBD_NORMAL_COMPLETION;
681 usb_transfer_complete(xfer);
685 ehci_softintr(void *v)
687 ehci_softc_t *sc = v;
688 struct ehci_xfer *ex, *nextex;
690 DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
691 sc->sc_bus.intr_context));
693 sc->sc_bus.intr_context++;
696 * The only explanation I can think of for why EHCI is as brain dead
697 * as UHCI interrupt-wise is that Intel was involved in both.
698 * An interrupt just tells us that something is done, we have no
699 * clue what, so we need to scan through all active transfers. :-(
701 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
702 nextex = LIST_NEXT(ex, inext);
703 ehci_check_intr(sc, ex);
706 /* Schedule a callout to catch any dropped transactions. */
707 if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
708 !LIST_EMPTY(&sc->sc_intrhead))
709 callout_reset(&sc->sc_tmo_intrlist, hz / 5,
710 ehci_intrlist_timeout, sc);
712 #ifdef USB_USE_SOFTINTR
713 if (sc->sc_softwake) {
715 wakeup(&sc->sc_softwake);
717 #endif /* USB_USE_SOFTINTR */
719 sc->sc_bus.intr_context--;
722 /* Check for an interrupt. */
724 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
726 ehci_soft_qtd_t *sqtd, *lsqtd;
729 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
731 if (ex->sqtdstart == NULL) {
732 printf("ehci_check_intr: sqtdstart=NULL\n");
738 printf("ehci_check_intr: lsqtd==0\n");
743 * If the last TD is still active we need to check whether there
744 * is a an error somewhere in the middle, or whether there was a
745 * short packet (SPD and not ACTIVE).
747 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
748 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
749 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
750 status = le32toh(sqtd->qtd.qtd_status);
751 /* If there's an active QTD the xfer isn't done. */
752 if (status & EHCI_QTD_ACTIVE)
754 /* Any kind of error makes the xfer done. */
755 if (status & EHCI_QTD_HALTED)
757 /* We want short packets, and it is short: it's done */
758 if (EHCI_QTD_GET_BYTES(status) != 0)
761 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
766 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
767 callout_stop(&ex->xfer.timeout_handle);
768 usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
773 ehci_idone(struct ehci_xfer *ex)
775 usbd_xfer_handle xfer = &ex->xfer;
776 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
777 ehci_soft_qtd_t *sqtd, *lsqtd;
778 u_int32_t status = 0, nstatus = 0;
779 ehci_physaddr_t nextphys, altnextphys;
782 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
789 printf("ehci_idone: ex is done!\n ");
792 printf("ehci_idone: ex=%p is done!\n", ex);
801 if (xfer->status == USBD_CANCELLED ||
802 xfer->status == USBD_TIMEOUT) {
803 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
808 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
810 ehci_dump_sqtds(ex->sqtdstart);
814 * Make sure that the QH overlay qTD does not reference any
815 * of the qTDs we are about to free. This is probably only
816 * necessary if the transfer is marked as HALTED.
818 nextphys = EHCI_LINK_ADDR(le32toh(epipe->sqh->qh.qh_qtd.qtd_next));
820 EHCI_LINK_ADDR(le32toh(epipe->sqh->qh.qh_qtd.qtd_altnext));
821 for (sqtd = ex->sqtdstart; sqtd != ex->sqtdend->nextqtd;
822 sqtd = sqtd->nextqtd) {
823 if (sqtd->physaddr == nextphys) {
824 epipe->sqh->qh.qh_qtd.qtd_next =
825 htole32(ex->sqtdend->nextqtd->physaddr);
826 DPRINTFN(4, ("ehci_idone: updated overlay next ptr\n"));
829 if (sqtd->physaddr == altnextphys) {
831 ("ehci_idone: updated overlay altnext ptr\n"));
832 epipe->sqh->qh.qh_qtd.qtd_altnext =
833 htole32(ex->sqtdend->nextqtd->physaddr);
837 /* The transfer is done, compute actual length and status. */
840 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
841 nstatus = le32toh(sqtd->qtd.qtd_status);
842 if (nstatus & EHCI_QTD_ACTIVE)
846 /* halt is ok if descriptor is last, and complete */
847 if (sqtd == lsqtd && EHCI_QTD_GET_BYTES(status) == 0)
848 status &= ~EHCI_QTD_HALTED;
849 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
850 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
853 cerr = EHCI_QTD_GET_CERR(status);
854 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
855 "status=0x%x\n", xfer->length, actlen, cerr, status));
856 xfer->actlen = actlen;
857 if ((status & EHCI_QTD_HALTED) != 0) {
861 bitmask_snprintf((u_int32_t)status,
862 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
863 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
866 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
868 xfer->pipe->device->address,
869 xfer->pipe->endpoint->edesc->bEndpointAddress,
872 ehci_dump_sqh(epipe->sqh);
873 ehci_dump_sqtds(ex->sqtdstart);
876 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
877 xfer->status = USBD_STALLED;
879 xfer->status = USBD_IOERROR; /* more info XXX */
881 xfer->status = USBD_NORMAL_COMPLETION;
884 usb_transfer_complete(xfer);
885 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
889 * Wait here until controller claims to have an interrupt.
890 * Then call ehci_intr and return. Use timeout to avoid waiting
894 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
896 int timo = xfer->timeout;
900 xfer->status = USBD_IN_PROGRESS;
901 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
902 usb_delay_ms(&sc->sc_bus, 1);
905 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
907 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
914 if (xfer->status != USBD_IN_PROGRESS)
920 DPRINTF(("ehci_waitintr: timeout\n"));
921 xfer->status = USBD_TIMEOUT;
922 usb_transfer_complete(xfer);
923 /* XXX should free TD */
927 ehci_poll(struct usbd_bus *bus)
929 ehci_softc_t *sc = (ehci_softc_t *)bus;
933 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
935 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
940 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
945 ehci_detach(struct ehci_softc *sc, int flags)
951 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
952 (void) ehci_hcreset(sc);
953 callout_stop(&sc->sc_tmo_intrlist);
954 callout_stop(&sc->sc_tmo_pcd);
956 #if defined(__NetBSD__) || defined(__OpenBSD__)
957 if (sc->sc_powerhook != NULL)
958 powerhook_disestablish(sc->sc_powerhook);
959 if (sc->sc_shutdownhook != NULL)
960 shutdownhook_disestablish(sc->sc_shutdownhook);
962 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
964 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
965 /* XXX free other data structures XXX */
971 * Handle suspend/resume.
973 * We need to switch to polling mode here, because this routine is
974 * called from an interrupt context. This is all right since we
975 * are almost suspended anyway.
978 ehci_power(int why, void *v)
980 ehci_softc_t *sc = v;
985 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
994 sc->sc_bus.use_polling++;
996 for (i = 1; i <= sc->sc_noport; i++) {
997 cmd = EOREAD4(sc, EHCI_PORTSC(i));
998 if ((cmd & EHCI_PS_PO) == 0 &&
999 (cmd & EHCI_PS_PE) == EHCI_PS_PE)
1000 EOWRITE4(sc, EHCI_PORTSC(i),
1001 cmd | EHCI_PS_SUSP);
1004 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
1006 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
1007 EOWRITE4(sc, EHCI_USBCMD, cmd);
1009 for (i = 0; i < 100; i++) {
1010 hcr = EOREAD4(sc, EHCI_USBSTS) &
1011 (EHCI_STS_ASS | EHCI_STS_PSS);
1015 usb_delay_ms(&sc->sc_bus, 1);
1018 printf("%s: reset timeout\n",
1019 device_get_nameunit(sc->sc_bus.bdev));
1022 cmd &= ~EHCI_CMD_RS;
1023 EOWRITE4(sc, EHCI_USBCMD, cmd);
1025 for (i = 0; i < 100; i++) {
1026 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1027 if (hcr == EHCI_STS_HCH)
1030 usb_delay_ms(&sc->sc_bus, 1);
1032 if (hcr != EHCI_STS_HCH) {
1033 printf("%s: config timeout\n",
1034 device_get_nameunit(sc->sc_bus.bdev));
1037 sc->sc_bus.use_polling--;
1041 sc->sc_bus.use_polling++;
1043 /* restore things in case the bios sucks */
1044 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
1045 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
1046 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
1047 sc->sc_async_head->physaddr | EHCI_LINK_QH);
1048 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1051 for (i = 1; i <= sc->sc_noport; i++) {
1052 cmd = EOREAD4(sc, EHCI_PORTSC(i));
1053 if ((cmd & EHCI_PS_PO) == 0 &&
1054 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
1055 EOWRITE4(sc, EHCI_PORTSC(i),
1062 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1064 for (i = 1; i <= sc->sc_noport; i++) {
1065 cmd = EOREAD4(sc, EHCI_PORTSC(i));
1066 if ((cmd & EHCI_PS_PO) == 0 &&
1067 (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
1068 EOWRITE4(sc, EHCI_PORTSC(i),
1069 cmd & ~EHCI_PS_FPR);
1073 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1075 for (i = 0; i < 100; i++) {
1076 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1077 if (hcr != EHCI_STS_HCH)
1080 usb_delay_ms(&sc->sc_bus, 1);
1082 if (hcr == EHCI_STS_HCH) {
1083 printf("%s: config timeout\n",
1084 device_get_nameunit(sc->sc_bus.bdev));
1087 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1089 sc->sc_bus.use_polling--;
1091 case PWR_SOFTSUSPEND:
1092 case PWR_SOFTSTANDBY:
1093 case PWR_SOFTRESUME:
1099 DPRINTF(("ehci_power: sc=%p\n", sc));
1106 * Shut down the controller when the system is going down.
1109 ehci_shutdown(void *v)
1111 ehci_softc_t *sc = v;
1113 DPRINTF(("ehci_shutdown: stopping the HC\n"));
1114 (void) ehci_hcreset(sc);
1118 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1122 err = usb_allocmem(bus, size, 0, dma);
1125 printf("ehci_allocm: usb_allocmem()=%d\n", err);
1131 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1133 usb_freemem(bus, dma);
1137 ehci_allocx(struct usbd_bus *bus)
1139 struct ehci_softc *sc = (struct ehci_softc *)bus;
1140 usbd_xfer_handle xfer;
1142 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1144 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1146 if (xfer->busy_free != XFER_FREE) {
1147 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1152 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
1155 memset(xfer, 0, sizeof(struct ehci_xfer));
1156 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1158 EXFER(xfer)->ehci_xfer_flags = 0;
1160 EXFER(xfer)->isdone = 1;
1161 xfer->busy_free = XFER_BUSY;
1168 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1170 struct ehci_softc *sc = (struct ehci_softc *)bus;
1173 if (xfer->busy_free != XFER_BUSY) {
1174 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1178 xfer->busy_free = XFER_FREE;
1179 if (!EXFER(xfer)->isdone) {
1180 printf("ehci_freex: !isdone\n");
1184 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1188 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1190 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1192 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1193 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1196 usbd_dump_pipe(pipe);
1198 KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1199 htole32(EHCI_QTD_ACTIVE)) == 0,
1200 ("ehci_device_clear_toggle: queue active"));
1201 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1205 ehci_noop(usbd_pipe_handle pipe)
1211 ehci_dump_regs(ehci_softc_t *sc)
1214 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1215 EOREAD4(sc, EHCI_USBCMD),
1216 EOREAD4(sc, EHCI_USBSTS),
1217 EOREAD4(sc, EHCI_USBINTR));
1218 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1219 EOREAD4(sc, EHCI_FRINDEX),
1220 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1221 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1222 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1223 for (i = 1; i <= sc->sc_noport; i++)
1224 printf("port %d status=0x%08x\n", i,
1225 EOREAD4(sc, EHCI_PORTSC(i)));
1229 * Unused function - this is meant to be called from a kernel
1235 ehci_dump_regs(theehci);
1239 ehci_dump_link(ehci_link_t link, int type)
1241 link = le32toh(link);
1242 printf("0x%08x", link);
1243 if (link & EHCI_LINK_TERMINATE)
1248 switch (EHCI_LINK_TYPE(link)) {
1249 case EHCI_LINK_ITD: printf("ITD"); break;
1250 case EHCI_LINK_QH: printf("QH"); break;
1251 case EHCI_LINK_SITD: printf("SITD"); break;
1252 case EHCI_LINK_FSTN: printf("FSTN"); break;
1260 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1266 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1267 ehci_dump_sqtd(sqtd);
1268 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1271 printf("dump aborted, too many TDs\n");
1275 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1277 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1278 ehci_dump_qtd(&sqtd->qtd);
1282 ehci_dump_qtd(ehci_qtd_t *qtd)
1287 printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1288 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1290 s = le32toh(qtd->qtd_status);
1291 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1292 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1293 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1294 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1295 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1296 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1297 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1298 EHCI_QTD_GET_PID(s), sbuf);
1299 for (s = 0; s < 5; s++)
1300 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1304 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1306 ehci_qh_t *qh = &sqh->qh;
1307 u_int32_t endp, endphub;
1309 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1310 printf(" sqtd=%p inactivesqtd=%p\n", sqh->sqtd, sqh->inactivesqtd);
1311 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1312 endp = le32toh(qh->qh_endp);
1313 printf(" endp=0x%08x\n", endp);
1314 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1315 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1316 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1317 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1318 printf(" mpl=0x%x ctl=%d nrl=%d\n",
1319 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1320 EHCI_QH_GET_NRL(endp));
1321 endphub = le32toh(qh->qh_endphub);
1322 printf(" endphub=0x%08x\n", endphub);
1323 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1324 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1325 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1326 EHCI_QH_GET_MULT(endphub));
1327 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1328 printf("Overlay qTD:\n");
1329 ehci_dump_qtd(&qh->qh_qtd);
1334 ehci_dump_exfer(struct ehci_xfer *ex)
1336 printf("ehci_dump_exfer: ex=%p\n", ex);
1342 ehci_open(usbd_pipe_handle pipe)
1344 usbd_device_handle dev = pipe->device;
1345 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1346 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1347 u_int8_t addr = dev->address;
1348 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1349 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1350 ehci_soft_qh_t *sqh;
1353 int ival, speed, naks;
1354 int hshubaddr, hshubport;
1356 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1357 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1359 if (dev->myhsport) {
1360 hshubaddr = dev->myhsport->parent->address;
1361 hshubport = dev->myhsport->portno;
1368 return (USBD_IOERROR);
1370 if (addr == sc->sc_addr) {
1371 switch (ed->bEndpointAddress) {
1372 case USB_CONTROL_ENDPOINT:
1373 pipe->methods = &ehci_root_ctrl_methods;
1375 case UE_DIR_IN | EHCI_INTR_ENDPT:
1376 pipe->methods = &ehci_root_intr_methods;
1379 return (USBD_INVAL);
1381 return (USBD_NORMAL_COMPLETION);
1384 /* XXX All this stuff is only valid for async. */
1385 switch (dev->speed) {
1386 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1387 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1388 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1389 default: panic("ehci_open: bad device speed %d", dev->speed);
1391 if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1392 printf("%s: *** WARNING: opening low/full speed device, this "
1393 "does not work yet.\n",
1394 device_get_nameunit(sc->sc_bus.bdev));
1395 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1396 hshubaddr, hshubport));
1401 sqh = ehci_alloc_sqh(sc);
1404 /* qh_link filled when the QH is added */
1405 sqh->qh.qh_endp = htole32(
1406 EHCI_QH_SET_ADDR(addr) |
1407 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1408 EHCI_QH_SET_EPS(speed) |
1409 (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1410 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1411 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1413 EHCI_QH_SET_NRL(naks)
1415 sqh->qh.qh_endphub = htole32(
1416 EHCI_QH_SET_MULT(1) |
1417 EHCI_QH_SET_HUBA(hshubaddr) |
1418 EHCI_QH_SET_PORT(hshubport) |
1419 EHCI_QH_SET_CMASK(0x1c) |
1420 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1422 sqh->qh.qh_curqtd = EHCI_NULL;
1423 /* The overlay qTD was already set up by ehci_alloc_sqh(). */
1424 sqh->qh.qh_qtd.qtd_status =
1425 htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1431 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1432 0, &epipe->u.ctl.reqdma);
1435 printf("ehci_open: usb_allocmem()=%d\n", err);
1439 pipe->methods = &ehci_device_ctrl_methods;
1441 ehci_add_qh(sqh, sc->sc_async_head);
1445 pipe->methods = &ehci_device_bulk_methods;
1447 ehci_add_qh(sqh, sc->sc_async_head);
1451 pipe->methods = &ehci_device_intr_methods;
1452 ival = pipe->interval;
1453 if (ival == USBD_DEFAULT_INTERVAL)
1454 ival = ed->bInterval;
1455 return (ehci_device_setintr(sc, sqh, ival));
1456 case UE_ISOCHRONOUS:
1457 pipe->methods = &ehci_device_isoc_methods;
1458 return (USBD_INVAL);
1460 return (USBD_INVAL);
1462 return (USBD_NORMAL_COMPLETION);
1465 ehci_free_sqh(sc, sqh);
1467 return (USBD_NOMEM);
1471 * Add an ED to the schedule. Called at splusb().
1472 * If in the async schedule, it will always have a next.
1473 * If in the intr schedule it may not.
1476 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1480 sqh->next = head->next;
1482 sqh->qh.qh_link = head->qh.qh_link;
1485 sqh->next->prev = sqh;
1486 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1489 if (ehcidebug > 5) {
1490 printf("ehci_add_qh:\n");
1497 * Remove an ED from the schedule. Called at splusb().
1498 * Will always have a 'next' if it's in the async list as it's circular.
1501 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1505 sqh->prev->qh.qh_link = sqh->qh.qh_link;
1506 sqh->prev->next = sqh->next;
1508 sqh->next->prev = sqh->prev;
1512 /* Restart a QH following the addition of a qTD. */
1514 ehci_activate_qh(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1516 KASSERT((sqtd->qtd.qtd_status & htole32(EHCI_QTD_ACTIVE)) == 0,
1517 ("ehci_activate_qh: already active"));
1520 * When a QH is idle, the overlay qTD should be marked as not
1521 * halted and not active. This causes the host controller to
1522 * retrieve the real qTD on each pass (rather than just examinig
1523 * the overlay), so it will notice when we activate the qTD.
1525 if (sqtd == sqh->sqtd) {
1526 /* Check that the hardware is in the state we expect. */
1527 if (EHCI_LINK_ADDR(le32toh(sqh->qh.qh_qtd.qtd_next)) !=
1530 printf("ehci_activate_qh: unexpected next ptr\n");
1532 ehci_dump_sqtds(sqh->sqtd);
1534 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1535 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1537 /* Ensure the flags are correct. */
1538 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_PINGSTATE |
1539 EHCI_QTD_TOGGLE_MASK);
1542 /* Now activate the qTD. */
1543 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_ACTIVE);
1547 * Ensure that the HC has released all references to the QH. We do this
1548 * by asking for a Async Advance Doorbell interrupt and then we wait for
1550 * To make this easier we first obtain exclusive use of the doorbell.
1553 ehci_sync_hc(ehci_softc_t *sc)
1558 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1561 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1563 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL, NULL);
1565 /* ask for doorbell */
1566 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1567 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1568 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1569 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1570 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1571 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1573 /* release doorbell */
1574 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL, NULL);
1577 printf("ehci_sync_hc: tsleep() = %d\n", error);
1579 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1585 * Data structures and routines to emulate the root hub.
1587 static usb_device_descriptor_t ehci_devd = {
1588 USB_DEVICE_DESCRIPTOR_SIZE,
1589 UDESC_DEVICE, /* type */
1590 {0x00, 0x02}, /* USB version */
1591 UDCLASS_HUB, /* class */
1592 UDSUBCLASS_HUB, /* subclass */
1593 UDPROTO_HSHUBSTT, /* protocol */
1594 64, /* max packet */
1595 {0},{0},{0x00,0x01}, /* device id */
1596 1,2,0, /* string indicies */
1597 1 /* # of configurations */
1600 static usb_device_qualifier_t ehci_odevd = {
1601 USB_DEVICE_DESCRIPTOR_SIZE,
1602 UDESC_DEVICE_QUALIFIER, /* type */
1603 {0x00, 0x02}, /* USB version */
1604 UDCLASS_HUB, /* class */
1605 UDSUBCLASS_HUB, /* subclass */
1606 UDPROTO_FSHUB, /* protocol */
1607 64, /* max packet */
1608 1, /* # of configurations */
1612 static usb_config_descriptor_t ehci_confd = {
1613 USB_CONFIG_DESCRIPTOR_SIZE,
1615 {USB_CONFIG_DESCRIPTOR_SIZE +
1616 USB_INTERFACE_DESCRIPTOR_SIZE +
1617 USB_ENDPOINT_DESCRIPTOR_SIZE},
1625 static usb_interface_descriptor_t ehci_ifcd = {
1626 USB_INTERFACE_DESCRIPTOR_SIZE,
1637 static usb_endpoint_descriptor_t ehci_endpd = {
1638 USB_ENDPOINT_DESCRIPTOR_SIZE,
1640 UE_DIR_IN | EHCI_INTR_ENDPT,
1642 {8, 0}, /* max packet */
1646 static usb_hub_descriptor_t ehci_hubd = {
1647 USB_HUB_DESCRIPTOR_SIZE,
1657 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1663 p->bLength = 2 * strlen(s) + 2;
1666 p->bDescriptorType = UDESC_STRING;
1668 for (i = 0; s[i] && l > 1; i++, l -= 2)
1669 USETW2(p->bString[i], 0, s[i]);
1674 * Simulate a hardware hub by handling all the necessary requests.
1677 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1681 /* Insert last in queue. */
1682 err = usb_insert_transfer(xfer);
1686 /* Pipe isn't running, start first */
1687 return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1691 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1693 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1694 usb_device_request_t *req;
1697 int s, len, value, index, l, totlen = 0;
1698 usb_port_status_t ps;
1699 usb_hub_descriptor_t hubd;
1704 return (USBD_IOERROR);
1707 if (!(xfer->rqflags & URQ_REQUEST))
1709 return (USBD_INVAL);
1711 req = &xfer->request;
1713 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1714 req->bmRequestType, req->bRequest));
1716 len = UGETW(req->wLength);
1717 value = UGETW(req->wValue);
1718 index = UGETW(req->wIndex);
1723 #define C(x,y) ((x) | ((y) << 8))
1724 switch(C(req->bRequest, req->bmRequestType)) {
1725 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1726 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1727 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1729 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1730 * for the integrated root hub.
1733 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1735 *(u_int8_t *)buf = sc->sc_conf;
1739 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1740 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1741 switch(value >> 8) {
1743 if ((value & 0xff) != 0) {
1747 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1748 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1749 memcpy(buf, &ehci_devd, l);
1752 * We can't really operate at another speed, but the spec says
1753 * we need this descriptor.
1755 case UDESC_DEVICE_QUALIFIER:
1756 if ((value & 0xff) != 0) {
1760 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1761 memcpy(buf, &ehci_odevd, l);
1764 * We can't really operate at another speed, but the spec says
1765 * we need this descriptor.
1767 case UDESC_OTHER_SPEED_CONFIGURATION:
1769 if ((value & 0xff) != 0) {
1773 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1774 memcpy(buf, &ehci_confd, l);
1775 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1777 buf = (char *)buf + l;
1779 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1781 memcpy(buf, &ehci_ifcd, l);
1782 buf = (char *)buf + l;
1784 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1786 memcpy(buf, &ehci_endpd, l);
1791 *(u_int8_t *)buf = 0;
1793 switch (value & 0xff) {
1794 case 0: /* Language table */
1795 totlen = ehci_str(buf, len, "\001");
1797 case 1: /* Vendor */
1798 totlen = ehci_str(buf, len, sc->sc_vendor);
1800 case 2: /* Product */
1801 totlen = ehci_str(buf, len, "EHCI root hub");
1810 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1812 *(u_int8_t *)buf = 0;
1816 case C(UR_GET_STATUS, UT_READ_DEVICE):
1818 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1822 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1823 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1825 USETW(((usb_status_t *)buf)->wStatus, 0);
1829 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1830 if (value >= USB_MAX_DEVICES) {
1834 sc->sc_addr = value;
1836 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1837 if (value != 0 && value != 1) {
1841 sc->sc_conf = value;
1843 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1845 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1846 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1847 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1850 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1852 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1855 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1857 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1858 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1859 "port=%d feature=%d\n",
1861 if (index < 1 || index > sc->sc_noport) {
1865 port = EHCI_PORTSC(index);
1866 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1868 case UHF_PORT_ENABLE:
1869 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1871 case UHF_PORT_SUSPEND:
1872 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1874 case UHF_PORT_POWER:
1875 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1878 DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1881 case UHF_PORT_INDICATOR:
1882 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1884 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1886 case UHF_C_PORT_CONNECTION:
1887 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1889 case UHF_C_PORT_ENABLE:
1890 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1892 case UHF_C_PORT_SUSPEND:
1895 case UHF_C_PORT_OVER_CURRENT:
1896 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1898 case UHF_C_PORT_RESET:
1907 case UHF_C_PORT_CONNECTION:
1908 case UHF_C_PORT_ENABLE:
1909 case UHF_C_PORT_SUSPEND:
1910 case UHF_C_PORT_OVER_CURRENT:
1911 case UHF_C_PORT_RESET:
1912 /* Enable RHSC interrupt if condition is cleared. */
1913 if ((OREAD4(sc, port) >> 16) == 0)
1914 ehci_pcd_able(sc, 1);
1921 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1922 if ((value & 0xff) != 0) {
1927 hubd.bNbrPorts = sc->sc_noport;
1928 v = EOREAD4(sc, EHCI_HCSPARAMS);
1929 USETW(hubd.wHubCharacteristics,
1930 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1931 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1932 ? UHD_PORT_IND : 0);
1933 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1934 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1935 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1936 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1937 l = min(len, hubd.bDescLength);
1939 memcpy(buf, &hubd, l);
1941 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1946 memset(buf, 0, len); /* ? XXX */
1949 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1950 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1952 if (index < 1 || index > sc->sc_noport) {
1960 v = EOREAD4(sc, EHCI_PORTSC(index));
1961 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
1964 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1965 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1966 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1967 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1968 if (v & EHCI_PS_PR) i |= UPS_RESET;
1969 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1970 USETW(ps.wPortStatus, i);
1972 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1973 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1974 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1975 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1976 USETW(ps.wPortChange, i);
1977 l = min(len, sizeof ps);
1978 memcpy(buf, &ps, l);
1981 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1984 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1986 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1987 if (index < 1 || index > sc->sc_noport) {
1991 port = EHCI_PORTSC(index);
1992 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1994 case UHF_PORT_ENABLE:
1995 EOWRITE4(sc, port, v | EHCI_PS_PE);
1997 case UHF_PORT_SUSPEND:
1998 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
2000 case UHF_PORT_RESET:
2001 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
2003 if (EHCI_PS_IS_LOWSPEED(v)) {
2004 /* Low speed device, give up ownership. */
2005 ehci_disown(sc, index, 1);
2008 /* Start reset sequence. */
2009 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
2010 EOWRITE4(sc, port, v | EHCI_PS_PR);
2011 /* Wait for reset to complete. */
2012 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
2017 /* Terminate reset sequence. */
2018 EOWRITE4(sc, port, v);
2019 /* Wait for HC to complete reset. */
2020 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
2025 v = EOREAD4(sc, port);
2026 DPRINTF(("ehci after reset, status=0x%08x\n", v));
2027 if (v & EHCI_PS_PR) {
2028 printf("%s: port reset timeout\n",
2029 device_get_nameunit(sc->sc_bus.bdev));
2030 return (USBD_TIMEOUT);
2032 if (!(v & EHCI_PS_PE)) {
2033 /* Not a high speed device, give up ownership.*/
2034 ehci_disown(sc, index, 0);
2038 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
2041 case UHF_PORT_POWER:
2042 DPRINTFN(2,("ehci_root_ctrl_start: set port power "
2044 EOWRITE4(sc, port, v | EHCI_PS_PP);
2047 DPRINTFN(2,("ehci_root_ctrl_start: set port test "
2050 case UHF_PORT_INDICATOR:
2051 DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
2053 EOWRITE4(sc, port, v | EHCI_PS_PIC);
2060 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
2061 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
2062 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
2063 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
2069 xfer->actlen = totlen;
2070 err = USBD_NORMAL_COMPLETION;
2074 usb_transfer_complete(xfer);
2076 return (USBD_IN_PROGRESS);
2080 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
2085 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
2087 if (sc->sc_npcomp != 0) {
2088 int i = (index-1) / sc->sc_npcomp;
2089 if (i >= sc->sc_ncomp)
2090 printf("%s: strange port\n",
2091 device_get_nameunit(sc->sc_bus.bdev));
2093 printf("%s: handing over %s speed device on "
2095 device_get_nameunit(sc->sc_bus.bdev),
2096 lowspeed ? "low" : "full",
2097 index, device_get_nameunit(sc->sc_comps[i]->bdev));
2099 printf("%s: npcomp == 0\n", device_get_nameunit(sc->sc_bus.bdev));
2102 port = EHCI_PORTSC(index);
2103 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2104 EOWRITE4(sc, port, v | EHCI_PS_PO);
2107 /* Abort a root control request. */
2109 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
2111 /* Nothing to do, all transfers are synchronous. */
2114 /* Close the root pipe. */
2116 ehci_root_ctrl_close(usbd_pipe_handle pipe)
2118 DPRINTF(("ehci_root_ctrl_close\n"));
2119 /* Nothing to do. */
2123 ehci_root_intr_done(usbd_xfer_handle xfer)
2128 ehci_root_intr_transfer(usbd_xfer_handle xfer)
2132 /* Insert last in queue. */
2133 err = usb_insert_transfer(xfer);
2137 /* Pipe isn't running, start first */
2138 return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2142 ehci_root_intr_start(usbd_xfer_handle xfer)
2144 usbd_pipe_handle pipe = xfer->pipe;
2145 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2148 return (USBD_IOERROR);
2150 sc->sc_intrxfer = xfer;
2152 return (USBD_IN_PROGRESS);
2155 /* Abort a root interrupt request. */
2157 ehci_root_intr_abort(usbd_xfer_handle xfer)
2161 if (xfer->pipe->intrxfer == xfer) {
2162 DPRINTF(("ehci_root_intr_abort: remove\n"));
2163 xfer->pipe->intrxfer = NULL;
2165 xfer->status = USBD_CANCELLED;
2167 usb_transfer_complete(xfer);
2171 /* Close the root pipe. */
2173 ehci_root_intr_close(usbd_pipe_handle pipe)
2175 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2177 DPRINTF(("ehci_root_intr_close\n"));
2179 sc->sc_intrxfer = NULL;
2183 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2187 /************************/
2190 ehci_alloc_sqh(ehci_softc_t *sc)
2192 ehci_soft_qh_t *sqh;
2193 ehci_soft_qtd_t *sqtd;
2198 if (sc->sc_freeqhs == NULL) {
2199 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2200 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2201 EHCI_PAGE_SIZE, &dma);
2204 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2208 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2209 offs = i * EHCI_SQH_SIZE;
2210 sqh = KERNADDR(&dma, offs);
2211 sqh->physaddr = DMAADDR(&dma, offs);
2212 sqh->next = sc->sc_freeqhs;
2213 sc->sc_freeqhs = sqh;
2216 /* Allocate the initial inactive sqtd. */
2217 sqtd = ehci_alloc_sqtd(sc);
2220 sqtd->qtd.qtd_status = htole32(0);
2221 sqtd->qtd.qtd_next = EHCI_NULL;
2222 sqtd->qtd.qtd_altnext = EHCI_NULL;
2224 sqh = sc->sc_freeqhs;
2225 sc->sc_freeqhs = sqh->next;
2227 /* The overlay QTD should begin zeroed. */
2228 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
2229 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
2230 sqh->qh.qh_qtd.qtd_status = 0;
2231 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
2232 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
2233 sqh->qh.qh_qtd.qtd_buffer_hi[i] = 0;
2238 sqh->inactivesqtd = sqtd;
2243 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2245 ehci_free_sqtd(sc, sqh->inactivesqtd);
2246 sqh->next = sc->sc_freeqhs;
2247 sc->sc_freeqhs = sqh;
2251 ehci_alloc_sqtd(ehci_softc_t *sc)
2253 ehci_soft_qtd_t *sqtd;
2259 if (sc->sc_freeqtds == NULL) {
2260 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2261 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2262 EHCI_PAGE_SIZE, &dma);
2265 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2270 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2271 offs = i * EHCI_SQTD_SIZE;
2272 sqtd = KERNADDR(&dma, offs);
2273 sqtd->physaddr = DMAADDR(&dma, offs);
2274 sqtd->nextqtd = sc->sc_freeqtds;
2275 sc->sc_freeqtds = sqtd;
2281 sqtd = sc->sc_freeqtds;
2282 sc->sc_freeqtds = sqtd->nextqtd;
2283 sqtd->qtd.qtd_next = EHCI_NULL;
2284 sqtd->qtd.qtd_altnext = EHCI_NULL;
2285 sqtd->qtd.qtd_status = 0;
2286 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
2287 sqtd->qtd.qtd_buffer[i] = 0;
2288 sqtd->qtd.qtd_buffer_hi[i] = 0;
2290 sqtd->nextqtd = NULL;
2298 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2303 sqtd->nextqtd = sc->sc_freeqtds;
2304 sc->sc_freeqtds = sqtd;
2309 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2310 int alen, int rd, usbd_xfer_handle xfer, ehci_soft_qtd_t *start,
2311 ehci_soft_qtd_t *newinactive, ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2313 ehci_soft_qtd_t *next, *cur;
2314 ehci_physaddr_t dataphys, nextphys;
2315 u_int32_t qtdstatus;
2316 int adj, len, curlen, mps, offset, pagelen, seg, segoff;
2317 int i, iscontrol, forceshort;
2318 struct usb_dma_mapping *dma = &xfer->dmamap;
2320 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2324 iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2326 qtdstatus = EHCI_QTD_ACTIVE |
2327 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2328 EHCI_QTD_SET_CERR(3)
2330 /* BYTES set below */
2332 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2333 forceshort = ((xfer->flags & USBD_FORCE_SHORT_XFER) || len == 0) &&
2336 * The control transfer data stage always starts with a toggle of 1.
2337 * For other transfers we let the hardware track the toggle state.
2340 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2342 if (start != NULL) {
2344 * If we are given a starting qTD, assume it is linked into
2345 * an active QH so be careful not to mark it active.
2349 qtdstatus &= ~EHCI_QTD_ACTIVE;
2351 cur = ehci_alloc_sqtd(sc);
2361 /* The EHCI hardware can handle at most 5 pages. */
2362 for (i = 0; i < EHCI_QTD_NBUFFERS && curlen < len; i++) {
2363 KASSERT(seg < dma->nsegs,
2364 ("ehci_alloc_sqtd_chain: overrun"));
2365 dataphys = dma->segs[seg].ds_addr + segoff;
2366 pagelen = dma->segs[seg].ds_len - segoff;
2367 if (pagelen > len - curlen)
2368 pagelen = len - curlen;
2369 if (pagelen > EHCI_PAGE_SIZE -
2370 EHCI_PAGE_OFFSET(dataphys))
2371 pagelen = EHCI_PAGE_SIZE -
2372 EHCI_PAGE_OFFSET(dataphys);
2374 if (segoff >= dma->segs[seg].ds_len) {
2375 KASSERT(segoff == dma->segs[seg].ds_len,
2376 ("ehci_alloc_sqtd_chain: overlap"));
2381 cur->qtd.qtd_buffer[i] = htole32(dataphys);
2382 cur->qtd.qtd_buffer_hi[i] = 0;
2386 * Must stop if there is any gap before or after
2387 * the page boundary.
2389 if (EHCI_PAGE_OFFSET(dataphys + pagelen) != 0)
2391 if (seg < dma->nsegs && EHCI_PAGE_OFFSET(segoff +
2392 dma->segs[seg].ds_addr) != 0)
2395 /* Adjust down to a multiple of mps if not at the end. */
2396 if (curlen < len && curlen % mps != 0) {
2400 ("ehci_alloc_sqtd_chain: need to copy"));
2404 segoff += dma->segs[seg].ds_len;
2406 KASSERT(seg >= 0 && segoff >= 0,
2407 ("ehci_alloc_sqtd_chain: adjust to mps"));
2412 if (len != 0 || forceshort) {
2413 next = ehci_alloc_sqtd(sc);
2416 nextphys = htole32(next->physaddr);
2419 nextphys = EHCI_NULL;
2422 cur->nextqtd = next;
2423 cur->qtd.qtd_next = nextphys;
2424 /* Make sure to stop after a short transfer. */
2425 cur->qtd.qtd_altnext = htole32(newinactive->physaddr);
2426 cur->qtd.qtd_status =
2427 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2430 DPRINTFN(10,("ehci_alloc_sqtd_chain: curlen=%d\n", curlen));
2433 * adjust the toggle based on the number of packets
2436 if ((((curlen + mps - 1) / mps) & 1) || curlen == 0)
2437 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2439 qtdstatus |= EHCI_QTD_ACTIVE;
2445 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2449 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2452 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2455 return (USBD_NORMAL_COMPLETION);
2458 /* XXX free chain */
2459 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2460 return (USBD_NOMEM);
2463 /* Free the chain starting at sqtd and end at the qTD before sqtdend */
2465 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qh_t *sqh,
2466 ehci_soft_qtd_t *sqtd, ehci_soft_qtd_t *sqtdend)
2468 ehci_soft_qtd_t *p, **prevp;
2471 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2474 /* First unlink the chain from the QH's software qTD list. */
2476 for (p = sqh->sqtd; p != NULL; p = p->nextqtd) {
2481 prevp = &p->nextqtd;
2483 KASSERT(p != NULL, ("ehci_free_sqtd_chain: chain not found"));
2484 for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2486 ehci_free_sqtd(sc, sqtd);
2493 * Close a reqular pipe.
2494 * Assumes that there are no pending transactions.
2497 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2499 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2500 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2501 ehci_soft_qh_t *sqh = epipe->sqh;
2505 ehci_rem_qh(sc, sqh, head);
2507 pipe->endpoint->savedtoggle =
2508 EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2509 ehci_free_sqh(sc, epipe->sqh);
2513 * Abort a device request.
2514 * If this routine is called at splusb() it guarantees that the request
2515 * will be removed from the hardware scheduling and that the callback
2516 * for it will be called with USBD_CANCELLED status.
2517 * It's impossible to guarantee that the requested transfer will not
2518 * have happened since the hardware runs concurrently.
2519 * If the transaction has already happened we rely on the ordinary
2520 * interrupt processing to process it.
2523 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2525 #define exfer EXFER(xfer)
2526 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2527 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2528 ehci_soft_qh_t *sqh = epipe->sqh;
2529 ehci_soft_qtd_t *sqtd, *snext;
2530 ehci_physaddr_t cur, us, next;
2533 /* int count = 0; */
2534 ehci_soft_qh_t *psqh;
2536 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2539 /* If we're dying, just do the software part. */
2541 xfer->status = status; /* make software ignore it */
2542 callout_stop(&xfer->timeout_handle);
2543 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2544 usb_transfer_complete(xfer);
2549 if (xfer->device->bus->intr_context || !curproc)
2550 panic("ehci_abort_xfer: not in process context");
2553 * If an abort is already in progress then just wait for it to
2554 * complete and return.
2556 if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2557 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2558 /* No need to wait if we're aborting from a timeout. */
2559 if (status == USBD_TIMEOUT)
2561 /* Override the status which might be USBD_TIMEOUT. */
2562 xfer->status = status;
2563 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2564 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2565 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2566 tsleep(&exfer->ehci_xfer_flags, PZERO, "ehciaw", 0);
2571 * Step 1: Make interrupt routine and timeouts ignore xfer.
2574 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2575 xfer->status = status; /* make software ignore it */
2576 callout_stop(&xfer->timeout_handle);
2577 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2581 * Step 2: Wait until we know hardware has finished any possible
2582 * use of the xfer. We do this by removing the entire
2583 * queue from the async schedule and waiting for the doorbell.
2584 * Nothing else should be touching the queue now.
2587 ehci_rem_qh(sc, sqh, psqh);
2590 * Step 3: make sure the soft interrupt routine
2591 * has run. This should remove any completed items off the queue.
2592 * The hardware has no reference to completed items (TDs).
2593 * It's safe to remove them at any time.
2596 #ifdef USB_USE_SOFTINTR
2597 sc->sc_softwake = 1;
2598 #endif /* USB_USE_SOFTINTR */
2599 usb_schedsoftintr(&sc->sc_bus);
2600 #ifdef USB_USE_SOFTINTR
2601 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
2602 #endif /* USB_USE_SOFTINTR */
2605 * Step 4: Remove any vestiges of the xfer from the hardware.
2606 * The complication here is that the hardware may have executed
2607 * into or even beyond the xfer we're trying to abort.
2608 * So as we're scanning the TDs of this xfer we check if
2609 * the hardware points to any of them.
2611 * first we need to see if there are any transfers
2612 * on this queue before the xfer we are aborting.. we need
2613 * to update any pointers that point to us to point past
2614 * the aborting xfer. (If there is something past us).
2615 * Hardware and software.
2617 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2620 /* If they initially point here. */
2621 us = exfer->sqtdstart->physaddr;
2623 /* We will change them to point here */
2624 snext = exfer->sqtdend->nextqtd;
2625 next = htole32(snext->physaddr);
2628 * Now loop through any qTDs before us and keep track of the pointer
2629 * that points to us for the end.
2632 while (sqtd && sqtd != exfer->sqtdstart) {
2633 hit |= (cur == sqtd->physaddr);
2634 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2635 sqtd->qtd.qtd_next = next;
2636 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2637 sqtd->qtd.qtd_altnext = next;
2638 sqtd = sqtd->nextqtd;
2642 * If we already saw the active one then we are pretty much done.
2643 * We've done all the relinking we need to do.
2648 * Now reinitialise the QH to point to the next qTD
2649 * (if there is one). We only need to do this if
2650 * it was previously pointing to us.
2652 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2653 if (cur == sqtd->physaddr) {
2656 if (sqtd == exfer->sqtdend)
2659 sqtd = sqtd->nextqtd;
2661 * Only need to alter the QH if it was pointing at a qTD
2662 * that we are removing.
2665 sqh->qh.qh_qtd.qtd_next = htole32(snext->physaddr);
2666 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
2667 sqh->qh.qh_qtd.qtd_status &=
2668 htole32(EHCI_QTD_TOGGLE_MASK);
2669 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
2670 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
2671 sqh->qh.qh_qtd.qtd_buffer_hi[i] = 0;
2675 ehci_add_qh(sqh, psqh);
2677 * Step 5: Execute callback.
2682 /* Do the wakeup first to avoid touching the xfer after the callback. */
2683 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2684 if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2685 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2686 wakeup(&exfer->ehci_xfer_flags);
2688 usb_transfer_complete(xfer);
2690 /* printf("%s: %d TDs aborted\n", __func__, count); */
2696 ehci_timeout(void *addr)
2698 struct ehci_xfer *exfer = addr;
2699 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2700 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2702 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2705 usbd_dump_pipe(exfer->xfer.pipe);
2709 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2713 /* Execute the abort in a process context. */
2714 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2719 ehci_timeout_task(void *addr)
2721 usbd_xfer_handle xfer = addr;
2724 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2727 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2732 * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
2733 * back the qTD status, or miss signalling occasionally under heavy load.
2734 * If the host machine is too fast, we can miss transaction completion - when
2735 * we scan the active list the transaction still seems to be active. This
2736 * generally exhibits itself as a umass stall that never recovers.
2738 * We work around this behaviour by setting up this callback after any softintr
2739 * that completes with transactions still pending, giving us another chance to
2740 * check for completion after the writeback has taken place.
2743 ehci_intrlist_timeout(void *arg)
2745 ehci_softc_t *sc = arg;
2748 DPRINTFN(3, ("ehci_intrlist_timeout\n"));
2749 usb_schedsoftintr(&sc->sc_bus);
2754 /************************/
2757 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2761 /* Insert last in queue. */
2762 err = usb_insert_transfer(xfer);
2766 /* Pipe isn't running, start first */
2767 return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2771 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2773 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2777 return (USBD_IOERROR);
2780 if (!(xfer->rqflags & URQ_REQUEST)) {
2782 printf("ehci_device_ctrl_transfer: not a request\n");
2783 return (USBD_INVAL);
2787 err = ehci_device_request(xfer);
2791 if (sc->sc_bus.use_polling)
2792 ehci_waitintr(sc, xfer);
2793 return (USBD_IN_PROGRESS);
2797 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2799 struct ehci_xfer *ex = EXFER(xfer);
2800 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2801 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2803 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2806 if (!(xfer->rqflags & URQ_REQUEST)) {
2807 panic("ehci_ctrl_done: not a request");
2811 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2812 ehci_del_intr_list(ex); /* remove from active list */
2813 ehci_free_sqtd_chain(sc, epipe->sqh, ex->sqtdstart,
2814 ex->sqtdend->nextqtd);
2817 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2820 /* Abort a device control request. */
2822 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2824 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2825 ehci_abort_xfer(xfer, USBD_CANCELLED);
2828 /* Close a device control pipe. */
2830 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2832 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2833 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2835 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2836 ehci_close_pipe(pipe, sc->sc_async_head);
2840 ehci_device_request(usbd_xfer_handle xfer)
2842 #define exfer EXFER(xfer)
2843 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2844 usb_device_request_t *req = &xfer->request;
2845 usbd_device_handle dev = epipe->pipe.device;
2846 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2847 ehci_soft_qtd_t *newinactive, *setup, *stat, *next;
2848 ehci_soft_qh_t *sqh;
2854 isread = req->bmRequestType & UT_READ;
2855 len = UGETW(req->wLength);
2857 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2858 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2859 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2860 UGETW(req->wIndex), len, dev->address,
2861 epipe->pipe.endpoint->edesc->bEndpointAddress));
2863 newinactive = ehci_alloc_sqtd(sc);
2864 if (newinactive == NULL) {
2868 newinactive->qtd.qtd_status = htole32(0);
2869 newinactive->qtd.qtd_next = EHCI_NULL;
2870 newinactive->qtd.qtd_altnext = EHCI_NULL;
2871 stat = ehci_alloc_sqtd(sc);
2878 setup = sqh->inactivesqtd;
2879 sqh->inactivesqtd = newinactive;
2880 epipe->u.ctl.length = len;
2882 /* Set up data transaction */
2884 ehci_soft_qtd_t *end;
2886 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2887 NULL, newinactive, &next, &end);
2890 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2891 end->nextqtd = stat;
2892 end->qtd.qtd_next = htole32(stat->physaddr);
2893 end->qtd.qtd_altnext = htole32(newinactive->physaddr);
2898 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2900 /* Clear toggle, and do not activate until complete */
2901 setup->qtd.qtd_status = htole32(
2902 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2903 EHCI_QTD_SET_CERR(3) |
2904 EHCI_QTD_SET_TOGGLE(0) |
2905 EHCI_QTD_SET_BYTES(sizeof *req)
2907 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2908 setup->qtd.qtd_buffer_hi[0] = 0;
2909 setup->nextqtd = next;
2910 setup->qtd.qtd_next = htole32(next->physaddr);
2911 setup->qtd.qtd_altnext = htole32(newinactive->physaddr);
2913 setup->len = sizeof *req;
2915 stat->qtd.qtd_status = htole32(
2917 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2918 EHCI_QTD_SET_CERR(3) |
2919 EHCI_QTD_SET_TOGGLE(1) |
2922 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2923 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2924 stat->nextqtd = newinactive;
2925 stat->qtd.qtd_next = htole32(newinactive->physaddr);
2926 stat->qtd.qtd_altnext = htole32(newinactive->physaddr);
2931 if (ehcidebug > 5) {
2932 DPRINTF(("ehci_device_request:\n"));
2934 ehci_dump_sqtds(setup);
2938 exfer->sqtdstart = setup;
2939 exfer->sqtdend = stat;
2941 if (!exfer->isdone) {
2942 printf("ehci_device_request: not done, exfer=%p\n", exfer);
2947 /* Activate the new qTD in the QH list. */
2949 ehci_activate_qh(sqh, setup);
2950 if (xfer->timeout && !sc->sc_bus.use_polling) {
2951 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2952 ehci_timeout, xfer);
2954 ehci_add_intr_list(sc, exfer);
2955 xfer->status = USBD_IN_PROGRESS;
2959 if (ehcidebug > 10) {
2960 DPRINTF(("ehci_device_request: status=%x\n",
2961 EOREAD4(sc, EHCI_USBSTS)));
2964 ehci_dump_sqh(sc->sc_async_head);
2966 ehci_dump_sqtds(setup);
2970 return (USBD_NORMAL_COMPLETION);
2973 sqh->inactivesqtd = setup;
2974 ehci_free_sqtd(sc, stat);
2976 ehci_free_sqtd(sc, newinactive);
2978 DPRINTFN(-1,("ehci_device_request: no memory\n"));
2980 usb_transfer_complete(xfer);
2985 /************************/
2988 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2992 /* Insert last in queue. */
2993 err = usb_insert_transfer(xfer);
2997 /* Pipe isn't running, start first */
2998 return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
3002 ehci_device_bulk_start(usbd_xfer_handle xfer)
3004 #define exfer EXFER(xfer)
3005 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3006 usbd_device_handle dev = epipe->pipe.device;
3007 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3008 ehci_soft_qtd_t *data, *dataend, *newinactive;
3009 ehci_soft_qh_t *sqh;
3011 int len, isread, endpt;
3014 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
3015 xfer, xfer->length, xfer->flags));
3018 return (USBD_IOERROR);
3021 if (xfer->rqflags & URQ_REQUEST)
3022 panic("ehci_device_bulk_start: a request");
3026 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3027 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3030 epipe->u.bulk.length = len;
3032 newinactive = ehci_alloc_sqtd(sc);
3033 if (newinactive == NULL) {
3034 DPRINTFN(-1,("ehci_device_bulk_start: no sqtd memory\n"));
3037 usb_transfer_complete(xfer);
3040 newinactive->qtd.qtd_status = htole32(0);
3041 newinactive->qtd.qtd_next = EHCI_NULL;
3042 newinactive->qtd.qtd_altnext = EHCI_NULL;
3043 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3044 sqh->inactivesqtd, newinactive, &data, &dataend);
3046 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
3047 ehci_free_sqtd(sc, newinactive);
3049 usb_transfer_complete(xfer);
3052 dataend->nextqtd = newinactive;
3053 dataend->qtd.qtd_next = htole32(newinactive->physaddr);
3054 dataend->qtd.qtd_altnext = htole32(newinactive->physaddr);
3055 sqh->inactivesqtd = newinactive;
3058 if (ehcidebug > 5) {
3059 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
3061 ehci_dump_sqtds(data);
3065 /* Set up interrupt info. */
3066 exfer->sqtdstart = data;
3067 exfer->sqtdend = dataend;
3069 if (!exfer->isdone) {
3070 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
3076 ehci_activate_qh(sqh, data);
3077 if (xfer->timeout && !sc->sc_bus.use_polling) {
3078 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3079 ehci_timeout, xfer);
3081 ehci_add_intr_list(sc, exfer);
3082 xfer->status = USBD_IN_PROGRESS;
3086 if (ehcidebug > 10) {
3087 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
3089 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
3092 printf("async_head:\n");
3093 ehci_dump_sqh(sc->sc_async_head);
3097 ehci_dump_sqtds(data);
3101 if (sc->sc_bus.use_polling)
3102 ehci_waitintr(sc, xfer);
3104 return (USBD_IN_PROGRESS);
3109 ehci_device_bulk_abort(usbd_xfer_handle xfer)
3111 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
3112 ehci_abort_xfer(xfer, USBD_CANCELLED);
3116 * Close a device bulk pipe.
3119 ehci_device_bulk_close(usbd_pipe_handle pipe)
3121 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3123 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
3124 ehci_close_pipe(pipe, sc->sc_async_head);
3128 ehci_device_bulk_done(usbd_xfer_handle xfer)
3130 struct ehci_xfer *ex = EXFER(xfer);
3131 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3132 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3134 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
3135 xfer, xfer->actlen));
3137 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3138 ehci_del_intr_list(ex); /* remove from active list */
3139 ehci_free_sqtd_chain(sc, epipe->sqh, ex->sqtdstart,
3140 ex->sqtdend->nextqtd);
3143 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
3146 /************************/
3149 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
3151 struct ehci_soft_islot *isp;
3154 /* Find a poll rate that is large enough. */
3155 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
3156 if (EHCI_ILEV_IVAL(lev) <= ival)
3159 /* Pick an interrupt slot at the right level. */
3160 /* XXX could do better than picking at random. */
3161 islot = EHCI_IQHIDX(lev, arc4random());
3164 isp = &sc->sc_islots[islot];
3165 ehci_add_qh(sqh, isp->sqh);
3167 return (USBD_NORMAL_COMPLETION);
3171 ehci_device_intr_transfer(usbd_xfer_handle xfer)
3175 /* Insert last in queue. */
3176 err = usb_insert_transfer(xfer);
3181 * Pipe isn't running (otherwise err would be USBD_INPROG),
3182 * so start it first.
3184 return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3188 ehci_device_intr_start(usbd_xfer_handle xfer)
3190 #define exfer EXFER(xfer)
3191 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3192 usbd_device_handle dev = xfer->pipe->device;
3193 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3194 ehci_soft_qtd_t *data, *dataend, *newinactive;
3195 ehci_soft_qh_t *sqh;
3197 int len, isread, endpt;
3200 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
3201 xfer, xfer->length, xfer->flags));
3204 return (USBD_IOERROR);
3207 if (xfer->rqflags & URQ_REQUEST)
3208 panic("ehci_device_intr_start: a request");
3212 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3213 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3216 epipe->u.intr.length = len;
3218 newinactive = ehci_alloc_sqtd(sc);
3219 if (newinactive == NULL) {
3220 DPRINTFN(-1,("ehci_device_intr_start: no sqtd memory\n"));
3223 usb_transfer_complete(xfer);
3226 newinactive->qtd.qtd_status = htole32(0);
3227 newinactive->qtd.qtd_next = EHCI_NULL;
3228 newinactive->qtd.qtd_altnext = EHCI_NULL;
3229 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3230 sqh->inactivesqtd, newinactive, &data, &dataend);
3232 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3234 usb_transfer_complete(xfer);
3237 dataend->nextqtd = newinactive;
3238 dataend->qtd.qtd_next = htole32(newinactive->physaddr);
3239 dataend->qtd.qtd_altnext = htole32(newinactive->physaddr);
3240 sqh->inactivesqtd = newinactive;
3243 if (ehcidebug > 5) {
3244 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3246 ehci_dump_sqtds(data);
3250 /* Set up interrupt info. */
3251 exfer->sqtdstart = data;
3252 exfer->sqtdend = dataend;
3254 if (!exfer->isdone) {
3255 printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3261 ehci_activate_qh(sqh, data);
3262 if (xfer->timeout && !sc->sc_bus.use_polling) {
3263 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3264 ehci_timeout, xfer);
3266 ehci_add_intr_list(sc, exfer);
3267 xfer->status = USBD_IN_PROGRESS;
3271 if (ehcidebug > 10) {
3272 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3274 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3278 ehci_dump_sqtds(data);
3282 if (sc->sc_bus.use_polling)
3283 ehci_waitintr(sc, xfer);
3285 return (USBD_IN_PROGRESS);
3290 ehci_device_intr_abort(usbd_xfer_handle xfer)
3292 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3293 if (xfer->pipe->intrxfer == xfer) {
3294 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3295 xfer->pipe->intrxfer = NULL;
3297 ehci_abort_xfer(xfer, USBD_CANCELLED);
3301 ehci_device_intr_close(usbd_pipe_handle pipe)
3303 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3304 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3305 struct ehci_soft_islot *isp;
3307 isp = &sc->sc_islots[epipe->sqh->islot];
3308 ehci_close_pipe(pipe, isp->sqh);
3312 ehci_device_intr_done(usbd_xfer_handle xfer)
3314 #define exfer EXFER(xfer)
3315 struct ehci_xfer *ex = EXFER(xfer);
3316 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3317 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3318 ehci_soft_qtd_t *data, *dataend, *newinactive;
3319 ehci_soft_qh_t *sqh;
3321 int len, isread, endpt, s;
3323 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3324 xfer, xfer->actlen));
3327 if (xfer->pipe->repeat) {
3328 ehci_free_sqtd_chain(sc, sqh, ex->sqtdstart,
3329 ex->sqtdend->nextqtd);
3331 len = epipe->u.intr.length;
3333 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3334 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3336 newinactive = ehci_alloc_sqtd(sc);
3337 if (newinactive == NULL) {
3339 ("ehci_device_intr_done: no sqtd memory\n"));
3344 newinactive->qtd.qtd_status = htole32(0);
3345 newinactive->qtd.qtd_next = EHCI_NULL;
3346 newinactive->qtd.qtd_altnext = EHCI_NULL;
3347 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3348 sqh->inactivesqtd, newinactive, &data, &dataend);
3350 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3354 dataend->nextqtd = newinactive;
3355 dataend->qtd.qtd_next = htole32(newinactive->physaddr);
3356 dataend->qtd.qtd_altnext = htole32(newinactive->physaddr);
3357 sqh->inactivesqtd = newinactive;
3359 /* Set up interrupt info. */
3360 exfer->sqtdstart = data;
3361 exfer->sqtdend = dataend;
3363 if (!exfer->isdone) {
3364 printf("ehci_device_intr_done: not done, ex=%p\n",
3371 ehci_activate_qh(sqh, data);
3372 if (xfer->timeout && !sc->sc_bus.use_polling) {
3373 callout_reset(&xfer->timeout_handle,
3374 MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3378 xfer->status = USBD_IN_PROGRESS;
3379 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3380 ehci_del_intr_list(ex); /* remove from active list */
3381 ehci_free_sqtd_chain(sc, sqh, ex->sqtdstart,
3382 ex->sqtdend->nextqtd);
3387 /************************/
3389 static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
3390 static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
3391 static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
3392 static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
3393 static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }