2 * Copyright (c) 2013 Kevin Lo
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 * ASIX Electronics AX88178A/AX88179 USB 2.0/3.0 gigabit ethernet driver.
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/condvar.h>
38 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/socket.h>
43 #include <sys/sysctl.h>
44 #include <sys/unistd.h>
47 #include <net/if_var.h>
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usbdi_util.h>
54 #define USB_DEBUG_VAR axge_debug
55 #include <dev/usb/usb_debug.h>
56 #include <dev/usb/usb_process.h>
58 #include <dev/usb/net/usb_ethernet.h>
59 #include <dev/usb/net/if_axgereg.h>
62 * Various supported device vendors/products.
65 static const STRUCT_USB_HOST_ID axge_devs[] = {
66 #define AXGE_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
67 AXGE_DEV(ASIX, AX88178A),
68 AXGE_DEV(ASIX, AX88179),
69 /* AXGE_DEV(SITECOMEU, LN032), */
74 unsigned char ctrl, timer_l, timer_h, size, ifg;
75 } AX88179_BULKIN_SIZE[] = {
76 {7, 0x4f, 0, 0x12, 0xff},
77 {7, 0x20, 3, 0x16, 0xff},
78 {7, 0xae, 7, 0x18, 0xff},
79 {7, 0xcc, 0x4c, 0x18, 8},
84 static device_probe_t axge_probe;
85 static device_attach_t axge_attach;
86 static device_detach_t axge_detach;
88 static usb_callback_t axge_bulk_read_callback;
89 static usb_callback_t axge_bulk_write_callback;
91 static miibus_readreg_t axge_miibus_readreg;
92 static miibus_writereg_t axge_miibus_writereg;
93 static miibus_statchg_t axge_miibus_statchg;
95 static uether_fn_t axge_attach_post;
96 static uether_fn_t axge_init;
97 static uether_fn_t axge_stop;
98 static uether_fn_t axge_start;
99 static uether_fn_t axge_tick;
100 static uether_fn_t axge_setmulti;
101 static uether_fn_t axge_setpromisc;
103 static int axge_read_mem(struct axge_softc *, uint8_t, uint16_t,
104 uint16_t, void *, int);
105 static void axge_write_mem(struct axge_softc *, uint8_t, uint16_t,
106 uint16_t, void *, int);
107 static uint16_t axge_read_cmd_2(struct axge_softc *, uint8_t, uint16_t,
109 static void axge_write_cmd_1(struct axge_softc *, uint8_t, uint16_t,
111 static void axge_write_cmd_2(struct axge_softc *, uint8_t, uint16_t,
113 static void axge_chip_init(struct axge_softc *);
114 static void axge_reset(struct axge_softc *);
116 static int axge_attach_post_sub(struct usb_ether *);
117 static int axge_ifmedia_upd(struct ifnet *);
118 static void axge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
119 static int axge_ioctl(struct ifnet *, u_long, caddr_t);
120 static int axge_rx_frame(struct usb_ether *, struct usb_page_cache *, int);
121 static int axge_rxeof(struct usb_ether *, struct usb_page_cache *,
122 unsigned int, unsigned int, struct axge_csum_hdr *);
123 static void axge_csum_cfg(struct usb_ether *);
125 #define AXGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
128 static int axge_debug = 0;
130 static SYSCTL_NODE(_hw_usb, OID_AUTO, axge, CTLFLAG_RW, 0, "USB axge");
131 SYSCTL_INT(_hw_usb_axge, OID_AUTO, debug, CTLFLAG_RW, &axge_debug, 0,
135 static const struct usb_config axge_config[AXGE_N_TRANSFER] = {
136 [AXGE_BULK_DT_WR] = {
138 .endpoint = UE_ADDR_ANY,
139 .direction = UE_DIR_OUT,
141 .bufsize = 16 * (MCLBYTES + 16),
142 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
143 .callback = axge_bulk_write_callback,
144 .timeout = 10000, /* 10 seconds */
146 [AXGE_BULK_DT_RD] = {
148 .endpoint = UE_ADDR_ANY,
149 .direction = UE_DIR_IN,
151 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
152 .callback = axge_bulk_read_callback,
153 .timeout = 0, /* no timeout */
157 static device_method_t axge_methods[] = {
158 /* Device interface. */
159 DEVMETHOD(device_probe, axge_probe),
160 DEVMETHOD(device_attach, axge_attach),
161 DEVMETHOD(device_detach, axge_detach),
164 DEVMETHOD(miibus_readreg, axge_miibus_readreg),
165 DEVMETHOD(miibus_writereg, axge_miibus_writereg),
166 DEVMETHOD(miibus_statchg, axge_miibus_statchg),
171 static driver_t axge_driver = {
173 .methods = axge_methods,
174 .size = sizeof(struct axge_softc),
177 static devclass_t axge_devclass;
179 DRIVER_MODULE(axge, uhub, axge_driver, axge_devclass, NULL, NULL);
180 DRIVER_MODULE(miibus, axge, miibus_driver, miibus_devclass, NULL, NULL);
181 MODULE_DEPEND(axge, uether, 1, 1, 1);
182 MODULE_DEPEND(axge, usb, 1, 1, 1);
183 MODULE_DEPEND(axge, ether, 1, 1, 1);
184 MODULE_DEPEND(axge, miibus, 1, 1, 1);
185 MODULE_VERSION(axge, 1);
187 static const struct usb_ether_methods axge_ue_methods = {
188 .ue_attach_post = axge_attach_post,
189 .ue_attach_post_sub = axge_attach_post_sub,
190 .ue_start = axge_start,
191 .ue_init = axge_init,
192 .ue_stop = axge_stop,
193 .ue_tick = axge_tick,
194 .ue_setmulti = axge_setmulti,
195 .ue_setpromisc = axge_setpromisc,
196 .ue_mii_upd = axge_ifmedia_upd,
197 .ue_mii_sts = axge_ifmedia_sts,
201 axge_read_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
202 uint16_t val, void *buf, int len)
204 struct usb_device_request req;
206 AXGE_LOCK_ASSERT(sc, MA_OWNED);
208 req.bmRequestType = UT_READ_VENDOR_DEVICE;
210 USETW(req.wValue, val);
211 USETW(req.wIndex, index);
212 USETW(req.wLength, len);
214 return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
218 axge_write_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
219 uint16_t val, void *buf, int len)
221 struct usb_device_request req;
223 AXGE_LOCK_ASSERT(sc, MA_OWNED);
225 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
227 USETW(req.wValue, val);
228 USETW(req.wIndex, index);
229 USETW(req.wLength, len);
231 if (uether_do_request(&sc->sc_ue, &req, buf, 1000)) {
237 axge_read_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
242 axge_read_mem(sc, cmd, index, reg, &val, 2);
247 axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t index,
248 uint16_t reg, uint8_t val)
250 axge_write_mem(sc, cmd, index, reg, &val, 1);
254 axge_write_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
255 uint16_t reg, uint16_t val)
260 axge_write_mem(sc, cmd, index, reg, &temp, 2);
264 axge_miibus_readreg(device_t dev, int phy, int reg)
266 struct axge_softc *sc;
270 sc = device_get_softc(dev);
271 locked = mtx_owned(&sc->sc_mtx);
275 val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);
284 axge_miibus_writereg(device_t dev, int phy, int reg, int val)
286 struct axge_softc *sc;
289 sc = device_get_softc(dev);
290 if (sc->sc_phyno != phy)
292 locked = mtx_owned(&sc->sc_mtx);
296 axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);
305 axge_miibus_statchg(device_t dev)
307 struct axge_softc *sc;
308 struct mii_data *mii;
313 sc = device_get_softc(dev);
315 locked = mtx_owned(&sc->sc_mtx);
319 ifp = uether_getifp(&sc->sc_ue);
320 if (mii == NULL || ifp == NULL ||
321 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
324 sc->sc_flags &= ~AXGE_FLAG_LINK;
325 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
326 (IFM_ACTIVE | IFM_AVALID)) {
327 switch (IFM_SUBTYPE(mii->mii_media_active)) {
331 sc->sc_flags |= AXGE_FLAG_LINK;
338 /* Lost link, do nothing. */
339 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0)
343 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
344 val |= AXGE_MEDIUM_FULL_DUPLEX;
345 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
346 val |= AXGE_MEDIUM_TXFLOW_CTRLEN;
347 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
348 val |= AXGE_MEDIUM_RXFLOW_CTRLEN;
350 val |= AXGE_MEDIUM_RECEIVE_EN | AXGE_MEDIUM_ALWAYS_ONE;
351 switch (IFM_SUBTYPE(mii->mii_media_active)) {
353 val |= AXGE_MEDIUM_GIGAMODE;
355 val |= AXGE_MEDIUM_PS;
357 /* Doesn't need to be handled. */
360 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MEDIUM_STATUS_MODE, val);
368 axge_chip_init(struct axge_softc *sc)
370 /* Power up ethernet PHY. */
371 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_PHYPWR_RSTCTL, 0);
372 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_PHYPWR_RSTCTL,
373 AXGE_PHYPWR_RSTCTL_IPRL);
374 uether_pause(&sc->sc_ue, hz / 4);
375 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, 1, AXGE_CLK_SELECT,
376 AXGE_CLK_SELECT_ACS | AXGE_CLK_SELECT_BCS);
377 uether_pause(&sc->sc_ue, hz / 10);
381 axge_reset(struct axge_softc *sc)
383 struct usb_config_descriptor *cd;
386 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
388 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
389 cd->bConfigurationValue);
391 DPRINTF("reset failed (ignored)\n");
393 /* Wait a little while for the chip to get its brains in order. */
394 uether_pause(&sc->sc_ue, hz / 100);
396 /* Reinitialize controller to achieve full reset. */
401 axge_attach_post(struct usb_ether *ue)
403 struct axge_softc *sc;
406 sc = uether_getsc(ue);
409 /* Initialize controller and get station address. */
412 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
413 axge_read_mem(sc, AXGE_ACCESS_MAC, 5, AXGE_RX_BULKIN_QCTRL, tmp, 5);
414 axge_read_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NODE_ID,
415 ue->ue_eaddr, ETHER_ADDR_LEN);
419 axge_attach_post_sub(struct usb_ether *ue)
421 struct axge_softc *sc;
425 sc = uether_getsc(ue);
427 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
428 ifp->if_start = uether_start;
429 ifp->if_ioctl = axge_ioctl;
430 ifp->if_init = uether_init;
431 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
432 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
433 IFQ_SET_READY(&ifp->if_snd);
435 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_TXCSUM | IFCAP_RXCSUM;
436 ifp->if_hwassist = AXGE_CSUM_FEATURES;
437 ifp->if_capenable = ifp->if_capabilities;
440 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
441 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
442 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0);
452 axge_ifmedia_upd(struct ifnet *ifp)
454 struct axge_softc *sc;
455 struct mii_data *mii;
456 struct mii_softc *miisc;
461 AXGE_LOCK_ASSERT(sc, MA_OWNED);
463 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
465 error = mii_mediachg(mii);
471 * Report current media status.
474 axge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
476 struct axge_softc *sc;
477 struct mii_data *mii;
483 ifmr->ifm_active = mii->mii_media_active;
484 ifmr->ifm_status = mii->mii_media_status;
489 * Probe for a AX88179 chip.
492 axge_probe(device_t dev)
494 struct usb_attach_arg *uaa;
496 uaa = device_get_ivars(dev);
497 if (uaa->usb_mode != USB_MODE_HOST)
499 if (uaa->info.bConfigIndex != AXGE_CONFIG_IDX)
501 if (uaa->info.bIfaceIndex != AXGE_IFACE_IDX)
504 return (usbd_lookup_id_by_uaa(axge_devs, sizeof(axge_devs), uaa));
508 * Attach the interface. Allocate softc structures, do ifmedia
509 * setup and ethernet/BPF attach.
512 axge_attach(device_t dev)
514 struct usb_attach_arg *uaa;
515 struct axge_softc *sc;
516 struct usb_ether *ue;
520 uaa = device_get_ivars(dev);
521 sc = device_get_softc(dev);
524 device_set_usb_desc(dev);
525 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
527 iface_index = AXGE_IFACE_IDX;
528 error = usbd_transfer_setup(uaa->device, &iface_index,
529 sc->sc_xfer, axge_config, AXGE_N_TRANSFER, sc, &sc->sc_mtx);
531 device_printf(dev, "allocating USB transfers failed\n");
537 ue->ue_udev = uaa->device;
538 ue->ue_mtx = &sc->sc_mtx;
539 ue->ue_methods = &axge_ue_methods;
541 error = uether_ifattach(ue);
543 device_printf(dev, "could not attach interface\n");
546 return (0); /* success */
550 return (ENXIO); /* failure */
554 axge_detach(device_t dev)
556 struct axge_softc *sc;
557 struct usb_ether *ue;
559 sc = device_get_softc(dev);
561 usbd_transfer_unsetup(sc->sc_xfer, AXGE_N_TRANSFER);
563 mtx_destroy(&sc->sc_mtx);
569 axge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
571 struct axge_softc *sc;
572 struct usb_ether *ue;
573 struct usb_page_cache *pc;
576 sc = usbd_xfer_softc(xfer);
578 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
580 switch (USB_GET_STATE(xfer)) {
581 case USB_ST_TRANSFERRED:
582 pc = usbd_xfer_get_frame(xfer, 0);
583 axge_rx_frame(ue, pc, actlen);
588 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
589 usbd_transfer_submit(xfer);
594 if (error != USB_ERR_CANCELLED) {
595 usbd_xfer_set_stall(xfer);
604 axge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
606 struct axge_softc *sc;
608 struct usb_page_cache *pc;
615 sc = usbd_xfer_softc(xfer);
616 ifp = uether_getifp(&sc->sc_ue);
618 switch (USB_GET_STATE(xfer)) {
619 case USB_ST_TRANSFERRED:
620 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
624 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0 ||
625 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
627 * Don't send anything if there is no link or
628 * controller is busy.
633 for (nframes = 0; nframes < 16 &&
634 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
635 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
638 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
641 pc = usbd_xfer_get_frame(xfer, nframes);
643 txhdr = m->m_pkthdr.len;
644 txhdr = htole32(txhdr);
645 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
646 frm_len += sizeof(txhdr);
649 if ((m->m_pkthdr.len + sizeof(txhdr) + sizeof(txhdr2)) %
650 usbd_xfer_max_framelen(xfer) == 0) {
651 txhdr2 |= 0x80008000;
653 txhdr2 = htole32(txhdr2);
654 usbd_copy_in(pc, frm_len, &txhdr2, sizeof(txhdr2));
655 frm_len += sizeof(txhdr2);
657 /* Next copy in the actual packet. */
658 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len);
659 frm_len += m->m_pkthdr.len;
663 * Update TX packet counter here. This is not
664 * correct way but it seems that there is no way
665 * to know how many packets are sent at the end
666 * of transfer because controller combines
667 * multiple writes into single one if there is
668 * room in TX buffer of controller.
673 * if there's a BPF listener, bounce a copy
674 * of this frame to him:
680 /* Set frame length. */
681 usbd_xfer_set_frame_len(xfer, nframes, frm_len);
684 usbd_xfer_set_frames(xfer, nframes);
685 usbd_transfer_submit(xfer);
686 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
692 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
694 if (error != USB_ERR_CANCELLED) {
695 usbd_xfer_set_stall(xfer);
704 axge_tick(struct usb_ether *ue)
706 struct axge_softc *sc;
707 struct mii_data *mii;
709 sc = uether_getsc(ue);
711 AXGE_LOCK_ASSERT(sc, MA_OWNED);
714 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0) {
715 axge_miibus_statchg(ue->ue_dev);
716 if ((sc->sc_flags & AXGE_FLAG_LINK) != 0)
722 axge_setmulti(struct usb_ether *ue)
724 struct axge_softc *sc;
726 struct ifmultiaddr *ifma;
729 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
731 sc = uether_getsc(ue);
732 ifp = uether_getifp(ue);
734 AXGE_LOCK_ASSERT(sc, MA_OWNED);
736 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RX_CTL);
737 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
738 rxmode |= AXGE_RX_CTL_AMALL;
739 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RX_CTL, rxmode);
742 rxmode &= ~AXGE_RX_CTL_AMALL;
745 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
746 if (ifma->ifma_addr->sa_family != AF_LINK)
748 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
749 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
750 hashtbl[h / 8] |= 1 << (h % 8);
752 if_maddr_runlock(ifp);
754 axge_write_mem(sc, AXGE_ACCESS_MAC, 8, AXGE_MULTI_FILTER_ARRY,
755 (void *)&hashtbl, 8);
756 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RX_CTL, rxmode);
760 axge_setpromisc(struct usb_ether *ue)
762 struct axge_softc *sc;
766 sc = uether_getsc(ue);
767 ifp = uether_getifp(ue);
768 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RX_CTL);
770 if (ifp->if_flags & IFF_PROMISC)
771 rxmode |= AXGE_RX_CTL_PRO;
773 rxmode &= ~AXGE_RX_CTL_PRO;
775 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RX_CTL, rxmode);
780 axge_start(struct usb_ether *ue)
782 struct axge_softc *sc;
784 sc = uether_getsc(ue);
786 * Start the USB transfers, if not already started.
788 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_RD]);
789 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_WR]);
793 axge_init(struct usb_ether *ue)
795 struct axge_softc *sc;
799 sc = uether_getsc(ue);
800 ifp = uether_getifp(ue);
801 AXGE_LOCK_ASSERT(sc, MA_OWNED);
803 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
807 * Cancel pending I/O and free all RX/TX buffers.
813 /* Set MAC address. */
814 axge_write_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NODE_ID,
815 IF_LLADDR(ifp), ETHER_ADDR_LEN);
817 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, 1, AXGE_PAUSE_WATERLVL_LOW, 0x34);
818 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, 1, AXGE_PAUSE_WATERLVL_HIGH,
821 /* Configure TX/RX checksum offloading. */
824 /* Configure RX settings. */
825 rxmode = (AXGE_RX_CTL_IPE | AXGE_RX_CTL_AM | AXGE_RX_CTL_START);
827 /* If we want promiscuous mode, set the allframes bit. */
828 if (ifp->if_flags & IFF_PROMISC)
829 rxmode |= AXGE_RX_CTL_PRO;
831 if (ifp->if_flags & IFF_BROADCAST)
832 rxmode |= AXGE_RX_CTL_AB;
834 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RX_CTL, rxmode);
836 /* Load the multicast filter. */
839 usbd_xfer_set_stall(sc->sc_xfer[AXGE_BULK_DT_WR]);
841 ifp->if_drv_flags |= IFF_DRV_RUNNING;
842 /* Switch to selected media. */
843 axge_ifmedia_upd(ifp);
847 axge_stop(struct usb_ether *ue)
849 struct axge_softc *sc;
852 sc = uether_getsc(ue);
853 ifp = uether_getifp(ue);
855 AXGE_LOCK_ASSERT(sc, MA_OWNED);
857 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
858 sc->sc_flags &= ~AXGE_FLAG_LINK;
861 * Stop all the transfers, if not already stopped:
863 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_WR]);
864 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_RD]);
868 axge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
870 struct usb_ether *ue;
871 struct axge_softc *sc;
873 int error, mask, reinit;
876 sc = uether_getsc(ue);
877 ifr = (struct ifreq *)data;
880 if (cmd == SIOCSIFCAP) {
882 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
883 if ((mask & IFCAP_TXCSUM) != 0 &&
884 (ifp->if_capabilities & IFCAP_TXCSUM) != 0) {
885 ifp->if_capenable ^= IFCAP_TXCSUM;
886 if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
887 ifp->if_hwassist |= AXGE_CSUM_FEATURES;
889 ifp->if_hwassist &= ~AXGE_CSUM_FEATURES;
892 if ((mask & IFCAP_RXCSUM) != 0 &&
893 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
894 ifp->if_capenable ^= IFCAP_RXCSUM;
897 if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING)
898 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
905 error = uether_ioctl(ifp, cmd, data);
911 axge_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen)
913 struct axge_softc *sc;
914 struct axge_csum_hdr csum_hdr;
921 sc = uether_getsc(ue);
926 usbd_copy_out(pc, actlen - sizeof(rxhdr), &rxhdr, sizeof(rxhdr));
927 actlen -= sizeof(rxhdr);
928 rxhdr = le32toh(rxhdr);
930 pkt_cnt = (uint16_t)rxhdr;
931 hdr_off = (uint16_t)(rxhdr >> 16);
933 usbd_copy_out(pc, pos + hdr_off, &csum_hdr, sizeof(csum_hdr));
934 csum_hdr.len = le16toh(csum_hdr.len);
935 csum_hdr.cstatus = le16toh(csum_hdr.cstatus);
938 if (actlen <= sizeof(csum_hdr) + sizeof(struct ether_header)) {
942 pktlen = AXGE_CSUM_RXBYTES(csum_hdr.len);
945 /* Skip the 2-byte IP alignment header. */
946 axge_rxeof(ue, pc, 2, pktlen - 2, &csum_hdr);
950 ue->ue_ifp->if_ierrors++;
955 axge_rxeof(struct usb_ether *ue, struct usb_page_cache *pc,
956 unsigned int offset, unsigned int len, struct axge_csum_hdr *csum_hdr)
962 if (len < ETHER_HDR_LEN || len > MCLBYTES - ETHER_ALIGN) {
967 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
972 m->m_len = m->m_pkthdr.len = MCLBYTES;
973 m_adj(m, ETHER_ALIGN);
975 usbd_copy_out(pc, offset, mtod(m, uint8_t *), len);
978 m->m_pkthdr.rcvif = ifp;
979 m->m_pkthdr.len = m->m_len = len;
981 if (csum_hdr != NULL &&
982 csum_hdr->cstatus & AXGE_CSUM_HDR_L3_TYPE_IPV4) {
983 if ((csum_hdr->cstatus & (AXGE_CSUM_HDR_L4_CSUM_ERR |
984 AXGE_RXHDR_L4CSUM_ERR)) == 0) {
985 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED |
987 if ((csum_hdr->cstatus & AXGE_CSUM_HDR_L4_TYPE_MASK) ==
988 AXGE_CSUM_HDR_L4_TYPE_TCP ||
989 (csum_hdr->cstatus & AXGE_CSUM_HDR_L4_TYPE_MASK) ==
990 AXGE_CSUM_HDR_L4_TYPE_UDP) {
991 m->m_pkthdr.csum_flags |=
992 CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
993 m->m_pkthdr.csum_data = 0xffff;
998 _IF_ENQUEUE(&ue->ue_rxq, m);
1003 axge_csum_cfg(struct usb_ether *ue)
1005 struct axge_softc *sc;
1009 sc = uether_getsc(ue);
1010 AXGE_LOCK_ASSERT(sc, MA_OWNED);
1011 ifp = uether_getifp(ue);
1014 if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
1015 csum |= AXGE_TXCOE_IP | AXGE_TXCOE_TCP | AXGE_TXCOE_UDP;
1016 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, 1, AXGE_TXCOE_CTL, csum);
1019 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
1020 csum |= AXGE_RXCOE_IP | AXGE_RXCOE_TCP | AXGE_RXCOE_UDP |
1021 AXGE_RXCOE_ICMP | AXGE_RXCOE_IGMP;
1022 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, 1, AXGE_RXCOE_CTL, csum);