2 * Copyright (c) 2013-2014 Kevin Lo
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 * ASIX Electronics AX88178A/AX88179 USB 2.0/3.0 gigabit ethernet driver.
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/condvar.h>
38 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/socket.h>
43 #include <sys/sysctl.h>
44 #include <sys/unistd.h>
47 #include <net/if_var.h>
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usbdi_util.h>
54 #define USB_DEBUG_VAR axge_debug
55 #include <dev/usb/usb_debug.h>
56 #include <dev/usb/usb_process.h>
58 #include <dev/usb/net/usb_ethernet.h>
59 #include <dev/usb/net/if_axgereg.h>
62 * Various supported device vendors/products.
65 static const STRUCT_USB_HOST_ID axge_devs[] = {
66 #define AXGE_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
67 AXGE_DEV(ASIX, AX88178A),
68 AXGE_DEV(ASIX, AX88179),
69 AXGE_DEV(DLINK, DUB1312),
70 AXGE_DEV(SITECOMEU, LN032),
80 } axge_bulk_size[] = {
81 { 7, 0x4f, 0x00, 0x12, 0xff },
82 { 7, 0x20, 0x03, 0x16, 0xff },
83 { 7, 0xae, 0x07, 0x18, 0xff },
84 { 7, 0xcc, 0x4c, 0x18, 0x08 }
89 static device_probe_t axge_probe;
90 static device_attach_t axge_attach;
91 static device_detach_t axge_detach;
93 static usb_callback_t axge_bulk_read_callback;
94 static usb_callback_t axge_bulk_write_callback;
96 static miibus_readreg_t axge_miibus_readreg;
97 static miibus_writereg_t axge_miibus_writereg;
98 static miibus_statchg_t axge_miibus_statchg;
100 static uether_fn_t axge_attach_post;
101 static uether_fn_t axge_init;
102 static uether_fn_t axge_stop;
103 static uether_fn_t axge_start;
104 static uether_fn_t axge_tick;
105 static uether_fn_t axge_setmulti;
106 static uether_fn_t axge_setpromisc;
108 static int axge_read_mem(struct axge_softc *, uint8_t, uint16_t,
109 uint16_t, void *, int);
110 static void axge_write_mem(struct axge_softc *, uint8_t, uint16_t,
111 uint16_t, void *, int);
112 static uint8_t axge_read_cmd_1(struct axge_softc *, uint8_t, uint16_t);
113 static uint16_t axge_read_cmd_2(struct axge_softc *, uint8_t, uint16_t,
115 static void axge_write_cmd_1(struct axge_softc *, uint8_t, uint16_t,
117 static void axge_write_cmd_2(struct axge_softc *, uint8_t, uint16_t,
119 static void axge_chip_init(struct axge_softc *);
120 static void axge_reset(struct axge_softc *);
122 static int axge_attach_post_sub(struct usb_ether *);
123 static int axge_ifmedia_upd(struct ifnet *);
124 static void axge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
125 static int axge_ioctl(struct ifnet *, u_long, caddr_t);
126 static void axge_rx_frame(struct usb_ether *, struct usb_page_cache *, int);
127 static void axge_rxeof(struct usb_ether *, struct usb_page_cache *,
128 unsigned int, unsigned int, uint32_t);
129 static void axge_csum_cfg(struct usb_ether *);
131 #define AXGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
134 static int axge_debug = 0;
136 static SYSCTL_NODE(_hw_usb, OID_AUTO, axge, CTLFLAG_RW, 0, "USB axge");
137 SYSCTL_INT(_hw_usb_axge, OID_AUTO, debug, CTLFLAG_RW, &axge_debug, 0,
141 static const struct usb_config axge_config[AXGE_N_TRANSFER] = {
142 [AXGE_BULK_DT_WR] = {
144 .endpoint = UE_ADDR_ANY,
145 .direction = UE_DIR_OUT,
147 .bufsize = 16 * MCLBYTES,
148 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
149 .callback = axge_bulk_write_callback,
150 .timeout = 10000, /* 10 seconds */
152 [AXGE_BULK_DT_RD] = {
154 .endpoint = UE_ADDR_ANY,
155 .direction = UE_DIR_IN,
157 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
158 .callback = axge_bulk_read_callback,
159 .timeout = 0, /* no timeout */
163 static device_method_t axge_methods[] = {
164 /* Device interface. */
165 DEVMETHOD(device_probe, axge_probe),
166 DEVMETHOD(device_attach, axge_attach),
167 DEVMETHOD(device_detach, axge_detach),
170 DEVMETHOD(miibus_readreg, axge_miibus_readreg),
171 DEVMETHOD(miibus_writereg, axge_miibus_writereg),
172 DEVMETHOD(miibus_statchg, axge_miibus_statchg),
177 static driver_t axge_driver = {
179 .methods = axge_methods,
180 .size = sizeof(struct axge_softc),
183 static devclass_t axge_devclass;
185 DRIVER_MODULE(axge, uhub, axge_driver, axge_devclass, NULL, NULL);
186 DRIVER_MODULE(miibus, axge, miibus_driver, miibus_devclass, NULL, NULL);
187 MODULE_DEPEND(axge, uether, 1, 1, 1);
188 MODULE_DEPEND(axge, usb, 1, 1, 1);
189 MODULE_DEPEND(axge, ether, 1, 1, 1);
190 MODULE_DEPEND(axge, miibus, 1, 1, 1);
191 MODULE_VERSION(axge, 1);
193 static const struct usb_ether_methods axge_ue_methods = {
194 .ue_attach_post = axge_attach_post,
195 .ue_attach_post_sub = axge_attach_post_sub,
196 .ue_start = axge_start,
197 .ue_init = axge_init,
198 .ue_stop = axge_stop,
199 .ue_tick = axge_tick,
200 .ue_setmulti = axge_setmulti,
201 .ue_setpromisc = axge_setpromisc,
202 .ue_mii_upd = axge_ifmedia_upd,
203 .ue_mii_sts = axge_ifmedia_sts,
207 axge_read_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
208 uint16_t val, void *buf, int len)
210 struct usb_device_request req;
212 AXGE_LOCK_ASSERT(sc, MA_OWNED);
214 req.bmRequestType = UT_READ_VENDOR_DEVICE;
216 USETW(req.wValue, val);
217 USETW(req.wIndex, index);
218 USETW(req.wLength, len);
220 return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
224 axge_write_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
225 uint16_t val, void *buf, int len)
227 struct usb_device_request req;
229 AXGE_LOCK_ASSERT(sc, MA_OWNED);
231 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
233 USETW(req.wValue, val);
234 USETW(req.wIndex, index);
235 USETW(req.wLength, len);
237 if (uether_do_request(&sc->sc_ue, &req, buf, 1000)) {
243 axge_read_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg)
247 axge_read_mem(sc, cmd, 1, reg, &val, 1);
252 axge_read_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
257 axge_read_mem(sc, cmd, index, reg, &val, 2);
262 axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val)
264 axge_write_mem(sc, cmd, 1, reg, &val, 1);
268 axge_write_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
269 uint16_t reg, uint16_t val)
274 axge_write_mem(sc, cmd, index, reg, &temp, 2);
278 axge_miibus_readreg(device_t dev, int phy, int reg)
280 struct axge_softc *sc;
284 sc = device_get_softc(dev);
285 locked = mtx_owned(&sc->sc_mtx);
289 val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);
298 axge_miibus_writereg(device_t dev, int phy, int reg, int val)
300 struct axge_softc *sc;
303 sc = device_get_softc(dev);
304 if (sc->sc_phyno != phy)
306 locked = mtx_owned(&sc->sc_mtx);
310 axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);
319 axge_miibus_statchg(device_t dev)
321 struct axge_softc *sc;
322 struct mii_data *mii;
324 uint8_t link_status, tmp[5];
328 sc = device_get_softc(dev);
330 locked = mtx_owned(&sc->sc_mtx);
334 ifp = uether_getifp(&sc->sc_ue);
335 if (mii == NULL || ifp == NULL ||
336 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
339 sc->sc_flags &= ~AXGE_FLAG_LINK;
340 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
341 (IFM_ACTIVE | IFM_AVALID)) {
342 switch (IFM_SUBTYPE(mii->mii_media_active)) {
346 sc->sc_flags |= AXGE_FLAG_LINK;
353 /* Lost link, do nothing. */
354 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0)
357 link_status = axge_read_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PLSR);
360 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
362 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
364 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
368 switch (IFM_SUBTYPE(mii->mii_media_active)) {
370 val |= MSR_GM | MSR_EN_125MHZ;
371 if (link_status & PLSR_USB_SS)
372 memcpy(tmp, &axge_bulk_size[0], 5);
373 else if (link_status & PLSR_USB_HS)
374 memcpy(tmp, &axge_bulk_size[1], 5);
376 memcpy(tmp, &axge_bulk_size[3], 5);
380 if (link_status & (PLSR_USB_SS | PLSR_USB_HS))
381 memcpy(tmp, &axge_bulk_size[2], 5);
383 memcpy(tmp, &axge_bulk_size[3], 5);
386 memcpy(tmp, &axge_bulk_size[3], 5);
389 /* Rx bulk configuration. */
390 axge_write_mem(sc, AXGE_ACCESS_MAC, 5, AXGE_RX_BULKIN_QCTRL, tmp, 5);
391 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);
398 axge_chip_init(struct axge_softc *sc)
400 /* Power up ethernet PHY. */
401 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, 0);
402 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, EPPRCR_IPRL);
403 uether_pause(&sc->sc_ue, hz / 4);
404 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CLK_SELECT,
405 AXGE_CLK_SELECT_ACS | AXGE_CLK_SELECT_BCS);
406 uether_pause(&sc->sc_ue, hz / 10);
410 axge_reset(struct axge_softc *sc)
412 struct usb_config_descriptor *cd;
415 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
417 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
418 cd->bConfigurationValue);
420 DPRINTF("reset failed (ignored)\n");
422 /* Wait a little while for the chip to get its brains in order. */
423 uether_pause(&sc->sc_ue, hz / 100);
425 /* Reinitialize controller to achieve full reset. */
430 axge_attach_post(struct usb_ether *ue)
432 struct axge_softc *sc;
434 sc = uether_getsc(ue);
437 /* Initialize controller and get station address. */
439 axge_read_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NIDR,
440 ue->ue_eaddr, ETHER_ADDR_LEN);
444 axge_attach_post_sub(struct usb_ether *ue)
446 struct axge_softc *sc;
450 sc = uether_getsc(ue);
452 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
453 ifp->if_start = uether_start;
454 ifp->if_ioctl = axge_ioctl;
455 ifp->if_init = uether_init;
456 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
457 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
458 IFQ_SET_READY(&ifp->if_snd);
460 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_TXCSUM | IFCAP_RXCSUM;
461 ifp->if_hwassist = AXGE_CSUM_FEATURES;
462 ifp->if_capenable = ifp->if_capabilities;
465 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
466 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
467 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, MIIF_DOPAUSE);
477 axge_ifmedia_upd(struct ifnet *ifp)
479 struct axge_softc *sc;
480 struct mii_data *mii;
481 struct mii_softc *miisc;
486 AXGE_LOCK_ASSERT(sc, MA_OWNED);
488 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
490 error = mii_mediachg(mii);
496 * Report current media status.
499 axge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
501 struct axge_softc *sc;
502 struct mii_data *mii;
508 ifmr->ifm_active = mii->mii_media_active;
509 ifmr->ifm_status = mii->mii_media_status;
514 * Probe for a AX88179 chip.
517 axge_probe(device_t dev)
519 struct usb_attach_arg *uaa;
521 uaa = device_get_ivars(dev);
522 if (uaa->usb_mode != USB_MODE_HOST)
524 if (uaa->info.bConfigIndex != AXGE_CONFIG_IDX)
526 if (uaa->info.bIfaceIndex != AXGE_IFACE_IDX)
529 return (usbd_lookup_id_by_uaa(axge_devs, sizeof(axge_devs), uaa));
533 * Attach the interface. Allocate softc structures, do ifmedia
534 * setup and ethernet/BPF attach.
537 axge_attach(device_t dev)
539 struct usb_attach_arg *uaa;
540 struct axge_softc *sc;
541 struct usb_ether *ue;
545 uaa = device_get_ivars(dev);
546 sc = device_get_softc(dev);
549 device_set_usb_desc(dev);
550 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
552 iface_index = AXGE_IFACE_IDX;
553 error = usbd_transfer_setup(uaa->device, &iface_index,
554 sc->sc_xfer, axge_config, AXGE_N_TRANSFER, sc, &sc->sc_mtx);
556 device_printf(dev, "allocating USB transfers failed\n");
562 ue->ue_udev = uaa->device;
563 ue->ue_mtx = &sc->sc_mtx;
564 ue->ue_methods = &axge_ue_methods;
566 error = uether_ifattach(ue);
568 device_printf(dev, "could not attach interface\n");
571 return (0); /* success */
575 return (ENXIO); /* failure */
579 axge_detach(device_t dev)
581 struct axge_softc *sc;
582 struct usb_ether *ue;
584 sc = device_get_softc(dev);
586 usbd_transfer_unsetup(sc->sc_xfer, AXGE_N_TRANSFER);
588 mtx_destroy(&sc->sc_mtx);
594 axge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
596 struct axge_softc *sc;
597 struct usb_ether *ue;
598 struct usb_page_cache *pc;
601 sc = usbd_xfer_softc(xfer);
603 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
605 switch (USB_GET_STATE(xfer)) {
606 case USB_ST_TRANSFERRED:
607 pc = usbd_xfer_get_frame(xfer, 0);
608 axge_rx_frame(ue, pc, actlen);
613 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
614 usbd_transfer_submit(xfer);
619 if (error != USB_ERR_CANCELLED) {
620 usbd_xfer_set_stall(xfer);
629 axge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
631 struct axge_softc *sc;
633 struct usb_page_cache *pc;
638 sc = usbd_xfer_softc(xfer);
639 ifp = uether_getifp(&sc->sc_ue);
641 switch (USB_GET_STATE(xfer)) {
642 case USB_ST_TRANSFERRED:
643 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
647 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0 ||
648 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
650 * Don't send anything if there is no link or
651 * controller is busy.
656 for (nframes = 0; nframes < 16 &&
657 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
658 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
661 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
664 pc = usbd_xfer_get_frame(xfer, nframes);
665 txhdr = htole32(m->m_pkthdr.len);
666 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
668 txhdr = htole32(txhdr);
669 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
671 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
672 pos += m->m_pkthdr.len;
673 if ((pos % usbd_xfer_max_framelen(xfer)) == 0)
678 * Update TX packet counter here. This is not
679 * correct way but it seems that there is no way
680 * to know how many packets are sent at the end
681 * of transfer because controller combines
682 * multiple writes into single one if there is
683 * room in TX buffer of controller.
688 * if there's a BPF listener, bounce a copy
689 * of this frame to him:
695 /* Set frame length. */
696 usbd_xfer_set_frame_len(xfer, nframes, pos);
699 usbd_xfer_set_frames(xfer, nframes);
700 usbd_transfer_submit(xfer);
701 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
707 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
709 if (error != USB_ERR_CANCELLED) {
710 usbd_xfer_set_stall(xfer);
719 axge_tick(struct usb_ether *ue)
721 struct axge_softc *sc;
722 struct mii_data *mii;
724 sc = uether_getsc(ue);
726 AXGE_LOCK_ASSERT(sc, MA_OWNED);
729 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0) {
730 axge_miibus_statchg(ue->ue_dev);
731 if ((sc->sc_flags & AXGE_FLAG_LINK) != 0)
737 axge_setmulti(struct usb_ether *ue)
739 struct axge_softc *sc;
741 struct ifmultiaddr *ifma;
744 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
746 sc = uether_getsc(ue);
747 ifp = uether_getifp(ue);
749 AXGE_LOCK_ASSERT(sc, MA_OWNED);
751 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
752 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
754 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
757 rxmode &= ~RCR_AMALL;
760 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
761 if (ifma->ifma_addr->sa_family != AF_LINK)
763 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
764 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
765 hashtbl[h / 8] |= 1 << (h % 8);
767 if_maddr_runlock(ifp);
769 axge_write_mem(sc, AXGE_ACCESS_MAC, 8, AXGE_MFA, (void *)&hashtbl, 8);
770 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
774 axge_setpromisc(struct usb_ether *ue)
776 struct axge_softc *sc;
780 sc = uether_getsc(ue);
781 ifp = uether_getifp(ue);
782 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
784 if (ifp->if_flags & IFF_PROMISC)
789 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
794 axge_start(struct usb_ether *ue)
796 struct axge_softc *sc;
798 sc = uether_getsc(ue);
800 * Start the USB transfers, if not already started.
802 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_RD]);
803 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_WR]);
807 axge_init(struct usb_ether *ue)
809 struct axge_softc *sc;
813 sc = uether_getsc(ue);
814 ifp = uether_getifp(ue);
815 AXGE_LOCK_ASSERT(sc, MA_OWNED);
817 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
821 * Cancel pending I/O and free all RX/TX buffers.
827 /* Set MAC address. */
828 axge_write_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NIDR,
829 IF_LLADDR(ifp), ETHER_ADDR_LEN);
831 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLLR, 0x34);
832 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLHR, 0x52);
834 /* Configure TX/RX checksum offloading. */
837 /* Configure RX settings. */
838 rxmode = (RCR_AM | RCR_SO | RCR_DROP_CRCE);
839 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
842 /* If we want promiscuous mode, set the allframes bit. */
843 if (ifp->if_flags & IFF_PROMISC)
846 if (ifp->if_flags & IFF_BROADCAST)
849 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
851 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_MMSR,
852 MMSR_PME_TYPE | MMSR_PME_POL | MMSR_RWMP);
854 /* Load the multicast filter. */
857 usbd_xfer_set_stall(sc->sc_xfer[AXGE_BULK_DT_WR]);
859 ifp->if_drv_flags |= IFF_DRV_RUNNING;
860 /* Switch to selected media. */
861 axge_ifmedia_upd(ifp);
865 axge_stop(struct usb_ether *ue)
867 struct axge_softc *sc;
870 sc = uether_getsc(ue);
871 ifp = uether_getifp(ue);
873 AXGE_LOCK_ASSERT(sc, MA_OWNED);
875 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
876 sc->sc_flags &= ~AXGE_FLAG_LINK;
879 * Stop all the transfers, if not already stopped:
881 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_WR]);
882 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_RD]);
886 axge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
888 struct usb_ether *ue;
889 struct axge_softc *sc;
891 int error, mask, reinit;
894 sc = uether_getsc(ue);
895 ifr = (struct ifreq *)data;
898 if (cmd == SIOCSIFCAP) {
900 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
901 if ((mask & IFCAP_TXCSUM) != 0 &&
902 (ifp->if_capabilities & IFCAP_TXCSUM) != 0) {
903 ifp->if_capenable ^= IFCAP_TXCSUM;
904 if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
905 ifp->if_hwassist |= AXGE_CSUM_FEATURES;
907 ifp->if_hwassist &= ~AXGE_CSUM_FEATURES;
910 if ((mask & IFCAP_RXCSUM) != 0 &&
911 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
912 ifp->if_capenable ^= IFCAP_RXCSUM;
915 if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING)
916 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
923 error = uether_ioctl(ifp, cmd, data);
929 axge_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen)
938 /* verify we have enough data */
939 if (actlen < (int)sizeof(rxhdr))
944 usbd_copy_out(pc, actlen - sizeof(rxhdr), &rxhdr, sizeof(rxhdr));
945 rxhdr = le32toh(rxhdr);
947 pkt_cnt = (uint16_t)rxhdr;
948 hdr_off = (uint16_t)(rxhdr >> 16);
951 /* verify the header offset */
952 if ((int)(hdr_off + sizeof(pkt_hdr)) > actlen) {
953 DPRINTF("End of packet headers\n");
956 if ((int)pos >= actlen) {
957 DPRINTF("Data position reached end\n");
960 usbd_copy_out(pc, hdr_off, &pkt_hdr, sizeof(pkt_hdr));
962 pkt_hdr = le32toh(pkt_hdr);
963 pktlen = (pkt_hdr >> 16) & 0x1fff;
964 if (pkt_hdr & (AXGE_RXHDR_CRC_ERR | AXGE_RXHDR_DROP_ERR)) {
965 DPRINTF("Dropped a packet\n");
966 ue->ue_ifp->if_ierrors++;
968 if (pktlen >= 2 && (int)(pos + pktlen) <= actlen) {
969 axge_rxeof(ue, pc, pos + 2, pktlen - 2, pkt_hdr);
971 DPRINTF("Invalid packet pos=%d len=%d\n",
972 (int)pos, (int)pktlen);
974 pos += (pktlen + 7) & ~7;
975 hdr_off += sizeof(pkt_hdr);
980 axge_rxeof(struct usb_ether *ue, struct usb_page_cache *pc,
981 unsigned int offset, unsigned int len, uint32_t pkt_hdr)
987 if (len < ETHER_HDR_LEN || len > MCLBYTES - ETHER_ALIGN) {
992 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
997 m->m_pkthdr.rcvif = ifp;
998 m->m_len = m->m_pkthdr.len = len + ETHER_ALIGN;
999 m_adj(m, ETHER_ALIGN);
1001 usbd_copy_out(pc, offset, mtod(m, uint8_t *), len);
1005 if ((pkt_hdr & (AXGE_RXHDR_L4CSUM_ERR | AXGE_RXHDR_L3CSUM_ERR)) == 0) {
1006 if ((pkt_hdr & AXGE_RXHDR_L4_TYPE_MASK) ==
1007 AXGE_RXHDR_L4_TYPE_TCP ||
1008 (pkt_hdr & AXGE_RXHDR_L4_TYPE_MASK) ==
1009 AXGE_RXHDR_L4_TYPE_UDP) {
1010 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
1011 CSUM_PSEUDO_HDR | CSUM_IP_CHECKED | CSUM_IP_VALID;
1012 m->m_pkthdr.csum_data = 0xffff;
1016 _IF_ENQUEUE(&ue->ue_rxq, m);
1020 axge_csum_cfg(struct usb_ether *ue)
1022 struct axge_softc *sc;
1026 sc = uether_getsc(ue);
1027 AXGE_LOCK_ASSERT(sc, MA_OWNED);
1028 ifp = uether_getifp(ue);
1031 if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
1032 csum |= CTCR_IP | CTCR_TCP | CTCR_UDP;
1033 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CTCR, csum);
1036 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
1037 csum |= CRCR_IP | CRCR_TCP | CRCR_UDP;
1038 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CRCR, csum);