2 * Copyright (c) 2013-2014 Kevin Lo
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 * ASIX Electronics AX88178A/AX88179 USB 2.0/3.0 gigabit ethernet driver.
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/condvar.h>
38 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/socket.h>
43 #include <sys/sysctl.h>
44 #include <sys/unistd.h>
47 #include <net/if_var.h>
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usbdi_util.h>
54 #define USB_DEBUG_VAR axge_debug
55 #include <dev/usb/usb_debug.h>
56 #include <dev/usb/usb_process.h>
58 #include <dev/usb/net/usb_ethernet.h>
59 #include <dev/usb/net/if_axgereg.h>
62 * Various supported device vendors/products.
65 static const STRUCT_USB_HOST_ID axge_devs[] = {
66 #define AXGE_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
67 AXGE_DEV(ASIX, AX88178A),
68 AXGE_DEV(ASIX, AX88179),
69 AXGE_DEV(DLINK, DUB1312),
70 AXGE_DEV(LENOVO, GIGALAN),
71 AXGE_DEV(SITECOMEU, LN032),
81 } __packed axge_bulk_size[] = {
82 { 7, 0x4f, 0x00, 0x12, 0xff },
83 { 7, 0x20, 0x03, 0x16, 0xff },
84 { 7, 0xae, 0x07, 0x18, 0xff },
85 { 7, 0xcc, 0x4c, 0x18, 0x08 }
90 static device_probe_t axge_probe;
91 static device_attach_t axge_attach;
92 static device_detach_t axge_detach;
94 static usb_callback_t axge_bulk_read_callback;
95 static usb_callback_t axge_bulk_write_callback;
97 static miibus_readreg_t axge_miibus_readreg;
98 static miibus_writereg_t axge_miibus_writereg;
99 static miibus_statchg_t axge_miibus_statchg;
101 static uether_fn_t axge_attach_post;
102 static uether_fn_t axge_init;
103 static uether_fn_t axge_stop;
104 static uether_fn_t axge_start;
105 static uether_fn_t axge_tick;
106 static uether_fn_t axge_setmulti;
107 static uether_fn_t axge_setpromisc;
109 static int axge_read_mem(struct axge_softc *, uint8_t, uint16_t,
110 uint16_t, void *, int);
111 static void axge_write_mem(struct axge_softc *, uint8_t, uint16_t,
112 uint16_t, void *, int);
113 static uint8_t axge_read_cmd_1(struct axge_softc *, uint8_t, uint16_t);
114 static uint16_t axge_read_cmd_2(struct axge_softc *, uint8_t, uint16_t,
116 static void axge_write_cmd_1(struct axge_softc *, uint8_t, uint16_t,
118 static void axge_write_cmd_2(struct axge_softc *, uint8_t, uint16_t,
120 static void axge_chip_init(struct axge_softc *);
121 static void axge_reset(struct axge_softc *);
123 static int axge_attach_post_sub(struct usb_ether *);
124 static int axge_ifmedia_upd(struct ifnet *);
125 static void axge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
126 static int axge_ioctl(struct ifnet *, u_long, caddr_t);
127 static void axge_rx_frame(struct usb_ether *, struct usb_page_cache *, int);
128 static void axge_rxeof(struct usb_ether *, struct usb_page_cache *,
129 unsigned int, unsigned int, uint32_t);
130 static void axge_csum_cfg(struct usb_ether *);
132 #define AXGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
135 static int axge_debug = 0;
137 static SYSCTL_NODE(_hw_usb, OID_AUTO, axge, CTLFLAG_RW, 0, "USB axge");
138 SYSCTL_INT(_hw_usb_axge, OID_AUTO, debug, CTLFLAG_RWTUN, &axge_debug, 0,
142 static const struct usb_config axge_config[AXGE_N_TRANSFER] = {
143 [AXGE_BULK_DT_WR] = {
145 .endpoint = UE_ADDR_ANY,
146 .direction = UE_DIR_OUT,
148 .bufsize = 16 * MCLBYTES,
149 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
150 .callback = axge_bulk_write_callback,
151 .timeout = 10000, /* 10 seconds */
153 [AXGE_BULK_DT_RD] = {
155 .endpoint = UE_ADDR_ANY,
156 .direction = UE_DIR_IN,
158 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
159 .callback = axge_bulk_read_callback,
160 .timeout = 0, /* no timeout */
164 static device_method_t axge_methods[] = {
165 /* Device interface. */
166 DEVMETHOD(device_probe, axge_probe),
167 DEVMETHOD(device_attach, axge_attach),
168 DEVMETHOD(device_detach, axge_detach),
171 DEVMETHOD(miibus_readreg, axge_miibus_readreg),
172 DEVMETHOD(miibus_writereg, axge_miibus_writereg),
173 DEVMETHOD(miibus_statchg, axge_miibus_statchg),
178 static driver_t axge_driver = {
180 .methods = axge_methods,
181 .size = sizeof(struct axge_softc),
184 static devclass_t axge_devclass;
186 DRIVER_MODULE(axge, uhub, axge_driver, axge_devclass, NULL, NULL);
187 DRIVER_MODULE(miibus, axge, miibus_driver, miibus_devclass, NULL, NULL);
188 MODULE_DEPEND(axge, uether, 1, 1, 1);
189 MODULE_DEPEND(axge, usb, 1, 1, 1);
190 MODULE_DEPEND(axge, ether, 1, 1, 1);
191 MODULE_DEPEND(axge, miibus, 1, 1, 1);
192 MODULE_VERSION(axge, 1);
193 USB_PNP_HOST_INFO(axge_devs);
195 static const struct usb_ether_methods axge_ue_methods = {
196 .ue_attach_post = axge_attach_post,
197 .ue_attach_post_sub = axge_attach_post_sub,
198 .ue_start = axge_start,
199 .ue_init = axge_init,
200 .ue_stop = axge_stop,
201 .ue_tick = axge_tick,
202 .ue_setmulti = axge_setmulti,
203 .ue_setpromisc = axge_setpromisc,
204 .ue_mii_upd = axge_ifmedia_upd,
205 .ue_mii_sts = axge_ifmedia_sts,
209 axge_read_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
210 uint16_t val, void *buf, int len)
212 struct usb_device_request req;
214 AXGE_LOCK_ASSERT(sc, MA_OWNED);
216 req.bmRequestType = UT_READ_VENDOR_DEVICE;
218 USETW(req.wValue, val);
219 USETW(req.wIndex, index);
220 USETW(req.wLength, len);
222 return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
226 axge_write_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
227 uint16_t val, void *buf, int len)
229 struct usb_device_request req;
231 AXGE_LOCK_ASSERT(sc, MA_OWNED);
233 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
235 USETW(req.wValue, val);
236 USETW(req.wIndex, index);
237 USETW(req.wLength, len);
239 if (uether_do_request(&sc->sc_ue, &req, buf, 1000)) {
245 axge_read_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg)
249 axge_read_mem(sc, cmd, 1, reg, &val, 1);
254 axge_read_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
259 axge_read_mem(sc, cmd, index, reg, &val, 2);
264 axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val)
266 axge_write_mem(sc, cmd, 1, reg, &val, 1);
270 axge_write_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
271 uint16_t reg, uint16_t val)
276 axge_write_mem(sc, cmd, index, reg, &temp, 2);
280 axge_miibus_readreg(device_t dev, int phy, int reg)
282 struct axge_softc *sc;
286 sc = device_get_softc(dev);
287 locked = mtx_owned(&sc->sc_mtx);
291 val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);
300 axge_miibus_writereg(device_t dev, int phy, int reg, int val)
302 struct axge_softc *sc;
305 sc = device_get_softc(dev);
306 locked = mtx_owned(&sc->sc_mtx);
310 axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);
319 axge_miibus_statchg(device_t dev)
321 struct axge_softc *sc;
322 struct mii_data *mii;
324 uint8_t link_status, tmp[5];
328 sc = device_get_softc(dev);
330 locked = mtx_owned(&sc->sc_mtx);
334 ifp = uether_getifp(&sc->sc_ue);
335 if (mii == NULL || ifp == NULL ||
336 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
339 sc->sc_flags &= ~AXGE_FLAG_LINK;
340 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
341 (IFM_ACTIVE | IFM_AVALID)) {
342 switch (IFM_SUBTYPE(mii->mii_media_active)) {
346 sc->sc_flags |= AXGE_FLAG_LINK;
353 /* Lost link, do nothing. */
354 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0)
357 link_status = axge_read_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PLSR);
360 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
362 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
364 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
368 switch (IFM_SUBTYPE(mii->mii_media_active)) {
370 val |= MSR_GM | MSR_EN_125MHZ;
371 if (link_status & PLSR_USB_SS)
372 memcpy(tmp, &axge_bulk_size[0], 5);
373 else if (link_status & PLSR_USB_HS)
374 memcpy(tmp, &axge_bulk_size[1], 5);
376 memcpy(tmp, &axge_bulk_size[3], 5);
380 if (link_status & (PLSR_USB_SS | PLSR_USB_HS))
381 memcpy(tmp, &axge_bulk_size[2], 5);
383 memcpy(tmp, &axge_bulk_size[3], 5);
386 memcpy(tmp, &axge_bulk_size[3], 5);
389 /* Rx bulk configuration. */
390 axge_write_mem(sc, AXGE_ACCESS_MAC, 5, AXGE_RX_BULKIN_QCTRL, tmp, 5);
391 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);
398 axge_chip_init(struct axge_softc *sc)
400 /* Power up ethernet PHY. */
401 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, 0);
402 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, EPPRCR_IPRL);
403 uether_pause(&sc->sc_ue, hz / 4);
404 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CLK_SELECT,
405 AXGE_CLK_SELECT_ACS | AXGE_CLK_SELECT_BCS);
406 uether_pause(&sc->sc_ue, hz / 10);
410 axge_reset(struct axge_softc *sc)
412 struct usb_config_descriptor *cd;
415 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
417 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
418 cd->bConfigurationValue);
420 DPRINTF("reset failed (ignored)\n");
422 /* Wait a little while for the chip to get its brains in order. */
423 uether_pause(&sc->sc_ue, hz / 100);
425 /* Reinitialize controller to achieve full reset. */
430 axge_attach_post(struct usb_ether *ue)
432 struct axge_softc *sc;
434 sc = uether_getsc(ue);
436 /* Initialize controller and get station address. */
438 axge_read_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NIDR,
439 ue->ue_eaddr, ETHER_ADDR_LEN);
443 axge_attach_post_sub(struct usb_ether *ue)
445 struct axge_softc *sc;
449 sc = uether_getsc(ue);
451 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
452 ifp->if_start = uether_start;
453 ifp->if_ioctl = axge_ioctl;
454 ifp->if_init = uether_init;
455 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
456 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
457 IFQ_SET_READY(&ifp->if_snd);
459 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_TXCSUM | IFCAP_RXCSUM;
460 ifp->if_hwassist = AXGE_CSUM_FEATURES;
461 ifp->if_capenable = ifp->if_capabilities;
464 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
465 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
466 BMSR_DEFCAPMASK, AXGE_PHY_ADDR, MII_OFFSET_ANY, MIIF_DOPAUSE);
476 axge_ifmedia_upd(struct ifnet *ifp)
478 struct axge_softc *sc;
479 struct mii_data *mii;
480 struct mii_softc *miisc;
485 AXGE_LOCK_ASSERT(sc, MA_OWNED);
487 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
489 error = mii_mediachg(mii);
495 * Report current media status.
498 axge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
500 struct axge_softc *sc;
501 struct mii_data *mii;
507 ifmr->ifm_active = mii->mii_media_active;
508 ifmr->ifm_status = mii->mii_media_status;
513 * Probe for a AX88179 chip.
516 axge_probe(device_t dev)
518 struct usb_attach_arg *uaa;
520 uaa = device_get_ivars(dev);
521 if (uaa->usb_mode != USB_MODE_HOST)
523 if (uaa->info.bConfigIndex != AXGE_CONFIG_IDX)
525 if (uaa->info.bIfaceIndex != AXGE_IFACE_IDX)
528 return (usbd_lookup_id_by_uaa(axge_devs, sizeof(axge_devs), uaa));
532 * Attach the interface. Allocate softc structures, do ifmedia
533 * setup and ethernet/BPF attach.
536 axge_attach(device_t dev)
538 struct usb_attach_arg *uaa;
539 struct axge_softc *sc;
540 struct usb_ether *ue;
544 uaa = device_get_ivars(dev);
545 sc = device_get_softc(dev);
548 device_set_usb_desc(dev);
549 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
551 iface_index = AXGE_IFACE_IDX;
552 error = usbd_transfer_setup(uaa->device, &iface_index,
553 sc->sc_xfer, axge_config, AXGE_N_TRANSFER, sc, &sc->sc_mtx);
555 device_printf(dev, "allocating USB transfers failed\n");
561 ue->ue_udev = uaa->device;
562 ue->ue_mtx = &sc->sc_mtx;
563 ue->ue_methods = &axge_ue_methods;
565 error = uether_ifattach(ue);
567 device_printf(dev, "could not attach interface\n");
570 return (0); /* success */
574 return (ENXIO); /* failure */
578 axge_detach(device_t dev)
580 struct axge_softc *sc;
581 struct usb_ether *ue;
583 sc = device_get_softc(dev);
585 usbd_transfer_unsetup(sc->sc_xfer, AXGE_N_TRANSFER);
587 mtx_destroy(&sc->sc_mtx);
593 axge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
595 struct axge_softc *sc;
596 struct usb_ether *ue;
597 struct usb_page_cache *pc;
600 sc = usbd_xfer_softc(xfer);
602 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
604 switch (USB_GET_STATE(xfer)) {
605 case USB_ST_TRANSFERRED:
606 pc = usbd_xfer_get_frame(xfer, 0);
607 axge_rx_frame(ue, pc, actlen);
612 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
613 usbd_transfer_submit(xfer);
618 if (error != USB_ERR_CANCELLED) {
619 usbd_xfer_set_stall(xfer);
627 axge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
629 struct axge_softc *sc;
631 struct usb_page_cache *pc;
636 sc = usbd_xfer_softc(xfer);
637 ifp = uether_getifp(&sc->sc_ue);
639 switch (USB_GET_STATE(xfer)) {
640 case USB_ST_TRANSFERRED:
641 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
645 if ((sc->sc_flags & AXGE_FLAG_LINK) == 0 ||
646 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
648 * Don't send anything if there is no link or
649 * controller is busy.
654 for (nframes = 0; nframes < 16 &&
655 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
656 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
659 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
662 pc = usbd_xfer_get_frame(xfer, nframes);
663 txhdr = htole32(m->m_pkthdr.len);
664 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
666 txhdr = htole32(txhdr);
667 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
669 usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
670 pos += m->m_pkthdr.len;
671 if ((pos % usbd_xfer_max_framelen(xfer)) == 0)
676 * Update TX packet counter here. This is not
677 * correct way but it seems that there is no way
678 * to know how many packets are sent at the end
679 * of transfer because controller combines
680 * multiple writes into single one if there is
681 * room in TX buffer of controller.
683 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
686 * if there's a BPF listener, bounce a copy
687 * of this frame to him:
693 /* Set frame length. */
694 usbd_xfer_set_frame_len(xfer, nframes, pos);
697 usbd_xfer_set_frames(xfer, nframes);
698 usbd_transfer_submit(xfer);
699 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
704 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
705 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
707 if (error != USB_ERR_CANCELLED) {
708 usbd_xfer_set_stall(xfer);
717 axge_tick(struct usb_ether *ue)
719 struct axge_softc *sc;
720 struct mii_data *mii;
722 sc = uether_getsc(ue);
724 AXGE_LOCK_ASSERT(sc, MA_OWNED);
730 axge_setmulti(struct usb_ether *ue)
732 struct axge_softc *sc;
734 struct ifmultiaddr *ifma;
737 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
739 sc = uether_getsc(ue);
740 ifp = uether_getifp(ue);
742 AXGE_LOCK_ASSERT(sc, MA_OWNED);
744 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
745 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
746 rxmode |= RCR_ACPT_ALL_MCAST;
747 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
750 rxmode &= ~RCR_ACPT_ALL_MCAST;
753 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
754 if (ifma->ifma_addr->sa_family != AF_LINK)
756 h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
757 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
758 hashtbl[h / 8] |= 1 << (h % 8);
760 if_maddr_runlock(ifp);
762 axge_write_mem(sc, AXGE_ACCESS_MAC, 8, AXGE_MFA, (void *)&hashtbl, 8);
763 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
767 axge_setpromisc(struct usb_ether *ue)
769 struct axge_softc *sc;
773 sc = uether_getsc(ue);
774 ifp = uether_getifp(ue);
775 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
777 if (ifp->if_flags & IFF_PROMISC)
778 rxmode |= RCR_PROMISC;
780 rxmode &= ~RCR_PROMISC;
782 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
787 axge_start(struct usb_ether *ue)
789 struct axge_softc *sc;
791 sc = uether_getsc(ue);
793 * Start the USB transfers, if not already started.
795 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_RD]);
796 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_WR]);
800 axge_init(struct usb_ether *ue)
802 struct axge_softc *sc;
806 sc = uether_getsc(ue);
807 ifp = uether_getifp(ue);
808 AXGE_LOCK_ASSERT(sc, MA_OWNED);
810 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
814 * Cancel pending I/O and free all RX/TX buffers.
820 /* Set MAC address. */
821 axge_write_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NIDR,
822 IF_LLADDR(ifp), ETHER_ADDR_LEN);
824 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLLR, 0x34);
825 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLHR, 0x52);
827 /* Configure TX/RX checksum offloading. */
830 /* Configure RX settings. */
831 rxmode = (RCR_ACPT_MCAST | RCR_START | RCR_DROP_CRCERR);
832 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
835 /* If we want promiscuous mode, set the allframes bit. */
836 if (ifp->if_flags & IFF_PROMISC)
837 rxmode |= RCR_PROMISC;
839 if (ifp->if_flags & IFF_BROADCAST)
840 rxmode |= RCR_ACPT_BCAST;
842 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
844 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_MMSR,
845 MMSR_PME_TYPE | MMSR_PME_POL | MMSR_RWMP);
847 /* Load the multicast filter. */
850 usbd_xfer_set_stall(sc->sc_xfer[AXGE_BULK_DT_WR]);
852 ifp->if_drv_flags |= IFF_DRV_RUNNING;
853 /* Switch to selected media. */
854 axge_ifmedia_upd(ifp);
858 axge_stop(struct usb_ether *ue)
860 struct axge_softc *sc;
863 sc = uether_getsc(ue);
864 ifp = uether_getifp(ue);
866 AXGE_LOCK_ASSERT(sc, MA_OWNED);
868 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
869 sc->sc_flags &= ~AXGE_FLAG_LINK;
872 * Stop all the transfers, if not already stopped:
874 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_WR]);
875 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_RD]);
879 axge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
881 struct usb_ether *ue;
882 struct axge_softc *sc;
884 int error, mask, reinit;
887 sc = uether_getsc(ue);
888 ifr = (struct ifreq *)data;
891 if (cmd == SIOCSIFCAP) {
893 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
894 if ((mask & IFCAP_TXCSUM) != 0 &&
895 (ifp->if_capabilities & IFCAP_TXCSUM) != 0) {
896 ifp->if_capenable ^= IFCAP_TXCSUM;
897 if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
898 ifp->if_hwassist |= AXGE_CSUM_FEATURES;
900 ifp->if_hwassist &= ~AXGE_CSUM_FEATURES;
903 if ((mask & IFCAP_RXCSUM) != 0 &&
904 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
905 ifp->if_capenable ^= IFCAP_RXCSUM;
908 if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING)
909 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
916 error = uether_ioctl(ifp, cmd, data);
922 axge_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen)
931 /* verify we have enough data */
932 if (actlen < (int)sizeof(rxhdr))
937 usbd_copy_out(pc, actlen - sizeof(rxhdr), &rxhdr, sizeof(rxhdr));
938 rxhdr = le32toh(rxhdr);
940 pkt_cnt = (uint16_t)rxhdr;
941 hdr_off = (uint16_t)(rxhdr >> 16);
944 /* verify the header offset */
945 if ((int)(hdr_off + sizeof(pkt_hdr)) > actlen) {
946 DPRINTF("End of packet headers\n");
949 if ((int)pos >= actlen) {
950 DPRINTF("Data position reached end\n");
953 usbd_copy_out(pc, hdr_off, &pkt_hdr, sizeof(pkt_hdr));
955 pkt_hdr = le32toh(pkt_hdr);
956 pktlen = (pkt_hdr >> 16) & 0x1fff;
957 if (pkt_hdr & (AXGE_RXHDR_CRC_ERR | AXGE_RXHDR_DROP_ERR)) {
958 DPRINTF("Dropped a packet\n");
959 if_inc_counter(ue->ue_ifp, IFCOUNTER_IERRORS, 1);
961 if (pktlen >= 6 && (int)(pos + pktlen) <= actlen) {
962 axge_rxeof(ue, pc, pos + 2, pktlen - 6, pkt_hdr);
964 DPRINTF("Invalid packet pos=%d len=%d\n",
965 (int)pos, (int)pktlen);
967 pos += (pktlen + 7) & ~7;
968 hdr_off += sizeof(pkt_hdr);
973 axge_rxeof(struct usb_ether *ue, struct usb_page_cache *pc,
974 unsigned int offset, unsigned int len, uint32_t pkt_hdr)
980 if (len < ETHER_HDR_LEN || len > MCLBYTES - ETHER_ALIGN) {
981 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
985 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
987 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
990 m->m_pkthdr.rcvif = ifp;
991 m->m_len = m->m_pkthdr.len = len + ETHER_ALIGN;
992 m_adj(m, ETHER_ALIGN);
994 usbd_copy_out(pc, offset, mtod(m, uint8_t *), len);
996 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
998 if ((pkt_hdr & (AXGE_RXHDR_L4CSUM_ERR | AXGE_RXHDR_L3CSUM_ERR)) == 0) {
999 if ((pkt_hdr & AXGE_RXHDR_L4_TYPE_MASK) ==
1000 AXGE_RXHDR_L4_TYPE_TCP ||
1001 (pkt_hdr & AXGE_RXHDR_L4_TYPE_MASK) ==
1002 AXGE_RXHDR_L4_TYPE_UDP) {
1003 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
1004 CSUM_PSEUDO_HDR | CSUM_IP_CHECKED | CSUM_IP_VALID;
1005 m->m_pkthdr.csum_data = 0xffff;
1009 _IF_ENQUEUE(&ue->ue_rxq, m);
1013 axge_csum_cfg(struct usb_ether *ue)
1015 struct axge_softc *sc;
1019 sc = uether_getsc(ue);
1020 AXGE_LOCK_ASSERT(sc, MA_OWNED);
1021 ifp = uether_getifp(ue);
1024 if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
1025 csum |= CTCR_IP | CTCR_TCP | CTCR_UDP;
1026 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CTCR, csum);
1029 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
1030 csum |= CRCR_IP | CRCR_TCP | CRCR_UDP;
1031 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CRCR, csum);