1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */
3 /* Also, already ported:
4 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
5 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
6 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
7 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
8 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $
9 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $
10 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $
12 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $
15 #include <sys/cdefs.h>
16 __FBSDID("$FreeBSD$");
19 * Copyright (c) 1998 The NetBSD Foundation, Inc.
20 * All rights reserved.
22 * This code is derived from software contributed to The NetBSD Foundation
23 * by Lennart Augustsson (lennart@augustsson.net) at
24 * Carlstedt Research & Technology.
26 * Redistribution and use in source and binary forms, with or without
27 * modification, are permitted provided that the following conditions
29 * 1. Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
31 * 2. Redistributions in binary form must reproduce the above copyright
32 * notice, this list of conditions and the following disclaimer in the
33 * documentation and/or other materials provided with the distribution.
34 * 3. All advertising materials mentioning features or use of this software
35 * must display the following acknowledgement:
36 * This product includes software developed by the NetBSD
37 * Foundation, Inc. and its contributors.
38 * 4. Neither the name of The NetBSD Foundation nor the names of its
39 * contributors may be used to endorse or promote products derived
40 * from this software without specific prior written permission.
42 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
43 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
44 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
45 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
46 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
52 * POSSIBILITY OF SUCH DAMAGE.
56 * USB Open Host Controller driver.
58 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
59 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/malloc.h>
65 #include <sys/kernel.h>
66 #if defined(__NetBSD__) || defined(__OpenBSD__)
67 #include <sys/device.h>
68 #include <sys/select.h>
69 #elif defined(__FreeBSD__)
70 #include <sys/endian.h>
71 #include <sys/module.h>
73 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
74 #include <machine/cpu.h>
78 #include <sys/queue.h>
79 #include <sys/sysctl.h>
81 #include <machine/bus.h>
82 #include <machine/endian.h>
84 #include <dev/usb/usb.h>
85 #include <dev/usb/usbdi.h>
86 #include <dev/usb/usbdivar.h>
87 #include <dev/usb/usb_mem.h>
88 #include <dev/usb/usb_quirks.h>
90 #include <dev/usb/ohcireg.h>
91 #include <dev/usb/ohcivar.h>
93 #if defined(__FreeBSD__)
94 #include <machine/clock.h>
96 #define delay(d) DELAY(d)
99 #if defined(__OpenBSD__)
100 struct cfdriver ohci_cd = {
101 NULL, "ohci", DV_DULL
106 #define DPRINTF(x) if (ohcidebug) logprintf x
107 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
109 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
110 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
111 &ohcidebug, 0, "ohci debug level");
113 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
117 #define DPRINTFN(n,x)
121 * The OHCI controller is little endian, so on big endian machines
122 * the data strored in memory needs to be swapped.
124 #if defined(__OpenBSD__)
125 #if BYTE_ORDER == BIG_ENDIAN
126 #define htole32(x) (bswap32(x))
127 #define le32toh(x) (bswap32(x))
129 #define htole32(x) (x)
130 #define le32toh(x) (x)
136 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
137 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
139 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
140 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
142 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
143 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
146 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
149 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
150 ohci_softc_t *, int, int, usbd_xfer_handle,
151 ohci_soft_td_t *, ohci_soft_td_t **);
153 #if defined(__NetBSD__) || defined(__OpenBSD__)
154 Static void ohci_shutdown(void *v);
155 Static void ohci_power(int, void *);
157 Static usbd_status ohci_open(usbd_pipe_handle);
158 Static void ohci_poll(struct usbd_bus *);
159 Static void ohci_softintr(void *);
160 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
161 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
162 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
164 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
165 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
166 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
167 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
168 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
169 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
170 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
171 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
172 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
174 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
175 Static void ohci_device_isoc_enter(usbd_xfer_handle);
177 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
178 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
180 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
181 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
183 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
184 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
185 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
186 Static void ohci_root_ctrl_close(usbd_pipe_handle);
187 Static void ohci_root_ctrl_done(usbd_xfer_handle);
189 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
190 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
191 Static void ohci_root_intr_abort(usbd_xfer_handle);
192 Static void ohci_root_intr_close(usbd_pipe_handle);
193 Static void ohci_root_intr_done(usbd_xfer_handle);
195 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
196 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
197 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
198 Static void ohci_device_ctrl_close(usbd_pipe_handle);
199 Static void ohci_device_ctrl_done(usbd_xfer_handle);
201 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
202 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
203 Static void ohci_device_bulk_abort(usbd_xfer_handle);
204 Static void ohci_device_bulk_close(usbd_pipe_handle);
205 Static void ohci_device_bulk_done(usbd_xfer_handle);
207 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
208 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
209 Static void ohci_device_intr_abort(usbd_xfer_handle);
210 Static void ohci_device_intr_close(usbd_pipe_handle);
211 Static void ohci_device_intr_done(usbd_xfer_handle);
213 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
214 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
215 Static void ohci_device_isoc_abort(usbd_xfer_handle);
216 Static void ohci_device_isoc_close(usbd_pipe_handle);
217 Static void ohci_device_isoc_done(usbd_xfer_handle);
219 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
220 struct ohci_pipe *pipe, int ival);
222 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
224 Static void ohci_timeout(void *);
225 Static void ohci_timeout_task(void *);
226 Static void ohci_rhsc_able(ohci_softc_t *, int);
227 Static void ohci_rhsc_enable(void *);
229 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
230 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
232 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
233 Static void ohci_noop(usbd_pipe_handle pipe);
235 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
238 Static void ohci_dumpregs(ohci_softc_t *);
239 Static void ohci_dump_tds(ohci_soft_td_t *);
240 Static void ohci_dump_td(ohci_soft_td_t *);
241 Static void ohci_dump_ed(ohci_soft_ed_t *);
242 Static void ohci_dump_itd(ohci_soft_itd_t *);
243 Static void ohci_dump_itds(ohci_soft_itd_t *);
246 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
247 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
248 #define OWRITE1(sc, r, x) \
249 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
250 #define OWRITE2(sc, r, x) \
251 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
252 #define OWRITE4(sc, r, x) \
253 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
254 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
255 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
256 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
258 /* Reverse the bits in a value 0 .. 31 */
259 Static u_int8_t revbits[OHCI_NO_INTRS] =
260 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
261 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
262 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
263 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
266 struct usbd_pipe pipe;
271 ohci_soft_itd_t *itd;
273 /* Info needed for different pipe kinds. */
279 ohci_soft_td_t *setup, *data, *stat;
298 #define OHCI_INTR_ENDPT 1
300 Static struct usbd_bus_methods ohci_bus_methods = {
310 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
311 ohci_root_ctrl_transfer,
312 ohci_root_ctrl_start,
313 ohci_root_ctrl_abort,
314 ohci_root_ctrl_close,
319 Static struct usbd_pipe_methods ohci_root_intr_methods = {
320 ohci_root_intr_transfer,
321 ohci_root_intr_start,
322 ohci_root_intr_abort,
323 ohci_root_intr_close,
328 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
329 ohci_device_ctrl_transfer,
330 ohci_device_ctrl_start,
331 ohci_device_ctrl_abort,
332 ohci_device_ctrl_close,
334 ohci_device_ctrl_done,
337 Static struct usbd_pipe_methods ohci_device_intr_methods = {
338 ohci_device_intr_transfer,
339 ohci_device_intr_start,
340 ohci_device_intr_abort,
341 ohci_device_intr_close,
342 ohci_device_clear_toggle,
343 ohci_device_intr_done,
346 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
347 ohci_device_bulk_transfer,
348 ohci_device_bulk_start,
349 ohci_device_bulk_abort,
350 ohci_device_bulk_close,
351 ohci_device_clear_toggle,
352 ohci_device_bulk_done,
355 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
356 ohci_device_isoc_transfer,
357 ohci_device_isoc_start,
358 ohci_device_isoc_abort,
359 ohci_device_isoc_close,
361 ohci_device_isoc_done,
364 #if defined(__NetBSD__) || defined(__OpenBSD__)
366 ohci_activate(device_ptr_t self, enum devact act)
368 struct ohci_softc *sc = (struct ohci_softc *)self;
375 case DVACT_DEACTIVATE:
376 if (sc->sc_child != NULL)
377 rv = config_deactivate(sc->sc_child);
386 ohci_detach(struct ohci_softc *sc, int flags)
390 #if defined(__NetBSD__) || defined(__OpenBSD__)
391 if (sc->sc_child != NULL)
392 rv = config_detach(sc->sc_child, flags);
398 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
400 #if defined(__NetBSD__) || defined(__OpenBSD__)
401 powerhook_disestablish(sc->sc_powerhook);
402 shutdownhook_disestablish(sc->sc_shutdownhook);
405 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
406 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
408 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
410 for (i = 0; i < OHCI_NO_EDS; i++)
411 ohci_free_sed(sc, sc->sc_eds[i]);
412 ohci_free_sed(sc, sc->sc_isoc_head);
413 ohci_free_sed(sc, sc->sc_bulk_head);
414 ohci_free_sed(sc, sc->sc_ctrl_head);
415 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
421 ohci_alloc_sed(ohci_softc_t *sc)
428 if (sc->sc_freeeds == NULL) {
429 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
430 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
431 OHCI_ED_ALIGN, &dma);
434 for(i = 0; i < OHCI_SED_CHUNK; i++) {
435 offs = i * OHCI_SED_SIZE;
436 sed = KERNADDR(&dma, offs);
437 sed->physaddr = DMAADDR(&dma, offs);
438 sed->next = sc->sc_freeeds;
439 sc->sc_freeeds = sed;
442 sed = sc->sc_freeeds;
443 sc->sc_freeeds = sed->next;
444 memset(&sed->ed, 0, sizeof(ohci_ed_t));
450 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
452 sed->next = sc->sc_freeeds;
453 sc->sc_freeeds = sed;
457 ohci_alloc_std(ohci_softc_t *sc)
465 if (sc->sc_freetds == NULL) {
466 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
467 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
468 OHCI_TD_ALIGN, &dma);
472 for(i = 0; i < OHCI_STD_CHUNK; i++) {
473 offs = i * OHCI_STD_SIZE;
474 std = KERNADDR(&dma, offs);
475 std->physaddr = DMAADDR(&dma, offs);
476 std->nexttd = sc->sc_freetds;
477 sc->sc_freetds = std;
483 std = sc->sc_freetds;
484 sc->sc_freetds = std->nexttd;
485 memset(&std->td, 0, sizeof(ohci_td_t));
488 ohci_hash_add_td(sc, std);
495 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
500 ohci_hash_rem_td(sc, std);
501 std->nexttd = sc->sc_freetds;
502 sc->sc_freetds = std;
507 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
508 int alen, int rd, usbd_xfer_handle xfer,
509 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
511 ohci_soft_td_t *next, *cur;
512 ohci_physaddr_t dataphys;
516 usb_dma_t *dma = &xfer->dmabuf;
517 u_int16_t flags = xfer->flags;
519 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
525 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
526 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
527 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
530 next = ohci_alloc_std(sc);
534 dataphys = DMAADDR(dma, offset);
537 * The OHCI hardware can handle at most one 4k crossing.
538 * XXX - currently we only allocate contigous buffers, but
539 * the OHCI spec says: If during the data transfer the buffer
540 * address contained in the HC's working copy of
541 * CurrentBufferPointer crosses a 4K boundary, the upper 20
542 * bits of Buffer End are copied to the working value of
543 * CurrentBufferPointer causing the next buffer address to
544 * be the 0th byte in the same 4K page that contains the
545 * last byte of the buffer (the 4K boundary crossing may
546 * occur within a data packet transfer.)
548 * If/when dma has multiple segments, this will need to
549 * properly handle fragmenting TD's.
551 * Note that if we are gathering data from multiple SMALL
552 * segments, e.g. mbufs, we need to do special gymnastics,
553 * e.g. bounce buffering or data aggregation,
554 * BEFORE WE GET HERE because a bulk USB transfer must
555 * consist of maximally sized packets right up to the end.
556 * A shorter than maximal packet means that it is the end
557 * of the transfer. If the data transfer length is a
558 * multiple of the packet size, then a 0 byte
559 * packet will be the signal of the end of transfer.
560 * Since packets can't cross TDs this means that
561 * each TD except the last one must cover an exact multiple
562 * of the maximal packet length.
564 if (OHCI_PAGE_OFFSET(dataphys) + len <= (2 * OHCI_PAGE_SIZE)) {
565 /* We can handle all that remains in this TD */
568 /* must use multiple TDs, fill as much as possible. */
569 curlen = 2 * OHCI_PAGE_SIZE -
570 OHCI_PAGE_OFFSET(dataphys);
571 /* the length must be a multiple of the max size */
573 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
574 KASSERT((curlen != 0), ("ohci_alloc_std: curlen == 0"));
576 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
577 "len=%d curlen=%d\n",
578 dataphys, len, curlen));
581 cur->td.td_flags = tdflags;
582 cur->td.td_cbp = htole32(dataphys);
584 cur->td.td_nexttd = htole32(next->physaddr);
585 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
587 cur->flags = OHCI_ADD_LEN;
589 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
590 dataphys, dataphys + curlen - 1));
594 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
596 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
600 if ((flags & USBD_FORCE_SHORT_XFER) &&
601 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
602 /* Force a 0 length transfer at the end. */
606 next = ohci_alloc_std(sc);
610 cur->td.td_flags = tdflags;
611 cur->td.td_cbp = 0; /* indicate 0 length packet */
613 cur->td.td_nexttd = htole32(next->physaddr);
618 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
622 return (USBD_NORMAL_COMPLETION);
631 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
632 ohci_soft_td_t *stdend)
636 for (; std != stdend; std = p) {
638 ohci_free_std(sc, std);
644 ohci_alloc_sitd(ohci_softc_t *sc)
646 ohci_soft_itd_t *sitd;
651 if (sc->sc_freeitds == NULL) {
652 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
653 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
654 OHCI_ITD_ALIGN, &dma);
658 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
659 offs = i * OHCI_SITD_SIZE;
660 sitd = KERNADDR(&dma, offs);
661 sitd->physaddr = DMAADDR(&dma, offs);
662 sitd->nextitd = sc->sc_freeitds;
663 sc->sc_freeitds = sitd;
669 sitd = sc->sc_freeitds;
670 sc->sc_freeitds = sitd->nextitd;
671 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
672 sitd->nextitd = NULL;
674 ohci_hash_add_itd(sc, sitd);
685 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
689 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
693 panic("ohci_free_sitd: sitd=%p not done", sitd);
696 /* Warn double free */
701 ohci_hash_rem_itd(sc, sitd);
702 sitd->nextitd = sc->sc_freeitds;
703 sc->sc_freeitds = sitd;
708 ohci_init(ohci_softc_t *sc)
710 ohci_soft_ed_t *sed, *psed;
715 DPRINTF(("ohci_init: start\n"));
716 #if defined(__OpenBSD__)
719 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
721 rev = OREAD4(sc, OHCI_REVISION);
722 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
723 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
725 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
726 printf("%s: unsupported OHCI revision\n",
727 USBDEVNAME(sc->sc_bus.bdev));
728 sc->sc_bus.usbrev = USBREV_UNKNOWN;
731 sc->sc_bus.usbrev = USBREV_1_0;
733 for (i = 0; i < OHCI_HASH_SIZE; i++)
734 LIST_INIT(&sc->sc_hash_tds[i]);
735 for (i = 0; i < OHCI_HASH_SIZE; i++)
736 LIST_INIT(&sc->sc_hash_itds[i]);
738 SIMPLEQ_INIT(&sc->sc_free_xfers);
740 /* XXX determine alignment by R/W */
741 /* Allocate the HCCA area. */
742 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
743 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
746 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
747 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
749 sc->sc_eintrs = OHCI_NORMAL_INTRS;
751 /* Allocate dummy ED that starts the control list. */
752 sc->sc_ctrl_head = ohci_alloc_sed(sc);
753 if (sc->sc_ctrl_head == NULL) {
757 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
759 /* Allocate dummy ED that starts the bulk list. */
760 sc->sc_bulk_head = ohci_alloc_sed(sc);
761 if (sc->sc_bulk_head == NULL) {
765 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
767 /* Allocate dummy ED that starts the isochronous list. */
768 sc->sc_isoc_head = ohci_alloc_sed(sc);
769 if (sc->sc_isoc_head == NULL) {
773 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
775 /* Allocate all the dummy EDs that make up the interrupt tree. */
776 for (i = 0; i < OHCI_NO_EDS; i++) {
777 sed = ohci_alloc_sed(sc);
780 ohci_free_sed(sc, sc->sc_eds[i]);
784 /* All ED fields are set to 0. */
786 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
788 psed = sc->sc_eds[(i-1) / 2];
790 psed= sc->sc_isoc_head;
792 sed->ed.ed_nexted = htole32(psed->physaddr);
795 * Fill HCCA interrupt table. The bit reversal is to get
796 * the tree set up properly to spread the interrupts.
798 for (i = 0; i < OHCI_NO_INTRS; i++)
799 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
800 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
803 if (ohcidebug > 15) {
804 for (i = 0; i < OHCI_NO_EDS; i++) {
806 ohci_dump_ed(sc->sc_eds[i]);
809 ohci_dump_ed(sc->sc_isoc_head);
813 err = ohci_controller_init(sc);
814 if (err != USBD_NORMAL_COMPLETION)
817 /* Set up the bus struct. */
818 sc->sc_bus.methods = &ohci_bus_methods;
819 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
821 #if defined(__NetBSD__) || defined(__OpenBSD__)
822 sc->sc_control = sc->sc_intre = 0;
823 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
824 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
827 usb_callout_init(sc->sc_tmo_rhsc);
829 return (USBD_NORMAL_COMPLETION);
832 for (i = 0; i < OHCI_NO_EDS; i++)
833 ohci_free_sed(sc, sc->sc_eds[i]);
835 ohci_free_sed(sc, sc->sc_isoc_head);
837 ohci_free_sed(sc, sc->sc_bulk_head);
839 ohci_free_sed(sc, sc->sc_ctrl_head);
841 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
846 ohci_controller_init(ohci_softc_t *sc)
849 u_int32_t s, ctl, ival, hcr, fm, per, desca;
851 /* Determine in what context we are running. */
852 ctl = OREAD4(sc, OHCI_CONTROL);
854 /* SMM active, request change */
855 DPRINTF(("ohci_init: SMM active, request owner change\n"));
856 s = OREAD4(sc, OHCI_COMMAND_STATUS);
857 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
858 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
859 usb_delay_ms(&sc->sc_bus, 1);
860 ctl = OREAD4(sc, OHCI_CONTROL);
862 if ((ctl & OHCI_IR) == 0) {
863 printf("%s: SMM does not respond, resetting\n",
864 USBDEVNAME(sc->sc_bus.bdev));
865 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
869 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
870 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
871 /* BIOS started controller. */
872 DPRINTF(("ohci_init: BIOS active\n"));
873 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
874 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
875 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
879 DPRINTF(("ohci_init: cold started\n"));
881 /* Controller was cold started. */
882 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
886 * This reset should not be necessary according to the OHCI spec, but
887 * without it some controllers do not start.
889 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
890 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
891 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
893 /* We now own the host controller and the bus has been reset. */
894 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
896 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
897 /* Nominal time for a reset is 10 us. */
898 for (i = 0; i < 10; i++) {
900 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
905 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
906 return (USBD_IOERROR);
913 /* The controller is now in SUSPEND state, we have 2ms to finish. */
915 /* Set up HC registers. */
916 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
917 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
918 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
919 /* disable all interrupts and then switch on all desired interrupts */
920 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
921 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
922 /* switch on desired functional features */
923 ctl = OREAD4(sc, OHCI_CONTROL);
924 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
925 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
926 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
927 /* And finally start it! */
928 OWRITE4(sc, OHCI_CONTROL, ctl);
931 * The controller is now OPERATIONAL. Set a some final
932 * registers that should be set earlier, but that the
933 * controller ignores when in the SUSPEND state.
935 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
936 fm |= OHCI_FSMPS(ival) | ival;
937 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
938 per = OHCI_PERIODIC(ival); /* 90% periodic */
939 OWRITE4(sc, OHCI_PERIODIC_START, per);
941 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
942 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
943 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
944 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
945 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
946 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
949 * The AMD756 requires a delay before re-reading the register,
950 * otherwise it will occasionally report 0 ports.
953 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
954 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
955 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
962 return (USBD_NORMAL_COMPLETION);
966 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
968 return (usb_allocmem(bus, size, 0, dma));
972 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
974 usb_freemem(bus, dma);
978 ohci_allocx(struct usbd_bus *bus)
980 struct ohci_softc *sc = (struct ohci_softc *)bus;
981 usbd_xfer_handle xfer;
983 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
985 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
987 if (xfer->busy_free != XFER_FREE) {
988 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
993 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
996 memset(xfer, 0, sizeof (struct ohci_xfer));
997 usb_init_task(&OXFER(xfer)->abort_task, ohci_timeout_task,
999 OXFER(xfer)->ohci_xfer_flags = 0;
1001 xfer->busy_free = XFER_BUSY;
1008 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1010 struct ohci_softc *sc = (struct ohci_softc *)bus;
1011 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
1012 ohci_soft_itd_t *sitd;
1014 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
1015 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
1016 sitd = sitd->nextitd)
1017 ohci_free_sitd(sc, sitd);
1021 if (xfer->busy_free != XFER_BUSY) {
1022 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1026 xfer->busy_free = XFER_FREE;
1028 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1032 * Shut down the controller when the system is going down.
1035 ohci_shutdown(void *v)
1037 ohci_softc_t *sc = v;
1039 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1040 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1044 * Handle suspend/resume.
1046 * We need to switch to polling mode here, because this routine is
1047 * called from an intterupt context. This is all right since we
1048 * are almost suspended anyway.
1051 ohci_power(int why, void *v)
1053 ohci_softc_t *sc = v;
1058 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1063 if (why != PWR_RESUME) {
1064 sc->sc_bus.use_polling++;
1065 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1066 if (sc->sc_control == 0) {
1068 * Preserve register values, in case that APM BIOS
1069 * does not recover them.
1071 sc->sc_control = ctl;
1072 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1074 ctl |= OHCI_HCFS_SUSPEND;
1075 OWRITE4(sc, OHCI_CONTROL, ctl);
1076 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1077 sc->sc_bus.use_polling--;
1079 sc->sc_bus.use_polling++;
1081 /* Some broken BIOSes never initialize Controller chip */
1082 ohci_controller_init(sc);
1085 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1086 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1088 ctl = sc->sc_control;
1090 ctl = OREAD4(sc, OHCI_CONTROL);
1091 ctl |= OHCI_HCFS_RESUME;
1092 OWRITE4(sc, OHCI_CONTROL, ctl);
1093 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1094 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1095 OWRITE4(sc, OHCI_CONTROL, ctl);
1096 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1097 sc->sc_control = sc->sc_intre = 0;
1098 sc->sc_bus.use_polling--;
1105 ohci_dumpregs(ohci_softc_t *sc)
1107 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1108 OREAD4(sc, OHCI_REVISION),
1109 OREAD4(sc, OHCI_CONTROL),
1110 OREAD4(sc, OHCI_COMMAND_STATUS)));
1111 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1112 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1113 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1114 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1115 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1116 OREAD4(sc, OHCI_HCCA),
1117 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1118 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1119 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1120 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1121 OREAD4(sc, OHCI_BULK_HEAD_ED),
1122 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1123 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1124 OREAD4(sc, OHCI_DONE_HEAD),
1125 OREAD4(sc, OHCI_FM_INTERVAL),
1126 OREAD4(sc, OHCI_FM_REMAINING)));
1127 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1128 OREAD4(sc, OHCI_FM_NUMBER),
1129 OREAD4(sc, OHCI_PERIODIC_START),
1130 OREAD4(sc, OHCI_LS_THRESHOLD)));
1131 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1132 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1133 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1134 OREAD4(sc, OHCI_RH_STATUS)));
1135 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1136 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1137 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1138 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1139 le32toh(sc->sc_hcca->hcca_frame_number),
1140 le32toh(sc->sc_hcca->hcca_done_head)));
1144 Static int ohci_intr1(ohci_softc_t *);
1149 ohci_softc_t *sc = p;
1151 if (sc == NULL || sc->sc_dying)
1154 /* If we get an interrupt while polling, then just ignore it. */
1155 if (sc->sc_bus.use_polling) {
1157 printf("ohci_intr: ignored interrupt while polling\n");
1162 return (ohci_intr1(sc));
1166 ohci_intr1(ohci_softc_t *sc)
1168 u_int32_t intrs, eintrs;
1169 ohci_physaddr_t done;
1171 DPRINTFN(14,("ohci_intr1: enter\n"));
1173 /* In case the interrupt occurs before initialization has completed. */
1174 if (sc == NULL || sc->sc_hcca == NULL) {
1176 printf("ohci_intr: sc->sc_hcca == NULL\n");
1182 done = le32toh(sc->sc_hcca->hcca_done_head);
1184 /* The LSb of done is used to inform the HC Driver that an interrupt
1185 * condition exists for both the Done list and for another event
1186 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1187 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1188 * interrupt was caused by other than the HccaDoneHead update and the
1189 * HcInterruptStatus register needs to be accessed to determine that
1190 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1191 * update interrupt is indicated and if the LSb of done is nonzero,
1192 * then an additional interrupt event is indicated and
1193 * HcInterruptStatus should be checked to determine its cause.
1196 if (done & ~OHCI_DONE_INTRS)
1198 if (done & OHCI_DONE_INTRS) {
1199 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1200 done &= ~OHCI_DONE_INTRS;
1202 sc->sc_hcca->hcca_done_head = 0;
1204 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1206 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1210 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1211 eintrs = intrs & sc->sc_eintrs;
1215 sc->sc_bus.intr_context++;
1216 sc->sc_bus.no_intrs++;
1217 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1218 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1221 if (eintrs & OHCI_SO) {
1222 sc->sc_overrun_cnt++;
1223 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1224 printf("%s: %u scheduling overruns\n",
1225 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1226 sc->sc_overrun_cnt = 0;
1231 if (eintrs & OHCI_WDH) {
1232 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1233 usb_schedsoftintr(&sc->sc_bus);
1234 eintrs &= ~OHCI_WDH;
1236 if (eintrs & OHCI_RD) {
1237 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1238 /* XXX process resume detect */
1240 if (eintrs & OHCI_UE) {
1241 printf("%s: unrecoverable error, controller halted\n",
1242 USBDEVNAME(sc->sc_bus.bdev));
1243 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1246 if (eintrs & OHCI_RHSC) {
1247 ohci_rhsc(sc, sc->sc_intrxfer);
1249 * Disable RHSC interrupt for now, because it will be
1250 * on until the port has been reset.
1252 ohci_rhsc_able(sc, 0);
1253 /* Do not allow RHSC interrupts > 1 per second */
1254 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1255 eintrs &= ~OHCI_RHSC;
1258 sc->sc_bus.intr_context--;
1261 /* Block unprocessed interrupts. XXX */
1262 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1263 sc->sc_eintrs &= ~eintrs;
1264 printf("%s: blocking intrs 0x%x\n",
1265 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1272 ohci_rhsc_able(ohci_softc_t *sc, int on)
1274 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1276 sc->sc_eintrs |= OHCI_RHSC;
1277 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1279 sc->sc_eintrs &= ~OHCI_RHSC;
1280 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1285 ohci_rhsc_enable(void *v_sc)
1287 ohci_softc_t *sc = v_sc;
1291 ohci_rhsc_able(sc, 1);
1296 char *ohci_cc_strs[] = {
1300 "DATA_TOGGLE_MISMATCH",
1302 "DEVICE_NOT_RESPONDING",
1303 "PID_CHECK_FAILURE",
1317 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1319 ohci_soft_itd_t *sitd, *sidone, **ip;
1320 ohci_soft_td_t *std, *sdone, **p;
1322 /* Reverse the done list. */
1323 for (sdone = NULL, sidone = NULL; done != 0; ) {
1324 std = ohci_hash_find_td(sc, done);
1327 done = le32toh(std->td.td_nexttd);
1329 DPRINTFN(10,("add TD %p\n", std));
1332 sitd = ohci_hash_find_itd(sc, done);
1334 sitd->dnext = sidone;
1335 done = le32toh(sitd->itd.itd_nextitd);
1337 DPRINTFN(5,("add ITD %p\n", sitd));
1340 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1343 /* sdone & sidone now hold the done lists. */
1344 /* Put them on the already processed lists. */
1345 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1348 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1354 ohci_softintr(void *v)
1356 ohci_softc_t *sc = v;
1357 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1358 ohci_soft_td_t *std, *sdone, *stdnext;
1359 usbd_xfer_handle xfer;
1360 struct ohci_pipe *opipe;
1364 DPRINTFN(10,("ohci_softintr: enter\n"));
1366 sc->sc_bus.intr_context++;
1369 sdone = sc->sc_sdone;
1370 sc->sc_sdone = NULL;
1371 sidone = sc->sc_sidone;
1372 sc->sc_sidone = NULL;
1375 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1378 if (ohcidebug > 10) {
1379 DPRINTF(("ohci_process_done: TD done:\n"));
1380 ohci_dump_tds(sdone);
1384 for (std = sdone; std; std = stdnext) {
1386 stdnext = std->dnext;
1387 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1388 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1389 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1391 * xfer == NULL: There seems to be no xfer associated
1392 * with this TD. It is tailp that happened to end up on
1394 * flags & OHCI_TD_HANDLED: The TD has already been
1395 * handled by process_done and should not be done again.
1396 * Shouldn't happen, but some chips are broken(?).
1400 if (xfer->status == USBD_CANCELLED ||
1401 xfer->status == USBD_TIMEOUT) {
1402 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1404 /* Handled by abort routine. */
1407 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1408 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1409 &OXFER(xfer)->abort_task);
1412 if (std->td.td_cbp != 0)
1413 len -= le32toh(std->td.td_be) -
1414 le32toh(std->td.td_cbp) + 1;
1415 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1417 if (std->flags & OHCI_ADD_LEN)
1418 xfer->actlen += len;
1420 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1421 if (cc == OHCI_CC_NO_ERROR) {
1422 if (std->flags & OHCI_CALL_DONE) {
1423 xfer->status = USBD_NORMAL_COMPLETION;
1425 usb_transfer_complete(xfer);
1428 ohci_free_std(sc, std);
1431 * Endpoint is halted. First unlink all the TDs
1432 * belonging to the failed transfer, and then restart
1435 ohci_soft_td_t *p, *n;
1436 opipe = (struct ohci_pipe *)xfer->pipe;
1438 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1439 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1440 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1443 /* Mark all the TDs in the done queue for the current
1446 for (p = stdnext; p; p = p->dnext) {
1447 if (p->xfer == xfer)
1448 p->flags |= OHCI_TD_HANDLED;
1452 for (p = std; p->xfer == xfer; p = n) {
1454 ohci_free_std(sc, p);
1458 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1459 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1461 if (cc == OHCI_CC_STALL)
1462 xfer->status = USBD_STALLED;
1464 xfer->status = USBD_IOERROR;
1466 usb_transfer_complete(xfer);
1472 if (ohcidebug > 10) {
1473 DPRINTF(("ohci_softintr: ITD done:\n"));
1474 ohci_dump_itds(sidone);
1478 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1480 sitdnext = sitd->dnext;
1481 sitd->flags |= OHCI_ITD_INTFIN;
1482 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1483 sitd, xfer, xfer ? xfer->hcpriv : 0));
1486 if (xfer->status == USBD_CANCELLED ||
1487 xfer->status == USBD_TIMEOUT) {
1488 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1490 /* Handled by abort routine. */
1494 if (xfer->pipe->aborting)
1495 continue; /*Ignore.*/
1498 printf("ohci_softintr: sitd=%p is done\n", sitd);
1501 opipe = (struct ohci_pipe *)xfer->pipe;
1502 if (opipe->aborting)
1505 if (sitd->flags & OHCI_CALL_DONE) {
1506 ohci_soft_itd_t *next;
1508 opipe->u.iso.inuse -= xfer->nframes;
1509 xfer->status = USBD_NORMAL_COMPLETION;
1510 for (i = 0, sitd = xfer->hcpriv;;sitd = next) {
1511 next = sitd->nextitd;
1512 if (OHCI_ITD_GET_CC(sitd->itd.itd_flags) != OHCI_CC_NO_ERROR)
1513 xfer->status = USBD_IOERROR;
1515 if (xfer->status == USBD_NORMAL_COMPLETION) {
1516 iframes = OHCI_ITD_GET_FC(sitd->itd.itd_flags);
1517 for (j = 0; j < iframes; i++, j++) {
1518 len = le16toh(sitd->itd.itd_offset[j]);
1520 (OHCI_ITD_PSW_GET_CC(len) ==
1521 OHCI_CC_NOT_ACCESSED) ? 0 :
1522 OHCI_ITD_PSW_LENGTH(len);
1523 xfer->frlengths[i] = len;
1526 if (sitd->flags & OHCI_CALL_DONE)
1531 usb_transfer_complete(xfer);
1536 #ifdef USB_USE_SOFTINTR
1537 if (sc->sc_softwake) {
1538 sc->sc_softwake = 0;
1539 wakeup(&sc->sc_softwake);
1541 #endif /* USB_USE_SOFTINTR */
1543 sc->sc_bus.intr_context--;
1544 DPRINTFN(10,("ohci_softintr: done:\n"));
1548 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1550 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1553 if (!(xfer->rqflags & URQ_REQUEST)) {
1554 panic("ohci_device_ctrl_done: not a request");
1557 xfer->hcpriv = NULL;
1561 ohci_device_intr_done(usbd_xfer_handle xfer)
1563 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1564 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1565 ohci_soft_ed_t *sed = opipe->sed;
1566 ohci_soft_td_t *data, *tail;
1569 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1570 xfer, xfer->actlen));
1572 xfer->hcpriv = NULL;
1574 if (xfer->pipe->repeat) {
1575 data = opipe->tail.td;
1576 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1578 xfer->status = USBD_NOMEM;
1583 data->td.td_flags = htole32(
1584 OHCI_TD_IN | OHCI_TD_NOCC |
1585 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1586 if (xfer->flags & USBD_SHORT_XFER_OK)
1587 data->td.td_flags |= htole32(OHCI_TD_R);
1588 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1589 data->nexttd = tail;
1590 data->td.td_nexttd = htole32(tail->physaddr);
1591 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1593 data->len = xfer->length;
1595 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1596 xfer->hcpriv = data;
1599 sed->ed.ed_tailp = htole32(tail->physaddr);
1600 opipe->tail.td = tail;
1605 ohci_device_bulk_done(usbd_xfer_handle xfer)
1607 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1608 xfer, xfer->actlen));
1610 xfer->hcpriv = NULL;
1614 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1616 usbd_pipe_handle pipe;
1621 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1622 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1623 sc, xfer, hstatus));
1626 /* Just ignore the change. */
1632 p = KERNADDR(&xfer->dmabuf, 0);
1633 m = min(sc->sc_noport, xfer->length * 8 - 1);
1634 memset(p, 0, xfer->length);
1635 for (i = 1; i <= m; i++) {
1636 /* Pick out CHANGE bits from the status reg. */
1637 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1638 p[i/8] |= 1 << (i%8);
1640 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1641 xfer->actlen = xfer->length;
1642 xfer->status = USBD_NORMAL_COMPLETION;
1644 usb_transfer_complete(xfer);
1648 ohci_root_intr_done(usbd_xfer_handle xfer)
1650 xfer->hcpriv = NULL;
1654 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1656 xfer->hcpriv = NULL;
1660 * Wait here until controller claims to have an interrupt.
1661 * Then call ohci_intr and return. Use timeout to avoid waiting
1665 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1667 int timo = xfer->timeout;
1671 xfer->status = USBD_IN_PROGRESS;
1672 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1673 usb_delay_ms(&sc->sc_bus, 1);
1676 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1677 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1684 if (xfer->status != USBD_IN_PROGRESS)
1690 DPRINTF(("ohci_waitintr: timeout\n"));
1691 xfer->status = USBD_TIMEOUT;
1692 usb_transfer_complete(xfer);
1693 /* XXX should free TD */
1697 ohci_poll(struct usbd_bus *bus)
1699 ohci_softc_t *sc = (ohci_softc_t *)bus;
1703 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1705 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1710 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1715 ohci_device_request(usbd_xfer_handle xfer)
1717 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1718 usb_device_request_t *req = &xfer->request;
1719 usbd_device_handle dev = opipe->pipe.device;
1720 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1721 int addr = dev->address;
1722 ohci_soft_td_t *setup, *stat, *next, *tail;
1723 ohci_soft_ed_t *sed;
1729 isread = req->bmRequestType & UT_READ;
1730 len = UGETW(req->wLength);
1732 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1733 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1734 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1735 UGETW(req->wIndex), len, addr,
1736 opipe->pipe.endpoint->edesc->bEndpointAddress));
1738 setup = opipe->tail.td;
1739 stat = ohci_alloc_std(sc);
1744 tail = ohci_alloc_std(sc);
1752 opipe->u.ctl.length = len;
1754 /* Update device address and length since they may have changed
1755 during the setup of the control pipe in usbd_new_device(). */
1756 /* XXX This only needs to be done once, but it's too early in open. */
1757 /* XXXX Should not touch ED here! */
1758 sed->ed.ed_flags = htole32(
1759 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1760 OHCI_ED_SET_FA(addr) |
1761 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1765 /* Set up data transaction */
1767 ohci_soft_td_t *std = stat;
1769 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1771 stat = stat->nexttd; /* point at free TD */
1774 /* Start toggle at 1 and then use the carried toggle. */
1775 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1776 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1779 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1781 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1782 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1783 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1784 setup->nexttd = next;
1785 setup->td.td_nexttd = htole32(next->physaddr);
1786 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1790 xfer->hcpriv = setup;
1792 stat->td.td_flags = htole32(
1793 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1794 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1795 stat->td.td_cbp = 0;
1796 stat->nexttd = tail;
1797 stat->td.td_nexttd = htole32(tail->physaddr);
1799 stat->flags = OHCI_CALL_DONE;
1804 if (ohcidebug > 5) {
1805 DPRINTF(("ohci_device_request:\n"));
1807 ohci_dump_tds(setup);
1811 /* Insert ED in schedule */
1813 sed->ed.ed_tailp = htole32(tail->physaddr);
1814 opipe->tail.td = tail;
1815 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1816 if (xfer->timeout && !sc->sc_bus.use_polling) {
1817 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1818 ohci_timeout, xfer);
1823 if (ohcidebug > 20) {
1825 DPRINTF(("ohci_device_request: status=%x\n",
1826 OREAD4(sc, OHCI_COMMAND_STATUS)));
1828 printf("ctrl head:\n");
1829 ohci_dump_ed(sc->sc_ctrl_head);
1832 ohci_dump_tds(setup);
1836 return (USBD_NORMAL_COMPLETION);
1839 ohci_free_std(sc, tail);
1841 ohci_free_std(sc, stat);
1847 * Add an ED to the schedule. Called at splusb().
1850 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1852 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1855 sed->next = head->next;
1856 sed->ed.ed_nexted = head->ed.ed_nexted;
1858 head->ed.ed_nexted = htole32(sed->physaddr);
1862 * Remove an ED from the schedule. Called at splusb().
1865 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1872 for (p = head; p != NULL && p->next != sed; p = p->next)
1875 panic("ohci_rem_ed: ED not found");
1876 p->next = sed->next;
1877 p->ed.ed_nexted = sed->ed.ed_nexted;
1881 * When a transfer is completed the TD is added to the done queue by
1882 * the host controller. This queue is the processed by software.
1883 * Unfortunately the queue contains the physical address of the TD
1884 * and we have no simple way to translate this back to a kernel address.
1885 * To make the translation possible (and fast) we use a hash table of
1886 * TDs currently in the schedule. The physical address is used as the
1890 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1891 /* Called at splusb() */
1893 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1895 int h = HASH(std->physaddr);
1899 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1902 /* Called at splusb() */
1904 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1908 LIST_REMOVE(std, hnext);
1912 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1915 ohci_soft_td_t *std;
1917 /* if these are present they should be masked out at an earlier
1920 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1921 USBDEVNAME(sc->sc_bus.bdev),
1922 (int) a, "\20\1HALT\2TOGGLE"));
1924 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1926 std = LIST_NEXT(std, hnext))
1927 if (std->physaddr == a)
1930 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1931 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1935 /* Called at splusb() */
1937 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1939 int h = HASH(sitd->physaddr);
1943 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1944 sitd, (u_long)sitd->physaddr));
1946 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1949 /* Called at splusb() */
1951 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1955 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1956 sitd, (u_long)sitd->physaddr));
1958 LIST_REMOVE(sitd, hnext);
1962 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1965 ohci_soft_itd_t *sitd;
1967 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1969 sitd = LIST_NEXT(sitd, hnext))
1970 if (sitd->physaddr == a)
1976 ohci_timeout(void *addr)
1978 struct ohci_xfer *oxfer = addr;
1979 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1980 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1982 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1985 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1989 /* Execute the abort in a process context. */
1990 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1994 ohci_timeout_task(void *addr)
1996 usbd_xfer_handle xfer = addr;
1999 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2002 ohci_abort_xfer(xfer, USBD_TIMEOUT);
2008 ohci_dump_tds(ohci_soft_td_t *std)
2010 for (; std; std = std->nexttd)
2015 ohci_dump_td(ohci_soft_td_t *std)
2019 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
2020 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2021 sbuf, sizeof(sbuf));
2023 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2024 "nexttd=0x%08lx be=0x%08lx\n",
2025 std, (u_long)std->physaddr, sbuf,
2026 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2027 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2028 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2029 (u_long)le32toh(std->td.td_cbp),
2030 (u_long)le32toh(std->td.td_nexttd),
2031 (u_long)le32toh(std->td.td_be));
2035 ohci_dump_itd(ohci_soft_itd_t *sitd)
2039 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2040 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2041 sitd, (u_long)sitd->physaddr,
2042 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2043 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2044 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2045 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2046 (u_long)le32toh(sitd->itd.itd_bp0),
2047 (u_long)le32toh(sitd->itd.itd_nextitd),
2048 (u_long)le32toh(sitd->itd.itd_be));
2049 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2050 printf("offs[%d]=0x%04x ", i,
2051 (u_int)le16toh(sitd->itd.itd_offset[i]));
2056 ohci_dump_itds(ohci_soft_itd_t *sitd)
2058 for (; sitd; sitd = sitd->nextitd)
2059 ohci_dump_itd(sitd);
2063 ohci_dump_ed(ohci_soft_ed_t *sed)
2065 char sbuf[128], sbuf2[128];
2067 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2068 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2069 sbuf, sizeof(sbuf));
2070 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2071 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2073 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2074 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2075 sed, (u_long)sed->physaddr,
2076 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2077 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2078 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2079 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2080 (u_long)le32toh(sed->ed.ed_headp),
2081 (u_long)le32toh(sed->ed.ed_nexted));
2086 ohci_open(usbd_pipe_handle pipe)
2088 usbd_device_handle dev = pipe->device;
2089 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2090 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2091 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2092 u_int8_t addr = dev->address;
2093 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2094 ohci_soft_ed_t *sed;
2095 ohci_soft_td_t *std;
2096 ohci_soft_itd_t *sitd;
2097 ohci_physaddr_t tdphys;
2103 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2104 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2107 return (USBD_IOERROR);
2112 if (addr == sc->sc_addr) {
2113 switch (ed->bEndpointAddress) {
2114 case USB_CONTROL_ENDPOINT:
2115 pipe->methods = &ohci_root_ctrl_methods;
2117 case UE_DIR_IN | OHCI_INTR_ENDPT:
2118 pipe->methods = &ohci_root_intr_methods;
2121 return (USBD_INVAL);
2124 sed = ohci_alloc_sed(sc);
2128 if (xfertype == UE_ISOCHRONOUS) {
2129 sitd = ohci_alloc_sitd(sc);
2132 opipe->tail.itd = sitd;
2133 opipe->aborting = 0;
2134 tdphys = sitd->physaddr;
2135 fmt = OHCI_ED_FORMAT_ISO;
2136 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2137 fmt |= OHCI_ED_DIR_IN;
2139 fmt |= OHCI_ED_DIR_OUT;
2141 std = ohci_alloc_std(sc);
2144 opipe->tail.td = std;
2145 tdphys = std->physaddr;
2146 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2148 sed->ed.ed_flags = htole32(
2149 OHCI_ED_SET_FA(addr) |
2150 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2151 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2153 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2154 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2158 pipe->methods = &ohci_device_ctrl_methods;
2159 err = usb_allocmem(&sc->sc_bus,
2160 sizeof(usb_device_request_t),
2161 0, &opipe->u.ctl.reqdma);
2165 ohci_add_ed(sed, sc->sc_ctrl_head);
2169 pipe->methods = &ohci_device_intr_methods;
2170 ival = pipe->interval;
2171 if (ival == USBD_DEFAULT_INTERVAL)
2172 ival = ed->bInterval;
2173 return (ohci_device_setintr(sc, opipe, ival));
2174 case UE_ISOCHRONOUS:
2175 pipe->methods = &ohci_device_isoc_methods;
2176 return (ohci_setup_isoc(pipe));
2178 pipe->methods = &ohci_device_bulk_methods;
2180 ohci_add_ed(sed, sc->sc_bulk_head);
2185 return (USBD_NORMAL_COMPLETION);
2189 ohci_free_std(sc, std);
2192 ohci_free_sed(sc, sed);
2194 return (USBD_NOMEM);
2199 * Close a reqular pipe.
2200 * Assumes that there are no pending transactions.
2203 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2205 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2206 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2207 ohci_soft_ed_t *sed = opipe->sed;
2212 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2213 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2214 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2215 ohci_soft_td_t *std;
2216 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2217 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2218 "tl=0x%x pipe=%p, std=%p\n", sed,
2219 (int)le32toh(sed->ed.ed_headp),
2220 (int)le32toh(sed->ed.ed_tailp),
2223 usbd_dump_pipe(&opipe->pipe);
2230 usb_delay_ms(&sc->sc_bus, 2);
2231 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2232 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2233 printf("ohci_close_pipe: pipe still not empty\n");
2236 ohci_rem_ed(sed, head);
2237 /* Make sure the host controller is not touching this ED */
2238 usb_delay_ms(&sc->sc_bus, 1);
2240 ohci_free_sed(sc, opipe->sed);
2244 * Abort a device request.
2245 * If this routine is called at splusb() it guarantees that the request
2246 * will be removed from the hardware scheduling and that the callback
2247 * for it will be called with USBD_CANCELLED status.
2248 * It's impossible to guarantee that the requested transfer will not
2249 * have happened since the hardware runs concurrently.
2250 * If the transaction has already happened we rely on the ordinary
2251 * interrupt processing to process it.
2254 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2256 struct ohci_xfer *oxfer = OXFER(xfer);
2257 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2258 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2259 ohci_soft_ed_t *sed = opipe->sed;
2260 ohci_soft_td_t *p, *n;
2261 ohci_physaddr_t headp;
2264 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2267 /* If we're dying, just do the software part. */
2269 xfer->status = status; /* make software ignore it */
2270 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2271 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2272 usb_transfer_complete(xfer);
2276 if (xfer->device->bus->intr_context || !curproc)
2277 panic("ohci_abort_xfer: not in process context");
2280 * If an abort is already in progress then just wait for it to
2281 * complete and return.
2283 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) {
2284 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2285 /* No need to wait if we're aborting from a timeout. */
2286 if (status == USBD_TIMEOUT)
2288 /* Override the status which might be USBD_TIMEOUT. */
2289 xfer->status = status;
2290 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2291 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTWAIT;
2292 while (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING)
2293 tsleep(&oxfer->ohci_xfer_flags, PZERO, "ohciaw", 0);
2298 * Step 1: Make interrupt routine and hardware ignore xfer.
2301 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTING;
2302 xfer->status = status; /* make software ignore it */
2303 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2304 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2306 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2307 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2310 * Step 2: Wait until we know hardware has finished any possible
2311 * use of the xfer. Also make sure the soft interrupt routine
2314 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2316 #ifdef USB_USE_SOFTINTR
2317 sc->sc_softwake = 1;
2318 #endif /* USB_USE_SOFTINTR */
2319 usb_schedsoftintr(&sc->sc_bus);
2320 #ifdef USB_USE_SOFTINTR
2321 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2322 #endif /* USB_USE_SOFTINTR */
2326 * Step 3: Remove any vestiges of the xfer from the hardware.
2327 * The complication here is that the hardware may have executed
2328 * beyond the xfer we're trying to abort. So as we're scanning
2329 * the TDs of this xfer we check if the hardware points to
2332 s = splusb(); /* XXX why? */
2336 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; /* XXX */
2338 printf("ohci_abort_xfer: hcpriv is NULL\n");
2343 if (ohcidebug > 1) {
2344 DPRINTF(("ohci_abort_xfer: sed=\n"));
2349 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2351 for (; p->xfer == xfer; p = n) {
2352 hit |= headp == p->physaddr;
2354 ohci_free_std(sc, p);
2356 /* Zap headp register if hardware pointed inside the xfer. */
2358 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2359 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2360 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2362 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2366 * Step 4: Turn on hardware again.
2368 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2371 * Step 5: Execute callback.
2373 /* Do the wakeup first to avoid touching the xfer after the callback. */
2374 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING;
2375 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTWAIT) {
2376 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTWAIT;
2377 wakeup(&oxfer->ohci_xfer_flags);
2379 usb_transfer_complete(xfer);
2385 * Data structures and routines to emulate the root hub.
2387 Static usb_device_descriptor_t ohci_devd = {
2388 USB_DEVICE_DESCRIPTOR_SIZE,
2389 UDESC_DEVICE, /* type */
2390 {0x00, 0x01}, /* USB version */
2391 UDCLASS_HUB, /* class */
2392 UDSUBCLASS_HUB, /* subclass */
2393 UDPROTO_FSHUB, /* protocol */
2394 64, /* max packet */
2395 {0},{0},{0x00,0x01}, /* device id */
2396 1,2,0, /* string indicies */
2397 1 /* # of configurations */
2400 Static usb_config_descriptor_t ohci_confd = {
2401 USB_CONFIG_DESCRIPTOR_SIZE,
2403 {USB_CONFIG_DESCRIPTOR_SIZE +
2404 USB_INTERFACE_DESCRIPTOR_SIZE +
2405 USB_ENDPOINT_DESCRIPTOR_SIZE},
2413 Static usb_interface_descriptor_t ohci_ifcd = {
2414 USB_INTERFACE_DESCRIPTOR_SIZE,
2425 Static usb_endpoint_descriptor_t ohci_endpd = {
2426 USB_ENDPOINT_DESCRIPTOR_SIZE,
2428 UE_DIR_IN | OHCI_INTR_ENDPT,
2430 {8, 0}, /* max packet */
2434 Static usb_hub_descriptor_t ohci_hubd = {
2435 USB_HUB_DESCRIPTOR_SIZE,
2445 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2451 p->bLength = 2 * strlen(s) + 2;
2454 p->bDescriptorType = UDESC_STRING;
2456 for (i = 0; s[i] && l > 1; i++, l -= 2)
2457 USETW2(p->bString[i], 0, s[i]);
2462 * Simulate a hardware hub by handling all the necessary requests.
2465 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2469 /* Insert last in queue. */
2470 err = usb_insert_transfer(xfer);
2474 /* Pipe isn't running, start first */
2475 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2479 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2481 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2482 usb_device_request_t *req;
2485 int s, len, value, index, l, totlen = 0;
2486 usb_port_status_t ps;
2487 usb_hub_descriptor_t hubd;
2492 return (USBD_IOERROR);
2495 if (!(xfer->rqflags & URQ_REQUEST))
2497 return (USBD_INVAL);
2499 req = &xfer->request;
2501 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2502 req->bmRequestType, req->bRequest));
2504 len = UGETW(req->wLength);
2505 value = UGETW(req->wValue);
2506 index = UGETW(req->wIndex);
2509 buf = KERNADDR(&xfer->dmabuf, 0);
2511 #define C(x,y) ((x) | ((y) << 8))
2512 switch(C(req->bRequest, req->bmRequestType)) {
2513 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2514 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2515 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2517 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2518 * for the integrated root hub.
2521 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2523 *(u_int8_t *)buf = sc->sc_conf;
2527 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2528 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2529 switch(value >> 8) {
2531 if ((value & 0xff) != 0) {
2535 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2536 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2537 memcpy(buf, &ohci_devd, l);
2540 if ((value & 0xff) != 0) {
2544 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2545 memcpy(buf, &ohci_confd, l);
2546 buf = (char *)buf + l;
2548 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2550 memcpy(buf, &ohci_ifcd, l);
2551 buf = (char *)buf + l;
2553 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2555 memcpy(buf, &ohci_endpd, l);
2560 *(u_int8_t *)buf = 0;
2562 switch (value & 0xff) {
2563 case 1: /* Vendor */
2564 totlen = ohci_str(buf, len, sc->sc_vendor);
2566 case 2: /* Product */
2567 totlen = ohci_str(buf, len, "OHCI root hub");
2576 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2578 *(u_int8_t *)buf = 0;
2582 case C(UR_GET_STATUS, UT_READ_DEVICE):
2584 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2588 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2589 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2591 USETW(((usb_status_t *)buf)->wStatus, 0);
2595 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2596 if (value >= USB_MAX_DEVICES) {
2600 sc->sc_addr = value;
2602 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2603 if (value != 0 && value != 1) {
2607 sc->sc_conf = value;
2609 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2611 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2612 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2613 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2616 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2618 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2621 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2623 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2624 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2625 "port=%d feature=%d\n",
2627 if (index < 1 || index > sc->sc_noport) {
2631 port = OHCI_RH_PORT_STATUS(index);
2633 case UHF_PORT_ENABLE:
2634 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2636 case UHF_PORT_SUSPEND:
2637 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2639 case UHF_PORT_POWER:
2640 /* Yes, writing to the LOW_SPEED bit clears power. */
2641 OWRITE4(sc, port, UPS_LOW_SPEED);
2643 case UHF_C_PORT_CONNECTION:
2644 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2646 case UHF_C_PORT_ENABLE:
2647 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2649 case UHF_C_PORT_SUSPEND:
2650 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2652 case UHF_C_PORT_OVER_CURRENT:
2653 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2655 case UHF_C_PORT_RESET:
2656 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2663 case UHF_C_PORT_CONNECTION:
2664 case UHF_C_PORT_ENABLE:
2665 case UHF_C_PORT_SUSPEND:
2666 case UHF_C_PORT_OVER_CURRENT:
2667 case UHF_C_PORT_RESET:
2668 /* Enable RHSC interrupt if condition is cleared. */
2669 if ((OREAD4(sc, port) >> 16) == 0)
2670 ohci_rhsc_able(sc, 1);
2676 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2677 if ((value & 0xff) != 0) {
2681 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2683 hubd.bNbrPorts = sc->sc_noport;
2684 USETW(hubd.wHubCharacteristics,
2685 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2686 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2687 /* XXX overcurrent */
2689 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2690 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2691 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2692 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2693 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2694 l = min(len, hubd.bDescLength);
2696 memcpy(buf, &hubd, l);
2698 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2703 memset(buf, 0, len); /* ? XXX */
2706 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2707 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2709 if (index < 1 || index > sc->sc_noport) {
2717 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2718 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2720 USETW(ps.wPortStatus, v);
2721 USETW(ps.wPortChange, v >> 16);
2722 l = min(len, sizeof ps);
2723 memcpy(buf, &ps, l);
2726 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2729 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2731 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2732 if (index < 1 || index > sc->sc_noport) {
2736 port = OHCI_RH_PORT_STATUS(index);
2738 case UHF_PORT_ENABLE:
2739 OWRITE4(sc, port, UPS_PORT_ENABLED);
2741 case UHF_PORT_SUSPEND:
2742 OWRITE4(sc, port, UPS_SUSPEND);
2744 case UHF_PORT_RESET:
2745 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2747 OWRITE4(sc, port, UPS_RESET);
2748 for (i = 0; i < 5; i++) {
2749 usb_delay_ms(&sc->sc_bus,
2750 USB_PORT_ROOT_RESET_DELAY);
2755 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2758 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2759 index, OREAD4(sc, port)));
2761 case UHF_PORT_POWER:
2762 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2764 OWRITE4(sc, port, UPS_PORT_POWER);
2775 xfer->actlen = totlen;
2776 err = USBD_NORMAL_COMPLETION;
2780 usb_transfer_complete(xfer);
2782 return (USBD_IN_PROGRESS);
2785 /* Abort a root control request. */
2787 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2789 /* Nothing to do, all transfers are synchronous. */
2792 /* Close the root pipe. */
2794 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2796 DPRINTF(("ohci_root_ctrl_close\n"));
2797 /* Nothing to do. */
2801 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2805 /* Insert last in queue. */
2806 err = usb_insert_transfer(xfer);
2810 /* Pipe isn't running, start first */
2811 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2815 ohci_root_intr_start(usbd_xfer_handle xfer)
2817 usbd_pipe_handle pipe = xfer->pipe;
2818 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2821 return (USBD_IOERROR);
2823 sc->sc_intrxfer = xfer;
2825 return (USBD_IN_PROGRESS);
2828 /* Abort a root interrupt request. */
2830 ohci_root_intr_abort(usbd_xfer_handle xfer)
2834 if (xfer->pipe->intrxfer == xfer) {
2835 DPRINTF(("ohci_root_intr_abort: remove\n"));
2836 xfer->pipe->intrxfer = NULL;
2838 xfer->status = USBD_CANCELLED;
2840 usb_transfer_complete(xfer);
2844 /* Close the root pipe. */
2846 ohci_root_intr_close(usbd_pipe_handle pipe)
2848 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2850 DPRINTF(("ohci_root_intr_close\n"));
2852 sc->sc_intrxfer = NULL;
2855 /************************/
2858 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2862 /* Insert last in queue. */
2863 err = usb_insert_transfer(xfer);
2867 /* Pipe isn't running, start first */
2868 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2872 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2874 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2878 return (USBD_IOERROR);
2881 if (!(xfer->rqflags & URQ_REQUEST)) {
2883 printf("ohci_device_ctrl_transfer: not a request\n");
2884 return (USBD_INVAL);
2888 err = ohci_device_request(xfer);
2892 if (sc->sc_bus.use_polling)
2893 ohci_waitintr(sc, xfer);
2894 return (USBD_IN_PROGRESS);
2897 /* Abort a device control request. */
2899 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2901 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2902 ohci_abort_xfer(xfer, USBD_CANCELLED);
2905 /* Close a device control pipe. */
2907 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2909 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2910 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2912 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2913 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2914 ohci_free_std(sc, opipe->tail.td);
2917 /************************/
2920 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2922 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2924 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2928 ohci_noop(usbd_pipe_handle pipe)
2933 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2937 /* Insert last in queue. */
2938 err = usb_insert_transfer(xfer);
2942 /* Pipe isn't running, start first */
2943 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2947 ohci_device_bulk_start(usbd_xfer_handle xfer)
2949 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2950 usbd_device_handle dev = opipe->pipe.device;
2951 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2952 int addr = dev->address;
2953 ohci_soft_td_t *data, *tail, *tdp;
2954 ohci_soft_ed_t *sed;
2955 int s, len, isread, endpt;
2959 return (USBD_IOERROR);
2962 if (xfer->rqflags & URQ_REQUEST) {
2964 printf("ohci_device_bulk_start: a request\n");
2965 return (USBD_INVAL);
2970 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2971 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2974 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2975 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2978 opipe->u.bulk.isread = isread;
2979 opipe->u.bulk.length = len;
2981 /* Update device address */
2982 sed->ed.ed_flags = htole32(
2983 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2984 OHCI_ED_SET_FA(addr));
2986 /* Allocate a chain of new TDs (including a new tail). */
2987 data = opipe->tail.td;
2988 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2990 /* We want interrupt at the end of the transfer. */
2991 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2992 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2993 tail->flags |= OHCI_CALL_DONE;
2994 tail = tail->nexttd; /* point at sentinel */
2999 xfer->hcpriv = data;
3001 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3002 "td_cbp=0x%08x td_be=0x%08x\n",
3003 (int)le32toh(sed->ed.ed_flags),
3004 (int)le32toh(data->td.td_flags),
3005 (int)le32toh(data->td.td_cbp),
3006 (int)le32toh(data->td.td_be)));
3009 if (ohcidebug > 5) {
3011 ohci_dump_tds(data);
3015 /* Insert ED in schedule */
3017 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3020 sed->ed.ed_tailp = htole32(tail->physaddr);
3021 opipe->tail.td = tail;
3022 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3023 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3024 if (xfer->timeout && !sc->sc_bus.use_polling) {
3025 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3026 ohci_timeout, xfer);
3030 /* This goes wrong if we are too slow. */
3031 if (ohcidebug > 10) {
3033 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3034 OREAD4(sc, OHCI_COMMAND_STATUS)));
3036 ohci_dump_tds(data);
3042 return (USBD_IN_PROGRESS);
3046 ohci_device_bulk_abort(usbd_xfer_handle xfer)
3048 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3049 ohci_abort_xfer(xfer, USBD_CANCELLED);
3053 * Close a device bulk pipe.
3056 ohci_device_bulk_close(usbd_pipe_handle pipe)
3058 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3059 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3061 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3062 ohci_close_pipe(pipe, sc->sc_bulk_head);
3063 ohci_free_std(sc, opipe->tail.td);
3066 /************************/
3069 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3073 /* Insert last in queue. */
3074 err = usb_insert_transfer(xfer);
3078 /* Pipe isn't running, start first */
3079 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3083 ohci_device_intr_start(usbd_xfer_handle xfer)
3085 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3086 usbd_device_handle dev = opipe->pipe.device;
3087 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3088 ohci_soft_ed_t *sed = opipe->sed;
3089 ohci_soft_td_t *data, *tail;
3094 return (USBD_IOERROR);
3096 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3097 "flags=%d priv=%p\n",
3098 xfer, xfer->length, xfer->flags, xfer->priv));
3101 if (xfer->rqflags & URQ_REQUEST)
3102 panic("ohci_device_intr_transfer: a request");
3107 data = opipe->tail.td;
3108 tail = ohci_alloc_std(sc);
3110 return (USBD_NOMEM);
3113 data->td.td_flags = htole32(
3114 OHCI_TD_IN | OHCI_TD_NOCC |
3115 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3116 if (xfer->flags & USBD_SHORT_XFER_OK)
3117 data->td.td_flags |= htole32(OHCI_TD_R);
3118 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3119 data->nexttd = tail;
3120 data->td.td_nexttd = htole32(tail->physaddr);
3121 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3124 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3125 xfer->hcpriv = data;
3128 if (ohcidebug > 5) {
3129 DPRINTF(("ohci_device_intr_transfer:\n"));
3131 ohci_dump_tds(data);
3135 /* Insert ED in schedule */
3137 sed->ed.ed_tailp = htole32(tail->physaddr);
3138 opipe->tail.td = tail;
3139 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3143 * This goes horribly wrong, printing thousands of descriptors,
3144 * because false references are followed due to the fact that the
3147 if (ohcidebug > 5) {
3148 usb_delay_ms(&sc->sc_bus, 5);
3149 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3150 OREAD4(sc, OHCI_COMMAND_STATUS)));
3152 ohci_dump_tds(data);
3157 return (USBD_IN_PROGRESS);
3160 /* Abort a device control request. */
3162 ohci_device_intr_abort(usbd_xfer_handle xfer)
3164 if (xfer->pipe->intrxfer == xfer) {
3165 DPRINTF(("ohci_device_intr_abort: remove\n"));
3166 xfer->pipe->intrxfer = NULL;
3168 ohci_abort_xfer(xfer, USBD_CANCELLED);
3171 /* Close a device interrupt pipe. */
3173 ohci_device_intr_close(usbd_pipe_handle pipe)
3175 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3176 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3177 int nslots = opipe->u.intr.nslots;
3178 int pos = opipe->u.intr.pos;
3180 ohci_soft_ed_t *p, *sed = opipe->sed;
3183 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3184 pipe, nslots, pos));
3186 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3187 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3188 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3189 usb_delay_ms(&sc->sc_bus, 2);
3191 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3192 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3193 panic("%s: Intr pipe %p still has TDs queued",
3194 USBDEVNAME(sc->sc_bus.bdev), pipe);
3197 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3201 panic("ohci_device_intr_close: ED not found");
3203 p->next = sed->next;
3204 p->ed.ed_nexted = sed->ed.ed_nexted;
3207 for (j = 0; j < nslots; j++)
3208 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3210 ohci_free_std(sc, opipe->tail.td);
3211 ohci_free_sed(sc, opipe->sed);
3215 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3218 u_int npoll, slow, shigh, nslots;
3220 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3222 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3224 printf("ohci_setintr: 0 interval\n");
3225 return (USBD_INVAL);
3228 npoll = OHCI_NO_INTRS;
3229 while (npoll > ival)
3231 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3234 * We now know which level in the tree the ED must go into.
3235 * Figure out which slot has most bandwidth left over.
3241 * 8 7 8 9 10 11 12 13 14
3242 * N (N-1) .. (N-1+N-1)
3245 shigh = slow + npoll;
3246 nslots = OHCI_NO_INTRS / npoll;
3247 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3249 for (j = 0; j < nslots; j++)
3250 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3256 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3257 best, slow, shigh, bestbw));
3260 hsed = sc->sc_eds[best];
3261 sed->next = hsed->next;
3262 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3264 hsed->ed.ed_nexted = htole32(sed->physaddr);
3267 for (j = 0; j < nslots; j++)
3268 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3269 opipe->u.intr.nslots = nslots;
3270 opipe->u.intr.pos = best;
3272 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3273 return (USBD_NORMAL_COMPLETION);
3276 /***********************/
3279 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3283 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3285 /* Put it on our queue, */
3286 err = usb_insert_transfer(xfer);
3288 /* bail out on error, */
3289 if (err && err != USBD_IN_PROGRESS)
3292 /* XXX should check inuse here */
3294 /* insert into schedule, */
3295 ohci_device_isoc_enter(xfer);
3297 /* and start if the pipe wasn't running */
3299 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3305 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3307 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3308 usbd_device_handle dev = opipe->pipe.device;
3309 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3310 ohci_soft_ed_t *sed = opipe->sed;
3311 struct iso *iso = &opipe->u.iso;
3312 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3313 ohci_soft_itd_t *sitd, *nsitd;
3314 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3315 int i, ncur, nframes;
3318 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3320 iso->inuse, iso->next, xfer, xfer->nframes));
3325 if (iso->next == -1) {
3326 /* Not in use yet, schedule it a few frames ahead. */
3327 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3328 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3333 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3334 sitd = sitd->nextitd)
3335 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3338 sitd = ohci_alloc_sitd(sc);
3340 panic("cant alloc isoc");
3341 opipe->tail.itd = sitd;
3342 tdphys = sitd->physaddr;
3343 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3345 sed->ed.ed_tailp = htole32(tdphys);
3346 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3350 sitd = opipe->tail.itd;
3351 buf = DMAADDR(&xfer->dmabuf, 0);
3352 bp0 = OHCI_PAGE(buf);
3353 offs = OHCI_PAGE_OFFSET(buf);
3354 nframes = xfer->nframes;
3355 xfer->hcpriv = sitd;
3356 for (i = ncur = 0; i < nframes; i++, ncur++) {
3357 noffs = offs + xfer->frlengths[i];
3358 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3359 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3361 /* Allocate next ITD */
3362 nsitd = ohci_alloc_sitd(sc);
3363 if (nsitd == NULL) {
3365 printf("%s: isoc TD alloc failed\n",
3366 USBDEVNAME(sc->sc_bus.bdev));
3370 /* Fill current ITD */
3371 sitd->itd.itd_flags = htole32(
3373 OHCI_ITD_SET_SF(iso->next) |
3374 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3375 OHCI_ITD_SET_FC(ncur));
3376 sitd->itd.itd_bp0 = htole32(bp0);
3377 sitd->nextitd = nsitd;
3378 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3379 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3381 sitd->flags = OHCI_ITD_ACTIVE;
3384 iso->next = iso->next + ncur;
3385 bp0 = OHCI_PAGE(buf + offs);
3388 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3391 nsitd = ohci_alloc_sitd(sc);
3392 if (nsitd == NULL) {
3394 printf("%s: isoc TD alloc failed\n",
3395 USBDEVNAME(sc->sc_bus.bdev));
3398 /* Fixup last used ITD */
3399 sitd->itd.itd_flags = htole32(
3401 OHCI_ITD_SET_SF(iso->next) |
3402 OHCI_ITD_SET_DI(0) |
3403 OHCI_ITD_SET_FC(ncur));
3404 sitd->itd.itd_bp0 = htole32(bp0);
3405 sitd->nextitd = nsitd;
3406 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3407 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3409 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3411 iso->next = iso->next + ncur;
3412 iso->inuse += nframes;
3414 xfer->actlen = offs; /* XXX pretend we did it all */
3416 xfer->status = USBD_IN_PROGRESS;
3418 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3421 if (ohcidebug > 5) {
3422 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3423 le32toh(sc->sc_hcca->hcca_frame_number)));
3424 ohci_dump_itds(xfer->hcpriv);
3430 opipe->tail.itd = nsitd;
3431 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3432 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3436 if (ohcidebug > 5) {
3438 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3439 le32toh(sc->sc_hcca->hcca_frame_number)));
3440 ohci_dump_itds(xfer->hcpriv);
3447 ohci_device_isoc_start(usbd_xfer_handle xfer)
3449 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3450 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3451 ohci_soft_ed_t *sed;
3454 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3457 return (USBD_IOERROR);
3460 if (xfer->status != USBD_IN_PROGRESS)
3461 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3464 /* XXX anything to do? */
3467 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3468 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3471 return (USBD_IN_PROGRESS);
3475 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3477 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3478 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3479 ohci_soft_ed_t *sed;
3480 ohci_soft_itd_t *sitd, *tmp_sitd;
3481 int s,undone,num_sitds;
3484 opipe->aborting = 1;
3486 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3488 /* Transfer is already done. */
3489 if (xfer->status != USBD_NOT_STARTED &&
3490 xfer->status != USBD_IN_PROGRESS) {
3492 printf("ohci_device_isoc_abort: early return\n");
3496 /* Give xfer the requested abort code. */
3497 xfer->status = USBD_CANCELLED;
3500 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3503 sitd = xfer->hcpriv;
3507 printf("ohci_device_isoc_abort: hcpriv==0\n");
3511 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3514 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3522 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3523 * take a usb 1ms cycle. Conservatively wait for it to drain.
3524 * Even with DMA done, it can take awhile for the "batch"
3525 * delivery of completion interrupts to occur thru the controller.
3529 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3532 tmp_sitd = xfer->hcpriv;
3533 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3534 tmp_sitd = tmp_sitd->nextitd) {
3535 if (OHCI_CC_NO_ERROR ==
3536 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3537 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3538 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3541 } while( undone != 0 );
3547 usb_transfer_complete(xfer);
3551 * Only if there is a `next' sitd in next xfer...
3552 * unlink this xfer's sitds.
3554 sed->ed.ed_headp = htole32(sitd->physaddr);
3556 sed->ed.ed_headp = 0;
3558 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3564 ohci_device_isoc_done(usbd_xfer_handle xfer)
3566 /* This null routine corresponds to non-isoc "done()" routines
3567 * that free the stds associated with an xfer after a completed
3568 * xfer interrupt. However, in the case of isoc transfers, the
3569 * sitds associated with the transfer have already been processed
3570 * and reallocated for the next iteration by
3571 * "ohci_device_isoc_transfer()".
3573 * Routine "usb_transfer_complete()" is called at the end of every
3574 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3575 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3576 * pipeline by setting up the next transfer iteration) and 2) then
3577 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3578 * working for the ohci usb because this routine was trashing the
3579 * xfer set up for the next iteration (thus, only the first
3580 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3581 * this could all be re-factored, but that's another pass...
3586 ohci_setup_isoc(usbd_pipe_handle pipe)
3588 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3589 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3590 struct iso *iso = &opipe->u.iso;
3597 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3600 return (USBD_NORMAL_COMPLETION);
3604 ohci_device_isoc_close(usbd_pipe_handle pipe)
3606 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3607 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3608 ohci_soft_ed_t *sed;
3610 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3613 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3615 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3617 /* up to NISOREQs xfers still outstanding. */
3620 opipe->tail.itd->isdone = 1;
3622 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/