1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */
3 /* Also, already ported:
4 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
5 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
6 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
7 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
8 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $
9 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $
10 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $
12 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $
15 #include <sys/cdefs.h>
16 __FBSDID("$FreeBSD$");
19 * Copyright (c) 1998 The NetBSD Foundation, Inc.
20 * All rights reserved.
22 * This code is derived from software contributed to The NetBSD Foundation
23 * by Lennart Augustsson (lennart@augustsson.net) at
24 * Carlstedt Research & Technology.
26 * Redistribution and use in source and binary forms, with or without
27 * modification, are permitted provided that the following conditions
29 * 1. Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
31 * 2. Redistributions in binary form must reproduce the above copyright
32 * notice, this list of conditions and the following disclaimer in the
33 * documentation and/or other materials provided with the distribution.
34 * 3. All advertising materials mentioning features or use of this software
35 * must display the following acknowledgement:
36 * This product includes software developed by the NetBSD
37 * Foundation, Inc. and its contributors.
38 * 4. Neither the name of The NetBSD Foundation nor the names of its
39 * contributors may be used to endorse or promote products derived
40 * from this software without specific prior written permission.
42 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
43 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
44 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
45 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
46 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
52 * POSSIBILITY OF SUCH DAMAGE.
56 * USB Open Host Controller driver.
58 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
59 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/malloc.h>
65 #include <sys/kernel.h>
66 #include <sys/endian.h>
67 #include <sys/module.h>
69 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
70 #include <machine/cpu.h>
73 #include <sys/queue.h>
74 #include <sys/sysctl.h>
76 #include <machine/bus.h>
77 #include <machine/endian.h>
79 #include <dev/usb/usb.h>
80 #include <dev/usb/usbdi.h>
81 #include <dev/usb/usbdivar.h>
82 #include <dev/usb/usb_mem.h>
83 #include <dev/usb/usb_quirks.h>
85 #include <dev/usb/ohcireg.h>
86 #include <dev/usb/ohcivar.h>
88 #define delay(d) DELAY(d)
91 #define DPRINTF(x) if (ohcidebug) printf x
92 #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x
94 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
95 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
96 &ohcidebug, 0, "ohci debug level");
97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
100 #define DPRINTFN(n,x)
105 static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
106 static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
108 static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
109 static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
111 static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
112 static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
115 static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
118 static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
119 ohci_softc_t *, int, int, usbd_xfer_handle,
120 ohci_soft_td_t *, ohci_soft_td_t **);
122 #if defined(__NetBSD__) || defined(__OpenBSD__)
123 static void ohci_shutdown(void *v);
124 static void ohci_power(int, void *);
126 static usbd_status ohci_open(usbd_pipe_handle);
127 static void ohci_poll(struct usbd_bus *);
128 static void ohci_softintr(void *);
129 static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
130 static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
131 static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
133 static usbd_status ohci_device_request(usbd_xfer_handle xfer);
134 static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
135 static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
136 static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
137 static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
138 static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
139 static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
140 static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
141 static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
143 static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
144 static void ohci_device_isoc_enter(usbd_xfer_handle);
146 static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
147 static void ohci_freem(struct usbd_bus *, usb_dma_t *);
149 static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
150 static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
152 static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
153 static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
154 static void ohci_root_ctrl_abort(usbd_xfer_handle);
155 static void ohci_root_ctrl_close(usbd_pipe_handle);
156 static void ohci_root_ctrl_done(usbd_xfer_handle);
158 static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
159 static usbd_status ohci_root_intr_start(usbd_xfer_handle);
160 static void ohci_root_intr_abort(usbd_xfer_handle);
161 static void ohci_root_intr_close(usbd_pipe_handle);
162 static void ohci_root_intr_done(usbd_xfer_handle);
164 static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
165 static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
166 static void ohci_device_ctrl_abort(usbd_xfer_handle);
167 static void ohci_device_ctrl_close(usbd_pipe_handle);
168 static void ohci_device_ctrl_done(usbd_xfer_handle);
170 static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
171 static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
172 static void ohci_device_bulk_abort(usbd_xfer_handle);
173 static void ohci_device_bulk_close(usbd_pipe_handle);
174 static void ohci_device_bulk_done(usbd_xfer_handle);
176 static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
177 static usbd_status ohci_device_intr_start(usbd_xfer_handle);
178 static void ohci_device_intr_abort(usbd_xfer_handle);
179 static void ohci_device_intr_close(usbd_pipe_handle);
180 static void ohci_device_intr_done(usbd_xfer_handle);
182 static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
183 static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
184 static void ohci_device_isoc_abort(usbd_xfer_handle);
185 static void ohci_device_isoc_close(usbd_pipe_handle);
186 static void ohci_device_isoc_done(usbd_xfer_handle);
188 static usbd_status ohci_device_setintr(ohci_softc_t *sc,
189 struct ohci_pipe *pipe, int ival);
190 static usbd_status ohci_device_intr_insert(ohci_softc_t *sc,
191 usbd_xfer_handle xfer);
193 static int ohci_str(usb_string_descriptor_t *, int, const char *);
195 static void ohci_timeout(void *);
196 static void ohci_timeout_task(void *);
197 static void ohci_rhsc_able(ohci_softc_t *, int);
198 static void ohci_rhsc_enable(void *);
200 static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
201 static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
203 static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
204 static void ohci_noop(usbd_pipe_handle pipe);
206 static usbd_status ohci_controller_init(ohci_softc_t *sc);
209 static void ohci_dumpregs(ohci_softc_t *);
210 static void ohci_dump_tds(ohci_soft_td_t *);
211 static void ohci_dump_td(ohci_soft_td_t *);
212 static void ohci_dump_ed(ohci_soft_ed_t *);
213 static void ohci_dump_itd(ohci_soft_itd_t *);
214 static void ohci_dump_itds(ohci_soft_itd_t *);
217 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
218 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
219 #define OWRITE1(sc, r, x) \
220 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
221 #define OWRITE2(sc, r, x) \
222 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
223 #define OWRITE4(sc, r, x) \
224 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
225 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
226 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
227 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
229 /* Reverse the bits in a value 0 .. 31 */
230 static u_int8_t revbits[OHCI_NO_INTRS] =
231 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
232 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
233 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
234 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
237 struct usbd_pipe pipe;
242 ohci_soft_itd_t *itd;
244 /* Info needed for different pipe kinds. */
250 ohci_soft_td_t *setup, *data, *stat;
269 #define OHCI_INTR_ENDPT 1
271 static struct usbd_bus_methods ohci_bus_methods = {
281 static struct usbd_pipe_methods ohci_root_ctrl_methods = {
282 ohci_root_ctrl_transfer,
283 ohci_root_ctrl_start,
284 ohci_root_ctrl_abort,
285 ohci_root_ctrl_close,
290 static struct usbd_pipe_methods ohci_root_intr_methods = {
291 ohci_root_intr_transfer,
292 ohci_root_intr_start,
293 ohci_root_intr_abort,
294 ohci_root_intr_close,
299 static struct usbd_pipe_methods ohci_device_ctrl_methods = {
300 ohci_device_ctrl_transfer,
301 ohci_device_ctrl_start,
302 ohci_device_ctrl_abort,
303 ohci_device_ctrl_close,
305 ohci_device_ctrl_done,
308 static struct usbd_pipe_methods ohci_device_intr_methods = {
309 ohci_device_intr_transfer,
310 ohci_device_intr_start,
311 ohci_device_intr_abort,
312 ohci_device_intr_close,
313 ohci_device_clear_toggle,
314 ohci_device_intr_done,
317 static struct usbd_pipe_methods ohci_device_bulk_methods = {
318 ohci_device_bulk_transfer,
319 ohci_device_bulk_start,
320 ohci_device_bulk_abort,
321 ohci_device_bulk_close,
322 ohci_device_clear_toggle,
323 ohci_device_bulk_done,
326 static struct usbd_pipe_methods ohci_device_isoc_methods = {
327 ohci_device_isoc_transfer,
328 ohci_device_isoc_start,
329 ohci_device_isoc_abort,
330 ohci_device_isoc_close,
332 ohci_device_isoc_done,
336 ohci_detach(struct ohci_softc *sc, int flags)
341 callout_stop(&sc->sc_tmo_rhsc);
343 #if defined(__NetBSD__) || defined(__OpenBSD__)
344 powerhook_disestablish(sc->sc_powerhook);
345 shutdownhook_disestablish(sc->sc_shutdownhook);
348 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
349 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
351 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
353 for (i = 0; i < OHCI_NO_EDS; i++)
354 ohci_free_sed(sc, sc->sc_eds[i]);
355 ohci_free_sed(sc, sc->sc_isoc_head);
356 ohci_free_sed(sc, sc->sc_bulk_head);
357 ohci_free_sed(sc, sc->sc_ctrl_head);
358 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
364 ohci_alloc_sed(ohci_softc_t *sc)
371 if (sc->sc_freeeds == NULL) {
372 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
373 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
374 OHCI_ED_ALIGN, &dma);
377 for(i = 0; i < OHCI_SED_CHUNK; i++) {
378 offs = i * OHCI_SED_SIZE;
379 sed = KERNADDR(&dma, offs);
380 sed->physaddr = DMAADDR(&dma, offs);
381 sed->next = sc->sc_freeeds;
382 sc->sc_freeeds = sed;
385 sed = sc->sc_freeeds;
386 sc->sc_freeeds = sed->next;
387 memset(&sed->ed, 0, sizeof(ohci_ed_t));
393 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
395 sed->next = sc->sc_freeeds;
396 sc->sc_freeeds = sed;
400 ohci_alloc_std(ohci_softc_t *sc)
408 if (sc->sc_freetds == NULL) {
409 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
410 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
411 OHCI_TD_ALIGN, &dma);
415 for(i = 0; i < OHCI_STD_CHUNK; i++) {
416 offs = i * OHCI_STD_SIZE;
417 std = KERNADDR(&dma, offs);
418 std->physaddr = DMAADDR(&dma, offs);
419 std->nexttd = sc->sc_freetds;
420 sc->sc_freetds = std;
426 std = sc->sc_freetds;
427 sc->sc_freetds = std->nexttd;
428 memset(&std->td, 0, sizeof(ohci_td_t));
431 ohci_hash_add_td(sc, std);
438 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
443 ohci_hash_rem_td(sc, std);
444 std->nexttd = sc->sc_freetds;
445 sc->sc_freetds = std;
450 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
451 int alen, int rd, usbd_xfer_handle xfer,
452 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
454 ohci_soft_td_t *next, *cur, *end;
455 ohci_physaddr_t dataphys, physend;
458 int len, maxp, curlen, curlen2, seg, segoff;
459 struct usb_dma_mapping *dma = &xfer->dmamap;
460 u_int16_t flags = xfer->flags;
462 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
468 maxp = UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
470 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
471 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
472 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_SET_DI(6));
477 next = ohci_alloc_std(sc);
482 * The OHCI hardware can handle at most one 4k crossing.
483 * The OHCI spec says: If during the data transfer the buffer
484 * address contained in the HC's working copy of
485 * CurrentBufferPointer crosses a 4K boundary, the upper 20
486 * bits of Buffer End are copied to the working value of
487 * CurrentBufferPointer causing the next buffer address to
488 * be the 0th byte in the same 4K page that contains the
489 * last byte of the buffer (the 4K boundary crossing may
490 * occur within a data packet transfer.)
492 KASSERT(seg < dma->nsegs, ("ohci_alloc_std_chain: overrun"));
493 dataphys = dma->segs[seg].ds_addr + segoff;
494 curlen = dma->segs[seg].ds_len - segoff;
497 physend = dataphys + curlen - 1;
498 if (OHCI_PAGE(dataphys) != OHCI_PAGE(physend)) {
499 /* Truncate to two OHCI pages if there are more. */
500 if (curlen > 2 * OHCI_PAGE_SIZE -
501 OHCI_PAGE_OFFSET(dataphys))
502 curlen = 2 * OHCI_PAGE_SIZE -
503 OHCI_PAGE_OFFSET(dataphys);
505 curlen -= curlen % maxp;
506 physend = dataphys + curlen - 1;
507 } else if (OHCI_PAGE_OFFSET(physend + 1) == 0 && curlen < len &&
508 curlen + segoff == dma->segs[seg].ds_len) {
509 /* We can possibly include another segment. */
510 KASSERT(seg + 1 < dma->nsegs,
511 ("ohci_alloc_std_chain: overrun2"));
514 /* Determine how much of the second segment to use. */
515 curlen2 = dma->segs[seg].ds_len;
516 if (curlen + curlen2 > len)
517 curlen2 = len - curlen;
518 if (OHCI_PAGE(dma->segs[seg].ds_addr) !=
519 OHCI_PAGE(dma->segs[seg].ds_addr + curlen2 - 1))
520 curlen2 = OHCI_PAGE_SIZE -
521 OHCI_PAGE_OFFSET(dma->segs[seg].ds_addr);
522 if (curlen + curlen2 < len)
523 curlen2 -= (curlen + curlen2) % maxp;
526 /* We can include a second segment */
528 physend = dma->segs[seg].ds_addr + curlen2 - 1;
531 /* Second segment not usable now. */
536 /* Simple case where there is just one OHCI page. */
539 if (curlen == 0 && len != 0) {
541 * A maxp length packet would need to be split.
542 * This shouldn't be possible if PAGE_SIZE >= 4k
543 * and the buffer is contiguous in virtual memory.
545 panic("ohci_alloc_std_chain: XXX need to copy");
547 if (segoff >= dma->segs[seg].ds_len) {
548 KASSERT(segoff == dma->segs[seg].ds_len,
549 ("ohci_alloc_std_chain: overlap"));
553 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
554 "len=%d curlen=%d\n",
555 dataphys, len, curlen));
558 cur->td.td_flags = tdflags;
559 cur->td.td_cbp = htole32(dataphys);
561 cur->td.td_nexttd = htole32(next->physaddr);
562 cur->td.td_be = htole32(physend);
564 cur->flags = OHCI_ADD_LEN;
566 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
567 dataphys, dataphys + curlen - 1));
569 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
571 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
576 if (((flags & USBD_FORCE_SHORT_XFER) || alen == 0) &&
577 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
578 /* Force a 0 length transfer at the end. */
579 next = ohci_alloc_std(sc);
583 cur->td.td_flags = tdflags;
584 cur->td.td_cbp = 0; /* indicate 0 length packet */
586 cur->td.td_nexttd = htole32(next->physaddr);
591 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
596 return (USBD_NORMAL_COMPLETION);
605 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
606 ohci_soft_td_t *stdend)
610 for (; std != stdend; std = p) {
612 ohci_free_std(sc, std);
618 ohci_alloc_sitd(ohci_softc_t *sc)
620 ohci_soft_itd_t *sitd;
625 if (sc->sc_freeitds == NULL) {
626 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
627 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
628 OHCI_ITD_ALIGN, &dma);
632 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
633 offs = i * OHCI_SITD_SIZE;
634 sitd = KERNADDR(&dma, offs);
635 sitd->physaddr = DMAADDR(&dma, offs);
636 sitd->nextitd = sc->sc_freeitds;
637 sc->sc_freeitds = sitd;
643 sitd = sc->sc_freeitds;
644 sc->sc_freeitds = sitd->nextitd;
645 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
646 sitd->nextitd = NULL;
648 ohci_hash_add_itd(sc, sitd);
659 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
663 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
667 panic("ohci_free_sitd: sitd=%p not done", sitd);
670 /* Warn double free */
675 ohci_hash_rem_itd(sc, sitd);
676 sitd->nextitd = sc->sc_freeitds;
677 sc->sc_freeitds = sitd;
682 ohci_init(ohci_softc_t *sc)
684 ohci_soft_ed_t *sed, *psed;
689 DPRINTF(("ohci_init: start\n"));
690 printf("%s:", device_get_nameunit(sc->sc_bus.bdev));
691 rev = OREAD4(sc, OHCI_REVISION);
692 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
693 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
695 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
696 printf("%s: unsupported OHCI revision\n",
697 device_get_nameunit(sc->sc_bus.bdev));
698 sc->sc_bus.usbrev = USBREV_UNKNOWN;
701 sc->sc_bus.usbrev = USBREV_1_0;
703 for (i = 0; i < OHCI_HASH_SIZE; i++)
704 LIST_INIT(&sc->sc_hash_tds[i]);
705 for (i = 0; i < OHCI_HASH_SIZE; i++)
706 LIST_INIT(&sc->sc_hash_itds[i]);
708 STAILQ_INIT(&sc->sc_free_xfers);
710 /* XXX determine alignment by R/W */
711 /* Allocate the HCCA area. */
712 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
713 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
716 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
717 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
719 sc->sc_eintrs = OHCI_NORMAL_INTRS;
721 /* Allocate dummy ED that starts the control list. */
722 sc->sc_ctrl_head = ohci_alloc_sed(sc);
723 if (sc->sc_ctrl_head == NULL) {
727 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
729 /* Allocate dummy ED that starts the bulk list. */
730 sc->sc_bulk_head = ohci_alloc_sed(sc);
731 if (sc->sc_bulk_head == NULL) {
735 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
737 /* Allocate dummy ED that starts the isochronous list. */
738 sc->sc_isoc_head = ohci_alloc_sed(sc);
739 if (sc->sc_isoc_head == NULL) {
743 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
745 /* Allocate all the dummy EDs that make up the interrupt tree. */
746 for (i = 0; i < OHCI_NO_EDS; i++) {
747 sed = ohci_alloc_sed(sc);
750 ohci_free_sed(sc, sc->sc_eds[i]);
754 /* All ED fields are set to 0. */
756 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
758 psed = sc->sc_eds[(i-1) / 2];
760 psed= sc->sc_isoc_head;
762 sed->ed.ed_nexted = htole32(psed->physaddr);
765 * Fill HCCA interrupt table. The bit reversal is to get
766 * the tree set up properly to spread the interrupts.
768 for (i = 0; i < OHCI_NO_INTRS; i++)
769 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
770 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
773 if (ohcidebug > 15) {
774 for (i = 0; i < OHCI_NO_EDS; i++) {
776 ohci_dump_ed(sc->sc_eds[i]);
779 ohci_dump_ed(sc->sc_isoc_head);
783 err = ohci_controller_init(sc);
784 if (err != USBD_NORMAL_COMPLETION)
787 /* Set up the bus struct. */
788 sc->sc_bus.methods = &ohci_bus_methods;
789 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
791 #if defined(__NetBSD__) || defined(__OpenBSD__)
792 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
793 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
796 callout_init(&sc->sc_tmo_rhsc, 0);
798 return (USBD_NORMAL_COMPLETION);
801 for (i = 0; i < OHCI_NO_EDS; i++)
802 ohci_free_sed(sc, sc->sc_eds[i]);
804 ohci_free_sed(sc, sc->sc_isoc_head);
806 ohci_free_sed(sc, sc->sc_bulk_head);
808 ohci_free_sed(sc, sc->sc_ctrl_head);
810 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
815 ohci_controller_init(ohci_softc_t *sc)
818 u_int32_t ctl, ival, hcr, fm, per, desca;
820 /* Determine in what context we are running. */
821 ctl = OREAD4(sc, OHCI_CONTROL);
823 /* SMM active, request change */
824 DPRINTF(("ohci_init: SMM active, request owner change\n"));
825 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
826 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
827 usb_delay_ms(&sc->sc_bus, 1);
828 ctl = OREAD4(sc, OHCI_CONTROL);
831 printf("%s: SMM does not respond, resetting\n",
832 device_get_nameunit(sc->sc_bus.bdev));
833 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
837 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
838 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
839 /* BIOS started controller. */
840 DPRINTF(("ohci_init: BIOS active\n"));
841 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
842 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
843 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
847 DPRINTF(("ohci_init: cold started\n"));
849 /* Controller was cold started. */
850 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
854 * This reset should not be necessary according to the OHCI spec, but
855 * without it some controllers do not start.
857 DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
858 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
859 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
861 /* We now own the host controller and the bus has been reset. */
862 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
864 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
865 /* Nominal time for a reset is 10 us. */
866 for (i = 0; i < 10; i++) {
868 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
873 printf("%s: reset timeout\n", device_get_nameunit(sc->sc_bus.bdev));
874 return (USBD_IOERROR);
881 /* The controller is now in SUSPEND state, we have 2ms to finish. */
883 /* Set up HC registers. */
884 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
885 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
886 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
887 /* disable all interrupts and then switch on all desired interrupts */
888 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
889 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
890 /* switch on desired functional features */
891 ctl = OREAD4(sc, OHCI_CONTROL);
892 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
893 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
894 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
895 /* And finally start it! */
896 OWRITE4(sc, OHCI_CONTROL, ctl);
899 * The controller is now OPERATIONAL. Set a some final
900 * registers that should be set earlier, but that the
901 * controller ignores when in the SUSPEND state.
903 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
904 fm |= OHCI_FSMPS(ival) | ival;
905 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
906 per = OHCI_PERIODIC(ival); /* 90% periodic */
907 OWRITE4(sc, OHCI_PERIODIC_START, per);
909 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
910 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
911 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
912 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
913 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
914 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
917 * The AMD756 requires a delay before re-reading the register,
918 * otherwise it will occasionally report 0 ports.
921 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
922 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
923 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
930 return (USBD_NORMAL_COMPLETION);
934 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
936 return (usb_allocmem(bus, size, 0, dma));
940 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
942 usb_freemem(bus, dma);
946 ohci_allocx(struct usbd_bus *bus)
948 struct ohci_softc *sc = (struct ohci_softc *)bus;
949 usbd_xfer_handle xfer;
951 xfer = STAILQ_FIRST(&sc->sc_free_xfers);
953 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
955 if (xfer->busy_free != XFER_FREE) {
956 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
961 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
964 memset(xfer, 0, sizeof (struct ohci_xfer));
965 usb_init_task(&OXFER(xfer)->abort_task, ohci_timeout_task,
967 OXFER(xfer)->ohci_xfer_flags = 0;
969 xfer->busy_free = XFER_BUSY;
976 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
978 struct ohci_softc *sc = (struct ohci_softc *)bus;
981 if (xfer->busy_free != XFER_BUSY) {
982 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
986 xfer->busy_free = XFER_FREE;
988 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
992 * Shut down the controller when the system is going down.
995 ohci_shutdown(void *v)
997 ohci_softc_t *sc = v;
999 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1000 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1004 * Handle suspend/resume.
1006 * We need to switch to polling mode here, because this routine is
1007 * called from an intterupt context. This is all right since we
1008 * are almost suspended anyway.
1011 ohci_power(int why, void *v)
1013 ohci_softc_t *sc = v;
1018 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1023 if (why != PWR_RESUME) {
1024 sc->sc_bus.use_polling++;
1025 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1026 if (sc->sc_control == 0) {
1028 * Preserve register values, in case that APM BIOS
1029 * does not recover them.
1031 sc->sc_control = ctl;
1032 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1034 ctl |= OHCI_HCFS_SUSPEND;
1035 OWRITE4(sc, OHCI_CONTROL, ctl);
1036 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1037 sc->sc_bus.use_polling--;
1039 sc->sc_bus.use_polling++;
1041 /* Some broken BIOSes never initialize Controller chip */
1042 ohci_controller_init(sc);
1045 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1046 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1048 ctl = sc->sc_control;
1050 ctl = OREAD4(sc, OHCI_CONTROL);
1051 ctl |= OHCI_HCFS_RESUME;
1052 OWRITE4(sc, OHCI_CONTROL, ctl);
1053 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1054 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1055 OWRITE4(sc, OHCI_CONTROL, ctl);
1056 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1057 sc->sc_control = sc->sc_intre = 0;
1058 sc->sc_bus.use_polling--;
1065 ohci_dumpregs(ohci_softc_t *sc)
1067 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1068 OREAD4(sc, OHCI_REVISION),
1069 OREAD4(sc, OHCI_CONTROL),
1070 OREAD4(sc, OHCI_COMMAND_STATUS)));
1071 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1072 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1073 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1074 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1075 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1076 OREAD4(sc, OHCI_HCCA),
1077 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1078 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1079 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1080 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1081 OREAD4(sc, OHCI_BULK_HEAD_ED),
1082 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1083 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1084 OREAD4(sc, OHCI_DONE_HEAD),
1085 OREAD4(sc, OHCI_FM_INTERVAL),
1086 OREAD4(sc, OHCI_FM_REMAINING)));
1087 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1088 OREAD4(sc, OHCI_FM_NUMBER),
1089 OREAD4(sc, OHCI_PERIODIC_START),
1090 OREAD4(sc, OHCI_LS_THRESHOLD)));
1091 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1092 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1093 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1094 OREAD4(sc, OHCI_RH_STATUS)));
1095 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1096 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1097 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1098 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1099 le32toh(sc->sc_hcca->hcca_frame_number),
1100 le32toh(sc->sc_hcca->hcca_done_head)));
1104 static int ohci_intr1(ohci_softc_t *);
1109 ohci_softc_t *sc = p;
1111 if (sc == NULL || sc->sc_dying)
1114 /* If we get an interrupt while polling, then just ignore it. */
1115 if (sc->sc_bus.use_polling) {
1117 printf("ohci_intr: ignored interrupt while polling\n");
1126 ohci_intr1(ohci_softc_t *sc)
1128 u_int32_t intrs, eintrs;
1129 ohci_physaddr_t done;
1131 DPRINTFN(14,("ohci_intr1: enter\n"));
1133 /* In case the interrupt occurs before initialization has completed. */
1134 if (sc == NULL || sc->sc_hcca == NULL) {
1136 printf("ohci_intr: sc->sc_hcca == NULL\n");
1142 done = le32toh(sc->sc_hcca->hcca_done_head);
1144 /* The LSb of done is used to inform the HC Driver that an interrupt
1145 * condition exists for both the Done list and for another event
1146 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1147 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1148 * interrupt was caused by other than the HccaDoneHead update and the
1149 * HcInterruptStatus register needs to be accessed to determine that
1150 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1151 * update interrupt is indicated and if the LSb of done is nonzero,
1152 * then an additional interrupt event is indicated and
1153 * HcInterruptStatus should be checked to determine its cause.
1156 if (done & ~OHCI_DONE_INTRS)
1158 if (done & OHCI_DONE_INTRS) {
1159 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1160 done &= ~OHCI_DONE_INTRS;
1162 sc->sc_hcca->hcca_done_head = 0;
1164 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1166 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1170 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1171 eintrs = intrs & sc->sc_eintrs;
1175 sc->sc_bus.intr_context++;
1176 sc->sc_bus.no_intrs++;
1177 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1178 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1181 if (eintrs & OHCI_SO) {
1182 sc->sc_overrun_cnt++;
1183 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1184 printf("%s: %u scheduling overruns\n",
1185 device_get_nameunit(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1186 sc->sc_overrun_cnt = 0;
1191 if (eintrs & OHCI_WDH) {
1192 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1193 usb_schedsoftintr(&sc->sc_bus);
1194 eintrs &= ~OHCI_WDH;
1196 if (eintrs & OHCI_RD) {
1197 printf("%s: resume detect\n", device_get_nameunit(sc->sc_bus.bdev));
1198 /* XXX process resume detect */
1200 if (eintrs & OHCI_UE) {
1201 printf("%s: unrecoverable error, controller halted\n",
1202 device_get_nameunit(sc->sc_bus.bdev));
1203 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1206 if (eintrs & OHCI_RHSC) {
1207 ohci_rhsc(sc, sc->sc_intrxfer);
1209 * Disable RHSC interrupt for now, because it will be
1210 * on until the port has been reset.
1212 ohci_rhsc_able(sc, 0);
1213 /* Do not allow RHSC interrupts > 1 per second */
1214 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1215 eintrs &= ~OHCI_RHSC;
1218 sc->sc_bus.intr_context--;
1221 /* Block unprocessed interrupts. XXX */
1222 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1223 sc->sc_eintrs &= ~eintrs;
1224 printf("%s: blocking intrs 0x%x\n",
1225 device_get_nameunit(sc->sc_bus.bdev), eintrs);
1232 ohci_rhsc_able(ohci_softc_t *sc, int on)
1234 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1236 sc->sc_eintrs |= OHCI_RHSC;
1237 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1239 sc->sc_eintrs &= ~OHCI_RHSC;
1240 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1245 ohci_rhsc_enable(void *v_sc)
1247 ohci_softc_t *sc = v_sc;
1251 ohci_rhsc_able(sc, 1);
1256 char *ohci_cc_strs[] = {
1260 "DATA_TOGGLE_MISMATCH",
1262 "DEVICE_NOT_RESPONDING",
1263 "PID_CHECK_FAILURE",
1277 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1279 ohci_soft_itd_t *sitd, *sidone, **ip;
1280 ohci_soft_td_t *std, *sdone, **p;
1282 /* Reverse the done list. */
1283 for (sdone = NULL, sidone = NULL; done != 0; ) {
1284 std = ohci_hash_find_td(sc, done);
1287 done = le32toh(std->td.td_nexttd);
1289 DPRINTFN(10,("add TD %p\n", std));
1292 sitd = ohci_hash_find_itd(sc, done);
1294 sitd->dnext = sidone;
1295 done = le32toh(sitd->itd.itd_nextitd);
1297 DPRINTFN(5,("add ITD %p\n", sitd));
1300 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1303 /* sdone & sidone now hold the done lists. */
1304 /* Put them on the already processed lists. */
1305 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1308 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1314 ohci_softintr(void *v)
1316 ohci_softc_t *sc = v;
1317 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1318 ohci_soft_td_t *std, *sdone, *stdnext, *p, *n;
1319 usbd_xfer_handle xfer;
1320 struct ohci_pipe *opipe;
1324 DPRINTFN(10,("ohci_softintr: enter\n"));
1326 sc->sc_bus.intr_context++;
1329 sdone = sc->sc_sdone;
1330 sc->sc_sdone = NULL;
1331 sidone = sc->sc_sidone;
1332 sc->sc_sidone = NULL;
1335 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1338 if (ohcidebug > 10) {
1339 DPRINTF(("ohci_process_done: TD done:\n"));
1340 ohci_dump_tds(sdone);
1344 for (std = sdone; std; std = stdnext) {
1346 stdnext = std->dnext;
1347 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1348 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1351 * xfer == NULL: There seems to be no xfer associated
1352 * with this TD. It is tailp that happened to end up on
1357 if (xfer->status == USBD_CANCELLED ||
1358 xfer->status == USBD_TIMEOUT) {
1359 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1361 /* Handled by abort routine. */
1366 if (std->td.td_cbp != 0)
1367 len -= le32toh(std->td.td_be) -
1368 le32toh(std->td.td_cbp) + 1;
1369 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1371 if (std->flags & OHCI_ADD_LEN)
1372 xfer->actlen += len;
1374 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1375 if (cc != OHCI_CC_NO_ERROR) {
1377 * Endpoint is halted. First unlink all the TDs
1378 * belonging to the failed transfer, and then restart
1381 opipe = (struct ohci_pipe *)xfer->pipe;
1383 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1384 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1385 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1386 callout_stop(&xfer->timeout_handle);
1387 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1388 &OXFER(xfer)->abort_task);
1390 /* Remove all this xfer's TDs from the done queue. */
1391 for (p = std; p->dnext != NULL; p = p->dnext) {
1392 if (p->dnext->xfer != xfer)
1394 p->dnext = p->dnext->dnext;
1396 /* The next TD may have been removed. */
1397 stdnext = std->dnext;
1399 /* Remove all TDs belonging to this xfer. */
1400 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1402 ohci_free_std(sc, p);
1406 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1407 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1409 if (cc == OHCI_CC_STALL)
1410 xfer->status = USBD_STALLED;
1412 xfer->status = USBD_IOERROR;
1414 usb_transfer_complete(xfer);
1419 * Skip intermediate TDs. They remain linked from
1420 * xfer->hcpriv and we free them when the transfer completes.
1422 if ((std->flags & OHCI_CALL_DONE) == 0)
1425 /* Normal transfer completion */
1426 callout_stop(&xfer->timeout_handle);
1427 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1428 &OXFER(xfer)->abort_task);
1429 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1431 ohci_free_std(sc, p);
1433 xfer->status = USBD_NORMAL_COMPLETION;
1435 usb_transfer_complete(xfer);
1440 if (ohcidebug > 10) {
1441 DPRINTF(("ohci_softintr: ITD done:\n"));
1442 ohci_dump_itds(sidone);
1446 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1448 sitdnext = sitd->dnext;
1449 sitd->flags |= OHCI_ITD_INTFIN;
1450 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1451 sitd, xfer, xfer ? xfer->hcpriv : 0));
1454 if (xfer->status == USBD_CANCELLED ||
1455 xfer->status == USBD_TIMEOUT) {
1456 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1458 /* Handled by abort routine. */
1462 if (xfer->pipe->aborting)
1463 continue; /*Ignore.*/
1466 printf("ohci_softintr: sitd=%p is done\n", sitd);
1469 opipe = (struct ohci_pipe *)xfer->pipe;
1470 if (opipe->aborting)
1473 if (sitd->flags & OHCI_CALL_DONE) {
1474 ohci_soft_itd_t *next;
1476 opipe->u.iso.inuse -= xfer->nframes;
1477 xfer->status = USBD_NORMAL_COMPLETION;
1478 for (i = 0, sitd = xfer->hcpriv;;sitd = next) {
1479 next = sitd->nextitd;
1480 if (OHCI_ITD_GET_CC(sitd->itd.itd_flags) != OHCI_CC_NO_ERROR)
1481 xfer->status = USBD_IOERROR;
1483 if (xfer->status == USBD_NORMAL_COMPLETION) {
1484 iframes = OHCI_ITD_GET_FC(sitd->itd.itd_flags);
1485 for (j = 0; j < iframes; i++, j++) {
1486 len = le16toh(sitd->itd.itd_offset[j]);
1488 (OHCI_ITD_PSW_GET_CC(len) ==
1489 OHCI_CC_NOT_ACCESSED) ? 0 :
1490 OHCI_ITD_PSW_LENGTH(len);
1491 xfer->frlengths[i] = len;
1494 if (sitd->flags & OHCI_CALL_DONE)
1497 for (sitd = xfer->hcpriv; sitd->xfer == xfer;
1499 next = sitd->nextitd;
1500 ohci_free_sitd(sc, sitd);
1504 usb_transfer_complete(xfer);
1509 #ifdef USB_USE_SOFTINTR
1510 if (sc->sc_softwake) {
1511 sc->sc_softwake = 0;
1512 wakeup(&sc->sc_softwake);
1514 #endif /* USB_USE_SOFTINTR */
1516 sc->sc_bus.intr_context--;
1517 DPRINTFN(10,("ohci_softintr: done:\n"));
1521 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1523 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1526 if (!(xfer->rqflags & URQ_REQUEST)) {
1527 panic("ohci_device_ctrl_done: not a request");
1530 xfer->hcpriv = NULL;
1534 ohci_device_intr_done(usbd_xfer_handle xfer)
1536 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1537 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1540 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1541 xfer, xfer->actlen));
1543 xfer->hcpriv = NULL;
1544 if (xfer->pipe->repeat) {
1545 err = ohci_device_intr_insert(sc, xfer);
1554 ohci_device_bulk_done(usbd_xfer_handle xfer)
1556 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1557 xfer, xfer->actlen));
1559 xfer->hcpriv = NULL;
1563 * XXX write back xfer data for architectures with a write-back
1564 * data cache; this is a hack because usb is mis-architected
1565 * in blindly mixing bus_dma w/ PIO.
1567 static __inline void
1568 hacksync(usbd_xfer_handle xfer)
1571 struct usb_dma_mapping *dmap;
1573 if (xfer->length == 0)
1575 tag = xfer->pipe->device->bus->buffer_dmatag;
1576 dmap = &xfer->dmamap;
1577 bus_dmamap_sync(tag, dmap->map, BUS_DMASYNC_PREWRITE);
1581 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1583 usbd_pipe_handle pipe;
1588 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1589 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1590 sc, xfer, hstatus));
1593 /* Just ignore the change. */
1600 m = min(sc->sc_noport, xfer->length * 8 - 1);
1601 memset(p, 0, xfer->length);
1602 for (i = 1; i <= m; i++) {
1603 /* Pick out CHANGE bits from the status reg. */
1604 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1605 p[i/8] |= 1 << (i%8);
1607 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1608 xfer->actlen = xfer->length;
1609 xfer->status = USBD_NORMAL_COMPLETION;
1611 hacksync(xfer); /* XXX to compensate for usb_transfer_complete */
1612 usb_transfer_complete(xfer);
1616 ohci_root_intr_done(usbd_xfer_handle xfer)
1618 xfer->hcpriv = NULL;
1622 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1624 xfer->hcpriv = NULL;
1628 * Wait here until controller claims to have an interrupt.
1629 * Then call ohci_intr and return. Use timeout to avoid waiting
1633 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1635 int timo = xfer->timeout;
1639 xfer->status = USBD_IN_PROGRESS;
1640 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1641 usb_delay_ms(&sc->sc_bus, 1);
1644 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1645 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1652 if (xfer->status != USBD_IN_PROGRESS)
1658 DPRINTF(("ohci_waitintr: timeout\n"));
1659 xfer->status = USBD_TIMEOUT;
1660 usb_transfer_complete(xfer);
1661 /* XXX should free TD */
1665 ohci_poll(struct usbd_bus *bus)
1667 ohci_softc_t *sc = (ohci_softc_t *)bus;
1671 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1673 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1678 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1683 ohci_device_request(usbd_xfer_handle xfer)
1685 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1686 usb_device_request_t *req = &xfer->request;
1687 usbd_device_handle dev = opipe->pipe.device;
1688 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1689 ohci_soft_td_t *setup, *stat, *next, *tail;
1690 ohci_soft_ed_t *sed;
1696 isread = req->bmRequestType & UT_READ;
1697 len = UGETW(req->wLength);
1699 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1700 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1701 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1702 UGETW(req->wIndex), len, dev->address,
1703 opipe->pipe.endpoint->edesc->bEndpointAddress));
1705 setup = opipe->tail.td;
1706 stat = ohci_alloc_std(sc);
1711 tail = ohci_alloc_std(sc);
1719 opipe->u.ctl.length = len;
1722 /* Set up data transaction */
1724 ohci_soft_td_t *std = stat;
1726 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1728 stat = stat->nexttd; /* point at free TD */
1731 /* Start toggle at 1 and then use the carried toggle. */
1732 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1733 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1736 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1738 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1739 OHCI_TD_TOGGLE_0 | OHCI_TD_SET_DI(6));
1740 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1741 setup->nexttd = next;
1742 setup->td.td_nexttd = htole32(next->physaddr);
1743 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1747 xfer->hcpriv = setup;
1749 stat->td.td_flags = htole32(
1750 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1751 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1752 stat->td.td_cbp = 0;
1753 stat->nexttd = tail;
1754 stat->td.td_nexttd = htole32(tail->physaddr);
1756 stat->flags = OHCI_CALL_DONE;
1761 if (ohcidebug > 5) {
1762 DPRINTF(("ohci_device_request:\n"));
1764 ohci_dump_tds(setup);
1768 /* Insert ED in schedule */
1770 sed->ed.ed_tailp = htole32(tail->physaddr);
1771 opipe->tail.td = tail;
1772 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1773 if (xfer->timeout && !sc->sc_bus.use_polling) {
1774 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1775 ohci_timeout, xfer);
1780 if (ohcidebug > 20) {
1782 DPRINTF(("ohci_device_request: status=%x\n",
1783 OREAD4(sc, OHCI_COMMAND_STATUS)));
1785 printf("ctrl head:\n");
1786 ohci_dump_ed(sc->sc_ctrl_head);
1789 ohci_dump_tds(setup);
1793 return (USBD_NORMAL_COMPLETION);
1796 ohci_free_std(sc, tail);
1798 ohci_free_std(sc, stat);
1804 * Add an ED to the schedule. Called at splusb().
1807 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1809 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1812 sed->next = head->next;
1813 sed->ed.ed_nexted = head->ed.ed_nexted;
1815 head->ed.ed_nexted = htole32(sed->physaddr);
1819 * Remove an ED from the schedule. Called at splusb().
1822 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1829 for (p = head; p != NULL && p->next != sed; p = p->next)
1832 panic("ohci_rem_ed: ED not found");
1833 p->next = sed->next;
1834 p->ed.ed_nexted = sed->ed.ed_nexted;
1838 * When a transfer is completed the TD is added to the done queue by
1839 * the host controller. This queue is the processed by software.
1840 * Unfortunately the queue contains the physical address of the TD
1841 * and we have no simple way to translate this back to a kernel address.
1842 * To make the translation possible (and fast) we use a hash table of
1843 * TDs currently in the schedule. The physical address is used as the
1847 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1848 /* Called at splusb() */
1850 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1852 int h = HASH(std->physaddr);
1856 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1859 /* Called at splusb() */
1861 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1865 LIST_REMOVE(std, hnext);
1869 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1872 ohci_soft_td_t *std;
1874 /* if these are present they should be masked out at an earlier
1877 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1878 device_get_nameunit(sc->sc_bus.bdev),
1879 (int) a, "\20\1HALT\2TOGGLE"));
1881 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1883 std = LIST_NEXT(std, hnext))
1884 if (std->physaddr == a)
1887 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1888 device_get_nameunit(sc->sc_bus.bdev), (u_long) a));
1892 /* Called at splusb() */
1894 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1896 int h = HASH(sitd->physaddr);
1900 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1901 sitd, (u_long)sitd->physaddr));
1903 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1906 /* Called at splusb() */
1908 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1912 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1913 sitd, (u_long)sitd->physaddr));
1915 LIST_REMOVE(sitd, hnext);
1919 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1922 ohci_soft_itd_t *sitd;
1924 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1926 sitd = LIST_NEXT(sitd, hnext))
1927 if (sitd->physaddr == a)
1933 ohci_timeout(void *addr)
1935 struct ohci_xfer *oxfer = addr;
1936 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1937 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1939 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1942 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1946 /* Execute the abort in a process context. */
1947 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1952 ohci_timeout_task(void *addr)
1954 usbd_xfer_handle xfer = addr;
1957 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1960 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1966 ohci_dump_tds(ohci_soft_td_t *std)
1968 for (; std; std = std->nexttd)
1973 ohci_dump_td(ohci_soft_td_t *std)
1977 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1978 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1979 sbuf, sizeof(sbuf));
1981 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1982 "nexttd=0x%08lx be=0x%08lx\n",
1983 std, (u_long)std->physaddr, sbuf,
1984 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1985 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1986 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1987 (u_long)le32toh(std->td.td_cbp),
1988 (u_long)le32toh(std->td.td_nexttd),
1989 (u_long)le32toh(std->td.td_be));
1993 ohci_dump_itd(ohci_soft_itd_t *sitd)
1997 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1998 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1999 sitd, (u_long)sitd->physaddr,
2000 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2001 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2002 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2003 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2004 (u_long)le32toh(sitd->itd.itd_bp0),
2005 (u_long)le32toh(sitd->itd.itd_nextitd),
2006 (u_long)le32toh(sitd->itd.itd_be));
2007 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2008 printf("offs[%d]=0x%04x ", i,
2009 (u_int)le16toh(sitd->itd.itd_offset[i]));
2014 ohci_dump_itds(ohci_soft_itd_t *sitd)
2016 for (; sitd; sitd = sitd->nextitd)
2017 ohci_dump_itd(sitd);
2021 ohci_dump_ed(ohci_soft_ed_t *sed)
2023 char sbuf[128], sbuf2[128];
2025 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2026 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2027 sbuf, sizeof(sbuf));
2028 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2029 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2031 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2032 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2033 sed, (u_long)sed->physaddr,
2034 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2035 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2036 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2037 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2038 (u_long)le32toh(sed->ed.ed_headp),
2039 (u_long)le32toh(sed->ed.ed_nexted));
2044 ohci_open(usbd_pipe_handle pipe)
2046 usbd_device_handle dev = pipe->device;
2047 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2048 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2049 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2050 u_int8_t addr = dev->address;
2051 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2052 ohci_soft_ed_t *sed;
2053 ohci_soft_td_t *std;
2054 ohci_soft_itd_t *sitd;
2055 ohci_physaddr_t tdphys;
2061 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2062 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2065 return (USBD_IOERROR);
2070 if (addr == sc->sc_addr) {
2071 switch (ed->bEndpointAddress) {
2072 case USB_CONTROL_ENDPOINT:
2073 pipe->methods = &ohci_root_ctrl_methods;
2075 case UE_DIR_IN | OHCI_INTR_ENDPT:
2076 pipe->methods = &ohci_root_intr_methods;
2079 return (USBD_INVAL);
2082 sed = ohci_alloc_sed(sc);
2086 if (xfertype == UE_ISOCHRONOUS) {
2087 sitd = ohci_alloc_sitd(sc);
2090 opipe->tail.itd = sitd;
2091 opipe->aborting = 0;
2092 tdphys = sitd->physaddr;
2093 fmt = OHCI_ED_FORMAT_ISO;
2094 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2095 fmt |= OHCI_ED_DIR_IN;
2097 fmt |= OHCI_ED_DIR_OUT;
2099 std = ohci_alloc_std(sc);
2102 opipe->tail.td = std;
2103 tdphys = std->physaddr;
2104 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2106 sed->ed.ed_flags = htole32(
2107 OHCI_ED_SET_FA(addr) |
2108 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2109 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2111 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2112 sed->ed.ed_headp = htole32(tdphys |
2113 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0));
2114 sed->ed.ed_tailp = htole32(tdphys);
2118 pipe->methods = &ohci_device_ctrl_methods;
2119 err = usb_allocmem(&sc->sc_bus,
2120 sizeof(usb_device_request_t),
2121 0, &opipe->u.ctl.reqdma);
2125 ohci_add_ed(sed, sc->sc_ctrl_head);
2129 pipe->methods = &ohci_device_intr_methods;
2130 ival = pipe->interval;
2131 if (ival == USBD_DEFAULT_INTERVAL)
2132 ival = ed->bInterval;
2133 return (ohci_device_setintr(sc, opipe, ival));
2134 case UE_ISOCHRONOUS:
2135 pipe->methods = &ohci_device_isoc_methods;
2136 return (ohci_setup_isoc(pipe));
2138 pipe->methods = &ohci_device_bulk_methods;
2140 ohci_add_ed(sed, sc->sc_bulk_head);
2145 return (USBD_NORMAL_COMPLETION);
2149 ohci_free_std(sc, std);
2152 ohci_free_sed(sc, sed);
2154 return (USBD_NOMEM);
2159 * Close a reqular pipe.
2160 * Assumes that there are no pending transactions.
2163 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2165 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2166 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2167 ohci_soft_ed_t *sed = opipe->sed;
2172 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2173 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2174 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2175 ohci_soft_td_t *std;
2176 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2177 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2178 "tl=0x%x pipe=%p, std=%p\n", sed,
2179 (int)le32toh(sed->ed.ed_headp),
2180 (int)le32toh(sed->ed.ed_tailp),
2183 usbd_dump_pipe(&opipe->pipe);
2190 usb_delay_ms(&sc->sc_bus, 2);
2191 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2192 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2193 printf("ohci_close_pipe: pipe still not empty\n");
2196 ohci_rem_ed(sed, head);
2197 /* Make sure the host controller is not touching this ED */
2198 usb_delay_ms(&sc->sc_bus, 1);
2200 pipe->endpoint->savedtoggle =
2201 (le32toh(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2202 ohci_free_sed(sc, opipe->sed);
2206 * Abort a device request.
2207 * If this routine is called at splusb() it guarantees that the request
2208 * will be removed from the hardware scheduling and that the callback
2209 * for it will be called with USBD_CANCELLED status.
2210 * It's impossible to guarantee that the requested transfer will not
2211 * have happened since the hardware runs concurrently.
2212 * If the transaction has already happened we rely on the ordinary
2213 * interrupt processing to process it.
2216 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2218 struct ohci_xfer *oxfer = OXFER(xfer);
2219 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2220 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2221 ohci_soft_ed_t *sed = opipe->sed;
2222 ohci_soft_td_t *p, *n;
2223 ohci_physaddr_t headp;
2226 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2229 /* If we're dying, just do the software part. */
2231 xfer->status = status; /* make software ignore it */
2232 callout_stop(&xfer->timeout_handle);
2233 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2234 usb_transfer_complete(xfer);
2239 if (xfer->device->bus->intr_context || !curproc)
2240 panic("ohci_abort_xfer: not in process context");
2243 * If an abort is already in progress then just wait for it to
2244 * complete and return.
2246 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) {
2247 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2248 /* No need to wait if we're aborting from a timeout. */
2249 if (status == USBD_TIMEOUT)
2251 /* Override the status which might be USBD_TIMEOUT. */
2252 xfer->status = status;
2253 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2254 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTWAIT;
2255 while (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING)
2256 tsleep(&oxfer->ohci_xfer_flags, PZERO, "ohciaw", 0);
2261 * Step 1: Make interrupt routine and hardware ignore xfer.
2264 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTING;
2265 xfer->status = status; /* make software ignore it */
2266 callout_stop(&xfer->timeout_handle);
2267 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2269 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2270 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2273 * Step 2: Wait until we know hardware has finished any possible
2274 * use of the xfer. Also make sure the soft interrupt routine
2277 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2279 #ifdef USB_USE_SOFTINTR
2280 sc->sc_softwake = 1;
2281 #endif /* USB_USE_SOFTINTR */
2282 usb_schedsoftintr(&sc->sc_bus);
2283 #ifdef USB_USE_SOFTINTR
2284 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2285 #endif /* USB_USE_SOFTINTR */
2289 * Step 3: Remove any vestiges of the xfer from the hardware.
2290 * The complication here is that the hardware may have executed
2291 * beyond the xfer we're trying to abort. So as we're scanning
2292 * the TDs of this xfer we check if the hardware points to
2295 s = splusb(); /* XXX why? */
2299 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; /* XXX */
2301 printf("ohci_abort_xfer: hcpriv is NULL\n");
2306 if (ohcidebug > 1) {
2307 DPRINTF(("ohci_abort_xfer: sed=\n"));
2312 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2314 for (; p->xfer == xfer; p = n) {
2315 hit |= headp == p->physaddr;
2317 ohci_free_std(sc, p);
2319 /* Zap headp register if hardware pointed inside the xfer. */
2321 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2322 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2323 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2325 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2329 * Step 4: Turn on hardware again.
2331 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2334 * Step 5: Execute callback.
2336 /* Do the wakeup first to avoid touching the xfer after the callback. */
2337 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING;
2338 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTWAIT) {
2339 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTWAIT;
2340 wakeup(&oxfer->ohci_xfer_flags);
2342 usb_transfer_complete(xfer);
2348 * Data structures and routines to emulate the root hub.
2350 static usb_device_descriptor_t ohci_devd = {
2351 USB_DEVICE_DESCRIPTOR_SIZE,
2352 UDESC_DEVICE, /* type */
2353 {0x00, 0x01}, /* USB version */
2354 UDCLASS_HUB, /* class */
2355 UDSUBCLASS_HUB, /* subclass */
2356 UDPROTO_FSHUB, /* protocol */
2357 64, /* max packet */
2358 {0},{0},{0x00,0x01}, /* device id */
2359 1,2,0, /* string indicies */
2360 1 /* # of configurations */
2363 static usb_config_descriptor_t ohci_confd = {
2364 USB_CONFIG_DESCRIPTOR_SIZE,
2366 {USB_CONFIG_DESCRIPTOR_SIZE +
2367 USB_INTERFACE_DESCRIPTOR_SIZE +
2368 USB_ENDPOINT_DESCRIPTOR_SIZE},
2376 static usb_interface_descriptor_t ohci_ifcd = {
2377 USB_INTERFACE_DESCRIPTOR_SIZE,
2388 static usb_endpoint_descriptor_t ohci_endpd = {
2389 USB_ENDPOINT_DESCRIPTOR_SIZE,
2391 UE_DIR_IN | OHCI_INTR_ENDPT,
2393 {8, 0}, /* max packet */
2397 static usb_hub_descriptor_t ohci_hubd = {
2398 USB_HUB_DESCRIPTOR_SIZE,
2408 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2414 p->bLength = 2 * strlen(s) + 2;
2417 p->bDescriptorType = UDESC_STRING;
2419 for (i = 0; s[i] && l > 1; i++, l -= 2)
2420 USETW2(p->bString[i], 0, s[i]);
2425 * Simulate a hardware hub by handling all the necessary requests.
2428 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2432 /* Insert last in queue. */
2433 err = usb_insert_transfer(xfer);
2437 /* Pipe isn't running, start first */
2438 return (ohci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2442 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2444 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2445 usb_device_request_t *req;
2448 int s, len, value, index, l, totlen = 0;
2449 usb_port_status_t ps;
2450 usb_hub_descriptor_t hubd;
2455 return (USBD_IOERROR);
2458 if (!(xfer->rqflags & URQ_REQUEST))
2460 return (USBD_INVAL);
2462 req = &xfer->request;
2464 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2465 req->bmRequestType, req->bRequest));
2467 len = UGETW(req->wLength);
2468 value = UGETW(req->wValue);
2469 index = UGETW(req->wIndex);
2474 #define C(x,y) ((x) | ((y) << 8))
2475 switch(C(req->bRequest, req->bmRequestType)) {
2476 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2477 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2478 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2480 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2481 * for the integrated root hub.
2484 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2486 *(u_int8_t *)buf = sc->sc_conf;
2490 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2491 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2492 switch(value >> 8) {
2494 if ((value & 0xff) != 0) {
2498 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2499 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2500 memcpy(buf, &ohci_devd, l);
2503 if ((value & 0xff) != 0) {
2507 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2508 memcpy(buf, &ohci_confd, l);
2509 buf = (char *)buf + l;
2511 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2513 memcpy(buf, &ohci_ifcd, l);
2514 buf = (char *)buf + l;
2516 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2518 memcpy(buf, &ohci_endpd, l);
2523 *(u_int8_t *)buf = 0;
2525 switch (value & 0xff) {
2526 case 1: /* Vendor */
2527 totlen = ohci_str(buf, len, sc->sc_vendor);
2529 case 2: /* Product */
2530 totlen = ohci_str(buf, len, "OHCI root hub");
2539 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2541 *(u_int8_t *)buf = 0;
2545 case C(UR_GET_STATUS, UT_READ_DEVICE):
2547 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2551 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2552 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2554 USETW(((usb_status_t *)buf)->wStatus, 0);
2558 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2559 if (value >= USB_MAX_DEVICES) {
2563 sc->sc_addr = value;
2565 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2566 if (value != 0 && value != 1) {
2570 sc->sc_conf = value;
2572 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2574 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2575 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2576 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2579 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2581 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2584 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2586 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2587 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2588 "port=%d feature=%d\n",
2590 if (index < 1 || index > sc->sc_noport) {
2594 port = OHCI_RH_PORT_STATUS(index);
2596 case UHF_PORT_ENABLE:
2597 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2599 case UHF_PORT_SUSPEND:
2600 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2602 case UHF_PORT_POWER:
2603 /* Yes, writing to the LOW_SPEED bit clears power. */
2604 OWRITE4(sc, port, UPS_LOW_SPEED);
2606 case UHF_C_PORT_CONNECTION:
2607 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2609 case UHF_C_PORT_ENABLE:
2610 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2612 case UHF_C_PORT_SUSPEND:
2613 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2615 case UHF_C_PORT_OVER_CURRENT:
2616 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2618 case UHF_C_PORT_RESET:
2619 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2626 case UHF_C_PORT_CONNECTION:
2627 case UHF_C_PORT_ENABLE:
2628 case UHF_C_PORT_SUSPEND:
2629 case UHF_C_PORT_OVER_CURRENT:
2630 case UHF_C_PORT_RESET:
2631 /* Enable RHSC interrupt if condition is cleared. */
2632 if ((OREAD4(sc, port) >> 16) == 0)
2633 ohci_rhsc_able(sc, 1);
2639 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2640 if ((value & 0xff) != 0) {
2644 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2646 hubd.bNbrPorts = sc->sc_noport;
2647 USETW(hubd.wHubCharacteristics,
2648 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2649 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2650 /* XXX overcurrent */
2652 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2653 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2654 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2655 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2656 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2657 l = min(len, hubd.bDescLength);
2659 memcpy(buf, &hubd, l);
2661 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2666 memset(buf, 0, len); /* ? XXX */
2669 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2670 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2672 if (index < 1 || index > sc->sc_noport) {
2680 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2681 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2683 USETW(ps.wPortStatus, v);
2684 USETW(ps.wPortChange, v >> 16);
2685 l = min(len, sizeof ps);
2686 memcpy(buf, &ps, l);
2689 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2692 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2694 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2695 if (index < 1 || index > sc->sc_noport) {
2699 port = OHCI_RH_PORT_STATUS(index);
2701 case UHF_PORT_ENABLE:
2702 OWRITE4(sc, port, UPS_PORT_ENABLED);
2704 case UHF_PORT_SUSPEND:
2705 OWRITE4(sc, port, UPS_SUSPEND);
2707 case UHF_PORT_RESET:
2708 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2710 OWRITE4(sc, port, UPS_RESET);
2711 for (i = 0; i < 5; i++) {
2712 usb_delay_ms(&sc->sc_bus,
2713 USB_PORT_ROOT_RESET_DELAY);
2718 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2721 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2722 index, OREAD4(sc, port)));
2724 case UHF_PORT_POWER:
2725 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2727 OWRITE4(sc, port, UPS_PORT_POWER);
2738 xfer->actlen = totlen;
2739 err = USBD_NORMAL_COMPLETION;
2743 hacksync(xfer); /* XXX to compensate for usb_transfer_complete */
2744 usb_transfer_complete(xfer);
2746 return (USBD_IN_PROGRESS);
2749 /* Abort a root control request. */
2751 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2753 /* Nothing to do, all transfers are synchronous. */
2756 /* Close the root pipe. */
2758 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2760 DPRINTF(("ohci_root_ctrl_close\n"));
2761 /* Nothing to do. */
2765 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2769 /* Insert last in queue. */
2770 err = usb_insert_transfer(xfer);
2774 /* Pipe isn't running, start first */
2775 return (ohci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2779 ohci_root_intr_start(usbd_xfer_handle xfer)
2781 usbd_pipe_handle pipe = xfer->pipe;
2782 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2785 return (USBD_IOERROR);
2787 sc->sc_intrxfer = xfer;
2789 return (USBD_IN_PROGRESS);
2792 /* Abort a root interrupt request. */
2794 ohci_root_intr_abort(usbd_xfer_handle xfer)
2798 if (xfer->pipe->intrxfer == xfer) {
2799 DPRINTF(("ohci_root_intr_abort: remove\n"));
2800 xfer->pipe->intrxfer = NULL;
2802 xfer->status = USBD_CANCELLED;
2804 usb_transfer_complete(xfer);
2808 /* Close the root pipe. */
2810 ohci_root_intr_close(usbd_pipe_handle pipe)
2812 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2814 DPRINTF(("ohci_root_intr_close\n"));
2816 sc->sc_intrxfer = NULL;
2819 /************************/
2822 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2826 /* Insert last in queue. */
2827 err = usb_insert_transfer(xfer);
2831 /* Pipe isn't running, start first */
2832 return (ohci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2836 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2838 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2842 return (USBD_IOERROR);
2845 if (!(xfer->rqflags & URQ_REQUEST)) {
2847 printf("ohci_device_ctrl_transfer: not a request\n");
2848 return (USBD_INVAL);
2852 err = ohci_device_request(xfer);
2856 if (sc->sc_bus.use_polling)
2857 ohci_waitintr(sc, xfer);
2858 return (USBD_IN_PROGRESS);
2861 /* Abort a device control request. */
2863 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2865 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2866 ohci_abort_xfer(xfer, USBD_CANCELLED);
2869 /* Close a device control pipe. */
2871 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2873 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2874 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2876 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2877 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2878 ohci_free_std(sc, opipe->tail.td);
2881 /************************/
2884 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2886 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2888 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2892 ohci_noop(usbd_pipe_handle pipe)
2897 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2901 /* Insert last in queue. */
2902 err = usb_insert_transfer(xfer);
2906 /* Pipe isn't running, start first */
2907 return (ohci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2911 ohci_device_bulk_start(usbd_xfer_handle xfer)
2913 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2914 usbd_device_handle dev = opipe->pipe.device;
2915 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2916 int addr = dev->address;
2917 ohci_soft_td_t *data, *tail, *tdp;
2918 ohci_soft_ed_t *sed;
2919 int s, len, isread, endpt;
2923 return (USBD_IOERROR);
2926 if (xfer->rqflags & URQ_REQUEST) {
2928 printf("ohci_device_bulk_start: a request\n");
2929 return (USBD_INVAL);
2934 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2935 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2938 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2939 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2942 opipe->u.bulk.isread = isread;
2943 opipe->u.bulk.length = len;
2945 /* Update device address */
2946 sed->ed.ed_flags = htole32(
2947 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2948 OHCI_ED_SET_FA(addr));
2950 /* Allocate a chain of new TDs (including a new tail). */
2951 data = opipe->tail.td;
2952 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2954 /* We want interrupt at the end of the transfer. */
2955 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2956 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2957 tail->flags |= OHCI_CALL_DONE;
2958 tail = tail->nexttd; /* point at sentinel */
2963 xfer->hcpriv = data;
2965 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2966 "td_cbp=0x%08x td_be=0x%08x\n",
2967 (int)le32toh(sed->ed.ed_flags),
2968 (int)le32toh(data->td.td_flags),
2969 (int)le32toh(data->td.td_cbp),
2970 (int)le32toh(data->td.td_be)));
2973 if (ohcidebug > 5) {
2975 ohci_dump_tds(data);
2979 /* Insert ED in schedule */
2981 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2984 sed->ed.ed_tailp = htole32(tail->physaddr);
2985 opipe->tail.td = tail;
2986 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2987 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2988 if (xfer->timeout && !sc->sc_bus.use_polling) {
2989 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2990 ohci_timeout, xfer);
2994 /* This goes wrong if we are too slow. */
2995 if (ohcidebug > 10) {
2997 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2998 OREAD4(sc, OHCI_COMMAND_STATUS)));
3000 ohci_dump_tds(data);
3006 if (sc->sc_bus.use_polling)
3007 ohci_waitintr(sc, xfer);
3009 return (USBD_IN_PROGRESS);
3013 ohci_device_bulk_abort(usbd_xfer_handle xfer)
3015 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3016 ohci_abort_xfer(xfer, USBD_CANCELLED);
3020 * Close a device bulk pipe.
3023 ohci_device_bulk_close(usbd_pipe_handle pipe)
3025 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3026 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3028 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3029 ohci_close_pipe(pipe, sc->sc_bulk_head);
3030 ohci_free_std(sc, opipe->tail.td);
3033 /************************/
3036 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3040 /* Insert last in queue. */
3041 err = usb_insert_transfer(xfer);
3045 /* Pipe isn't running, start first */
3046 return (ohci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
3050 ohci_device_intr_start(usbd_xfer_handle xfer)
3052 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3053 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3054 ohci_soft_ed_t *sed = opipe->sed;
3058 return (USBD_IOERROR);
3060 DPRINTFN(3, ("ohci_device_intr_start: xfer=%p len=%d "
3061 "flags=%d priv=%p\n",
3062 xfer, xfer->length, xfer->flags, xfer->priv));
3065 if (xfer->rqflags & URQ_REQUEST)
3066 panic("ohci_device_intr_start: a request");
3069 err = ohci_device_intr_insert(sc, xfer);
3073 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3075 return (USBD_IN_PROGRESS);
3079 * Insert an interrupt transfer into an endpoint descriptor list
3082 ohci_device_intr_insert(ohci_softc_t *sc, usbd_xfer_handle xfer)
3084 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3085 ohci_soft_ed_t *sed = opipe->sed;
3086 ohci_soft_td_t *data, *tail;
3087 ohci_physaddr_t dataphys, physend;
3090 DPRINTFN(4, ("ohci_device_intr_insert: xfer=%p", xfer));
3092 data = opipe->tail.td;
3093 tail = ohci_alloc_std(sc);
3095 return (USBD_NOMEM);
3098 data->td.td_flags = htole32(
3099 OHCI_TD_IN | OHCI_TD_NOCC |
3100 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3101 if (xfer->flags & USBD_SHORT_XFER_OK)
3102 data->td.td_flags |= htole32(OHCI_TD_R);
3104 * Assume a short mapping with no complications, which
3105 * should always be true for <= 4k buffers in contiguous
3106 * virtual memory. The data can take the following forms:
3107 * 1 segment in 1 OHCI page
3108 * 1 segment in 2 OHCI pages
3109 * 2 segments in 2 OHCI pages
3110 * (see comment in ohci_alloc_std_chain() for details)
3112 KASSERT(xfer->length > 0 && xfer->length <= OHCI_PAGE_SIZE,
3113 ("ohci_device_intr_insert: bad length %d", xfer->length));
3114 dataphys = xfer->dmamap.segs[0].ds_addr;
3115 physend = dataphys + xfer->length - 1;
3116 if (xfer->dmamap.nsegs == 2) {
3117 KASSERT(OHCI_PAGE_OFFSET(dataphys +
3118 xfer->dmamap.segs[0].ds_len) == 0,
3119 ("ohci_device_intr_insert: bad seg 0 termination"));
3120 physend = xfer->dmamap.segs[1].ds_addr + xfer->length -
3121 xfer->dmamap.segs[0].ds_len - 1;
3123 KASSERT(xfer->dmamap.nsegs == 1,
3124 ("ohci_device_intr_insert: bad seg count %d",
3125 (u_int)xfer->dmamap.nsegs));
3127 data->td.td_cbp = htole32(dataphys);
3128 data->nexttd = tail;
3129 data->td.td_nexttd = htole32(tail->physaddr);
3130 data->td.td_be = htole32(physend);
3131 data->len = xfer->length;
3133 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3134 xfer->hcpriv = data;
3138 if (ohcidebug > 5) {
3139 DPRINTF(("ohci_device_intr_insert:\n"));
3141 ohci_dump_tds(data);
3145 /* Insert ED in schedule */
3147 sed->ed.ed_tailp = htole32(tail->physaddr);
3148 opipe->tail.td = tail;
3151 return (USBD_NORMAL_COMPLETION);
3154 /* Abort a device control request. */
3156 ohci_device_intr_abort(usbd_xfer_handle xfer)
3158 if (xfer->pipe->intrxfer == xfer) {
3159 DPRINTF(("ohci_device_intr_abort: remove\n"));
3160 xfer->pipe->intrxfer = NULL;
3162 ohci_abort_xfer(xfer, USBD_CANCELLED);
3165 /* Close a device interrupt pipe. */
3167 ohci_device_intr_close(usbd_pipe_handle pipe)
3169 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3170 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3171 int nslots = opipe->u.intr.nslots;
3172 int pos = opipe->u.intr.pos;
3174 ohci_soft_ed_t *p, *sed = opipe->sed;
3177 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3178 pipe, nslots, pos));
3180 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3181 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3182 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3183 usb_delay_ms(&sc->sc_bus, 2);
3185 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3186 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3187 panic("%s: Intr pipe %p still has TDs queued",
3188 device_get_nameunit(sc->sc_bus.bdev), pipe);
3191 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3195 panic("ohci_device_intr_close: ED not found");
3197 p->next = sed->next;
3198 p->ed.ed_nexted = sed->ed.ed_nexted;
3201 for (j = 0; j < nslots; j++)
3202 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3204 ohci_free_std(sc, opipe->tail.td);
3205 ohci_free_sed(sc, opipe->sed);
3209 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3212 u_int npoll, slow, shigh, nslots;
3214 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3216 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3218 printf("ohci_setintr: 0 interval\n");
3219 return (USBD_INVAL);
3222 npoll = OHCI_NO_INTRS;
3223 while (npoll > ival)
3225 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3228 * We now know which level in the tree the ED must go into.
3229 * Figure out which slot has most bandwidth left over.
3235 * 8 7 8 9 10 11 12 13 14
3236 * N (N-1) .. (N-1+N-1)
3239 shigh = slow + npoll;
3240 nslots = OHCI_NO_INTRS / npoll;
3241 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3243 for (j = 0; j < nslots; j++)
3244 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3250 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3251 best, slow, shigh, bestbw));
3254 hsed = sc->sc_eds[best];
3255 sed->next = hsed->next;
3256 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3258 hsed->ed.ed_nexted = htole32(sed->physaddr);
3261 for (j = 0; j < nslots; j++)
3262 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3263 opipe->u.intr.nslots = nslots;
3264 opipe->u.intr.pos = best;
3266 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3267 return (USBD_NORMAL_COMPLETION);
3270 /***********************/
3273 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3277 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3279 /* Put it on our queue, */
3280 err = usb_insert_transfer(xfer);
3282 /* bail out on error, */
3283 if (err && err != USBD_IN_PROGRESS)
3286 /* XXX should check inuse here */
3288 /* insert into schedule, */
3289 ohci_device_isoc_enter(xfer);
3291 /* and start if the pipe wasn't running */
3293 ohci_device_isoc_start(STAILQ_FIRST(&xfer->pipe->queue));
3299 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3301 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3302 usbd_device_handle dev = opipe->pipe.device;
3303 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3304 ohci_soft_ed_t *sed = opipe->sed;
3305 struct iso *iso = &opipe->u.iso;
3306 struct usb_dma_mapping *dma = &xfer->dmamap;
3307 ohci_soft_itd_t *sitd, *nsitd;
3308 ohci_physaddr_t dataphys, bp0, physend, prevpage;
3309 int curlen, i, len, ncur, nframes, npages, seg, segoff;
3312 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3314 iso->inuse, iso->next, xfer, xfer->nframes));
3319 if (iso->next == -1) {
3320 /* Not in use yet, schedule it a few frames ahead. */
3321 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3322 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3326 sitd = opipe->tail.itd;
3327 nframes = xfer->nframes;
3328 xfer->hcpriv = sitd;
3332 while (i < nframes) {
3334 * Fill in as many ITD frames as possible.
3336 KASSERT(seg < dma->nsegs, ("ohci_device_isoc_enter: overrun"));
3337 bp0 = dma->segs[seg].ds_addr + segoff;
3338 sitd->itd.itd_bp0 = htole32(bp0);
3339 prevpage = OHCI_PAGE(bp0);
3343 while (ncur < OHCI_ITD_NOFFSET && i < nframes) {
3344 /* Find the frame start and end physical addresses. */
3345 len = xfer->frlengths[i];
3346 dataphys = dma->segs[seg].ds_addr + segoff;
3347 curlen = dma->segs[seg].ds_len - segoff;
3349 KASSERT(seg + 1 < dma->nsegs,
3350 ("ohci_device_isoc_enter: overrun2"));
3352 segoff = len - curlen;
3356 KASSERT(segoff <= dma->segs[seg].ds_len,
3357 ("ohci_device_isoc_enter: overrun3"));
3358 physend = dma->segs[seg].ds_addr + segoff - 1;
3360 /* Check if there would be more than 2 pages . */
3361 if (OHCI_PAGE(dataphys) != prevpage) {
3362 prevpage = OHCI_PAGE(dataphys);
3365 if (OHCI_PAGE(physend) != prevpage) {
3366 prevpage = OHCI_PAGE(physend);
3370 /* We cannot fit this frame now. */
3374 segoff += dma->segs[seg].ds_len;
3379 sitd->itd.itd_be = htole32(physend);
3380 sitd->itd.itd_offset[ncur] =
3381 htole16(OHCI_ITD_MK_OFFS(OHCI_PAGE(dataphys) ==
3382 OHCI_PAGE(bp0) ? 0 : 1, dataphys));
3386 if (segoff >= dma->segs[seg].ds_len) {
3387 KASSERT(segoff == dma->segs[seg].ds_len,
3388 ("ohci_device_isoc_enter: overlap"));
3393 /* Allocate next ITD */
3394 nsitd = ohci_alloc_sitd(sc);
3395 if (nsitd == NULL) {
3397 printf("%s: isoc TD alloc failed\n",
3398 device_get_nameunit(sc->sc_bus.bdev));
3402 /* Fill out remaining fields of current ITD */
3403 sitd->nextitd = nsitd;
3404 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3407 sitd->itd.itd_flags = htole32(
3409 OHCI_ITD_SET_SF(iso->next) |
3410 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3411 OHCI_ITD_SET_FC(ncur));
3412 sitd->flags = OHCI_ITD_ACTIVE;
3414 sitd->itd.itd_flags = htole32(
3416 OHCI_ITD_SET_SF(iso->next) |
3417 OHCI_ITD_SET_DI(0) |
3418 OHCI_ITD_SET_FC(ncur));
3419 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3426 iso->inuse += nframes;
3428 /* XXX pretend we did it all */
3430 for (i = 0; i < nframes; i++)
3431 xfer->actlen += xfer->frlengths[i];
3433 xfer->status = USBD_IN_PROGRESS;
3436 if (ohcidebug > 5) {
3437 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3438 le32toh(sc->sc_hcca->hcca_frame_number)));
3439 ohci_dump_itds(xfer->hcpriv);
3445 opipe->tail.itd = sitd;
3446 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3447 sed->ed.ed_tailp = htole32(sitd->physaddr);
3451 if (ohcidebug > 5) {
3453 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3454 le32toh(sc->sc_hcca->hcca_frame_number)));
3455 ohci_dump_itds(xfer->hcpriv);
3462 ohci_device_isoc_start(usbd_xfer_handle xfer)
3464 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3465 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3466 ohci_soft_ed_t *sed;
3469 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3472 return (USBD_IOERROR);
3475 if (xfer->status != USBD_IN_PROGRESS)
3476 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3479 /* XXX anything to do? */
3482 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3483 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3486 return (USBD_IN_PROGRESS);
3490 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3492 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3493 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3494 ohci_soft_ed_t *sed;
3495 ohci_soft_itd_t *sitd, *sitdnext, *tmp_sitd;
3496 int s,undone,num_sitds;
3499 opipe->aborting = 1;
3501 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3503 /* Transfer is already done. */
3504 if (xfer->status != USBD_NOT_STARTED &&
3505 xfer->status != USBD_IN_PROGRESS) {
3507 printf("ohci_device_isoc_abort: early return\n");
3511 /* Give xfer the requested abort code. */
3512 xfer->status = USBD_CANCELLED;
3515 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3518 sitd = xfer->hcpriv;
3522 printf("ohci_device_isoc_abort: hcpriv==0\n");
3526 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3529 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3537 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3538 * take a usb 1ms cycle. Conservatively wait for it to drain.
3539 * Even with DMA done, it can take awhile for the "batch"
3540 * delivery of completion interrupts to occur thru the controller.
3544 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3547 tmp_sitd = xfer->hcpriv;
3548 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3549 tmp_sitd = tmp_sitd->nextitd) {
3550 if (OHCI_CC_NO_ERROR ==
3551 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3552 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3553 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3556 } while( undone != 0 );
3558 /* Free the sitds */
3559 for (sitd = xfer->hcpriv; sitd->xfer == xfer;
3561 sitdnext = sitd->nextitd;
3562 ohci_free_sitd(sc, sitd);
3568 usb_transfer_complete(xfer);
3570 /* There is always a `next' sitd so link it up. */
3571 sed->ed.ed_headp = htole32(sitd->physaddr);
3573 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3579 ohci_device_isoc_done(usbd_xfer_handle xfer)
3581 /* This null routine corresponds to non-isoc "done()" routines
3582 * that free the stds associated with an xfer after a completed
3583 * xfer interrupt. However, in the case of isoc transfers, the
3584 * sitds associated with the transfer have already been processed
3585 * and reallocated for the next iteration by
3586 * "ohci_device_isoc_transfer()".
3588 * Routine "usb_transfer_complete()" is called at the end of every
3589 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3590 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3591 * pipeline by setting up the next transfer iteration) and 2) then
3592 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3593 * working for the ohci usb because this routine was trashing the
3594 * xfer set up for the next iteration (thus, only the first
3595 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3596 * this could all be re-factored, but that's another pass...
3601 ohci_setup_isoc(usbd_pipe_handle pipe)
3603 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3604 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3605 struct iso *iso = &opipe->u.iso;
3612 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3615 return (USBD_NORMAL_COMPLETION);
3619 ohci_device_isoc_close(usbd_pipe_handle pipe)
3621 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3622 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3623 ohci_soft_ed_t *sed;
3625 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3628 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3630 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3632 /* up to NISOREQs xfers still outstanding. */
3635 opipe->tail.itd->isdone = 1;
3637 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/