2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * This driver supports several multiport USB-to-RS232 serial adapters driven
29 * by MosChip mos7820 and mos7840, bridge chips.
30 * The adapters are sold under many different brand names.
32 * Datasheets are available at MosChip www site at
33 * http://www.moschip.com. The datasheets don't contain full
34 * programming information for the chip.
36 * It is nornal to have only two enabled ports in devices, based on
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/stdint.h>
44 #include <sys/stddef.h>
45 #include <sys/param.h>
46 #include <sys/queue.h>
47 #include <sys/types.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
51 #include <sys/linker_set.h>
52 #include <sys/module.h>
54 #include <sys/mutex.h>
55 #include <sys/condvar.h>
56 #include <sys/sysctl.h>
58 #include <sys/unistd.h>
59 #include <sys/callout.h>
60 #include <sys/malloc.h>
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
65 #include <dev/usb/usbdi_util.h>
66 #include <dev/usb/usb_cdc.h>
69 #define USB_DEBUG_VAR umcs_debug
70 #include <dev/usb/usb_debug.h>
71 #include <dev/usb/usb_process.h>
73 #include <dev/usb/serial/usb_serial.h>
75 #include <dev/usb/serial/umcs.h>
77 #define UMCS7840_MODVER 1
80 static int umcs_debug = 0;
82 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
83 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level");
84 #endif /* USB_DEBUG */
88 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
89 * have ports 0 and 2, with ports 1 and 3 omitted.
90 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
91 * This driver trys to use physical numbers as much as possible.
95 * Indexed by PHYSICAL port number.
96 * Pack non-regular registers to array to easier if-less access.
98 struct umcs7840_port_registers {
99 uint8_t reg_sp; /* SP register. */
100 uint8_t reg_control; /* CONTROL register. */
101 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be
105 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
106 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
107 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
108 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
109 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
118 struct umcs7840_softc_oneport {
119 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures
120 * for two transfers */
122 uint8_t sc_lcr; /* local line control register */
123 uint8_t sc_mcr; /* local modem control register */
126 struct umcs7840_softc {
127 struct ucom_super_softc sc_super_ucom;
128 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous
129 * array, so indexed by
131 * (subunit) number */
133 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */
135 device_t sc_dev; /* Device for error prints */
136 struct usb_device *sc_udev; /* USB Device for all operations */
137 struct mtx sc_mtx; /* ucom requires this */
139 uint8_t sc_driver_done; /* Flag when enumeration is finished */
141 uint8_t sc_numports; /* Number of ports (subunits) */
142 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL
147 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
148 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
149 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
150 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
152 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
153 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
155 static void umcs7840_free(struct ucom_softc *);
156 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
157 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
158 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
159 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
160 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
161 static void umcs7840_cfg_open(struct ucom_softc *);
162 static void umcs7840_cfg_close(struct ucom_softc *);
164 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
166 static void umcs7840_start_read(struct ucom_softc *);
167 static void umcs7840_stop_read(struct ucom_softc *);
169 static void umcs7840_start_write(struct ucom_softc *);
170 static void umcs7840_stop_write(struct ucom_softc *);
172 static void umcs7840_poll(struct ucom_softc *ucom);
174 static device_probe_t umcs7840_probe;
175 static device_attach_t umcs7840_attach;
176 static device_detach_t umcs7840_detach;
177 static void umcs7840_free_softc(struct umcs7840_softc *);
179 static usb_callback_t umcs7840_intr_callback;
180 static usb_callback_t umcs7840_read_callback1;
181 static usb_callback_t umcs7840_read_callback2;
182 static usb_callback_t umcs7840_read_callback3;
183 static usb_callback_t umcs7840_read_callback4;
184 static usb_callback_t umcs7840_write_callback1;
185 static usb_callback_t umcs7840_write_callback2;
186 static usb_callback_t umcs7840_write_callback3;
187 static usb_callback_t umcs7840_write_callback4;
189 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
190 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
192 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
193 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
194 {&umcs7840_read_callback1, &umcs7840_write_callback1},
195 {&umcs7840_read_callback2, &umcs7840_write_callback2},
196 {&umcs7840_read_callback3, &umcs7840_write_callback3},
197 {&umcs7840_read_callback4, &umcs7840_write_callback4},
200 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
201 [UMCS7840_BULK_RD_EP] = {
204 .direction = UE_DIR_IN,
205 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
206 .bufsize = 0, /* use wMaxPacketSize */
207 .callback = &umcs7840_read_callback1,
211 [UMCS7840_BULK_WR_EP] = {
214 .direction = UE_DIR_OUT,
215 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
216 .bufsize = 0, /* use wMaxPacketSize */
217 .callback = &umcs7840_write_callback1,
222 static const struct usb_config umcs7840_intr_config_data[1] = {
224 .type = UE_INTERRUPT,
226 .direction = UE_DIR_IN,
227 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
228 .bufsize = 0, /* use wMaxPacketSize */
229 .callback = &umcs7840_intr_callback,
234 static struct ucom_callback umcs7840_callback = {
235 .ucom_cfg_get_status = &umcs7840_cfg_get_status,
237 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
238 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
239 .ucom_cfg_set_break = &umcs7840_cfg_set_break,
241 .ucom_cfg_param = &umcs7840_cfg_param,
242 .ucom_cfg_open = &umcs7840_cfg_open,
243 .ucom_cfg_close = &umcs7840_cfg_close,
245 .ucom_pre_param = &umcs7840_pre_param,
247 .ucom_start_read = &umcs7840_start_read,
248 .ucom_stop_read = &umcs7840_stop_read,
250 .ucom_start_write = &umcs7840_start_write,
251 .ucom_stop_write = &umcs7840_stop_write,
253 .ucom_poll = &umcs7840_poll,
254 .ucom_free = &umcs7840_free,
257 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
258 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
259 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
262 static device_method_t umcs7840_methods[] = {
263 DEVMETHOD(device_probe, umcs7840_probe),
264 DEVMETHOD(device_attach, umcs7840_attach),
265 DEVMETHOD(device_detach, umcs7840_detach),
269 static devclass_t umcs7840_devclass;
271 static driver_t umcs7840_driver = {
273 .methods = umcs7840_methods,
274 .size = sizeof(struct umcs7840_softc),
277 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0);
278 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
279 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
280 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
281 USB_PNP_HOST_INFO(umcs7840_devs);
284 umcs7840_probe(device_t dev)
286 struct usb_attach_arg *uaa = device_get_ivars(dev);
288 if (uaa->usb_mode != USB_MODE_HOST)
290 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
292 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
294 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
298 umcs7840_attach(device_t dev)
300 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
301 struct usb_attach_arg *uaa = device_get_ivars(dev);
302 struct umcs7840_softc *sc = device_get_softc(dev);
304 uint8_t iface_index = MCS7840_IFACE_INDEX;
310 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
311 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
313 device_set_usb_desc(dev);
314 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
315 ucom_ref(&sc->sc_super_ucom);
318 sc->sc_udev = uaa->device;
321 * Get number of ports
322 * Documentation (full datasheet) says, that number of ports is
323 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
324 * register. But vendor driver uses these undocumented
327 * Experiments show, that MODE register can have `0'
328 * (4 ports) bit on 2-port device, so use vendor driver's way.
330 * Also, see notes in header file for these constants.
332 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
333 if (data & MCS7840_DEV_GPIO_4PORTS) {
335 /* Store physical port numbers in sc_portno */
336 sc->sc_ucom[0].sc_portno = 0;
337 sc->sc_ucom[1].sc_portno = 1;
338 sc->sc_ucom[2].sc_portno = 2;
339 sc->sc_ucom[3].sc_portno = 3;
342 /* Store physical port numbers in sc_portno */
343 sc->sc_ucom[0].sc_portno = 0;
344 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */
346 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
347 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
348 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
349 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
350 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
351 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
352 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
353 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
354 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
355 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
357 /* Setup all transfers */
358 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
359 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
360 /* Set endpoint address */
361 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
362 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
364 error = usbd_transfer_setup(uaa->device,
365 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
366 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
368 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
369 subunit + 1, sc->sc_numports);
373 error = usbd_transfer_setup(uaa->device,
374 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
377 device_printf(dev, "allocating USB transfers failed for interrupt\n");
380 /* clear stall at first run */
381 mtx_lock(&sc->sc_mtx);
382 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
383 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
384 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
386 mtx_unlock(&sc->sc_mtx);
388 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
389 &umcs7840_callback, &sc->sc_mtx);
393 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
398 umcs7840_detach(dev);
403 umcs7840_detach(device_t dev)
405 struct umcs7840_softc *sc = device_get_softc(dev);
408 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
410 for (subunit = 0; subunit < sc->sc_numports; ++subunit)
411 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
412 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
414 device_claim_softc(dev);
416 umcs7840_free_softc(sc);
421 UCOM_UNLOAD_DRAIN(umcs7840);
424 umcs7840_free_softc(struct umcs7840_softc *sc)
426 if (ucom_unref(&sc->sc_super_ucom)) {
427 mtx_destroy(&sc->sc_mtx);
428 device_free_softc(sc);
433 umcs7840_free(struct ucom_softc *ucom)
435 umcs7840_free_softc(ucom->sc_parent);
439 umcs7840_cfg_open(struct ucom_softc *ucom)
441 struct umcs7840_softc *sc = ucom->sc_parent;
442 uint16_t pn = ucom->sc_portno;
445 /* If it very first open, finish global configuration */
446 if (!sc->sc_driver_done) {
448 * USB enumeration is finished, pass internal memory to FIFOs
449 * If it is done in the end of "attach", kernel panics.
451 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
453 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
454 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
456 sc->sc_driver_done = 1;
458 /* Toggle reset bit on-off */
459 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
461 data |= MCS7840_DEV_SPx_UART_RESET;
462 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
464 data &= ~MCS7840_DEV_SPx_UART_RESET;
465 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
468 /* Set RS-232 mode */
469 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
472 /* Disable RX on time of initialization */
473 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
475 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
476 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
479 /* Disable all interrupts */
480 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
483 /* Reset FIFO -- documented */
484 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
486 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
487 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
488 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
491 /* Set 8 bit, no parity, 1 stop bit -- documented */
492 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
493 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
497 * Enable DTR/RTS on modem control, enable modem interrupts --
500 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE;
501 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
504 /* Clearing Bulkin and Bulkout FIFO */
505 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
507 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
508 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
510 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
511 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
515 if (umcs7840_set_baudrate(sc, pn, 9600))
519 /* Finally enable all interrupts -- documented */
521 * Copied from vendor driver, I don't know why we should read LCR
524 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
526 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
527 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
531 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
533 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
534 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
537 DPRINTF("Port %d has been opened\n", pn);
541 umcs7840_cfg_close(struct ucom_softc *ucom)
543 struct umcs7840_softc *sc = ucom->sc_parent;
544 uint16_t pn = ucom->sc_portno;
547 umcs7840_stop_read(ucom);
548 umcs7840_stop_write(ucom);
550 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
551 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
554 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
556 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
557 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
559 DPRINTF("Port %d has been closed\n", pn);
563 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
565 struct umcs7840_softc *sc = ucom->sc_parent;
566 uint8_t pn = ucom->sc_portno;
569 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
571 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
573 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
574 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
578 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
580 struct umcs7840_softc *sc = ucom->sc_parent;
581 uint8_t pn = ucom->sc_portno;
584 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
586 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
588 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
589 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
593 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
595 struct umcs7840_softc *sc = ucom->sc_parent;
596 uint8_t pn = ucom->sc_portno;
599 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
601 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
603 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
604 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
609 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
611 struct umcs7840_softc *sc = ucom->sc_parent;
612 uint8_t pn = ucom->sc_portno;
613 uint8_t lcr = sc->sc_ports[pn].sc_lcr;
614 uint8_t mcr = sc->sc_ports[pn].sc_mcr;
616 DPRINTF("Port %d config:\n", pn);
617 if (t->c_cflag & CSTOPB) {
618 DPRINTF(" 2 stop bits\n");
619 lcr |= MCS7840_UART_LCR_STOPB2;
621 lcr |= MCS7840_UART_LCR_STOPB1;
622 DPRINTF(" 1 stop bit\n");
625 lcr &= ~MCS7840_UART_LCR_PARITYMASK;
626 if (t->c_cflag & PARENB) {
627 lcr |= MCS7840_UART_LCR_PARITYON;
628 if (t->c_cflag & PARODD) {
629 lcr = MCS7840_UART_LCR_PARITYODD;
630 DPRINTF(" parity on - odd\n");
632 lcr = MCS7840_UART_LCR_PARITYEVEN;
633 DPRINTF(" parity on - even\n");
636 lcr &= ~MCS7840_UART_LCR_PARITYON;
637 DPRINTF(" parity off\n");
640 lcr &= ~MCS7840_UART_LCR_DATALENMASK;
641 switch (t->c_cflag & CSIZE) {
643 lcr |= MCS7840_UART_LCR_DATALEN5;
647 lcr |= MCS7840_UART_LCR_DATALEN6;
651 lcr |= MCS7840_UART_LCR_DATALEN7;
655 lcr |= MCS7840_UART_LCR_DATALEN8;
660 if (t->c_cflag & CRTSCTS) {
661 mcr |= MCS7840_UART_MCR_CTSRTS;
662 DPRINTF(" CTS/RTS\n");
664 mcr &= ~MCS7840_UART_MCR_CTSRTS;
666 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
667 mcr |= MCS7840_UART_MCR_DTRDSR;
668 DPRINTF(" DTR/DSR\n");
670 mcr &= ~MCS7840_UART_MCR_DTRDSR;
672 sc->sc_ports[pn].sc_lcr = lcr;
673 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
674 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
676 sc->sc_ports[pn].sc_mcr = mcr;
677 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
678 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
680 umcs7840_set_baudrate(sc, pn, t->c_ospeed);
685 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
690 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
696 umcs7840_start_read(struct ucom_softc *ucom)
698 struct umcs7840_softc *sc = ucom->sc_parent;
699 uint8_t pn = ucom->sc_portno;
701 /* Start interrupt transfer */
702 usbd_transfer_start(sc->sc_intr_xfer);
704 /* Start read transfer */
705 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
709 umcs7840_stop_read(struct ucom_softc *ucom)
711 struct umcs7840_softc *sc = ucom->sc_parent;
712 uint8_t pn = ucom->sc_portno;
714 /* Stop read transfer */
715 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
719 umcs7840_start_write(struct ucom_softc *ucom)
721 struct umcs7840_softc *sc = ucom->sc_parent;
722 uint8_t pn = ucom->sc_portno;
724 /* Start interrupt transfer */
725 usbd_transfer_start(sc->sc_intr_xfer);
727 /* Start write transfer */
728 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
732 umcs7840_stop_write(struct ucom_softc *ucom)
734 struct umcs7840_softc *sc = ucom->sc_parent;
735 uint8_t pn = ucom->sc_portno;
737 /* Stop write transfer */
738 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
742 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
744 struct umcs7840_softc *sc = ucom->sc_parent;
745 uint8_t pn = ucom->sc_portno;
746 uint8_t hw_msr = 0; /* local modem status register */
749 * Read status registers. MSR bits need translation from ns16550 to
750 * SER_* values. LSR bits are ns16550 in hardware and ucom.
752 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, lsr);
753 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr);
755 if (hw_msr & MCS7840_UART_MSR_NEGCTS)
758 if (hw_msr & MCS7840_UART_MSR_NEGDCD)
761 if (hw_msr & MCS7840_UART_MSR_NEGRI)
764 if (hw_msr & MCS7840_UART_MSR_NEGDSR)
767 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
771 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
773 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
774 struct usb_page_cache *pc;
779 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
781 switch (USB_GET_STATE(xfer)) {
782 case USB_ST_TRANSFERRED:
783 if (actlen == 5 || actlen == 13) {
784 pc = usbd_xfer_get_frame(xfer, 0);
785 usbd_copy_out(pc, 0, buf, actlen);
786 /* Check status of all ports */
787 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
788 uint8_t pn = sc->sc_ucom[subunit].sc_portno;
790 if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
792 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
793 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
794 case MCS7840_UART_ISR_RXERR:
795 case MCS7840_UART_ISR_RXHASDATA:
796 case MCS7840_UART_ISR_RXTIMEOUT:
797 case MCS7840_UART_ISR_MSCHANGE:
798 ucom_status_change(&sc->sc_ucom[subunit]);
806 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
810 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
811 usbd_transfer_submit(xfer);
815 if (error != USB_ERR_CANCELLED) {
816 /* try to clear stall first */
817 usbd_xfer_set_stall(xfer);
825 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
827 umcs7840_read_callbackN(xfer, error, 0);
831 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
833 umcs7840_read_callbackN(xfer, error, 1);
836 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
838 umcs7840_read_callbackN(xfer, error, 2);
842 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
844 umcs7840_read_callbackN(xfer, error, 3);
848 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
850 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
851 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
852 struct usb_page_cache *pc;
855 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
857 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
859 switch (USB_GET_STATE(xfer)) {
860 case USB_ST_TRANSFERRED:
861 pc = usbd_xfer_get_frame(xfer, 0);
862 ucom_put_data(ucom, pc, 0, actlen);
866 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
867 usbd_transfer_submit(xfer);
871 if (error != USB_ERR_CANCELLED) {
872 /* try to clear stall first */
873 usbd_xfer_set_stall(xfer);
881 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
883 umcs7840_write_callbackN(xfer, error, 0);
887 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
889 umcs7840_write_callbackN(xfer, error, 1);
893 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
895 umcs7840_write_callbackN(xfer, error, 2);
899 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
901 umcs7840_write_callbackN(xfer, error, 3);
905 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
907 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
908 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
909 struct usb_page_cache *pc;
912 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
914 switch (USB_GET_STATE(xfer)) {
916 case USB_ST_TRANSFERRED:
918 pc = usbd_xfer_get_frame(xfer, 0);
919 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
920 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
921 usbd_xfer_set_frame_len(xfer, 0, actlen);
922 usbd_transfer_submit(xfer);
927 if (error != USB_ERR_CANCELLED) {
928 /* try to clear stall first */
929 usbd_xfer_set_stall(xfer);
937 umcs7840_poll(struct ucom_softc *ucom)
939 struct umcs7840_softc *sc = ucom->sc_parent;
941 DPRINTF("Port %d poll\n", ucom->sc_portno);
942 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
943 usbd_transfer_poll(&sc->sc_intr_xfer, 1);
947 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
949 struct usb_device_request req;
953 req.bmRequestType = UT_READ_VENDOR_DEVICE;
954 req.bRequest = MCS7840_RDREQ;
955 USETW(req.wValue, 0);
956 USETW(req.wIndex, reg);
957 USETW(req.wLength, UMCS7840_READ_LENGTH);
959 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
960 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
961 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
962 return (USB_ERR_INVAL);
964 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
969 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
971 struct usb_device_request req;
974 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
975 req.bRequest = MCS7840_WRREQ;
976 USETW(req.wValue, data);
977 USETW(req.wIndex, reg);
978 USETW(req.wLength, 0);
980 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
982 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
988 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
990 struct usb_device_request req;
995 /* portno is port number */
996 wVal = ((uint16_t)(portno + 1)) << 8;
998 req.bmRequestType = UT_READ_VENDOR_DEVICE;
999 req.bRequest = MCS7840_RDREQ;
1000 USETW(req.wValue, wVal);
1001 USETW(req.wIndex, reg);
1002 USETW(req.wLength, UMCS7840_READ_LENGTH);
1004 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
1005 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
1006 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
1007 return (USB_ERR_INVAL);
1009 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1014 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
1016 struct usb_device_request req;
1020 /* portno is port number */
1021 wVal = ((uint16_t)(portno + 1)) << 8 | data;
1023 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1024 req.bRequest = MCS7840_WRREQ;
1025 USETW(req.wValue, wVal);
1026 USETW(req.wIndex, reg);
1027 USETW(req.wLength, 0);
1029 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
1031 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1036 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1043 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1044 DPRINTF("Port %d bad speed: %d\n", portno, rate);
1047 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1048 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1051 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1053 /* Set clock source for standard BAUD frequences */
1054 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1057 data &= MCS7840_DEV_SPx_CLOCK_MASK;
1059 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1064 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1065 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1069 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1072 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1076 /* Turn off access to DLL/DLM registers of UART */
1077 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1078 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1084 /* Maximum speeds for standard frequences, when PLL is not used */
1085 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1086 static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors);
1089 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1093 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1096 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1097 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1099 *divisor = 1; /* XXX */
1101 *divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1103 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;