1 /* $OpenBSD: rt2860reg.h,v 1.19 2009/05/18 19:25:07 damien Exp $ */
5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
26 #define RT2860_PCI_CFG 0x0000
27 #define RT2860_PCI_EECTRL 0x0004
28 #define RT2860_PCI_MCUCTRL 0x0008
29 #define RT2860_PCI_SYSCTRL 0x000c
30 #define RT2860_PCIE_JTAG 0x0010
32 #define RT2860_CONFIG_NO 1
33 #define RT2860_IFACE_INDEX 0
35 #define RT3070_OPT_14 0x0114
37 /* SCH/DMA registers */
38 #define RT2860_INT_STATUS 0x0200
39 #define RT2860_INT_MASK 0x0204
40 #define RT2860_WPDMA_GLO_CFG 0x0208
41 #define RT2860_WPDMA_RST_IDX 0x020c
42 #define RT2860_DELAY_INT_CFG 0x0210
43 #define RT2860_WMM_AIFSN_CFG 0x0214
44 #define RT2860_WMM_CWMIN_CFG 0x0218
45 #define RT2860_WMM_CWMAX_CFG 0x021c
46 #define RT2860_WMM_TXOP0_CFG 0x0220
47 #define RT2860_WMM_TXOP1_CFG 0x0224
48 #define RT2860_GPIO_CTRL 0x0228
49 #define RT2860_MCU_CMD_REG 0x022c
50 #define RT2860_TX_BASE_PTR(qid) (0x0230 + (qid) * 16)
51 #define RT2860_TX_MAX_CNT(qid) (0x0234 + (qid) * 16)
52 #define RT2860_TX_CTX_IDX(qid) (0x0238 + (qid) * 16)
53 #define RT2860_TX_DTX_IDX(qid) (0x023c + (qid) * 16)
54 #define RT2860_RX_BASE_PTR 0x0290
55 #define RT2860_RX_MAX_CNT 0x0294
56 #define RT2860_RX_CALC_IDX 0x0298
57 #define RT2860_FS_DRX_IDX 0x029c
58 #define RT2860_USB_DMA_CFG 0x02a0 /* RT2870 only */
59 #define RT2860_US_CYC_CNT 0x02a4
62 #define RT2860_SYS_CTRL 0x0400
63 #define RT2860_HOST_CMD 0x0404
64 #define RT2860_PBF_CFG 0x0408
65 #define RT2860_MAX_PCNT 0x040c
66 #define RT2860_BUF_CTRL 0x0410
67 #define RT2860_MCU_INT_STA 0x0414
68 #define RT2860_MCU_INT_ENA 0x0418
69 #define RT2860_TXQ_IO(qid) (0x041c + (qid) * 4)
70 #define RT2860_RX0Q_IO 0x0424
71 #define RT2860_BCN_OFFSET0 0x042c
72 #define RT2860_BCN_OFFSET1 0x0430
73 #define RT2860_TXRXQ_STA 0x0434
74 #define RT2860_TXRXQ_PCNT 0x0438
75 #define RT2860_PBF_DBG 0x043c
76 #define RT2860_CAP_CTRL 0x0440
78 /* RT3070 registers */
79 #define RT3070_RF_CSR_CFG 0x0500
80 #define RT3070_EFUSE_CTRL 0x0580
81 #define RT3070_EFUSE_DATA0 0x0590
82 #define RT3070_EFUSE_DATA1 0x0594
83 #define RT3070_EFUSE_DATA2 0x0598
84 #define RT3070_EFUSE_DATA3 0x059c
85 #define RT3070_LDO_CFG0 0x05d4
86 #define RT3070_GPIO_SWITCH 0x05dc
89 #define RT2860_ASIC_VER_ID 0x1000
90 #define RT2860_MAC_SYS_CTRL 0x1004
91 #define RT2860_MAC_ADDR_DW0 0x1008
92 #define RT2860_MAC_ADDR_DW1 0x100c
93 #define RT2860_MAC_BSSID_DW0 0x1010
94 #define RT2860_MAC_BSSID_DW1 0x1014
95 #define RT2860_MAX_LEN_CFG 0x1018
96 #define RT2860_BBP_CSR_CFG 0x101c
97 #define RT2860_RF_CSR_CFG0 0x1020
98 #define RT2860_RF_CSR_CFG1 0x1024
99 #define RT2860_RF_CSR_CFG2 0x1028
100 #define RT2860_LED_CFG 0x102c
102 /* undocumented registers */
103 #define RT2860_DEBUG 0x10f4
105 /* MAC Timing control registers */
106 #define RT2860_XIFS_TIME_CFG 0x1100
107 #define RT2860_BKOFF_SLOT_CFG 0x1104
108 #define RT2860_NAV_TIME_CFG 0x1108
109 #define RT2860_CH_TIME_CFG 0x110c
110 #define RT2860_PBF_LIFE_TIMER 0x1110
111 #define RT2860_BCN_TIME_CFG 0x1114
112 #define RT2860_TBTT_SYNC_CFG 0x1118
113 #define RT2860_TSF_TIMER_DW0 0x111c
114 #define RT2860_TSF_TIMER_DW1 0x1120
115 #define RT2860_TBTT_TIMER 0x1124
116 #define RT2860_INT_TIMER_CFG 0x1128
117 #define RT2860_INT_TIMER_EN 0x112c
118 #define RT2860_CH_IDLE_TIME 0x1130
120 /* MAC Power Save configuration registers */
121 #define RT2860_MAC_STATUS_REG 0x1200
122 #define RT2860_PWR_PIN_CFG 0x1204
123 #define RT2860_AUTO_WAKEUP_CFG 0x1208
125 /* MAC TX configuration registers */
126 #define RT2860_EDCA_AC_CFG(aci) (0x1300 + (aci) * 4)
127 #define RT2860_EDCA_TID_AC_MAP 0x1310
128 #define RT2860_TX_PWR_CFG(ridx) (0x1314 + (ridx) * 4)
129 #define RT2860_TX_PIN_CFG 0x1328
130 #define RT2860_TX_BAND_CFG 0x132c
131 #define RT2860_TX_SW_CFG0 0x1330
132 #define RT2860_TX_SW_CFG1 0x1334
133 #define RT2860_TX_SW_CFG2 0x1338
134 #define RT2860_TXOP_THRES_CFG 0x133c
135 #define RT2860_TXOP_CTRL_CFG 0x1340
136 #define RT2860_TX_RTS_CFG 0x1344
137 #define RT2860_TX_TIMEOUT_CFG 0x1348
138 #define RT2860_TX_RTY_CFG 0x134c
139 #define RT2860_TX_LINK_CFG 0x1350
140 #define RT2860_HT_FBK_CFG0 0x1354
141 #define RT2860_HT_FBK_CFG1 0x1358
142 #define RT2860_LG_FBK_CFG0 0x135c
143 #define RT2860_LG_FBK_CFG1 0x1360
144 #define RT2860_CCK_PROT_CFG 0x1364
145 #define RT2860_OFDM_PROT_CFG 0x1368
146 #define RT2860_MM20_PROT_CFG 0x136c
147 #define RT2860_MM40_PROT_CFG 0x1370
148 #define RT2860_GF20_PROT_CFG 0x1374
149 #define RT2860_GF40_PROT_CFG 0x1378
150 #define RT2860_EXP_CTS_TIME 0x137c
151 #define RT2860_EXP_ACK_TIME 0x1380
153 /* MAC RX configuration registers */
154 #define RT2860_RX_FILTR_CFG 0x1400
155 #define RT2860_AUTO_RSP_CFG 0x1404
156 #define RT2860_LEGACY_BASIC_RATE 0x1408
157 #define RT2860_HT_BASIC_RATE 0x140c
158 #define RT2860_HT_CTRL_CFG 0x1410
159 #define RT2860_SIFS_COST_CFG 0x1414
160 #define RT2860_RX_PARSER_CFG 0x1418
162 /* MAC Security configuration registers */
163 #define RT2860_TX_SEC_CNT0 0x1500
164 #define RT2860_RX_SEC_CNT0 0x1504
165 #define RT2860_CCMP_FC_MUTE 0x1508
167 /* MAC HCCA/PSMP configuration registers */
168 #define RT2860_TXOP_HLDR_ADDR0 0x1600
169 #define RT2860_TXOP_HLDR_ADDR1 0x1604
170 #define RT2860_TXOP_HLDR_ET 0x1608
171 #define RT2860_QOS_CFPOLL_RA_DW0 0x160c
172 #define RT2860_QOS_CFPOLL_A1_DW1 0x1610
173 #define RT2860_QOS_CFPOLL_QC 0x1614
175 /* MAC Statistics Counters */
176 #define RT2860_RX_STA_CNT0 0x1700
177 #define RT2860_RX_STA_CNT1 0x1704
178 #define RT2860_RX_STA_CNT2 0x1708
179 #define RT2860_TX_STA_CNT0 0x170c
180 #define RT2860_TX_STA_CNT1 0x1710
181 #define RT2860_TX_STA_CNT2 0x1714
182 #define RT2860_TX_STAT_FIFO 0x1718
184 /* RX WCID search table */
185 #define RT2860_WCID_ENTRY(wcid) (0x1800 + (wcid) * 8)
187 #define RT2860_FW_BASE 0x2000
188 #define RT2870_FW_BASE 0x3000
190 /* Pair-wise key table */
191 #define RT2860_PKEY(wcid) (0x4000 + (wcid) * 32)
194 #define RT2860_IVEIV(wcid) (0x6000 + (wcid) * 8)
196 /* WCID attribute table */
197 #define RT2860_WCID_ATTR(wcid) (0x6800 + (wcid) * 4)
199 /* Shared Key Table */
200 #define RT2860_SKEY(vap, kidx) (0x6c00 + (vap) * 128 + (kidx) * 32)
202 /* Shared Key Mode */
203 #define RT2860_SKEY_MODE_0_7 0x7000
204 #define RT2860_SKEY_MODE_8_15 0x7004
205 #define RT2860_SKEY_MODE_16_23 0x7008
206 #define RT2860_SKEY_MODE_24_31 0x700c
208 /* Shared Memory between MCU and host */
209 #define RT2860_H2M_MAILBOX 0x7010
210 #define RT2860_H2M_MAILBOX_CID 0x7014
211 #define RT2860_H2M_MAILBOX_STATUS 0x701c
212 #define RT2860_H2M_BBPAGENT 0x7028
213 #define RT2860_BCN_BASE(vap) (0x7800 + (vap) * 512)
216 /* possible flags for register RT2860_PCI_EECTRL */
217 #define RT2860_C (1 << 0)
218 #define RT2860_S (1 << 1)
219 #define RT2860_D (1 << 2)
220 #define RT2860_SHIFT_D 2
221 #define RT2860_Q (1 << 3)
222 #define RT2860_SHIFT_Q 3
224 /* possible flags for registers INT_STATUS/INT_MASK */
225 #define RT2860_TX_COHERENT (1 << 17)
226 #define RT2860_RX_COHERENT (1 << 16)
227 #define RT2860_MAC_INT_4 (1 << 15)
228 #define RT2860_MAC_INT_3 (1 << 14)
229 #define RT2860_MAC_INT_2 (1 << 13)
230 #define RT2860_MAC_INT_1 (1 << 12)
231 #define RT2860_MAC_INT_0 (1 << 11)
232 #define RT2860_TX_RX_COHERENT (1 << 10)
233 #define RT2860_MCU_CMD_INT (1 << 9)
234 #define RT2860_TX_DONE_INT5 (1 << 8)
235 #define RT2860_TX_DONE_INT4 (1 << 7)
236 #define RT2860_TX_DONE_INT3 (1 << 6)
237 #define RT2860_TX_DONE_INT2 (1 << 5)
238 #define RT2860_TX_DONE_INT1 (1 << 4)
239 #define RT2860_TX_DONE_INT0 (1 << 3)
240 #define RT2860_RX_DONE_INT (1 << 2)
241 #define RT2860_TX_DLY_INT (1 << 1)
242 #define RT2860_RX_DLY_INT (1 << 0)
244 /* possible flags for register WPDMA_GLO_CFG */
245 #define RT2860_HDR_SEG_LEN_SHIFT 8
246 #define RT2860_BIG_ENDIAN (1 << 7)
247 #define RT2860_TX_WB_DDONE (1 << 6)
248 #define RT2860_WPDMA_BT_SIZE_SHIFT 4
249 #define RT2860_WPDMA_BT_SIZE16 0
250 #define RT2860_WPDMA_BT_SIZE32 1
251 #define RT2860_WPDMA_BT_SIZE64 2
252 #define RT2860_WPDMA_BT_SIZE128 3
253 #define RT2860_RX_DMA_BUSY (1 << 3)
254 #define RT2860_RX_DMA_EN (1 << 2)
255 #define RT2860_TX_DMA_BUSY (1 << 1)
256 #define RT2860_TX_DMA_EN (1 << 0)
258 /* possible flags for register DELAY_INT_CFG */
259 #define RT2860_TXDLY_INT_EN (1 << 31)
260 #define RT2860_TXMAX_PINT_SHIFT 24
261 #define RT2860_TXMAX_PTIME_SHIFT 16
262 #define RT2860_RXDLY_INT_EN (1 << 15)
263 #define RT2860_RXMAX_PINT_SHIFT 8
264 #define RT2860_RXMAX_PTIME_SHIFT 0
266 /* possible flags for register GPIO_CTRL */
267 #define RT2860_GPIO_D_SHIFT 8
268 #define RT2860_GPIO_O_SHIFT 0
270 /* possible flags for register USB_DMA_CFG */
271 #define RT2860_USB_TX_BUSY (1 << 31)
272 #define RT2860_USB_RX_BUSY (1 << 30)
273 #define RT2860_USB_EPOUT_VLD_SHIFT 24
274 #define RT2860_USB_TX_EN (1 << 23)
275 #define RT2860_USB_RX_EN (1 << 22)
276 #define RT2860_USB_RX_AGG_EN (1 << 21)
277 #define RT2860_USB_TXOP_HALT (1 << 20)
278 #define RT2860_USB_TX_CLEAR (1 << 19)
279 #define RT2860_USB_PHY_WD_EN (1 << 16)
280 #define RT2860_USB_PHY_MAN_RST (1 << 15)
281 #define RT2860_USB_RX_AGG_LMT(x) ((x) << 8) /* in unit of 1KB */
282 #define RT2860_USB_RX_AGG_TO(x) ((x) & 0xff) /* in unit of 33ns */
284 /* possible flags for register US_CYC_CNT */
285 #define RT2860_TEST_EN (1 << 24)
286 #define RT2860_TEST_SEL_SHIFT 16
287 #define RT2860_BT_MODE_EN (1 << 8)
288 #define RT2860_US_CYC_CNT_SHIFT 0
290 /* possible flags for register SYS_CTRL */
291 #define RT2860_HST_PM_SEL (1 << 16)
292 #define RT2860_CAP_MODE (1 << 14)
293 #define RT2860_PME_OEN (1 << 13)
294 #define RT2860_CLKSELECT (1 << 12)
295 #define RT2860_PBF_CLK_EN (1 << 11)
296 #define RT2860_MAC_CLK_EN (1 << 10)
297 #define RT2860_DMA_CLK_EN (1 << 9)
298 #define RT2860_MCU_READY (1 << 7)
299 #define RT2860_ASY_RESET (1 << 4)
300 #define RT2860_PBF_RESET (1 << 3)
301 #define RT2860_MAC_RESET (1 << 2)
302 #define RT2860_DMA_RESET (1 << 1)
303 #define RT2860_MCU_RESET (1 << 0)
305 /* possible values for register HOST_CMD */
306 #define RT2860_MCU_CMD_SLEEP 0x30
307 #define RT2860_MCU_CMD_WAKEUP 0x31
308 #define RT2860_MCU_CMD_LEDS 0x50
309 #define RT2860_MCU_CMD_LED_RSSI 0x51
310 #define RT2860_MCU_CMD_LED1 0x52
311 #define RT2860_MCU_CMD_LED2 0x53
312 #define RT2860_MCU_CMD_LED3 0x54
313 #define RT2860_MCU_CMD_RFRESET 0x72
314 #define RT2860_MCU_CMD_ANTSEL 0x73
315 #define RT2860_MCU_CMD_BBP 0x80
316 #define RT2860_MCU_CMD_PSLEVEL 0x83
318 /* possible flags for register PBF_CFG */
319 #define RT2860_TX1Q_NUM_SHIFT 21
320 #define RT2860_TX2Q_NUM_SHIFT 16
321 #define RT2860_NULL0_MODE (1 << 15)
322 #define RT2860_NULL1_MODE (1 << 14)
323 #define RT2860_RX_DROP_MODE (1 << 13)
324 #define RT2860_TX0Q_MANUAL (1 << 12)
325 #define RT2860_TX1Q_MANUAL (1 << 11)
326 #define RT2860_TX2Q_MANUAL (1 << 10)
327 #define RT2860_RX0Q_MANUAL (1 << 9)
328 #define RT2860_HCCA_EN (1 << 8)
329 #define RT2860_TX0Q_EN (1 << 4)
330 #define RT2860_TX1Q_EN (1 << 3)
331 #define RT2860_TX2Q_EN (1 << 2)
332 #define RT2860_RX0Q_EN (1 << 1)
334 /* possible flags for register BUF_CTRL */
335 #define RT2860_WRITE_TXQ(qid) (1 << (11 - (qid)))
336 #define RT2860_NULL0_KICK (1 << 7)
337 #define RT2860_NULL1_KICK (1 << 6)
338 #define RT2860_BUF_RESET (1 << 5)
339 #define RT2860_READ_TXQ(qid) (1 << (3 - (qid))
340 #define RT2860_READ_RX0Q (1 << 0)
342 /* possible flags for registers MCU_INT_STA/MCU_INT_ENA */
343 #define RT2860_MCU_MAC_INT_8 (1 << 24)
344 #define RT2860_MCU_MAC_INT_7 (1 << 23)
345 #define RT2860_MCU_MAC_INT_6 (1 << 22)
346 #define RT2860_MCU_MAC_INT_4 (1 << 20)
347 #define RT2860_MCU_MAC_INT_3 (1 << 19)
348 #define RT2860_MCU_MAC_INT_2 (1 << 18)
349 #define RT2860_MCU_MAC_INT_1 (1 << 17)
350 #define RT2860_MCU_MAC_INT_0 (1 << 16)
351 #define RT2860_DTX0_INT (1 << 11)
352 #define RT2860_DTX1_INT (1 << 10)
353 #define RT2860_DTX2_INT (1 << 9)
354 #define RT2860_DRX0_INT (1 << 8)
355 #define RT2860_HCMD_INT (1 << 7)
356 #define RT2860_N0TX_INT (1 << 6)
357 #define RT2860_N1TX_INT (1 << 5)
358 #define RT2860_BCNTX_INT (1 << 4)
359 #define RT2860_MTX0_INT (1 << 3)
360 #define RT2860_MTX1_INT (1 << 2)
361 #define RT2860_MTX2_INT (1 << 1)
362 #define RT2860_MRX0_INT (1 << 0)
364 /* possible flags for register TXRXQ_PCNT */
365 #define RT2860_RX0Q_PCNT_MASK 0xff000000
366 #define RT2860_TX2Q_PCNT_MASK 0x00ff0000
367 #define RT2860_TX1Q_PCNT_MASK 0x0000ff00
368 #define RT2860_TX0Q_PCNT_MASK 0x000000ff
370 /* possible flags for register CAP_CTRL */
371 #define RT2860_CAP_ADC_FEQ (1 << 31)
372 #define RT2860_CAP_START (1 << 30)
373 #define RT2860_MAN_TRIG (1 << 29)
374 #define RT2860_TRIG_OFFSET_SHIFT 16
375 #define RT2860_START_ADDR_SHIFT 0
377 /* possible flags for register RF_CSR_CFG */
378 #define RT3070_RF_KICK (1 << 17)
379 #define RT3070_RF_WRITE (1 << 16)
381 /* possible flags for register EFUSE_CTRL */
382 #define RT3070_SEL_EFUSE (1 << 31)
383 #define RT3070_EFSROM_KICK (1 << 30)
384 #define RT3070_EFSROM_AIN_MASK 0x03ff0000
385 #define RT3070_EFSROM_AIN_SHIFT 16
386 #define RT3070_EFSROM_MODE_MASK 0x000000c0
387 #define RT3070_EFUSE_AOUT_MASK 0x0000003f
389 /* possible flags for register MAC_SYS_CTRL */
390 #define RT2860_RX_TS_EN (1 << 7)
391 #define RT2860_WLAN_HALT_EN (1 << 6)
392 #define RT2860_PBF_LOOP_EN (1 << 5)
393 #define RT2860_CONT_TX_TEST (1 << 4)
394 #define RT2860_MAC_RX_EN (1 << 3)
395 #define RT2860_MAC_TX_EN (1 << 2)
396 #define RT2860_BBP_HRST (1 << 1)
397 #define RT2860_MAC_SRST (1 << 0)
399 /* possible flags for register MAC_BSSID_DW1 */
400 #define RT2860_MULTI_BCN_NUM_SHIFT 18
401 #define RT2860_MULTI_BSSID_MODE_SHIFT 16
403 /* possible flags for register MAX_LEN_CFG */
404 #define RT2860_MIN_MPDU_LEN_SHIFT 16
405 #define RT2860_MAX_PSDU_LEN_SHIFT 12
406 #define RT2860_MAX_PSDU_LEN8K 0
407 #define RT2860_MAX_PSDU_LEN16K 1
408 #define RT2860_MAX_PSDU_LEN32K 2
409 #define RT2860_MAX_PSDU_LEN64K 3
410 #define RT2860_MAX_MPDU_LEN_SHIFT 0
412 /* possible flags for registers BBP_CSR_CFG/H2M_BBPAGENT */
413 #define RT2860_BBP_RW_PARALLEL (1 << 19)
414 #define RT2860_BBP_PAR_DUR_112_5 (1 << 18)
415 #define RT2860_BBP_CSR_KICK (1 << 17)
416 #define RT2860_BBP_CSR_READ (1 << 16)
417 #define RT2860_BBP_ADDR_SHIFT 8
418 #define RT2860_BBP_DATA_SHIFT 0
420 /* possible flags for register RF_CSR_CFG0 */
421 #define RT2860_RF_REG_CTRL (1 << 31)
422 #define RT2860_RF_LE_SEL1 (1 << 30)
423 #define RT2860_RF_LE_STBY (1 << 29)
424 #define RT2860_RF_REG_WIDTH_SHIFT 24
425 #define RT2860_RF_REG_0_SHIFT 0
427 /* possible flags for register RF_CSR_CFG1 */
428 #define RT2860_RF_DUR_5 (1 << 24)
429 #define RT2860_RF_REG_1_SHIFT 0
431 /* possible flags for register LED_CFG */
432 #define RT2860_LED_POL (1 << 30)
433 #define RT2860_Y_LED_MODE_SHIFT 28
434 #define RT2860_G_LED_MODE_SHIFT 26
435 #define RT2860_R_LED_MODE_SHIFT 24
436 #define RT2860_LED_MODE_OFF 0
437 #define RT2860_LED_MODE_BLINK_TX 1
438 #define RT2860_LED_MODE_SLOW_BLINK 2
439 #define RT2860_LED_MODE_ON 3
440 #define RT2860_SLOW_BLK_TIME_SHIFT 16
441 #define RT2860_LED_OFF_TIME_SHIFT 8
442 #define RT2860_LED_ON_TIME_SHIFT 0
444 /* possible flags for register XIFS_TIME_CFG */
445 #define RT2860_BB_RXEND_EN (1 << 29)
446 #define RT2860_EIFS_TIME_SHIFT 20
447 #define RT2860_OFDM_XIFS_TIME_SHIFT 16
448 #define RT2860_OFDM_SIFS_TIME_SHIFT 8
449 #define RT2860_CCK_SIFS_TIME_SHIFT 0
451 /* possible flags for register BKOFF_SLOT_CFG */
452 #define RT2860_CC_DELAY_TIME_SHIFT 8
453 #define RT2860_SLOT_TIME 0
455 /* possible flags for register NAV_TIME_CFG */
456 #define RT2860_NAV_UPD (1 << 31)
457 #define RT2860_NAV_UPD_VAL_SHIFT 16
458 #define RT2860_NAV_CLR_EN (1 << 15)
459 #define RT2860_NAV_TIMER_SHIFT 0
461 /* possible flags for register CH_TIME_CFG */
462 #define RT2860_EIFS_AS_CH_BUSY (1 << 4)
463 #define RT2860_NAV_AS_CH_BUSY (1 << 3)
464 #define RT2860_RX_AS_CH_BUSY (1 << 2)
465 #define RT2860_TX_AS_CH_BUSY (1 << 1)
466 #define RT2860_CH_STA_TIMER_EN (1 << 0)
468 /* possible values for register BCN_TIME_CFG */
469 #define RT2860_TSF_INS_COMP_SHIFT 24
470 #define RT2860_BCN_TX_EN (1 << 20)
471 #define RT2860_TBTT_TIMER_EN (1 << 19)
472 #define RT2860_TSF_SYNC_MODE_SHIFT 17
473 #define RT2860_TSF_SYNC_MODE_DIS 0
474 #define RT2860_TSF_SYNC_MODE_STA 1
475 #define RT2860_TSF_SYNC_MODE_IBSS 2
476 #define RT2860_TSF_SYNC_MODE_HOSTAP 3
477 #define RT2860_TSF_TIMER_EN (1 << 16)
478 #define RT2860_BCN_INTVAL_SHIFT 0
480 /* possible flags for register TBTT_SYNC_CFG */
481 #define RT2860_BCN_CWMIN_SHIFT 20
482 #define RT2860_BCN_AIFSN_SHIFT 16
483 #define RT2860_BCN_EXP_WIN_SHIFT 8
484 #define RT2860_TBTT_ADJUST_SHIFT 0
486 /* possible flags for register INT_TIMER_CFG */
487 #define RT2860_GP_TIMER_SHIFT 16
488 #define RT2860_PRE_TBTT_TIMER_SHIFT 0
490 /* possible flags for register INT_TIMER_EN */
491 #define RT2860_GP_TIMER_EN (1 << 1)
492 #define RT2860_PRE_TBTT_INT_EN (1 << 0)
494 /* possible flags for register MAC_STATUS_REG */
495 #define RT2860_RX_STATUS_BUSY (1 << 1)
496 #define RT2860_TX_STATUS_BUSY (1 << 0)
498 /* possible flags for register PWR_PIN_CFG */
499 #define RT2860_IO_ADDA_PD (1 << 3)
500 #define RT2860_IO_PLL_PD (1 << 2)
501 #define RT2860_IO_RA_PE (1 << 1)
502 #define RT2860_IO_RF_PE (1 << 0)
504 /* possible flags for register AUTO_WAKEUP_CFG */
505 #define RT2860_AUTO_WAKEUP_EN (1 << 15)
506 #define RT2860_SLEEP_TBTT_NUM_SHIFT 8
507 #define RT2860_WAKEUP_LEAD_TIME_SHIFT 0
509 /* possible flags for register TX_PIN_CFG */
510 #define RT2860_TRSW_POL (1 << 19)
511 #define RT2860_TRSW_EN (1 << 18)
512 #define RT2860_RFTR_POL (1 << 17)
513 #define RT2860_RFTR_EN (1 << 16)
514 #define RT2860_LNA_PE_G1_POL (1 << 15)
515 #define RT2860_LNA_PE_A1_POL (1 << 14)
516 #define RT2860_LNA_PE_G0_POL (1 << 13)
517 #define RT2860_LNA_PE_A0_POL (1 << 12)
518 #define RT2860_LNA_PE_G1_EN (1 << 11)
519 #define RT2860_LNA_PE_A1_EN (1 << 10)
520 #define RT2860_LNA_PE1_EN (RT2860_LNA_PE_A1_EN | RT2860_LNA_PE_G1_EN)
521 #define RT2860_LNA_PE_G0_EN (1 << 9)
522 #define RT2860_LNA_PE_A0_EN (1 << 8)
523 #define RT2860_LNA_PE0_EN (RT2860_LNA_PE_A0_EN | RT2860_LNA_PE_G0_EN)
524 #define RT2860_PA_PE_G1_POL (1 << 7)
525 #define RT2860_PA_PE_A1_POL (1 << 6)
526 #define RT2860_PA_PE_G0_POL (1 << 5)
527 #define RT2860_PA_PE_A0_POL (1 << 4)
528 #define RT2860_PA_PE_G1_EN (1 << 3)
529 #define RT2860_PA_PE_A1_EN (1 << 2)
530 #define RT2860_PA_PE_G0_EN (1 << 1)
531 #define RT2860_PA_PE_A0_EN (1 << 0)
533 /* possible flags for register TX_BAND_CFG */
534 #define RT2860_5G_BAND_SEL_N (1 << 2)
535 #define RT2860_5G_BAND_SEL_P (1 << 1)
536 #define RT2860_TX_BAND_SEL (1 << 0)
538 /* possible flags for register TX_SW_CFG0 */
539 #define RT2860_DLY_RFTR_EN_SHIFT 24
540 #define RT2860_DLY_TRSW_EN_SHIFT 16
541 #define RT2860_DLY_PAPE_EN_SHIFT 8
542 #define RT2860_DLY_TXPE_EN_SHIFT 0
544 /* possible flags for register TX_SW_CFG1 */
545 #define RT2860_DLY_RFTR_DIS_SHIFT 16
546 #define RT2860_DLY_TRSW_DIS_SHIFT 8
547 #define RT2860_DLY_PAPE_DIS SHIFT 0
549 /* possible flags for register TX_SW_CFG2 */
550 #define RT2860_DLY_LNA_EN_SHIFT 24
551 #define RT2860_DLY_LNA_DIS_SHIFT 16
552 #define RT2860_DLY_DAC_EN_SHIFT 8
553 #define RT2860_DLY_DAC_DIS_SHIFT 0
555 /* possible flags for register TXOP_THRES_CFG */
556 #define RT2860_TXOP_REM_THRES_SHIFT 24
557 #define RT2860_CF_END_THRES_SHIFT 16
558 #define RT2860_RDG_IN_THRES 8
559 #define RT2860_RDG_OUT_THRES 0
561 /* possible flags for register TXOP_CTRL_CFG */
562 #define RT2860_EXT_CW_MIN_SHIFT 16
563 #define RT2860_EXT_CCA_DLY_SHIFT 8
564 #define RT2860_EXT_CCA_EN (1 << 7)
565 #define RT2860_LSIG_TXOP_EN (1 << 6)
566 #define RT2860_TXOP_TRUN_EN_MIMOPS (1 << 4)
567 #define RT2860_TXOP_TRUN_EN_TXOP (1 << 3)
568 #define RT2860_TXOP_TRUN_EN_RATE (1 << 2)
569 #define RT2860_TXOP_TRUN_EN_AC (1 << 1)
570 #define RT2860_TXOP_TRUN_EN_TIMEOUT (1 << 0)
572 /* possible flags for register TX_RTS_CFG */
573 #define RT2860_RTS_FBK_EN (1 << 24)
574 #define RT2860_RTS_THRES_SHIFT 8
575 #define RT2860_RTS_RTY_LIMIT_SHIFT 0
577 /* possible flags for register TX_TIMEOUT_CFG */
578 #define RT2860_TXOP_TIMEOUT_SHIFT 16
579 #define RT2860_RX_ACK_TIMEOUT_SHIFT 8
580 #define RT2860_MPDU_LIFE_TIME_SHIFT 4
582 /* possible flags for register TX_RTY_CFG */
583 #define RT2860_TX_AUTOFB_EN (1 << 30)
584 #define RT2860_AGG_RTY_MODE_TIMER (1 << 29)
585 #define RT2860_NAG_RTY_MODE_TIMER (1 << 28)
586 #define RT2860_LONG_RTY_THRES_SHIFT 16
587 #define RT2860_LONG_RTY_LIMIT_SHIFT 8
588 #define RT2860_SHORT_RTY_LIMIT_SHIFT 0
590 /* possible flags for register TX_LINK_CFG */
591 #define RT2860_REMOTE_MFS_SHIFT 24
592 #define RT2860_REMOTE_MFB_SHIFT 16
593 #define RT2860_TX_CFACK_EN (1 << 12)
594 #define RT2860_TX_RDG_EN (1 << 11)
595 #define RT2860_TX_MRQ_EN (1 << 10)
596 #define RT2860_REMOTE_UMFS_EN (1 << 9)
597 #define RT2860_TX_MFB_EN (1 << 8)
598 #define RT2860_REMOTE_MFB_LT_SHIFT 0
600 /* possible flags for registers *_PROT_CFG */
601 #define RT2860_RTSTH_EN (1 << 26)
602 #define RT2860_TXOP_ALLOW_GF40 (1 << 25)
603 #define RT2860_TXOP_ALLOW_GF20 (1 << 24)
604 #define RT2860_TXOP_ALLOW_MM40 (1 << 23)
605 #define RT2860_TXOP_ALLOW_MM20 (1 << 22)
606 #define RT2860_TXOP_ALLOW_OFDM (1 << 21)
607 #define RT2860_TXOP_ALLOW_CCK (1 << 20)
608 #define RT2860_TXOP_ALLOW_ALL (0x3f << 20)
609 #define RT2860_PROT_NAV_SHORT (1 << 18)
610 #define RT2860_PROT_NAV_LONG (2 << 18)
611 #define RT2860_PROT_CTRL_RTS_CTS (1 << 16)
612 #define RT2860_PROT_CTRL_CTS (2 << 16)
614 /* possible flags for registers EXP_{CTS,ACK}_TIME */
615 #define RT2860_EXP_OFDM_TIME_SHIFT 16
616 #define RT2860_EXP_CCK_TIME_SHIFT 0
618 /* possible flags for register RX_FILTR_CFG */
619 #define RT2860_DROP_CTRL_RSV (1 << 16)
620 #define RT2860_DROP_BAR (1 << 15)
621 #define RT2860_DROP_BA (1 << 14)
622 #define RT2860_DROP_PSPOLL (1 << 13)
623 #define RT2860_DROP_RTS (1 << 12)
624 #define RT2860_DROP_CTS (1 << 11)
625 #define RT2860_DROP_ACK (1 << 10)
626 #define RT2860_DROP_CFEND (1 << 9)
627 #define RT2860_DROP_CFACK (1 << 8)
628 #define RT2860_DROP_DUPL (1 << 7)
629 #define RT2860_DROP_BC (1 << 6)
630 #define RT2860_DROP_MC (1 << 5)
631 #define RT2860_DROP_VER_ERR (1 << 4)
632 #define RT2860_DROP_NOT_MYBSS (1 << 3)
633 #define RT2860_DROP_UC_NOME (1 << 2)
634 #define RT2860_DROP_PHY_ERR (1 << 1)
635 #define RT2860_DROP_CRC_ERR (1 << 0)
637 /* possible flags for register AUTO_RSP_CFG */
638 #define RT2860_CTRL_PWR_BIT (1 << 7)
639 #define RT2860_BAC_ACK_POLICY (1 << 6)
640 #define RT2860_CCK_SHORT_EN (1 << 4)
641 #define RT2860_CTS_40M_REF_EN (1 << 3)
642 #define RT2860_CTS_40M_MODE_EN (1 << 2)
643 #define RT2860_BAC_ACKPOLICY_EN (1 << 1)
644 #define RT2860_AUTO_RSP_EN (1 << 0)
646 /* possible flags for register SIFS_COST_CFG */
647 #define RT2860_OFDM_SIFS_COST_SHIFT 8
648 #define RT2860_CCK_SIFS_COST_SHIFT 0
650 /* possible flags for register TXOP_HLDR_ET */
651 #define RT2860_TXOP_ETM1_EN (1 << 25)
652 #define RT2860_TXOP_ETM0_EN (1 << 24)
653 #define RT2860_TXOP_ETM_THRES_SHIFT 16
654 #define RT2860_TXOP_ETO_EN (1 << 8)
655 #define RT2860_TXOP_ETO_THRES_SHIFT 1
656 #define RT2860_PER_RX_RST_EN (1 << 0)
658 /* possible flags for register TX_STAT_FIFO */
659 #define RT2860_TXQ_MCS_SHIFT 16
660 #define RT2860_TXQ_WCID_SHIFT 8
661 #define RT2860_TXQ_ACKREQ (1 << 7)
662 #define RT2860_TXQ_AGG (1 << 6)
663 #define RT2860_TXQ_OK (1 << 5)
664 #define RT2860_TXQ_PID_SHIFT 1
665 #define RT2860_TXQ_VLD (1 << 0)
667 /* possible flags for register WCID_ATTR */
668 #define RT2860_MODE_NOSEC 0
669 #define RT2860_MODE_WEP40 1
670 #define RT2860_MODE_WEP104 2
671 #define RT2860_MODE_TKIP 3
672 #define RT2860_MODE_AES_CCMP 4
673 #define RT2860_MODE_CKIP40 5
674 #define RT2860_MODE_CKIP104 6
675 #define RT2860_MODE_CKIP128 7
676 #define RT2860_RX_PKEY_EN (1 << 0)
678 /* possible flags for register H2M_MAILBOX */
679 #define RT2860_H2M_BUSY (1 << 24)
680 #define RT2860_TOKEN_NO_INTR 0xff
683 /* possible flags for MCU command RT2860_MCU_CMD_LEDS */
684 #define RT2860_LED_RADIO (1 << 13)
685 #define RT2860_LED_LINK_2GHZ (1 << 14)
686 #define RT2860_LED_LINK_5GHZ (1 << 15)
689 /* possible flags for RT3020 RF register 1 */
690 #define RT3070_RF_BLOCK (1 << 0)
691 #define RT3070_RX0_PD (1 << 2)
692 #define RT3070_TX0_PD (1 << 3)
693 #define RT3070_RX1_PD (1 << 4)
694 #define RT3070_TX1_PD (1 << 5)
696 /* possible flags for RT3020 RF register 15 */
697 #define RT3070_TX_LO2 (1 << 3)
699 /* possible flags for RT3020 RF register 17 */
700 #define RT3070_TX_LO1 (1 << 3)
702 /* possible flags for RT3020 RF register 20 */
703 #define RT3070_RX_LO1 (1 << 3)
705 /* possible flags for RT3020 RF register 21 */
706 #define RT3070_RX_LO2 (1 << 3)
709 /* RT2860 TX descriptor */
711 uint32_t sdp0; /* Segment Data Pointer 0 */
712 uint16_t sdl1; /* Segment Data Length 1 */
713 #define RT2860_TX_BURST (1 << 15)
714 #define RT2860_TX_LS1 (1 << 14) /* SDP1 is the last segment */
716 uint16_t sdl0; /* Segment Data Length 0 */
717 #define RT2860_TX_DDONE (1 << 15)
718 #define RT2860_TX_LS0 (1 << 14) /* SDP0 is the last segment */
720 uint32_t sdp1; /* Segment Data Pointer 1 */
723 #define RT2860_TX_QSEL_SHIFT 1
724 #define RT2860_TX_QSEL_MGMT (0 << 1)
725 #define RT2860_TX_QSEL_HCCA (1 << 1)
726 #define RT2860_TX_QSEL_EDCA (2 << 1)
727 #define RT2860_TX_WIV (1 << 0)
730 /* RT2870 TX descriptor */
737 /* TX Wireless Information */
740 #define RT2860_TX_MPDU_DSITY_SHIFT 5
741 #define RT2860_TX_AMPDU (1 << 4)
742 #define RT2860_TX_TS (1 << 3)
743 #define RT2860_TX_CFACK (1 << 2)
744 #define RT2860_TX_MMPS (1 << 1)
745 #define RT2860_TX_FRAG (1 << 0)
748 #define RT2860_TX_TXOP_HT 0
749 #define RT2860_TX_TXOP_PIFS 1
750 #define RT2860_TX_TXOP_SIFS 2
751 #define RT2860_TX_TXOP_BACKOFF 3
754 #define RT2860_PHY_MODE 0xc000
755 #define RT2860_PHY_CCK (0 << 14)
756 #define RT2860_PHY_OFDM (1 << 14)
757 #define RT2860_PHY_HT (2 << 14)
758 #define RT2860_PHY_HT_GF (3 << 14)
759 #define RT2860_PHY_SGI (1 << 8)
760 #define RT2860_PHY_BW40 (1 << 7)
761 #define RT2860_PHY_MCS 0x7f
762 #define RT2860_PHY_SHPRE (1 << 3)
765 #define RT2860_TX_BAWINSIZE_SHIFT 2
766 #define RT2860_TX_NSEQ (1 << 1)
767 #define RT2860_TX_ACK (1 << 0)
769 uint8_t wcid; /* Wireless Client ID */
771 #define RT2860_TX_PID_SHIFT 12
777 /* RT2860 RX descriptor */
780 uint16_t sdl1; /* unused */
782 #define RT2860_RX_DDONE (1 << 15)
783 #define RT2860_RX_LS0 (1 << 14)
785 uint32_t sdp1; /* unused */
787 #define RT2860_RX_DEC (1 << 16)
788 #define RT2860_RX_AMPDU (1 << 15)
789 #define RT2860_RX_L2PAD (1 << 14)
790 #define RT2860_RX_RSSI (1 << 13)
791 #define RT2860_RX_HTC (1 << 12)
792 #define RT2860_RX_AMSDU (1 << 11)
793 #define RT2860_RX_MICERR (1 << 10)
794 #define RT2860_RX_ICVERR (1 << 9)
795 #define RT2860_RX_CRCERR (1 << 8)
796 #define RT2860_RX_MYBSS (1 << 7)
797 #define RT2860_RX_BC (1 << 6)
798 #define RT2860_RX_MC (1 << 5)
799 #define RT2860_RX_UC2ME (1 << 4)
800 #define RT2860_RX_FRAG (1 << 3)
801 #define RT2860_RX_NULL (1 << 2)
802 #define RT2860_RX_DATA (1 << 1)
803 #define RT2860_RX_BA (1 << 0)
806 /* RT2870 RX descriptor */
808 /* single 32-bit field */
812 /* RX Wireless Information */
816 #define RT2860_RX_UDF_SHIFT 5
817 #define RT2860_RX_BSS_IDX_SHIFT 2
820 #define RT2860_RX_TID_SHIFT 12
831 /* first DMA segment contains TXWI + 802.11 header + 32-bit padding */
832 #define RT2860_TXWI_DMASZ \
833 (sizeof (struct rt2860_txwi) + \
834 sizeof (struct ieee80211_htframe) + \
842 #define RT2860_RF_2820 1 /* 2T3R */
843 #define RT2860_RF_2850 2 /* dual-band 2T3R */
844 #define RT2860_RF_2720 3 /* 1T2R */
845 #define RT2860_RF_2750 4 /* dual-band 1T2R */
846 #define RT3070_RF_3020 5 /* 1T1R */
847 #define RT3070_RF_2020 6 /* b/g */
848 #define RT3070_RF_3021 7 /* 1T2R */
849 #define RT3070_RF_3022 8 /* 2T2R */
850 #define RT3070_RF_3052 9 /* dual-band 2T2R */
852 /* USB commands for RT2870 only */
853 #define RT2870_RESET 1
854 #define RT2870_WRITE_2 2
855 #define RT2870_WRITE_REGION_1 6
856 #define RT2870_READ_REGION_1 7
857 #define RT2870_EEPROM_READ 9
859 #define RT2860_EEPROM_DELAY 1 /* minimum hold time (microsecond) */
861 #define RT2860_EEPROM_VERSION 0x01
862 #define RT2860_EEPROM_MAC01 0x02
863 #define RT2860_EEPROM_MAC23 0x03
864 #define RT2860_EEPROM_MAC45 0x04
865 #define RT2860_EEPROM_PCIE_PSLEVEL 0x11
866 #define RT2860_EEPROM_REV 0x12
867 #define RT2860_EEPROM_ANTENNA 0x1a
868 #define RT2860_EEPROM_CONFIG 0x1b
869 #define RT2860_EEPROM_COUNTRY 0x1c
870 #define RT2860_EEPROM_FREQ_LEDS 0x1d
871 #define RT2860_EEPROM_LED1 0x1e
872 #define RT2860_EEPROM_LED2 0x1f
873 #define RT2860_EEPROM_LED3 0x20
874 #define RT2860_EEPROM_LNA 0x22
875 #define RT2860_EEPROM_RSSI1_2GHZ 0x23
876 #define RT2860_EEPROM_RSSI2_2GHZ 0x24
877 #define RT2860_EEPROM_RSSI1_5GHZ 0x25
878 #define RT2860_EEPROM_RSSI2_5GHZ 0x26
879 #define RT2860_EEPROM_DELTAPWR 0x28
880 #define RT2860_EEPROM_PWR2GHZ_BASE1 0x29
881 #define RT2860_EEPROM_PWR2GHZ_BASE2 0x30
882 #define RT2860_EEPROM_TSSI1_2GHZ 0x37
883 #define RT2860_EEPROM_TSSI2_2GHZ 0x38
884 #define RT2860_EEPROM_TSSI3_2GHZ 0x39
885 #define RT2860_EEPROM_TSSI4_2GHZ 0x3a
886 #define RT2860_EEPROM_TSSI5_2GHZ 0x3b
887 #define RT2860_EEPROM_PWR5GHZ_BASE1 0x3c
888 #define RT2860_EEPROM_PWR5GHZ_BASE2 0x53
889 #define RT2860_EEPROM_TSSI1_5GHZ 0x6a
890 #define RT2860_EEPROM_TSSI2_5GHZ 0x6b
891 #define RT2860_EEPROM_TSSI3_5GHZ 0x6c
892 #define RT2860_EEPROM_TSSI4_5GHZ 0x6d
893 #define RT2860_EEPROM_TSSI5_5GHZ 0x6e
894 #define RT2860_EEPROM_RPWR 0x6f
895 #define RT2860_EEPROM_BBP_BASE 0x78
896 #define RT3071_EEPROM_RF_BASE 0x82
898 #define RT2860_RIDX_CCK1 0
899 #define RT2860_RIDX_CCK11 3
900 #define RT2860_RIDX_OFDM6 4
901 #define RT2860_RIDX_MAX 12
902 static const struct rt2860_rate {
905 enum ieee80211_phytype phy;
910 { 2, 0, IEEE80211_T_DS, 0, 314, 314 },
911 { 4, 1, IEEE80211_T_DS, 1, 258, 162 },
912 { 11, 2, IEEE80211_T_DS, 2, 223, 127 },
913 { 22, 3, IEEE80211_T_DS, 3, 213, 117 },
914 { 12, 0, IEEE80211_T_OFDM, 4, 60, 60 },
915 { 18, 1, IEEE80211_T_OFDM, 4, 52, 52 },
916 { 24, 2, IEEE80211_T_OFDM, 6, 48, 48 },
917 { 36, 3, IEEE80211_T_OFDM, 6, 44, 44 },
918 { 48, 4, IEEE80211_T_OFDM, 8, 44, 44 },
919 { 72, 5, IEEE80211_T_OFDM, 8, 40, 40 },
920 { 96, 6, IEEE80211_T_OFDM, 8, 40, 40 },
921 { 108, 7, IEEE80211_T_OFDM, 8, 40, 40 }
925 * Control and status registers access macros.
927 #define RAL_READ(sc, reg) \
928 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
930 #define RAL_WRITE(sc, reg, val) \
931 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
933 #define RAL_BARRIER_WRITE(sc) \
934 bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
935 BUS_SPACE_BARRIER_WRITE)
937 #define RAL_BARRIER_READ_WRITE(sc) \
938 bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
939 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
941 #define RAL_WRITE_REGION_1(sc, offset, datap, count) \
942 bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
945 #define RAL_SET_REGION_4(sc, offset, val, count) \
946 bus_space_set_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
950 * EEPROM access macro.
952 #define RT2860_EEPROM_CTL(sc, val) do { \
953 RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \
954 RAL_BARRIER_READ_WRITE((sc)); \
955 DELAY(RT2860_EEPROM_DELAY); \
956 } while (/* CONSTCOND */0)
959 * Default values for MAC registers; values taken from the reference driver.
961 #define RT2860_DEF_MAC \
962 { RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \
963 { RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \
964 { RT2860_HT_BASIC_RATE, 0x00008003 }, \
965 { RT2860_MAC_SYS_CTRL, 0x00000000 }, \
966 { RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \
967 { RT2860_TX_SW_CFG0, 0x00000000 }, \
968 { RT2860_TX_SW_CFG1, 0x00080606 }, \
969 { RT2860_TX_LINK_CFG, 0x00001020 }, \
970 { RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \
971 { RT2860_LED_CFG, 0x7f031e46 }, \
972 { RT2860_WMM_AIFSN_CFG, 0x00002273 }, \
973 { RT2860_WMM_CWMIN_CFG, 0x00002344 }, \
974 { RT2860_WMM_CWMAX_CFG, 0x000034aa }, \
975 { RT2860_MAX_PCNT, 0x1f3fbf9f }, \
976 { RT2860_TX_RTY_CFG, 0x47d01f0f }, \
977 { RT2860_AUTO_RSP_CFG, 0x00000013 }, \
978 { RT2860_CCK_PROT_CFG, 0x05740003 }, \
979 { RT2860_OFDM_PROT_CFG, 0x05740003 }, \
980 { RT2860_GF20_PROT_CFG, 0x01744004 }, \
981 { RT2860_GF40_PROT_CFG, 0x03f44084 }, \
982 { RT2860_MM20_PROT_CFG, 0x01744004 }, \
983 { RT2860_MM40_PROT_CFG, 0x03f54084 }, \
984 { RT2860_TXOP_CTRL_CFG, 0x0000583f }, \
985 { RT2860_TXOP_HLDR_ET, 0x00000002 }, \
986 { RT2860_TX_RTS_CFG, 0x00092b20 }, \
987 { RT2860_EXP_ACK_TIME, 0x002400ca }, \
988 { RT2860_XIFS_TIME_CFG, 0x33a41010 }, \
989 { RT2860_PWR_PIN_CFG, 0x00000003 }
991 /* XXX only a few registers differ from above, try to merge? */
992 #define RT2870_DEF_MAC \
993 { RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \
994 { RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \
995 { RT2860_HT_BASIC_RATE, 0x00008003 }, \
996 { RT2860_MAC_SYS_CTRL, 0x00000000 }, \
997 { RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \
998 { RT2860_TX_SW_CFG0, 0x00000000 }, \
999 { RT2860_TX_SW_CFG1, 0x00080606 }, \
1000 { RT2860_TX_LINK_CFG, 0x00001020 }, \
1001 { RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \
1002 { RT2860_LED_CFG, 0x7f031e46 }, \
1003 { RT2860_WMM_AIFSN_CFG, 0x00002273 }, \
1004 { RT2860_WMM_CWMIN_CFG, 0x00002344 }, \
1005 { RT2860_WMM_CWMAX_CFG, 0x000034aa }, \
1006 { RT2860_MAX_PCNT, 0x1f3fbf9f }, \
1007 { RT2860_TX_RTY_CFG, 0x47d01f0f }, \
1008 { RT2860_AUTO_RSP_CFG, 0x00000013 }, \
1009 { RT2860_CCK_PROT_CFG, 0x05740003 }, \
1010 { RT2860_OFDM_PROT_CFG, 0x05740003 }, \
1011 { RT2860_PBF_CFG, 0x00f40006 }, \
1012 { RT2860_WPDMA_GLO_CFG, 0x00000030 }, \
1013 { RT2860_GF20_PROT_CFG, 0x01744004 }, \
1014 { RT2860_GF40_PROT_CFG, 0x03f44084 }, \
1015 { RT2860_MM20_PROT_CFG, 0x01744004 }, \
1016 { RT2860_MM40_PROT_CFG, 0x03f44084 }, \
1017 { RT2860_TXOP_CTRL_CFG, 0x0000583f }, \
1018 { RT2860_TXOP_HLDR_ET, 0x00000002 }, \
1019 { RT2860_TX_RTS_CFG, 0x00092b20 }, \
1020 { RT2860_EXP_ACK_TIME, 0x002400ca }, \
1021 { RT2860_XIFS_TIME_CFG, 0x33a41010 }, \
1022 { RT2860_PWR_PIN_CFG, 0x00000003 }
1025 * Default values for BBP registers; values taken from the reference driver.
1027 #define RT2860_DEF_BBP \
1045 * Default settings for RF registers; values derived from the reference driver.
1047 #define RT2860_RF2850 \
1048 { 1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 }, \
1049 { 2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 }, \
1050 { 3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 }, \
1051 { 4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 }, \
1052 { 5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 }, \
1053 { 6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 }, \
1054 { 7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 }, \
1055 { 8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 }, \
1056 { 9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 }, \
1057 { 10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 }, \
1058 { 11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 }, \
1059 { 12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 }, \
1060 { 13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 }, \
1061 { 14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 }, \
1062 { 36, 0x100bb3, 0x130266, 0x056014, 0x001408 }, \
1063 { 38, 0x100bb3, 0x130267, 0x056014, 0x001404 }, \
1064 { 40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 }, \
1065 { 44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 }, \
1066 { 46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 }, \
1067 { 48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 }, \
1068 { 52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 }, \
1069 { 54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 }, \
1070 { 56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 }, \
1071 { 60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 }, \
1072 { 62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 }, \
1073 { 64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 }, \
1074 { 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 }, \
1075 { 102, 0x100bb2, 0x1701ac, 0x15e014, 0x001404 }, \
1076 { 104, 0x100bb2, 0x1701ac, 0x15e014, 0x001408 }, \
1077 { 108, 0x100bb3, 0x17028c, 0x15e014, 0x001404 }, \
1078 { 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 }, \
1079 { 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 }, \
1080 { 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 }, \
1081 { 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 }, \
1082 { 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 }, \
1083 { 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 }, \
1084 { 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 }, \
1085 { 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 }, \
1086 { 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 }, \
1087 { 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 }, \
1088 { 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 }, \
1089 { 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 }, \
1090 { 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 }, \
1091 { 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 }, \
1092 { 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 }, \
1093 { 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 }, \
1094 { 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 }, \
1095 { 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 }, \
1096 { 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 }, \
1097 { 167, 0x100bb1, 0x1300f4, 0x05e014, 0x001407 }, \
1098 { 169, 0x100bb1, 0x1300f4, 0x05e014, 0x001409 }, \
1099 { 171, 0x100bb1, 0x1300f5, 0x05e014, 0x001401 }, \
1100 { 173, 0x100bb1, 0x1300f5, 0x05e014, 0x001403 }
1102 #define RT3070_RF3052 \
1157 #define RT3070_DEF_RF \
1178 #define RT3572_DEF_RF \
1224 #endif /* _IF_RUNREG_H_ */