sys/dev/usb/wlan/if_urtw.c

   1 /*-
   2  * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org>
   3  *
   4  * Permission to use, copy, modify, and distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <sys/cdefs.h>
  18 __FBSDID("$FreeBSD$");
  19
  20 #include "opt_wlan.h"
  21
  22 #include <sys/param.h>
  23 #include <sys/sockio.h>
  24 #include <sys/sysctl.h>
  25 #include <sys/lock.h>
  26 #include <sys/mutex.h>
  27 #include <sys/mbuf.h>
  28 #include <sys/kernel.h>
  29 #include <sys/socket.h>
  30 #include <sys/systm.h>
  31 #include <sys/malloc.h>
  32 #include <sys/module.h>
  33 #include <sys/bus.h>
  34 #include <sys/endian.h>
  35 #include <sys/kdb.h>
  36
  37 #include <net/if.h>
  38 #include <net/if_var.h>
  39 #include <net/if_arp.h>
  40 #include <net/ethernet.h>
  41 #include <net/if_dl.h>
  42 #include <net/if_media.h>
  43 #include <net/if_types.h>
  44
  45 #ifdef INET
  46 #include <netinet/in.h>
  47 #include <netinet/in_systm.h>
  48 #include <netinet/in_var.h>
  49 #include <netinet/if_ether.h>
  50 #include <netinet/ip.h>
  51 #endif
  52
  53 #include <net80211/ieee80211_var.h>
  54 #include <net80211/ieee80211_regdomain.h>
  55 #include <net80211/ieee80211_radiotap.h>
  56
  57 #include <dev/usb/usb.h>
  58 #include <dev/usb/usbdi.h>
  59 #include "usbdevs.h"
  60
  61 #include <dev/usb/wlan/if_urtwreg.h>
  62 #include <dev/usb/wlan/if_urtwvar.h>
  63
  64 /* copy some rate indices from if_rtwn_ridx.h */
  65 #define URTW_RIDX_CCK5          2
  66 #define URTW_RIDX_CCK11         3
  67 #define URTW_RIDX_OFDM6         4
  68 #define URTW_RIDX_OFDM24        8
  69
  70 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
  71     "USB Realtek 8187L");
  72 #ifdef URTW_DEBUG
  73 int urtw_debug = 0;
  74 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0,
  75     "control debugging printfs");
  76 enum {
  77         URTW_DEBUG_XMIT         = 0x00000001,   /* basic xmit operation */
  78         URTW_DEBUG_RECV         = 0x00000002,   /* basic recv operation */
  79         URTW_DEBUG_RESET        = 0x00000004,   /* reset processing */
  80         URTW_DEBUG_TX_PROC      = 0x00000008,   /* tx ISR proc */
  81         URTW_DEBUG_RX_PROC      = 0x00000010,   /* rx ISR proc */
  82         URTW_DEBUG_STATE        = 0x00000020,   /* 802.11 state transitions */
  83         URTW_DEBUG_STAT         = 0x00000040,   /* statistic */
  84         URTW_DEBUG_INIT         = 0x00000080,   /* initialization of dev */
  85         URTW_DEBUG_TXSTATUS     = 0x00000100,   /* tx status */
  86         URTW_DEBUG_ANY          = 0xffffffff
  87 };
  88 #define DPRINTF(sc, m, fmt, ...) do {                           \
  89         if (sc->sc_debug & (m))                                 \
  90                 printf(fmt, __VA_ARGS__);                       \
  91 } while (0)
  92 #else
  93 #define DPRINTF(sc, m, fmt, ...) do {                           \
  94         (void) sc;                                              \
  95 } while (0)
  96 #endif
  97 static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG;
  98 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN,
  99     &urtw_preamble_mode, 0, "set the preable mode (long or short)");
 100
 101 /* recognized device vendors/products */
 102 #define urtw_lookup(v, p)                                               \
 103         ((const struct urtw_type *)usb_lookup(urtw_devs, v, p))
 104 #define URTW_DEV_B(v,p)                                                 \
 105         { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) }
 106 #define URTW_DEV_L(v,p)                                                 \
 107         { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) }
 108 #define URTW_REV_RTL8187B       0
 109 #define URTW_REV_RTL8187L       1
 110 static const STRUCT_USB_HOST_ID urtw_devs[] = {
 111         URTW_DEV_B(NETGEAR, WG111V3),
 112         URTW_DEV_B(REALTEK, RTL8187B_0),
 113         URTW_DEV_B(REALTEK, RTL8187B_1),
 114         URTW_DEV_B(REALTEK, RTL8187B_2),
 115         URTW_DEV_B(SITECOMEU, WL168V4),
 116         URTW_DEV_L(ASUS, P5B_WIFI),
 117         URTW_DEV_L(BELKIN, F5D7050E),
 118         URTW_DEV_L(LINKSYS4, WUSB54GCV2),
 119         URTW_DEV_L(NETGEAR, WG111V2),
 120         URTW_DEV_L(REALTEK, RTL8187),
 121         URTW_DEV_L(SITECOMEU, WL168V1),
 122         URTW_DEV_L(SURECOM, EP9001G2A),
 123         { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) },
 124         { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) },
 125         { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) },
 126         { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) },
 127         { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) },
 128         { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) },
 129         { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) },
 130 #undef URTW_DEV_L
 131 #undef URTW_DEV_B
 132 };
 133
 134 #define urtw_read8_m(sc, val, data)     do {                    \
 135         error = urtw_read8_c(sc, val, data);                    \
 136         if (error != 0)                                         \
 137                 goto fail;                                      \
 138 } while (0)
 139 #define urtw_write8_m(sc, val, data)    do {                    \
 140         error = urtw_write8_c(sc, val, data);                   \
 141         if (error != 0)                                         \
 142                 goto fail;                                      \
 143 } while (0)
 144 #define urtw_read16_m(sc, val, data)    do {                    \
 145         error = urtw_read16_c(sc, val, data);                   \
 146         if (error != 0)                                         \
 147                 goto fail;                                      \
 148 } while (0)
 149 #define urtw_write16_m(sc, val, data)   do {                    \
 150         error = urtw_write16_c(sc, val, data);                  \
 151         if (error != 0)                                         \
 152                 goto fail;                                      \
 153 } while (0)
 154 #define urtw_read32_m(sc, val, data)    do {                    \
 155         error = urtw_read32_c(sc, val, data);                   \
 156         if (error != 0)                                         \
 157                 goto fail;                                      \
 158 } while (0)
 159 #define urtw_write32_m(sc, val, data)   do {                    \
 160         error = urtw_write32_c(sc, val, data);                  \
 161         if (error != 0)                                         \
 162                 goto fail;                                      \
 163 } while (0)
 164 #define urtw_8187_write_phy_ofdm(sc, val, data) do {            \
 165         error = urtw_8187_write_phy_ofdm_c(sc, val, data);      \
 166         if (error != 0)                                         \
 167                 goto fail;                                      \
 168 } while (0)
 169 #define urtw_8187_write_phy_cck(sc, val, data)  do {            \
 170         error = urtw_8187_write_phy_cck_c(sc, val, data);       \
 171         if (error != 0)                                         \
 172                 goto fail;                                      \
 173 } while (0)
 174 #define urtw_8225_write(sc, val, data)  do {                    \
 175         error = urtw_8225_write_c(sc, val, data);               \
 176         if (error != 0)                                         \
 177                 goto fail;                                      \
 178 } while (0)
 179
 180 struct urtw_pair {
 181         uint32_t        reg;
 182         uint32_t        val;
 183 };
 184
 185 static uint8_t urtw_8225_agc[] = {
 186         0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b,
 187         0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90,
 188         0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85,
 189         0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a,
 190         0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f,
 191         0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24,
 192         0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19,
 193         0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
 194         0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03,
 195         0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
 196         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
 197         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
 198 };
 199
 200 static uint8_t urtw_8225z2_agc[] = {
 201         0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51,
 202         0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b,
 203         0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25,
 204         0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f,
 205         0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01,
 206         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19,
 207         0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23,
 208         0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a,
 209         0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d,
 210         0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31,
 211         0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
 212         0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31
 213 };
 214
 215 static uint32_t urtw_8225_channel[] = {
 216         0x0000,         /* dummy channel 0  */
 217         0x085c,         /* 1  */
 218         0x08dc,         /* 2  */
 219         0x095c,         /* 3  */
 220         0x09dc,         /* 4  */
 221         0x0a5c,         /* 5  */
 222         0x0adc,         /* 6  */
 223         0x0b5c,         /* 7  */
 224         0x0bdc,         /* 8  */
 225         0x0c5c,         /* 9  */
 226         0x0cdc,         /* 10  */
 227         0x0d5c,         /* 11  */
 228         0x0ddc,         /* 12  */
 229         0x0e5c,         /* 13  */
 230         0x0f72,         /* 14  */
 231 };
 232
 233 static uint8_t urtw_8225_gain[] = {
 234         0x23, 0x88, 0x7c, 0xa5,         /* -82dbm  */
 235         0x23, 0x88, 0x7c, 0xb5,         /* -82dbm  */
 236         0x23, 0x88, 0x7c, 0xc5,         /* -82dbm  */
 237         0x33, 0x80, 0x79, 0xc5,         /* -78dbm  */
 238         0x43, 0x78, 0x76, 0xc5,         /* -74dbm  */
 239         0x53, 0x60, 0x73, 0xc5,         /* -70dbm  */
 240         0x63, 0x58, 0x70, 0xc5,         /* -66dbm  */
 241 };
 242
 243 static struct urtw_pair urtw_8225_rf_part1[] = {
 244         { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
 245         { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a },
 246         { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 },
 247         { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 },
 248 };
 249
 250 static struct urtw_pair urtw_8225_rf_part2[] = {
 251         { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
 252         { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
 253         { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 },
 254         { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 },
 255         { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 },
 256         { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef },
 257         { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 },
 258         { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 },
 259         { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 },
 260         { 0x27, 0x88 }
 261 };
 262
 263 static struct urtw_pair urtw_8225_rf_part3[] = {
 264         { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
 265         { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b },
 266         { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 },
 267         { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d },
 268         { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e },
 269         { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a },
 270         { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 }
 271 };
 272
 273 static uint16_t urtw_8225_rxgain[] = {
 274         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
 275         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
 276         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
 277         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
 278         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
 279         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
 280         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
 281         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
 282         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
 283         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
 284         0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
 285         0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
 286 };
 287
 288 static uint8_t urtw_8225_threshold[] = {
 289         0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
 290 };
 291
 292 static uint8_t urtw_8225_tx_gain_cck_ofdm[] = {
 293         0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
 294 };
 295
 296 static uint8_t urtw_8225_txpwr_cck[] = {
 297         0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
 298         0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
 299         0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
 300         0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
 301         0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
 302         0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
 303 };
 304
 305 static uint8_t urtw_8225_txpwr_cck_ch14[] = {
 306         0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
 307         0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
 308         0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
 309         0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
 310         0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
 311         0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
 312 };
 313
 314 static uint8_t urtw_8225_txpwr_ofdm[]={
 315         0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
 316 };
 317
 318 static uint8_t urtw_8225v2_gain_bg[]={
 319         0x23, 0x15, 0xa5,               /* -82-1dbm  */
 320         0x23, 0x15, 0xb5,               /* -82-2dbm  */
 321         0x23, 0x15, 0xc5,               /* -82-3dbm  */
 322         0x33, 0x15, 0xc5,               /* -78dbm  */
 323         0x43, 0x15, 0xc5,               /* -74dbm  */
 324         0x53, 0x15, 0xc5,               /* -70dbm  */
 325         0x63, 0x15, 0xc5,               /* -66dbm  */
 326 };
 327
 328 static struct urtw_pair urtw_8225v2_rf_part1[] = {
 329         { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
 330         { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
 331         { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
 332         { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
 333 };
 334
 335 static struct urtw_pair urtw_8225v2b_rf_part0[] = {
 336         { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
 337         { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
 338         { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
 339         { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
 340 };
 341
 342 static struct urtw_pair urtw_8225v2b_rf_part1[] = {
 343         {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00},
 344         {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43},
 345         {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46},
 346         {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00},
 347         {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00},
 348         {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00},
 349         {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b},
 350         {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09},
 351         {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff},
 352         {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e},
 353         {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03},
 354         {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06},
 355         {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00},
 356         {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68},
 357         {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d},
 358         {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08},
 359         {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04},
 360         {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23},
 361         {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08},
 362         {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08},
 363         {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08},
 364         {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56},
 365         {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f},
 366         {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24},
 367         {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07},
 368         {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12},
 369         {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a},
 370         {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80},
 371         {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03},
 372         {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01},
 373         {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00}
 374 };
 375
 376 static struct urtw_pair urtw_8225v2_rf_part2[] = {
 377         { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
 378         { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
 379         { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 },
 380         { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 },
 381         { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 },
 382         { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 },
 383         { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 },
 384         { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 },
 385         { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 },
 386         { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 }
 387 };
 388
 389 static struct urtw_pair urtw_8225v2b_rf_part2[] = {
 390         { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 },
 391         { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 },
 392         { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 },
 393         { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 },
 394         { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 },
 395         { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 },
 396         { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 },
 397         { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 },
 398         { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a },
 399         { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f },
 400         { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 },
 401         { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 },
 402         { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 },
 403         { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e },
 404         { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 }
 405 };
 406
 407 static struct urtw_pair urtw_8225v2_rf_part3[] = {
 408         { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
 409         { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 },
 410         { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 },
 411         { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 },
 412         { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d },
 413         { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 },
 414         { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 },
 415         { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 }
 416 };
 417
 418 static uint16_t urtw_8225v2_rxgain[] = {
 419         0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009,
 420         0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141,
 421         0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183,
 422         0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244,
 423         0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288,
 424         0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345,
 425         0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389,
 426         0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393,
 427         0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d,
 428         0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9,
 429         0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
 430         0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
 431 };
 432
 433 static uint16_t urtw_8225v2b_rxgain[] = {
 434         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
 435         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
 436         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
 437         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
 438         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
 439         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
 440         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
 441         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
 442         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
 443         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
 444         0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
 445         0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
 446 };
 447
 448 static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = {
 449         0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
 450         0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
 451         0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
 452         0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
 453         0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
 454         0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
 455 };
 456
 457 static uint8_t urtw_8225v2_txpwr_cck[] = {
 458         0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
 459 };
 460
 461 static uint8_t urtw_8225v2_txpwr_cck_ch14[] = {
 462         0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
 463 };
 464
 465 static uint8_t urtw_8225v2b_txpwr_cck[] = {
 466         0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04,
 467         0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03,
 468         0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03,
 469         0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03
 470 };
 471
 472 static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = {
 473         0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00,
 474         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
 475         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
 476         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00
 477 };
 478
 479 static struct urtw_pair urtw_ratetable[] = {
 480         {  2,  0 }, {   4,  1 }, { 11, 2 }, { 12, 4 }, { 18, 5 },
 481         { 22,  3 }, {  24,  6 }, { 36, 7 }, { 48, 8 }, { 72, 9 },
 482         { 96, 10 }, { 108, 11 }
 483 };
 484
 485 #if 0
 486 static const uint8_t urtw_8187b_reg_table[][3] = {
 487         { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 },
 488         { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 },
 489         { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 },
 490         { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 },
 491         { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 },
 492         { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 },
 493         { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 },
 494         { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 },
 495         { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 },
 496         { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 },
 497         { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 },
 498         { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 },
 499         { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 },
 500         { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 },
 501         { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 },
 502         { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 },
 503         { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 },
 504         { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 },
 505         { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 },
 506         { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 },
 507         { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 },
 508         { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 },
 509         { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 },
 510         { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 },
 511         { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 },
 512         { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 },
 513         { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 },
 514         { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 },
 515         { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 },
 516         { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 },
 517         { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 }
 518 };
 519 #endif
 520
 521 static usb_callback_t urtw_bulk_rx_callback;
 522 static usb_callback_t urtw_bulk_tx_callback;
 523 static usb_callback_t urtw_bulk_tx_status_callback;
 524
 525 static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = {
 526         [URTW_8187B_BULK_RX] = {
 527                 .type = UE_BULK,
 528                 .endpoint = 0x83,
 529                 .direction = UE_DIR_IN,
 530                 .bufsize = MCLBYTES,
 531                 .flags = {
 532                         .ext_buffer = 1,
 533                         .pipe_bof = 1,
 534                         .short_xfer_ok = 1
 535                 },
 536                 .callback = urtw_bulk_rx_callback
 537         },
 538         [URTW_8187B_BULK_TX_STATUS] = {
 539                 .type = UE_BULK,
 540                 .endpoint = 0x89,
 541                 .direction = UE_DIR_IN,
 542                 .bufsize = sizeof(uint64_t),
 543                 .flags = {
 544                         .pipe_bof = 1,
 545                         .short_xfer_ok = 1
 546                 },
 547                 .callback = urtw_bulk_tx_status_callback
 548         },
 549         [URTW_8187B_BULK_TX_BE] = {
 550                 .type = UE_BULK,
 551                 .endpoint = URTW_8187B_TXPIPE_BE,
 552                 .direction = UE_DIR_OUT,
 553                 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
 554                 .flags = {
 555                         .force_short_xfer = 1,
 556                         .pipe_bof = 1,
 557                 },
 558                 .callback = urtw_bulk_tx_callback,
 559                 .timeout = URTW_DATA_TIMEOUT
 560         },
 561         [URTW_8187B_BULK_TX_BK] = {
 562                 .type = UE_BULK,
 563                 .endpoint = URTW_8187B_TXPIPE_BK,
 564                 .direction = UE_DIR_OUT,
 565                 .bufsize = URTW_TX_MAXSIZE,
 566                 .flags = {
 567                         .ext_buffer = 1,
 568                         .force_short_xfer = 1,
 569                         .pipe_bof = 1,
 570                 },
 571                 .callback = urtw_bulk_tx_callback,
 572                 .timeout = URTW_DATA_TIMEOUT
 573         },
 574         [URTW_8187B_BULK_TX_VI] = {
 575                 .type = UE_BULK,
 576                 .endpoint = URTW_8187B_TXPIPE_VI,
 577                 .direction = UE_DIR_OUT,
 578                 .bufsize = URTW_TX_MAXSIZE,
 579                 .flags = {
 580                         .ext_buffer = 1,
 581                         .force_short_xfer = 1,
 582                         .pipe_bof = 1,
 583                 },
 584                 .callback = urtw_bulk_tx_callback,
 585                 .timeout = URTW_DATA_TIMEOUT
 586         },
 587         [URTW_8187B_BULK_TX_VO] = {
 588                 .type = UE_BULK,
 589                 .endpoint = URTW_8187B_TXPIPE_VO,
 590                 .direction = UE_DIR_OUT,
 591                 .bufsize = URTW_TX_MAXSIZE,
 592                 .flags = {
 593                         .ext_buffer = 1,
 594                         .force_short_xfer = 1,
 595                         .pipe_bof = 1,
 596                 },
 597                 .callback = urtw_bulk_tx_callback,
 598                 .timeout = URTW_DATA_TIMEOUT
 599         },
 600         [URTW_8187B_BULK_TX_EP12] = {
 601                 .type = UE_BULK,
 602                 .endpoint = 0xc,
 603                 .direction = UE_DIR_OUT,
 604                 .bufsize = URTW_TX_MAXSIZE,
 605                 .flags = {
 606                         .ext_buffer = 1,
 607                         .force_short_xfer = 1,
 608                         .pipe_bof = 1,
 609                 },
 610                 .callback = urtw_bulk_tx_callback,
 611                 .timeout = URTW_DATA_TIMEOUT
 612         }
 613 };
 614
 615 static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = {
 616         [URTW_8187L_BULK_RX] = {
 617                 .type = UE_BULK,
 618                 .endpoint = 0x81,
 619                 .direction = UE_DIR_IN,
 620                 .bufsize = MCLBYTES,
 621                 .flags = {
 622                         .ext_buffer = 1,
 623                         .pipe_bof = 1,
 624                         .short_xfer_ok = 1
 625                 },
 626                 .callback = urtw_bulk_rx_callback
 627         },
 628         [URTW_8187L_BULK_TX_LOW] = {
 629                 .type = UE_BULK,
 630                 .endpoint = 0x2,
 631                 .direction = UE_DIR_OUT,
 632                 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
 633                 .flags = {
 634                         .force_short_xfer = 1,
 635                         .pipe_bof = 1,
 636                 },
 637                 .callback = urtw_bulk_tx_callback,
 638                 .timeout = URTW_DATA_TIMEOUT
 639         },
 640         [URTW_8187L_BULK_TX_NORMAL] = {
 641                 .type = UE_BULK,
 642                 .endpoint = 0x3,
 643                 .direction = UE_DIR_OUT,
 644                 .bufsize = URTW_TX_MAXSIZE,
 645                 .flags = {
 646                         .ext_buffer = 1,
 647                         .force_short_xfer = 1,
 648                         .pipe_bof = 1,
 649                 },
 650                 .callback = urtw_bulk_tx_callback,
 651                 .timeout = URTW_DATA_TIMEOUT
 652         },
 653 };
 654
 655 static struct ieee80211vap *urtw_vap_create(struct ieee80211com *,
 656                             const char [IFNAMSIZ], int, enum ieee80211_opmode,
 657                             int, const uint8_t [IEEE80211_ADDR_LEN],
 658                             const uint8_t [IEEE80211_ADDR_LEN]);
 659 static void             urtw_vap_delete(struct ieee80211vap *);
 660 static void             urtw_init(struct urtw_softc *);
 661 static void             urtw_stop(struct urtw_softc *);
 662 static void             urtw_parent(struct ieee80211com *);
 663 static int              urtw_transmit(struct ieee80211com *, struct mbuf *);
 664 static void             urtw_start(struct urtw_softc *);
 665 static int              urtw_alloc_rx_data_list(struct urtw_softc *);
 666 static int              urtw_alloc_tx_data_list(struct urtw_softc *);
 667 static int              urtw_raw_xmit(struct ieee80211_node *, struct mbuf *,
 668                             const struct ieee80211_bpf_params *);
 669 static void             urtw_scan_start(struct ieee80211com *);
 670 static void             urtw_scan_end(struct ieee80211com *);
 671 static void             urtw_getradiocaps(struct ieee80211com *, int, int *,
 672                            struct ieee80211_channel[]);
 673 static void             urtw_set_channel(struct ieee80211com *);
 674 static void             urtw_update_promisc(struct ieee80211com *);
 675 static void             urtw_update_mcast(struct ieee80211com *);
 676 static int              urtw_tx_start(struct urtw_softc *,
 677                             struct ieee80211_node *, struct mbuf *,
 678                             struct urtw_data *, int);
 679 static int              urtw_newstate(struct ieee80211vap *,
 680                             enum ieee80211_state, int);
 681 static void             urtw_led_ch(void *);
 682 static void             urtw_ledtask(void *, int);
 683 static void             urtw_watchdog(void *);
 684 static void             urtw_set_multi(void *);
 685 static int              urtw_isbmode(uint16_t);
 686 static uint16_t         urtw_rtl2rate(uint32_t);
 687 static usb_error_t      urtw_set_rate(struct urtw_softc *);
 688 static usb_error_t      urtw_update_msr(struct urtw_softc *);
 689 static usb_error_t      urtw_read8_c(struct urtw_softc *, int, uint8_t *);
 690 static usb_error_t      urtw_read16_c(struct urtw_softc *, int, uint16_t *);
 691 static usb_error_t      urtw_read32_c(struct urtw_softc *, int, uint32_t *);
 692 static usb_error_t      urtw_write8_c(struct urtw_softc *, int, uint8_t);
 693 static usb_error_t      urtw_write16_c(struct urtw_softc *, int, uint16_t);
 694 static usb_error_t      urtw_write32_c(struct urtw_softc *, int, uint32_t);
 695 static usb_error_t      urtw_eprom_cs(struct urtw_softc *, int);
 696 static usb_error_t      urtw_eprom_ck(struct urtw_softc *);
 697 static usb_error_t      urtw_eprom_sendbits(struct urtw_softc *, int16_t *,
 698                             int);
 699 static usb_error_t      urtw_eprom_read32(struct urtw_softc *, uint32_t,
 700                             uint32_t *);
 701 static usb_error_t      urtw_eprom_readbit(struct urtw_softc *, int16_t *);
 702 static usb_error_t      urtw_eprom_writebit(struct urtw_softc *, int16_t);
 703 static usb_error_t      urtw_get_macaddr(struct urtw_softc *);
 704 static usb_error_t      urtw_get_txpwr(struct urtw_softc *);
 705 static usb_error_t      urtw_get_rfchip(struct urtw_softc *);
 706 static usb_error_t      urtw_led_init(struct urtw_softc *);
 707 static usb_error_t      urtw_8185_rf_pins_enable(struct urtw_softc *);
 708 static usb_error_t      urtw_8185_tx_antenna(struct urtw_softc *, uint8_t);
 709 static usb_error_t      urtw_8187_write_phy(struct urtw_softc *, uint8_t,
 710                             uint32_t);
 711 static usb_error_t      urtw_8187_write_phy_ofdm_c(struct urtw_softc *,
 712                             uint8_t, uint32_t);
 713 static usb_error_t      urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t,
 714                             uint32_t);
 715 static usb_error_t      urtw_8225_setgain(struct urtw_softc *, int16_t);
 716 static usb_error_t      urtw_8225_usb_init(struct urtw_softc *);
 717 static usb_error_t      urtw_8225_write_c(struct urtw_softc *, uint8_t,
 718                             uint16_t);
 719 static usb_error_t      urtw_8225_write_s16(struct urtw_softc *, uint8_t, int,
 720                             uint16_t *);
 721 static usb_error_t      urtw_8225_read(struct urtw_softc *, uint8_t,
 722                             uint32_t *);
 723 static usb_error_t      urtw_8225_rf_init(struct urtw_softc *);
 724 static usb_error_t      urtw_8225_rf_set_chan(struct urtw_softc *, int);
 725 static usb_error_t      urtw_8225_rf_set_sens(struct urtw_softc *, int);
 726 static usb_error_t      urtw_8225_set_txpwrlvl(struct urtw_softc *, int);
 727 static usb_error_t      urtw_8225_rf_stop(struct urtw_softc *);
 728 static usb_error_t      urtw_8225v2_rf_init(struct urtw_softc *);
 729 static usb_error_t      urtw_8225v2_rf_set_chan(struct urtw_softc *, int);
 730 static usb_error_t      urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int);
 731 static usb_error_t      urtw_8225v2_setgain(struct urtw_softc *, int16_t);
 732 static usb_error_t      urtw_8225_isv2(struct urtw_softc *, int *);
 733 static usb_error_t      urtw_8225v2b_rf_init(struct urtw_softc *);
 734 static usb_error_t      urtw_8225v2b_rf_set_chan(struct urtw_softc *, int);
 735 static usb_error_t      urtw_read8e(struct urtw_softc *, int, uint8_t *);
 736 static usb_error_t      urtw_write8e(struct urtw_softc *, int, uint8_t);
 737 static usb_error_t      urtw_8180_set_anaparam(struct urtw_softc *, uint32_t);
 738 static usb_error_t      urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t);
 739 static usb_error_t      urtw_intr_enable(struct urtw_softc *);
 740 static usb_error_t      urtw_intr_disable(struct urtw_softc *);
 741 static usb_error_t      urtw_reset(struct urtw_softc *);
 742 static usb_error_t      urtw_led_on(struct urtw_softc *, int);
 743 static usb_error_t      urtw_led_ctl(struct urtw_softc *, int);
 744 static usb_error_t      urtw_led_blink(struct urtw_softc *);
 745 static usb_error_t      urtw_led_mode0(struct urtw_softc *, int);
 746 static usb_error_t      urtw_led_mode1(struct urtw_softc *, int);
 747 static usb_error_t      urtw_led_mode2(struct urtw_softc *, int);
 748 static usb_error_t      urtw_led_mode3(struct urtw_softc *, int);
 749 static usb_error_t      urtw_rx_setconf(struct urtw_softc *);
 750 static usb_error_t      urtw_rx_enable(struct urtw_softc *);
 751 static usb_error_t      urtw_tx_enable(struct urtw_softc *sc);
 752 static void             urtw_free_tx_data_list(struct urtw_softc *);
 753 static void             urtw_free_rx_data_list(struct urtw_softc *);
 754 static void             urtw_free_data_list(struct urtw_softc *,
 755                             struct urtw_data data[], int, int);
 756 static usb_error_t      urtw_set_macaddr(struct urtw_softc *, const uint8_t *);
 757 static usb_error_t      urtw_adapter_start(struct urtw_softc *);
 758 static usb_error_t      urtw_adapter_start_b(struct urtw_softc *);
 759 static usb_error_t      urtw_set_mode(struct urtw_softc *, uint32_t);
 760 static usb_error_t      urtw_8187b_cmd_reset(struct urtw_softc *);
 761 static usb_error_t      urtw_do_request(struct urtw_softc *,
 762                             struct usb_device_request *, void *);
 763 static usb_error_t      urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int);
 764 static usb_error_t      urtw_led_off(struct urtw_softc *, int);
 765 static void             urtw_abort_xfers(struct urtw_softc *);
 766 static struct urtw_data *
 767                         urtw_getbuf(struct urtw_softc *sc);
 768 static int              urtw_compute_txtime(uint16_t, uint16_t, uint8_t,
 769                             uint8_t);
 770 static void             urtw_updateslot(struct ieee80211com *);
 771 static void             urtw_updateslottask(void *, int);
 772 static void             urtw_sysctl_node(struct urtw_softc *);
 773
 774 static int
 775 urtw_match(device_t dev)
 776 {
 777         struct usb_attach_arg *uaa = device_get_ivars(dev);
 778
 779         if (uaa->usb_mode != USB_MODE_HOST)
 780                 return (ENXIO);
 781         if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX)
 782                 return (ENXIO);
 783         if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX)
 784                 return (ENXIO);
 785
 786         return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa));
 787 }
 788
 789 static int
 790 urtw_attach(device_t dev)
 791 {
 792         const struct usb_config *setup_start;
 793         int ret = ENXIO;
 794         struct urtw_softc *sc = device_get_softc(dev);
 795         struct usb_attach_arg *uaa = device_get_ivars(dev);
 796         struct ieee80211com *ic = &sc->sc_ic;
 797         uint8_t iface_index = URTW_IFACE_INDEX;         /* XXX */
 798         uint16_t n_setup;
 799         uint32_t data;
 800         usb_error_t error;
 801
 802         device_set_usb_desc(dev);
 803
 804         sc->sc_dev = dev;
 805         sc->sc_udev = uaa->device;
 806         if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B)
 807                 sc->sc_flags |= URTW_RTL8187B;
 808 #ifdef URTW_DEBUG
 809         sc->sc_debug = urtw_debug;
 810 #endif
 811
 812         mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK,
 813             MTX_DEF);
 814         usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0);
 815         TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc);
 816         TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc);
 817         callout_init(&sc->sc_watchdog_ch, 0);
 818         mbufq_init(&sc->sc_snd, ifqmaxlen);
 819
 820         if (sc->sc_flags & URTW_RTL8187B) {
 821                 setup_start = urtw_8187b_usbconfig;
 822                 n_setup = URTW_8187B_N_XFERS;
 823         } else {
 824                 setup_start = urtw_8187l_usbconfig;
 825                 n_setup = URTW_8187L_N_XFERS;
 826         }
 827
 828         error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
 829             setup_start, n_setup, sc, &sc->sc_mtx);
 830         if (error) {
 831                 device_printf(dev, "could not allocate USB transfers, "
 832                     "err=%s\n", usbd_errstr(error));
 833                 ret = ENXIO;
 834                 goto fail0;
 835         }
 836
 837         if (sc->sc_flags & URTW_RTL8187B) {
 838                 sc->sc_tx_dma_buf =
 839                     usbd_xfer_get_frame_buffer(sc->sc_xfer[
 840                     URTW_8187B_BULK_TX_BE], 0);
 841         } else {
 842                 sc->sc_tx_dma_buf =
 843                     usbd_xfer_get_frame_buffer(sc->sc_xfer[
 844                     URTW_8187L_BULK_TX_LOW], 0);
 845         }
 846
 847         URTW_LOCK(sc);
 848
 849         urtw_read32_m(sc, URTW_RX, &data);
 850         sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 :
 851             URTW_EEPROM_93C46;
 852
 853         error = urtw_get_rfchip(sc);
 854         if (error != 0)
 855                 goto fail;
 856         error = urtw_get_macaddr(sc);
 857         if (error != 0)
 858                 goto fail;
 859         error = urtw_get_txpwr(sc);
 860         if (error != 0)
 861                 goto fail;
 862         error = urtw_led_init(sc);
 863         if (error != 0)
 864                 goto fail;
 865
 866         URTW_UNLOCK(sc);
 867
 868         sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY;
 869         sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY;
 870         sc->sc_currate = URTW_RIDX_CCK11;
 871         sc->sc_preamble_mode = urtw_preamble_mode;
 872
 873         ic->ic_softc = sc;
 874         ic->ic_name = device_get_nameunit(dev);
 875         ic->ic_phytype = IEEE80211_T_OFDM;      /* not only, but not used */
 876         ic->ic_opmode = IEEE80211_M_STA;        /* default to BSS mode */
 877
 878         /* set device capabilities */
 879         ic->ic_caps =
 880             IEEE80211_C_STA |           /* station mode */
 881             IEEE80211_C_MONITOR |       /* monitor mode supported */
 882             IEEE80211_C_TXPMGT |        /* tx power management */
 883             IEEE80211_C_SHPREAMBLE |    /* short preamble supported */
 884             IEEE80211_C_SHSLOT |        /* short slot time supported */
 885             IEEE80211_C_BGSCAN |        /* capable of bg scanning */
 886             IEEE80211_C_WPA;            /* 802.11i */
 887
 888         /* XXX TODO: setup regdomain if URTW_EPROM_CHANPLAN_BY_HW bit is set.*/
 889
 890         urtw_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
 891             ic->ic_channels);
 892
 893         ieee80211_ifattach(ic);
 894         ic->ic_raw_xmit = urtw_raw_xmit;
 895         ic->ic_scan_start = urtw_scan_start;
 896         ic->ic_scan_end = urtw_scan_end;
 897         ic->ic_getradiocaps = urtw_getradiocaps;
 898         ic->ic_set_channel = urtw_set_channel;
 899         ic->ic_updateslot = urtw_updateslot;
 900         ic->ic_vap_create = urtw_vap_create;
 901         ic->ic_vap_delete = urtw_vap_delete;
 902         ic->ic_update_promisc = urtw_update_promisc;
 903         ic->ic_update_mcast = urtw_update_mcast;
 904         ic->ic_parent = urtw_parent;
 905         ic->ic_transmit = urtw_transmit;
 906
 907         ieee80211_radiotap_attach(ic,
 908             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
 909             URTW_TX_RADIOTAP_PRESENT,
 910             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
 911             URTW_RX_RADIOTAP_PRESENT);
 912
 913         urtw_sysctl_node(sc);
 914
 915         if (bootverbose)
 916                 ieee80211_announce(ic);
 917         return (0);
 918
 919 fail:
 920         URTW_UNLOCK(sc);
 921         usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ?
 922             URTW_8187B_N_XFERS : URTW_8187L_N_XFERS);
 923 fail0:
 924         return (ret);
 925 }
 926
 927 static int
 928 urtw_detach(device_t dev)
 929 {
 930         struct urtw_softc *sc = device_get_softc(dev);
 931         struct ieee80211com *ic = &sc->sc_ic;
 932         unsigned int x;
 933         unsigned int n_xfers;
 934
 935         /* Prevent further ioctls */
 936         URTW_LOCK(sc);
 937         sc->sc_flags |= URTW_DETACHED;
 938         urtw_stop(sc);
 939         URTW_UNLOCK(sc);
 940
 941         ieee80211_draintask(ic, &sc->sc_updateslot_task);
 942         ieee80211_draintask(ic, &sc->sc_led_task);
 943
 944         usb_callout_drain(&sc->sc_led_ch);
 945         callout_drain(&sc->sc_watchdog_ch);
 946
 947         n_xfers = (sc->sc_flags & URTW_RTL8187B) ?
 948             URTW_8187B_N_XFERS : URTW_8187L_N_XFERS;
 949
 950         /* prevent further allocations from RX/TX data lists */
 951         URTW_LOCK(sc);
 952         STAILQ_INIT(&sc->sc_tx_active);
 953         STAILQ_INIT(&sc->sc_tx_inactive);
 954         STAILQ_INIT(&sc->sc_tx_pending);
 955
 956         STAILQ_INIT(&sc->sc_rx_active);
 957         STAILQ_INIT(&sc->sc_rx_inactive);
 958         URTW_UNLOCK(sc);
 959
 960         /* drain USB transfers */
 961         for (x = 0; x != n_xfers; x++)
 962                 usbd_transfer_drain(sc->sc_xfer[x]);
 963
 964         /* free data buffers */
 965         URTW_LOCK(sc);
 966         urtw_free_tx_data_list(sc);
 967         urtw_free_rx_data_list(sc);
 968         URTW_UNLOCK(sc);
 969
 970         /* free USB transfers and some data buffers */
 971         usbd_transfer_unsetup(sc->sc_xfer, n_xfers);
 972
 973         ieee80211_ifdetach(ic);
 974         mbufq_drain(&sc->sc_snd);
 975         mtx_destroy(&sc->sc_mtx);
 976         return (0);
 977 }
 978
 979 static void
 980 urtw_free_tx_data_list(struct urtw_softc *sc)
 981 {
 982         urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0);
 983 }
 984
 985 static void
 986 urtw_free_rx_data_list(struct urtw_softc *sc)
 987 {
 988         urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1);
 989 }
 990
 991 static void
 992 urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata,
 993     int fillmbuf)
 994 {
 995         int i;
 996
 997         for (i = 0; i < ndata; i++) {
 998                 struct urtw_data *dp = &data[i];
 999
1000                 if (fillmbuf == 1) {
1001                         if (dp->m != NULL) {
1002                                 m_freem(dp->m);
1003                                 dp->m = NULL;
1004                                 dp->buf = NULL;
1005                         }
1006                 } else {
1007                         dp->buf = NULL;
1008                 }
1009                 if (dp->ni != NULL) {
1010                         ieee80211_free_node(dp->ni);
1011                         dp->ni = NULL;
1012                 }
1013         }
1014 }
1015
1016 static struct ieee80211vap *
1017 urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1018     enum ieee80211_opmode opmode, int flags,
1019     const uint8_t bssid[IEEE80211_ADDR_LEN],
1020     const uint8_t mac[IEEE80211_ADDR_LEN])
1021 {
1022         struct urtw_vap *uvp;
1023         struct ieee80211vap *vap;
1024
1025         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
1026                 return (NULL);
1027         uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO);
1028         vap = &uvp->vap;
1029         /* enable s/w bmiss handling for sta mode */
1030
1031         if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
1032             flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) {
1033                 /* out of memory */
1034                 free(uvp, M_80211_VAP);
1035                 return (NULL);
1036         }
1037
1038         /* override state transition machine */
1039         uvp->newstate = vap->iv_newstate;
1040         vap->iv_newstate = urtw_newstate;
1041
1042         /* complete setup */
1043         ieee80211_vap_attach(vap, ieee80211_media_change,
1044             ieee80211_media_status, mac);
1045         ic->ic_opmode = opmode;
1046         return (vap);
1047 }
1048
1049 static void
1050 urtw_vap_delete(struct ieee80211vap *vap)
1051 {
1052         struct urtw_vap *uvp = URTW_VAP(vap);
1053
1054         ieee80211_vap_detach(vap);
1055         free(uvp, M_80211_VAP);
1056 }
1057
1058 static void
1059 urtw_init(struct urtw_softc *sc)
1060 {
1061         usb_error_t error;
1062         int ret;
1063
1064         URTW_ASSERT_LOCKED(sc);
1065
1066         if (sc->sc_flags & URTW_RUNNING)
1067                 urtw_stop(sc);
1068
1069         error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) :
1070             urtw_adapter_start(sc);
1071         if (error != 0)
1072                 goto fail;
1073
1074         /* reset softc variables  */
1075         sc->sc_txtimer = 0;
1076
1077         if (!(sc->sc_flags & URTW_INIT_ONCE)) {
1078                 ret = urtw_alloc_rx_data_list(sc);
1079                 if (ret != 0)
1080                         goto fail;
1081                 ret = urtw_alloc_tx_data_list(sc);
1082                 if (ret != 0)
1083                         goto fail;
1084                 sc->sc_flags |= URTW_INIT_ONCE;
1085         }
1086
1087         error = urtw_rx_enable(sc);
1088         if (error != 0)
1089                 goto fail;
1090         error = urtw_tx_enable(sc);
1091         if (error != 0)
1092                 goto fail;
1093
1094         if (sc->sc_flags & URTW_RTL8187B)
1095                 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]);
1096
1097         sc->sc_flags |= URTW_RUNNING;
1098
1099         callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1100 fail:
1101         return;
1102 }
1103
1104 static usb_error_t
1105 urtw_adapter_start_b(struct urtw_softc *sc)
1106 {
1107         uint8_t data8;
1108         usb_error_t error;
1109
1110         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1111         if (error)
1112                 goto fail;
1113
1114         urtw_read8_m(sc, URTW_CONFIG3, &data8);
1115         urtw_write8_m(sc, URTW_CONFIG3,
1116             data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT);
1117         urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON);
1118         urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON);
1119         urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON);
1120
1121         urtw_write8_m(sc, 0x61, 0x10);
1122         urtw_read8_m(sc, 0x62, &data8);
1123         urtw_write8_m(sc, 0x62, data8 & ~(1 << 5));
1124         urtw_write8_m(sc, 0x62, data8 | (1 << 5));
1125
1126         urtw_read8_m(sc, URTW_CONFIG3, &data8);
1127         data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE;
1128         urtw_write8_m(sc, URTW_CONFIG3, data8);
1129
1130         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1131         if (error)
1132                 goto fail;
1133
1134         error = urtw_8187b_cmd_reset(sc);
1135         if (error)
1136                 goto fail;
1137
1138         error = sc->sc_rf_init(sc);
1139         if (error != 0)
1140                 goto fail;
1141         urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1142
1143         /* fix RTL8187B RX stall */
1144         error = urtw_intr_enable(sc);
1145         if (error)
1146                 goto fail;
1147
1148         error = urtw_write8e(sc, 0x41, 0xf4);
1149         if (error)
1150                 goto fail;
1151         error = urtw_write8e(sc, 0x40, 0x00);
1152         if (error)
1153                 goto fail;
1154         error = urtw_write8e(sc, 0x42, 0x00);
1155         if (error)
1156                 goto fail;
1157         error = urtw_write8e(sc, 0x42, 0x01);
1158         if (error)
1159                 goto fail;
1160         error = urtw_write8e(sc, 0x40, 0x0f);
1161         if (error)
1162                 goto fail;
1163         error = urtw_write8e(sc, 0x42, 0x00);
1164         if (error)
1165                 goto fail;
1166         error = urtw_write8e(sc, 0x42, 0x01);
1167         if (error)
1168                 goto fail;
1169
1170         urtw_read8_m(sc, 0xdb, &data8);
1171         urtw_write8_m(sc, 0xdb, data8 | (1 << 2));
1172         urtw_write16_m(sc, 0x372, 0x59fa);
1173         urtw_write16_m(sc, 0x374, 0x59d2);
1174         urtw_write16_m(sc, 0x376, 0x59d2);
1175         urtw_write16_m(sc, 0x378, 0x19fa);
1176         urtw_write16_m(sc, 0x37a, 0x19fa);
1177         urtw_write16_m(sc, 0x37c, 0x00d0);
1178         urtw_write8_m(sc, 0x61, 0);
1179
1180         urtw_write8_m(sc, 0x180, 0x0f);
1181         urtw_write8_m(sc, 0x183, 0x03);
1182         urtw_write8_m(sc, 0xda, 0x10);
1183         urtw_write8_m(sc, 0x24d, 0x08);
1184         urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b);
1185
1186         urtw_write16_m(sc, 0x1ec, 0x800);       /* RX MAX SIZE */
1187 fail:
1188         return (error);
1189 }
1190
1191 static usb_error_t
1192 urtw_set_macaddr(struct urtw_softc *sc, const uint8_t *macaddr)
1193 {
1194         usb_error_t error;
1195
1196         urtw_write32_m(sc, URTW_MAC0, ((const uint32_t *)macaddr)[0]);
1197         urtw_write16_m(sc, URTW_MAC4, ((const uint32_t *)macaddr)[1] & 0xffff);
1198
1199 fail:
1200         return (error);
1201 }
1202
1203 static usb_error_t
1204 urtw_adapter_start(struct urtw_softc *sc)
1205 {
1206         struct ieee80211com *ic = &sc->sc_ic;
1207         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1208         const uint8_t *macaddr;
1209         usb_error_t error;
1210
1211         error = urtw_reset(sc);
1212         if (error)
1213                 goto fail;
1214
1215         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0);
1216         urtw_write8_m(sc, URTW_GPIO, 0);
1217
1218         /* for led  */
1219         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1220         error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON);
1221         if (error != 0)
1222                 goto fail;
1223
1224         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1225         if (error)
1226                 goto fail;
1227         /* applying MAC address again.  */
1228         macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
1229         urtw_set_macaddr(sc, macaddr);
1230         if (error)
1231                 goto fail;
1232
1233         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1234         if (error)
1235                 goto fail;
1236
1237         error = urtw_update_msr(sc);
1238         if (error)
1239                 goto fail;
1240
1241         urtw_write32_m(sc, URTW_INT_TIMEOUT, 0);
1242         urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
1243         urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1);
1244         error = urtw_set_rate(sc);
1245         if (error != 0)
1246                 goto fail;
1247
1248         error = sc->sc_rf_init(sc);
1249         if (error != 0)
1250                 goto fail;
1251         if (sc->sc_rf_set_sens != NULL)
1252                 sc->sc_rf_set_sens(sc, sc->sc_sens);
1253
1254         /* XXX correct? to call write16  */
1255         urtw_write16_m(sc, URTW_PSR, 1);
1256         urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10);
1257         urtw_write8_m(sc, URTW_TALLY_SEL, 0x80);
1258         urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60);
1259         /* XXX correct? to call write16  */
1260         urtw_write16_m(sc, URTW_PSR, 0);
1261         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1262
1263         error = urtw_intr_enable(sc);
1264         if (error != 0)
1265                 goto fail;
1266
1267 fail:
1268         return (error);
1269 }
1270
1271 static usb_error_t
1272 urtw_set_mode(struct urtw_softc *sc, uint32_t mode)
1273 {
1274         uint8_t data;
1275         usb_error_t error;
1276
1277         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
1278         data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT);
1279         data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK);
1280         urtw_write8_m(sc, URTW_EPROM_CMD, data);
1281 fail:
1282         return (error);
1283 }
1284
1285 static usb_error_t
1286 urtw_8187b_cmd_reset(struct urtw_softc *sc)
1287 {
1288         int i;
1289         uint8_t data8;
1290         usb_error_t error;
1291
1292         /* XXX the code can be duplicate with urtw_reset().  */
1293         urtw_read8_m(sc, URTW_CMD, &data8);
1294         data8 = (data8 & 0x2) | URTW_CMD_RST;
1295         urtw_write8_m(sc, URTW_CMD, data8);
1296
1297         for (i = 0; i < 20; i++) {
1298                 usb_pause_mtx(&sc->sc_mtx, 2);
1299                 urtw_read8_m(sc, URTW_CMD, &data8);
1300                 if (!(data8 & URTW_CMD_RST))
1301                         break;
1302         }
1303         if (i >= 20) {
1304                 device_printf(sc->sc_dev, "reset timeout\n");
1305                 goto fail;
1306         }
1307 fail:
1308         return (error);
1309 }
1310
1311 static usb_error_t
1312 urtw_do_request(struct urtw_softc *sc,
1313     struct usb_device_request *req, void *data)
1314 {
1315         usb_error_t err;
1316         int ntries = 10;
1317
1318         URTW_ASSERT_LOCKED(sc);
1319
1320         while (ntries--) {
1321                 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
1322                     req, data, 0, NULL, 250 /* ms */);
1323                 if (err == 0)
1324                         break;
1325
1326                 DPRINTF(sc, URTW_DEBUG_INIT,
1327                     "Control request failed, %s (retrying)\n",
1328                     usbd_errstr(err));
1329                 usb_pause_mtx(&sc->sc_mtx, hz / 100);
1330         }
1331         return (err);
1332 }
1333
1334 static void
1335 urtw_stop(struct urtw_softc *sc)
1336 {
1337         uint8_t data8;
1338         usb_error_t error;
1339
1340         URTW_ASSERT_LOCKED(sc);
1341
1342         sc->sc_flags &= ~URTW_RUNNING;
1343
1344         error = urtw_intr_disable(sc);
1345         if (error)
1346                 goto fail;
1347         urtw_read8_m(sc, URTW_CMD, &data8);
1348         data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1349         urtw_write8_m(sc, URTW_CMD, data8);
1350
1351         error = sc->sc_rf_stop(sc);
1352         if (error != 0)
1353                 goto fail;
1354
1355         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1356         if (error)
1357                 goto fail;
1358         urtw_read8_m(sc, URTW_CONFIG4, &data8);
1359         urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF);
1360         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1361         if (error)
1362                 goto fail;
1363 fail:
1364         if (error)
1365                 device_printf(sc->sc_dev, "failed to stop (%s)\n",
1366                     usbd_errstr(error));
1367
1368         usb_callout_stop(&sc->sc_led_ch);
1369         callout_stop(&sc->sc_watchdog_ch);
1370
1371         urtw_abort_xfers(sc);
1372 }
1373
1374 static void
1375 urtw_abort_xfers(struct urtw_softc *sc)
1376 {
1377         int i, max;
1378
1379         URTW_ASSERT_LOCKED(sc);
1380
1381         max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS :
1382             URTW_8187L_N_XFERS;
1383
1384         /* abort any pending transfers */
1385         for (i = 0; i < max; i++)
1386                 usbd_transfer_stop(sc->sc_xfer[i]);
1387 }
1388
1389 static void
1390 urtw_parent(struct ieee80211com *ic)
1391 {
1392         struct urtw_softc *sc = ic->ic_softc;
1393         int startall = 0;
1394
1395         URTW_LOCK(sc);
1396         if (sc->sc_flags & URTW_DETACHED) {
1397                 URTW_UNLOCK(sc);
1398                 return;
1399         }
1400
1401         if (ic->ic_nrunning > 0) {
1402                 if (sc->sc_flags & URTW_RUNNING) {
1403                         if (ic->ic_promisc > 0 || ic->ic_allmulti > 0)
1404                                 urtw_set_multi(sc);
1405                 } else {
1406                         urtw_init(sc);
1407                         startall = 1;
1408                 }
1409         } else if (sc->sc_flags & URTW_RUNNING)
1410                 urtw_stop(sc);
1411         URTW_UNLOCK(sc);
1412         if (startall)
1413                 ieee80211_start_all(ic);
1414 }
1415
1416 static int
1417 urtw_transmit(struct ieee80211com *ic, struct mbuf *m)
1418 {
1419         struct urtw_softc *sc = ic->ic_softc;
1420         int error;
1421
1422         URTW_LOCK(sc);
1423         if ((sc->sc_flags & URTW_RUNNING) == 0) {
1424                 URTW_UNLOCK(sc);
1425                 return (ENXIO);
1426         }
1427         error = mbufq_enqueue(&sc->sc_snd, m);
1428         if (error) {
1429                 URTW_UNLOCK(sc);
1430                 return (error);
1431         }
1432         urtw_start(sc);
1433         URTW_UNLOCK(sc);
1434
1435         return (0);
1436 }
1437
1438 static void
1439 urtw_start(struct urtw_softc *sc)
1440 {
1441         struct urtw_data *bf;
1442         struct ieee80211_node *ni;
1443         struct mbuf *m;
1444
1445         URTW_ASSERT_LOCKED(sc);
1446
1447         if ((sc->sc_flags & URTW_RUNNING) == 0)
1448                 return;
1449
1450         while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1451                 bf = urtw_getbuf(sc);
1452                 if (bf == NULL) {
1453                         mbufq_prepend(&sc->sc_snd, m);
1454                         break;
1455                 }
1456
1457                 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1458                 m->m_pkthdr.rcvif = NULL;
1459
1460                 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) {
1461                         if_inc_counter(ni->ni_vap->iv_ifp,
1462                             IFCOUNTER_OERRORS, 1);
1463                         STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1464                         ieee80211_free_node(ni);
1465                         break;
1466                 }
1467
1468                 sc->sc_txtimer = 5;
1469                 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1470         }
1471 }
1472
1473 static int
1474 urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[],
1475     int ndata, int maxsz, void *dma_buf)
1476 {
1477         int i, error;
1478
1479         for (i = 0; i < ndata; i++) {
1480                 struct urtw_data *dp = &data[i];
1481
1482                 dp->sc = sc;
1483                 if (dma_buf == NULL) {
1484                         dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1485                         if (dp->m == NULL) {
1486                                 device_printf(sc->sc_dev,
1487                                     "could not allocate rx mbuf\n");
1488                                 error = ENOMEM;
1489                                 goto fail;
1490                         }
1491                         dp->buf = mtod(dp->m, uint8_t *);
1492                 } else {
1493                         dp->m = NULL;
1494                         dp->buf = ((uint8_t *)dma_buf) +
1495                             (i * maxsz);
1496                 }
1497                 dp->ni = NULL;
1498         }
1499         return (0);
1500
1501 fail:   urtw_free_data_list(sc, data, ndata, 1);
1502         return (error);
1503 }
1504
1505 static int
1506 urtw_alloc_rx_data_list(struct urtw_softc *sc)
1507 {
1508         int error, i;
1509
1510         error = urtw_alloc_data_list(sc,
1511             sc->sc_rx, URTW_RX_DATA_LIST_COUNT,
1512             MCLBYTES, NULL /* mbufs */);
1513         if (error != 0)
1514                 return (error);
1515
1516         STAILQ_INIT(&sc->sc_rx_active);
1517         STAILQ_INIT(&sc->sc_rx_inactive);
1518
1519         for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++)
1520                 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1521
1522         return (0);
1523 }
1524
1525 static int
1526 urtw_alloc_tx_data_list(struct urtw_softc *sc)
1527 {
1528         int error, i;
1529
1530         error = urtw_alloc_data_list(sc,
1531             sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE,
1532             sc->sc_tx_dma_buf /* no mbufs */);
1533         if (error != 0)
1534                 return (error);
1535
1536         STAILQ_INIT(&sc->sc_tx_active);
1537         STAILQ_INIT(&sc->sc_tx_inactive);
1538         STAILQ_INIT(&sc->sc_tx_pending);
1539
1540         for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++)
1541                 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i],
1542                     next);
1543
1544         return (0);
1545 }
1546
1547 static int
1548 urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1549     const struct ieee80211_bpf_params *params)
1550 {
1551         struct ieee80211com *ic = ni->ni_ic;
1552         struct urtw_softc *sc = ic->ic_softc;
1553         struct urtw_data *bf;
1554
1555         /* prevent management frames from being sent if we're not ready */
1556         if (!(sc->sc_flags & URTW_RUNNING)) {
1557                 m_freem(m);
1558                 return ENETDOWN;
1559         }
1560         URTW_LOCK(sc);
1561         bf = urtw_getbuf(sc);
1562         if (bf == NULL) {
1563                 m_freem(m);
1564                 URTW_UNLOCK(sc);
1565                 return (ENOBUFS);               /* XXX */
1566         }
1567
1568         if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) {
1569                 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1570                 URTW_UNLOCK(sc);
1571                 return (EIO);
1572         }
1573         URTW_UNLOCK(sc);
1574
1575         sc->sc_txtimer = 5;
1576         return (0);
1577 }
1578
1579 static void
1580 urtw_scan_start(struct ieee80211com *ic)
1581 {
1582
1583         /* XXX do nothing?  */
1584 }
1585
1586 static void
1587 urtw_scan_end(struct ieee80211com *ic)
1588 {
1589
1590         /* XXX do nothing?  */
1591 }
1592
1593 static void
1594 urtw_getradiocaps(struct ieee80211com *ic,
1595     int maxchans, int *nchans, struct ieee80211_channel chans[])
1596 {
1597         uint8_t bands[IEEE80211_MODE_BYTES];
1598
1599         memset(bands, 0, sizeof(bands));
1600         setbit(bands, IEEE80211_MODE_11B);
1601         setbit(bands, IEEE80211_MODE_11G);
1602         ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0);
1603 }
1604
1605 static void
1606 urtw_set_channel(struct ieee80211com *ic)
1607 {
1608         struct urtw_softc *sc = ic->ic_softc;
1609         uint32_t data, orig;
1610         usb_error_t error;
1611
1612         /*
1613          * if the user set a channel explicitly using ifconfig(8) this function
1614          * can be called earlier than we're expected that in some cases the
1615          * initialization would be failed if setting a channel is called before
1616          * the init have done.
1617          */
1618         if (!(sc->sc_flags & URTW_RUNNING))
1619                 return;
1620
1621         if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan)
1622                 return;
1623
1624         URTW_LOCK(sc);
1625
1626         /*
1627          * during changing th channel we need to temporarily be disable
1628          * TX.
1629          */
1630         urtw_read32_m(sc, URTW_TX_CONF, &orig);
1631         data = orig & ~URTW_TX_LOOPBACK_MASK;
1632         urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC);
1633
1634         error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan));
1635         if (error != 0)
1636                 goto fail;
1637         usb_pause_mtx(&sc->sc_mtx, 10);
1638         urtw_write32_m(sc, URTW_TX_CONF, orig);
1639
1640         urtw_write16_m(sc, URTW_ATIM_WND, 2);
1641         urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1642         urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
1643         urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1644
1645 fail:
1646         URTW_UNLOCK(sc);
1647
1648         sc->sc_curchan = ic->ic_curchan;
1649
1650         if (error != 0)
1651                 device_printf(sc->sc_dev, "could not change the channel\n");
1652 }
1653
1654 static void
1655 urtw_update_promisc(struct ieee80211com *ic)
1656 {
1657         struct urtw_softc *sc = ic->ic_softc;
1658
1659         URTW_LOCK(sc);
1660         if (sc->sc_flags & URTW_RUNNING)
1661                 urtw_rx_setconf(sc);
1662         URTW_UNLOCK(sc);
1663 }
1664
1665 static void
1666 urtw_update_mcast(struct ieee80211com *ic)
1667 {
1668
1669         /* XXX do nothing?  */
1670 }
1671
1672 static int
1673 urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0,
1674     struct urtw_data *data, int prior)
1675 {
1676         struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
1677         struct ieee80211_key *k;
1678         const struct ieee80211_txparam *tp = ni->ni_txparms;
1679         struct ieee80211com *ic = &sc->sc_ic;
1680         struct ieee80211vap *vap = ni->ni_vap;
1681         struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = {
1682                 sc->sc_xfer[URTW_8187B_BULK_TX_BE],
1683                 sc->sc_xfer[URTW_8187B_BULK_TX_BK],
1684                 sc->sc_xfer[URTW_8187B_BULK_TX_VI],
1685                 sc->sc_xfer[URTW_8187B_BULK_TX_VO]
1686         };
1687         struct usb_xfer *xfer;
1688         int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, type,
1689             pkttime = 0, txdur = 0, isshort = 0, xferlen, ismcast;
1690         uint16_t acktime, rtstime, ctstime;
1691         uint32_t flags;
1692         usb_error_t error;
1693
1694         URTW_ASSERT_LOCKED(sc);
1695
1696         ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1697         type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1698
1699         /*
1700          * Software crypto.
1701          */
1702         if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1703                 k = ieee80211_crypto_encap(ni, m0);
1704                 if (k == NULL) {
1705                         device_printf(sc->sc_dev,
1706                             "ieee80211_crypto_encap returns NULL.\n");
1707                         /* XXX we don't expect the fragmented frames  */
1708                         m_freem(m0);
1709                         return (ENOBUFS);
1710                 }
1711
1712                 /* in case packet header moved, reset pointer */
1713                 wh = mtod(m0, struct ieee80211_frame *);
1714         }
1715
1716         if (ieee80211_radiotap_active_vap(vap)) {
1717                 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap;
1718
1719                 tap->wt_flags = 0;
1720                 ieee80211_radiotap_tx(vap, m0);
1721         }
1722
1723         if (type == IEEE80211_FC0_TYPE_MGT ||
1724             type == IEEE80211_FC0_TYPE_CTL ||
1725             (m0->m_flags & M_EAPOL) != 0) {
1726                 rate = tp->mgmtrate;
1727         } else {
1728                 /* for data frames */
1729                 if (ismcast)
1730                         rate = tp->mcastrate;
1731                 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1732                         rate = tp->ucastrate;
1733                 else
1734                         rate = urtw_rtl2rate(sc->sc_currate);
1735         }
1736
1737         sc->sc_stats.txrates[sc->sc_currate]++;
1738
1739         if (ismcast)
1740                 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1741                     IEEE80211_CRC_LEN, rate, 0, 0);
1742         else {
1743                 acktime = urtw_compute_txtime(14, 2,0, 0);
1744                 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) {
1745                         rtsenable = 1;
1746                         ctsenable = 0;
1747                         rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0);
1748                         ctstime = urtw_compute_txtime(14, 2, 0, 0);
1749                         pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1750                             IEEE80211_CRC_LEN, rate, 0, isshort);
1751                         rtsdur = ctstime + pkttime + acktime +
1752                             3 * URTW_ASIFS_TIME;
1753                         txdur = rtstime + rtsdur;
1754                 } else {
1755                         rtsenable = ctsenable = rtsdur = 0;
1756                         pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1757                             IEEE80211_CRC_LEN, rate, 0, isshort);
1758                         txdur = pkttime + URTW_ASIFS_TIME + acktime;
1759                 }
1760
1761                 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1762                         dur = urtw_compute_txtime(m0->m_pkthdr.len +
1763                             IEEE80211_CRC_LEN, rate, 0, isshort) +
1764                             3 * URTW_ASIFS_TIME +
1765                             2 * acktime;
1766                 else
1767                         dur = URTW_ASIFS_TIME + acktime;
1768         }
1769         USETW(wh->i_dur, dur);
1770
1771         xferlen = m0->m_pkthdr.len;
1772         xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3);
1773         if ((0 == xferlen % 64) || (0 == xferlen % 512))
1774                 xferlen += 1;
1775
1776         memset(data->buf, 0, URTW_TX_MAXSIZE);
1777         flags = m0->m_pkthdr.len & 0xfff;
1778         flags |= URTW_TX_FLAG_NO_ENC;
1779         if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1780             (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) &&
1781             (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) &&
1782             (sc->sc_currate != 0))
1783                 flags |= URTW_TX_FLAG_SPLCP;
1784         if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1785                 flags |= URTW_TX_FLAG_MOREFRAG;
1786
1787         flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT;
1788
1789         if (sc->sc_flags & URTW_RTL8187B) {
1790                 struct urtw_8187b_txhdr *tx;
1791
1792                 tx = (struct urtw_8187b_txhdr *)data->buf;
1793                 if (ctsenable)
1794                         flags |= URTW_TX_FLAG_CTS;
1795                 if (rtsenable) {
1796                         flags |= URTW_TX_FLAG_RTS;
1797                         flags |= URTW_RIDX_CCK5 << URTW_TX_FLAG_RTSRATE_SHIFT;
1798                         tx->rtsdur = rtsdur;
1799                 }
1800                 tx->flag = htole32(flags);
1801                 tx->txdur = txdur;
1802                 if (type == IEEE80211_FC0_TYPE_MGT &&
1803                     (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1804                     IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1805                         tx->retry = 1;
1806                 else
1807                         tx->retry = URTW_TX_MAXRETRY;
1808                 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1809         } else {
1810                 struct urtw_8187l_txhdr *tx;
1811
1812                 tx = (struct urtw_8187l_txhdr *)data->buf;
1813                 if (rtsenable) {
1814                         flags |= URTW_TX_FLAG_RTS;
1815                         tx->rtsdur = rtsdur;
1816                 }
1817                 flags |= URTW_RIDX_CCK5 << URTW_TX_FLAG_RTSRATE_SHIFT;
1818                 tx->flag = htole32(flags);
1819                 tx->retry = 3;          /* CW minimum  */
1820                 tx->retry |= 7 << 4;    /* CW maximum  */
1821                 tx->retry |= URTW_TX_MAXRETRY << 8;     /* retry limitation  */
1822                 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1823         }
1824
1825         data->buflen = xferlen;
1826         data->ni = ni;
1827         data->m = m0;
1828
1829         if (sc->sc_flags & URTW_RTL8187B) {
1830                 switch (type) {
1831                 case IEEE80211_FC0_TYPE_CTL:
1832                 case IEEE80211_FC0_TYPE_MGT:
1833                         xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12];
1834                         break;
1835                 default:
1836                         KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX,
1837                             ("unsupported WME pipe %d", M_WME_GETAC(m0)));
1838                         xfer = rtl8187b_pipes[M_WME_GETAC(m0)];
1839                         break;
1840                 }
1841         } else
1842                 xfer = (prior == URTW_PRIORITY_LOW) ?
1843                     sc->sc_xfer[URTW_8187L_BULK_TX_LOW] :
1844                     sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL];
1845
1846         STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next);
1847         usbd_transfer_start(xfer);
1848
1849         error = urtw_led_ctl(sc, URTW_LED_CTL_TX);
1850         if (error != 0)
1851                 device_printf(sc->sc_dev, "could not control LED (%d)\n",
1852                     error);
1853         return (0);
1854 }
1855
1856 static int
1857 urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1858 {
1859         struct ieee80211com *ic = vap->iv_ic;
1860         struct urtw_softc *sc = ic->ic_softc;
1861         struct urtw_vap *uvp = URTW_VAP(vap);
1862         struct ieee80211_node *ni;
1863         usb_error_t error = 0;
1864
1865         DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1866             ieee80211_state_name[vap->iv_state],
1867             ieee80211_state_name[nstate]);
1868
1869         sc->sc_state = nstate;
1870
1871         IEEE80211_UNLOCK(ic);
1872         URTW_LOCK(sc);
1873         usb_callout_stop(&sc->sc_led_ch);
1874         callout_stop(&sc->sc_watchdog_ch);
1875
1876         switch (nstate) {
1877         case IEEE80211_S_INIT:
1878         case IEEE80211_S_SCAN:
1879         case IEEE80211_S_AUTH:
1880         case IEEE80211_S_ASSOC:
1881                 break;
1882         case IEEE80211_S_RUN:
1883                 ni = ieee80211_ref_node(vap->iv_bss);
1884                 /* setting bssid.  */
1885                 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]);
1886                 urtw_write16_m(sc, URTW_BSSID + 4,
1887                     ((uint16_t *)ni->ni_bssid)[2]);
1888                 urtw_update_msr(sc);
1889                 /* XXX maybe the below would be incorrect.  */
1890                 urtw_write16_m(sc, URTW_ATIM_WND, 2);
1891                 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1892                 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64);
1893                 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1894                 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK);
1895                 if (error != 0)
1896                         device_printf(sc->sc_dev,
1897                             "could not control LED (%d)\n", error);
1898                 ieee80211_free_node(ni);
1899                 break;
1900         default:
1901                 break;
1902         }
1903 fail:
1904         URTW_UNLOCK(sc);
1905         IEEE80211_LOCK(ic);
1906         return (uvp->newstate(vap, nstate, arg));
1907 }
1908
1909 static void
1910 urtw_watchdog(void *arg)
1911 {
1912         struct urtw_softc *sc = arg;
1913         struct ieee80211com *ic = &sc->sc_ic;
1914
1915         if (sc->sc_txtimer > 0) {
1916                 if (--sc->sc_txtimer == 0) {
1917                         device_printf(sc->sc_dev, "device timeout\n");
1918                         counter_u64_add(ic->ic_oerrors, 1);
1919                         ieee80211_restart_all(ic);
1920                         return;
1921                 }
1922                 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1923         }
1924 }
1925
1926 static void
1927 urtw_set_multi(void *arg)
1928 {
1929         /* XXX don't know how to set a device.  Lack of docs. */
1930 }
1931
1932 static usb_error_t
1933 urtw_set_rate(struct urtw_softc *sc)
1934 {
1935         int i, basic_rate, min_rr_rate, max_rr_rate;
1936         uint16_t data;
1937         usb_error_t error;
1938
1939         basic_rate = URTW_RIDX_OFDM24;
1940         min_rr_rate = URTW_RIDX_OFDM6;
1941         max_rr_rate = URTW_RIDX_OFDM24;
1942
1943         urtw_write8_m(sc, URTW_RESP_RATE,
1944             max_rr_rate << URTW_RESP_MAX_RATE_SHIFT |
1945             min_rr_rate << URTW_RESP_MIN_RATE_SHIFT);
1946
1947         urtw_read16_m(sc, URTW_BRSR, &data);
1948         data &= ~URTW_BRSR_MBR_8185;
1949
1950         for (i = 0; i <= basic_rate; i++)
1951                 data |= (1 << i);
1952
1953         urtw_write16_m(sc, URTW_BRSR, data);
1954 fail:
1955         return (error);
1956 }
1957
1958 static uint16_t
1959 urtw_rtl2rate(uint32_t rate)
1960 {
1961         unsigned int i;
1962
1963         for (i = 0; i < nitems(urtw_ratetable); i++) {
1964                 if (rate == urtw_ratetable[i].val)
1965                         return urtw_ratetable[i].reg;
1966         }
1967
1968         return (0);
1969 }
1970
1971 static usb_error_t
1972 urtw_update_msr(struct urtw_softc *sc)
1973 {
1974         struct ieee80211com *ic = &sc->sc_ic;
1975         uint8_t data;
1976         usb_error_t error;
1977
1978         urtw_read8_m(sc, URTW_MSR, &data);
1979         data &= ~URTW_MSR_LINK_MASK;
1980
1981         if (sc->sc_state == IEEE80211_S_RUN) {
1982                 switch (ic->ic_opmode) {
1983                 case IEEE80211_M_STA:
1984                 case IEEE80211_M_MONITOR:
1985                         data |= URTW_MSR_LINK_STA;
1986                         if (sc->sc_flags & URTW_RTL8187B)
1987                                 data |= URTW_MSR_LINK_ENEDCA;
1988                         break;
1989                 case IEEE80211_M_IBSS:
1990                         data |= URTW_MSR_LINK_ADHOC;
1991                         break;
1992                 case IEEE80211_M_HOSTAP:
1993                         data |= URTW_MSR_LINK_HOSTAP;
1994                         break;
1995                 default:
1996                         DPRINTF(sc, URTW_DEBUG_STATE,
1997                             "unsupported operation mode 0x%x\n",
1998                             ic->ic_opmode);
1999                         error = USB_ERR_INVAL;
2000                         goto fail;
2001                 }
2002         } else
2003                 data |= URTW_MSR_LINK_NONE;
2004
2005         urtw_write8_m(sc, URTW_MSR, data);
2006 fail:
2007         return (error);
2008 }
2009
2010 static usb_error_t
2011 urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data)
2012 {
2013         struct usb_device_request req;
2014         usb_error_t error;
2015
2016         URTW_ASSERT_LOCKED(sc);
2017
2018         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2019         req.bRequest = URTW_8187_GETREGS_REQ;
2020         USETW(req.wValue, (val & 0xff) | 0xff00);
2021         USETW(req.wIndex, (val >> 8) & 0x3);
2022         USETW(req.wLength, sizeof(uint8_t));
2023
2024         error = urtw_do_request(sc, &req, data);
2025         return (error);
2026 }
2027
2028 static usb_error_t
2029 urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data)
2030 {
2031         struct usb_device_request req;
2032         usb_error_t error;
2033
2034         URTW_ASSERT_LOCKED(sc);
2035
2036         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2037         req.bRequest = URTW_8187_GETREGS_REQ;
2038         USETW(req.wValue, (val & 0xff) | 0xff00);
2039         USETW(req.wIndex, (val >> 8) & 0x3);
2040         USETW(req.wLength, sizeof(uint16_t));
2041
2042         error = urtw_do_request(sc, &req, data);
2043         return (error);
2044 }
2045
2046 static usb_error_t
2047 urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data)
2048 {
2049         struct usb_device_request req;
2050         usb_error_t error;
2051
2052         URTW_ASSERT_LOCKED(sc);
2053
2054         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2055         req.bRequest = URTW_8187_GETREGS_REQ;
2056         USETW(req.wValue, (val & 0xff) | 0xff00);
2057         USETW(req.wIndex, (val >> 8) & 0x3);
2058         USETW(req.wLength, sizeof(uint32_t));
2059
2060         error = urtw_do_request(sc, &req, data);
2061         return (error);
2062 }
2063
2064 static usb_error_t
2065 urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data)
2066 {
2067         struct usb_device_request req;
2068
2069         URTW_ASSERT_LOCKED(sc);
2070
2071         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2072         req.bRequest = URTW_8187_SETREGS_REQ;
2073         USETW(req.wValue, (val & 0xff) | 0xff00);
2074         USETW(req.wIndex, (val >> 8) & 0x3);
2075         USETW(req.wLength, sizeof(uint8_t));
2076
2077         return (urtw_do_request(sc, &req, &data));
2078 }
2079
2080 static usb_error_t
2081 urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data)
2082 {
2083         struct usb_device_request req;
2084
2085         URTW_ASSERT_LOCKED(sc);
2086
2087         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2088         req.bRequest = URTW_8187_SETREGS_REQ;
2089         USETW(req.wValue, (val & 0xff) | 0xff00);
2090         USETW(req.wIndex, (val >> 8) & 0x3);
2091         USETW(req.wLength, sizeof(uint16_t));
2092
2093         return (urtw_do_request(sc, &req, &data));
2094 }
2095
2096 static usb_error_t
2097 urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data)
2098 {
2099         struct usb_device_request req;
2100
2101         URTW_ASSERT_LOCKED(sc);
2102
2103         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2104         req.bRequest = URTW_8187_SETREGS_REQ;
2105         USETW(req.wValue, (val & 0xff) | 0xff00);
2106         USETW(req.wIndex, (val >> 8) & 0x3);
2107         USETW(req.wLength, sizeof(uint32_t));
2108
2109         return (urtw_do_request(sc, &req, &data));
2110 }
2111
2112 static usb_error_t
2113 urtw_get_macaddr(struct urtw_softc *sc)
2114 {
2115         struct ieee80211com *ic = &sc->sc_ic;
2116         uint32_t data;
2117         usb_error_t error;
2118
2119         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data);
2120         if (error != 0)
2121                 goto fail;
2122         ic->ic_macaddr[0] = data & 0xff;
2123         ic->ic_macaddr[1] = (data & 0xff00) >> 8;
2124         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data);
2125         if (error != 0)
2126                 goto fail;
2127         ic->ic_macaddr[2] = data & 0xff;
2128         ic->ic_macaddr[3] = (data & 0xff00) >> 8;
2129         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data);
2130         if (error != 0)
2131                 goto fail;
2132         ic->ic_macaddr[4] = data & 0xff;
2133         ic->ic_macaddr[5] = (data & 0xff00) >> 8;
2134 fail:
2135         return (error);
2136 }
2137
2138 static usb_error_t
2139 urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data)
2140 {
2141 #define URTW_READCMD_LEN                3
2142         int addrlen, i;
2143         int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 };
2144         usb_error_t error;
2145
2146         /* NB: make sure the buffer is initialized  */
2147         *data = 0;
2148
2149         /* enable EPROM programming */
2150         urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE);
2151         DELAY(URTW_EPROM_DELAY);
2152
2153         error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE);
2154         if (error != 0)
2155                 goto fail;
2156         error = urtw_eprom_ck(sc);
2157         if (error != 0)
2158                 goto fail;
2159         error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN);
2160         if (error != 0)
2161                 goto fail;
2162         if (sc->sc_epromtype == URTW_EEPROM_93C56) {
2163                 addrlen = 8;
2164                 addrstr[0] = addr & (1 << 7);
2165                 addrstr[1] = addr & (1 << 6);
2166                 addrstr[2] = addr & (1 << 5);
2167                 addrstr[3] = addr & (1 << 4);
2168                 addrstr[4] = addr & (1 << 3);
2169                 addrstr[5] = addr & (1 << 2);
2170                 addrstr[6] = addr & (1 << 1);
2171                 addrstr[7] = addr & (1 << 0);
2172         } else {
2173                 addrlen=6;
2174                 addrstr[0] = addr & (1 << 5);
2175                 addrstr[1] = addr & (1 << 4);
2176                 addrstr[2] = addr & (1 << 3);
2177                 addrstr[3] = addr & (1 << 2);
2178                 addrstr[4] = addr & (1 << 1);
2179                 addrstr[5] = addr & (1 << 0);
2180         }
2181         error = urtw_eprom_sendbits(sc, addrstr, addrlen);
2182         if (error != 0)
2183                 goto fail;
2184
2185         error = urtw_eprom_writebit(sc, 0);
2186         if (error != 0)
2187                 goto fail;
2188
2189         for (i = 0; i < 16; i++) {
2190                 error = urtw_eprom_ck(sc);
2191                 if (error != 0)
2192                         goto fail;
2193                 error = urtw_eprom_readbit(sc, &data16);
2194                 if (error != 0)
2195                         goto fail;
2196
2197                 (*data) |= (data16 << (15 - i));
2198         }
2199
2200         error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE);
2201         if (error != 0)
2202                 goto fail;
2203         error = urtw_eprom_ck(sc);
2204         if (error != 0)
2205                 goto fail;
2206
2207         /* now disable EPROM programming */
2208         urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE);
2209 fail:
2210         return (error);
2211 #undef URTW_READCMD_LEN
2212 }
2213
2214 static usb_error_t
2215 urtw_eprom_cs(struct urtw_softc *sc, int able)
2216 {
2217         uint8_t data;
2218         usb_error_t error;
2219
2220         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2221         if (able == URTW_EPROM_ENABLE)
2222                 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS);
2223         else
2224                 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS);
2225         DELAY(URTW_EPROM_DELAY);
2226 fail:
2227         return (error);
2228 }
2229
2230 static usb_error_t
2231 urtw_eprom_ck(struct urtw_softc *sc)
2232 {
2233         uint8_t data;
2234         usb_error_t error;
2235
2236         /* masking  */
2237         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2238         urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK);
2239         DELAY(URTW_EPROM_DELAY);
2240         /* unmasking  */
2241         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2242         urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK);
2243         DELAY(URTW_EPROM_DELAY);
2244 fail:
2245         return (error);
2246 }
2247
2248 static usb_error_t
2249 urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data)
2250 {
2251         uint8_t data8;
2252         usb_error_t error;
2253
2254         urtw_read8_m(sc, URTW_EPROM_CMD, &data8);
2255         *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0;
2256         DELAY(URTW_EPROM_DELAY);
2257
2258 fail:
2259         return (error);
2260 }
2261
2262 static usb_error_t
2263 urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit)
2264 {
2265         uint8_t data;
2266         usb_error_t error;
2267
2268         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2269         if (bit != 0)
2270                 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT);
2271         else
2272                 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT);
2273         DELAY(URTW_EPROM_DELAY);
2274 fail:
2275         return (error);
2276 }
2277
2278 static usb_error_t
2279 urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen)
2280 {
2281         int i = 0;
2282         usb_error_t error = 0;
2283
2284         for (i = 0; i < buflen; i++) {
2285                 error = urtw_eprom_writebit(sc, buf[i]);
2286                 if (error != 0)
2287                         goto fail;
2288                 error = urtw_eprom_ck(sc);
2289                 if (error != 0)
2290                         goto fail;
2291         }
2292 fail:
2293         return (error);
2294 }
2295
2296 static usb_error_t
2297 urtw_get_txpwr(struct urtw_softc *sc)
2298 {
2299         int i, j;
2300         uint32_t data;
2301         usb_error_t error;
2302
2303         error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data);
2304         if (error != 0)
2305                 goto fail;
2306         sc->sc_txpwr_cck_base = data & 0xf;
2307         sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf;
2308
2309         for (i = 1, j = 0; i < 6; i += 2, j++) {
2310                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data);
2311                 if (error != 0)
2312                         goto fail;
2313                 sc->sc_txpwr_cck[i] = data & 0xf;
2314                 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8;
2315                 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4;
2316                 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12;
2317         }
2318         for (i = 1, j = 0; i < 4; i += 2, j++) {
2319                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data);
2320                 if (error != 0)
2321                         goto fail;
2322                 sc->sc_txpwr_cck[i + 6] = data & 0xf;
2323                 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8;
2324                 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4;
2325                 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12;
2326         }
2327         if (sc->sc_flags & URTW_RTL8187B) {
2328                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data);
2329                 if (error != 0)
2330                         goto fail;
2331                 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf;
2332                 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4;
2333                 error = urtw_eprom_read32(sc, 0x0a, &data);
2334                 if (error != 0)
2335                         goto fail;
2336                 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf;
2337                 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4;
2338                 error = urtw_eprom_read32(sc, 0x1c, &data);
2339                 if (error != 0)
2340                         goto fail;
2341                 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf;
2342                 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8;
2343                 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4;
2344                 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12;
2345         } else {
2346                 for (i = 1, j = 0; i < 4; i += 2, j++) {
2347                         error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j,
2348                             &data);
2349                         if (error != 0)
2350                                 goto fail;
2351                         sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf;
2352                         sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8;
2353                         sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4;
2354                         sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12;
2355                 }
2356         }
2357 fail:
2358         return (error);
2359 }
2360
2361 static usb_error_t
2362 urtw_get_rfchip(struct urtw_softc *sc)
2363 {
2364         int ret;
2365         uint8_t data8;
2366         uint32_t data;
2367         usb_error_t error;
2368
2369         if (sc->sc_flags & URTW_RTL8187B) {
2370                 urtw_read8_m(sc, 0xe1, &data8);
2371                 switch (data8) {
2372                 case 0:
2373                         sc->sc_flags |= URTW_RTL8187B_REV_B;
2374                         break;
2375                 case 1:
2376                         sc->sc_flags |= URTW_RTL8187B_REV_D;
2377                         break;
2378                 case 2:
2379                         sc->sc_flags |= URTW_RTL8187B_REV_E;
2380                         break;
2381                 default:
2382                         device_printf(sc->sc_dev, "unknown type: %#x\n", data8);
2383                         sc->sc_flags |= URTW_RTL8187B_REV_B;
2384                         break;
2385                 }
2386         } else {
2387                 urtw_read32_m(sc, URTW_TX_CONF, &data);
2388                 switch (data & URTW_TX_HWMASK) {
2389                 case URTW_TX_R8187vD_B:
2390                         sc->sc_flags |= URTW_RTL8187B;
2391                         break;
2392                 case URTW_TX_R8187vD:
2393                         break;
2394                 default:
2395                         device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n",
2396                             data & URTW_TX_HWMASK);
2397                         break;
2398                 }
2399         }
2400
2401         error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data);
2402         if (error != 0)
2403                 goto fail;
2404         switch (data & 0xff) {
2405         case URTW_EPROM_RFCHIPID_RTL8225U:
2406                 error = urtw_8225_isv2(sc, &ret);
2407                 if (error != 0)
2408                         goto fail;
2409                 if (ret == 0) {
2410                         sc->sc_rf_init = urtw_8225_rf_init;
2411                         sc->sc_rf_set_sens = urtw_8225_rf_set_sens;
2412                         sc->sc_rf_set_chan = urtw_8225_rf_set_chan;
2413                         sc->sc_rf_stop = urtw_8225_rf_stop;
2414                 } else {
2415                         sc->sc_rf_init = urtw_8225v2_rf_init;
2416                         sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan;
2417                         sc->sc_rf_stop = urtw_8225_rf_stop;
2418                 }
2419                 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2420                 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2421                 break;
2422         case URTW_EPROM_RFCHIPID_RTL8225Z2:
2423                 sc->sc_rf_init = urtw_8225v2b_rf_init;
2424                 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan;
2425                 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2426                 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2427                 sc->sc_rf_stop = urtw_8225_rf_stop;
2428                 break;
2429         default:
2430                 DPRINTF(sc, URTW_DEBUG_STATE,
2431                     "unsupported RF chip %d\n", data & 0xff);
2432                 error = USB_ERR_INVAL;
2433                 goto fail;
2434         }
2435
2436         device_printf(sc->sc_dev, "%s rf %s hwrev %s\n",
2437             (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l",
2438             ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" :
2439             "rtl8225z2",
2440             (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" :
2441                 (data8 == 1) ? "d" : "e") : "none");
2442
2443 fail:
2444         return (error);
2445 }
2446
2447 static usb_error_t
2448 urtw_led_init(struct urtw_softc *sc)
2449 {
2450         uint32_t rev;
2451         usb_error_t error;
2452
2453         urtw_read8_m(sc, URTW_PSR, &sc->sc_psr);
2454         error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev);
2455         if (error != 0)
2456                 goto fail;
2457
2458         switch (rev & URTW_EPROM_CID_MASK) {
2459         case URTW_EPROM_CID_ALPHA0:
2460                 sc->sc_strategy = URTW_SW_LED_MODE1;
2461                 break;
2462         case URTW_EPROM_CID_SERCOMM_PS:
2463                 sc->sc_strategy = URTW_SW_LED_MODE3;
2464                 break;
2465         case URTW_EPROM_CID_HW_LED:
2466                 sc->sc_strategy = URTW_HW_LED;
2467                 break;
2468         case URTW_EPROM_CID_RSVD0:
2469         case URTW_EPROM_CID_RSVD1:
2470         default:
2471                 sc->sc_strategy = URTW_SW_LED_MODE0;
2472                 break;
2473         }
2474
2475         sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0;
2476
2477 fail:
2478         return (error);
2479 }
2480
2481 static usb_error_t
2482 urtw_8225_rf_init(struct urtw_softc *sc)
2483 {
2484         unsigned int i;
2485         uint16_t data;
2486         usb_error_t error;
2487
2488         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2489         if (error)
2490                 goto fail;
2491
2492         error = urtw_8225_usb_init(sc);
2493         if (error)
2494                 goto fail;
2495
2496         urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2497         urtw_read16_m(sc, URTW_BRSR, &data);            /* XXX ??? */
2498         urtw_write16_m(sc, URTW_BRSR, 0xffff);
2499         urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2500
2501         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2502         if (error)
2503                 goto fail;
2504         urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2505         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2506         if (error)
2507                 goto fail;
2508
2509         error = urtw_8185_rf_pins_enable(sc);
2510         if (error)
2511                 goto fail;
2512         usb_pause_mtx(&sc->sc_mtx, 1000);
2513
2514         for (i = 0; i < nitems(urtw_8225_rf_part1); i++) {
2515                 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg,
2516                     urtw_8225_rf_part1[i].val);
2517                 usb_pause_mtx(&sc->sc_mtx, 1);
2518         }
2519         usb_pause_mtx(&sc->sc_mtx, 100);
2520         urtw_8225_write(sc,
2521             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2522         usb_pause_mtx(&sc->sc_mtx, 200);
2523         urtw_8225_write(sc,
2524             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2525         usb_pause_mtx(&sc->sc_mtx, 200);
2526         urtw_8225_write(sc,
2527             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3);
2528
2529         for (i = 0; i < 95; i++) {
2530                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2531                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]);
2532         }
2533
2534         urtw_8225_write(sc,
2535             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4);
2536         urtw_8225_write(sc,
2537             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5);
2538
2539         for (i = 0; i < 128; i++) {
2540                 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2541                 usb_pause_mtx(&sc->sc_mtx, 1);
2542                 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2543                 usb_pause_mtx(&sc->sc_mtx, 1);
2544         }
2545
2546         for (i = 0; i < nitems(urtw_8225_rf_part2); i++) {
2547                 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg,
2548                     urtw_8225_rf_part2[i].val);
2549                 usb_pause_mtx(&sc->sc_mtx, 1);
2550         }
2551
2552         error = urtw_8225_setgain(sc, 4);
2553         if (error)
2554                 goto fail;
2555
2556         for (i = 0; i < nitems(urtw_8225_rf_part3); i++) {
2557                 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg,
2558                     urtw_8225_rf_part3[i].val);
2559                 usb_pause_mtx(&sc->sc_mtx, 1);
2560         }
2561
2562         urtw_write8_m(sc, URTW_TESTR, 0x0d);
2563
2564         error = urtw_8225_set_txpwrlvl(sc, 1);
2565         if (error)
2566                 goto fail;
2567
2568         urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
2569         usb_pause_mtx(&sc->sc_mtx, 1);
2570         urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
2571         usb_pause_mtx(&sc->sc_mtx, 1);
2572
2573         /* TX ant A, 0x0 for B */
2574         error = urtw_8185_tx_antenna(sc, 0x3);
2575         if (error)
2576                 goto fail;
2577         urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
2578
2579         error = urtw_8225_rf_set_chan(sc, 1);
2580 fail:
2581         return (error);
2582 }
2583
2584 static usb_error_t
2585 urtw_8185_rf_pins_enable(struct urtw_softc *sc)
2586 {
2587         usb_error_t error = 0;
2588
2589         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7);
2590 fail:
2591         return (error);
2592 }
2593
2594 static usb_error_t
2595 urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant)
2596 {
2597         usb_error_t error;
2598
2599         urtw_write8_m(sc, URTW_TX_ANTENNA, ant);
2600         usb_pause_mtx(&sc->sc_mtx, 1);
2601 fail:
2602         return (error);
2603 }
2604
2605 static usb_error_t
2606 urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2607 {
2608
2609         data = data & 0xff;
2610         return urtw_8187_write_phy(sc, addr, data);
2611 }
2612
2613 static usb_error_t
2614 urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2615 {
2616
2617         data = data & 0xff;
2618         return urtw_8187_write_phy(sc, addr, data | 0x10000);
2619 }
2620
2621 static usb_error_t
2622 urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2623 {
2624         uint32_t phyw;
2625         usb_error_t error;
2626
2627         phyw = ((data << 8) | (addr | 0x80));
2628         urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24));
2629         urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16));
2630         urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8));
2631         urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff)));
2632         usb_pause_mtx(&sc->sc_mtx, 1);
2633 fail:
2634         return (error);
2635 }
2636
2637 static usb_error_t
2638 urtw_8225_setgain(struct urtw_softc *sc, int16_t gain)
2639 {
2640         usb_error_t error;
2641
2642         urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]);
2643         urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]);
2644         urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]);
2645         urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]);
2646 fail:
2647         return (error);
2648 }
2649
2650 static usb_error_t
2651 urtw_8225_usb_init(struct urtw_softc *sc)
2652 {
2653         uint8_t data;
2654         usb_error_t error;
2655
2656         urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0);
2657         urtw_write8_m(sc, URTW_GPIO, 0);
2658         error = urtw_read8e(sc, 0x53, &data);
2659         if (error)
2660                 goto fail;
2661         error = urtw_write8e(sc, 0x53, data | (1 << 7));
2662         if (error)
2663                 goto fail;
2664         urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4);
2665         urtw_write8_m(sc, URTW_GPIO, 0x20);
2666         urtw_write8_m(sc, URTW_GP_ENABLE, 0);
2667
2668         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80);
2669         urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80);
2670         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80);
2671
2672         usb_pause_mtx(&sc->sc_mtx, 500);
2673 fail:
2674         return (error);
2675 }
2676
2677 static usb_error_t
2678 urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data)
2679 {
2680         uint16_t d80, d82, d84;
2681         usb_error_t error;
2682
2683         urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80);
2684         d80 &= URTW_RF_PINS_MAGIC1;
2685         urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82);
2686         urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84);
2687         d84 &= URTW_RF_PINS_MAGIC2;
2688         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3);
2689         urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3);
2690         DELAY(10);
2691
2692         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2693         DELAY(2);
2694         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80);
2695         DELAY(10);
2696
2697         error = urtw_8225_write_s16(sc, addr, 0x8225, &data);
2698         if (error != 0)
2699                 goto fail;
2700
2701         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2702         DELAY(10);
2703         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2704         urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84);
2705         usb_pause_mtx(&sc->sc_mtx, 2);
2706 fail:
2707         return (error);
2708 }
2709
2710 static usb_error_t
2711 urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index,
2712     uint16_t *data)
2713 {
2714         uint8_t buf[2];
2715         uint16_t data16;
2716         struct usb_device_request req;
2717         usb_error_t error = 0;
2718
2719         data16 = *data;
2720
2721         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2722         req.bRequest = URTW_8187_SETREGS_REQ;
2723         USETW(req.wValue, addr);
2724         USETW(req.wIndex, index);
2725         USETW(req.wLength, sizeof(uint16_t));
2726         buf[0] = (data16 & 0x00ff);
2727         buf[1] = (data16 & 0xff00) >> 8;
2728
2729         error = urtw_do_request(sc, &req, buf);
2730
2731         return (error);
2732 }
2733
2734 static usb_error_t
2735 urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan)
2736 {
2737         usb_error_t error;
2738
2739         error = urtw_8225_set_txpwrlvl(sc, chan);
2740         if (error)
2741                 goto fail;
2742         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
2743         usb_pause_mtx(&sc->sc_mtx, 10);
2744 fail:
2745         return (error);
2746 }
2747
2748 static usb_error_t
2749 urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens)
2750 {
2751         usb_error_t error;
2752
2753         if (sens < 0 || sens > 6)
2754                 return -1;
2755
2756         if (sens > 4)
2757                 urtw_8225_write(sc,
2758                     URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1);
2759         else
2760                 urtw_8225_write(sc,
2761                     URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2);
2762
2763         sens = 6 - sens;
2764         error = urtw_8225_setgain(sc, sens);
2765         if (error)
2766                 goto fail;
2767
2768         urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]);
2769
2770 fail:
2771         return (error);
2772 }
2773
2774 static usb_error_t
2775 urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan)
2776 {
2777         int i, idx, set;
2778         uint8_t *cck_pwltable;
2779         uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max;
2780         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
2781         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
2782         usb_error_t error;
2783
2784         cck_pwrlvl_max = 11;
2785         ofdm_pwrlvl_max = 25;   /* 12 -> 25  */
2786         ofdm_pwrlvl_min = 10;
2787
2788         /* CCK power setting */
2789         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
2790         idx = cck_pwrlvl % 6;
2791         set = cck_pwrlvl / 6;
2792         cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 :
2793             urtw_8225_txpwr_cck;
2794
2795         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
2796             urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2797         for (i = 0; i < 8; i++) {
2798                 urtw_8187_write_phy_cck(sc, 0x44 + i,
2799                     cck_pwltable[idx * 8 + i]);
2800         }
2801         usb_pause_mtx(&sc->sc_mtx, 1);
2802
2803         /* OFDM power setting */
2804         ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
2805             ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
2806         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
2807
2808         idx = ofdm_pwrlvl % 6;
2809         set = ofdm_pwrlvl / 6;
2810
2811         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
2812         if (error)
2813                 goto fail;
2814         urtw_8187_write_phy_ofdm(sc, 2, 0x42);
2815         urtw_8187_write_phy_ofdm(sc, 6, 0);
2816         urtw_8187_write_phy_ofdm(sc, 8, 0);
2817
2818         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
2819             urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2820         urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]);
2821         urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]);
2822         usb_pause_mtx(&sc->sc_mtx, 1);
2823 fail:
2824         return (error);
2825 }
2826
2827 static usb_error_t
2828 urtw_8225_rf_stop(struct urtw_softc *sc)
2829 {
2830         uint8_t data;
2831         usb_error_t error;
2832
2833         urtw_8225_write(sc, 0x4, 0x1f);
2834
2835         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2836         if (error)
2837                 goto fail;
2838
2839         urtw_read8_m(sc, URTW_CONFIG3, &data);
2840         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
2841         if (sc->sc_flags & URTW_RTL8187B) {
2842                 urtw_write32_m(sc, URTW_ANAPARAM2,
2843                     URTW_8187B_8225_ANAPARAM2_OFF);
2844                 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF);
2845                 urtw_write32_m(sc, URTW_ANAPARAM3,
2846                     URTW_8187B_8225_ANAPARAM3_OFF);
2847         } else {
2848                 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF);
2849                 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF);
2850         }
2851
2852         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
2853         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2854         if (error)
2855                 goto fail;
2856
2857 fail:
2858         return (error);
2859 }
2860
2861 static usb_error_t
2862 urtw_8225v2_rf_init(struct urtw_softc *sc)
2863 {
2864         unsigned int i;
2865         uint16_t data;
2866         uint32_t data32;
2867         usb_error_t error;
2868
2869         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2870         if (error)
2871                 goto fail;
2872
2873         error = urtw_8225_usb_init(sc);
2874         if (error)
2875                 goto fail;
2876
2877         urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2878         urtw_read16_m(sc, URTW_BRSR, &data);            /* XXX ??? */
2879         urtw_write16_m(sc, URTW_BRSR, 0xffff);
2880         urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2881
2882         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2883         if (error)
2884                 goto fail;
2885         urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2886         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2887         if (error)
2888                 goto fail;
2889
2890         error = urtw_8185_rf_pins_enable(sc);
2891         if (error)
2892                 goto fail;
2893
2894         usb_pause_mtx(&sc->sc_mtx, 500);
2895
2896         for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) {
2897                 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg,
2898                     urtw_8225v2_rf_part1[i].val);
2899         }
2900         usb_pause_mtx(&sc->sc_mtx, 50);
2901
2902         urtw_8225_write(sc,
2903             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1);
2904
2905         for (i = 0; i < 95; i++) {
2906                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2907                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
2908                     urtw_8225v2_rxgain[i]);
2909         }
2910
2911         urtw_8225_write(sc,
2912             URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1);
2913         urtw_8225_write(sc,
2914             URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1);
2915         urtw_8225_write(sc,
2916             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2);
2917         urtw_8225_write(sc,
2918             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2919         usb_pause_mtx(&sc->sc_mtx, 100);
2920         urtw_8225_write(sc,
2921             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2922         usb_pause_mtx(&sc->sc_mtx, 100);
2923
2924         error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2925         if (error != 0)
2926                 goto fail;
2927         if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1)
2928                 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32);
2929         if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) {
2930                 urtw_8225_write(sc,
2931                     URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2932                 usb_pause_mtx(&sc->sc_mtx, 100);
2933                 urtw_8225_write(sc,
2934                     URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2935                 usb_pause_mtx(&sc->sc_mtx, 50);
2936                 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2937                 if (error != 0)
2938                         goto fail;
2939                 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2))
2940                         device_printf(sc->sc_dev, "RF calibration failed\n");
2941         }
2942         usb_pause_mtx(&sc->sc_mtx, 100);
2943
2944         urtw_8225_write(sc,
2945             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6);
2946         for (i = 0; i < 128; i++) {
2947                 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2948                 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2949         }
2950
2951         for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) {
2952                 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg,
2953                     urtw_8225v2_rf_part2[i].val);
2954         }
2955
2956         error = urtw_8225v2_setgain(sc, 4);
2957         if (error)
2958                 goto fail;
2959
2960         for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) {
2961                 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg,
2962                     urtw_8225v2_rf_part3[i].val);
2963         }
2964
2965         urtw_write8_m(sc, URTW_TESTR, 0x0d);
2966
2967         error = urtw_8225v2_set_txpwrlvl(sc, 1);
2968         if (error)
2969                 goto fail;
2970
2971         urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
2972         urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
2973
2974         /* TX ant A, 0x0 for B */
2975         error = urtw_8185_tx_antenna(sc, 0x3);
2976         if (error)
2977                 goto fail;
2978         urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
2979
2980         error = urtw_8225_rf_set_chan(sc, 1);
2981 fail:
2982         return (error);
2983 }
2984
2985 static usb_error_t
2986 urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan)
2987 {
2988         usb_error_t error;
2989
2990         error = urtw_8225v2_set_txpwrlvl(sc, chan);
2991         if (error)
2992                 goto fail;
2993
2994         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
2995         usb_pause_mtx(&sc->sc_mtx, 10);
2996 fail:
2997         return (error);
2998 }
2999
3000 static usb_error_t
3001 urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data)
3002 {
3003         int i;
3004         int16_t bit;
3005         uint8_t rlen = 12, wlen = 6;
3006         uint16_t o1, o2, o3, tmp;
3007         uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27;
3008         uint32_t mask = 0x80000000, value = 0;
3009         usb_error_t error;
3010
3011         urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1);
3012         urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2);
3013         urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3);
3014         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4);
3015         urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4);
3016         o1 &= ~URTW_RF_PINS_MAGIC4;
3017         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN);
3018         DELAY(5);
3019         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1);
3020         DELAY(5);
3021
3022         for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) {
3023                 bit = ((d2w & mask) != 0) ? 1 : 0;
3024
3025                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3026                 DELAY(2);
3027                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3028                     URTW_BB_HOST_BANG_CLK);
3029                 DELAY(2);
3030                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3031                     URTW_BB_HOST_BANG_CLK);
3032                 DELAY(2);
3033                 mask = mask >> 1;
3034                 if (i == 2)
3035                         break;
3036                 bit = ((d2w & mask) != 0) ? 1 : 0;
3037                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3038                     URTW_BB_HOST_BANG_CLK);
3039                 DELAY(2);
3040                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3041                     URTW_BB_HOST_BANG_CLK);
3042                 DELAY(2);
3043                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3044                 DELAY(1);
3045         }
3046         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW |
3047             URTW_BB_HOST_BANG_CLK);
3048         DELAY(2);
3049         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW);
3050         DELAY(2);
3051         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW);
3052         DELAY(2);
3053
3054         mask = 0x800;
3055         for (i = 0; i < rlen; i++, mask = mask >> 1) {
3056                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3057                     o1 | URTW_BB_HOST_BANG_RW);
3058                 DELAY(2);
3059                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3060                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3061                 DELAY(2);
3062                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3063                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3064                 DELAY(2);
3065                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3066                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3067                 DELAY(2);
3068
3069                 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp);
3070                 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0);
3071                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3072                     o1 | URTW_BB_HOST_BANG_RW);
3073                 DELAY(2);
3074         }
3075
3076         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN |
3077             URTW_BB_HOST_BANG_RW);
3078         DELAY(2);
3079
3080         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2);
3081         urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3);
3082         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1);
3083
3084         if (data != NULL)
3085                 *data = value;
3086 fail:
3087         return (error);
3088 }
3089
3090 static usb_error_t
3091 urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan)
3092 {
3093         int i;
3094         uint8_t *cck_pwrtable;
3095         uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10;
3096         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3097         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3098         usb_error_t error;
3099
3100         /* CCK power setting */
3101         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
3102         cck_pwrlvl += sc->sc_txpwr_cck_base;
3103         cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3104         cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 :
3105             urtw_8225v2_txpwr_cck;
3106
3107         for (i = 0; i < 8; i++)
3108                 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3109
3110         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3111             urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]);
3112         usb_pause_mtx(&sc->sc_mtx, 1);
3113
3114         /* OFDM power setting */
3115         ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
3116                 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
3117         ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3118         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3119
3120         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3121         if (error)
3122                 goto fail;
3123
3124         urtw_8187_write_phy_ofdm(sc, 2, 0x42);
3125         urtw_8187_write_phy_ofdm(sc, 5, 0x0);
3126         urtw_8187_write_phy_ofdm(sc, 6, 0x40);
3127         urtw_8187_write_phy_ofdm(sc, 7, 0x0);
3128         urtw_8187_write_phy_ofdm(sc, 8, 0x40);
3129
3130         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3131             urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]);
3132         usb_pause_mtx(&sc->sc_mtx, 1);
3133 fail:
3134         return (error);
3135 }
3136
3137 static usb_error_t
3138 urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain)
3139 {
3140         uint8_t *gainp;
3141         usb_error_t error;
3142
3143         /* XXX for A?  */
3144         gainp = urtw_8225v2_gain_bg;
3145         urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]);
3146         usb_pause_mtx(&sc->sc_mtx, 1);
3147         urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]);
3148         usb_pause_mtx(&sc->sc_mtx, 1);
3149         urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]);
3150         usb_pause_mtx(&sc->sc_mtx, 1);
3151         urtw_8187_write_phy_ofdm(sc, 0x21, 0x17);
3152         usb_pause_mtx(&sc->sc_mtx, 1);
3153 fail:
3154         return (error);
3155 }
3156
3157 static usb_error_t
3158 urtw_8225_isv2(struct urtw_softc *sc, int *ret)
3159 {
3160         uint32_t data;
3161         usb_error_t error;
3162
3163         *ret = 1;
3164
3165         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5);
3166         urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5);
3167         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5);
3168         usb_pause_mtx(&sc->sc_mtx, 500);
3169
3170         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3171             URTW_8225_ADDR_0_DATA_MAGIC1);
3172
3173         error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data);
3174         if (error != 0)
3175                 goto fail;
3176         if (data != URTW_8225_ADDR_8_DATA_MAGIC1)
3177                 *ret = 0;
3178         else {
3179                 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data);
3180                 if (error != 0)
3181                         goto fail;
3182                 if (data != URTW_8225_ADDR_9_DATA_MAGIC1)
3183                         *ret = 0;
3184         }
3185
3186         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3187             URTW_8225_ADDR_0_DATA_MAGIC2);
3188 fail:
3189         return (error);
3190 }
3191
3192 static usb_error_t
3193 urtw_8225v2b_rf_init(struct urtw_softc *sc)
3194 {
3195         struct ieee80211com *ic = &sc->sc_ic;
3196         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3197         const uint8_t *macaddr;
3198         unsigned int i;
3199         uint8_t data8;
3200         usb_error_t error;
3201
3202         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3203         if (error)
3204                 goto fail;
3205
3206         /*
3207          * initialize extra registers on 8187
3208          */
3209         urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff);
3210
3211         /* retry limit */
3212         urtw_read8_m(sc, URTW_CW_CONF, &data8);
3213         data8 |= URTW_CW_CONF_PERPACKET_RETRY;
3214         urtw_write8_m(sc, URTW_CW_CONF, data8);
3215
3216         /* TX AGC */
3217         urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3218         data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN;
3219         urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3220
3221         /* Auto Rate Fallback Control */
3222 #define URTW_ARFR       0x1e0
3223         urtw_write16_m(sc, URTW_ARFR, 0xfff);
3224         urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8);
3225         urtw_write8_m(sc, URTW_RATE_FALLBACK,
3226             data8 | URTW_RATE_FALLBACK_ENABLE);
3227
3228         urtw_read8_m(sc, URTW_MSR, &data8);
3229         urtw_write8_m(sc, URTW_MSR, data8 & 0xf3);
3230         urtw_read8_m(sc, URTW_MSR, &data8);
3231         urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA);
3232         urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl);
3233
3234         urtw_write16_m(sc, URTW_ATIM_WND, 2);
3235         urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
3236 #define URTW_FEMR_FOR_8187B     0x1d4
3237         urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff);
3238
3239         /* led type */
3240         urtw_read8_m(sc, URTW_CONFIG1, &data8);
3241         data8 = (data8 & 0x3f) | 0x80;
3242         urtw_write8_m(sc, URTW_CONFIG1, data8);
3243
3244         /* applying MAC address again.  */
3245         macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr;
3246         error = urtw_set_macaddr(sc, macaddr);
3247         if (error)
3248                 goto fail;
3249
3250         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3251         if (error)
3252                 goto fail;
3253
3254         urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
3255
3256         /*
3257          * MAC configuration
3258          */
3259         for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++)
3260                 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg,
3261                     urtw_8225v2b_rf_part1[i].val);
3262         urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50);
3263         urtw_write16_m(sc, URTW_INT_MIG, 0x0000);
3264         urtw_write32_m(sc, 0x1f0, 0);
3265         urtw_write32_m(sc, 0x1f4, 0);
3266         urtw_write8_m(sc, 0x1f8, 0);
3267         urtw_write32_m(sc, URTW_RF_TIMING, 0x4001);
3268
3269 #define URTW_RFSW_CTRL  0x272
3270         urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a);
3271
3272         /*
3273          * initialize PHY
3274          */
3275         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3276         if (error)
3277                 goto fail;
3278         urtw_read8_m(sc, URTW_CONFIG3, &data8);
3279         urtw_write8_m(sc, URTW_CONFIG3,
3280             data8 | URTW_CONFIG3_ANAPARAM_WRITE);
3281
3282         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3283         if (error)
3284                 goto fail;
3285
3286         /* setup RFE initial timing */
3287         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480);
3288         urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488);
3289         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff);
3290         usb_pause_mtx(&sc->sc_mtx, 1100);
3291
3292         for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) {
3293                 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg,
3294                     urtw_8225v2b_rf_part0[i].val);
3295                 usb_pause_mtx(&sc->sc_mtx, 1);
3296         }
3297         urtw_8225_write(sc, 0x00, 0x01b7);
3298
3299         for (i = 0; i < 95; i++) {
3300                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
3301                 usb_pause_mtx(&sc->sc_mtx, 1);
3302                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
3303                     urtw_8225v2b_rxgain[i]);
3304                 usb_pause_mtx(&sc->sc_mtx, 1);
3305         }
3306
3307         urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080);
3308         usb_pause_mtx(&sc->sc_mtx, 1);
3309         urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004);
3310         usb_pause_mtx(&sc->sc_mtx, 1);
3311         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7);
3312         usb_pause_mtx(&sc->sc_mtx, 1);
3313         usb_pause_mtx(&sc->sc_mtx, 3000);
3314         urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d);
3315         usb_pause_mtx(&sc->sc_mtx, 2000);
3316         urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d);
3317         usb_pause_mtx(&sc->sc_mtx, 1);
3318         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf);
3319         usb_pause_mtx(&sc->sc_mtx, 1);
3320
3321         urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03);
3322         urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07);
3323         urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03);
3324
3325         urtw_8187_write_phy_ofdm(sc, 0x80, 0x12);
3326         for (i = 0; i < 128; i++) {
3327                 uint32_t addr, data;
3328
3329                 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f;
3330                 addr = ((i + 0x80) << 8) | 0x0000008e;
3331
3332                 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff);
3333                 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff);
3334                 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00);
3335         }
3336         urtw_8187_write_phy_ofdm(sc, 0x80, 0x10);
3337
3338         for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++)
3339                 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val);
3340
3341         urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c);
3342         urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c);
3343         urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c);
3344         urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c);
3345
3346         urtw_8187_write_phy_ofdm(sc, 0x97, 0x46);
3347         urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6);
3348         urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc);
3349         urtw_8187_write_phy_cck(sc, 0xc1, 0x88);
3350
3351 fail:
3352         return (error);
3353 }
3354
3355 static usb_error_t
3356 urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan)
3357 {
3358         usb_error_t error;
3359
3360         error = urtw_8225v2b_set_txpwrlvl(sc, chan);
3361         if (error)
3362                 goto fail;
3363
3364         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3365         usb_pause_mtx(&sc->sc_mtx, 10);
3366 fail:
3367         return (error);
3368 }
3369
3370 static usb_error_t
3371 urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan)
3372 {
3373         int i;
3374         uint8_t *cck_pwrtable;
3375         uint8_t cck_pwrlvl_max = 15;
3376         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3377         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3378         usb_error_t error;
3379
3380         /* CCK power setting */
3381         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ?
3382             ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) :
3383             (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7));
3384         cck_pwrlvl += sc->sc_txpwr_cck_base;
3385         cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3386         cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 :
3387             urtw_8225v2b_txpwr_cck;
3388
3389         if (sc->sc_flags & URTW_RTL8187B_REV_B)
3390                 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 :
3391                     ((cck_pwrlvl <= 11) ? 8 : 16);
3392         else
3393                 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 :
3394                     ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24));
3395
3396         for (i = 0; i < 8; i++)
3397                 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3398
3399         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3400             urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1);
3401         usb_pause_mtx(&sc->sc_mtx, 1);
3402
3403         /* OFDM power setting */
3404         ofdm_pwrlvl = (ofdm_pwrlvl > 15) ?
3405             ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) :
3406             (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10));
3407         ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3408         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3409
3410         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3411             urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1);
3412
3413         if (sc->sc_flags & URTW_RTL8187B_REV_B) {
3414                 if (ofdm_pwrlvl <= 11) {
3415                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x60);
3416                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x60);
3417                 } else {
3418                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3419                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3420                 }
3421         } else {
3422                 if (ofdm_pwrlvl <= 11) {
3423                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3424                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3425                 } else if (ofdm_pwrlvl <= 17) {
3426                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x54);
3427                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x54);
3428                 } else {
3429                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x50);
3430                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x50);
3431                 }
3432         }
3433         usb_pause_mtx(&sc->sc_mtx, 1);
3434 fail:
3435         return (error);
3436 }
3437
3438 static usb_error_t
3439 urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data)
3440 {
3441         struct usb_device_request req;
3442         usb_error_t error;
3443
3444         req.bmRequestType = UT_READ_VENDOR_DEVICE;
3445         req.bRequest = URTW_8187_GETREGS_REQ;
3446         USETW(req.wValue, val | 0xfe00);
3447         USETW(req.wIndex, 0);
3448         USETW(req.wLength, sizeof(uint8_t));
3449
3450         error = urtw_do_request(sc, &req, data);
3451         return (error);
3452 }
3453
3454 static usb_error_t
3455 urtw_write8e(struct urtw_softc *sc, int val, uint8_t data)
3456 {
3457         struct usb_device_request req;
3458
3459         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
3460         req.bRequest = URTW_8187_SETREGS_REQ;
3461         USETW(req.wValue, val | 0xfe00);
3462         USETW(req.wIndex, 0);
3463         USETW(req.wLength, sizeof(uint8_t));
3464
3465         return (urtw_do_request(sc, &req, &data));
3466 }
3467
3468 static usb_error_t
3469 urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val)
3470 {
3471         uint8_t data;
3472         usb_error_t error;
3473
3474         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3475         if (error)
3476                 goto fail;
3477
3478         urtw_read8_m(sc, URTW_CONFIG3, &data);
3479         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3480         urtw_write32_m(sc, URTW_ANAPARAM, val);
3481         urtw_read8_m(sc, URTW_CONFIG3, &data);
3482         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3483
3484         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3485         if (error)
3486                 goto fail;
3487 fail:
3488         return (error);
3489 }
3490
3491 static usb_error_t
3492 urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val)
3493 {
3494         uint8_t data;
3495         usb_error_t error;
3496
3497         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3498         if (error)
3499                 goto fail;
3500
3501         urtw_read8_m(sc, URTW_CONFIG3, &data);
3502         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3503         urtw_write32_m(sc, URTW_ANAPARAM2, val);
3504         urtw_read8_m(sc, URTW_CONFIG3, &data);
3505         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3506
3507         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3508         if (error)
3509                 goto fail;
3510 fail:
3511         return (error);
3512 }
3513
3514 static usb_error_t
3515 urtw_intr_enable(struct urtw_softc *sc)
3516 {
3517         usb_error_t error;
3518
3519         urtw_write16_m(sc, URTW_INTR_MASK, 0xffff);
3520 fail:
3521         return (error);
3522 }
3523
3524 static usb_error_t
3525 urtw_intr_disable(struct urtw_softc *sc)
3526 {
3527         usb_error_t error;
3528
3529         urtw_write16_m(sc, URTW_INTR_MASK, 0);
3530 fail:
3531         return (error);
3532 }
3533
3534 static usb_error_t
3535 urtw_reset(struct urtw_softc *sc)
3536 {
3537         uint8_t data;
3538         usb_error_t error;
3539
3540         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3541         if (error)
3542                 goto fail;
3543         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3544         if (error)
3545                 goto fail;
3546
3547         error = urtw_intr_disable(sc);
3548         if (error)
3549                 goto fail;
3550         usb_pause_mtx(&sc->sc_mtx, 100);
3551
3552         error = urtw_write8e(sc, 0x18, 0x10);
3553         if (error != 0)
3554                 goto fail;
3555         error = urtw_write8e(sc, 0x18, 0x11);
3556         if (error != 0)
3557                 goto fail;
3558         error = urtw_write8e(sc, 0x18, 0x00);
3559         if (error != 0)
3560                 goto fail;
3561         usb_pause_mtx(&sc->sc_mtx, 100);
3562
3563         urtw_read8_m(sc, URTW_CMD, &data);
3564         data = (data & 0x2) | URTW_CMD_RST;
3565         urtw_write8_m(sc, URTW_CMD, data);
3566         usb_pause_mtx(&sc->sc_mtx, 100);
3567
3568         urtw_read8_m(sc, URTW_CMD, &data);
3569         if (data & URTW_CMD_RST) {
3570                 device_printf(sc->sc_dev, "reset timeout\n");
3571                 goto fail;
3572         }
3573
3574         error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD);
3575         if (error)
3576                 goto fail;
3577         usb_pause_mtx(&sc->sc_mtx, 100);
3578
3579         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3580         if (error)
3581                 goto fail;
3582         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3583         if (error)
3584                 goto fail;
3585 fail:
3586         return (error);
3587 }
3588
3589 static usb_error_t
3590 urtw_led_ctl(struct urtw_softc *sc, int mode)
3591 {
3592         usb_error_t error = 0;
3593
3594         switch (sc->sc_strategy) {
3595         case URTW_SW_LED_MODE0:
3596                 error = urtw_led_mode0(sc, mode);
3597                 break;
3598         case URTW_SW_LED_MODE1:
3599                 error = urtw_led_mode1(sc, mode);
3600                 break;
3601         case URTW_SW_LED_MODE2:
3602                 error = urtw_led_mode2(sc, mode);
3603                 break;
3604         case URTW_SW_LED_MODE3:
3605                 error = urtw_led_mode3(sc, mode);
3606                 break;
3607         default:
3608                 DPRINTF(sc, URTW_DEBUG_STATE,
3609                     "unsupported LED mode %d\n", sc->sc_strategy);
3610                 error = USB_ERR_INVAL;
3611                 break;
3612         }
3613
3614         return (error);
3615 }
3616
3617 static usb_error_t
3618 urtw_led_mode0(struct urtw_softc *sc, int mode)
3619 {
3620
3621         switch (mode) {
3622         case URTW_LED_CTL_POWER_ON:
3623                 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK;
3624                 break;
3625         case URTW_LED_CTL_TX:
3626                 if (sc->sc_gpio_ledinprogress == 1)
3627                         return (0);
3628
3629                 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL;
3630                 sc->sc_gpio_blinktime = 2;
3631                 break;
3632         case URTW_LED_CTL_LINK:
3633                 sc->sc_gpio_ledstate = URTW_LED_ON;
3634                 break;
3635         default:
3636                 DPRINTF(sc, URTW_DEBUG_STATE,
3637                     "unsupported LED mode 0x%x", mode);
3638                 return (USB_ERR_INVAL);
3639         }
3640
3641         switch (sc->sc_gpio_ledstate) {
3642         case URTW_LED_ON:
3643                 if (sc->sc_gpio_ledinprogress != 0)
3644                         break;
3645                 urtw_led_on(sc, URTW_LED_GPIO);
3646                 break;
3647         case URTW_LED_BLINK_NORMAL:
3648                 if (sc->sc_gpio_ledinprogress != 0)
3649                         break;
3650                 sc->sc_gpio_ledinprogress = 1;
3651                 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ?
3652                         URTW_LED_OFF : URTW_LED_ON;
3653                 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3654                 break;
3655         case URTW_LED_POWER_ON_BLINK:
3656                 urtw_led_on(sc, URTW_LED_GPIO);
3657                 usb_pause_mtx(&sc->sc_mtx, 100);
3658                 urtw_led_off(sc, URTW_LED_GPIO);
3659                 break;
3660         default:
3661                 DPRINTF(sc, URTW_DEBUG_STATE,
3662                     "unknown LED status 0x%x", sc->sc_gpio_ledstate);
3663                 return (USB_ERR_INVAL);
3664         }
3665         return (0);
3666 }
3667
3668 static usb_error_t
3669 urtw_led_mode1(struct urtw_softc *sc, int mode)
3670 {
3671         return (USB_ERR_INVAL);
3672 }
3673
3674 static usb_error_t
3675 urtw_led_mode2(struct urtw_softc *sc, int mode)
3676 {
3677         return (USB_ERR_INVAL);
3678 }
3679
3680 static usb_error_t
3681 urtw_led_mode3(struct urtw_softc *sc, int mode)
3682 {
3683         return (USB_ERR_INVAL);
3684 }
3685
3686 static usb_error_t
3687 urtw_led_on(struct urtw_softc *sc, int type)
3688 {
3689         usb_error_t error;
3690
3691         if (type == URTW_LED_GPIO) {
3692                 switch (sc->sc_gpio_ledpin) {
3693                 case URTW_LED_PIN_GPIO0:
3694                         urtw_write8_m(sc, URTW_GPIO, 0x01);
3695                         urtw_write8_m(sc, URTW_GP_ENABLE, 0x00);
3696                         break;
3697                 default:
3698                         DPRINTF(sc, URTW_DEBUG_STATE,
3699                             "unsupported LED PIN type 0x%x",
3700                             sc->sc_gpio_ledpin);
3701                         error = USB_ERR_INVAL;
3702                         goto fail;
3703                 }
3704         } else {
3705                 DPRINTF(sc, URTW_DEBUG_STATE,
3706                     "unsupported LED type 0x%x", type);
3707                 error = USB_ERR_INVAL;
3708                 goto fail;
3709         }
3710
3711         sc->sc_gpio_ledon = 1;
3712 fail:
3713         return (error);
3714 }
3715
3716 static usb_error_t
3717 urtw_led_off(struct urtw_softc *sc, int type)
3718 {
3719         usb_error_t error;
3720
3721         if (type == URTW_LED_GPIO) {
3722                 switch (sc->sc_gpio_ledpin) {
3723                 case URTW_LED_PIN_GPIO0:
3724                         urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1);
3725                         urtw_write8_m(sc,
3726                             URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1);
3727                         break;
3728                 default:
3729                         DPRINTF(sc, URTW_DEBUG_STATE,
3730                             "unsupported LED PIN type 0x%x",
3731                             sc->sc_gpio_ledpin);
3732                         error = USB_ERR_INVAL;
3733                         goto fail;
3734                 }
3735         } else {
3736                 DPRINTF(sc, URTW_DEBUG_STATE,
3737                     "unsupported LED type 0x%x", type);
3738                 error = USB_ERR_INVAL;
3739                 goto fail;
3740         }
3741
3742         sc->sc_gpio_ledon = 0;
3743
3744 fail:
3745         return (error);
3746 }
3747
3748 static void
3749 urtw_led_ch(void *arg)
3750 {
3751         struct urtw_softc *sc = arg;
3752         struct ieee80211com *ic = &sc->sc_ic;
3753
3754         ieee80211_runtask(ic, &sc->sc_led_task);
3755 }
3756
3757 static void
3758 urtw_ledtask(void *arg, int pending)
3759 {
3760         struct urtw_softc *sc = arg;
3761
3762         if (sc->sc_strategy != URTW_SW_LED_MODE0) {
3763                 DPRINTF(sc, URTW_DEBUG_STATE,
3764                     "could not process a LED strategy 0x%x",
3765                     sc->sc_strategy);
3766                 return;
3767         }
3768
3769         URTW_LOCK(sc);
3770         urtw_led_blink(sc);
3771         URTW_UNLOCK(sc);
3772 }
3773
3774 static usb_error_t
3775 urtw_led_blink(struct urtw_softc *sc)
3776 {
3777         uint8_t ing = 0;
3778         usb_error_t error;
3779
3780         if (sc->sc_gpio_blinkstate == URTW_LED_ON)
3781                 error = urtw_led_on(sc, URTW_LED_GPIO);
3782         else
3783                 error = urtw_led_off(sc, URTW_LED_GPIO);
3784         sc->sc_gpio_blinktime--;
3785         if (sc->sc_gpio_blinktime == 0)
3786                 ing = 1;
3787         else {
3788                 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL &&
3789                     sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY &&
3790                     sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3)
3791                         ing = 1;
3792         }
3793         if (ing == 1) {
3794                 if (sc->sc_gpio_ledstate == URTW_LED_ON &&
3795                     sc->sc_gpio_ledon == 0)
3796                         error = urtw_led_on(sc, URTW_LED_GPIO);
3797                 else if (sc->sc_gpio_ledstate == URTW_LED_OFF &&
3798                     sc->sc_gpio_ledon == 1)
3799                         error = urtw_led_off(sc, URTW_LED_GPIO);
3800
3801                 sc->sc_gpio_blinktime = 0;
3802                 sc->sc_gpio_ledinprogress = 0;
3803                 return (0);
3804         }
3805
3806         sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ?
3807             URTW_LED_ON : URTW_LED_OFF;
3808
3809         switch (sc->sc_gpio_ledstate) {
3810         case URTW_LED_BLINK_NORMAL:
3811                 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3812                 break;
3813         default:
3814                 DPRINTF(sc, URTW_DEBUG_STATE,
3815                     "unknown LED status 0x%x",
3816                     sc->sc_gpio_ledstate);
3817                 return (USB_ERR_INVAL);
3818         }
3819         return (0);
3820 }
3821
3822 static usb_error_t
3823 urtw_rx_enable(struct urtw_softc *sc)
3824 {
3825         uint8_t data;
3826         usb_error_t error;
3827
3828         usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ?
3829             sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]);
3830
3831         error = urtw_rx_setconf(sc);
3832         if (error != 0)
3833                 goto fail;
3834
3835         if ((sc->sc_flags & URTW_RTL8187B) == 0) {
3836                 urtw_read8_m(sc, URTW_CMD, &data);
3837                 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE);
3838         }
3839 fail:
3840         return (error);
3841 }
3842
3843 static usb_error_t
3844 urtw_tx_enable(struct urtw_softc *sc)
3845 {
3846         uint8_t data8;
3847         uint32_t data;
3848         usb_error_t error;
3849
3850         if (sc->sc_flags & URTW_RTL8187B) {
3851                 urtw_read32_m(sc, URTW_TX_CONF, &data);
3852                 data &= ~URTW_TX_LOOPBACK_MASK;
3853                 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3854                 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3855                 data &= ~URTW_TX_SWPLCPLEN;
3856                 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE |
3857                     (7 << 8) |  /* short retry limit */
3858                     (7 << 0) |  /* long retry limit */
3859                     (7 << 21);  /* MAX TX DMA */
3860                 urtw_write32_m(sc, URTW_TX_CONF, data);
3861
3862                 urtw_read8_m(sc, URTW_MSR, &data8);
3863                 data8 |= URTW_MSR_LINK_ENEDCA;
3864                 urtw_write8_m(sc, URTW_MSR, data8);
3865                 return (error);
3866         }
3867
3868         urtw_read8_m(sc, URTW_CW_CONF, &data8);
3869         data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY);
3870         urtw_write8_m(sc, URTW_CW_CONF, data8);
3871
3872         urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3873         data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN;
3874         data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL;
3875         data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT;
3876         urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3877
3878         urtw_read32_m(sc, URTW_TX_CONF, &data);
3879         data &= ~URTW_TX_LOOPBACK_MASK;
3880         data |= URTW_TX_LOOPBACK_NONE;
3881         data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3882         data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT;
3883         data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT;
3884         data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3885         data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW;
3886         data &= ~URTW_TX_SWPLCPLEN;
3887         data |= URTW_TX_NOICV;
3888         urtw_write32_m(sc, URTW_TX_CONF, data);
3889
3890         urtw_read8_m(sc, URTW_CMD, &data8);
3891         urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE);
3892 fail:
3893         return (error);
3894 }
3895
3896 static usb_error_t
3897 urtw_rx_setconf(struct urtw_softc *sc)
3898 {
3899         struct ieee80211com *ic = &sc->sc_ic;
3900         uint32_t data;
3901         usb_error_t error;
3902
3903         urtw_read32_m(sc, URTW_RX, &data);
3904         data = data &~ URTW_RX_FILTER_MASK;
3905         if (sc->sc_flags & URTW_RTL8187B) {
3906                 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA |
3907                     URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST |
3908                     URTW_RX_FIFO_THRESHOLD_NONE |
3909                     URTW_MAX_RX_DMA_2048 |
3910                     URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT;
3911         } else {
3912                 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA;
3913                 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST;
3914
3915                 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
3916                         data = data | URTW_RX_FILTER_ICVERR;
3917                         data = data | URTW_RX_FILTER_PWR;
3918                 }
3919                 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR)
3920                         data = data | URTW_RX_FILTER_CRCERR;
3921
3922                 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK;
3923                 data = data | URTW_RX_FIFO_THRESHOLD_NONE |
3924                     URTW_RX_AUTORESETPHY;
3925                 data = data &~ URTW_MAX_RX_DMA_MASK;
3926                 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT;
3927         }
3928
3929         /* XXX allmulti should not be checked here... */
3930         if (ic->ic_opmode == IEEE80211_M_MONITOR ||
3931             ic->ic_promisc > 0 || ic->ic_allmulti > 0) {
3932                 data = data | URTW_RX_FILTER_CTL;
3933                 data = data | URTW_RX_FILTER_ALLMAC;
3934         } else {
3935                 data = data | URTW_RX_FILTER_NICMAC;
3936                 data = data | URTW_RX_CHECK_BSSID;
3937         }
3938
3939         urtw_write32_m(sc, URTW_RX, data);
3940 fail:
3941         return (error);
3942 }
3943
3944 static struct mbuf *
3945 urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p,
3946     int8_t *nf_p)
3947 {
3948         int actlen, flen, rssi;
3949         struct ieee80211_frame *wh;
3950         struct mbuf *m, *mnew;
3951         struct urtw_softc *sc = data->sc;
3952         struct ieee80211com *ic = &sc->sc_ic;
3953         uint8_t noise = 0, rate;
3954         uint64_t mactime;
3955
3956         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
3957
3958         if (sc->sc_flags & URTW_RTL8187B) {
3959                 struct urtw_8187b_rxhdr *rx;
3960
3961                 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN)
3962                         goto fail;
3963
3964                 rx = (struct urtw_8187b_rxhdr *)(data->buf +
3965                     (actlen - (sizeof(struct urtw_8187b_rxhdr))));
3966                 flen = le32toh(rx->flag) & 0xfff;
3967                 if (flen > actlen - sizeof(*rx))
3968                         goto fail;
3969
3970                 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
3971                 /* XXX correct? */
3972                 rssi = rx->rssi & URTW_RX_RSSI_MASK;
3973                 noise = rx->noise;
3974
3975                 if (ieee80211_radiotap_active(ic))
3976                         mactime = rx->mactime;
3977         } else {
3978                 struct urtw_8187l_rxhdr *rx;
3979
3980                 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN)
3981                         goto fail;
3982
3983                 rx = (struct urtw_8187l_rxhdr *)(data->buf +
3984                     (actlen - (sizeof(struct urtw_8187l_rxhdr))));
3985                 flen = le32toh(rx->flag) & 0xfff;
3986                 if (flen > actlen - sizeof(*rx))
3987                         goto fail;
3988
3989                 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
3990                 /* XXX correct? */
3991                 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK;
3992                 noise = rx->noise;
3993
3994                 if (ieee80211_radiotap_active(ic))
3995                         mactime = rx->mactime;
3996         }
3997
3998         if (flen < IEEE80211_ACK_LEN)
3999                 goto fail;
4000
4001         mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
4002         if (mnew == NULL)
4003                 goto fail;
4004
4005         m = data->m;
4006         data->m = mnew;
4007         data->buf = mtod(mnew, uint8_t *);
4008
4009         /* finalize mbuf */
4010         m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN;
4011
4012         if (ieee80211_radiotap_active(ic)) {
4013                 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap;
4014
4015                 tap->wr_tsf = mactime;
4016                 tap->wr_flags = 0;
4017                 tap->wr_dbm_antsignal = (int8_t)rssi;
4018         }
4019
4020         wh = mtod(m, struct ieee80211_frame *);
4021         if (IEEE80211_IS_DATA(wh))
4022                 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate;
4023
4024         *rssi_p = rssi;
4025         *nf_p = noise;          /* XXX correct? */
4026
4027         return (m);
4028
4029 fail:
4030         counter_u64_add(ic->ic_ierrors, 1);
4031         return (NULL);
4032 }
4033
4034 static void
4035 urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
4036 {
4037         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4038         struct ieee80211com *ic = &sc->sc_ic;
4039         struct ieee80211_node *ni;
4040         struct epoch_tracker et;
4041         struct mbuf *m = NULL;
4042         struct urtw_data *data;
4043         int8_t nf = -95;
4044         int rssi = 1;
4045
4046         URTW_ASSERT_LOCKED(sc);
4047
4048         switch (USB_GET_STATE(xfer)) {
4049         case USB_ST_TRANSFERRED:
4050                 data = STAILQ_FIRST(&sc->sc_rx_active);
4051                 if (data == NULL)
4052                         goto setup;
4053                 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4054                 m = urtw_rxeof(xfer, data, &rssi, &nf);
4055                 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4056                 /* FALLTHROUGH */
4057         case USB_ST_SETUP:
4058 setup:
4059                 data = STAILQ_FIRST(&sc->sc_rx_inactive);
4060                 if (data == NULL) {
4061                         KASSERT(m == NULL, ("mbuf isn't NULL"));
4062                         return;
4063                 }
4064                 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
4065                 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
4066                 usbd_xfer_set_frame_data(xfer, 0, data->buf,
4067                     usbd_xfer_max_len(xfer));
4068                 usbd_transfer_submit(xfer);
4069
4070                 /*
4071                  * To avoid LOR we should unlock our private mutex here to call
4072                  * ieee80211_input() because here is at the end of a USB
4073                  * callback and safe to unlock.
4074                  */
4075                 URTW_UNLOCK(sc);
4076                 if (m != NULL) {
4077                         if (m->m_pkthdr.len >=
4078                             sizeof(struct ieee80211_frame_min)) {
4079                                 ni = ieee80211_find_rxnode(ic,
4080                                     mtod(m, struct ieee80211_frame_min *));
4081                         } else
4082                                 ni = NULL;
4083
4084                         NET_EPOCH_ENTER(et);
4085                         if (ni != NULL) {
4086                                 (void) ieee80211_input(ni, m, rssi, nf);
4087                                 /* node is no longer needed */
4088                                 ieee80211_free_node(ni);
4089                         } else
4090                                 (void) ieee80211_input_all(ic, m, rssi, nf);
4091                         NET_EPOCH_EXIT(et);
4092                         m = NULL;
4093                 }
4094                 URTW_LOCK(sc);
4095                 break;
4096         default:
4097                 /* needs it to the inactive queue due to a error.  */
4098                 data = STAILQ_FIRST(&sc->sc_rx_active);
4099                 if (data != NULL) {
4100                         STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4101                         STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4102                 }
4103                 if (error != USB_ERR_CANCELLED) {
4104                         usbd_xfer_set_stall(xfer);
4105                         counter_u64_add(ic->ic_ierrors, 1);
4106                         goto setup;
4107                 }
4108                 break;
4109         }
4110 }
4111
4112 #define URTW_STATUS_TYPE_TXCLOSE        1
4113 #define URTW_STATUS_TYPE_BEACON_INTR    0
4114
4115 static void
4116 urtw_txstatus_eof(struct usb_xfer *xfer)
4117 {
4118         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4119         struct ieee80211com *ic = &sc->sc_ic;
4120         int actlen, type, pktretry, seq;
4121         uint64_t val;
4122
4123         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
4124
4125         if (actlen != sizeof(uint64_t))
4126                 return;
4127
4128         val = le64toh(sc->sc_txstatus);
4129         type = (val >> 30) & 0x3;
4130         if (type == URTW_STATUS_TYPE_TXCLOSE) {
4131                 pktretry = val & 0xff;
4132                 seq = (val >> 16) & 0xff;
4133                 if (pktretry == URTW_TX_MAXRETRY)
4134                         counter_u64_add(ic->ic_oerrors, 1);
4135                 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n",
4136                     pktretry, seq);
4137         }
4138 }
4139
4140 static void
4141 urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error)
4142 {
4143         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4144         struct ieee80211com *ic = &sc->sc_ic;
4145         void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0);
4146
4147         URTW_ASSERT_LOCKED(sc);
4148
4149         switch (USB_GET_STATE(xfer)) {
4150         case USB_ST_TRANSFERRED:
4151                 urtw_txstatus_eof(xfer);
4152                 /* FALLTHROUGH */
4153         case USB_ST_SETUP:
4154 setup:
4155                 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t));
4156                 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t));
4157                 usbd_transfer_submit(xfer);
4158                 break;
4159         default:
4160                 if (error != USB_ERR_CANCELLED) {
4161                         usbd_xfer_set_stall(xfer);
4162                         counter_u64_add(ic->ic_ierrors, 1);
4163                         goto setup;
4164                 }
4165                 break;
4166         }
4167 }
4168
4169 static void
4170 urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data)
4171 {
4172         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4173
4174         URTW_ASSERT_LOCKED(sc);
4175
4176         if (data->m) {
4177                 /* XXX status? */
4178                 ieee80211_tx_complete(data->ni, data->m, 0);
4179                 data->m = NULL;
4180                 data->ni = NULL;
4181         }
4182         sc->sc_txtimer = 0;
4183 }
4184
4185 static void
4186 urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
4187 {
4188         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4189         struct urtw_data *data;
4190
4191         URTW_ASSERT_LOCKED(sc);
4192
4193         switch (USB_GET_STATE(xfer)) {
4194         case USB_ST_TRANSFERRED:
4195                 data = STAILQ_FIRST(&sc->sc_tx_active);
4196                 if (data == NULL)
4197                         goto setup;
4198                 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next);
4199                 urtw_txeof(xfer, data);
4200                 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next);
4201                 /* FALLTHROUGH */
4202         case USB_ST_SETUP:
4203 setup:
4204                 data = STAILQ_FIRST(&sc->sc_tx_pending);
4205                 if (data == NULL) {
4206                         DPRINTF(sc, URTW_DEBUG_XMIT,
4207                             "%s: empty pending queue\n", __func__);
4208                         return;
4209                 }
4210                 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next);
4211                 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next);
4212
4213                 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
4214                 usbd_transfer_submit(xfer);
4215
4216                 urtw_start(sc);
4217                 break;
4218         default:
4219                 data = STAILQ_FIRST(&sc->sc_tx_active);
4220                 if (data == NULL)
4221                         goto setup;
4222                 if (data->ni != NULL) {
4223                         if_inc_counter(data->ni->ni_vap->iv_ifp,
4224                             IFCOUNTER_OERRORS, 1);
4225                         ieee80211_free_node(data->ni);
4226                         data->ni = NULL;
4227                 }
4228                 if (error != USB_ERR_CANCELLED) {
4229                         usbd_xfer_set_stall(xfer);
4230                         goto setup;
4231                 }
4232                 break;
4233         }
4234 }
4235
4236 static struct urtw_data *
4237 _urtw_getbuf(struct urtw_softc *sc)
4238 {
4239         struct urtw_data *bf;
4240
4241         bf = STAILQ_FIRST(&sc->sc_tx_inactive);
4242         if (bf != NULL)
4243                 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
4244         else
4245                 bf = NULL;
4246         if (bf == NULL)
4247                 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__,
4248                     "out of xmit buffers");
4249         return (bf);
4250 }
4251
4252 static struct urtw_data *
4253 urtw_getbuf(struct urtw_softc *sc)
4254 {
4255         struct urtw_data *bf;
4256
4257         URTW_ASSERT_LOCKED(sc);
4258
4259         bf = _urtw_getbuf(sc);
4260         if (bf == NULL)
4261                 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__);
4262         return (bf);
4263 }
4264
4265 static int
4266 urtw_isbmode(uint16_t rate)
4267 {
4268
4269         return ((rate <= 22 && rate != 12 && rate != 18) ||
4270             rate == 44) ? (1) : (0);
4271 }
4272
4273 static uint16_t
4274 urtw_rate2dbps(uint16_t rate)
4275 {
4276
4277         switch(rate) {
4278         case 12:
4279         case 18:
4280         case 24:
4281         case 36:
4282         case 48:
4283         case 72:
4284         case 96:
4285         case 108:
4286                 return (rate * 2);
4287         default:
4288                 break;
4289         }
4290         return (24);
4291 }
4292
4293 static int
4294 urtw_compute_txtime(uint16_t framelen, uint16_t rate,
4295     uint8_t ismgt, uint8_t isshort)
4296 {
4297         uint16_t     ceiling, frametime, n_dbps;
4298
4299         if (urtw_isbmode(rate)) {
4300                 if (ismgt || !isshort || rate == 2)
4301                         frametime = (uint16_t)(144 + 48 +
4302                             (framelen * 8 / (rate / 2)));
4303                 else
4304                         frametime = (uint16_t)(72 + 24 +
4305                             (framelen * 8 / (rate / 2)));
4306                 if ((framelen * 8 % (rate / 2)) != 0)
4307                         frametime++;
4308         } else {
4309                 n_dbps = urtw_rate2dbps(rate);
4310                 ceiling = (16 + 8 * framelen + 6) / n_dbps
4311                     + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0);
4312                 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6);
4313         }
4314         return (frametime);
4315 }
4316
4317 /*
4318  * Callback from the 802.11 layer to update the
4319  * slot time based on the current setting.
4320  */
4321 static void
4322 urtw_updateslot(struct ieee80211com *ic)
4323 {
4324         struct urtw_softc *sc = ic->ic_softc;
4325
4326         ieee80211_runtask(ic, &sc->sc_updateslot_task);
4327 }
4328
4329 static void
4330 urtw_updateslottask(void *arg, int pending)
4331 {
4332         struct urtw_softc *sc = arg;
4333         struct ieee80211com *ic = &sc->sc_ic;
4334         int error;
4335
4336         URTW_LOCK(sc);
4337         if ((sc->sc_flags & URTW_RUNNING) == 0) {
4338                 URTW_UNLOCK(sc);
4339                 return;
4340         }
4341         if (sc->sc_flags & URTW_RTL8187B) {
4342                 urtw_write8_m(sc, URTW_SIFS, 0x22);
4343                 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan))
4344                         urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT);
4345                 else
4346                         urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT);
4347                 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b);
4348                 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b);
4349         } else {
4350                 urtw_write8_m(sc, URTW_SIFS, 0x22);
4351                 if (sc->sc_state == IEEE80211_S_ASSOC &&
4352                     ic->ic_flags & IEEE80211_F_SHSLOT)
4353                         urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT);
4354                 else
4355                         urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT);
4356                 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
4357                         urtw_write8_m(sc, URTW_DIFS, 0x14);
4358                         urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14);
4359                         urtw_write8_m(sc, URTW_CW_VAL, 0x73);
4360                 } else {
4361                         urtw_write8_m(sc, URTW_DIFS, 0x24);
4362                         urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24);
4363                         urtw_write8_m(sc, URTW_CW_VAL, 0xa5);
4364                 }
4365         }
4366 fail:
4367         URTW_UNLOCK(sc);
4368 }
4369
4370 static void
4371 urtw_sysctl_node(struct urtw_softc *sc)
4372 {
4373 #define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d)   \
4374         SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
4375         struct sysctl_ctx_list *ctx;
4376         struct sysctl_oid_list *child, *parent;
4377         struct sysctl_oid *tree;
4378         struct urtw_stats *stats = &sc->sc_stats;
4379
4380         ctx = device_get_sysctl_ctx(sc->sc_dev);
4381         child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev));
4382
4383         tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats",
4384             CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "URTW statistics");
4385         parent = SYSCTL_CHILDREN(tree);
4386
4387         /* Tx statistics. */
4388         tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx",
4389             CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Tx MAC statistics");
4390         child = SYSCTL_CHILDREN(tree);
4391         URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0],
4392             "1 Mbit/s");
4393         URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1],
4394             "2 Mbit/s");
4395         URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2],
4396             "5.5 Mbit/s");
4397         URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4],
4398             "6 Mbit/s");
4399         URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5],
4400             "9 Mbit/s");
4401         URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3],
4402             "11 Mbit/s");
4403         URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6],
4404             "12 Mbit/s");
4405         URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7],
4406             "18 Mbit/s");
4407         URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8],
4408             "24 Mbit/s");
4409         URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9],
4410             "36 Mbit/s");
4411         URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10],
4412             "48 Mbit/s");
4413         URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11],
4414             "54 Mbit/s");
4415 #undef URTW_SYSCTL_STAT_ADD32
4416 }
4417
4418 static device_method_t urtw_methods[] = {
4419         DEVMETHOD(device_probe, urtw_match),
4420         DEVMETHOD(device_attach, urtw_attach),
4421         DEVMETHOD(device_detach, urtw_detach),
4422         DEVMETHOD_END
4423 };
4424 static driver_t urtw_driver = {
4425         .name = "urtw",
4426         .methods = urtw_methods,
4427         .size = sizeof(struct urtw_softc)
4428 };
4429 static devclass_t urtw_devclass;
4430
4431 DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0);
4432 MODULE_DEPEND(urtw, wlan, 1, 1, 1);
4433 MODULE_DEPEND(urtw, usb, 1, 1, 1);
4434 MODULE_VERSION(urtw, 1);
4435 USB_PNP_HOST_INFO(urtw_devs);