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[FreeBSD/FreeBSD.git] / sys / dev / usb / wlan / if_urtw.c
1 /*-
2  * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org>
3  *
4  * Permission to use, copy, modify, and distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <sys/cdefs.h>
18 __FBSDID("$FreeBSD$");
19 #include <sys/param.h>
20 #include <sys/sockio.h>
21 #include <sys/sysctl.h>
22 #include <sys/lock.h>
23 #include <sys/mutex.h>
24 #include <sys/mbuf.h>
25 #include <sys/kernel.h>
26 #include <sys/socket.h>
27 #include <sys/systm.h>
28 #include <sys/malloc.h>
29 #include <sys/module.h>
30 #include <sys/bus.h>
31 #include <sys/endian.h>
32 #include <sys/kdb.h>
33
34 #include <machine/bus.h>
35 #include <machine/resource.h>
36 #include <sys/rman.h>
37
38 #include <net/if.h>
39 #include <net/if_var.h>
40 #include <net/if_arp.h>
41 #include <net/ethernet.h>
42 #include <net/if_dl.h>
43 #include <net/if_media.h>
44 #include <net/if_types.h>
45
46 #ifdef INET
47 #include <netinet/in.h>
48 #include <netinet/in_systm.h>
49 #include <netinet/in_var.h>
50 #include <netinet/if_ether.h>
51 #include <netinet/ip.h>
52 #endif
53
54 #include <net80211/ieee80211_var.h>
55 #include <net80211/ieee80211_regdomain.h>
56 #include <net80211/ieee80211_radiotap.h>
57
58 #include <dev/usb/usb.h>
59 #include <dev/usb/usbdi.h>
60 #include "usbdevs.h"
61
62 #include <dev/usb/wlan/if_urtwreg.h>
63 #include <dev/usb/wlan/if_urtwvar.h>
64
65 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L");
66 #ifdef URTW_DEBUG
67 int urtw_debug = 0;
68 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN, &urtw_debug, 0,
69     "control debugging printfs");
70 TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug);
71 enum {
72         URTW_DEBUG_XMIT         = 0x00000001,   /* basic xmit operation */
73         URTW_DEBUG_RECV         = 0x00000002,   /* basic recv operation */
74         URTW_DEBUG_RESET        = 0x00000004,   /* reset processing */
75         URTW_DEBUG_TX_PROC      = 0x00000008,   /* tx ISR proc */
76         URTW_DEBUG_RX_PROC      = 0x00000010,   /* rx ISR proc */
77         URTW_DEBUG_STATE        = 0x00000020,   /* 802.11 state transitions */
78         URTW_DEBUG_STAT         = 0x00000040,   /* statistic */
79         URTW_DEBUG_INIT         = 0x00000080,   /* initialization of dev */
80         URTW_DEBUG_TXSTATUS     = 0x00000100,   /* tx status */
81         URTW_DEBUG_ANY          = 0xffffffff
82 };
83 #define DPRINTF(sc, m, fmt, ...) do {                           \
84         if (sc->sc_debug & (m))                                 \
85                 printf(fmt, __VA_ARGS__);                       \
86 } while (0)
87 #else
88 #define DPRINTF(sc, m, fmt, ...) do {                           \
89         (void) sc;                                              \
90 } while (0)
91 #endif
92 static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG;
93 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW | CTLFLAG_TUN,
94     &urtw_preamble_mode, 0, "set the preable mode (long or short)");
95 TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode);
96
97 /* recognized device vendors/products */
98 #define urtw_lookup(v, p)                                               \
99         ((const struct urtw_type *)usb_lookup(urtw_devs, v, p))
100 #define URTW_DEV_B(v,p)                                                 \
101         { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) }
102 #define URTW_DEV_L(v,p)                                                 \
103         { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) }
104 #define URTW_REV_RTL8187B       0
105 #define URTW_REV_RTL8187L       1
106 static const STRUCT_USB_HOST_ID urtw_devs[] = {
107         URTW_DEV_B(NETGEAR, WG111V3),
108         URTW_DEV_B(REALTEK, RTL8187B_0),
109         URTW_DEV_B(REALTEK, RTL8187B_1),
110         URTW_DEV_B(REALTEK, RTL8187B_2),
111         URTW_DEV_B(SITECOMEU, WL168V4),
112         URTW_DEV_L(ASUS, P5B_WIFI),
113         URTW_DEV_L(BELKIN, F5D7050E),
114         URTW_DEV_L(LINKSYS4, WUSB54GCV2),
115         URTW_DEV_L(NETGEAR, WG111V2),
116         URTW_DEV_L(REALTEK, RTL8187),
117         URTW_DEV_L(SITECOMEU, WL168V1),
118         URTW_DEV_L(SURECOM, EP9001G2A),
119         { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) },
120         { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) },
121         { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) },
122         { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) },
123         { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) },
124         { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) },
125         { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) },
126 #undef URTW_DEV_L
127 #undef URTW_DEV_B
128 };
129
130 #define urtw_read8_m(sc, val, data)     do {                    \
131         error = urtw_read8_c(sc, val, data);                    \
132         if (error != 0)                                         \
133                 goto fail;                                      \
134 } while (0)
135 #define urtw_write8_m(sc, val, data)    do {                    \
136         error = urtw_write8_c(sc, val, data);                   \
137         if (error != 0)                                         \
138                 goto fail;                                      \
139 } while (0)
140 #define urtw_read16_m(sc, val, data)    do {                    \
141         error = urtw_read16_c(sc, val, data);                   \
142         if (error != 0)                                         \
143                 goto fail;                                      \
144 } while (0)
145 #define urtw_write16_m(sc, val, data)   do {                    \
146         error = urtw_write16_c(sc, val, data);                  \
147         if (error != 0)                                         \
148                 goto fail;                                      \
149 } while (0)
150 #define urtw_read32_m(sc, val, data)    do {                    \
151         error = urtw_read32_c(sc, val, data);                   \
152         if (error != 0)                                         \
153                 goto fail;                                      \
154 } while (0)
155 #define urtw_write32_m(sc, val, data)   do {                    \
156         error = urtw_write32_c(sc, val, data);                  \
157         if (error != 0)                                         \
158                 goto fail;                                      \
159 } while (0)
160 #define urtw_8187_write_phy_ofdm(sc, val, data) do {            \
161         error = urtw_8187_write_phy_ofdm_c(sc, val, data);      \
162         if (error != 0)                                         \
163                 goto fail;                                      \
164 } while (0)
165 #define urtw_8187_write_phy_cck(sc, val, data)  do {            \
166         error = urtw_8187_write_phy_cck_c(sc, val, data);       \
167         if (error != 0)                                         \
168                 goto fail;                                      \
169 } while (0)
170 #define urtw_8225_write(sc, val, data)  do {                    \
171         error = urtw_8225_write_c(sc, val, data);               \
172         if (error != 0)                                         \
173                 goto fail;                                      \
174 } while (0)
175
176 struct urtw_pair {
177         uint32_t        reg;
178         uint32_t        val;
179 };
180
181 static uint8_t urtw_8225_agc[] = {
182         0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b,
183         0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90,
184         0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85,
185         0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a,
186         0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f,
187         0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24,
188         0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19,
189         0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
190         0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03,
191         0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
192         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
193         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
194 };
195
196 static uint8_t urtw_8225z2_agc[] = {
197         0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51,
198         0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b,
199         0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25,
200         0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f,
201         0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01,
202         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19,
203         0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23,
204         0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a,
205         0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d,
206         0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31,
207         0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
208         0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31
209 };
210
211 static uint32_t urtw_8225_channel[] = {
212         0x0000,         /* dummy channel 0  */
213         0x085c,         /* 1  */
214         0x08dc,         /* 2  */
215         0x095c,         /* 3  */
216         0x09dc,         /* 4  */
217         0x0a5c,         /* 5  */
218         0x0adc,         /* 6  */
219         0x0b5c,         /* 7  */
220         0x0bdc,         /* 8  */
221         0x0c5c,         /* 9  */
222         0x0cdc,         /* 10  */
223         0x0d5c,         /* 11  */
224         0x0ddc,         /* 12  */
225         0x0e5c,         /* 13  */
226         0x0f72,         /* 14  */
227 };
228
229 static uint8_t urtw_8225_gain[] = {
230         0x23, 0x88, 0x7c, 0xa5,         /* -82dbm  */
231         0x23, 0x88, 0x7c, 0xb5,         /* -82dbm  */
232         0x23, 0x88, 0x7c, 0xc5,         /* -82dbm  */
233         0x33, 0x80, 0x79, 0xc5,         /* -78dbm  */
234         0x43, 0x78, 0x76, 0xc5,         /* -74dbm  */
235         0x53, 0x60, 0x73, 0xc5,         /* -70dbm  */
236         0x63, 0x58, 0x70, 0xc5,         /* -66dbm  */
237 };
238
239 static struct urtw_pair urtw_8225_rf_part1[] = {
240         { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
241         { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a },
242         { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 },
243         { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 },
244 };
245
246 static struct urtw_pair urtw_8225_rf_part2[] = {
247         { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
248         { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
249         { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 },
250         { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 },
251         { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 },
252         { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef },
253         { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 },
254         { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 },
255         { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 },
256         { 0x27, 0x88 }
257 };
258
259 static struct urtw_pair urtw_8225_rf_part3[] = {
260         { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
261         { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b },
262         { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 },
263         { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d },
264         { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e },
265         { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a },
266         { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 }
267 };
268
269 static uint16_t urtw_8225_rxgain[] = {
270         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
271         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
272         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
273         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
274         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
275         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
276         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
277         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
278         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
279         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
280         0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
281         0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
282 };
283
284 static uint8_t urtw_8225_threshold[] = {
285         0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
286 };
287
288 static uint8_t urtw_8225_tx_gain_cck_ofdm[] = {
289         0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
290 };
291
292 static uint8_t urtw_8225_txpwr_cck[] = {
293         0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
294         0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
295         0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
296         0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
297         0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
298         0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
299 };
300
301 static uint8_t urtw_8225_txpwr_cck_ch14[] = {
302         0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
303         0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
304         0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
305         0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
306         0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
307         0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
308 };
309
310 static uint8_t urtw_8225_txpwr_ofdm[]={
311         0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
312 };
313
314 static uint8_t urtw_8225v2_gain_bg[]={
315         0x23, 0x15, 0xa5,               /* -82-1dbm  */
316         0x23, 0x15, 0xb5,               /* -82-2dbm  */
317         0x23, 0x15, 0xc5,               /* -82-3dbm  */
318         0x33, 0x15, 0xc5,               /* -78dbm  */
319         0x43, 0x15, 0xc5,               /* -74dbm  */
320         0x53, 0x15, 0xc5,               /* -70dbm  */
321         0x63, 0x15, 0xc5,               /* -66dbm  */
322 };
323
324 static struct urtw_pair urtw_8225v2_rf_part1[] = {
325         { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
326         { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
327         { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
328         { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
329 };
330
331 static struct urtw_pair urtw_8225v2b_rf_part0[] = {
332         { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
333         { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
334         { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
335         { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
336 };
337
338 static struct urtw_pair urtw_8225v2b_rf_part1[] = {
339         {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00},
340         {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43},
341         {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46},
342         {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00},
343         {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00},
344         {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00},
345         {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b},
346         {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09},
347         {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff},
348         {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e},
349         {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03},
350         {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06},
351         {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00},
352         {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68},
353         {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d},
354         {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08},
355         {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04},
356         {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23},
357         {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08},
358         {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08},
359         {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08},
360         {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56},
361         {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f},
362         {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24},
363         {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07},
364         {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12},
365         {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a},
366         {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80},
367         {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03},
368         {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01},
369         {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00}
370 };
371
372 static struct urtw_pair urtw_8225v2_rf_part2[] = {
373         { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
374         { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
375         { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 },
376         { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 },
377         { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 },
378         { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 },
379         { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 },
380         { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 },
381         { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 },
382         { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 }
383 };
384
385 static struct urtw_pair urtw_8225v2b_rf_part2[] = {
386         { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 },
387         { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 },
388         { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 },
389         { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 },
390         { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 },
391         { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 },
392         { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 },
393         { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 },
394         { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a },
395         { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f },
396         { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 },
397         { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 },
398         { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 },
399         { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e },
400         { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 }
401 };
402
403 static struct urtw_pair urtw_8225v2_rf_part3[] = {
404         { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
405         { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 },
406         { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 },
407         { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 },
408         { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d },
409         { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 },
410         { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 },
411         { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 }
412 };
413
414 static uint16_t urtw_8225v2_rxgain[] = {
415         0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009,
416         0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141,
417         0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183,
418         0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244,
419         0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288,
420         0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345,
421         0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389,
422         0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393,
423         0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d,
424         0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9,
425         0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
426         0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
427 };
428
429 static uint16_t urtw_8225v2b_rxgain[] = {
430         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
431         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
432         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
433         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
434         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
435         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
436         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
437         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
438         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
439         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
440         0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
441         0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
442 };
443
444 static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = {
445         0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
446         0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
447         0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
448         0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
449         0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
450         0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
451 };
452
453 static uint8_t urtw_8225v2_txpwr_cck[] = {
454         0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
455 };
456
457 static uint8_t urtw_8225v2_txpwr_cck_ch14[] = {
458         0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
459 };
460
461 static uint8_t urtw_8225v2b_txpwr_cck[] = {
462         0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04,
463         0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03,
464         0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03,
465         0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03
466 };
467
468 static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = {
469         0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00,
470         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
471         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
472         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00
473 };
474
475 static struct urtw_pair urtw_ratetable[] = {
476         {  2,  0 }, {   4,  1 }, { 11, 2 }, { 12, 4 }, { 18, 5 },
477         { 22,  3 }, {  24,  6 }, { 36, 7 }, { 48, 8 }, { 72, 9 },
478         { 96, 10 }, { 108, 11 }
479 };
480
481 static const uint8_t urtw_8187b_reg_table[][3] = {
482         { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 },
483         { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 },
484         { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 },
485         { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 },
486         { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 },
487         { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 },
488         { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 },
489         { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 },
490         { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 },
491         { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 },
492         { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 },
493         { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 },
494         { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 },
495         { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 },
496         { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 },
497         { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 },
498         { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 },
499         { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 },
500         { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 },
501         { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 },
502         { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 },
503         { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 },
504         { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 },
505         { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 },
506         { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 },
507         { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 },
508         { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 },
509         { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 },
510         { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 },
511         { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 },
512         { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 }
513 };
514
515 static usb_callback_t urtw_bulk_rx_callback;
516 static usb_callback_t urtw_bulk_tx_callback;
517 static usb_callback_t urtw_bulk_tx_status_callback;
518
519 static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = {
520         [URTW_8187B_BULK_RX] = {
521                 .type = UE_BULK,
522                 .endpoint = 0x83,
523                 .direction = UE_DIR_IN,
524                 .bufsize = MCLBYTES,
525                 .flags = {
526                         .ext_buffer = 1,
527                         .pipe_bof = 1,
528                         .short_xfer_ok = 1
529                 },
530                 .callback = urtw_bulk_rx_callback
531         },
532         [URTW_8187B_BULK_TX_STATUS] = {
533                 .type = UE_BULK,
534                 .endpoint = 0x89,
535                 .direction = UE_DIR_IN,
536                 .bufsize = sizeof(uint64_t),
537                 .flags = {
538                         .pipe_bof = 1,
539                         .short_xfer_ok = 1
540                 },
541                 .callback = urtw_bulk_tx_status_callback
542         },
543         [URTW_8187B_BULK_TX_BE] = {
544                 .type = UE_BULK,
545                 .endpoint = URTW_8187B_TXPIPE_BE,
546                 .direction = UE_DIR_OUT,
547                 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
548                 .flags = {
549                         .force_short_xfer = 1,
550                         .pipe_bof = 1,
551                 },
552                 .callback = urtw_bulk_tx_callback,
553                 .timeout = URTW_DATA_TIMEOUT
554         },
555         [URTW_8187B_BULK_TX_BK] = {
556                 .type = UE_BULK,
557                 .endpoint = URTW_8187B_TXPIPE_BK,
558                 .direction = UE_DIR_OUT,
559                 .bufsize = URTW_TX_MAXSIZE,
560                 .flags = {
561                         .ext_buffer = 1,
562                         .force_short_xfer = 1,
563                         .pipe_bof = 1,
564                 },
565                 .callback = urtw_bulk_tx_callback,
566                 .timeout = URTW_DATA_TIMEOUT
567         },
568         [URTW_8187B_BULK_TX_VI] = {
569                 .type = UE_BULK,
570                 .endpoint = URTW_8187B_TXPIPE_VI,
571                 .direction = UE_DIR_OUT,
572                 .bufsize = URTW_TX_MAXSIZE,
573                 .flags = {
574                         .ext_buffer = 1,
575                         .force_short_xfer = 1,
576                         .pipe_bof = 1,
577                 },
578                 .callback = urtw_bulk_tx_callback,
579                 .timeout = URTW_DATA_TIMEOUT
580         },
581         [URTW_8187B_BULK_TX_VO] = {
582                 .type = UE_BULK,
583                 .endpoint = URTW_8187B_TXPIPE_VO,
584                 .direction = UE_DIR_OUT,
585                 .bufsize = URTW_TX_MAXSIZE,
586                 .flags = {
587                         .ext_buffer = 1,
588                         .force_short_xfer = 1,
589                         .pipe_bof = 1,
590                 },
591                 .callback = urtw_bulk_tx_callback,
592                 .timeout = URTW_DATA_TIMEOUT
593         },
594         [URTW_8187B_BULK_TX_EP12] = {
595                 .type = UE_BULK,
596                 .endpoint = 0xc,
597                 .direction = UE_DIR_OUT,
598                 .bufsize = URTW_TX_MAXSIZE,
599                 .flags = {
600                         .ext_buffer = 1,
601                         .force_short_xfer = 1,
602                         .pipe_bof = 1,
603                 },
604                 .callback = urtw_bulk_tx_callback,
605                 .timeout = URTW_DATA_TIMEOUT
606         }
607 };
608
609 static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = {
610         [URTW_8187L_BULK_RX] = {
611                 .type = UE_BULK,
612                 .endpoint = 0x81,
613                 .direction = UE_DIR_IN,
614                 .bufsize = MCLBYTES,
615                 .flags = {
616                         .ext_buffer = 1,
617                         .pipe_bof = 1,
618                         .short_xfer_ok = 1
619                 },
620                 .callback = urtw_bulk_rx_callback
621         },
622         [URTW_8187L_BULK_TX_LOW] = {
623                 .type = UE_BULK,
624                 .endpoint = 0x2,
625                 .direction = UE_DIR_OUT,
626                 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
627                 .flags = {
628                         .force_short_xfer = 1,
629                         .pipe_bof = 1,
630                 },
631                 .callback = urtw_bulk_tx_callback,
632                 .timeout = URTW_DATA_TIMEOUT
633         },
634         [URTW_8187L_BULK_TX_NORMAL] = {
635                 .type = UE_BULK,
636                 .endpoint = 0x3,
637                 .direction = UE_DIR_OUT,
638                 .bufsize = URTW_TX_MAXSIZE,
639                 .flags = {
640                         .ext_buffer = 1,
641                         .force_short_xfer = 1,
642                         .pipe_bof = 1,
643                 },
644                 .callback = urtw_bulk_tx_callback,
645                 .timeout = URTW_DATA_TIMEOUT
646         },
647 };
648
649 static struct ieee80211vap *urtw_vap_create(struct ieee80211com *,
650                             const char [IFNAMSIZ], int, enum ieee80211_opmode,
651                             int, const uint8_t [IEEE80211_ADDR_LEN],
652                             const uint8_t [IEEE80211_ADDR_LEN]);
653 static void             urtw_vap_delete(struct ieee80211vap *);
654 static void             urtw_init(void *);
655 static void             urtw_stop(struct ifnet *);
656 static void             urtw_stop_locked(struct ifnet *);
657 static int              urtw_ioctl(struct ifnet *, u_long, caddr_t);
658 static void             urtw_start(struct ifnet *);
659 static int              urtw_alloc_rx_data_list(struct urtw_softc *);
660 static int              urtw_alloc_tx_data_list(struct urtw_softc *);
661 static int              urtw_raw_xmit(struct ieee80211_node *, struct mbuf *,
662                             const struct ieee80211_bpf_params *);
663 static void             urtw_scan_start(struct ieee80211com *);
664 static void             urtw_scan_end(struct ieee80211com *);
665 static void             urtw_set_channel(struct ieee80211com *);
666 static void             urtw_update_mcast(struct ifnet *);
667 static int              urtw_tx_start(struct urtw_softc *,
668                             struct ieee80211_node *, struct mbuf *,
669                             struct urtw_data *, int);
670 static int              urtw_newstate(struct ieee80211vap *,
671                             enum ieee80211_state, int);
672 static void             urtw_led_ch(void *);
673 static void             urtw_ledtask(void *, int);
674 static void             urtw_watchdog(void *);
675 static void             urtw_set_multi(void *);
676 static int              urtw_isbmode(uint16_t);
677 static uint16_t         urtw_rate2rtl(uint32_t);
678 static uint16_t         urtw_rtl2rate(uint32_t);
679 static usb_error_t      urtw_set_rate(struct urtw_softc *);
680 static usb_error_t      urtw_update_msr(struct urtw_softc *);
681 static usb_error_t      urtw_read8_c(struct urtw_softc *, int, uint8_t *);
682 static usb_error_t      urtw_read16_c(struct urtw_softc *, int, uint16_t *);
683 static usb_error_t      urtw_read32_c(struct urtw_softc *, int, uint32_t *);
684 static usb_error_t      urtw_write8_c(struct urtw_softc *, int, uint8_t);
685 static usb_error_t      urtw_write16_c(struct urtw_softc *, int, uint16_t);
686 static usb_error_t      urtw_write32_c(struct urtw_softc *, int, uint32_t);
687 static usb_error_t      urtw_eprom_cs(struct urtw_softc *, int);
688 static usb_error_t      urtw_eprom_ck(struct urtw_softc *);
689 static usb_error_t      urtw_eprom_sendbits(struct urtw_softc *, int16_t *,
690                             int);
691 static usb_error_t      urtw_eprom_read32(struct urtw_softc *, uint32_t,
692                             uint32_t *);
693 static usb_error_t      urtw_eprom_readbit(struct urtw_softc *, int16_t *);
694 static usb_error_t      urtw_eprom_writebit(struct urtw_softc *, int16_t);
695 static usb_error_t      urtw_get_macaddr(struct urtw_softc *);
696 static usb_error_t      urtw_get_txpwr(struct urtw_softc *);
697 static usb_error_t      urtw_get_rfchip(struct urtw_softc *);
698 static usb_error_t      urtw_led_init(struct urtw_softc *);
699 static usb_error_t      urtw_8185_rf_pins_enable(struct urtw_softc *);
700 static usb_error_t      urtw_8185_tx_antenna(struct urtw_softc *, uint8_t);
701 static usb_error_t      urtw_8187_write_phy(struct urtw_softc *, uint8_t,
702                             uint32_t);
703 static usb_error_t      urtw_8187_write_phy_ofdm_c(struct urtw_softc *,
704                             uint8_t, uint32_t);
705 static usb_error_t      urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t,
706                             uint32_t);
707 static usb_error_t      urtw_8225_setgain(struct urtw_softc *, int16_t);
708 static usb_error_t      urtw_8225_usb_init(struct urtw_softc *);
709 static usb_error_t      urtw_8225_write_c(struct urtw_softc *, uint8_t,
710                             uint16_t);
711 static usb_error_t      urtw_8225_write_s16(struct urtw_softc *, uint8_t, int,
712                             uint16_t *);
713 static usb_error_t      urtw_8225_read(struct urtw_softc *, uint8_t,
714                             uint32_t *);
715 static usb_error_t      urtw_8225_rf_init(struct urtw_softc *);
716 static usb_error_t      urtw_8225_rf_set_chan(struct urtw_softc *, int);
717 static usb_error_t      urtw_8225_rf_set_sens(struct urtw_softc *, int);
718 static usb_error_t      urtw_8225_set_txpwrlvl(struct urtw_softc *, int);
719 static usb_error_t      urtw_8225_rf_stop(struct urtw_softc *);
720 static usb_error_t      urtw_8225v2_rf_init(struct urtw_softc *);
721 static usb_error_t      urtw_8225v2_rf_set_chan(struct urtw_softc *, int);
722 static usb_error_t      urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int);
723 static usb_error_t      urtw_8225v2_setgain(struct urtw_softc *, int16_t);
724 static usb_error_t      urtw_8225_isv2(struct urtw_softc *, int *);
725 static usb_error_t      urtw_8225v2b_rf_init(struct urtw_softc *);
726 static usb_error_t      urtw_8225v2b_rf_set_chan(struct urtw_softc *, int);
727 static usb_error_t      urtw_read8e(struct urtw_softc *, int, uint8_t *);
728 static usb_error_t      urtw_write8e(struct urtw_softc *, int, uint8_t);
729 static usb_error_t      urtw_8180_set_anaparam(struct urtw_softc *, uint32_t);
730 static usb_error_t      urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t);
731 static usb_error_t      urtw_intr_enable(struct urtw_softc *);
732 static usb_error_t      urtw_intr_disable(struct urtw_softc *);
733 static usb_error_t      urtw_reset(struct urtw_softc *);
734 static usb_error_t      urtw_led_on(struct urtw_softc *, int);
735 static usb_error_t      urtw_led_ctl(struct urtw_softc *, int);
736 static usb_error_t      urtw_led_blink(struct urtw_softc *);
737 static usb_error_t      urtw_led_mode0(struct urtw_softc *, int);
738 static usb_error_t      urtw_led_mode1(struct urtw_softc *, int);
739 static usb_error_t      urtw_led_mode2(struct urtw_softc *, int);
740 static usb_error_t      urtw_led_mode3(struct urtw_softc *, int);
741 static usb_error_t      urtw_rx_setconf(struct urtw_softc *);
742 static usb_error_t      urtw_rx_enable(struct urtw_softc *);
743 static usb_error_t      urtw_tx_enable(struct urtw_softc *sc);
744 static void             urtw_free_tx_data_list(struct urtw_softc *);
745 static void             urtw_free_rx_data_list(struct urtw_softc *);
746 static void             urtw_free_data_list(struct urtw_softc *,
747                             struct urtw_data data[], int, int);
748 static usb_error_t      urtw_adapter_start(struct urtw_softc *);
749 static usb_error_t      urtw_adapter_start_b(struct urtw_softc *);
750 static usb_error_t      urtw_set_mode(struct urtw_softc *, uint32_t);
751 static usb_error_t      urtw_8187b_cmd_reset(struct urtw_softc *);
752 static usb_error_t      urtw_do_request(struct urtw_softc *,
753                             struct usb_device_request *, void *);
754 static usb_error_t      urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int);
755 static usb_error_t      urtw_led_off(struct urtw_softc *, int);
756 static void             urtw_abort_xfers(struct urtw_softc *);
757 static struct urtw_data *
758                         urtw_getbuf(struct urtw_softc *sc);
759 static int              urtw_compute_txtime(uint16_t, uint16_t, uint8_t,
760                             uint8_t);
761 static void             urtw_updateslot(struct ifnet *);
762 static void             urtw_updateslottask(void *, int);
763 static void             urtw_sysctl_node(struct urtw_softc *);
764
765 static int
766 urtw_match(device_t dev)
767 {
768         struct usb_attach_arg *uaa = device_get_ivars(dev);
769
770         if (uaa->usb_mode != USB_MODE_HOST)
771                 return (ENXIO);
772         if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX)
773                 return (ENXIO);
774         if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX)
775                 return (ENXIO);
776
777         return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa));
778 }
779
780 static int
781 urtw_attach(device_t dev)
782 {
783         const struct usb_config *setup_start;
784         int ret = ENXIO;
785         struct urtw_softc *sc = device_get_softc(dev);
786         struct usb_attach_arg *uaa = device_get_ivars(dev);
787         struct ieee80211com *ic;
788         struct ifnet *ifp;
789         uint8_t bands, iface_index = URTW_IFACE_INDEX;          /* XXX */
790         uint16_t n_setup;
791         uint32_t data;
792         usb_error_t error;
793
794         device_set_usb_desc(dev);
795
796         sc->sc_dev = dev;
797         sc->sc_udev = uaa->device;
798         if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B)
799                 sc->sc_flags |= URTW_RTL8187B;
800 #ifdef URTW_DEBUG
801         sc->sc_debug = urtw_debug;
802 #endif
803
804         mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK,
805             MTX_DEF);
806         usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0);
807         TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc);
808         TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc);
809         callout_init(&sc->sc_watchdog_ch, 0);
810
811         if (sc->sc_flags & URTW_RTL8187B) {
812                 setup_start = urtw_8187b_usbconfig;
813                 n_setup = URTW_8187B_N_XFERS;
814         } else {
815                 setup_start = urtw_8187l_usbconfig;
816                 n_setup = URTW_8187L_N_XFERS;
817         }
818
819         error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
820             setup_start, n_setup, sc, &sc->sc_mtx);
821         if (error) {
822                 device_printf(dev, "could not allocate USB transfers, "
823                     "err=%s\n", usbd_errstr(error));
824                 ret = ENXIO;
825                 goto fail0;
826         }
827
828         if (sc->sc_flags & URTW_RTL8187B) {
829                 sc->sc_tx_dma_buf = 
830                     usbd_xfer_get_frame_buffer(sc->sc_xfer[
831                     URTW_8187B_BULK_TX_BE], 0);
832         } else {
833                 sc->sc_tx_dma_buf =
834                     usbd_xfer_get_frame_buffer(sc->sc_xfer[
835                     URTW_8187L_BULK_TX_LOW], 0);
836         }
837
838         URTW_LOCK(sc);
839
840         urtw_read32_m(sc, URTW_RX, &data);
841         sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 :
842             URTW_EEPROM_93C46;
843
844         error = urtw_get_rfchip(sc);
845         if (error != 0)
846                 goto fail;
847         error = urtw_get_macaddr(sc);
848         if (error != 0)
849                 goto fail;
850         error = urtw_get_txpwr(sc);
851         if (error != 0)
852                 goto fail;
853         error = urtw_led_init(sc);
854         if (error != 0)
855                 goto fail;
856
857         URTW_UNLOCK(sc);
858
859         sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY;
860         sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY;
861         sc->sc_currate = 3;
862         sc->sc_preamble_mode = urtw_preamble_mode;
863
864         ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
865         if (ifp == NULL) {
866                 device_printf(sc->sc_dev, "can not allocate ifnet\n");
867                 ret = ENOMEM;
868                 goto fail1;
869         }
870
871         ifp->if_softc = sc;
872         if_initname(ifp, "urtw", device_get_unit(sc->sc_dev));
873         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
874         ifp->if_init = urtw_init;
875         ifp->if_ioctl = urtw_ioctl;
876         ifp->if_start = urtw_start;
877         /* XXX URTW_TX_DATA_LIST_COUNT */
878         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
879         ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
880         IFQ_SET_READY(&ifp->if_snd);
881
882         ic = ifp->if_l2com;
883         ic->ic_ifp = ifp;
884         ic->ic_phytype = IEEE80211_T_OFDM;      /* not only, but not used */
885         ic->ic_opmode = IEEE80211_M_STA;        /* default to BSS mode */
886
887         /* set device capabilities */
888         ic->ic_caps =
889             IEEE80211_C_STA |           /* station mode */
890             IEEE80211_C_MONITOR |       /* monitor mode supported */
891             IEEE80211_C_TXPMGT |        /* tx power management */
892             IEEE80211_C_SHPREAMBLE |    /* short preamble supported */
893             IEEE80211_C_SHSLOT |        /* short slot time supported */
894             IEEE80211_C_BGSCAN |        /* capable of bg scanning */
895             IEEE80211_C_WPA;            /* 802.11i */
896
897         bands = 0;
898         setbit(&bands, IEEE80211_MODE_11B);
899         setbit(&bands, IEEE80211_MODE_11G);
900         ieee80211_init_channels(ic, NULL, &bands);
901
902         ieee80211_ifattach(ic, sc->sc_bssid);
903         ic->ic_raw_xmit = urtw_raw_xmit;
904         ic->ic_scan_start = urtw_scan_start;
905         ic->ic_scan_end = urtw_scan_end;
906         ic->ic_set_channel = urtw_set_channel;
907         ic->ic_updateslot = urtw_updateslot;
908         ic->ic_vap_create = urtw_vap_create;
909         ic->ic_vap_delete = urtw_vap_delete;
910         ic->ic_update_mcast = urtw_update_mcast;
911
912         ieee80211_radiotap_attach(ic,
913             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
914             URTW_TX_RADIOTAP_PRESENT,
915             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
916             URTW_RX_RADIOTAP_PRESENT);
917
918         urtw_sysctl_node(sc);
919
920         if (bootverbose)
921                 ieee80211_announce(ic);
922         return (0);
923
924 fail:   URTW_UNLOCK(sc);
925 fail1:  usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ?
926             URTW_8187B_N_XFERS : URTW_8187L_N_XFERS);
927 fail0:
928         return (ret);
929 }
930
931 static int
932 urtw_detach(device_t dev)
933 {
934         struct urtw_softc *sc = device_get_softc(dev);
935         struct ifnet *ifp = sc->sc_ifp;
936         struct ieee80211com *ic = ifp->if_l2com;
937         unsigned int x;
938         unsigned int n_xfers;
939
940         /* Prevent further ioctls */
941         URTW_LOCK(sc);
942         sc->sc_flags |= URTW_DETACHED;
943         URTW_UNLOCK(sc);
944
945         urtw_stop(ifp);
946
947         ieee80211_draintask(ic, &sc->sc_updateslot_task);
948         ieee80211_draintask(ic, &sc->sc_led_task);
949
950         usb_callout_drain(&sc->sc_led_ch);
951         callout_drain(&sc->sc_watchdog_ch);
952
953         n_xfers = (sc->sc_flags & URTW_RTL8187B) ?
954             URTW_8187B_N_XFERS : URTW_8187L_N_XFERS;
955
956         /* prevent further allocations from RX/TX data lists */
957         URTW_LOCK(sc);
958         STAILQ_INIT(&sc->sc_tx_active);
959         STAILQ_INIT(&sc->sc_tx_inactive);
960         STAILQ_INIT(&sc->sc_tx_pending);
961
962         STAILQ_INIT(&sc->sc_rx_active);
963         STAILQ_INIT(&sc->sc_rx_inactive);
964         URTW_UNLOCK(sc);
965
966         /* drain USB transfers */
967         for (x = 0; x != n_xfers; x++)
968                 usbd_transfer_drain(sc->sc_xfer[x]);
969
970         /* free data buffers */
971         URTW_LOCK(sc);
972         urtw_free_tx_data_list(sc);
973         urtw_free_rx_data_list(sc);
974         URTW_UNLOCK(sc);
975
976         /* free USB transfers and some data buffers */
977         usbd_transfer_unsetup(sc->sc_xfer, n_xfers);
978
979         ieee80211_ifdetach(ic);
980         if_free(ifp);
981         mtx_destroy(&sc->sc_mtx);
982         return (0);
983 }
984
985 static void
986 urtw_free_tx_data_list(struct urtw_softc *sc)
987 {
988         urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0);
989 }
990
991 static void
992 urtw_free_rx_data_list(struct urtw_softc *sc)
993 {
994         urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1);
995 }
996
997 static void
998 urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata,
999     int fillmbuf)
1000 {
1001         int i;
1002
1003         for (i = 0; i < ndata; i++) {
1004                 struct urtw_data *dp = &data[i];
1005
1006                 if (fillmbuf == 1) {
1007                         if (dp->m != NULL) {
1008                                 m_freem(dp->m);
1009                                 dp->m = NULL;
1010                                 dp->buf = NULL;
1011                         }
1012                 } else {
1013                         dp->buf = NULL;
1014                 }
1015                 if (dp->ni != NULL) {
1016                         ieee80211_free_node(dp->ni);
1017                         dp->ni = NULL;
1018                 }
1019         }
1020 }
1021
1022 static struct ieee80211vap *
1023 urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1024     enum ieee80211_opmode opmode, int flags,
1025     const uint8_t bssid[IEEE80211_ADDR_LEN],
1026     const uint8_t mac[IEEE80211_ADDR_LEN])
1027 {
1028         struct urtw_vap *uvp;
1029         struct ieee80211vap *vap;
1030
1031         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
1032                 return (NULL);
1033         uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap),
1034             M_80211_VAP, M_NOWAIT | M_ZERO);
1035         if (uvp == NULL)
1036                 return (NULL);
1037         vap = &uvp->vap;
1038         /* enable s/w bmiss handling for sta mode */
1039         ieee80211_vap_setup(ic, vap, name, unit, opmode,
1040             flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
1041
1042         /* override state transition machine */
1043         uvp->newstate = vap->iv_newstate;
1044         vap->iv_newstate = urtw_newstate;
1045
1046         /* complete setup */
1047         ieee80211_vap_attach(vap, ieee80211_media_change,
1048             ieee80211_media_status);
1049         ic->ic_opmode = opmode;
1050         return (vap);
1051 }
1052
1053 static void
1054 urtw_vap_delete(struct ieee80211vap *vap)
1055 {
1056         struct urtw_vap *uvp = URTW_VAP(vap);
1057
1058         ieee80211_vap_detach(vap);
1059         free(uvp, M_80211_VAP);
1060 }
1061
1062 static void
1063 urtw_init_locked(void *arg)
1064 {
1065         int ret;
1066         struct urtw_softc *sc = arg;
1067         struct ifnet *ifp = sc->sc_ifp;
1068         usb_error_t error;
1069
1070         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1071                 urtw_stop_locked(ifp);
1072
1073         error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) :
1074             urtw_adapter_start(sc);
1075         if (error != 0)
1076                 goto fail;
1077
1078         /* reset softc variables  */
1079         sc->sc_txtimer = 0;
1080
1081         if (!(sc->sc_flags & URTW_INIT_ONCE)) {
1082                 ret = urtw_alloc_rx_data_list(sc);
1083                 if (ret != 0)
1084                         goto fail;
1085                 ret = urtw_alloc_tx_data_list(sc);
1086                 if (ret != 0)
1087                         goto fail;
1088                 sc->sc_flags |= URTW_INIT_ONCE;
1089         }
1090
1091         error = urtw_rx_enable(sc);
1092         if (error != 0)
1093                 goto fail;
1094         error = urtw_tx_enable(sc);
1095         if (error != 0)
1096                 goto fail;
1097
1098         if (sc->sc_flags & URTW_RTL8187B)
1099                 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]);
1100
1101         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1102         ifp->if_drv_flags |= IFF_DRV_RUNNING;
1103
1104         callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1105 fail:
1106         return;
1107 }
1108
1109 static void
1110 urtw_init(void *arg)
1111 {
1112         struct urtw_softc *sc = arg;
1113
1114         URTW_LOCK(sc);
1115         urtw_init_locked(arg);
1116         URTW_UNLOCK(sc);
1117 }
1118
1119 static usb_error_t
1120 urtw_adapter_start_b(struct urtw_softc *sc)
1121 {
1122 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
1123         uint8_t data8;
1124         usb_error_t error;
1125
1126         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1127         if (error)
1128                 goto fail;
1129
1130         urtw_read8_m(sc, URTW_CONFIG3, &data8);
1131         urtw_write8_m(sc, URTW_CONFIG3,
1132             data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT);
1133         urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON);
1134         urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON);
1135         urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON);
1136
1137         urtw_write8_m(sc, 0x61, 0x10);
1138         urtw_read8_m(sc, 0x62, &data8);
1139         urtw_write8_m(sc, 0x62, data8 & ~(1 << 5));
1140         urtw_write8_m(sc, 0x62, data8 | (1 << 5));
1141
1142         urtw_read8_m(sc, URTW_CONFIG3, &data8);
1143         data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE;
1144         urtw_write8_m(sc, URTW_CONFIG3, data8);
1145
1146         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1147         if (error)
1148                 goto fail;
1149
1150         error = urtw_8187b_cmd_reset(sc);
1151         if (error)
1152                 goto fail;
1153
1154         error = sc->sc_rf_init(sc);
1155         if (error != 0)
1156                 goto fail;
1157         urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1158
1159         /* fix RTL8187B RX stall */
1160         error = urtw_intr_enable(sc);
1161         if (error)
1162                 goto fail;
1163
1164         error = urtw_write8e(sc, 0x41, 0xf4);
1165         if (error)
1166                 goto fail;
1167         error = urtw_write8e(sc, 0x40, 0x00);
1168         if (error)
1169                 goto fail;
1170         error = urtw_write8e(sc, 0x42, 0x00);
1171         if (error)
1172                 goto fail;
1173         error = urtw_write8e(sc, 0x42, 0x01);
1174         if (error)
1175                 goto fail;
1176         error = urtw_write8e(sc, 0x40, 0x0f);
1177         if (error)
1178                 goto fail;
1179         error = urtw_write8e(sc, 0x42, 0x00);
1180         if (error)
1181                 goto fail;
1182         error = urtw_write8e(sc, 0x42, 0x01);
1183         if (error)
1184                 goto fail;
1185
1186         urtw_read8_m(sc, 0xdb, &data8);
1187         urtw_write8_m(sc, 0xdb, data8 | (1 << 2));
1188         urtw_write16_m(sc, 0x372, 0x59fa);
1189         urtw_write16_m(sc, 0x374, 0x59d2);
1190         urtw_write16_m(sc, 0x376, 0x59d2);
1191         urtw_write16_m(sc, 0x378, 0x19fa);
1192         urtw_write16_m(sc, 0x37a, 0x19fa);
1193         urtw_write16_m(sc, 0x37c, 0x00d0);
1194         urtw_write8_m(sc, 0x61, 0);
1195
1196         urtw_write8_m(sc, 0x180, 0x0f);
1197         urtw_write8_m(sc, 0x183, 0x03);
1198         urtw_write8_m(sc, 0xda, 0x10);
1199         urtw_write8_m(sc, 0x24d, 0x08);
1200         urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b);
1201
1202         urtw_write16_m(sc, 0x1ec, 0x800);       /* RX MAX SIZE */
1203 fail:
1204         return (error);
1205 #undef N
1206 }
1207
1208 static usb_error_t
1209 urtw_adapter_start(struct urtw_softc *sc)
1210 {
1211         usb_error_t error;
1212
1213         error = urtw_reset(sc);
1214         if (error)
1215                 goto fail;
1216
1217         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0);
1218         urtw_write8_m(sc, URTW_GPIO, 0);
1219
1220         /* for led  */
1221         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1222         error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON);
1223         if (error != 0)
1224                 goto fail;
1225
1226         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1227         if (error)
1228                 goto fail;
1229         /* applying MAC address again.  */
1230         urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]);
1231         urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff);
1232         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1233         if (error)
1234                 goto fail;
1235
1236         error = urtw_update_msr(sc);
1237         if (error)
1238                 goto fail;
1239
1240         urtw_write32_m(sc, URTW_INT_TIMEOUT, 0);
1241         urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
1242         urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1);
1243         error = urtw_set_rate(sc);
1244         if (error != 0)
1245                 goto fail;
1246
1247         error = sc->sc_rf_init(sc);
1248         if (error != 0)
1249                 goto fail;
1250         if (sc->sc_rf_set_sens != NULL)
1251                 sc->sc_rf_set_sens(sc, sc->sc_sens);
1252
1253         /* XXX correct? to call write16  */
1254         urtw_write16_m(sc, URTW_PSR, 1);
1255         urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10);
1256         urtw_write8_m(sc, URTW_TALLY_SEL, 0x80);
1257         urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60);
1258         /* XXX correct? to call write16  */
1259         urtw_write16_m(sc, URTW_PSR, 0);
1260         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1261
1262         error = urtw_intr_enable(sc);
1263         if (error != 0)
1264                 goto fail;
1265
1266 fail:
1267         return (error);
1268 }
1269
1270 static usb_error_t
1271 urtw_set_mode(struct urtw_softc *sc, uint32_t mode)
1272 {
1273         uint8_t data;
1274         usb_error_t error;
1275
1276         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
1277         data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT);
1278         data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK);
1279         urtw_write8_m(sc, URTW_EPROM_CMD, data);
1280 fail:
1281         return (error);
1282 }
1283
1284 static usb_error_t
1285 urtw_8187b_cmd_reset(struct urtw_softc *sc)
1286 {
1287         int i;
1288         uint8_t data8;
1289         usb_error_t error;
1290
1291         /* XXX the code can be duplicate with urtw_reset().  */
1292         urtw_read8_m(sc, URTW_CMD, &data8);
1293         data8 = (data8 & 0x2) | URTW_CMD_RST;
1294         urtw_write8_m(sc, URTW_CMD, data8);
1295
1296         for (i = 0; i < 20; i++) {
1297                 usb_pause_mtx(&sc->sc_mtx, 2);
1298                 urtw_read8_m(sc, URTW_CMD, &data8);
1299                 if (!(data8 & URTW_CMD_RST))
1300                         break;
1301         }
1302         if (i >= 20) {
1303                 device_printf(sc->sc_dev, "reset timeout\n");
1304                 goto fail;
1305         }
1306 fail:
1307         return (error);
1308 }
1309
1310 static usb_error_t
1311 urtw_do_request(struct urtw_softc *sc,
1312     struct usb_device_request *req, void *data)
1313 {
1314         usb_error_t err;
1315         int ntries = 10;
1316
1317         URTW_ASSERT_LOCKED(sc);
1318
1319         while (ntries--) {
1320                 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
1321                     req, data, 0, NULL, 250 /* ms */);
1322                 if (err == 0)
1323                         break;
1324
1325                 DPRINTF(sc, URTW_DEBUG_INIT,
1326                     "Control request failed, %s (retrying)\n",
1327                     usbd_errstr(err));
1328                 usb_pause_mtx(&sc->sc_mtx, hz / 100);
1329         }
1330         return (err);
1331 }
1332
1333 static void
1334 urtw_stop_locked(struct ifnet *ifp)
1335 {
1336         struct urtw_softc *sc = ifp->if_softc;
1337         uint8_t data8;
1338         usb_error_t error;
1339
1340         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1341
1342         error = urtw_intr_disable(sc);
1343         if (error)
1344                 goto fail;
1345         urtw_read8_m(sc, URTW_CMD, &data8);
1346         data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1347         urtw_write8_m(sc, URTW_CMD, data8);
1348
1349         error = sc->sc_rf_stop(sc);
1350         if (error != 0)
1351                 goto fail;
1352
1353         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1354         if (error)
1355                 goto fail;
1356         urtw_read8_m(sc, URTW_CONFIG4, &data8);
1357         urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF);
1358         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1359         if (error)
1360                 goto fail;
1361 fail:
1362         if (error)
1363                 device_printf(sc->sc_dev, "failed to stop (%s)\n",
1364                     usbd_errstr(error));
1365
1366         usb_callout_stop(&sc->sc_led_ch);
1367         callout_stop(&sc->sc_watchdog_ch);
1368
1369         urtw_abort_xfers(sc);
1370 }
1371
1372 static void
1373 urtw_stop(struct ifnet *ifp)
1374 {
1375         struct urtw_softc *sc = ifp->if_softc;
1376
1377         URTW_LOCK(sc);
1378         urtw_stop_locked(ifp);
1379         URTW_UNLOCK(sc);
1380 }
1381
1382 static void
1383 urtw_abort_xfers(struct urtw_softc *sc)
1384 {
1385         int i, max;
1386
1387         URTW_ASSERT_LOCKED(sc);
1388
1389         max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS :
1390             URTW_8187L_N_XFERS;
1391
1392         /* abort any pending transfers */
1393         for (i = 0; i < max; i++)
1394                 usbd_transfer_stop(sc->sc_xfer[i]);
1395 }
1396
1397 static int
1398 urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1399 {
1400         struct urtw_softc *sc = ifp->if_softc;
1401         struct ieee80211com *ic = ifp->if_l2com;
1402         struct ifreq *ifr = (struct ifreq *) data;
1403         int error;
1404         int startall = 0;
1405
1406         URTW_LOCK(sc);
1407         error = (sc->sc_flags & URTW_DETACHED) ? ENXIO : 0;
1408         URTW_UNLOCK(sc);
1409         if (error)
1410                 return (error);
1411
1412         switch (cmd) {
1413         case SIOCSIFFLAGS:
1414                 if (ifp->if_flags & IFF_UP) {
1415                         if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1416                                 if ((ifp->if_flags ^ sc->sc_if_flags) &
1417                                     (IFF_ALLMULTI | IFF_PROMISC))
1418                                         urtw_set_multi(sc);
1419                         } else {
1420                                 urtw_init(ifp->if_softc);
1421                                 startall = 1;
1422                         }
1423                 } else {
1424                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1425                                 urtw_stop(ifp);
1426                 }
1427                 sc->sc_if_flags = ifp->if_flags;
1428                 if (startall)
1429                         ieee80211_start_all(ic);
1430                 break;
1431         case SIOCGIFMEDIA:
1432                 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1433                 break;
1434         case SIOCGIFADDR:
1435                 error = ether_ioctl(ifp, cmd, data);
1436                 break;
1437         default:
1438                 error = EINVAL;
1439                 break;
1440         }
1441         return (error);
1442 }
1443
1444 static void
1445 urtw_start(struct ifnet *ifp)
1446 {
1447         struct urtw_data *bf;
1448         struct urtw_softc *sc = ifp->if_softc;
1449         struct ieee80211_node *ni;
1450         struct mbuf *m;
1451
1452         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1453                 return;
1454
1455         URTW_LOCK(sc);
1456         for (;;) {
1457                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1458                 if (m == NULL)
1459                         break;
1460                 bf = urtw_getbuf(sc);
1461                 if (bf == NULL) {
1462                         IFQ_DRV_PREPEND(&ifp->if_snd, m);
1463                         break;
1464                 }
1465
1466                 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1467                 m->m_pkthdr.rcvif = NULL;
1468
1469                 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) {
1470                         ifp->if_oerrors++;
1471                         STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1472                         ieee80211_free_node(ni);
1473                         break;
1474                 }
1475
1476                 sc->sc_txtimer = 5;
1477                 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1478         }
1479         URTW_UNLOCK(sc);
1480 }
1481
1482 static int
1483 urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[],
1484     int ndata, int maxsz, void *dma_buf)
1485 {
1486         int i, error;
1487
1488         for (i = 0; i < ndata; i++) {
1489                 struct urtw_data *dp = &data[i];
1490
1491                 dp->sc = sc;
1492                 if (dma_buf == NULL) {
1493                         dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1494                         if (dp->m == NULL) {
1495                                 device_printf(sc->sc_dev,
1496                                     "could not allocate rx mbuf\n");
1497                                 error = ENOMEM;
1498                                 goto fail;
1499                         }
1500                         dp->buf = mtod(dp->m, uint8_t *);
1501                 } else {
1502                         dp->m = NULL;
1503                         dp->buf = ((uint8_t *)dma_buf) +
1504                             (i * maxsz);
1505                 }
1506                 dp->ni = NULL;
1507         }
1508         return (0);
1509
1510 fail:   urtw_free_data_list(sc, data, ndata, 1);
1511         return (error);
1512 }
1513
1514 static int
1515 urtw_alloc_rx_data_list(struct urtw_softc *sc)
1516 {
1517         int error, i;
1518
1519         error = urtw_alloc_data_list(sc,
1520             sc->sc_rx, URTW_RX_DATA_LIST_COUNT,
1521             MCLBYTES, NULL /* mbufs */);
1522         if (error != 0)
1523                 return (error);
1524
1525         STAILQ_INIT(&sc->sc_rx_active);
1526         STAILQ_INIT(&sc->sc_rx_inactive);
1527
1528         for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++)
1529                 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1530
1531         return (0);
1532 }
1533
1534 static int
1535 urtw_alloc_tx_data_list(struct urtw_softc *sc)
1536 {
1537         int error, i;
1538
1539         error = urtw_alloc_data_list(sc,
1540             sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE,
1541             sc->sc_tx_dma_buf /* no mbufs */);
1542         if (error != 0)
1543                 return (error);
1544
1545         STAILQ_INIT(&sc->sc_tx_active);
1546         STAILQ_INIT(&sc->sc_tx_inactive);
1547         STAILQ_INIT(&sc->sc_tx_pending);
1548
1549         for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++)
1550                 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i],
1551                     next);
1552
1553         return (0);
1554 }
1555
1556 static int
1557 urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1558     const struct ieee80211_bpf_params *params)
1559 {
1560         struct ieee80211com *ic = ni->ni_ic;
1561         struct ifnet *ifp = ic->ic_ifp;
1562         struct urtw_data *bf;
1563         struct urtw_softc *sc = ifp->if_softc;
1564
1565         /* prevent management frames from being sent if we're not ready */
1566         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1567                 m_freem(m);
1568                 ieee80211_free_node(ni);
1569                 return ENETDOWN;
1570         }
1571         URTW_LOCK(sc);
1572         bf = urtw_getbuf(sc);
1573         if (bf == NULL) {
1574                 ieee80211_free_node(ni);
1575                 m_freem(m);
1576                 URTW_UNLOCK(sc);
1577                 return (ENOBUFS);               /* XXX */
1578         }
1579
1580         ifp->if_opackets++;
1581         if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) {
1582                 ieee80211_free_node(ni);
1583                 ifp->if_oerrors++;
1584                 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1585                 URTW_UNLOCK(sc);
1586                 return (EIO);
1587         }
1588         URTW_UNLOCK(sc);
1589
1590         sc->sc_txtimer = 5;
1591         return (0);
1592 }
1593
1594 static void
1595 urtw_scan_start(struct ieee80211com *ic)
1596 {
1597
1598         /* XXX do nothing?  */
1599 }
1600
1601 static void
1602 urtw_scan_end(struct ieee80211com *ic)
1603 {
1604
1605         /* XXX do nothing?  */
1606 }
1607
1608 static void
1609 urtw_set_channel(struct ieee80211com *ic)
1610 {
1611         struct urtw_softc *sc  = ic->ic_ifp->if_softc;
1612         struct ifnet *ifp = sc->sc_ifp;
1613         uint32_t data, orig;
1614         usb_error_t error;
1615
1616         /*
1617          * if the user set a channel explicitly using ifconfig(8) this function
1618          * can be called earlier than we're expected that in some cases the
1619          * initialization would be failed if setting a channel is called before
1620          * the init have done.
1621          */
1622         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1623                 return;
1624
1625         if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan)
1626                 return;
1627
1628         URTW_LOCK(sc);
1629
1630         /*
1631          * during changing th channel we need to temporarily be disable 
1632          * TX.
1633          */
1634         urtw_read32_m(sc, URTW_TX_CONF, &orig);
1635         data = orig & ~URTW_TX_LOOPBACK_MASK;
1636         urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC);
1637
1638         error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan));
1639         if (error != 0)
1640                 goto fail;
1641         usb_pause_mtx(&sc->sc_mtx, 10);
1642         urtw_write32_m(sc, URTW_TX_CONF, orig);
1643
1644         urtw_write16_m(sc, URTW_ATIM_WND, 2);
1645         urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1646         urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
1647         urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1648
1649 fail:
1650         URTW_UNLOCK(sc);
1651
1652         sc->sc_curchan = ic->ic_curchan;
1653
1654         if (error != 0)
1655                 device_printf(sc->sc_dev, "could not change the channel\n");
1656 }
1657
1658 static void
1659 urtw_update_mcast(struct ifnet *ifp)
1660 {
1661
1662         /* XXX do nothing?  */
1663 }
1664
1665 static int
1666 urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0,
1667     struct urtw_data *data, int prior)
1668 {
1669         struct ifnet *ifp = sc->sc_ifp;
1670         struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
1671         struct ieee80211_key *k;
1672         const struct ieee80211_txparam *tp;
1673         struct ieee80211com *ic = ifp->if_l2com;
1674         struct ieee80211vap *vap = ni->ni_vap;
1675         struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = {
1676                 sc->sc_xfer[URTW_8187B_BULK_TX_BE],
1677                 sc->sc_xfer[URTW_8187B_BULK_TX_BK],
1678                 sc->sc_xfer[URTW_8187B_BULK_TX_VI],
1679                 sc->sc_xfer[URTW_8187B_BULK_TX_VO]
1680         };
1681         struct usb_xfer *xfer;
1682         int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate,
1683             pkttime = 0, txdur = 0, isshort = 0, xferlen;
1684         uint16_t acktime, rtstime, ctstime;
1685         uint32_t flags;
1686         usb_error_t error;
1687
1688         URTW_ASSERT_LOCKED(sc);
1689
1690         /*
1691          * Software crypto.
1692          */
1693         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1694                 k = ieee80211_crypto_encap(ni, m0);
1695                 if (k == NULL) {
1696                         device_printf(sc->sc_dev,
1697                             "ieee80211_crypto_encap returns NULL.\n");
1698                         /* XXX we don't expect the fragmented frames  */
1699                         m_freem(m0);
1700                         return (ENOBUFS);
1701                 }
1702
1703                 /* in case packet header moved, reset pointer */
1704                 wh = mtod(m0, struct ieee80211_frame *);
1705         }
1706
1707         if (ieee80211_radiotap_active_vap(vap)) {
1708                 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap;
1709
1710                 /* XXX Are variables correct?  */
1711                 tap->wt_flags = 0;
1712                 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1713                 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1714
1715                 ieee80211_radiotap_tx(vap, m0);
1716         }
1717
1718         if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT ||
1719             (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) {
1720                 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1721                 rate = tp->mgmtrate;
1722         } else {
1723                 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1724                 /* for data frames */
1725                 if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1726                         rate = tp->mcastrate;
1727                 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1728                         rate = tp->ucastrate;
1729                 else
1730                         rate = urtw_rtl2rate(sc->sc_currate);
1731         }
1732
1733         sc->sc_stats.txrates[sc->sc_currate]++;
1734
1735         if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1736                 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1737                     IEEE80211_CRC_LEN, rate, 0, 0);
1738         else {
1739                 acktime = urtw_compute_txtime(14, 2,0, 0);
1740                 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) {
1741                         rtsenable = 1;
1742                         ctsenable = 0;
1743                         rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0);
1744                         ctstime = urtw_compute_txtime(14, 2, 0, 0);
1745                         pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1746                             IEEE80211_CRC_LEN, rate, 0, isshort);
1747                         rtsdur = ctstime + pkttime + acktime +
1748                             3 * URTW_ASIFS_TIME;
1749                         txdur = rtstime + rtsdur;
1750                 } else {
1751                         rtsenable = ctsenable = rtsdur = 0;
1752                         pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1753                             IEEE80211_CRC_LEN, rate, 0, isshort);
1754                         txdur = pkttime + URTW_ASIFS_TIME + acktime;
1755                 }
1756
1757                 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1758                         dur = urtw_compute_txtime(m0->m_pkthdr.len +
1759                             IEEE80211_CRC_LEN, rate, 0, isshort) +
1760                             3 * URTW_ASIFS_TIME +
1761                             2 * acktime;
1762                 else
1763                         dur = URTW_ASIFS_TIME + acktime;
1764         }
1765         *(uint16_t *)wh->i_dur = htole16(dur);
1766
1767         xferlen = m0->m_pkthdr.len;
1768         xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3);
1769         if ((0 == xferlen % 64) || (0 == xferlen % 512))
1770                 xferlen += 1;
1771
1772         memset(data->buf, 0, URTW_TX_MAXSIZE);
1773         flags = m0->m_pkthdr.len & 0xfff;
1774         flags |= URTW_TX_FLAG_NO_ENC;
1775         if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1776             (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) &&
1777             (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) &&
1778             (sc->sc_currate != 0))
1779                 flags |= URTW_TX_FLAG_SPLCP;
1780         if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1781                 flags |= URTW_TX_FLAG_MOREFRAG;
1782
1783         flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT;
1784
1785         if (sc->sc_flags & URTW_RTL8187B) {
1786                 struct urtw_8187b_txhdr *tx;
1787
1788                 tx = (struct urtw_8187b_txhdr *)data->buf;
1789                 if (ctsenable)
1790                         flags |= URTW_TX_FLAG_CTS;
1791                 if (rtsenable) {
1792                         flags |= URTW_TX_FLAG_RTS;
1793                         flags |= (urtw_rate2rtl(11) & 0xf) <<
1794                             URTW_TX_FLAG_RTSRATE_SHIFT;
1795                         tx->rtsdur = rtsdur;
1796                 }
1797                 tx->flag = htole32(flags);
1798                 tx->txdur = txdur;
1799                 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1800                     IEEE80211_FC0_TYPE_MGT &&
1801                     (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1802                     IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1803                         tx->retry = 1;
1804                 else
1805                         tx->retry = URTW_TX_MAXRETRY;
1806                 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1807         } else {
1808                 struct urtw_8187l_txhdr *tx;
1809
1810                 tx = (struct urtw_8187l_txhdr *)data->buf;
1811                 if (rtsenable) {
1812                         flags |= URTW_TX_FLAG_RTS;
1813                         tx->rtsdur = rtsdur;
1814                 }
1815                 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT;
1816                 tx->flag = htole32(flags);
1817                 tx->retry = 3;          /* CW minimum  */
1818                 tx->retry = 7 << 4;     /* CW maximum  */
1819                 tx->retry = URTW_TX_MAXRETRY << 8;      /* retry limitation  */
1820                 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1821         }
1822
1823         data->buflen = xferlen;
1824         data->ni = ni;
1825         data->m = m0;
1826
1827         if (sc->sc_flags & URTW_RTL8187B) {
1828                 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1829                 case IEEE80211_FC0_TYPE_CTL:
1830                 case IEEE80211_FC0_TYPE_MGT:
1831                         xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12];
1832                         break;
1833                 default:
1834                         KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX,
1835                             ("unsupported WME pipe %d", M_WME_GETAC(m0)));
1836                         xfer = rtl8187b_pipes[M_WME_GETAC(m0)];
1837                         break;
1838                 }
1839         } else
1840                 xfer = (prior == URTW_PRIORITY_LOW) ?
1841                     sc->sc_xfer[URTW_8187L_BULK_TX_LOW] :
1842                     sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL];
1843
1844         STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next);
1845         usbd_transfer_start(xfer);
1846
1847         error = urtw_led_ctl(sc, URTW_LED_CTL_TX);
1848         if (error != 0)
1849                 device_printf(sc->sc_dev, "could not control LED (%d)\n",
1850                     error);
1851         return (0);
1852 }
1853
1854 static int
1855 urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1856 {
1857         struct ieee80211com *ic = vap->iv_ic;
1858         struct urtw_softc *sc = ic->ic_ifp->if_softc;
1859         struct urtw_vap *uvp = URTW_VAP(vap);
1860         struct ieee80211_node *ni;
1861         usb_error_t error = 0;
1862
1863         DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1864             ieee80211_state_name[vap->iv_state],
1865             ieee80211_state_name[nstate]);
1866
1867         sc->sc_state = nstate;
1868
1869         IEEE80211_UNLOCK(ic);
1870         URTW_LOCK(sc);
1871         usb_callout_stop(&sc->sc_led_ch);
1872         callout_stop(&sc->sc_watchdog_ch);
1873
1874         switch (nstate) {
1875         case IEEE80211_S_INIT:
1876         case IEEE80211_S_SCAN:
1877         case IEEE80211_S_AUTH:
1878         case IEEE80211_S_ASSOC:
1879                 break;
1880         case IEEE80211_S_RUN:
1881                 ni = ieee80211_ref_node(vap->iv_bss);
1882                 /* setting bssid.  */
1883                 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]);
1884                 urtw_write16_m(sc, URTW_BSSID + 4,
1885                     ((uint16_t *)ni->ni_bssid)[2]);
1886                 urtw_update_msr(sc);
1887                 /* XXX maybe the below would be incorrect.  */
1888                 urtw_write16_m(sc, URTW_ATIM_WND, 2);
1889                 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1890                 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64);
1891                 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1892                 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK);
1893                 if (error != 0)
1894                         device_printf(sc->sc_dev,
1895                             "could not control LED (%d)\n", error);
1896                 ieee80211_free_node(ni);
1897                 break;
1898         default:
1899                 break;
1900         }
1901 fail:
1902         URTW_UNLOCK(sc);
1903         IEEE80211_LOCK(ic);
1904         return (uvp->newstate(vap, nstate, arg));
1905 }
1906
1907 static void
1908 urtw_watchdog(void *arg)
1909 {
1910         struct urtw_softc *sc = arg;
1911         struct ifnet *ifp = sc->sc_ifp;
1912
1913         if (sc->sc_txtimer > 0) {
1914                 if (--sc->sc_txtimer == 0) {
1915                         device_printf(sc->sc_dev, "device timeout\n");
1916                         ifp->if_oerrors++;
1917                         return;
1918                 }
1919                 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1920         }
1921 }
1922
1923 static void
1924 urtw_set_multi(void *arg)
1925 {
1926         struct urtw_softc *sc = arg;
1927         struct ifnet *ifp = sc->sc_ifp;
1928
1929         if (!(ifp->if_flags & IFF_UP))
1930                 return;
1931
1932         /*
1933          * XXX don't know how to set a device.  Lack of docs.  Just try to set
1934          * IFF_ALLMULTI flag here.
1935          */
1936         ifp->if_flags |= IFF_ALLMULTI;
1937 }
1938
1939 static usb_error_t
1940 urtw_set_rate(struct urtw_softc *sc)
1941 {
1942         int i, basic_rate, min_rr_rate, max_rr_rate;
1943         uint16_t data;
1944         usb_error_t error;
1945
1946         basic_rate = urtw_rate2rtl(48);
1947         min_rr_rate = urtw_rate2rtl(12);
1948         max_rr_rate = urtw_rate2rtl(48);
1949
1950         urtw_write8_m(sc, URTW_RESP_RATE,
1951             max_rr_rate << URTW_RESP_MAX_RATE_SHIFT |
1952             min_rr_rate << URTW_RESP_MIN_RATE_SHIFT);
1953
1954         urtw_read16_m(sc, URTW_BRSR, &data);
1955         data &= ~URTW_BRSR_MBR_8185;
1956
1957         for (i = 0; i <= basic_rate; i++)
1958                 data |= (1 << i);
1959
1960         urtw_write16_m(sc, URTW_BRSR, data);
1961 fail:
1962         return (error);
1963 }
1964
1965 static uint16_t
1966 urtw_rate2rtl(uint32_t rate)
1967 {
1968 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
1969         int i;
1970
1971         for (i = 0; i < N(urtw_ratetable); i++) {
1972                 if (rate == urtw_ratetable[i].reg)
1973                         return urtw_ratetable[i].val;
1974         }
1975
1976         return (3);
1977 #undef N
1978 }
1979
1980 static uint16_t
1981 urtw_rtl2rate(uint32_t rate)
1982 {
1983 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
1984         int i;
1985
1986         for (i = 0; i < N(urtw_ratetable); i++) {
1987                 if (rate == urtw_ratetable[i].val)
1988                         return urtw_ratetable[i].reg;
1989         }
1990
1991         return (0);
1992 #undef N
1993 }
1994
1995 static usb_error_t
1996 urtw_update_msr(struct urtw_softc *sc)
1997 {
1998         struct ifnet *ifp = sc->sc_ifp;
1999         struct ieee80211com *ic = ifp->if_l2com;
2000         uint8_t data;
2001         usb_error_t error;
2002
2003         urtw_read8_m(sc, URTW_MSR, &data);
2004         data &= ~URTW_MSR_LINK_MASK;
2005
2006         if (sc->sc_state == IEEE80211_S_RUN) {
2007                 switch (ic->ic_opmode) {
2008                 case IEEE80211_M_STA:
2009                 case IEEE80211_M_MONITOR:
2010                         data |= URTW_MSR_LINK_STA;
2011                         if (sc->sc_flags & URTW_RTL8187B)
2012                                 data |= URTW_MSR_LINK_ENEDCA;
2013                         break;
2014                 case IEEE80211_M_IBSS:
2015                         data |= URTW_MSR_LINK_ADHOC;
2016                         break;
2017                 case IEEE80211_M_HOSTAP:
2018                         data |= URTW_MSR_LINK_HOSTAP;
2019                         break;
2020                 default:
2021                         DPRINTF(sc, URTW_DEBUG_STATE,
2022                             "unsupported operation mode 0x%x\n",
2023                             ic->ic_opmode);
2024                         error = USB_ERR_INVAL;
2025                         goto fail;
2026                 }
2027         } else
2028                 data |= URTW_MSR_LINK_NONE;
2029
2030         urtw_write8_m(sc, URTW_MSR, data);
2031 fail:
2032         return (error);
2033 }
2034
2035 static usb_error_t
2036 urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data)
2037 {
2038         struct usb_device_request req;
2039         usb_error_t error;
2040
2041         URTW_ASSERT_LOCKED(sc);
2042
2043         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2044         req.bRequest = URTW_8187_GETREGS_REQ;
2045         USETW(req.wValue, (val & 0xff) | 0xff00);
2046         USETW(req.wIndex, (val >> 8) & 0x3);
2047         USETW(req.wLength, sizeof(uint8_t));
2048
2049         error = urtw_do_request(sc, &req, data);
2050         return (error);
2051 }
2052
2053 static usb_error_t
2054 urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data)
2055 {
2056         struct usb_device_request req;
2057         usb_error_t error;
2058
2059         URTW_ASSERT_LOCKED(sc);
2060
2061         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2062         req.bRequest = URTW_8187_GETREGS_REQ;
2063         USETW(req.wValue, (val & 0xff) | 0xff00);
2064         USETW(req.wIndex, (val >> 8) & 0x3);
2065         USETW(req.wLength, sizeof(uint16_t));
2066
2067         error = urtw_do_request(sc, &req, data);
2068         return (error);
2069 }
2070
2071 static usb_error_t
2072 urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data)
2073 {
2074         struct usb_device_request req;
2075         usb_error_t error;
2076
2077         URTW_ASSERT_LOCKED(sc);
2078
2079         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2080         req.bRequest = URTW_8187_GETREGS_REQ;
2081         USETW(req.wValue, (val & 0xff) | 0xff00);
2082         USETW(req.wIndex, (val >> 8) & 0x3);
2083         USETW(req.wLength, sizeof(uint32_t));
2084
2085         error = urtw_do_request(sc, &req, data);
2086         return (error);
2087 }
2088
2089 static usb_error_t
2090 urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data)
2091 {
2092         struct usb_device_request req;
2093
2094         URTW_ASSERT_LOCKED(sc);
2095
2096         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2097         req.bRequest = URTW_8187_SETREGS_REQ;
2098         USETW(req.wValue, (val & 0xff) | 0xff00);
2099         USETW(req.wIndex, (val >> 8) & 0x3);
2100         USETW(req.wLength, sizeof(uint8_t));
2101
2102         return (urtw_do_request(sc, &req, &data));
2103 }
2104
2105 static usb_error_t
2106 urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data)
2107 {
2108         struct usb_device_request req;
2109
2110         URTW_ASSERT_LOCKED(sc);
2111
2112         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2113         req.bRequest = URTW_8187_SETREGS_REQ;
2114         USETW(req.wValue, (val & 0xff) | 0xff00);
2115         USETW(req.wIndex, (val >> 8) & 0x3);
2116         USETW(req.wLength, sizeof(uint16_t));
2117
2118         return (urtw_do_request(sc, &req, &data));
2119 }
2120
2121 static usb_error_t
2122 urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data)
2123 {
2124         struct usb_device_request req;
2125
2126         URTW_ASSERT_LOCKED(sc);
2127
2128         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2129         req.bRequest = URTW_8187_SETREGS_REQ;
2130         USETW(req.wValue, (val & 0xff) | 0xff00);
2131         USETW(req.wIndex, (val >> 8) & 0x3);
2132         USETW(req.wLength, sizeof(uint32_t));
2133
2134         return (urtw_do_request(sc, &req, &data));
2135 }
2136
2137 static usb_error_t
2138 urtw_get_macaddr(struct urtw_softc *sc)
2139 {
2140         uint32_t data;
2141         usb_error_t error;
2142
2143         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data);
2144         if (error != 0)
2145                 goto fail;
2146         sc->sc_bssid[0] = data & 0xff;
2147         sc->sc_bssid[1] = (data & 0xff00) >> 8;
2148         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data);
2149         if (error != 0)
2150                 goto fail;
2151         sc->sc_bssid[2] = data & 0xff;
2152         sc->sc_bssid[3] = (data & 0xff00) >> 8;
2153         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data);
2154         if (error != 0)
2155                 goto fail;
2156         sc->sc_bssid[4] = data & 0xff;
2157         sc->sc_bssid[5] = (data & 0xff00) >> 8;
2158 fail:
2159         return (error);
2160 }
2161
2162 static usb_error_t
2163 urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data)
2164 {
2165 #define URTW_READCMD_LEN                3
2166         int addrlen, i;
2167         int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 };
2168         usb_error_t error;
2169
2170         /* NB: make sure the buffer is initialized  */
2171         *data = 0;
2172
2173         /* enable EPROM programming */
2174         urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE);
2175         DELAY(URTW_EPROM_DELAY);
2176
2177         error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE);
2178         if (error != 0)
2179                 goto fail;
2180         error = urtw_eprom_ck(sc);
2181         if (error != 0)
2182                 goto fail;
2183         error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN);
2184         if (error != 0)
2185                 goto fail;
2186         if (sc->sc_epromtype == URTW_EEPROM_93C56) {
2187                 addrlen = 8;
2188                 addrstr[0] = addr & (1 << 7);
2189                 addrstr[1] = addr & (1 << 6);
2190                 addrstr[2] = addr & (1 << 5);
2191                 addrstr[3] = addr & (1 << 4);
2192                 addrstr[4] = addr & (1 << 3);
2193                 addrstr[5] = addr & (1 << 2);
2194                 addrstr[6] = addr & (1 << 1);
2195                 addrstr[7] = addr & (1 << 0);
2196         } else {
2197                 addrlen=6;
2198                 addrstr[0] = addr & (1 << 5);
2199                 addrstr[1] = addr & (1 << 4);
2200                 addrstr[2] = addr & (1 << 3);
2201                 addrstr[3] = addr & (1 << 2);
2202                 addrstr[4] = addr & (1 << 1);
2203                 addrstr[5] = addr & (1 << 0);
2204         }
2205         error = urtw_eprom_sendbits(sc, addrstr, addrlen);
2206         if (error != 0)
2207                 goto fail;
2208
2209         error = urtw_eprom_writebit(sc, 0);
2210         if (error != 0)
2211                 goto fail;
2212
2213         for (i = 0; i < 16; i++) {
2214                 error = urtw_eprom_ck(sc);
2215                 if (error != 0)
2216                         goto fail;
2217                 error = urtw_eprom_readbit(sc, &data16);
2218                 if (error != 0)
2219                         goto fail;
2220
2221                 (*data) |= (data16 << (15 - i));
2222         }
2223
2224         error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE);
2225         if (error != 0)
2226                 goto fail;
2227         error = urtw_eprom_ck(sc);
2228         if (error != 0)
2229                 goto fail;
2230
2231         /* now disable EPROM programming */
2232         urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE);
2233 fail:
2234         return (error);
2235 #undef URTW_READCMD_LEN
2236 }
2237
2238 static usb_error_t
2239 urtw_eprom_cs(struct urtw_softc *sc, int able)
2240 {
2241         uint8_t data;
2242         usb_error_t error;
2243
2244         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2245         if (able == URTW_EPROM_ENABLE)
2246                 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS);
2247         else
2248                 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS);
2249         DELAY(URTW_EPROM_DELAY);
2250 fail:
2251         return (error);
2252 }
2253
2254 static usb_error_t
2255 urtw_eprom_ck(struct urtw_softc *sc)
2256 {
2257         uint8_t data;
2258         usb_error_t error;
2259
2260         /* masking  */
2261         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2262         urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK);
2263         DELAY(URTW_EPROM_DELAY);
2264         /* unmasking  */
2265         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2266         urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK);
2267         DELAY(URTW_EPROM_DELAY);
2268 fail:
2269         return (error);
2270 }
2271
2272 static usb_error_t
2273 urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data)
2274 {
2275         uint8_t data8;
2276         usb_error_t error;
2277
2278         urtw_read8_m(sc, URTW_EPROM_CMD, &data8);
2279         *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0;
2280         DELAY(URTW_EPROM_DELAY);
2281
2282 fail:
2283         return (error);
2284 }
2285
2286 static usb_error_t
2287 urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit)
2288 {
2289         uint8_t data;
2290         usb_error_t error;
2291
2292         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2293         if (bit != 0)
2294                 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT);
2295         else
2296                 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT);
2297         DELAY(URTW_EPROM_DELAY);
2298 fail:
2299         return (error);
2300 }
2301
2302 static usb_error_t
2303 urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen)
2304 {
2305         int i = 0;
2306         usb_error_t error = 0;
2307
2308         for (i = 0; i < buflen; i++) {
2309                 error = urtw_eprom_writebit(sc, buf[i]);
2310                 if (error != 0)
2311                         goto fail;
2312                 error = urtw_eprom_ck(sc);
2313                 if (error != 0)
2314                         goto fail;
2315         }
2316 fail:
2317         return (error);
2318 }
2319
2320
2321 static usb_error_t
2322 urtw_get_txpwr(struct urtw_softc *sc)
2323 {
2324         int i, j;
2325         uint32_t data;
2326         usb_error_t error;
2327
2328         error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data);
2329         if (error != 0)
2330                 goto fail;
2331         sc->sc_txpwr_cck_base = data & 0xf;
2332         sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf;
2333
2334         for (i = 1, j = 0; i < 6; i += 2, j++) {
2335                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data);
2336                 if (error != 0)
2337                         goto fail;
2338                 sc->sc_txpwr_cck[i] = data & 0xf;
2339                 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8;
2340                 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4;
2341                 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12;
2342         }
2343         for (i = 1, j = 0; i < 4; i += 2, j++) {
2344                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data);
2345                 if (error != 0)
2346                         goto fail;
2347                 sc->sc_txpwr_cck[i + 6] = data & 0xf;
2348                 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8;
2349                 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4;
2350                 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12;
2351         }
2352         if (sc->sc_flags & URTW_RTL8187B) {
2353                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data);
2354                 if (error != 0)
2355                         goto fail;
2356                 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf;
2357                 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4;
2358                 error = urtw_eprom_read32(sc, 0x0a, &data);
2359                 if (error != 0)
2360                         goto fail;
2361                 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf;
2362                 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4;
2363                 error = urtw_eprom_read32(sc, 0x1c, &data);
2364                 if (error != 0)
2365                         goto fail;
2366                 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf;
2367                 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8;
2368                 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4;
2369                 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12;
2370         } else {
2371                 for (i = 1, j = 0; i < 4; i += 2, j++) {
2372                         error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j,
2373                             &data);
2374                         if (error != 0)
2375                                 goto fail;
2376                         sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf;
2377                         sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8;
2378                         sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4;
2379                         sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12;
2380                 }
2381         }
2382 fail:
2383         return (error);
2384 }
2385
2386
2387 static usb_error_t
2388 urtw_get_rfchip(struct urtw_softc *sc)
2389 {
2390         int ret;
2391         uint8_t data8;
2392         uint32_t data;
2393         usb_error_t error;
2394
2395         if (sc->sc_flags & URTW_RTL8187B) {
2396                 urtw_read8_m(sc, 0xe1, &data8);
2397                 switch (data8) {
2398                 case 0:
2399                         sc->sc_flags |= URTW_RTL8187B_REV_B;
2400                         break;
2401                 case 1:
2402                         sc->sc_flags |= URTW_RTL8187B_REV_D;
2403                         break;
2404                 case 2:
2405                         sc->sc_flags |= URTW_RTL8187B_REV_E;
2406                         break;
2407                 default:
2408                         device_printf(sc->sc_dev, "unknown type: %#x\n", data8);
2409                         sc->sc_flags |= URTW_RTL8187B_REV_B;
2410                         break;
2411                 }
2412         } else {
2413                 urtw_read32_m(sc, URTW_TX_CONF, &data);
2414                 switch (data & URTW_TX_HWMASK) {
2415                 case URTW_TX_R8187vD_B:
2416                         sc->sc_flags |= URTW_RTL8187B;
2417                         break;
2418                 case URTW_TX_R8187vD:
2419                         break;
2420                 default:
2421                         device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n",
2422                             data & URTW_TX_HWMASK);
2423                         break;
2424                 }
2425         }
2426
2427         error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data);
2428         if (error != 0)
2429                 goto fail;
2430         switch (data & 0xff) {
2431         case URTW_EPROM_RFCHIPID_RTL8225U:
2432                 error = urtw_8225_isv2(sc, &ret);
2433                 if (error != 0)
2434                         goto fail;
2435                 if (ret == 0) {
2436                         sc->sc_rf_init = urtw_8225_rf_init;
2437                         sc->sc_rf_set_sens = urtw_8225_rf_set_sens;
2438                         sc->sc_rf_set_chan = urtw_8225_rf_set_chan;
2439                         sc->sc_rf_stop = urtw_8225_rf_stop;
2440                 } else {
2441                         sc->sc_rf_init = urtw_8225v2_rf_init;
2442                         sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan;
2443                         sc->sc_rf_stop = urtw_8225_rf_stop;
2444                 }
2445                 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2446                 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2447                 break;
2448         case URTW_EPROM_RFCHIPID_RTL8225Z2:
2449                 sc->sc_rf_init = urtw_8225v2b_rf_init;
2450                 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan;
2451                 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2452                 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2453                 sc->sc_rf_stop = urtw_8225_rf_stop;
2454                 break;
2455         default:
2456                 DPRINTF(sc, URTW_DEBUG_STATE,
2457                     "unsupported RF chip %d\n", data & 0xff);
2458                 error = USB_ERR_INVAL;
2459                 goto fail;
2460         }
2461
2462         device_printf(sc->sc_dev, "%s rf %s hwrev %s\n",
2463             (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l",
2464             ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" :
2465             "rtl8225z2",
2466             (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" :
2467                 (data8 == 1) ? "d" : "e") : "none");
2468
2469 fail:
2470         return (error);
2471 }
2472
2473
2474 static usb_error_t
2475 urtw_led_init(struct urtw_softc *sc)
2476 {
2477         uint32_t rev;
2478         usb_error_t error;
2479
2480         urtw_read8_m(sc, URTW_PSR, &sc->sc_psr);
2481         error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev);
2482         if (error != 0)
2483                 goto fail;
2484
2485         switch (rev & URTW_EPROM_CID_MASK) {
2486         case URTW_EPROM_CID_ALPHA0:
2487                 sc->sc_strategy = URTW_SW_LED_MODE1;
2488                 break;
2489         case URTW_EPROM_CID_SERCOMM_PS:
2490                 sc->sc_strategy = URTW_SW_LED_MODE3;
2491                 break;
2492         case URTW_EPROM_CID_HW_LED:
2493                 sc->sc_strategy = URTW_HW_LED;
2494                 break;
2495         case URTW_EPROM_CID_RSVD0:
2496         case URTW_EPROM_CID_RSVD1:
2497         default:
2498                 sc->sc_strategy = URTW_SW_LED_MODE0;
2499                 break;
2500         }
2501
2502         sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0;
2503
2504 fail:
2505         return (error);
2506 }
2507
2508
2509 static usb_error_t
2510 urtw_8225_rf_init(struct urtw_softc *sc)
2511 {
2512 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
2513         int i;
2514         uint16_t data;
2515         usb_error_t error;
2516
2517         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2518         if (error)
2519                 goto fail;
2520
2521         error = urtw_8225_usb_init(sc);
2522         if (error)
2523                 goto fail;
2524
2525         urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2526         urtw_read16_m(sc, URTW_BRSR, &data);            /* XXX ??? */
2527         urtw_write16_m(sc, URTW_BRSR, 0xffff);
2528         urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2529
2530         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2531         if (error)
2532                 goto fail;
2533         urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2534         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2535         if (error)
2536                 goto fail;
2537
2538         error = urtw_8185_rf_pins_enable(sc);
2539         if (error)
2540                 goto fail;
2541         usb_pause_mtx(&sc->sc_mtx, 1000);
2542
2543         for (i = 0; i < N(urtw_8225_rf_part1); i++) {
2544                 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg,
2545                     urtw_8225_rf_part1[i].val);
2546                 usb_pause_mtx(&sc->sc_mtx, 1);
2547         }
2548         usb_pause_mtx(&sc->sc_mtx, 100);
2549         urtw_8225_write(sc,
2550             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2551         usb_pause_mtx(&sc->sc_mtx, 200);
2552         urtw_8225_write(sc,
2553             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2554         usb_pause_mtx(&sc->sc_mtx, 200);
2555         urtw_8225_write(sc,
2556             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3);
2557
2558         for (i = 0; i < 95; i++) {
2559                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2560                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]);
2561         }
2562
2563         urtw_8225_write(sc,
2564             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4);
2565         urtw_8225_write(sc,
2566             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5);
2567
2568         for (i = 0; i < 128; i++) {
2569                 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2570                 usb_pause_mtx(&sc->sc_mtx, 1);
2571                 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2572                 usb_pause_mtx(&sc->sc_mtx, 1);
2573         }
2574
2575         for (i = 0; i < N(urtw_8225_rf_part2); i++) {
2576                 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg,
2577                     urtw_8225_rf_part2[i].val);
2578                 usb_pause_mtx(&sc->sc_mtx, 1);
2579         }
2580
2581         error = urtw_8225_setgain(sc, 4);
2582         if (error)
2583                 goto fail;
2584
2585         for (i = 0; i < N(urtw_8225_rf_part3); i++) {
2586                 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg,
2587                     urtw_8225_rf_part3[i].val);
2588                 usb_pause_mtx(&sc->sc_mtx, 1);
2589         }
2590
2591         urtw_write8_m(sc, URTW_TESTR, 0x0d);
2592
2593         error = urtw_8225_set_txpwrlvl(sc, 1);
2594         if (error)
2595                 goto fail;
2596
2597         urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
2598         usb_pause_mtx(&sc->sc_mtx, 1);
2599         urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
2600         usb_pause_mtx(&sc->sc_mtx, 1);
2601
2602         /* TX ant A, 0x0 for B */
2603         error = urtw_8185_tx_antenna(sc, 0x3);
2604         if (error)
2605                 goto fail;
2606         urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
2607
2608         error = urtw_8225_rf_set_chan(sc, 1);
2609 fail:
2610         return (error);
2611 #undef N
2612 }
2613
2614 static usb_error_t
2615 urtw_8185_rf_pins_enable(struct urtw_softc *sc)
2616 {
2617         usb_error_t error = 0;
2618
2619         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7);
2620 fail:
2621         return (error);
2622 }
2623
2624 static usb_error_t
2625 urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant)
2626 {
2627         usb_error_t error;
2628
2629         urtw_write8_m(sc, URTW_TX_ANTENNA, ant);
2630         usb_pause_mtx(&sc->sc_mtx, 1);
2631 fail:
2632         return (error);
2633 }
2634
2635 static usb_error_t
2636 urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2637 {
2638
2639         data = data & 0xff;
2640         return urtw_8187_write_phy(sc, addr, data);
2641 }
2642
2643 static usb_error_t
2644 urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2645 {
2646
2647         data = data & 0xff;
2648         return urtw_8187_write_phy(sc, addr, data | 0x10000);
2649 }
2650
2651 static usb_error_t
2652 urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2653 {
2654         uint32_t phyw;
2655         usb_error_t error;
2656
2657         phyw = ((data << 8) | (addr | 0x80));
2658         urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24));
2659         urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16));
2660         urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8));
2661         urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff)));
2662         usb_pause_mtx(&sc->sc_mtx, 1);
2663 fail:
2664         return (error);
2665 }
2666
2667 static usb_error_t
2668 urtw_8225_setgain(struct urtw_softc *sc, int16_t gain)
2669 {
2670         usb_error_t error;
2671
2672         urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]);
2673         urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]);
2674         urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]);
2675         urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]);
2676 fail:
2677         return (error);
2678 }
2679
2680 static usb_error_t
2681 urtw_8225_usb_init(struct urtw_softc *sc)
2682 {
2683         uint8_t data;
2684         usb_error_t error;
2685
2686         urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0);
2687         urtw_write8_m(sc, URTW_GPIO, 0);
2688         error = urtw_read8e(sc, 0x53, &data);
2689         if (error)
2690                 goto fail;
2691         error = urtw_write8e(sc, 0x53, data | (1 << 7));
2692         if (error)
2693                 goto fail;
2694         urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4);
2695         urtw_write8_m(sc, URTW_GPIO, 0x20);
2696         urtw_write8_m(sc, URTW_GP_ENABLE, 0);
2697
2698         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80);
2699         urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80);
2700         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80);
2701
2702         usb_pause_mtx(&sc->sc_mtx, 500);
2703 fail:
2704         return (error);
2705 }
2706
2707 static usb_error_t
2708 urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data)
2709 {
2710         uint16_t d80, d82, d84;
2711         usb_error_t error;
2712
2713         urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80);
2714         d80 &= URTW_RF_PINS_MAGIC1;
2715         urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82);
2716         urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84);
2717         d84 &= URTW_RF_PINS_MAGIC2;
2718         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3);
2719         urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3);
2720         DELAY(10);
2721
2722         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2723         DELAY(2);
2724         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80);
2725         DELAY(10);
2726
2727         error = urtw_8225_write_s16(sc, addr, 0x8225, &data);
2728         if (error != 0)
2729                 goto fail;
2730
2731         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2732         DELAY(10);
2733         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2734         urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84);
2735         usb_pause_mtx(&sc->sc_mtx, 2);
2736 fail:
2737         return (error);
2738 }
2739
2740 static usb_error_t
2741 urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index,
2742     uint16_t *data)
2743 {
2744         uint8_t buf[2];
2745         uint16_t data16;
2746         struct usb_device_request req;
2747         usb_error_t error = 0;
2748
2749         data16 = *data;
2750
2751         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2752         req.bRequest = URTW_8187_SETREGS_REQ;
2753         USETW(req.wValue, addr);
2754         USETW(req.wIndex, index);
2755         USETW(req.wLength, sizeof(uint16_t));
2756         buf[0] = (data16 & 0x00ff);
2757         buf[1] = (data16 & 0xff00) >> 8;
2758
2759         error = urtw_do_request(sc, &req, buf);
2760
2761         return (error);
2762 }
2763
2764 static usb_error_t
2765 urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan)
2766 {
2767         usb_error_t error;
2768
2769         error = urtw_8225_set_txpwrlvl(sc, chan);
2770         if (error)
2771                 goto fail;
2772         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
2773         usb_pause_mtx(&sc->sc_mtx, 10);
2774 fail:
2775         return (error);
2776 }
2777
2778 static usb_error_t
2779 urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens)
2780 {
2781         usb_error_t error;
2782
2783         if (sens < 0 || sens > 6)
2784                 return -1;
2785
2786         if (sens > 4)
2787                 urtw_8225_write(sc,
2788                     URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1);
2789         else
2790                 urtw_8225_write(sc,
2791                     URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2);
2792
2793         sens = 6 - sens;
2794         error = urtw_8225_setgain(sc, sens);
2795         if (error)
2796                 goto fail;
2797
2798         urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]);
2799
2800 fail:
2801         return (error);
2802 }
2803
2804 static usb_error_t
2805 urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan)
2806 {
2807         int i, idx, set;
2808         uint8_t *cck_pwltable;
2809         uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max;
2810         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
2811         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
2812         usb_error_t error;
2813
2814         cck_pwrlvl_max = 11;
2815         ofdm_pwrlvl_max = 25;   /* 12 -> 25  */
2816         ofdm_pwrlvl_min = 10;
2817
2818         /* CCK power setting */
2819         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
2820         idx = cck_pwrlvl % 6;
2821         set = cck_pwrlvl / 6;
2822         cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 :
2823             urtw_8225_txpwr_cck;
2824
2825         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
2826             urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2827         for (i = 0; i < 8; i++) {
2828                 urtw_8187_write_phy_cck(sc, 0x44 + i,
2829                     cck_pwltable[idx * 8 + i]);
2830         }
2831         usb_pause_mtx(&sc->sc_mtx, 1);
2832
2833         /* OFDM power setting */
2834         ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
2835             ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
2836         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
2837
2838         idx = ofdm_pwrlvl % 6;
2839         set = ofdm_pwrlvl / 6;
2840
2841         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
2842         if (error)
2843                 goto fail;
2844         urtw_8187_write_phy_ofdm(sc, 2, 0x42);
2845         urtw_8187_write_phy_ofdm(sc, 6, 0);
2846         urtw_8187_write_phy_ofdm(sc, 8, 0);
2847
2848         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
2849             urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2850         urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]);
2851         urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]);
2852         usb_pause_mtx(&sc->sc_mtx, 1);
2853 fail:
2854         return (error);
2855 }
2856
2857
2858 static usb_error_t
2859 urtw_8225_rf_stop(struct urtw_softc *sc)
2860 {
2861         uint8_t data;
2862         usb_error_t error;
2863
2864         urtw_8225_write(sc, 0x4, 0x1f);
2865
2866         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2867         if (error)
2868                 goto fail;
2869
2870         urtw_read8_m(sc, URTW_CONFIG3, &data);
2871         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
2872         if (sc->sc_flags & URTW_RTL8187B) {
2873                 urtw_write32_m(sc, URTW_ANAPARAM2,
2874                     URTW_8187B_8225_ANAPARAM2_OFF);
2875                 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF);
2876                 urtw_write32_m(sc, URTW_ANAPARAM3,
2877                     URTW_8187B_8225_ANAPARAM3_OFF);
2878         } else {
2879                 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF);
2880                 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF);
2881         }
2882
2883         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
2884         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2885         if (error)
2886                 goto fail;
2887
2888 fail:
2889         return (error);
2890 }
2891
2892 static usb_error_t
2893 urtw_8225v2_rf_init(struct urtw_softc *sc)
2894 {
2895 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
2896         int i;
2897         uint16_t data;
2898         uint32_t data32;
2899         usb_error_t error;
2900
2901         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2902         if (error)
2903                 goto fail;
2904
2905         error = urtw_8225_usb_init(sc);
2906         if (error)
2907                 goto fail;
2908
2909         urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2910         urtw_read16_m(sc, URTW_BRSR, &data);            /* XXX ??? */
2911         urtw_write16_m(sc, URTW_BRSR, 0xffff);
2912         urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2913
2914         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2915         if (error)
2916                 goto fail;
2917         urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2918         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2919         if (error)
2920                 goto fail;
2921
2922         error = urtw_8185_rf_pins_enable(sc);
2923         if (error)
2924                 goto fail;
2925
2926         usb_pause_mtx(&sc->sc_mtx, 500);
2927
2928         for (i = 0; i < N(urtw_8225v2_rf_part1); i++) {
2929                 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg,
2930                     urtw_8225v2_rf_part1[i].val);
2931         }
2932         usb_pause_mtx(&sc->sc_mtx, 50);
2933
2934         urtw_8225_write(sc,
2935             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1);
2936
2937         for (i = 0; i < 95; i++) {
2938                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2939                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
2940                     urtw_8225v2_rxgain[i]);
2941         }
2942
2943         urtw_8225_write(sc,
2944             URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1);
2945         urtw_8225_write(sc,
2946             URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1);
2947         urtw_8225_write(sc,
2948             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2);
2949         urtw_8225_write(sc,
2950             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2951         usb_pause_mtx(&sc->sc_mtx, 100);
2952         urtw_8225_write(sc,
2953             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2954         usb_pause_mtx(&sc->sc_mtx, 100);
2955
2956         error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2957         if (error != 0)
2958                 goto fail;
2959         if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1)
2960                 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32);
2961         if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) {
2962                 urtw_8225_write(sc,
2963                     URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2964                 usb_pause_mtx(&sc->sc_mtx, 100);
2965                 urtw_8225_write(sc,
2966                     URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2967                 usb_pause_mtx(&sc->sc_mtx, 50);
2968                 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2969                 if (error != 0)
2970                         goto fail;
2971                 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2))
2972                         device_printf(sc->sc_dev, "RF calibration failed\n");
2973         }
2974         usb_pause_mtx(&sc->sc_mtx, 100);
2975
2976         urtw_8225_write(sc,
2977             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6);
2978         for (i = 0; i < 128; i++) {
2979                 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2980                 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2981         }
2982
2983         for (i = 0; i < N(urtw_8225v2_rf_part2); i++) {
2984                 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg,
2985                     urtw_8225v2_rf_part2[i].val);
2986         }
2987
2988         error = urtw_8225v2_setgain(sc, 4);
2989         if (error)
2990                 goto fail;
2991
2992         for (i = 0; i < N(urtw_8225v2_rf_part3); i++) {
2993                 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg,
2994                     urtw_8225v2_rf_part3[i].val);
2995         }
2996
2997         urtw_write8_m(sc, URTW_TESTR, 0x0d);
2998
2999         error = urtw_8225v2_set_txpwrlvl(sc, 1);
3000         if (error)
3001                 goto fail;
3002
3003         urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
3004         urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
3005
3006         /* TX ant A, 0x0 for B */
3007         error = urtw_8185_tx_antenna(sc, 0x3);
3008         if (error)
3009                 goto fail;
3010         urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
3011
3012         error = urtw_8225_rf_set_chan(sc, 1);
3013 fail:
3014         return (error);
3015 #undef N
3016 }
3017
3018 static usb_error_t
3019 urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan)
3020 {
3021         usb_error_t error;
3022
3023         error = urtw_8225v2_set_txpwrlvl(sc, chan);
3024         if (error)
3025                 goto fail;
3026
3027         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3028         usb_pause_mtx(&sc->sc_mtx, 10);
3029 fail:
3030         return (error);
3031 }
3032
3033 static usb_error_t
3034 urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data)
3035 {
3036         int i;
3037         int16_t bit;
3038         uint8_t rlen = 12, wlen = 6;
3039         uint16_t o1, o2, o3, tmp;
3040         uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27;
3041         uint32_t mask = 0x80000000, value = 0;
3042         usb_error_t error;
3043
3044         urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1);
3045         urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2);
3046         urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3);
3047         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4);
3048         urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4);
3049         o1 &= ~URTW_RF_PINS_MAGIC4;
3050         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN);
3051         DELAY(5);
3052         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1);
3053         DELAY(5);
3054
3055         for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) {
3056                 bit = ((d2w & mask) != 0) ? 1 : 0;
3057
3058                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3059                 DELAY(2);
3060                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3061                     URTW_BB_HOST_BANG_CLK);
3062                 DELAY(2);
3063                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3064                     URTW_BB_HOST_BANG_CLK);
3065                 DELAY(2);
3066                 mask = mask >> 1;
3067                 if (i == 2)
3068                         break;
3069                 bit = ((d2w & mask) != 0) ? 1 : 0;
3070                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3071                     URTW_BB_HOST_BANG_CLK);
3072                 DELAY(2);
3073                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3074                     URTW_BB_HOST_BANG_CLK);
3075                 DELAY(2);
3076                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3077                 DELAY(1);
3078         }
3079         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW |
3080             URTW_BB_HOST_BANG_CLK);
3081         DELAY(2);
3082         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW);
3083         DELAY(2);
3084         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW);
3085         DELAY(2);
3086
3087         mask = 0x800;
3088         for (i = 0; i < rlen; i++, mask = mask >> 1) {
3089                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3090                     o1 | URTW_BB_HOST_BANG_RW);
3091                 DELAY(2);
3092                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3093                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3094                 DELAY(2);
3095                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3096                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3097                 DELAY(2);
3098                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3099                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3100                 DELAY(2);
3101
3102                 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp);
3103                 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0);
3104                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3105                     o1 | URTW_BB_HOST_BANG_RW);
3106                 DELAY(2);
3107         }
3108
3109         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN |
3110             URTW_BB_HOST_BANG_RW);
3111         DELAY(2);
3112
3113         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2);
3114         urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3);
3115         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1);
3116
3117         if (data != NULL)
3118                 *data = value;
3119 fail:
3120         return (error);
3121 }
3122
3123
3124 static usb_error_t
3125 urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan)
3126 {
3127         int i;
3128         uint8_t *cck_pwrtable;
3129         uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10;
3130         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3131         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3132         usb_error_t error;
3133
3134         /* CCK power setting */
3135         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
3136         cck_pwrlvl += sc->sc_txpwr_cck_base;
3137         cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3138         cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 :
3139             urtw_8225v2_txpwr_cck;
3140
3141         for (i = 0; i < 8; i++)
3142                 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3143
3144         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3145             urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]);
3146         usb_pause_mtx(&sc->sc_mtx, 1);
3147
3148         /* OFDM power setting */
3149         ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
3150                 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
3151         ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3152         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3153
3154         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3155         if (error)
3156                 goto fail;
3157
3158         urtw_8187_write_phy_ofdm(sc, 2, 0x42);
3159         urtw_8187_write_phy_ofdm(sc, 5, 0x0);
3160         urtw_8187_write_phy_ofdm(sc, 6, 0x40);
3161         urtw_8187_write_phy_ofdm(sc, 7, 0x0);
3162         urtw_8187_write_phy_ofdm(sc, 8, 0x40);
3163
3164         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3165             urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]);
3166         usb_pause_mtx(&sc->sc_mtx, 1);
3167 fail:
3168         return (error);
3169 }
3170
3171 static usb_error_t
3172 urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain)
3173 {
3174         uint8_t *gainp;
3175         usb_error_t error;
3176
3177         /* XXX for A?  */
3178         gainp = urtw_8225v2_gain_bg;
3179         urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]);
3180         usb_pause_mtx(&sc->sc_mtx, 1);
3181         urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]);
3182         usb_pause_mtx(&sc->sc_mtx, 1);
3183         urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]);
3184         usb_pause_mtx(&sc->sc_mtx, 1);
3185         urtw_8187_write_phy_ofdm(sc, 0x21, 0x17);
3186         usb_pause_mtx(&sc->sc_mtx, 1);
3187 fail:
3188         return (error);
3189 }
3190
3191 static usb_error_t
3192 urtw_8225_isv2(struct urtw_softc *sc, int *ret)
3193 {
3194         uint32_t data;
3195         usb_error_t error;
3196
3197         *ret = 1;
3198
3199         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5);
3200         urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5);
3201         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5);
3202         usb_pause_mtx(&sc->sc_mtx, 500);
3203
3204         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3205             URTW_8225_ADDR_0_DATA_MAGIC1);
3206
3207         error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data);
3208         if (error != 0)
3209                 goto fail;
3210         if (data != URTW_8225_ADDR_8_DATA_MAGIC1)
3211                 *ret = 0;
3212         else {
3213                 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data);
3214                 if (error != 0)
3215                         goto fail;
3216                 if (data != URTW_8225_ADDR_9_DATA_MAGIC1)
3217                         *ret = 0;
3218         }
3219
3220         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3221             URTW_8225_ADDR_0_DATA_MAGIC2);
3222 fail:
3223         return (error);
3224 }
3225
3226 static usb_error_t
3227 urtw_8225v2b_rf_init(struct urtw_softc *sc)
3228 {
3229 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
3230         int i;
3231         uint8_t data8;
3232         usb_error_t error;
3233
3234         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3235         if (error)
3236                 goto fail;
3237
3238         /*
3239          * initialize extra registers on 8187
3240          */
3241         urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff);
3242
3243         /* retry limit */
3244         urtw_read8_m(sc, URTW_CW_CONF, &data8);
3245         data8 |= URTW_CW_CONF_PERPACKET_RETRY;
3246         urtw_write8_m(sc, URTW_CW_CONF, data8);
3247
3248         /* TX AGC */
3249         urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3250         data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN;
3251         urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3252
3253         /* Auto Rate Fallback Control */
3254 #define URTW_ARFR       0x1e0
3255         urtw_write16_m(sc, URTW_ARFR, 0xfff);
3256         urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8);
3257         urtw_write8_m(sc, URTW_RATE_FALLBACK,
3258             data8 | URTW_RATE_FALLBACK_ENABLE);
3259
3260         urtw_read8_m(sc, URTW_MSR, &data8);
3261         urtw_write8_m(sc, URTW_MSR, data8 & 0xf3);
3262         urtw_read8_m(sc, URTW_MSR, &data8);
3263         urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA);
3264         urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl);
3265
3266         urtw_write16_m(sc, URTW_ATIM_WND, 2);
3267         urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
3268 #define URTW_FEMR_FOR_8187B     0x1d4
3269         urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff);
3270
3271         /* led type */
3272         urtw_read8_m(sc, URTW_CONFIG1, &data8);
3273         data8 = (data8 & 0x3f) | 0x80;
3274         urtw_write8_m(sc, URTW_CONFIG1, data8);
3275
3276         /* applying MAC address again.  */
3277         urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]);
3278         urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff);
3279
3280         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3281         if (error)
3282                 goto fail;
3283
3284         urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
3285
3286         /*
3287          * MAC configuration
3288          */
3289         for (i = 0; i < N(urtw_8225v2b_rf_part1); i++)
3290                 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg,
3291                     urtw_8225v2b_rf_part1[i].val);
3292         urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50);
3293         urtw_write16_m(sc, URTW_INT_MIG, 0x0000);
3294         urtw_write32_m(sc, 0x1f0, 0);
3295         urtw_write32_m(sc, 0x1f4, 0);
3296         urtw_write8_m(sc, 0x1f8, 0);
3297         urtw_write32_m(sc, URTW_RF_TIMING, 0x4001);
3298
3299 #define URTW_RFSW_CTRL  0x272
3300         urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a);
3301
3302         /*
3303          * initialize PHY
3304          */
3305         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3306         if (error)
3307                 goto fail;
3308         urtw_read8_m(sc, URTW_CONFIG3, &data8);
3309         urtw_write8_m(sc, URTW_CONFIG3,
3310             data8 | URTW_CONFIG3_ANAPARAM_WRITE);
3311
3312         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3313         if (error)
3314                 goto fail;
3315
3316         /* setup RFE initial timing */
3317         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480);
3318         urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488);
3319         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff);
3320         usb_pause_mtx(&sc->sc_mtx, 1100);
3321
3322         for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) {
3323                 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg,
3324                     urtw_8225v2b_rf_part0[i].val);
3325                 usb_pause_mtx(&sc->sc_mtx, 1);
3326         }
3327         urtw_8225_write(sc, 0x00, 0x01b7);
3328
3329         for (i = 0; i < 95; i++) {
3330                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
3331                 usb_pause_mtx(&sc->sc_mtx, 1);
3332                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
3333                     urtw_8225v2b_rxgain[i]);
3334                 usb_pause_mtx(&sc->sc_mtx, 1);
3335         }
3336
3337         urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080);
3338         usb_pause_mtx(&sc->sc_mtx, 1);
3339         urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004);
3340         usb_pause_mtx(&sc->sc_mtx, 1);
3341         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7);
3342         usb_pause_mtx(&sc->sc_mtx, 1);
3343         usb_pause_mtx(&sc->sc_mtx, 3000);
3344         urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d);
3345         usb_pause_mtx(&sc->sc_mtx, 2000);
3346         urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d);
3347         usb_pause_mtx(&sc->sc_mtx, 1);
3348         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf);
3349         usb_pause_mtx(&sc->sc_mtx, 1);
3350
3351         urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03);
3352         urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07);
3353         urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03);
3354
3355         urtw_8187_write_phy_ofdm(sc, 0x80, 0x12);
3356         for (i = 0; i < 128; i++) {
3357                 uint32_t addr, data;
3358
3359                 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f;
3360                 addr = ((i + 0x80) << 8) | 0x0000008e;
3361
3362                 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff);
3363                 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff);
3364                 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00);
3365         }
3366         urtw_8187_write_phy_ofdm(sc, 0x80, 0x10);
3367
3368         for (i = 0; i < N(urtw_8225v2b_rf_part2); i++)
3369                 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val);
3370
3371         urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c);
3372         urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c);
3373         urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c);
3374         urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c);
3375
3376         urtw_8187_write_phy_ofdm(sc, 0x97, 0x46);
3377         urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6);
3378         urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc);
3379         urtw_8187_write_phy_cck(sc, 0xc1, 0x88);
3380
3381 fail:
3382         return (error);
3383 #undef N
3384 }
3385
3386 static usb_error_t
3387 urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan)
3388 {
3389         usb_error_t error;
3390
3391         error = urtw_8225v2b_set_txpwrlvl(sc, chan);
3392         if (error)
3393                 goto fail;
3394
3395         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3396         usb_pause_mtx(&sc->sc_mtx, 10);
3397 fail:
3398         return (error);
3399 }
3400
3401 static usb_error_t
3402 urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan)
3403 {
3404         int i;
3405         uint8_t *cck_pwrtable;
3406         uint8_t cck_pwrlvl_max = 15;
3407         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3408         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3409         usb_error_t error;
3410
3411         /* CCK power setting */
3412         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ?
3413             ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) :
3414             (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7));
3415         cck_pwrlvl += sc->sc_txpwr_cck_base;
3416         cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3417         cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 :
3418             urtw_8225v2b_txpwr_cck;
3419
3420         if (sc->sc_flags & URTW_RTL8187B_REV_B)
3421                 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 :
3422                     ((cck_pwrlvl <= 11) ? 8 : 16);
3423         else
3424                 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 :
3425                     ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24));
3426
3427         for (i = 0; i < 8; i++)
3428                 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3429
3430         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3431             urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1);
3432         usb_pause_mtx(&sc->sc_mtx, 1);
3433
3434         /* OFDM power setting */
3435         ofdm_pwrlvl = (ofdm_pwrlvl > 15) ?
3436             ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) :
3437             (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10));
3438         ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3439         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3440
3441         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3442             urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1);
3443
3444         if (sc->sc_flags & URTW_RTL8187B_REV_B) {
3445                 if (ofdm_pwrlvl <= 11) {
3446                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x60);
3447                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x60);
3448                 } else {
3449                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3450                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3451                 }
3452         } else {
3453                 if (ofdm_pwrlvl <= 11) {
3454                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3455                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3456                 } else if (ofdm_pwrlvl <= 17) {
3457                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x54);
3458                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x54);
3459                 } else {
3460                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x50);
3461                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x50);
3462                 }
3463         }
3464         usb_pause_mtx(&sc->sc_mtx, 1);
3465 fail:
3466         return (error);
3467 }
3468
3469 static usb_error_t
3470 urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data)
3471 {
3472         struct usb_device_request req;
3473         usb_error_t error;
3474
3475         req.bmRequestType = UT_READ_VENDOR_DEVICE;
3476         req.bRequest = URTW_8187_GETREGS_REQ;
3477         USETW(req.wValue, val | 0xfe00);
3478         USETW(req.wIndex, 0);
3479         USETW(req.wLength, sizeof(uint8_t));
3480
3481         error = urtw_do_request(sc, &req, data);
3482         return (error);
3483 }
3484
3485 static usb_error_t
3486 urtw_write8e(struct urtw_softc *sc, int val, uint8_t data)
3487 {
3488         struct usb_device_request req;
3489
3490         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
3491         req.bRequest = URTW_8187_SETREGS_REQ;
3492         USETW(req.wValue, val | 0xfe00);
3493         USETW(req.wIndex, 0);
3494         USETW(req.wLength, sizeof(uint8_t));
3495
3496         return (urtw_do_request(sc, &req, &data));
3497 }
3498
3499 static usb_error_t
3500 urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val)
3501 {
3502         uint8_t data;
3503         usb_error_t error;
3504
3505         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3506         if (error)
3507                 goto fail;
3508
3509         urtw_read8_m(sc, URTW_CONFIG3, &data);
3510         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3511         urtw_write32_m(sc, URTW_ANAPARAM, val);
3512         urtw_read8_m(sc, URTW_CONFIG3, &data);
3513         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3514
3515         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3516         if (error)
3517                 goto fail;
3518 fail:
3519         return (error);
3520 }
3521
3522 static usb_error_t
3523 urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val)
3524 {
3525         uint8_t data;
3526         usb_error_t error;
3527
3528         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3529         if (error)
3530                 goto fail;
3531
3532         urtw_read8_m(sc, URTW_CONFIG3, &data);
3533         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3534         urtw_write32_m(sc, URTW_ANAPARAM2, val);
3535         urtw_read8_m(sc, URTW_CONFIG3, &data);
3536         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3537
3538         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3539         if (error)
3540                 goto fail;
3541 fail:
3542         return (error);
3543 }
3544
3545 static usb_error_t
3546 urtw_intr_enable(struct urtw_softc *sc)
3547 {
3548         usb_error_t error;
3549
3550         urtw_write16_m(sc, URTW_INTR_MASK, 0xffff);
3551 fail:
3552         return (error);
3553 }
3554
3555 static usb_error_t
3556 urtw_intr_disable(struct urtw_softc *sc)
3557 {
3558         usb_error_t error;
3559
3560         urtw_write16_m(sc, URTW_INTR_MASK, 0);
3561 fail:
3562         return (error);
3563 }
3564
3565 static usb_error_t
3566 urtw_reset(struct urtw_softc *sc)
3567 {
3568         uint8_t data;
3569         usb_error_t error;
3570
3571         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3572         if (error)
3573                 goto fail;
3574         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3575         if (error)
3576                 goto fail;
3577
3578         error = urtw_intr_disable(sc);
3579         if (error)
3580                 goto fail;
3581         usb_pause_mtx(&sc->sc_mtx, 100);
3582
3583         error = urtw_write8e(sc, 0x18, 0x10);
3584         if (error != 0)
3585                 goto fail;
3586         error = urtw_write8e(sc, 0x18, 0x11);
3587         if (error != 0)
3588                 goto fail;
3589         error = urtw_write8e(sc, 0x18, 0x00);
3590         if (error != 0)
3591                 goto fail;
3592         usb_pause_mtx(&sc->sc_mtx, 100);
3593
3594         urtw_read8_m(sc, URTW_CMD, &data);
3595         data = (data & 0x2) | URTW_CMD_RST;
3596         urtw_write8_m(sc, URTW_CMD, data);
3597         usb_pause_mtx(&sc->sc_mtx, 100);
3598
3599         urtw_read8_m(sc, URTW_CMD, &data);
3600         if (data & URTW_CMD_RST) {
3601                 device_printf(sc->sc_dev, "reset timeout\n");
3602                 goto fail;
3603         }
3604
3605         error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD);
3606         if (error)
3607                 goto fail;
3608         usb_pause_mtx(&sc->sc_mtx, 100);
3609
3610         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3611         if (error)
3612                 goto fail;
3613         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3614         if (error)
3615                 goto fail;
3616 fail:
3617         return (error);
3618 }
3619
3620 static usb_error_t
3621 urtw_led_ctl(struct urtw_softc *sc, int mode)
3622 {
3623         usb_error_t error = 0;
3624
3625         switch (sc->sc_strategy) {
3626         case URTW_SW_LED_MODE0:
3627                 error = urtw_led_mode0(sc, mode);
3628                 break;
3629         case URTW_SW_LED_MODE1:
3630                 error = urtw_led_mode1(sc, mode);
3631                 break;
3632         case URTW_SW_LED_MODE2:
3633                 error = urtw_led_mode2(sc, mode);
3634                 break;
3635         case URTW_SW_LED_MODE3:
3636                 error = urtw_led_mode3(sc, mode);
3637                 break;
3638         default:
3639                 DPRINTF(sc, URTW_DEBUG_STATE,
3640                     "unsupported LED mode %d\n", sc->sc_strategy);
3641                 error = USB_ERR_INVAL;
3642                 break;
3643         }
3644
3645         return (error);
3646 }
3647
3648 static usb_error_t
3649 urtw_led_mode0(struct urtw_softc *sc, int mode)
3650 {
3651
3652         switch (mode) {
3653         case URTW_LED_CTL_POWER_ON:
3654                 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK;
3655                 break;
3656         case URTW_LED_CTL_TX:
3657                 if (sc->sc_gpio_ledinprogress == 1)
3658                         return (0);
3659
3660                 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL;
3661                 sc->sc_gpio_blinktime = 2;
3662                 break;
3663         case URTW_LED_CTL_LINK:
3664                 sc->sc_gpio_ledstate = URTW_LED_ON;
3665                 break;
3666         default:
3667                 DPRINTF(sc, URTW_DEBUG_STATE,
3668                     "unsupported LED mode 0x%x", mode);
3669                 return (USB_ERR_INVAL);
3670         }
3671
3672         switch (sc->sc_gpio_ledstate) {
3673         case URTW_LED_ON:
3674                 if (sc->sc_gpio_ledinprogress != 0)
3675                         break;
3676                 urtw_led_on(sc, URTW_LED_GPIO);
3677                 break;
3678         case URTW_LED_BLINK_NORMAL:
3679                 if (sc->sc_gpio_ledinprogress != 0)
3680                         break;
3681                 sc->sc_gpio_ledinprogress = 1;
3682                 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ?
3683                         URTW_LED_OFF : URTW_LED_ON;
3684                 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3685                 break;
3686         case URTW_LED_POWER_ON_BLINK:
3687                 urtw_led_on(sc, URTW_LED_GPIO);
3688                 usb_pause_mtx(&sc->sc_mtx, 100);
3689                 urtw_led_off(sc, URTW_LED_GPIO);
3690                 break;
3691         default:
3692                 DPRINTF(sc, URTW_DEBUG_STATE,
3693                     "unknown LED status 0x%x", sc->sc_gpio_ledstate);
3694                 return (USB_ERR_INVAL);
3695         }
3696         return (0);
3697 }
3698
3699 static usb_error_t
3700 urtw_led_mode1(struct urtw_softc *sc, int mode)
3701 {
3702         return (USB_ERR_INVAL);
3703 }
3704
3705 static usb_error_t
3706 urtw_led_mode2(struct urtw_softc *sc, int mode)
3707 {
3708         return (USB_ERR_INVAL);
3709 }
3710
3711 static usb_error_t
3712 urtw_led_mode3(struct urtw_softc *sc, int mode)
3713 {
3714         return (USB_ERR_INVAL);
3715 }
3716
3717 static usb_error_t
3718 urtw_led_on(struct urtw_softc *sc, int type)
3719 {
3720         usb_error_t error;
3721
3722         if (type == URTW_LED_GPIO) {
3723                 switch (sc->sc_gpio_ledpin) {
3724                 case URTW_LED_PIN_GPIO0:
3725                         urtw_write8_m(sc, URTW_GPIO, 0x01);
3726                         urtw_write8_m(sc, URTW_GP_ENABLE, 0x00);
3727                         break;
3728                 default:
3729                         DPRINTF(sc, URTW_DEBUG_STATE,
3730                             "unsupported LED PIN type 0x%x",
3731                             sc->sc_gpio_ledpin);
3732                         error = USB_ERR_INVAL;
3733                         goto fail;
3734                 }
3735         } else {
3736                 DPRINTF(sc, URTW_DEBUG_STATE,
3737                     "unsupported LED type 0x%x", type);
3738                 error = USB_ERR_INVAL;
3739                 goto fail;
3740         }
3741
3742         sc->sc_gpio_ledon = 1;
3743 fail:
3744         return (error);
3745 }
3746
3747 static usb_error_t
3748 urtw_led_off(struct urtw_softc *sc, int type)
3749 {
3750         usb_error_t error;
3751
3752         if (type == URTW_LED_GPIO) {
3753                 switch (sc->sc_gpio_ledpin) {
3754                 case URTW_LED_PIN_GPIO0:
3755                         urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1);
3756                         urtw_write8_m(sc,
3757                             URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1);
3758                         break;
3759                 default:
3760                         DPRINTF(sc, URTW_DEBUG_STATE,
3761                             "unsupported LED PIN type 0x%x",
3762                             sc->sc_gpio_ledpin);
3763                         error = USB_ERR_INVAL;
3764                         goto fail;
3765                 }
3766         } else {
3767                 DPRINTF(sc, URTW_DEBUG_STATE,
3768                     "unsupported LED type 0x%x", type);
3769                 error = USB_ERR_INVAL;
3770                 goto fail;
3771         }
3772
3773         sc->sc_gpio_ledon = 0;
3774
3775 fail:
3776         return (error);
3777 }
3778
3779 static void
3780 urtw_led_ch(void *arg)
3781 {
3782         struct urtw_softc *sc = arg;
3783         struct ifnet *ifp = sc->sc_ifp;
3784         struct ieee80211com *ic = ifp->if_l2com;
3785
3786         ieee80211_runtask(ic, &sc->sc_led_task);
3787 }
3788
3789 static void
3790 urtw_ledtask(void *arg, int pending)
3791 {
3792         struct urtw_softc *sc = arg;
3793
3794         if (sc->sc_strategy != URTW_SW_LED_MODE0) {
3795                 DPRINTF(sc, URTW_DEBUG_STATE,
3796                     "could not process a LED strategy 0x%x",
3797                     sc->sc_strategy);
3798                 return;
3799         }
3800
3801         URTW_LOCK(sc);
3802         urtw_led_blink(sc);
3803         URTW_UNLOCK(sc);
3804 }
3805
3806 static usb_error_t
3807 urtw_led_blink(struct urtw_softc *sc)
3808 {
3809         uint8_t ing = 0;
3810         usb_error_t error;
3811
3812         if (sc->sc_gpio_blinkstate == URTW_LED_ON)
3813                 error = urtw_led_on(sc, URTW_LED_GPIO);
3814         else
3815                 error = urtw_led_off(sc, URTW_LED_GPIO);
3816         sc->sc_gpio_blinktime--;
3817         if (sc->sc_gpio_blinktime == 0)
3818                 ing = 1;
3819         else {
3820                 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL &&
3821                     sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY &&
3822                     sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3)
3823                         ing = 1;
3824         }
3825         if (ing == 1) {
3826                 if (sc->sc_gpio_ledstate == URTW_LED_ON &&
3827                     sc->sc_gpio_ledon == 0)
3828                         error = urtw_led_on(sc, URTW_LED_GPIO);
3829                 else if (sc->sc_gpio_ledstate == URTW_LED_OFF &&
3830                     sc->sc_gpio_ledon == 1)
3831                         error = urtw_led_off(sc, URTW_LED_GPIO);
3832
3833                 sc->sc_gpio_blinktime = 0;
3834                 sc->sc_gpio_ledinprogress = 0;
3835                 return (0);
3836         }
3837
3838         sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ?
3839             URTW_LED_ON : URTW_LED_OFF;
3840
3841         switch (sc->sc_gpio_ledstate) {
3842         case URTW_LED_BLINK_NORMAL:
3843                 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3844                 break;
3845         default:
3846                 DPRINTF(sc, URTW_DEBUG_STATE,
3847                     "unknown LED status 0x%x",
3848                     sc->sc_gpio_ledstate);
3849                 return (USB_ERR_INVAL);
3850         }
3851         return (0);
3852 }
3853
3854 static usb_error_t
3855 urtw_rx_enable(struct urtw_softc *sc)
3856 {
3857         uint8_t data;
3858         usb_error_t error;
3859
3860         usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ?
3861             sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]);
3862
3863         error = urtw_rx_setconf(sc);
3864         if (error != 0)
3865                 goto fail;
3866
3867         if ((sc->sc_flags & URTW_RTL8187B) == 0) {
3868                 urtw_read8_m(sc, URTW_CMD, &data);
3869                 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE);
3870         }
3871 fail:
3872         return (error);
3873 }
3874
3875 static usb_error_t
3876 urtw_tx_enable(struct urtw_softc *sc)
3877 {
3878         uint8_t data8;
3879         uint32_t data;
3880         usb_error_t error;
3881
3882         if (sc->sc_flags & URTW_RTL8187B) {
3883                 urtw_read32_m(sc, URTW_TX_CONF, &data);
3884                 data &= ~URTW_TX_LOOPBACK_MASK;
3885                 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3886                 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3887                 data &= ~URTW_TX_SWPLCPLEN;
3888                 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE |
3889                     (7 << 8) |  /* short retry limit */
3890                     (7 << 0) |  /* long retry limit */
3891                     (7 << 21);  /* MAX TX DMA */
3892                 urtw_write32_m(sc, URTW_TX_CONF, data);
3893
3894                 urtw_read8_m(sc, URTW_MSR, &data8);
3895                 data8 |= URTW_MSR_LINK_ENEDCA;
3896                 urtw_write8_m(sc, URTW_MSR, data8);
3897                 return (error);
3898         }
3899
3900         urtw_read8_m(sc, URTW_CW_CONF, &data8);
3901         data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY);
3902         urtw_write8_m(sc, URTW_CW_CONF, data8);
3903
3904         urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3905         data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN;
3906         data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL;
3907         data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT;
3908         urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3909
3910         urtw_read32_m(sc, URTW_TX_CONF, &data);
3911         data &= ~URTW_TX_LOOPBACK_MASK;
3912         data |= URTW_TX_LOOPBACK_NONE;
3913         data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3914         data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT;
3915         data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT;
3916         data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3917         data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW;
3918         data &= ~URTW_TX_SWPLCPLEN;
3919         data |= URTW_TX_NOICV;
3920         urtw_write32_m(sc, URTW_TX_CONF, data);
3921
3922         urtw_read8_m(sc, URTW_CMD, &data8);
3923         urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE);
3924 fail:
3925         return (error);
3926 }
3927
3928 static usb_error_t
3929 urtw_rx_setconf(struct urtw_softc *sc)
3930 {
3931         struct ifnet *ifp = sc->sc_ifp;
3932         struct ieee80211com *ic = ifp->if_l2com;
3933         uint32_t data;
3934         usb_error_t error;
3935
3936         urtw_read32_m(sc, URTW_RX, &data);
3937         data = data &~ URTW_RX_FILTER_MASK;
3938         if (sc->sc_flags & URTW_RTL8187B) {
3939                 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA |
3940                     URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST |
3941                     URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID |
3942                     URTW_RX_FIFO_THRESHOLD_NONE |
3943                     URTW_MAX_RX_DMA_2048 |
3944                     URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT;
3945         } else {
3946                 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA;
3947                 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST;
3948
3949                 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
3950                         data = data | URTW_RX_FILTER_ICVERR;
3951                         data = data | URTW_RX_FILTER_PWR;
3952                 }
3953                 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR)
3954                         data = data | URTW_RX_FILTER_CRCERR;
3955
3956                 if (ic->ic_opmode == IEEE80211_M_MONITOR ||
3957                     (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) {
3958                         data = data | URTW_RX_FILTER_ALLMAC;
3959                 } else {
3960                         data = data | URTW_RX_FILTER_NICMAC;
3961                         data = data | URTW_RX_CHECK_BSSID;
3962                 }
3963
3964                 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK;
3965                 data = data | URTW_RX_FIFO_THRESHOLD_NONE |
3966                     URTW_RX_AUTORESETPHY;
3967                 data = data &~ URTW_MAX_RX_DMA_MASK;
3968                 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT;
3969         }
3970
3971         urtw_write32_m(sc, URTW_RX, data);
3972 fail:
3973         return (error);
3974 }
3975
3976 static struct mbuf *
3977 urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p,
3978     int8_t *nf_p)
3979 {
3980         int actlen, flen, rssi;
3981         struct ieee80211_frame *wh;
3982         struct mbuf *m, *mnew;
3983         struct urtw_softc *sc = data->sc;
3984         struct ifnet *ifp = sc->sc_ifp;
3985         struct ieee80211com *ic = ifp->if_l2com;
3986         uint8_t noise = 0, rate;
3987
3988         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
3989
3990         if (actlen < (int)URTW_MIN_RXBUFSZ) {
3991                 ifp->if_ierrors++;
3992                 return (NULL);
3993         }
3994
3995         if (sc->sc_flags & URTW_RTL8187B) {
3996                 struct urtw_8187b_rxhdr *rx;
3997
3998                 rx = (struct urtw_8187b_rxhdr *)(data->buf +
3999                     (actlen - (sizeof(struct urtw_8187b_rxhdr))));
4000                 flen = le32toh(rx->flag) & 0xfff;
4001                 if (flen > actlen) {
4002                         ifp->if_ierrors++;
4003                         return (NULL);
4004                 }
4005                 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
4006                 /* XXX correct? */
4007                 rssi = rx->rssi & URTW_RX_RSSI_MASK;
4008                 noise = rx->noise;
4009         } else {
4010                 struct urtw_8187l_rxhdr *rx;
4011
4012                 rx = (struct urtw_8187l_rxhdr *)(data->buf +
4013                     (actlen - (sizeof(struct urtw_8187l_rxhdr))));
4014                 flen = le32toh(rx->flag) & 0xfff;
4015                 if (flen > actlen) {
4016                         ifp->if_ierrors++;
4017                         return (NULL);
4018                 }
4019
4020                 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
4021                 /* XXX correct? */
4022                 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK;
4023                 noise = rx->noise;
4024         }
4025
4026         mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
4027         if (mnew == NULL) {
4028                 ifp->if_ierrors++;
4029                 return (NULL);
4030         }
4031
4032         m = data->m;
4033         data->m = mnew;
4034         data->buf = mtod(mnew, uint8_t *);
4035
4036         /* finalize mbuf */
4037         m->m_pkthdr.rcvif = ifp;
4038         m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN;
4039
4040         if (ieee80211_radiotap_active(ic)) {
4041                 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap;
4042
4043                 /* XXX Are variables correct?  */
4044                 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
4045                 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
4046                 tap->wr_dbm_antsignal = (int8_t)rssi;
4047         }
4048
4049         wh = mtod(m, struct ieee80211_frame *);
4050         if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA)
4051                 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate;
4052
4053         *rssi_p = rssi;
4054         *nf_p = noise;          /* XXX correct? */
4055
4056         return (m);
4057 }
4058
4059 static void
4060 urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
4061 {
4062         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4063         struct ifnet *ifp = sc->sc_ifp;
4064         struct ieee80211com *ic = ifp->if_l2com;
4065         struct ieee80211_frame *wh;
4066         struct ieee80211_node *ni;
4067         struct mbuf *m = NULL;
4068         struct urtw_data *data;
4069         int8_t nf = -95;
4070         int rssi = 1;
4071
4072         URTW_ASSERT_LOCKED(sc);
4073
4074         switch (USB_GET_STATE(xfer)) {
4075         case USB_ST_TRANSFERRED:
4076                 data = STAILQ_FIRST(&sc->sc_rx_active);
4077                 if (data == NULL)
4078                         goto setup;
4079                 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4080                 m = urtw_rxeof(xfer, data, &rssi, &nf);
4081                 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4082                 /* FALLTHROUGH */
4083         case USB_ST_SETUP:
4084 setup:
4085                 data = STAILQ_FIRST(&sc->sc_rx_inactive);
4086                 if (data == NULL) {
4087                         KASSERT(m == NULL, ("mbuf isn't NULL"));
4088                         return;
4089                 }
4090                 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
4091                 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
4092                 usbd_xfer_set_frame_data(xfer, 0, data->buf,
4093                     usbd_xfer_max_len(xfer));
4094                 usbd_transfer_submit(xfer);
4095
4096                 /*
4097                  * To avoid LOR we should unlock our private mutex here to call
4098                  * ieee80211_input() because here is at the end of a USB
4099                  * callback and safe to unlock.
4100                  */
4101                 URTW_UNLOCK(sc);
4102                 if (m != NULL) {
4103                         wh = mtod(m, struct ieee80211_frame *);
4104                         ni = ieee80211_find_rxnode(ic,
4105                             (struct ieee80211_frame_min *)wh);
4106                         if (ni != NULL) {
4107                                 (void) ieee80211_input(ni, m, rssi, nf);
4108                                 /* node is no longer needed */
4109                                 ieee80211_free_node(ni);
4110                         } else
4111                                 (void) ieee80211_input_all(ic, m, rssi, nf);
4112                         m = NULL;
4113                 }
4114                 URTW_LOCK(sc);
4115                 break;
4116         default:
4117                 /* needs it to the inactive queue due to a error.  */
4118                 data = STAILQ_FIRST(&sc->sc_rx_active);
4119                 if (data != NULL) {
4120                         STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4121                         STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4122                 }
4123                 if (error != USB_ERR_CANCELLED) {
4124                         usbd_xfer_set_stall(xfer);
4125                         ifp->if_ierrors++;
4126                         goto setup;
4127                 }
4128                 break;
4129         }
4130 }
4131
4132 #define URTW_STATUS_TYPE_TXCLOSE        1
4133 #define URTW_STATUS_TYPE_BEACON_INTR    0
4134
4135 static void
4136 urtw_txstatus_eof(struct usb_xfer *xfer)
4137 {
4138         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4139         struct ifnet *ifp = sc->sc_ifp;
4140         int actlen, type, pktretry, seq;
4141         uint64_t val;
4142
4143         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
4144
4145         if (actlen != sizeof(uint64_t))
4146                 return;
4147
4148         val = le64toh(sc->sc_txstatus);
4149         type = (val >> 30) & 0x3;
4150         if (type == URTW_STATUS_TYPE_TXCLOSE) {
4151                 pktretry = val & 0xff;
4152                 seq = (val >> 16) & 0xff;
4153                 if (pktretry == URTW_TX_MAXRETRY)
4154                         ifp->if_oerrors++;
4155                 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n",
4156                     pktretry, seq);
4157         }
4158 }
4159
4160 static void
4161 urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error)
4162 {
4163         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4164         struct ifnet *ifp = sc->sc_ifp;
4165         void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0);
4166
4167         URTW_ASSERT_LOCKED(sc);
4168
4169         switch (USB_GET_STATE(xfer)) {
4170         case USB_ST_TRANSFERRED:
4171                 urtw_txstatus_eof(xfer);
4172                 /* FALLTHROUGH */
4173         case USB_ST_SETUP:
4174 setup:
4175                 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t));
4176                 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t));
4177                 usbd_transfer_submit(xfer);
4178                 break;
4179         default:
4180                 if (error != USB_ERR_CANCELLED) {
4181                         usbd_xfer_set_stall(xfer);
4182                         ifp->if_ierrors++;
4183                         goto setup;
4184                 }
4185                 break;
4186         }
4187 }
4188
4189 static void
4190 urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data)
4191 {
4192         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4193         struct ifnet *ifp = sc->sc_ifp;
4194         struct mbuf *m;
4195
4196         URTW_ASSERT_LOCKED(sc);
4197
4198         /*
4199          * Do any tx complete callback.  Note this must be done before releasing
4200          * the node reference.
4201          */
4202         if (data->m) {
4203                 m = data->m;
4204                 if (m->m_flags & M_TXCB) {
4205                         /* XXX status? */
4206                         ieee80211_process_callback(data->ni, m, 0);
4207                 }
4208                 m_freem(m);
4209                 data->m = NULL;
4210         }
4211         if (data->ni) {
4212                 ieee80211_free_node(data->ni);
4213                 data->ni = NULL;
4214         }
4215         sc->sc_txtimer = 0;
4216         ifp->if_opackets++;
4217         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
4218 }
4219
4220 static void
4221 urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
4222 {
4223         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4224         struct ifnet *ifp = sc->sc_ifp;
4225         struct urtw_data *data;
4226
4227         URTW_ASSERT_LOCKED(sc);
4228
4229         switch (USB_GET_STATE(xfer)) {
4230         case USB_ST_TRANSFERRED:
4231                 data = STAILQ_FIRST(&sc->sc_tx_active);
4232                 if (data == NULL)
4233                         goto setup;
4234                 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next);
4235                 urtw_txeof(xfer, data);
4236                 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next);
4237                 /* FALLTHROUGH */
4238         case USB_ST_SETUP:
4239 setup:
4240                 data = STAILQ_FIRST(&sc->sc_tx_pending);
4241                 if (data == NULL) {
4242                         DPRINTF(sc, URTW_DEBUG_XMIT,
4243                             "%s: empty pending queue\n", __func__);
4244                         return;
4245                 }
4246                 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next);
4247                 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next);
4248
4249                 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
4250                 usbd_transfer_submit(xfer);
4251
4252                 URTW_UNLOCK(sc);
4253                 urtw_start(ifp);
4254                 URTW_LOCK(sc);
4255                 break;
4256         default:
4257                 data = STAILQ_FIRST(&sc->sc_tx_active);
4258                 if (data == NULL)
4259                         goto setup;
4260                 if (data->ni != NULL) {
4261                         ieee80211_free_node(data->ni);
4262                         data->ni = NULL;
4263                         ifp->if_oerrors++;
4264                 }
4265                 if (error != USB_ERR_CANCELLED) {
4266                         usbd_xfer_set_stall(xfer);
4267                         goto setup;
4268                 }
4269                 break;
4270         }
4271 }
4272
4273 static struct urtw_data *
4274 _urtw_getbuf(struct urtw_softc *sc)
4275 {
4276         struct urtw_data *bf;
4277
4278         bf = STAILQ_FIRST(&sc->sc_tx_inactive);
4279         if (bf != NULL)
4280                 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
4281         else
4282                 bf = NULL;
4283         if (bf == NULL)
4284                 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__,
4285                     "out of xmit buffers");
4286         return (bf);
4287 }
4288
4289 static struct urtw_data *
4290 urtw_getbuf(struct urtw_softc *sc)
4291 {
4292         struct urtw_data *bf;
4293
4294         URTW_ASSERT_LOCKED(sc);
4295
4296         bf = _urtw_getbuf(sc);
4297         if (bf == NULL) {
4298                 struct ifnet *ifp = sc->sc_ifp;
4299
4300                 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__);
4301                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
4302         }
4303         return (bf);
4304 }
4305
4306 static int
4307 urtw_isbmode(uint16_t rate)
4308 {
4309
4310         return ((rate <= 22 && rate != 12 && rate != 18) ||
4311             rate == 44) ? (1) : (0);
4312 }
4313
4314 static uint16_t
4315 urtw_rate2dbps(uint16_t rate)
4316 {
4317
4318         switch(rate) {
4319         case 12:
4320         case 18:
4321         case 24:
4322         case 36:
4323         case 48:
4324         case 72:
4325         case 96:
4326         case 108:
4327                 return (rate * 2);
4328         default:
4329                 break;
4330         }
4331         return (24);
4332 }
4333
4334 static int
4335 urtw_compute_txtime(uint16_t framelen, uint16_t rate,
4336     uint8_t ismgt, uint8_t isshort)
4337 {
4338         uint16_t     ceiling, frametime, n_dbps;
4339
4340         if (urtw_isbmode(rate)) {
4341                 if (ismgt || !isshort || rate == 2)
4342                         frametime = (uint16_t)(144 + 48 +
4343                             (framelen * 8 / (rate / 2)));
4344                 else
4345                         frametime = (uint16_t)(72 + 24 +
4346                             (framelen * 8 / (rate / 2)));
4347                 if ((framelen * 8 % (rate / 2)) != 0)
4348                         frametime++;
4349         } else {
4350                 n_dbps = urtw_rate2dbps(rate);
4351                 ceiling = (16 + 8 * framelen + 6) / n_dbps
4352                     + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0);
4353                 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6);
4354         }
4355         return (frametime);
4356 }
4357
4358 /*
4359  * Callback from the 802.11 layer to update the
4360  * slot time based on the current setting.
4361  */
4362 static void
4363 urtw_updateslot(struct ifnet *ifp)
4364 {
4365         struct urtw_softc *sc = ifp->if_softc;
4366         struct ieee80211com *ic = ifp->if_l2com;
4367
4368         ieee80211_runtask(ic, &sc->sc_updateslot_task);
4369 }
4370
4371 static void
4372 urtw_updateslottask(void *arg, int pending)
4373 {
4374         struct urtw_softc *sc = arg;
4375         struct ifnet *ifp = sc->sc_ifp;
4376         struct ieee80211com *ic = ifp->if_l2com;
4377         int error;
4378
4379         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
4380                 return;
4381
4382         URTW_LOCK(sc);
4383         if (sc->sc_flags & URTW_RTL8187B) {
4384                 urtw_write8_m(sc, URTW_SIFS, 0x22);
4385                 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan))
4386                         urtw_write8_m(sc, URTW_SLOT, 0x9);
4387                 else
4388                         urtw_write8_m(sc, URTW_SLOT, 0x14);
4389                 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b);
4390                 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b);
4391         } else {
4392                 urtw_write8_m(sc, URTW_SIFS, 0x22);
4393                 if (sc->sc_state == IEEE80211_S_ASSOC &&
4394                     ic->ic_flags & IEEE80211_F_SHSLOT)
4395                         urtw_write8_m(sc, URTW_SLOT, 0x9);
4396                 else
4397                         urtw_write8_m(sc, URTW_SLOT, 0x14);
4398                 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
4399                         urtw_write8_m(sc, URTW_DIFS, 0x14);
4400                         urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14);
4401                         urtw_write8_m(sc, URTW_CW_VAL, 0x73);
4402                 } else {
4403                         urtw_write8_m(sc, URTW_DIFS, 0x24);
4404                         urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24);
4405                         urtw_write8_m(sc, URTW_CW_VAL, 0xa5);
4406                 }
4407         }
4408 fail:
4409         URTW_UNLOCK(sc);
4410 }
4411
4412 static void
4413 urtw_sysctl_node(struct urtw_softc *sc)
4414 {
4415 #define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d)   \
4416         SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
4417         struct sysctl_ctx_list *ctx;
4418         struct sysctl_oid_list *child, *parent;
4419         struct sysctl_oid *tree;
4420         struct urtw_stats *stats = &sc->sc_stats;
4421
4422         ctx = device_get_sysctl_ctx(sc->sc_dev);
4423         child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev));
4424
4425         tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
4426             NULL, "URTW statistics");
4427         parent = SYSCTL_CHILDREN(tree);
4428
4429         /* Tx statistics. */
4430         tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD,
4431             NULL, "Tx MAC statistics");
4432         child = SYSCTL_CHILDREN(tree);
4433         URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0],
4434             "1 Mbit/s");
4435         URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1],
4436             "2 Mbit/s");
4437         URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2],
4438             "5.5 Mbit/s");
4439         URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4],
4440             "6 Mbit/s");
4441         URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5],
4442             "9 Mbit/s");
4443         URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3],
4444             "11 Mbit/s");
4445         URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6],
4446             "12 Mbit/s");
4447         URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7],
4448             "18 Mbit/s");
4449         URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8],
4450             "24 Mbit/s");
4451         URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9],
4452             "36 Mbit/s");
4453         URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10],
4454             "48 Mbit/s");
4455         URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11],
4456             "54 Mbit/s");
4457 #undef URTW_SYSCTL_STAT_ADD32
4458 }
4459
4460 static device_method_t urtw_methods[] = {
4461         DEVMETHOD(device_probe, urtw_match),
4462         DEVMETHOD(device_attach, urtw_attach),
4463         DEVMETHOD(device_detach, urtw_detach),
4464         DEVMETHOD_END
4465 };
4466 static driver_t urtw_driver = {
4467         .name = "urtw",
4468         .methods = urtw_methods,
4469         .size = sizeof(struct urtw_softc)
4470 };
4471 static devclass_t urtw_devclass;
4472
4473 DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0);
4474 MODULE_DEPEND(urtw, wlan, 1, 1, 1);
4475 MODULE_DEPEND(urtw, usb, 1, 1, 1);
4476 MODULE_VERSION(urtw, 1);