2 * Copyright (c) 2013 Tsubai Masanari
3 * Copyright (c) 2013 Bryan Venteicher <bryanv@FreeBSD.org>
4 * Copyright (c) 2018 Patrick Kelsey
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 * $OpenBSD: src/sys/dev/pci/if_vmx.c,v 1.11 2013/06/22 00:28:10 uebayasi Exp $
21 /* Driver for VMware vmxnet3 virtual ethernet devices. */
23 #include <sys/cdefs.h>
24 __FBSDID("$FreeBSD$");
26 #include <sys/param.h>
27 #include <sys/systm.h>
28 #include <sys/kernel.h>
29 #include <sys/endian.h>
30 #include <sys/sockio.h>
32 #include <sys/malloc.h>
33 #include <sys/module.h>
34 #include <sys/socket.h>
35 #include <sys/sysctl.h>
40 #include <net/ethernet.h>
42 #include <net/if_var.h>
43 #include <net/if_arp.h>
44 #include <net/if_dl.h>
45 #include <net/if_types.h>
46 #include <net/if_media.h>
47 #include <net/if_vlan_var.h>
48 #include <net/iflib.h>
50 #include <netinet/in_systm.h>
51 #include <netinet/in.h>
52 #include <netinet/ip.h>
53 #include <netinet/ip6.h>
54 #include <netinet6/ip6_var.h>
55 #include <netinet/udp.h>
56 #include <netinet/tcp.h>
58 #include <machine/bus.h>
59 #include <machine/resource.h>
63 #include <dev/pci/pcireg.h>
64 #include <dev/pci/pcivar.h>
68 #include "if_vmxreg.h"
69 #include "if_vmxvar.h"
72 #include "opt_inet6.h"
75 #define VMXNET3_VMWARE_VENDOR_ID 0x15AD
76 #define VMXNET3_VMWARE_DEVICE_ID 0x07B0
78 static pci_vendor_info_t vmxnet3_vendor_info_array[] =
80 PVID(VMXNET3_VMWARE_VENDOR_ID, VMXNET3_VMWARE_DEVICE_ID, "VMware VMXNET3 Ethernet Adapter"),
81 /* required last entry */
85 static void *vmxnet3_register(device_t);
86 static int vmxnet3_attach_pre(if_ctx_t);
87 static int vmxnet3_msix_intr_assign(if_ctx_t, int);
88 static void vmxnet3_free_irqs(struct vmxnet3_softc *);
89 static int vmxnet3_attach_post(if_ctx_t);
90 static int vmxnet3_detach(if_ctx_t);
91 static int vmxnet3_shutdown(if_ctx_t);
92 static int vmxnet3_suspend(if_ctx_t);
93 static int vmxnet3_resume(if_ctx_t);
95 static int vmxnet3_alloc_resources(struct vmxnet3_softc *);
96 static void vmxnet3_free_resources(struct vmxnet3_softc *);
97 static int vmxnet3_check_version(struct vmxnet3_softc *);
98 static void vmxnet3_set_interrupt_idx(struct vmxnet3_softc *);
100 static int vmxnet3_queues_shared_alloc(struct vmxnet3_softc *);
101 static void vmxnet3_init_txq(struct vmxnet3_softc *, int);
102 static int vmxnet3_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, int);
103 static void vmxnet3_init_rxq(struct vmxnet3_softc *, int, int);
104 static int vmxnet3_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int, int);
105 static void vmxnet3_queues_free(if_ctx_t);
107 static int vmxnet3_alloc_shared_data(struct vmxnet3_softc *);
108 static void vmxnet3_free_shared_data(struct vmxnet3_softc *);
109 static int vmxnet3_alloc_mcast_table(struct vmxnet3_softc *);
110 static void vmxnet3_free_mcast_table(struct vmxnet3_softc *);
111 static void vmxnet3_init_shared_data(struct vmxnet3_softc *);
112 static void vmxnet3_reinit_rss_shared_data(struct vmxnet3_softc *);
113 static void vmxnet3_reinit_shared_data(struct vmxnet3_softc *);
114 static int vmxnet3_alloc_data(struct vmxnet3_softc *);
115 static void vmxnet3_free_data(struct vmxnet3_softc *);
117 static void vmxnet3_evintr(struct vmxnet3_softc *);
118 static int vmxnet3_isc_txd_encap(void *, if_pkt_info_t);
119 static void vmxnet3_isc_txd_flush(void *, uint16_t, qidx_t);
120 static int vmxnet3_isc_txd_credits_update(void *, uint16_t, bool);
121 static int vmxnet3_isc_rxd_available(void *, uint16_t, qidx_t, qidx_t);
122 static int vmxnet3_isc_rxd_pkt_get(void *, if_rxd_info_t);
123 static void vmxnet3_isc_rxd_refill(void *, if_rxd_update_t);
124 static void vmxnet3_isc_rxd_flush(void *, uint16_t, uint8_t, qidx_t);
125 static int vmxnet3_legacy_intr(void *);
126 static int vmxnet3_rxq_intr(void *);
127 static int vmxnet3_event_intr(void *);
129 static void vmxnet3_stop(if_ctx_t);
131 static void vmxnet3_txinit(struct vmxnet3_softc *, struct vmxnet3_txqueue *);
132 static void vmxnet3_rxinit(struct vmxnet3_softc *, struct vmxnet3_rxqueue *);
133 static void vmxnet3_reinit_queues(struct vmxnet3_softc *);
134 static int vmxnet3_enable_device(struct vmxnet3_softc *);
135 static void vmxnet3_reinit_rxfilters(struct vmxnet3_softc *);
136 static void vmxnet3_init(if_ctx_t);
137 static void vmxnet3_multi_set(if_ctx_t);
138 static int vmxnet3_mtu_set(if_ctx_t, uint32_t);
139 static void vmxnet3_media_status(if_ctx_t, struct ifmediareq *);
140 static int vmxnet3_media_change(if_ctx_t);
141 static int vmxnet3_promisc_set(if_ctx_t, int);
142 static uint64_t vmxnet3_get_counter(if_ctx_t, ift_counter);
143 static void vmxnet3_update_admin_status(if_ctx_t);
144 static void vmxnet3_txq_timer(if_ctx_t, uint16_t);
146 static void vmxnet3_update_vlan_filter(struct vmxnet3_softc *, int,
148 static void vmxnet3_vlan_register(if_ctx_t, uint16_t);
149 static void vmxnet3_vlan_unregister(if_ctx_t, uint16_t);
150 static void vmxnet3_set_rxfilter(struct vmxnet3_softc *, int);
152 static void vmxnet3_refresh_host_stats(struct vmxnet3_softc *);
153 static int vmxnet3_link_is_up(struct vmxnet3_softc *);
154 static void vmxnet3_link_status(struct vmxnet3_softc *);
155 static void vmxnet3_set_lladdr(struct vmxnet3_softc *);
156 static void vmxnet3_get_lladdr(struct vmxnet3_softc *);
158 static void vmxnet3_setup_txq_sysctl(struct vmxnet3_txqueue *,
159 struct sysctl_ctx_list *, struct sysctl_oid_list *);
160 static void vmxnet3_setup_rxq_sysctl(struct vmxnet3_rxqueue *,
161 struct sysctl_ctx_list *, struct sysctl_oid_list *);
162 static void vmxnet3_setup_queue_sysctl(struct vmxnet3_softc *,
163 struct sysctl_ctx_list *, struct sysctl_oid_list *);
164 static void vmxnet3_setup_sysctl(struct vmxnet3_softc *);
166 static void vmxnet3_write_bar0(struct vmxnet3_softc *, bus_size_t,
168 static uint32_t vmxnet3_read_bar1(struct vmxnet3_softc *, bus_size_t);
169 static void vmxnet3_write_bar1(struct vmxnet3_softc *, bus_size_t,
171 static void vmxnet3_write_cmd(struct vmxnet3_softc *, uint32_t);
172 static uint32_t vmxnet3_read_cmd(struct vmxnet3_softc *, uint32_t);
174 static int vmxnet3_tx_queue_intr_enable(if_ctx_t, uint16_t);
175 static int vmxnet3_rx_queue_intr_enable(if_ctx_t, uint16_t);
176 static void vmxnet3_link_intr_enable(if_ctx_t);
177 static void vmxnet3_enable_intr(struct vmxnet3_softc *, int);
178 static void vmxnet3_disable_intr(struct vmxnet3_softc *, int);
179 static void vmxnet3_intr_enable_all(if_ctx_t);
180 static void vmxnet3_intr_disable_all(if_ctx_t);
185 VMXNET3_BARRIER_RDWR,
188 static void vmxnet3_barrier(struct vmxnet3_softc *, vmxnet3_barrier_t);
191 static device_method_t vmxnet3_methods[] = {
192 /* Device interface */
193 DEVMETHOD(device_register, vmxnet3_register),
194 DEVMETHOD(device_probe, iflib_device_probe),
195 DEVMETHOD(device_attach, iflib_device_attach),
196 DEVMETHOD(device_detach, iflib_device_detach),
197 DEVMETHOD(device_shutdown, iflib_device_shutdown),
198 DEVMETHOD(device_suspend, iflib_device_suspend),
199 DEVMETHOD(device_resume, iflib_device_resume),
203 static driver_t vmxnet3_driver = {
204 "vmx", vmxnet3_methods, sizeof(struct vmxnet3_softc)
207 static devclass_t vmxnet3_devclass;
208 DRIVER_MODULE(vmx, pci, vmxnet3_driver, vmxnet3_devclass, 0, 0);
209 IFLIB_PNP_INFO(pci, vmx, vmxnet3_vendor_info_array);
210 MODULE_VERSION(vmx, 2);
212 MODULE_DEPEND(vmx, pci, 1, 1, 1);
213 MODULE_DEPEND(vmx, ether, 1, 1, 1);
214 MODULE_DEPEND(vmx, iflib, 1, 1, 1);
216 static device_method_t vmxnet3_iflib_methods[] = {
217 DEVMETHOD(ifdi_tx_queues_alloc, vmxnet3_tx_queues_alloc),
218 DEVMETHOD(ifdi_rx_queues_alloc, vmxnet3_rx_queues_alloc),
219 DEVMETHOD(ifdi_queues_free, vmxnet3_queues_free),
221 DEVMETHOD(ifdi_attach_pre, vmxnet3_attach_pre),
222 DEVMETHOD(ifdi_attach_post, vmxnet3_attach_post),
223 DEVMETHOD(ifdi_detach, vmxnet3_detach),
225 DEVMETHOD(ifdi_init, vmxnet3_init),
226 DEVMETHOD(ifdi_stop, vmxnet3_stop),
227 DEVMETHOD(ifdi_multi_set, vmxnet3_multi_set),
228 DEVMETHOD(ifdi_mtu_set, vmxnet3_mtu_set),
229 DEVMETHOD(ifdi_media_status, vmxnet3_media_status),
230 DEVMETHOD(ifdi_media_change, vmxnet3_media_change),
231 DEVMETHOD(ifdi_promisc_set, vmxnet3_promisc_set),
232 DEVMETHOD(ifdi_get_counter, vmxnet3_get_counter),
233 DEVMETHOD(ifdi_update_admin_status, vmxnet3_update_admin_status),
234 DEVMETHOD(ifdi_timer, vmxnet3_txq_timer),
236 DEVMETHOD(ifdi_tx_queue_intr_enable, vmxnet3_tx_queue_intr_enable),
237 DEVMETHOD(ifdi_rx_queue_intr_enable, vmxnet3_rx_queue_intr_enable),
238 DEVMETHOD(ifdi_link_intr_enable, vmxnet3_link_intr_enable),
239 DEVMETHOD(ifdi_intr_enable, vmxnet3_intr_enable_all),
240 DEVMETHOD(ifdi_intr_disable, vmxnet3_intr_disable_all),
241 DEVMETHOD(ifdi_msix_intr_assign, vmxnet3_msix_intr_assign),
243 DEVMETHOD(ifdi_vlan_register, vmxnet3_vlan_register),
244 DEVMETHOD(ifdi_vlan_unregister, vmxnet3_vlan_unregister),
246 DEVMETHOD(ifdi_shutdown, vmxnet3_shutdown),
247 DEVMETHOD(ifdi_suspend, vmxnet3_suspend),
248 DEVMETHOD(ifdi_resume, vmxnet3_resume),
253 static driver_t vmxnet3_iflib_driver = {
254 "vmx", vmxnet3_iflib_methods, sizeof(struct vmxnet3_softc)
257 struct if_txrx vmxnet3_txrx = {
258 .ift_txd_encap = vmxnet3_isc_txd_encap,
259 .ift_txd_flush = vmxnet3_isc_txd_flush,
260 .ift_txd_credits_update = vmxnet3_isc_txd_credits_update,
261 .ift_rxd_available = vmxnet3_isc_rxd_available,
262 .ift_rxd_pkt_get = vmxnet3_isc_rxd_pkt_get,
263 .ift_rxd_refill = vmxnet3_isc_rxd_refill,
264 .ift_rxd_flush = vmxnet3_isc_rxd_flush,
265 .ift_legacy_intr = vmxnet3_legacy_intr
268 static struct if_shared_ctx vmxnet3_sctx_init = {
269 .isc_magic = IFLIB_MAGIC,
272 .isc_tx_maxsize = VMXNET3_TX_MAXSIZE,
273 .isc_tx_maxsegsize = VMXNET3_TX_MAXSEGSIZE,
274 .isc_tso_maxsize = VMXNET3_TSO_MAXSIZE + sizeof(struct ether_vlan_header),
275 .isc_tso_maxsegsize = VMXNET3_TX_MAXSEGSIZE,
278 * These values are used to configure the busdma tag used for
279 * receive descriptors. Each receive descriptor only points to one
282 .isc_rx_maxsize = VMXNET3_RX_MAXSEGSIZE, /* One buf per descriptor */
283 .isc_rx_nsegments = 1, /* One mapping per descriptor */
284 .isc_rx_maxsegsize = VMXNET3_RX_MAXSEGSIZE,
286 .isc_admin_intrcnt = 1,
287 .isc_vendor_info = vmxnet3_vendor_info_array,
288 .isc_driver_version = "2",
289 .isc_driver = &vmxnet3_iflib_driver,
290 .isc_flags = IFLIB_HAS_RXCQ | IFLIB_HAS_TXCQ,
293 * Number of receive queues per receive queue set, with associated
294 * descriptor settings for each.
297 .isc_nfl = 2, /* one free list for each receive command queue */
298 .isc_nrxd_min = {VMXNET3_MIN_RX_NDESC, VMXNET3_MIN_RX_NDESC, VMXNET3_MIN_RX_NDESC},
299 .isc_nrxd_max = {VMXNET3_MAX_RX_NDESC, VMXNET3_MAX_RX_NDESC, VMXNET3_MAX_RX_NDESC},
300 .isc_nrxd_default = {VMXNET3_DEF_RX_NDESC, VMXNET3_DEF_RX_NDESC, VMXNET3_DEF_RX_NDESC},
303 * Number of transmit queues per transmit queue set, with associated
304 * descriptor settings for each.
307 .isc_ntxd_min = {VMXNET3_MIN_TX_NDESC, VMXNET3_MIN_TX_NDESC},
308 .isc_ntxd_max = {VMXNET3_MAX_TX_NDESC, VMXNET3_MAX_TX_NDESC},
309 .isc_ntxd_default = {VMXNET3_DEF_TX_NDESC, VMXNET3_DEF_TX_NDESC},
313 vmxnet3_register(device_t dev)
315 return (&vmxnet3_sctx_init);
319 vmxnet3_attach_pre(if_ctx_t ctx)
322 if_softc_ctx_t scctx;
323 struct vmxnet3_softc *sc;
324 uint32_t intr_config;
327 dev = iflib_get_dev(ctx);
328 sc = iflib_get_softc(ctx);
331 sc->vmx_sctx = iflib_get_sctx(ctx);
332 sc->vmx_scctx = iflib_get_softc_ctx(ctx);
333 sc->vmx_ifp = iflib_get_ifp(ctx);
334 sc->vmx_media = iflib_get_media(ctx);
335 scctx = sc->vmx_scctx;
337 scctx->isc_tx_nsegments = VMXNET3_TX_MAXSEGS;
338 scctx->isc_tx_tso_segments_max = VMXNET3_TX_MAXSEGS;
339 /* isc_tx_tso_size_max doesn't include possible vlan header */
340 scctx->isc_tx_tso_size_max = VMXNET3_TSO_MAXSIZE;
341 scctx->isc_tx_tso_segsize_max = VMXNET3_TX_MAXSEGSIZE;
342 scctx->isc_txrx = &vmxnet3_txrx;
344 /* If 0, the iflib tunable was not set, so set to the default */
345 if (scctx->isc_nrxqsets == 0)
346 scctx->isc_nrxqsets = VMXNET3_DEF_RX_QUEUES;
347 scctx->isc_nrxqsets_max = min(VMXNET3_MAX_RX_QUEUES, mp_ncpus);
349 /* If 0, the iflib tunable was not set, so set to the default */
350 if (scctx->isc_ntxqsets == 0)
351 scctx->isc_ntxqsets = VMXNET3_DEF_TX_QUEUES;
352 scctx->isc_ntxqsets_max = min(VMXNET3_MAX_TX_QUEUES, mp_ncpus);
355 * Enforce that the transmit completion queue descriptor count is
356 * the same as the transmit command queue descriptor count.
358 scctx->isc_ntxd[0] = scctx->isc_ntxd[1];
359 scctx->isc_txqsizes[0] =
360 sizeof(struct vmxnet3_txcompdesc) * scctx->isc_ntxd[0];
361 scctx->isc_txqsizes[1] =
362 sizeof(struct vmxnet3_txdesc) * scctx->isc_ntxd[1];
365 * Enforce that the receive completion queue descriptor count is the
366 * sum of the receive command queue descriptor counts, and that the
367 * second receive command queue descriptor count is the same as the
370 scctx->isc_nrxd[2] = scctx->isc_nrxd[1];
371 scctx->isc_nrxd[0] = scctx->isc_nrxd[1] + scctx->isc_nrxd[2];
372 scctx->isc_rxqsizes[0] =
373 sizeof(struct vmxnet3_rxcompdesc) * scctx->isc_nrxd[0];
374 scctx->isc_rxqsizes[1] =
375 sizeof(struct vmxnet3_rxdesc) * scctx->isc_nrxd[1];
376 scctx->isc_rxqsizes[2] =
377 sizeof(struct vmxnet3_rxdesc) * scctx->isc_nrxd[2];
379 scctx->isc_rss_table_size = UPT1_RSS_MAX_IND_TABLE_SIZE;
382 error = vmxnet3_alloc_resources(sc);
386 /* Check device versions */
387 error = vmxnet3_check_version(sc);
392 * The interrupt mode can be set in the hypervisor configuration via
393 * the parameter ethernet<N>.intrMode.
395 intr_config = vmxnet3_read_cmd(sc, VMXNET3_CMD_GET_INTRCFG);
396 sc->vmx_intr_mask_mode = (intr_config >> 2) & 0x03;
399 * Configure the softc context to attempt to configure the interrupt
400 * mode now indicated by intr_config. iflib will follow the usual
401 * fallback path MSI-X -> MSI -> LEGACY, starting at the configured
404 switch (intr_config & 0x03) {
405 case VMXNET3_IT_AUTO:
406 case VMXNET3_IT_MSIX:
407 scctx->isc_msix_bar = pci_msix_table_bar(dev);
410 scctx->isc_msix_bar = -1;
411 scctx->isc_disable_msix = 1;
413 case VMXNET3_IT_LEGACY:
414 scctx->isc_msix_bar = 0;
418 scctx->isc_tx_csum_flags = VMXNET3_CSUM_ALL_OFFLOAD;
419 scctx->isc_capabilities = scctx->isc_capenable =
420 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 |
421 IFCAP_TSO4 | IFCAP_TSO6 |
422 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 |
423 IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING |
424 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO |
427 /* These capabilities are not enabled by default. */
428 scctx->isc_capabilities |= IFCAP_LRO | IFCAP_VLAN_HWFILTER;
430 vmxnet3_get_lladdr(sc);
431 iflib_set_mac(ctx, sc->vmx_lladdr);
436 * We must completely clean up anything allocated above as iflib
437 * will not invoke any other driver entry points as a result of this
440 vmxnet3_free_resources(sc);
446 vmxnet3_msix_intr_assign(if_ctx_t ctx, int msix)
448 struct vmxnet3_softc *sc;
449 if_softc_ctx_t scctx;
450 struct vmxnet3_rxqueue *rxq;
455 sc = iflib_get_softc(ctx);
456 scctx = sc->vmx_scctx;
458 for (i = 0; i < scctx->isc_nrxqsets; i++) {
459 snprintf(irq_name, sizeof(irq_name), "rxq%d", i);
461 rxq = &sc->vmx_rxq[i];
462 error = iflib_irq_alloc_generic(ctx, &rxq->vxrxq_irq, i + 1,
463 IFLIB_INTR_RX, vmxnet3_rxq_intr, rxq, i, irq_name);
465 device_printf(iflib_get_dev(ctx),
466 "Failed to register rxq %d interrupt handler\n", i);
471 for (i = 0; i < scctx->isc_ntxqsets; i++) {
472 snprintf(irq_name, sizeof(irq_name), "txq%d", i);
475 * Don't provide the corresponding rxq irq for reference -
476 * we want the transmit task to be attached to a task queue
477 * that is different from the one used by the corresponding
478 * rxq irq. That is because the TX doorbell writes are very
479 * expensive as virtualized MMIO operations, so we want to
480 * be able to defer them to another core when possible so
481 * that they don't steal receive processing cycles during
482 * stack turnarounds like TCP ACK generation. The other
483 * piece to this approach is enabling the iflib abdicate
484 * option (currently via an interface-specific
487 iflib_softirq_alloc_generic(ctx, NULL, IFLIB_INTR_TX, NULL, i,
491 error = iflib_irq_alloc_generic(ctx, &sc->vmx_event_intr_irq,
492 scctx->isc_nrxqsets + 1, IFLIB_INTR_ADMIN, vmxnet3_event_intr, sc, 0,
495 device_printf(iflib_get_dev(ctx),
496 "Failed to register event interrupt handler\n");
504 vmxnet3_free_irqs(struct vmxnet3_softc *sc)
506 if_softc_ctx_t scctx;
507 struct vmxnet3_rxqueue *rxq;
510 scctx = sc->vmx_scctx;
512 for (i = 0; i < scctx->isc_nrxqsets; i++) {
513 rxq = &sc->vmx_rxq[i];
514 iflib_irq_free(sc->vmx_ctx, &rxq->vxrxq_irq);
517 iflib_irq_free(sc->vmx_ctx, &sc->vmx_event_intr_irq);
521 vmxnet3_attach_post(if_ctx_t ctx)
524 if_softc_ctx_t scctx;
525 struct vmxnet3_softc *sc;
528 dev = iflib_get_dev(ctx);
529 scctx = iflib_get_softc_ctx(ctx);
530 sc = iflib_get_softc(ctx);
532 if (scctx->isc_nrxqsets > 1)
533 sc->vmx_flags |= VMXNET3_FLAG_RSS;
535 error = vmxnet3_alloc_data(sc);
539 vmxnet3_set_interrupt_idx(sc);
540 vmxnet3_setup_sysctl(sc);
542 ifmedia_add(sc->vmx_media, IFM_ETHER | IFM_AUTO, 0, NULL);
543 ifmedia_set(sc->vmx_media, IFM_ETHER | IFM_AUTO);
550 vmxnet3_detach(if_ctx_t ctx)
552 struct vmxnet3_softc *sc;
554 sc = iflib_get_softc(ctx);
556 vmxnet3_free_irqs(sc);
557 vmxnet3_free_data(sc);
558 vmxnet3_free_resources(sc);
564 vmxnet3_shutdown(if_ctx_t ctx)
571 vmxnet3_suspend(if_ctx_t ctx)
578 vmxnet3_resume(if_ctx_t ctx)
585 vmxnet3_alloc_resources(struct vmxnet3_softc *sc)
593 sc->vmx_res0 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
595 if (sc->vmx_res0 == NULL) {
597 "could not map BAR0 memory\n");
601 sc->vmx_iot0 = rman_get_bustag(sc->vmx_res0);
602 sc->vmx_ioh0 = rman_get_bushandle(sc->vmx_res0);
605 sc->vmx_res1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
607 if (sc->vmx_res1 == NULL) {
609 "could not map BAR1 memory\n");
613 sc->vmx_iot1 = rman_get_bustag(sc->vmx_res1);
614 sc->vmx_ioh1 = rman_get_bushandle(sc->vmx_res1);
620 vmxnet3_free_resources(struct vmxnet3_softc *sc)
626 if (sc->vmx_res0 != NULL) {
627 bus_release_resource(dev, SYS_RES_MEMORY,
628 rman_get_rid(sc->vmx_res0), sc->vmx_res0);
632 if (sc->vmx_res1 != NULL) {
633 bus_release_resource(dev, SYS_RES_MEMORY,
634 rman_get_rid(sc->vmx_res1), sc->vmx_res1);
640 vmxnet3_check_version(struct vmxnet3_softc *sc)
647 version = vmxnet3_read_bar1(sc, VMXNET3_BAR1_VRRS);
648 if ((version & 0x01) == 0) {
649 device_printf(dev, "unsupported hardware version %#x\n",
653 vmxnet3_write_bar1(sc, VMXNET3_BAR1_VRRS, 1);
655 version = vmxnet3_read_bar1(sc, VMXNET3_BAR1_UVRS);
656 if ((version & 0x01) == 0) {
657 device_printf(dev, "unsupported UPT version %#x\n", version);
660 vmxnet3_write_bar1(sc, VMXNET3_BAR1_UVRS, 1);
666 vmxnet3_set_interrupt_idx(struct vmxnet3_softc *sc)
668 if_softc_ctx_t scctx;
669 struct vmxnet3_txqueue *txq;
670 struct vmxnet3_txq_shared *txs;
671 struct vmxnet3_rxqueue *rxq;
672 struct vmxnet3_rxq_shared *rxs;
676 scctx = sc->vmx_scctx;
679 * There is either one interrupt, or there is one interrupt per
680 * receive queue. If there is one interrupt, then all interrupt
681 * indexes are zero. If there is one interrupt per receive queue,
682 * the transmit queue interrupt indexes are assigned the receive
683 * queue interrupt indexesin round-robin fashion.
685 * The event interrupt is always the last interrupt index.
687 sc->vmx_event_intr_idx = scctx->isc_vectors - 1;
690 for (i = 0; i < scctx->isc_nrxqsets; i++, intr_idx++) {
691 rxq = &sc->vmx_rxq[i];
693 rxq->vxrxq_intr_idx = intr_idx;
694 rxs->intr_idx = rxq->vxrxq_intr_idx;
698 * Assign the tx queues interrupt indexes above what we are actually
699 * using. These interrupts will never be enabled.
701 intr_idx = scctx->isc_vectors;
702 for (i = 0; i < scctx->isc_ntxqsets; i++, intr_idx++) {
703 txq = &sc->vmx_txq[i];
705 txq->vxtxq_intr_idx = intr_idx;
706 txs->intr_idx = txq->vxtxq_intr_idx;
711 vmxnet3_queues_shared_alloc(struct vmxnet3_softc *sc)
713 if_softc_ctx_t scctx;
717 scctx = sc->vmx_scctx;
720 * The txq and rxq shared data areas must be allocated contiguously
721 * as vmxnet3_driver_shared contains only a single address member
722 * for the shared queue data area.
724 size = scctx->isc_ntxqsets * sizeof(struct vmxnet3_txq_shared) +
725 scctx->isc_nrxqsets * sizeof(struct vmxnet3_rxq_shared);
726 error = iflib_dma_alloc_align(sc->vmx_ctx, size, 128, &sc->vmx_qs_dma, 0);
728 device_printf(sc->vmx_dev, "cannot alloc queue shared memory\n");
736 vmxnet3_init_txq(struct vmxnet3_softc *sc, int q)
738 struct vmxnet3_txqueue *txq;
739 struct vmxnet3_comp_ring *txc;
740 struct vmxnet3_txring *txr;
741 if_softc_ctx_t scctx;
743 txq = &sc->vmx_txq[q];
744 txc = &txq->vxtxq_comp_ring;
745 txr = &txq->vxtxq_cmd_ring;
746 scctx = sc->vmx_scctx;
748 snprintf(txq->vxtxq_name, sizeof(txq->vxtxq_name), "%s-tx%d",
749 device_get_nameunit(sc->vmx_dev), q);
753 txc->vxcr_ndesc = scctx->isc_ntxd[0];
754 txr->vxtxr_ndesc = scctx->isc_ntxd[1];
758 vmxnet3_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs,
759 int ntxqs, int ntxqsets)
761 struct vmxnet3_softc *sc;
766 sc = iflib_get_softc(ctx);
768 /* Allocate the array of transmit queues */
769 sc->vmx_txq = malloc(sizeof(struct vmxnet3_txqueue) *
770 ntxqsets, M_DEVBUF, M_NOWAIT | M_ZERO);
771 if (sc->vmx_txq == NULL)
774 /* Initialize driver state for each transmit queue */
775 for (q = 0; q < ntxqsets; q++)
776 vmxnet3_init_txq(sc, q);
779 * Allocate queue state that is shared with the device. This check
780 * and call is performed in both vmxnet3_tx_queues_alloc() and
781 * vmxnet3_rx_queues_alloc() so that we don't have to care which
782 * order iflib invokes those routines in.
784 if (sc->vmx_qs_dma.idi_size == 0) {
785 error = vmxnet3_queues_shared_alloc(sc);
790 kva = sc->vmx_qs_dma.idi_vaddr;
791 for (q = 0; q < ntxqsets; q++) {
792 sc->vmx_txq[q].vxtxq_ts = (struct vmxnet3_txq_shared *) kva;
793 kva += sizeof(struct vmxnet3_txq_shared);
796 /* Record descriptor ring vaddrs and paddrs */
797 for (q = 0; q < ntxqsets; q++) {
798 struct vmxnet3_txqueue *txq;
799 struct vmxnet3_txring *txr;
800 struct vmxnet3_comp_ring *txc;
802 txq = &sc->vmx_txq[q];
803 txc = &txq->vxtxq_comp_ring;
804 txr = &txq->vxtxq_cmd_ring;
806 /* Completion ring */
808 (struct vmxnet3_txcompdesc *) vaddrs[q * ntxqs + 0];
809 txc->vxcr_paddr = paddrs[q * ntxqs + 0];
813 (struct vmxnet3_txdesc *) vaddrs[q * ntxqs + 1];
814 txr->vxtxr_paddr = paddrs[q * ntxqs + 1];
821 vmxnet3_init_rxq(struct vmxnet3_softc *sc, int q, int nrxqs)
823 struct vmxnet3_rxqueue *rxq;
824 struct vmxnet3_comp_ring *rxc;
825 struct vmxnet3_rxring *rxr;
826 if_softc_ctx_t scctx;
829 rxq = &sc->vmx_rxq[q];
830 rxc = &rxq->vxrxq_comp_ring;
831 scctx = sc->vmx_scctx;
833 snprintf(rxq->vxrxq_name, sizeof(rxq->vxrxq_name), "%s-rx%d",
834 device_get_nameunit(sc->vmx_dev), q);
840 * First rxq is the completion queue, so there are nrxqs - 1 command
841 * rings starting at iflib queue id 1.
843 rxc->vxcr_ndesc = scctx->isc_nrxd[0];
844 for (i = 0; i < nrxqs - 1; i++) {
845 rxr = &rxq->vxrxq_cmd_ring[i];
846 rxr->vxrxr_ndesc = scctx->isc_nrxd[i + 1];
851 vmxnet3_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs,
852 int nrxqs, int nrxqsets)
854 struct vmxnet3_softc *sc;
855 if_softc_ctx_t scctx;
861 sc = iflib_get_softc(ctx);
862 scctx = sc->vmx_scctx;
864 /* Allocate the array of receive queues */
865 sc->vmx_rxq = malloc(sizeof(struct vmxnet3_rxqueue) *
866 nrxqsets, M_DEVBUF, M_NOWAIT | M_ZERO);
867 if (sc->vmx_rxq == NULL)
870 /* Initialize driver state for each receive queue */
871 for (q = 0; q < nrxqsets; q++)
872 vmxnet3_init_rxq(sc, q, nrxqs);
875 * Allocate queue state that is shared with the device. This check
876 * and call is performed in both vmxnet3_tx_queues_alloc() and
877 * vmxnet3_rx_queues_alloc() so that we don't have to care which
878 * order iflib invokes those routines in.
880 if (sc->vmx_qs_dma.idi_size == 0) {
881 error = vmxnet3_queues_shared_alloc(sc);
886 kva = sc->vmx_qs_dma.idi_vaddr +
887 scctx->isc_ntxqsets * sizeof(struct vmxnet3_txq_shared);
888 for (q = 0; q < nrxqsets; q++) {
889 sc->vmx_rxq[q].vxrxq_rs = (struct vmxnet3_rxq_shared *) kva;
890 kva += sizeof(struct vmxnet3_rxq_shared);
893 /* Record descriptor ring vaddrs and paddrs */
894 for (q = 0; q < nrxqsets; q++) {
895 struct vmxnet3_rxqueue *rxq;
896 struct vmxnet3_rxring *rxr;
897 struct vmxnet3_comp_ring *rxc;
899 rxq = &sc->vmx_rxq[q];
900 rxc = &rxq->vxrxq_comp_ring;
902 /* Completion ring */
904 (struct vmxnet3_rxcompdesc *) vaddrs[q * nrxqs + 0];
905 rxc->vxcr_paddr = paddrs[q * nrxqs + 0];
907 /* Command ring(s) */
908 for (i = 0; i < nrxqs - 1; i++) {
909 rxr = &rxq->vxrxq_cmd_ring[i];
912 (struct vmxnet3_rxdesc *) vaddrs[q * nrxqs + 1 + i];
913 rxr->vxrxr_paddr = paddrs[q * nrxqs + 1 + i];
921 vmxnet3_queues_free(if_ctx_t ctx)
923 struct vmxnet3_softc *sc;
925 sc = iflib_get_softc(ctx);
927 /* Free queue state area that is shared with the device */
928 if (sc->vmx_qs_dma.idi_size != 0) {
929 iflib_dma_free(&sc->vmx_qs_dma);
930 sc->vmx_qs_dma.idi_size = 0;
933 /* Free array of receive queues */
934 if (sc->vmx_rxq != NULL) {
935 free(sc->vmx_rxq, M_DEVBUF);
939 /* Free array of transmit queues */
940 if (sc->vmx_txq != NULL) {
941 free(sc->vmx_txq, M_DEVBUF);
947 vmxnet3_alloc_shared_data(struct vmxnet3_softc *sc)
955 /* Top level state structure shared with the device */
956 size = sizeof(struct vmxnet3_driver_shared);
957 error = iflib_dma_alloc_align(sc->vmx_ctx, size, 1, &sc->vmx_ds_dma, 0);
959 device_printf(dev, "cannot alloc shared memory\n");
962 sc->vmx_ds = (struct vmxnet3_driver_shared *) sc->vmx_ds_dma.idi_vaddr;
964 /* RSS table state shared with the device */
965 if (sc->vmx_flags & VMXNET3_FLAG_RSS) {
966 size = sizeof(struct vmxnet3_rss_shared);
967 error = iflib_dma_alloc_align(sc->vmx_ctx, size, 128,
968 &sc->vmx_rss_dma, 0);
970 device_printf(dev, "cannot alloc rss shared memory\n");
974 (struct vmxnet3_rss_shared *) sc->vmx_rss_dma.idi_vaddr;
981 vmxnet3_free_shared_data(struct vmxnet3_softc *sc)
984 /* Free RSS table state shared with the device */
985 if (sc->vmx_rss != NULL) {
986 iflib_dma_free(&sc->vmx_rss_dma);
990 /* Free top level state structure shared with the device */
991 if (sc->vmx_ds != NULL) {
992 iflib_dma_free(&sc->vmx_ds_dma);
998 vmxnet3_alloc_mcast_table(struct vmxnet3_softc *sc)
1002 /* Multicast table state shared with the device */
1003 error = iflib_dma_alloc_align(sc->vmx_ctx,
1004 VMXNET3_MULTICAST_MAX * ETHER_ADDR_LEN, 32, &sc->vmx_mcast_dma, 0);
1006 device_printf(sc->vmx_dev, "unable to alloc multicast table\n");
1008 sc->vmx_mcast = sc->vmx_mcast_dma.idi_vaddr;
1014 vmxnet3_free_mcast_table(struct vmxnet3_softc *sc)
1017 /* Free multicast table state shared with the device */
1018 if (sc->vmx_mcast != NULL) {
1019 iflib_dma_free(&sc->vmx_mcast_dma);
1020 sc->vmx_mcast = NULL;
1025 vmxnet3_init_shared_data(struct vmxnet3_softc *sc)
1027 struct vmxnet3_driver_shared *ds;
1028 if_shared_ctx_t sctx;
1029 if_softc_ctx_t scctx;
1030 struct vmxnet3_txqueue *txq;
1031 struct vmxnet3_txq_shared *txs;
1032 struct vmxnet3_rxqueue *rxq;
1033 struct vmxnet3_rxq_shared *rxs;
1037 sctx = sc->vmx_sctx;
1038 scctx = sc->vmx_scctx;
1041 * Initialize fields of the shared data that remains the same across
1042 * reinits. Note the shared data is zero'd when allocated.
1045 ds->magic = VMXNET3_REV1_MAGIC;
1048 ds->version = VMXNET3_DRIVER_VERSION;
1049 ds->guest = VMXNET3_GOS_FREEBSD |
1055 ds->vmxnet3_revision = 1;
1056 ds->upt_version = 1;
1059 ds->driver_data = vtophys(sc);
1060 ds->driver_data_len = sizeof(struct vmxnet3_softc);
1061 ds->queue_shared = sc->vmx_qs_dma.idi_paddr;
1062 ds->queue_shared_len = sc->vmx_qs_dma.idi_size;
1063 ds->nrxsg_max = IFLIB_MAX_RX_SEGS;
1066 if (sc->vmx_flags & VMXNET3_FLAG_RSS) {
1067 ds->rss.version = 1;
1068 ds->rss.paddr = sc->vmx_rss_dma.idi_paddr;
1069 ds->rss.len = sc->vmx_rss_dma.idi_size;
1072 /* Interrupt control. */
1073 ds->automask = sc->vmx_intr_mask_mode == VMXNET3_IMM_AUTO;
1075 * Total number of interrupt indexes we are using in the shared
1076 * config data, even though we don't actually allocate MSI-X
1077 * resources for the tx queues. Some versions of the device will
1078 * fail to initialize successfully if interrupt indexes are used in
1079 * the shared config that exceed the number of interrupts configured
1082 ds->nintr = (scctx->isc_vectors == 1) ?
1083 1 : (scctx->isc_nrxqsets + scctx->isc_ntxqsets + 1);
1084 ds->evintr = sc->vmx_event_intr_idx;
1085 ds->ictrl = VMXNET3_ICTRL_DISABLE_ALL;
1087 for (i = 0; i < ds->nintr; i++)
1088 ds->modlevel[i] = UPT1_IMOD_ADAPTIVE;
1090 /* Receive filter. */
1091 ds->mcast_table = sc->vmx_mcast_dma.idi_paddr;
1092 ds->mcast_tablelen = sc->vmx_mcast_dma.idi_size;
1095 for (i = 0; i < scctx->isc_ntxqsets; i++) {
1096 txq = &sc->vmx_txq[i];
1097 txs = txq->vxtxq_ts;
1099 txs->cmd_ring = txq->vxtxq_cmd_ring.vxtxr_paddr;
1100 txs->cmd_ring_len = txq->vxtxq_cmd_ring.vxtxr_ndesc;
1101 txs->comp_ring = txq->vxtxq_comp_ring.vxcr_paddr;
1102 txs->comp_ring_len = txq->vxtxq_comp_ring.vxcr_ndesc;
1103 txs->driver_data = vtophys(txq);
1104 txs->driver_data_len = sizeof(struct vmxnet3_txqueue);
1108 for (i = 0; i < scctx->isc_nrxqsets; i++) {
1109 rxq = &sc->vmx_rxq[i];
1110 rxs = rxq->vxrxq_rs;
1112 rxs->cmd_ring[0] = rxq->vxrxq_cmd_ring[0].vxrxr_paddr;
1113 rxs->cmd_ring_len[0] = rxq->vxrxq_cmd_ring[0].vxrxr_ndesc;
1114 rxs->cmd_ring[1] = rxq->vxrxq_cmd_ring[1].vxrxr_paddr;
1115 rxs->cmd_ring_len[1] = rxq->vxrxq_cmd_ring[1].vxrxr_ndesc;
1116 rxs->comp_ring = rxq->vxrxq_comp_ring.vxcr_paddr;
1117 rxs->comp_ring_len = rxq->vxrxq_comp_ring.vxcr_ndesc;
1118 rxs->driver_data = vtophys(rxq);
1119 rxs->driver_data_len = sizeof(struct vmxnet3_rxqueue);
1124 vmxnet3_reinit_rss_shared_data(struct vmxnet3_softc *sc)
1127 * Use the same key as the Linux driver until FreeBSD can do
1128 * RSS (presumably Toeplitz) in software.
1130 static const uint8_t rss_key[UPT1_RSS_MAX_KEY_SIZE] = {
1131 0x3b, 0x56, 0xd1, 0x56, 0x13, 0x4a, 0xe7, 0xac,
1132 0xe8, 0x79, 0x09, 0x75, 0xe8, 0x65, 0x79, 0x28,
1133 0x35, 0x12, 0xb9, 0x56, 0x7c, 0x76, 0x4b, 0x70,
1134 0xd8, 0x56, 0xa3, 0x18, 0x9b, 0x0a, 0xee, 0xf3,
1135 0x96, 0xa6, 0x9f, 0x8f, 0x9e, 0x8c, 0x90, 0xc9,
1138 struct vmxnet3_driver_shared *ds;
1139 if_softc_ctx_t scctx;
1140 struct vmxnet3_rss_shared *rss;
1144 scctx = sc->vmx_scctx;
1148 UPT1_RSS_HASH_TYPE_IPV4 | UPT1_RSS_HASH_TYPE_TCP_IPV4 |
1149 UPT1_RSS_HASH_TYPE_IPV6 | UPT1_RSS_HASH_TYPE_TCP_IPV6;
1150 rss->hash_func = UPT1_RSS_HASH_FUNC_TOEPLITZ;
1151 rss->hash_key_size = UPT1_RSS_MAX_KEY_SIZE;
1152 rss->ind_table_size = UPT1_RSS_MAX_IND_TABLE_SIZE;
1153 memcpy(rss->hash_key, rss_key, UPT1_RSS_MAX_KEY_SIZE);
1155 for (i = 0; i < UPT1_RSS_MAX_IND_TABLE_SIZE; i++)
1156 rss->ind_table[i] = i % scctx->isc_nrxqsets;
1160 vmxnet3_reinit_shared_data(struct vmxnet3_softc *sc)
1163 struct vmxnet3_driver_shared *ds;
1164 if_softc_ctx_t scctx;
1168 scctx = sc->vmx_scctx;
1170 ds->mtu = ifp->if_mtu;
1171 ds->ntxqueue = scctx->isc_ntxqsets;
1172 ds->nrxqueue = scctx->isc_nrxqsets;
1174 ds->upt_features = 0;
1175 if (ifp->if_capenable & (IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6))
1176 ds->upt_features |= UPT1_F_CSUM;
1177 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1178 ds->upt_features |= UPT1_F_VLAN;
1179 if (ifp->if_capenable & IFCAP_LRO)
1180 ds->upt_features |= UPT1_F_LRO;
1182 if (sc->vmx_flags & VMXNET3_FLAG_RSS) {
1183 ds->upt_features |= UPT1_F_RSS;
1184 vmxnet3_reinit_rss_shared_data(sc);
1187 vmxnet3_write_bar1(sc, VMXNET3_BAR1_DSL, sc->vmx_ds_dma.idi_paddr);
1188 vmxnet3_write_bar1(sc, VMXNET3_BAR1_DSH,
1189 (uint64_t) sc->vmx_ds_dma.idi_paddr >> 32);
1193 vmxnet3_alloc_data(struct vmxnet3_softc *sc)
1197 error = vmxnet3_alloc_shared_data(sc);
1201 error = vmxnet3_alloc_mcast_table(sc);
1205 vmxnet3_init_shared_data(sc);
1211 vmxnet3_free_data(struct vmxnet3_softc *sc)
1214 vmxnet3_free_mcast_table(sc);
1215 vmxnet3_free_shared_data(sc);
1219 vmxnet3_evintr(struct vmxnet3_softc *sc)
1222 struct vmxnet3_txq_shared *ts;
1223 struct vmxnet3_rxq_shared *rs;
1229 event = sc->vmx_ds->event;
1230 vmxnet3_write_bar1(sc, VMXNET3_BAR1_EVENT, event);
1232 if (event & VMXNET3_EVENT_LINK)
1233 vmxnet3_link_status(sc);
1235 if (event & (VMXNET3_EVENT_TQERROR | VMXNET3_EVENT_RQERROR)) {
1236 vmxnet3_read_cmd(sc, VMXNET3_CMD_GET_STATUS);
1237 ts = sc->vmx_txq[0].vxtxq_ts;
1238 if (ts->stopped != 0)
1239 device_printf(dev, "Tx queue error %#x\n", ts->error);
1240 rs = sc->vmx_rxq[0].vxrxq_rs;
1241 if (rs->stopped != 0)
1242 device_printf(dev, "Rx queue error %#x\n", rs->error);
1244 /* XXX - rely on liflib watchdog to reset us? */
1245 device_printf(dev, "Rx/Tx queue error event ... "
1246 "waiting for iflib watchdog reset\n");
1249 if (event & VMXNET3_EVENT_DIC)
1250 device_printf(dev, "device implementation change event\n");
1251 if (event & VMXNET3_EVENT_DEBUG)
1252 device_printf(dev, "debug event\n");
1256 vmxnet3_isc_txd_encap(void *vsc, if_pkt_info_t pi)
1258 struct vmxnet3_softc *sc;
1259 struct vmxnet3_txqueue *txq;
1260 struct vmxnet3_txring *txr;
1261 struct vmxnet3_txdesc *txd, *sop;
1262 bus_dma_segment_t *segs;
1270 txq = &sc->vmx_txq[pi->ipi_qsidx];
1271 txr = &txq->vxtxq_cmd_ring;
1272 segs = pi->ipi_segs;
1273 nsegs = pi->ipi_nsegs;
1274 pidx = pi->ipi_pidx;
1276 KASSERT(nsegs <= VMXNET3_TX_MAXSEGS,
1277 ("%s: packet with too many segments %d", __func__, nsegs));
1279 sop = &txr->vxtxr_txd[pidx];
1280 gen = txr->vxtxr_gen ^ 1; /* Owned by cpu (yet) */
1282 for (i = 0; i < nsegs; i++) {
1283 txd = &txr->vxtxr_txd[pidx];
1285 txd->addr = segs[i].ds_addr;
1286 txd->len = segs[i].ds_len;
1289 txd->offload_mode = VMXNET3_OM_NONE;
1290 txd->offload_pos = 0;
1297 if (++pidx == txr->vxtxr_ndesc) {
1299 txr->vxtxr_gen ^= 1;
1301 gen = txr->vxtxr_gen;
1304 txd->compreq = !!(pi->ipi_flags & IPI_TX_INTR);
1305 pi->ipi_new_pidx = pidx;
1310 if (pi->ipi_mflags & M_VLANTAG) {
1312 sop->vtag = pi->ipi_vtag;
1316 * TSO and checksum offloads
1318 hdrlen = pi->ipi_ehdrlen + pi->ipi_ip_hlen;
1319 if (pi->ipi_csum_flags & CSUM_TSO) {
1320 sop->offload_mode = VMXNET3_OM_TSO;
1322 sop->offload_pos = pi->ipi_tso_segsz;
1323 } else if (pi->ipi_csum_flags & (VMXNET3_CSUM_OFFLOAD |
1324 VMXNET3_CSUM_OFFLOAD_IPV6)) {
1325 sop->offload_mode = VMXNET3_OM_CSUM;
1327 sop->offload_pos = hdrlen +
1328 ((pi->ipi_ipproto == IPPROTO_TCP) ?
1329 offsetof(struct tcphdr, th_sum) :
1330 offsetof(struct udphdr, uh_sum));
1333 /* Finally, change the ownership. */
1334 vmxnet3_barrier(sc, VMXNET3_BARRIER_WR);
1341 vmxnet3_isc_txd_flush(void *vsc, uint16_t txqid, qidx_t pidx)
1343 struct vmxnet3_softc *sc;
1344 struct vmxnet3_txqueue *txq;
1347 txq = &sc->vmx_txq[txqid];
1350 * pidx is what we last set ipi_new_pidx to in
1351 * vmxnet3_isc_txd_encap()
1355 * Avoid expensive register updates if the flush request is
1358 if (txq->vxtxq_last_flush == pidx)
1360 txq->vxtxq_last_flush = pidx;
1361 vmxnet3_write_bar0(sc, VMXNET3_BAR0_TXH(txq->vxtxq_id), pidx);
1365 vmxnet3_isc_txd_credits_update(void *vsc, uint16_t txqid, bool clear)
1367 struct vmxnet3_softc *sc;
1368 struct vmxnet3_txqueue *txq;
1369 struct vmxnet3_comp_ring *txc;
1370 struct vmxnet3_txcompdesc *txcd;
1371 struct vmxnet3_txring *txr;
1375 txq = &sc->vmx_txq[txqid];
1376 txc = &txq->vxtxq_comp_ring;
1377 txr = &txq->vxtxq_cmd_ring;
1380 * If clear is true, we need to report the number of TX command ring
1381 * descriptors that have been processed by the device. If clear is
1382 * false, we just need to report whether or not at least one TX
1383 * command ring descriptor has been processed by the device.
1387 txcd = &txc->vxcr_u.txcd[txc->vxcr_next];
1388 if (txcd->gen != txc->vxcr_gen)
1392 vmxnet3_barrier(sc, VMXNET3_BARRIER_RD);
1394 if (++txc->vxcr_next == txc->vxcr_ndesc) {
1399 if (txcd->eop_idx < txr->vxtxr_next)
1400 processed += txr->vxtxr_ndesc -
1401 (txr->vxtxr_next - txcd->eop_idx) + 1;
1403 processed += txcd->eop_idx - txr->vxtxr_next + 1;
1404 txr->vxtxr_next = (txcd->eop_idx + 1) % txr->vxtxr_ndesc;
1411 vmxnet3_isc_rxd_available(void *vsc, uint16_t rxqid, qidx_t idx, qidx_t budget)
1413 struct vmxnet3_softc *sc;
1414 struct vmxnet3_rxqueue *rxq;
1415 struct vmxnet3_comp_ring *rxc;
1416 struct vmxnet3_rxcompdesc *rxcd;
1423 rxq = &sc->vmx_rxq[rxqid];
1424 rxc = &rxq->vxrxq_comp_ring;
1427 completed_gen = rxc->vxcr_gen;
1429 rxcd = &rxc->vxcr_u.rxcd[idx];
1430 if (rxcd->gen != completed_gen)
1432 vmxnet3_barrier(sc, VMXNET3_BARRIER_RD);
1436 KASSERT(rxcd->sop, ("%s: expected sop", __func__));
1438 KASSERT(!rxcd->sop, ("%s: unexpected sop", __func__));
1439 expect_sop = rxcd->eop;
1441 if (rxcd->eop && (rxcd->len != 0))
1445 if (++idx == rxc->vxcr_ndesc) {
1455 vmxnet3_isc_rxd_pkt_get(void *vsc, if_rxd_info_t ri)
1457 struct vmxnet3_softc *sc;
1458 if_softc_ctx_t scctx;
1459 struct vmxnet3_rxqueue *rxq;
1460 struct vmxnet3_comp_ring *rxc;
1461 struct vmxnet3_rxcompdesc *rxcd;
1462 struct vmxnet3_rxring *rxr;
1463 struct vmxnet3_rxdesc *rxd;
1471 scctx = sc->vmx_scctx;
1472 rxq = &sc->vmx_rxq[ri->iri_qsidx];
1473 rxc = &rxq->vxrxq_comp_ring;
1476 * Get a single packet starting at the given index in the completion
1477 * queue. That we have been called indicates that
1478 * vmxnet3_isc_rxd_available() has already verified that either
1479 * there is a complete packet available starting at the given index,
1480 * or there are one or more zero length packets starting at the
1481 * given index followed by a complete packet, so no verification of
1482 * ownership of the descriptors (and no associated read barrier) is
1485 cqidx = ri->iri_cidx;
1486 rxcd = &rxc->vxcr_u.rxcd[cqidx];
1487 while (rxcd->len == 0) {
1488 KASSERT(rxcd->sop && rxcd->eop,
1489 ("%s: zero-length packet without both sop and eop set",
1491 if (++cqidx == rxc->vxcr_ndesc) {
1495 rxcd = &rxc->vxcr_u.rxcd[cqidx];
1497 KASSERT(rxcd->sop, ("%s: expected sop", __func__));
1502 ri->iri_flowid = rxcd->rss_hash;
1503 switch (rxcd->rss_type) {
1504 case VMXNET3_RCD_RSS_TYPE_NONE:
1505 ri->iri_flowid = ri->iri_qsidx;
1506 ri->iri_rsstype = M_HASHTYPE_NONE;
1508 case VMXNET3_RCD_RSS_TYPE_IPV4:
1509 ri->iri_rsstype = M_HASHTYPE_RSS_IPV4;
1511 case VMXNET3_RCD_RSS_TYPE_TCPIPV4:
1512 ri->iri_rsstype = M_HASHTYPE_RSS_TCP_IPV4;
1514 case VMXNET3_RCD_RSS_TYPE_IPV6:
1515 ri->iri_rsstype = M_HASHTYPE_RSS_IPV6;
1517 case VMXNET3_RCD_RSS_TYPE_TCPIPV6:
1518 ri->iri_rsstype = M_HASHTYPE_RSS_TCP_IPV6;
1521 ri->iri_rsstype = M_HASHTYPE_OPAQUE_HASH;
1527 ri->iri_flags |= M_VLANTAG;
1528 ri->iri_vtag = rxcd->vtag;
1531 /* Checksum offload */
1532 if (!rxcd->no_csum) {
1533 uint32_t csum_flags = 0;
1536 csum_flags |= CSUM_IP_CHECKED;
1537 if (rxcd->ipcsum_ok)
1538 csum_flags |= CSUM_IP_VALID;
1540 if (!rxcd->fragment && (rxcd->tcp || rxcd->udp)) {
1541 csum_flags |= CSUM_L4_CALC;
1542 if (rxcd->csum_ok) {
1543 csum_flags |= CSUM_L4_VALID;
1544 ri->iri_csum_data = 0xffff;
1547 ri->iri_csum_flags = csum_flags;
1551 * The queue numbering scheme used for rxcd->qid is as follows:
1552 * - All of the command ring 0s are numbered [0, nrxqsets - 1]
1553 * - All of the command ring 1s are numbered [nrxqsets, 2*nrxqsets - 1]
1555 * Thus, rxcd->qid less than nrxqsets indicates command ring (and
1556 * flid) 0, and rxcd->qid greater than or equal to nrxqsets
1557 * indicates command ring (and flid) 1.
1562 rxcd = &rxc->vxcr_u.rxcd[cqidx];
1563 KASSERT(rxcd->gen == rxc->vxcr_gen,
1564 ("%s: generation mismatch", __func__));
1565 flid = (rxcd->qid >= scctx->isc_nrxqsets) ? 1 : 0;
1566 rxr = &rxq->vxrxq_cmd_ring[flid];
1567 rxd = &rxr->vxrxr_rxd[rxcd->rxd_idx];
1569 frag = &ri->iri_frags[nfrags];
1570 frag->irf_flid = flid;
1571 frag->irf_idx = rxcd->rxd_idx;
1572 frag->irf_len = rxcd->len;
1573 total_len += rxcd->len;
1575 if (++cqidx == rxc->vxcr_ndesc) {
1579 } while (!rxcd->eop);
1581 ri->iri_cidx = cqidx;
1582 ri->iri_nfrags = nfrags;
1583 ri->iri_len = total_len;
1589 vmxnet3_isc_rxd_refill(void *vsc, if_rxd_update_t iru)
1591 struct vmxnet3_softc *sc;
1592 struct vmxnet3_rxqueue *rxq;
1593 struct vmxnet3_rxring *rxr;
1594 struct vmxnet3_rxdesc *rxd;
1603 count = iru->iru_count;
1604 len = iru->iru_buf_size;
1605 pidx = iru->iru_pidx;
1606 flid = iru->iru_flidx;
1607 paddrs = iru->iru_paddrs;
1610 rxq = &sc->vmx_rxq[iru->iru_qsidx];
1611 rxr = &rxq->vxrxq_cmd_ring[flid];
1612 rxd = rxr->vxrxr_rxd;
1615 * Command ring 0 is filled with BTYPE_HEAD descriptors, and
1616 * command ring 1 is filled with BTYPE_BODY descriptors.
1618 btype = (flid == 0) ? VMXNET3_BTYPE_HEAD : VMXNET3_BTYPE_BODY;
1619 for (i = 0; i < count; i++) {
1620 rxd[pidx].addr = paddrs[i];
1621 rxd[pidx].len = len;
1622 rxd[pidx].btype = btype;
1623 rxd[pidx].gen = rxr->vxrxr_gen;
1625 if (++pidx == rxr->vxrxr_ndesc) {
1627 rxr->vxrxr_gen ^= 1;
1633 vmxnet3_isc_rxd_flush(void *vsc, uint16_t rxqid, uint8_t flid, qidx_t pidx)
1635 struct vmxnet3_softc *sc;
1636 struct vmxnet3_rxqueue *rxq;
1637 struct vmxnet3_rxring *rxr;
1641 rxq = &sc->vmx_rxq[rxqid];
1642 rxr = &rxq->vxrxq_cmd_ring[flid];
1645 r = VMXNET3_BAR0_RXH1(rxqid);
1647 r = VMXNET3_BAR0_RXH2(rxqid);
1650 * pidx is the index of the last descriptor with a buffer the device
1651 * can use, and the device needs to be told which index is one past
1654 if (++pidx == rxr->vxrxr_ndesc)
1656 vmxnet3_write_bar0(sc, r, pidx);
1660 vmxnet3_legacy_intr(void *xsc)
1662 struct vmxnet3_softc *sc;
1663 if_softc_ctx_t scctx;
1667 scctx = sc->vmx_scctx;
1671 * When there is only a single interrupt configured, this routine
1672 * runs in fast interrupt context, following which the rxq 0 task
1675 if (scctx->isc_intr == IFLIB_INTR_LEGACY) {
1676 if (vmxnet3_read_bar1(sc, VMXNET3_BAR1_INTR) == 0)
1677 return (FILTER_HANDLED);
1679 if (sc->vmx_intr_mask_mode == VMXNET3_IMM_ACTIVE)
1680 vmxnet3_intr_disable_all(ctx);
1682 if (sc->vmx_ds->event != 0)
1683 iflib_admin_intr_deferred(ctx);
1686 * XXX - When there is both rxq and event activity, do we care
1687 * whether the rxq 0 task or the admin task re-enables the interrupt
1690 return (FILTER_SCHEDULE_THREAD);
1694 vmxnet3_rxq_intr(void *vrxq)
1696 struct vmxnet3_softc *sc;
1697 struct vmxnet3_rxqueue *rxq;
1702 if (sc->vmx_intr_mask_mode == VMXNET3_IMM_ACTIVE)
1703 vmxnet3_disable_intr(sc, rxq->vxrxq_intr_idx);
1705 return (FILTER_SCHEDULE_THREAD);
1709 vmxnet3_event_intr(void *vsc)
1711 struct vmxnet3_softc *sc;
1715 if (sc->vmx_intr_mask_mode == VMXNET3_IMM_ACTIVE)
1716 vmxnet3_disable_intr(sc, sc->vmx_event_intr_idx);
1719 * The work will be done via vmxnet3_update_admin_status(), and the
1720 * interrupt will be re-enabled in vmxnet3_link_intr_enable().
1722 * The interrupt will be re-enabled by vmxnet3_link_intr_enable().
1724 return (FILTER_SCHEDULE_THREAD);
1728 vmxnet3_stop(if_ctx_t ctx)
1730 struct vmxnet3_softc *sc;
1732 sc = iflib_get_softc(ctx);
1734 sc->vmx_link_active = 0;
1735 vmxnet3_write_cmd(sc, VMXNET3_CMD_DISABLE);
1736 vmxnet3_write_cmd(sc, VMXNET3_CMD_RESET);
1740 vmxnet3_txinit(struct vmxnet3_softc *sc, struct vmxnet3_txqueue *txq)
1742 struct vmxnet3_txring *txr;
1743 struct vmxnet3_comp_ring *txc;
1745 txq->vxtxq_last_flush = -1;
1747 txr = &txq->vxtxq_cmd_ring;
1748 txr->vxtxr_next = 0;
1749 txr->vxtxr_gen = VMXNET3_INIT_GEN;
1751 * iflib has zeroed out the descriptor array during the prior attach
1755 txc = &txq->vxtxq_comp_ring;
1757 txc->vxcr_gen = VMXNET3_INIT_GEN;
1759 * iflib has zeroed out the descriptor array during the prior attach
1765 vmxnet3_rxinit(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rxq)
1767 struct vmxnet3_rxring *rxr;
1768 struct vmxnet3_comp_ring *rxc;
1772 * The descriptors will be populated with buffers during a
1773 * subsequent invocation of vmxnet3_isc_rxd_refill()
1775 for (i = 0; i < sc->vmx_sctx->isc_nrxqs - 1; i++) {
1776 rxr = &rxq->vxrxq_cmd_ring[i];
1777 rxr->vxrxr_gen = VMXNET3_INIT_GEN;
1779 * iflib has zeroed out the descriptor array during the
1780 * prior attach or stop
1784 for (/**/; i < VMXNET3_RXRINGS_PERQ; i++) {
1785 rxr = &rxq->vxrxq_cmd_ring[i];
1787 bzero(rxr->vxrxr_rxd,
1788 rxr->vxrxr_ndesc * sizeof(struct vmxnet3_rxdesc));
1791 rxc = &rxq->vxrxq_comp_ring;
1793 rxc->vxcr_gen = VMXNET3_INIT_GEN;
1795 * iflib has zeroed out the descriptor array during the prior attach
1801 vmxnet3_reinit_queues(struct vmxnet3_softc *sc)
1803 if_softc_ctx_t scctx;
1806 scctx = sc->vmx_scctx;
1808 for (q = 0; q < scctx->isc_ntxqsets; q++)
1809 vmxnet3_txinit(sc, &sc->vmx_txq[q]);
1811 for (q = 0; q < scctx->isc_nrxqsets; q++)
1812 vmxnet3_rxinit(sc, &sc->vmx_rxq[q]);
1816 vmxnet3_enable_device(struct vmxnet3_softc *sc)
1818 if_softc_ctx_t scctx;
1821 scctx = sc->vmx_scctx;
1823 if (vmxnet3_read_cmd(sc, VMXNET3_CMD_ENABLE) != 0) {
1824 device_printf(sc->vmx_dev, "device enable command failed!\n");
1828 /* Reset the Rx queue heads. */
1829 for (q = 0; q < scctx->isc_nrxqsets; q++) {
1830 vmxnet3_write_bar0(sc, VMXNET3_BAR0_RXH1(q), 0);
1831 vmxnet3_write_bar0(sc, VMXNET3_BAR0_RXH2(q), 0);
1838 vmxnet3_reinit_rxfilters(struct vmxnet3_softc *sc)
1844 vmxnet3_set_rxfilter(sc, if_getflags(ifp));
1846 if (ifp->if_capenable & IFCAP_VLAN_HWFILTER)
1847 bcopy(sc->vmx_vlan_filter, sc->vmx_ds->vlan_filter,
1848 sizeof(sc->vmx_ds->vlan_filter));
1850 bzero(sc->vmx_ds->vlan_filter,
1851 sizeof(sc->vmx_ds->vlan_filter));
1852 vmxnet3_write_cmd(sc, VMXNET3_CMD_VLAN_FILTER);
1856 vmxnet3_init(if_ctx_t ctx)
1858 struct vmxnet3_softc *sc;
1859 if_softc_ctx_t scctx;
1861 sc = iflib_get_softc(ctx);
1862 scctx = sc->vmx_scctx;
1864 scctx->isc_max_frame_size = if_getmtu(iflib_get_ifp(ctx)) +
1865 ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + ETHER_CRC_LEN;
1867 /* Use the current MAC address. */
1868 bcopy(IF_LLADDR(sc->vmx_ifp), sc->vmx_lladdr, ETHER_ADDR_LEN);
1869 vmxnet3_set_lladdr(sc);
1871 vmxnet3_reinit_shared_data(sc);
1872 vmxnet3_reinit_queues(sc);
1874 vmxnet3_enable_device(sc);
1876 vmxnet3_reinit_rxfilters(sc);
1877 vmxnet3_link_status(sc);
1881 vmxnet3_multi_set(if_ctx_t ctx)
1884 vmxnet3_set_rxfilter(iflib_get_softc(ctx),
1885 if_getflags(iflib_get_ifp(ctx)));
1889 vmxnet3_mtu_set(if_ctx_t ctx, uint32_t mtu)
1892 if (mtu > VMXNET3_TX_MAXSIZE - (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
1900 vmxnet3_media_status(if_ctx_t ctx, struct ifmediareq * ifmr)
1902 struct vmxnet3_softc *sc;
1904 sc = iflib_get_softc(ctx);
1906 ifmr->ifm_status = IFM_AVALID;
1907 ifmr->ifm_active = IFM_ETHER;
1909 if (vmxnet3_link_is_up(sc) != 0) {
1910 ifmr->ifm_status |= IFM_ACTIVE;
1911 ifmr->ifm_active |= IFM_AUTO;
1913 ifmr->ifm_active |= IFM_NONE;
1917 vmxnet3_media_change(if_ctx_t ctx)
1925 vmxnet3_promisc_set(if_ctx_t ctx, int flags)
1928 vmxnet3_set_rxfilter(iflib_get_softc(ctx), flags);
1934 vmxnet3_get_counter(if_ctx_t ctx, ift_counter cnt)
1936 if_t ifp = iflib_get_ifp(ctx);
1938 if (cnt < IFCOUNTERS)
1939 return if_get_counter_default(ifp, cnt);
1945 vmxnet3_update_admin_status(if_ctx_t ctx)
1947 struct vmxnet3_softc *sc;
1949 sc = iflib_get_softc(ctx);
1950 if (sc->vmx_ds->event != 0)
1953 vmxnet3_refresh_host_stats(sc);
1957 vmxnet3_txq_timer(if_ctx_t ctx, uint16_t qid)
1959 /* Host stats refresh is global, so just trigger it on txq 0 */
1961 vmxnet3_refresh_host_stats(iflib_get_softc(ctx));
1965 vmxnet3_update_vlan_filter(struct vmxnet3_softc *sc, int add, uint16_t tag)
1969 if (tag == 0 || tag > 4095)
1972 idx = (tag >> 5) & 0x7F;
1975 /* Update our private VLAN bitvector. */
1977 sc->vmx_vlan_filter[idx] |= (1 << bit);
1979 sc->vmx_vlan_filter[idx] &= ~(1 << bit);
1983 vmxnet3_vlan_register(if_ctx_t ctx, uint16_t tag)
1986 vmxnet3_update_vlan_filter(iflib_get_softc(ctx), 1, tag);
1990 vmxnet3_vlan_unregister(if_ctx_t ctx, uint16_t tag)
1993 vmxnet3_update_vlan_filter(iflib_get_softc(ctx), 0, tag);
1997 vmxnet3_set_rxfilter(struct vmxnet3_softc *sc, int flags)
2000 struct vmxnet3_driver_shared *ds;
2001 struct ifmultiaddr *ifma;
2007 mode = VMXNET3_RXMODE_UCAST | VMXNET3_RXMODE_BCAST;
2008 if (flags & IFF_PROMISC)
2009 mode |= VMXNET3_RXMODE_PROMISC;
2010 if (flags & IFF_ALLMULTI)
2011 mode |= VMXNET3_RXMODE_ALLMULTI;
2013 int cnt = 0, overflow = 0;
2015 if_maddr_rlock(ifp);
2016 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2017 if (ifma->ifma_addr->sa_family != AF_LINK)
2019 else if (cnt == VMXNET3_MULTICAST_MAX) {
2024 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2025 &sc->vmx_mcast[cnt*ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2028 if_maddr_runlock(ifp);
2030 if (overflow != 0) {
2032 mode |= VMXNET3_RXMODE_ALLMULTI;
2034 mode |= VMXNET3_RXMODE_MCAST;
2035 ds->mcast_tablelen = cnt * ETHER_ADDR_LEN;
2040 vmxnet3_write_cmd(sc, VMXNET3_CMD_SET_FILTER);
2041 vmxnet3_write_cmd(sc, VMXNET3_CMD_SET_RXMODE);
2045 vmxnet3_refresh_host_stats(struct vmxnet3_softc *sc)
2048 vmxnet3_write_cmd(sc, VMXNET3_CMD_GET_STATS);
2052 vmxnet3_link_is_up(struct vmxnet3_softc *sc)
2056 status = vmxnet3_read_cmd(sc, VMXNET3_CMD_GET_LINK);
2057 return !!(status & 0x1);
2061 vmxnet3_link_status(struct vmxnet3_softc *sc)
2068 link = vmxnet3_link_is_up(sc);
2069 speed = IF_Gbps(10);
2071 if (link != 0 && sc->vmx_link_active == 0) {
2072 sc->vmx_link_active = 1;
2073 iflib_link_state_change(ctx, LINK_STATE_UP, speed);
2074 } else if (link == 0 && sc->vmx_link_active != 0) {
2075 sc->vmx_link_active = 0;
2076 iflib_link_state_change(ctx, LINK_STATE_DOWN, speed);
2081 vmxnet3_set_lladdr(struct vmxnet3_softc *sc)
2085 ml = sc->vmx_lladdr[0];
2086 ml |= sc->vmx_lladdr[1] << 8;
2087 ml |= sc->vmx_lladdr[2] << 16;
2088 ml |= sc->vmx_lladdr[3] << 24;
2089 vmxnet3_write_bar1(sc, VMXNET3_BAR1_MACL, ml);
2091 mh = sc->vmx_lladdr[4];
2092 mh |= sc->vmx_lladdr[5] << 8;
2093 vmxnet3_write_bar1(sc, VMXNET3_BAR1_MACH, mh);
2097 vmxnet3_get_lladdr(struct vmxnet3_softc *sc)
2101 ml = vmxnet3_read_cmd(sc, VMXNET3_CMD_GET_MACL);
2102 mh = vmxnet3_read_cmd(sc, VMXNET3_CMD_GET_MACH);
2104 sc->vmx_lladdr[0] = ml;
2105 sc->vmx_lladdr[1] = ml >> 8;
2106 sc->vmx_lladdr[2] = ml >> 16;
2107 sc->vmx_lladdr[3] = ml >> 24;
2108 sc->vmx_lladdr[4] = mh;
2109 sc->vmx_lladdr[5] = mh >> 8;
2113 vmxnet3_setup_txq_sysctl(struct vmxnet3_txqueue *txq,
2114 struct sysctl_ctx_list *ctx, struct sysctl_oid_list *child)
2116 struct sysctl_oid *node, *txsnode;
2117 struct sysctl_oid_list *list, *txslist;
2118 struct UPT1_TxStats *txstats;
2121 txstats = &txq->vxtxq_ts->stats;
2123 snprintf(namebuf, sizeof(namebuf), "txq%d", txq->vxtxq_id);
2124 node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, CTLFLAG_RD,
2125 NULL, "Transmit Queue");
2126 txq->vxtxq_sysctl = list = SYSCTL_CHILDREN(node);
2129 * Add statistics reported by the host. These are updated by the
2130 * iflib txq timer on txq 0.
2132 txsnode = SYSCTL_ADD_NODE(ctx, list, OID_AUTO, "hstats", CTLFLAG_RD,
2133 NULL, "Host Statistics");
2134 txslist = SYSCTL_CHILDREN(txsnode);
2135 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "tso_packets", CTLFLAG_RD,
2136 &txstats->TSO_packets, "TSO packets");
2137 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "tso_bytes", CTLFLAG_RD,
2138 &txstats->TSO_bytes, "TSO bytes");
2139 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "ucast_packets", CTLFLAG_RD,
2140 &txstats->ucast_packets, "Unicast packets");
2141 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "unicast_bytes", CTLFLAG_RD,
2142 &txstats->ucast_bytes, "Unicast bytes");
2143 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "mcast_packets", CTLFLAG_RD,
2144 &txstats->mcast_packets, "Multicast packets");
2145 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "mcast_bytes", CTLFLAG_RD,
2146 &txstats->mcast_bytes, "Multicast bytes");
2147 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "error", CTLFLAG_RD,
2148 &txstats->error, "Errors");
2149 SYSCTL_ADD_UQUAD(ctx, txslist, OID_AUTO, "discard", CTLFLAG_RD,
2150 &txstats->discard, "Discards");
2154 vmxnet3_setup_rxq_sysctl(struct vmxnet3_rxqueue *rxq,
2155 struct sysctl_ctx_list *ctx, struct sysctl_oid_list *child)
2157 struct sysctl_oid *node, *rxsnode;
2158 struct sysctl_oid_list *list, *rxslist;
2159 struct UPT1_RxStats *rxstats;
2162 rxstats = &rxq->vxrxq_rs->stats;
2164 snprintf(namebuf, sizeof(namebuf), "rxq%d", rxq->vxrxq_id);
2165 node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, CTLFLAG_RD,
2166 NULL, "Receive Queue");
2167 rxq->vxrxq_sysctl = list = SYSCTL_CHILDREN(node);
2170 * Add statistics reported by the host. These are updated by the
2171 * iflib txq timer on txq 0.
2173 rxsnode = SYSCTL_ADD_NODE(ctx, list, OID_AUTO, "hstats", CTLFLAG_RD,
2174 NULL, "Host Statistics");
2175 rxslist = SYSCTL_CHILDREN(rxsnode);
2176 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "lro_packets", CTLFLAG_RD,
2177 &rxstats->LRO_packets, "LRO packets");
2178 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "lro_bytes", CTLFLAG_RD,
2179 &rxstats->LRO_bytes, "LRO bytes");
2180 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "ucast_packets", CTLFLAG_RD,
2181 &rxstats->ucast_packets, "Unicast packets");
2182 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "unicast_bytes", CTLFLAG_RD,
2183 &rxstats->ucast_bytes, "Unicast bytes");
2184 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "mcast_packets", CTLFLAG_RD,
2185 &rxstats->mcast_packets, "Multicast packets");
2186 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "mcast_bytes", CTLFLAG_RD,
2187 &rxstats->mcast_bytes, "Multicast bytes");
2188 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "bcast_packets", CTLFLAG_RD,
2189 &rxstats->bcast_packets, "Broadcast packets");
2190 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "bcast_bytes", CTLFLAG_RD,
2191 &rxstats->bcast_bytes, "Broadcast bytes");
2192 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "nobuffer", CTLFLAG_RD,
2193 &rxstats->nobuffer, "No buffer");
2194 SYSCTL_ADD_UQUAD(ctx, rxslist, OID_AUTO, "error", CTLFLAG_RD,
2195 &rxstats->error, "Errors");
2199 vmxnet3_setup_debug_sysctl(struct vmxnet3_softc *sc,
2200 struct sysctl_ctx_list *ctx, struct sysctl_oid_list *child)
2202 if_softc_ctx_t scctx;
2203 struct sysctl_oid *node;
2204 struct sysctl_oid_list *list;
2207 scctx = sc->vmx_scctx;
2209 for (i = 0; i < scctx->isc_ntxqsets; i++) {
2210 struct vmxnet3_txqueue *txq = &sc->vmx_txq[i];
2212 node = SYSCTL_ADD_NODE(ctx, txq->vxtxq_sysctl, OID_AUTO,
2213 "debug", CTLFLAG_RD, NULL, "");
2214 list = SYSCTL_CHILDREN(node);
2216 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "cmd_next", CTLFLAG_RD,
2217 &txq->vxtxq_cmd_ring.vxtxr_next, 0, "");
2218 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "cmd_ndesc", CTLFLAG_RD,
2219 &txq->vxtxq_cmd_ring.vxtxr_ndesc, 0, "");
2220 SYSCTL_ADD_INT(ctx, list, OID_AUTO, "cmd_gen", CTLFLAG_RD,
2221 &txq->vxtxq_cmd_ring.vxtxr_gen, 0, "");
2222 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "comp_next", CTLFLAG_RD,
2223 &txq->vxtxq_comp_ring.vxcr_next, 0, "");
2224 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "comp_ndesc", CTLFLAG_RD,
2225 &txq->vxtxq_comp_ring.vxcr_ndesc, 0,"");
2226 SYSCTL_ADD_INT(ctx, list, OID_AUTO, "comp_gen", CTLFLAG_RD,
2227 &txq->vxtxq_comp_ring.vxcr_gen, 0, "");
2230 for (i = 0; i < scctx->isc_nrxqsets; i++) {
2231 struct vmxnet3_rxqueue *rxq = &sc->vmx_rxq[i];
2233 node = SYSCTL_ADD_NODE(ctx, rxq->vxrxq_sysctl, OID_AUTO,
2234 "debug", CTLFLAG_RD, NULL, "");
2235 list = SYSCTL_CHILDREN(node);
2237 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "cmd0_ndesc", CTLFLAG_RD,
2238 &rxq->vxrxq_cmd_ring[0].vxrxr_ndesc, 0, "");
2239 SYSCTL_ADD_INT(ctx, list, OID_AUTO, "cmd0_gen", CTLFLAG_RD,
2240 &rxq->vxrxq_cmd_ring[0].vxrxr_gen, 0, "");
2241 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "cmd1_ndesc", CTLFLAG_RD,
2242 &rxq->vxrxq_cmd_ring[1].vxrxr_ndesc, 0, "");
2243 SYSCTL_ADD_INT(ctx, list, OID_AUTO, "cmd1_gen", CTLFLAG_RD,
2244 &rxq->vxrxq_cmd_ring[1].vxrxr_gen, 0, "");
2245 SYSCTL_ADD_UINT(ctx, list, OID_AUTO, "comp_ndesc", CTLFLAG_RD,
2246 &rxq->vxrxq_comp_ring.vxcr_ndesc, 0,"");
2247 SYSCTL_ADD_INT(ctx, list, OID_AUTO, "comp_gen", CTLFLAG_RD,
2248 &rxq->vxrxq_comp_ring.vxcr_gen, 0, "");
2253 vmxnet3_setup_queue_sysctl(struct vmxnet3_softc *sc,
2254 struct sysctl_ctx_list *ctx, struct sysctl_oid_list *child)
2256 if_softc_ctx_t scctx;
2259 scctx = sc->vmx_scctx;
2261 for (i = 0; i < scctx->isc_ntxqsets; i++)
2262 vmxnet3_setup_txq_sysctl(&sc->vmx_txq[i], ctx, child);
2263 for (i = 0; i < scctx->isc_nrxqsets; i++)
2264 vmxnet3_setup_rxq_sysctl(&sc->vmx_rxq[i], ctx, child);
2266 vmxnet3_setup_debug_sysctl(sc, ctx, child);
2270 vmxnet3_setup_sysctl(struct vmxnet3_softc *sc)
2273 struct sysctl_ctx_list *ctx;
2274 struct sysctl_oid *tree;
2275 struct sysctl_oid_list *child;
2278 ctx = device_get_sysctl_ctx(dev);
2279 tree = device_get_sysctl_tree(dev);
2280 child = SYSCTL_CHILDREN(tree);
2282 vmxnet3_setup_queue_sysctl(sc, ctx, child);
2286 vmxnet3_write_bar0(struct vmxnet3_softc *sc, bus_size_t r, uint32_t v)
2289 bus_space_write_4(sc->vmx_iot0, sc->vmx_ioh0, r, v);
2293 vmxnet3_read_bar1(struct vmxnet3_softc *sc, bus_size_t r)
2296 return (bus_space_read_4(sc->vmx_iot1, sc->vmx_ioh1, r));
2300 vmxnet3_write_bar1(struct vmxnet3_softc *sc, bus_size_t r, uint32_t v)
2303 bus_space_write_4(sc->vmx_iot1, sc->vmx_ioh1, r, v);
2307 vmxnet3_write_cmd(struct vmxnet3_softc *sc, uint32_t cmd)
2310 vmxnet3_write_bar1(sc, VMXNET3_BAR1_CMD, cmd);
2314 vmxnet3_read_cmd(struct vmxnet3_softc *sc, uint32_t cmd)
2317 vmxnet3_write_cmd(sc, cmd);
2318 bus_space_barrier(sc->vmx_iot1, sc->vmx_ioh1, 0, 0,
2319 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
2320 return (vmxnet3_read_bar1(sc, VMXNET3_BAR1_CMD));
2324 vmxnet3_enable_intr(struct vmxnet3_softc *sc, int irq)
2327 vmxnet3_write_bar0(sc, VMXNET3_BAR0_IMASK(irq), 0);
2331 vmxnet3_disable_intr(struct vmxnet3_softc *sc, int irq)
2334 vmxnet3_write_bar0(sc, VMXNET3_BAR0_IMASK(irq), 1);
2338 vmxnet3_tx_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
2340 /* Not using interrupts for TX */
2345 vmxnet3_rx_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
2347 struct vmxnet3_softc *sc;
2349 sc = iflib_get_softc(ctx);
2350 vmxnet3_enable_intr(sc, sc->vmx_rxq[qid].vxrxq_intr_idx);
2355 vmxnet3_link_intr_enable(if_ctx_t ctx)
2357 struct vmxnet3_softc *sc;
2359 sc = iflib_get_softc(ctx);
2360 vmxnet3_enable_intr(sc, sc->vmx_event_intr_idx);
2364 vmxnet3_intr_enable_all(if_ctx_t ctx)
2366 struct vmxnet3_softc *sc;
2367 if_softc_ctx_t scctx;
2370 sc = iflib_get_softc(ctx);
2371 scctx = sc->vmx_scctx;
2372 sc->vmx_ds->ictrl &= ~VMXNET3_ICTRL_DISABLE_ALL;
2373 for (i = 0; i < scctx->isc_vectors; i++)
2374 vmxnet3_enable_intr(sc, i);
2378 vmxnet3_intr_disable_all(if_ctx_t ctx)
2380 struct vmxnet3_softc *sc;
2383 sc = iflib_get_softc(ctx);
2385 * iflib may invoke this routine before vmxnet3_attach_post() has
2386 * run, which is before the top level shared data area is
2387 * initialized and the device made aware of it.
2389 if (sc->vmx_ds != NULL)
2390 sc->vmx_ds->ictrl |= VMXNET3_ICTRL_DISABLE_ALL;
2391 for (i = 0; i < VMXNET3_MAX_INTRS; i++)
2392 vmxnet3_disable_intr(sc, i);
2396 * Since this is a purely paravirtualized device, we do not have
2397 * to worry about DMA coherency. But at times, we must make sure
2398 * both the compiler and CPU do not reorder memory operations.
2401 vmxnet3_barrier(struct vmxnet3_softc *sc, vmxnet3_barrier_t type)
2405 case VMXNET3_BARRIER_RD:
2408 case VMXNET3_BARRIER_WR:
2411 case VMXNET3_BARRIER_RDWR:
2415 panic("%s: bad barrier type %d", __func__, type);